diff -Nrcpad gcc-17-20260503/ChangeLog gcc-17-20260510/ChangeLog
*** gcc-17-20260503/ChangeLog	Sun May  3 22:32:04 2026
--- gcc-17-20260510/ChangeLog	Sun May 10 22:32:05 2026
***************
*** 1,3 ****
--- 1,7 ----
+ 2026-05-04  Vijay Shankar  <vijay@linux.ibm.com>
+ 
+ 	* MAINTAINERS: Add myself to write after approval.
+ 
  2026-05-01  Manuel Jacob  <me@manueljacob.de>
  
  	* configure.ac: Set default for CPP_FOR_BUILD environment variable in all cases.
diff -Nrcpad gcc-17-20260503/LAST_UPDATED gcc-17-20260510/LAST_UPDATED
*** gcc-17-20260503/LAST_UPDATED	Sun May  3 22:32:19 2026
--- gcc-17-20260510/LAST_UPDATED	Sun May 10 22:32:20 2026
***************
*** 1 ****
! Obtained from git: master revision b183634956ae52ceafca5c32f70bb60ebbf7e34c
--- 1 ----
! Obtained from git: master revision f48688e0fc3c36f38756277763ee8429c657fbc3
diff -Nrcpad gcc-17-20260503/MAINTAINERS gcc-17-20260510/MAINTAINERS
*** gcc-17-20260503/MAINTAINERS	Sun May  3 22:32:04 2026
--- gcc-17-20260510/MAINTAINERS	Sun May 10 22:32:05 2026
*************** Chung-Lin Tang                  cltang
*** 851,856 ****
--- 851,857 ----
  Samuel Tardieu                  sam             <sam@rfc1149.net>
  Ian Lance Taylor                ian             <ian@airs.com>
  Sam Tebbs                       samtebbs        <samuel.tebbs@gmail.com>
+ Vijay Telidevulapalli           vtelidev        <vijay@linux.ibm.com>
  Dinar Temirbulatov              dinar           <dtemirbulatov@gmail.com>
  Matt Thomas                     matt            <matt@3am-software.com>
  Paul Thomas                     pault           <pault@gcc.gnu.org>
diff -Nrcpad gcc-17-20260503/MD5SUMS gcc-17-20260510/MD5SUMS
*** gcc-17-20260503/MD5SUMS	Sun May  3 22:32:24 2026
--- gcc-17-20260510/MD5SUMS	Sun May 10 22:32:26 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-17-20260503.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-17-20260510.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** ac5a8807f431d3dab46a7425b96379e4  .gitig
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*************** f15bc3c5de22eac0bdd4f611502139a0  gcc/AB
*** 530,536 ****
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*** 568,586 ****
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*************** f1c71b64e1c84e240c7b5aea7331a32a  gcc/ad
*** 735,741 ****
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--- 736,742 ----
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*** 802,808 ****
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*** 865,871 ****
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--- 866,872 ----
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*** 3124,3130 ****
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--- 3125,3131 ----
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*** 3159,3169 ****
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  11a3602bcb422274070220eb89a476d3  gcc/analyzer/analyzer-logging.cc
! 40ae03baf298b3a1710e66d214388347  gcc/analyzer/analyzer-logging.h
  bedbea78751b139538f4c906011432fe  gcc/analyzer/analyzer-pass.cc
  380f2a7c04a014441f78569ef397a8a4  gcc/analyzer/analyzer-selftests.cc
  e87a9090a957efa1653cc5a6e36ec346  gcc/analyzer/analyzer-selftests.h
! 1ba2daa8bff6a4acdaf6bb42b210fd93  gcc/analyzer/analyzer.cc
  4d2784a790bbb8637d0d7a90fd6d8773  gcc/analyzer/analyzer.opt
  5847f7da212ee502959192dec8edf0e2  gcc/analyzer/analyzer.opt.urls
  4a17f3766ca5b4ec528ac459c519fc61  gcc/analyzer/bar-chart.cc
--- 3160,3170 ----
  a7b7553dc7deeb384ab95f3ac29473ef  gcc/analyzer/analyzer-language.cc
  c10c515fd18d92850db760e5c083c1c2  gcc/analyzer/analyzer-language.h
  11a3602bcb422274070220eb89a476d3  gcc/analyzer/analyzer-logging.cc
! 6c6453a77e427b461afad41a1a008c1f  gcc/analyzer/analyzer-logging.h
  bedbea78751b139538f4c906011432fe  gcc/analyzer/analyzer-pass.cc
  380f2a7c04a014441f78569ef397a8a4  gcc/analyzer/analyzer-selftests.cc
  e87a9090a957efa1653cc5a6e36ec346  gcc/analyzer/analyzer-selftests.h
! 2239335aee0be8f30a46cf37217cd3d6  gcc/analyzer/analyzer.cc
  4d2784a790bbb8637d0d7a90fd6d8773  gcc/analyzer/analyzer.opt
  5847f7da212ee502959192dec8edf0e2  gcc/analyzer/analyzer.opt.urls
  4a17f3766ca5b4ec528ac459c519fc61  gcc/analyzer/bar-chart.cc
*************** e87a9090a957efa1653cc5a6e36ec346  gcc/an
*** 3171,3217 ****
  ac058cee84f262ecfd4f34ba1b389703  gcc/analyzer/bounds-checking.cc
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! d19463658c4356a8bf5ed55a1f50d05a  gcc/analyzer/call-info.cc
! 1dc079de19ff905e605002178b41470a  gcc/analyzer/call-info.h
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! 3784976be91c6565bf29bf46a649458c  gcc/analyzer/checker-event.cc
! 4bdbe0c472a1b7a39557a9d0073f045b  gcc/analyzer/checker-event.h
  27f8555a4210038eaa81c4f1f66b0d6b  gcc/analyzer/checker-path.cc
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! 6712495ad4527b26bc77a822585c6ee7  gcc/analyzer/common.h
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! ca695b2d13762f05a1ab6018eba991c7  gcc/analyzer/diagnostic-manager.h
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  42e3e00aa33d20f2e141615939577290  gcc/analyzer/engine.h
! f35c6c791ba815800582950c54998869  gcc/analyzer/event-loc-info.h
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! d04c32e8e2278fc5a94115b921b7d5b4  gcc/analyzer/exploded-path.cc
! 37d26cae3b50397d3e22545ef6a29781  gcc/analyzer/exploded-path.h
! 312ba49470080de1033b9392dfb32c28  gcc/analyzer/feasible-graph.cc
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  f0d253f05a474982aa1e1e4c99a0ff98  gcc/analyzer/infinite-loop.cc
! 1e2843238d83b34186ad74c86cc74616  gcc/analyzer/infinite-recursion.cc
  0a7e1ce7bcc02f6aa0f1660029895b13  gcc/analyzer/inlining-iterator.h
  8af331ea68e39926dae8949ff0e49c24  gcc/analyzer/kf-analyzer.cc
  8916a9c075a04e691e41ea4601cdb475  gcc/analyzer/kf-lang-cp.cc
! 684e858d2b36a5ed8263053a31f4a04d  gcc/analyzer/kf.cc
  0652b497ab69835a3ec50cb920b8a973  gcc/analyzer/known-function-manager.cc
  d065f64c3be7da8efff67c73024dd990  gcc/analyzer/known-function-manager.h
! 1cd447c2bc947fa57e24af9ea2598232  gcc/analyzer/ops.cc
! 96054b25dd18f7e6b3d43ca7c65a9367  gcc/analyzer/ops.h
! 54c7e7321ac6942f1c7f2be80207e644  gcc/analyzer/pending-diagnostic.cc
! 83f167b1c386352684ebdd1ca0e408c2  gcc/analyzer/pending-diagnostic.h
! b77d3a21f43b7d8e8c6d94a271de444e  gcc/analyzer/poisoned-value-diagnostic.cc
  77b023b2349d390847d2dd7baa9d75db  gcc/analyzer/program-point.cc
  83761973cc08ccbe996d4f80b0224df3  gcc/analyzer/program-point.h
  08af8052d5ce76b1dc3e3bb8e10ae0da  gcc/analyzer/program-state.cc
--- 3172,3219 ----
  ac058cee84f262ecfd4f34ba1b389703  gcc/analyzer/bounds-checking.cc
  347fd1e5d2dc257a6f98ade59f7515bf  gcc/analyzer/call-details.cc
  3accfae2c88025c6a053a6536125bdc5  gcc/analyzer/call-details.h
! 1f8e9ed6036ee45a77b78b11eef0837d  gcc/analyzer/call-info.cc
! 234d1707e8cedcc7466880758a4b4bb8  gcc/analyzer/call-info.h
  c7b4f9658272bf5b5bf82cb7658a06e1  gcc/analyzer/call-string.cc
  0bd7e3472ca83c56ebabbbf99d6cf111  gcc/analyzer/call-string.h
  ca2b2ec717c11b0a86918eb8e9ad4b02  gcc/analyzer/call-summary.cc
  bc77cd1e5aec40e5623c49cb8974b3d4  gcc/analyzer/call-summary.h
! 7b353130d348136eb10d98cdcf070d5b  gcc/analyzer/callsite-expr.h
! 5f84d83dc980be363abefa73d340bcad  gcc/analyzer/checker-event.cc
! ba0e3f8ef30941728a1363efc633fa00  gcc/analyzer/checker-event.h
  27f8555a4210038eaa81c4f1f66b0d6b  gcc/analyzer/checker-path.cc
  29924be6344174d2253288429074c0f4  gcc/analyzer/checker-path.h
! cf037c6a3b2bcdd06aea3d7a071bf860  gcc/analyzer/common.h
  5ff0274ed0a527fd34bb3ec30c36543f  gcc/analyzer/complexity.cc
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  49f1f27a8c444849f43eeb17ebbd14a4  gcc/analyzer/constraint-manager.cc
  7d0cf2441abcd960f97e29dd071829e5  gcc/analyzer/constraint-manager.h
! bda4c50e98e4d1baea149a392d2c0bad  gcc/analyzer/diagnostic-manager.cc
! aea57c4b6c3a068535cb535affc9baca  gcc/analyzer/diagnostic-manager.h
! 1b83b87d64a13df93e40df56fb994948  gcc/analyzer/engine.cc
  42e3e00aa33d20f2e141615939577290  gcc/analyzer/engine.h
! f92fa0decedca974c9333bb42a774446  gcc/analyzer/event-loc-info.h
! 6beed0699d115d6cdd16e63dd365279d  gcc/analyzer/exploded-graph.h
! 69b742266f7ceef039ee3c2253b1dde9  gcc/analyzer/exploded-path.cc
! e772e96cf6e4982837d0cd1d02d11c7c  gcc/analyzer/exploded-path.h
! 6632fec5f435233ff5eb77335287ebd3  gcc/analyzer/feasible-graph.cc
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! 4a24b9bb8673fa192a1f8c010bad8a98  gcc/analyzer/infinite-recursion.cc
  0a7e1ce7bcc02f6aa0f1660029895b13  gcc/analyzer/inlining-iterator.h
  8af331ea68e39926dae8949ff0e49c24  gcc/analyzer/kf-analyzer.cc
  8916a9c075a04e691e41ea4601cdb475  gcc/analyzer/kf-lang-cp.cc
! 0068087273bfa4ad5bf21ca330a06e60  gcc/analyzer/kf.cc
  0652b497ab69835a3ec50cb920b8a973  gcc/analyzer/known-function-manager.cc
  d065f64c3be7da8efff67c73024dd990  gcc/analyzer/known-function-manager.h
! ec8e58367f783edb8f792dbf3f957cc4  gcc/analyzer/ops.cc
! 2e431f5c97833b392b28d0b7c15ab28a  gcc/analyzer/ops.h
! 9eb8c09557be08bb2df2414fdfa09fb8  gcc/analyzer/pending-diagnostic.cc
! d1e593b09bbcdb6bd5edc17c5f0b7c0d  gcc/analyzer/pending-diagnostic.h
! 5cb5e66a39ff9fe7ad6e790167ce5acb  gcc/analyzer/poisoned-value-diagnostic.cc
  77b023b2349d390847d2dd7baa9d75db  gcc/analyzer/program-point.cc
  83761973cc08ccbe996d4f80b0224df3  gcc/analyzer/program-point.h
  08af8052d5ce76b1dc3e3bb8e10ae0da  gcc/analyzer/program-state.cc
*************** f93ef89d263e02c779ec129aeead8a28  gcc/an
*** 3226,3237 ****
  40d67196cea5adf495b1ff0a0d26039c  gcc/analyzer/region-model-manager.h
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  93431d9eca086e4c7811afc3a66197ea  gcc/analyzer/region-model-reachability.h
! f10bc829375872e44e27d387b92fcacb  gcc/analyzer/region-model.cc
! bb9ca3a6268b8f54cb892aa79559706f  gcc/analyzer/region-model.h
  a53604ef1839c1bc4e0b56b7019d5057  gcc/analyzer/region.cc
! 7b478bc40e78865e5c23d8a7790c707c  gcc/analyzer/region.h
! 7c2cd1dd8ec6af1c8fdeea467ffb0bc4  gcc/analyzer/setjmp-longjmp.cc
! 68ae9aaa9c9e8da06b6a6dfe40e5abb9  gcc/analyzer/shift-diagnostics.cc
  de1b4d168343a9bc6547fc563f836658  gcc/analyzer/sm-fd.cc
  dbe5f340be1000aa32173ff729fedbab  gcc/analyzer/sm-fd.dot
  b10f0d6e0fcb38bf1735eefe471d028d  gcc/analyzer/sm-file.cc
--- 3228,3239 ----
  40d67196cea5adf495b1ff0a0d26039c  gcc/analyzer/region-model-manager.h
  bd7b3b87348aab71c19df788f0817233  gcc/analyzer/region-model-reachability.cc
  93431d9eca086e4c7811afc3a66197ea  gcc/analyzer/region-model-reachability.h
! d304102d70e01a6527d7985f760c15e5  gcc/analyzer/region-model.cc
! b800670e2c207717abac4f5c5e48e330  gcc/analyzer/region-model.h
  a53604ef1839c1bc4e0b56b7019d5057  gcc/analyzer/region.cc
! 4282b6abcc1e39df9d5727003ce6c000  gcc/analyzer/region.h
! 869bedacb3fc18e51d302e89fdc9ba7f  gcc/analyzer/setjmp-longjmp.cc
! 988372b793dca064b45719144289a046  gcc/analyzer/shift-diagnostics.cc
  de1b4d168343a9bc6547fc563f836658  gcc/analyzer/sm-fd.cc
  dbe5f340be1000aa32173ff729fedbab  gcc/analyzer/sm-fd.dot
  b10f0d6e0fcb38bf1735eefe471d028d  gcc/analyzer/sm-file.cc
*************** f858a1884be0ba0c234f7c737c48821f  gcc/an
*** 3240,3251 ****
  1b93a336848d1863eba773990024bfad  gcc/analyzer/sm-malloc.dot
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  c1459aac86f73bc045b48366cc2494b7  gcc/analyzer/sm-sensitive.cc
! 766641ec7a7b7cdba8d4068bc558ed6a  gcc/analyzer/sm-signal.cc
  3f61ef37f37c2c95af8e480f157ed916  gcc/analyzer/sm-taint.cc
  f0dcebb9979e1da7d7bd6fb4ad06a54e  gcc/analyzer/sm.cc
  b667de4f07c660c4cd4e91834ea39073  gcc/analyzer/sm.h
  3624f55d83e9b0bc535b28c37079b437  gcc/analyzer/state-purge.cc
  8a3af8bab2c3a2bb873540dfd49ae5c5  gcc/analyzer/state-purge.h
  b624ff443fe17cb862daacc1cd2f4513  gcc/analyzer/store.cc
  b7fb344faae1952c995d18cba9b7355f  gcc/analyzer/store.h
  33d9be73a4d262226af82d56d077167b  gcc/analyzer/supergraph-fixup-locations.cc
--- 3242,3255 ----
  1b93a336848d1863eba773990024bfad  gcc/analyzer/sm-malloc.dot
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! 5c03c692432e429bcb2f4b5a97a00ab6  gcc/analyzer/sm-signal.cc
  3f61ef37f37c2c95af8e480f157ed916  gcc/analyzer/sm-taint.cc
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  8a3af8bab2c3a2bb873540dfd49ae5c5  gcc/analyzer/state-purge.h
+ 342070c44286a1b8585700c8e7c11036  gcc/analyzer/state-transition.cc
+ 761c24e1a703c19fd79fca90ffbae541  gcc/analyzer/state-transition.h
  b624ff443fe17cb862daacc1cd2f4513  gcc/analyzer/store.cc
  b7fb344faae1952c995d18cba9b7355f  gcc/analyzer/store.h
  33d9be73a4d262226af82d56d077167b  gcc/analyzer/supergraph-fixup-locations.cc
*************** b7fb344faae1952c995d18cba9b7355f  gcc/an
*** 3253,3266 ****
  466a7599dd2372bf97c1a40ec8d04feb  gcc/analyzer/supergraph-simplify.cc
  fa9e08e646a34adeb4f02012756b3d74  gcc/analyzer/supergraph-sorting.cc
  a016ed244edf8129b300a1ef13e7f736  gcc/analyzer/supergraph.cc
! e5cf2ee934b248fcec986cf188b85409  gcc/analyzer/supergraph.h
! ba50c8b04eeea1bbcc6766b9cdd94170  gcc/analyzer/svalue.cc
  ae9175534d716370a7f70a072c0c23fe  gcc/analyzer/svalue.h
  643152b22a5c7ffccb9633bf2c517f1b  gcc/analyzer/symbol.cc
  bb281e65b69be53cd8eab73e448bb9c1  gcc/analyzer/symbol.h
  f9d4a813f2e42ce32c3296184cdf91a8  gcc/analyzer/trimmed-graph.cc
  5dd8bf0b7118e94c8ea49e5d5ad5501b  gcc/analyzer/trimmed-graph.h
! 2db92f753772ba267b417de342cfe0d7  gcc/analyzer/varargs.cc
  3c33a162314863866dc49ceb3d8abd11  gcc/analyzer/varargs.dot
  ce213b79c4b2b50ceddefe2bbf41039e  gcc/analyzer/write-to-const-diagnostics.cc
  5af94414f167d3b307a0e33995e4a7fb  gcc/array-traits.h
--- 3257,3270 ----
  466a7599dd2372bf97c1a40ec8d04feb  gcc/analyzer/supergraph-simplify.cc
  fa9e08e646a34adeb4f02012756b3d74  gcc/analyzer/supergraph-sorting.cc
  a016ed244edf8129b300a1ef13e7f736  gcc/analyzer/supergraph.cc
! f293986107b306a212dc86f6411f2241  gcc/analyzer/supergraph.h
! 5e19dd93fa87f248c9311ce19f363577  gcc/analyzer/svalue.cc
  ae9175534d716370a7f70a072c0c23fe  gcc/analyzer/svalue.h
  643152b22a5c7ffccb9633bf2c517f1b  gcc/analyzer/symbol.cc
  bb281e65b69be53cd8eab73e448bb9c1  gcc/analyzer/symbol.h
  f9d4a813f2e42ce32c3296184cdf91a8  gcc/analyzer/trimmed-graph.cc
  5dd8bf0b7118e94c8ea49e5d5ad5501b  gcc/analyzer/trimmed-graph.h
! e78837c5a60b542b208371ea1e312af9  gcc/analyzer/varargs.cc
  3c33a162314863866dc49ceb3d8abd11  gcc/analyzer/varargs.dot
  ce213b79c4b2b50ceddefe2bbf41039e  gcc/analyzer/write-to-const-diagnostics.cc
  5af94414f167d3b307a0e33995e4a7fb  gcc/array-traits.h
*************** e003b9fc1b8aa5b9b0eef314c0c4f56a  gcc/as
*** 3270,3276 ****
  ea987115b0f67bce5cc4745e6d5bc4d1  gcc/attr-callback.cc
  2d462a57a0a7bbe8bcb22db63f9377ef  gcc/attr-callback.h
  cbe63f3e975481a17ed49898fbbb9d2a  gcc/attr-fnspec.h
! 377ef2db41c57304d86699bc3197d818  gcc/attr-urls.def
  41ebf84dcf3c0a1da25d48a3c9fa72d4  gcc/attribs.cc
  feed071e9f711f8ebbc91f8636422f93  gcc/attribs.h
  bd317e24faffad6f2106396f1c3401b1  gcc/auto-inc-dec.cc
--- 3274,3280 ----
  ea987115b0f67bce5cc4745e6d5bc4d1  gcc/attr-callback.cc
  2d462a57a0a7bbe8bcb22db63f9377ef  gcc/attr-callback.h
  cbe63f3e975481a17ed49898fbbb9d2a  gcc/attr-fnspec.h
! 5e34f8c7aedb20a16dd1c546a30d2b13  gcc/attr-urls.def
  41ebf84dcf3c0a1da25d48a3c9fa72d4  gcc/attribs.cc
  feed071e9f711f8ebbc91f8636422f93  gcc/attribs.h
  bd317e24faffad6f2106396f1c3401b1  gcc/auto-inc-dec.cc
*************** ebb1ceb69d6cf8ac2cdc227ae45f0eca  gcc/bi
*** 3292,3303 ****
  cdcd35bde318b22092b0788986b03a47  gcc/builtins.cc
  4dbe6686097ec6c197a24ac373bb9554  gcc/builtins.def
  99d9ddd60ff804d8e24732db43d38bca  gcc/builtins.h
! dcbed5b4340470907854dc97d257b12a  gcc/c-family/ChangeLog
  ea3fa1f4d7390a105fa3caab4f79aaf7  gcc/c-family/ChangeLog.gimple-classes
  aaea141fd41a559841cb76e33800c289  gcc/c-family/c-ada-spec.cc
  f60a13b470e8e51db83383bf9f9f921e  gcc/c-family/c-ada-spec.h
  070946aa1b55a55d613bad8af07ad174  gcc/c-family/c-attribs.cc
! ddcdc9034b760870e71da19cec630e24  gcc/c-family/c-common.cc
  6522339cd83ff225a1ff9e0eab971eab  gcc/c-family/c-common.def
  a93db167d6d3c021153923ea5398b039  gcc/c-family/c-common.h
  e3a0d862a25764bc4242ad90ba85db86  gcc/c-family/c-cppbuiltin.cc
--- 3296,3307 ----
  cdcd35bde318b22092b0788986b03a47  gcc/builtins.cc
  4dbe6686097ec6c197a24ac373bb9554  gcc/builtins.def
  99d9ddd60ff804d8e24732db43d38bca  gcc/builtins.h
! 58789ab4ff95fc8e95de30c895b892be  gcc/c-family/ChangeLog
  ea3fa1f4d7390a105fa3caab4f79aaf7  gcc/c-family/ChangeLog.gimple-classes
  aaea141fd41a559841cb76e33800c289  gcc/c-family/c-ada-spec.cc
  f60a13b470e8e51db83383bf9f9f921e  gcc/c-family/c-ada-spec.h
  070946aa1b55a55d613bad8af07ad174  gcc/c-family/c-attribs.cc
! f4e6f034c9c0dd30e2457f7b808ba442  gcc/c-family/c-common.cc
  6522339cd83ff225a1ff9e0eab971eab  gcc/c-family/c-common.def
  a93db167d6d3c021153923ea5398b039  gcc/c-family/c-common.h
  e3a0d862a25764bc4242ad90ba85db86  gcc/c-family/c-cppbuiltin.cc
*************** ea821c9d267c64dd8b74aad9d0189834  gcc/c-
*** 3335,3345 ****
  377686cbbf62a7d61d251d3f74cddb5b  gcc/c-family/known-headers.h
  431045382c41554804be1959c1596be4  gcc/c-family/name-hint.h
  3bae9e281cc87b35f63e906373f3b446  gcc/c-family/stub-objc.cc
! 96a454a4bae008f9e80e847394f43192  gcc/c/ChangeLog
  cbffb341640e7c4b16792e0951fffeca  gcc/c/Make-lang.in
  3920e3ee16f5b5955d40584fea53c441  gcc/c/c-aux-info.cc
  cd5bab8a4deeaa0369ae59b9403d06a2  gcc/c/c-convert.cc
! 373b24caec4c87f333445745682be6b8  gcc/c/c-decl.cc
  92707173973fa48fbb8dda88f5af625a  gcc/c/c-errors.cc
  a59a5f126151616976b68fde0c703dd4  gcc/c/c-fold.cc
  817e08cf2d2f4169cb1e5cc26bad1174  gcc/c/c-lang.cc
--- 3339,3349 ----
  377686cbbf62a7d61d251d3f74cddb5b  gcc/c-family/known-headers.h
  431045382c41554804be1959c1596be4  gcc/c-family/name-hint.h
  3bae9e281cc87b35f63e906373f3b446  gcc/c-family/stub-objc.cc
! 013b6b355abc5ea011e73a1f08bcbf3b  gcc/c/ChangeLog
  cbffb341640e7c4b16792e0951fffeca  gcc/c/Make-lang.in
  3920e3ee16f5b5955d40584fea53c441  gcc/c/c-aux-info.cc
  cd5bab8a4deeaa0369ae59b9403d06a2  gcc/c/c-convert.cc
! 7505941f90a964d2b4750a95fcc3ee2d  gcc/c/c-decl.cc
  92707173973fa48fbb8dda88f5af625a  gcc/c/c-errors.cc
  a59a5f126151616976b68fde0c703dd4  gcc/c/c-fold.cc
  817e08cf2d2f4169cb1e5cc26bad1174  gcc/c/c-lang.cc
*************** b270844b1fd859305d4af5a4c3549d5e  gcc/c/
*** 3350,3362 ****
  f6b634d7c0204c419cf4fb7b48193fad  gcc/c/c-parser.h
  4db955734effe2d0c9aac0379d2e6a8c  gcc/c/c-tree.def
  a70b68de7681a84d5b05b1d3e6f7409b  gcc/c/c-tree.h
! 4145861dac00fe986b771be875b990f8  gcc/c/c-typeck.cc
  5804f7ee3eccdfb7c9a64e40b20ccc79  gcc/c/config-lang.in
  58370619d5c4739b7d81d5f899913a0c  gcc/c/gccspec.cc
  3ae90e1d8085765b7e7488ac9673a927  gcc/c/gimple-parser.cc
  d5c1cad6808353782d75116a4939d551  gcc/c/gimple-parser.h
  8b7ae733f9c7c1e52dc5db93bec9cc45  gcc/caller-save.cc
! b40f416783095fe53a15120613a517c0  gcc/calls.cc
  ff5a0cd0f881aae35e405e715150405b  gcc/calls.h
  3a4ad3325026c8bc065648c9af3f67fb  gcc/ccmp.cc
  bdba39e87a75c76bfc3ab3bfd08e7f02  gcc/ccmp.h
--- 3354,3366 ----
  f6b634d7c0204c419cf4fb7b48193fad  gcc/c/c-parser.h
  4db955734effe2d0c9aac0379d2e6a8c  gcc/c/c-tree.def
  a70b68de7681a84d5b05b1d3e6f7409b  gcc/c/c-tree.h
! 18687eeba6fc1696860f9c8147ddf7d1  gcc/c/c-typeck.cc
  5804f7ee3eccdfb7c9a64e40b20ccc79  gcc/c/config-lang.in
  58370619d5c4739b7d81d5f899913a0c  gcc/c/gccspec.cc
  3ae90e1d8085765b7e7488ac9673a927  gcc/c/gimple-parser.cc
  d5c1cad6808353782d75116a4939d551  gcc/c/gimple-parser.h
  8b7ae733f9c7c1e52dc5db93bec9cc45  gcc/caller-save.cc
! 056cd50fff877798a6aba03adec3545f  gcc/calls.cc
  ff5a0cd0f881aae35e405e715150405b  gcc/calls.h
  3a4ad3325026c8bc065648c9af3f67fb  gcc/ccmp.cc
  bdba39e87a75c76bfc3ab3bfd08e7f02  gcc/ccmp.h
*************** efcac12e876ea7fc2018badafb6fddb5  gcc/cf
*** 3371,3384 ****
  19b842f671a6c6284b654d712d52e513  gcc/cfgcleanup.h
  cc705d06a0d769debf1c9afca112eff6  gcc/cfgexpand.cc
  7bcce78536f3bff0e046d9a3ece5ea9a  gcc/cfgexpand.h
! 4510fc884a60c6f3b12e6a713694b822  gcc/cfghooks.cc
! 5b7605cbad0eaa02cf3ae7c9a20e82a5  gcc/cfghooks.h
  e632414796a71844915c5d95d521ea0c  gcc/cfgloop.cc
  e401a5a5a7e802aea0c860de79cf4639  gcc/cfgloop.h
  f18b9392122c866e0f6862690656ebd5  gcc/cfgloopanal.cc
  c3fd49f98e00cb189ccabdf43ad76909  gcc/cfgloopmanip.cc
  f06c849f4ab033a8269f676731b08388  gcc/cfgloopmanip.h
! 6efea778480901818ae74c1e5abf4f5f  gcc/cfgrtl.cc
  c41525a1de6e78cabd4414d6a8c3dac9  gcc/cfgrtl.h
  23b9aa75531c001cb377f7909d709c80  gcc/cgraph.cc
  d61fe81ae621d346985061a794ecfd03  gcc/cgraph.h
--- 3375,3388 ----
  19b842f671a6c6284b654d712d52e513  gcc/cfgcleanup.h
  cc705d06a0d769debf1c9afca112eff6  gcc/cfgexpand.cc
  7bcce78536f3bff0e046d9a3ece5ea9a  gcc/cfgexpand.h
! 9009ba1d3f596dbdd73e13ac8c13aa03  gcc/cfghooks.cc
! 168a35792653beee5d2b951ef1708665  gcc/cfghooks.h
  e632414796a71844915c5d95d521ea0c  gcc/cfgloop.cc
  e401a5a5a7e802aea0c860de79cf4639  gcc/cfgloop.h
  f18b9392122c866e0f6862690656ebd5  gcc/cfgloopanal.cc
  c3fd49f98e00cb189ccabdf43ad76909  gcc/cfgloopmanip.cc
  f06c849f4ab033a8269f676731b08388  gcc/cfgloopmanip.h
! 4aaec97d264485b728d269420e5fc3a1  gcc/cfgrtl.cc
  c41525a1de6e78cabd4414d6a8c3dac9  gcc/cfgrtl.h
  23b9aa75531c001cb377f7909d709c80  gcc/cgraph.cc
  d61fe81ae621d346985061a794ecfd03  gcc/cgraph.h
*************** a56f67bf9504f1f91df64d23b9ce6f3b  gcc/co
*** 3446,3452 ****
  d48c86bc52a7b8ee38281d6069d3eb6a  gcc/collect2.h
  9b54c6ade2ed5ee11859b498e663936e  gcc/color-macros.h
  903401554d90de06743fb9a836e6a45b  gcc/combine-stack-adj.cc
! af093931f440b1ff2d8eaf64045fbf9b  gcc/combine.cc
  9f2835a8fa18cfce2249127014eb7edd  gcc/common.md
  b82c70a691a0ccf137f58b46e3f35b22  gcc/common.opt
  d2e8132b0f749227249e50a041b512b0  gcc/common.opt.urls
--- 3450,3456 ----
  d48c86bc52a7b8ee38281d6069d3eb6a  gcc/collect2.h
  9b54c6ade2ed5ee11859b498e663936e  gcc/color-macros.h
  903401554d90de06743fb9a836e6a45b  gcc/combine-stack-adj.cc
! 744eceed492c1d032583b8b8970d9a46  gcc/combine.cc
  9f2835a8fa18cfce2249127014eb7edd  gcc/common.md
  b82c70a691a0ccf137f58b46e3f35b22  gcc/common.opt
  d2e8132b0f749227249e50a041b512b0  gcc/common.opt.urls
*************** d3b8ce30c6110489fd0b57d6792f3f29  gcc/co
*** 3510,3516 ****
  88eac990ca6879dcd747cf5113888b1e  gcc/compare-elim.cc
  6137f3da8f70ec4262acab21bb549148  gcc/conditions.h
  4250c8b8d57bf1315174cf436a74a88b  gcc/config.build
! abd9f75a358b2ead4e461af14a318bb3  gcc/config.gcc
  d8b0b26795a60b3a991dfbdafe4cd756  gcc/config.host
  34da5cde8b9bc078646ece2f7754fa2f  gcc/config.in
  8e697813dc96ca90f5d0f4c196efe2cc  gcc/config/README
--- 3514,3520 ----
  88eac990ca6879dcd747cf5113888b1e  gcc/compare-elim.cc
  6137f3da8f70ec4262acab21bb549148  gcc/conditions.h
  4250c8b8d57bf1315174cf436a74a88b  gcc/config.build
! 57a8b574e67ae9b8910506f049d864fc  gcc/config.gcc
  d8b0b26795a60b3a991dfbdafe4cd756  gcc/config.host
  34da5cde8b9bc078646ece2f7754fa2f  gcc/config.in
  8e697813dc96ca90f5d0f4c196efe2cc  gcc/config/README
*************** c058178535c874c3d9f517b5db804691  gcc/co
*** 3555,3561 ****
  99262ad964faab9a1090f68a8b3d6d7a  gcc/config/aarch64/aarch64-netbsd.h
  4ac96a19bb5198741503893e13567775  gcc/config/aarch64/aarch64-option-extensions.def
  1fcf15030f24490613d6a45d6b439e61  gcc/config/aarch64/aarch64-opts.h
! c7b072f711fa836ea89000f6f5ae25fe  gcc/config/aarch64/aarch64-passes.def
  c7af165f67b5faf5dfd6ca3a24651517  gcc/config/aarch64/aarch64-protos.h
  7beff4ec013b184132d7c933faa51208  gcc/config/aarch64/aarch64-sched-dispatch.cc
  b824341b8f6fdb8eb1667425adf63db8  gcc/config/aarch64/aarch64-sched-dispatch.h
--- 3559,3565 ----
  99262ad964faab9a1090f68a8b3d6d7a  gcc/config/aarch64/aarch64-netbsd.h
  4ac96a19bb5198741503893e13567775  gcc/config/aarch64/aarch64-option-extensions.def
  1fcf15030f24490613d6a45d6b439e61  gcc/config/aarch64/aarch64-opts.h
! c58a041b3d1a2f2c6c49f13e8ad85fdc  gcc/config/aarch64/aarch64-passes.def
  c7af165f67b5faf5dfd6ca3a24651517  gcc/config/aarch64/aarch64-protos.h
  7beff4ec013b184132d7c933faa51208  gcc/config/aarch64/aarch64-sched-dispatch.cc
  b824341b8f6fdb8eb1667425adf63db8  gcc/config/aarch64/aarch64-sched-dispatch.h
*************** e101bed95b5d0264c364d8bcf1a7705f  gcc/co
*** 3587,3593 ****
  dec4c8fd03ac5636ba08d9523bee06be  gcc/config/aarch64/aarch64-tuning-enums.def
  45c6b1a7ca031f6a0af001317cc5e476  gcc/config/aarch64/aarch64-tuning-flags.def
  b2ed7b4c85a1fa71b919148f60e2984f  gcc/config/aarch64/aarch64-vxworks.h
! 0a641a5acdc9b667f4b70e959892053e  gcc/config/aarch64/aarch64.cc
  1e57040281ba3f62b216c58733a820f5  gcc/config/aarch64/aarch64.h
  bd813cb7dfa70cb6c970d78d27ead783  gcc/config/aarch64/aarch64.md
  ebc45c78d8d52bdcabec46514f44ad2d  gcc/config/aarch64/aarch64.opt
--- 3591,3597 ----
  dec4c8fd03ac5636ba08d9523bee06be  gcc/config/aarch64/aarch64-tuning-enums.def
  45c6b1a7ca031f6a0af001317cc5e476  gcc/config/aarch64/aarch64-tuning-flags.def
  b2ed7b4c85a1fa71b919148f60e2984f  gcc/config/aarch64/aarch64-vxworks.h
! 56f9545b949da68593695ff99dd0e9da  gcc/config/aarch64/aarch64.cc
  1e57040281ba3f62b216c58733a820f5  gcc/config/aarch64/aarch64.h
  bd813cb7dfa70cb6c970d78d27ead783  gcc/config/aarch64/aarch64.md
  ebc45c78d8d52bdcabec46514f44ad2d  gcc/config/aarch64/aarch64.opt
*************** a0261d6cc006fb86b99f338bdc94ae04  gcc/co
*** 4298,4304 ****
  e9c7eebd4e344796f248c93990aa5166  gcc/config/i386/i386-d.h
  333feb817f8ba42d58167ca5495f50b3  gcc/config/i386/i386-expand.cc
  386e1be7f608621b79970d4d036694f8  gcc/config/i386/i386-expand.h
! 0babaec8b22e0a7fe50016d5efeec741  gcc/config/i386/i386-features.cc
  473c35b162be3bcf222c90a16f72b948  gcc/config/i386/i386-features.h
  dca59d9c03f5b12366f9a926169f396d  gcc/config/i386/i386-isa.def
  848d1b1aa8faaad07d31b78764004e7f  gcc/config/i386/i386-jit.cc
--- 4302,4308 ----
  e9c7eebd4e344796f248c93990aa5166  gcc/config/i386/i386-d.h
  333feb817f8ba42d58167ca5495f50b3  gcc/config/i386/i386-expand.cc
  386e1be7f608621b79970d4d036694f8  gcc/config/i386/i386-expand.h
! 8d577de68a1f996a7e1a8eefa256efc9  gcc/config/i386/i386-features.cc
  473c35b162be3bcf222c90a16f72b948  gcc/config/i386/i386-features.h
  dca59d9c03f5b12366f9a926169f396d  gcc/config/i386/i386-isa.def
  848d1b1aa8faaad07d31b78764004e7f  gcc/config/i386/i386-jit.cc
*************** c20b5abeadf9bf0c148bd3cee43dabbf  gcc/co
*** 4312,4320 ****
  5b778b3296ea91dab0ca82338ca6828d  gcc/config/i386/i386-rust-and-jit.inc
  91b8b50cba997aef17a61929b5b55a87  gcc/config/i386/i386-rust.cc
  25b3947a11eb9ca52892133ddb36f3f2  gcc/config/i386/i386-rust.h
! c3fa7a778455f01327f65166676d5bfe  gcc/config/i386/i386.cc
  ef379db3f4eba90bca6b04e4d5abc753  gcc/config/i386/i386.h
! e5fea9f1e91ad1515c4dd82431dcdc2b  gcc/config/i386/i386.md
  7f5e2eb20e3b7ca8af1b3ee7416e8eaf  gcc/config/i386/i386.opt
  b9e680863ab278314c1f2990d2d04fcc  gcc/config/i386/i386.opt.urls
  7570cb8763bf53e7144db7d6cd97f846  gcc/config/i386/i386elf.h
--- 4316,4324 ----
  5b778b3296ea91dab0ca82338ca6828d  gcc/config/i386/i386-rust-and-jit.inc
  91b8b50cba997aef17a61929b5b55a87  gcc/config/i386/i386-rust.cc
  25b3947a11eb9ca52892133ddb36f3f2  gcc/config/i386/i386-rust.h
! 5955a0bcc034084cc9e51d4bc2b9f17b  gcc/config/i386/i386.cc
  ef379db3f4eba90bca6b04e4d5abc753  gcc/config/i386/i386.h
! 3188bbdce3e857394cd2a013b38a4a5b  gcc/config/i386/i386.md
  7f5e2eb20e3b7ca8af1b3ee7416e8eaf  gcc/config/i386/i386.opt
  b9e680863ab278314c1f2990d2d04fcc  gcc/config/i386/i386.opt.urls
  7570cb8763bf53e7144db7d6cd97f846  gcc/config/i386/i386elf.h
*************** c22e895e5b7e6b98c7223b26982a5d20  gcc/co
*** 4430,4436 ****
  7bfce4f9fdee1dc1db1e668b10d9d8e2  gcc/config/i386/x86-tune-sched-bd.cc
  864e537089cc92c5002cefd76ede977a  gcc/config/i386/x86-tune-sched-core.cc
  4fddfbe9b1f3fe846e29534aa8c76823  gcc/config/i386/x86-tune-sched.cc
! aa3b033238efabbb1ed24e31beb2c328  gcc/config/i386/x86-tune.def
  75b1f0e8f79cfd04f898a4099aff669d  gcc/config/i386/x86gprintrin.h
  e5335d55cec73bd3270862ccac7a02e8  gcc/config/i386/x86intrin.h
  76f88cf5ac857d392ddb81b244c5b9b0  gcc/config/i386/xm-cygwin.h
--- 4434,4440 ----
  7bfce4f9fdee1dc1db1e668b10d9d8e2  gcc/config/i386/x86-tune-sched-bd.cc
  864e537089cc92c5002cefd76ede977a  gcc/config/i386/x86-tune-sched-core.cc
  4fddfbe9b1f3fe846e29534aa8c76823  gcc/config/i386/x86-tune-sched.cc
! 07c1eb8a04b320a61f9146e094bec1aa  gcc/config/i386/x86-tune.def
  75b1f0e8f79cfd04f898a4099aff669d  gcc/config/i386/x86gprintrin.h
  e5335d55cec73bd3270862ccac7a02e8  gcc/config/i386/x86intrin.h
  76f88cf5ac857d392ddb81b244c5b9b0  gcc/config/i386/xm-cygwin.h
*************** f32c20d7692c70c82ac87146bec2f392  gcc/co
*** 4513,4519 ****
  a9d1d80c40cc6eb8e9a32d54f82dae43  gcc/config/lm32/t-lm32
  660559cdac2b08e91486a9db7b4a2872  gcc/config/lm32/t-rtems
  2e83330f4ee66f66f14df91ea93921b1  gcc/config/lm32/uclinux-elf.h
! 4fb06f2c99569f008f3fbb89d269dc3b  gcc/config/loongarch/constraints.md
  1daa90ebfa4ead5dd59e8ab6f57feaa8  gcc/config/loongarch/elf.h
  cb159a12ebab737430be10b5df70f1bf  gcc/config/loongarch/generic.md
  8e283bf964d7a7463b18468b5b757c3d  gcc/config/loongarch/genopts/gen-evolution.awk
--- 4517,4523 ----
  a9d1d80c40cc6eb8e9a32d54f82dae43  gcc/config/lm32/t-lm32
  660559cdac2b08e91486a9db7b4a2872  gcc/config/lm32/t-rtems
  2e83330f4ee66f66f14df91ea93921b1  gcc/config/lm32/uclinux-elf.h
! ff2089aaa3dfe6d6a6c26f0b2bfbf34a  gcc/config/loongarch/constraints.md
  1daa90ebfa4ead5dd59e8ab6f57feaa8  gcc/config/loongarch/elf.h
  cb159a12ebab737430be10b5df70f1bf  gcc/config/loongarch/generic.md
  8e283bf964d7a7463b18468b5b757c3d  gcc/config/loongarch/genopts/gen-evolution.awk
*************** dc2f2182b815a3d30579f3cd907f60ea  gcc/co
*** 4545,4563 ****
  c7eeb48ab4223ecfdb09fa5e4ce61d71  gcc/config/loongarch/loongarch-modes.def
  4f6f228dac0484d6ba3fbad6ddb6d8af  gcc/config/loongarch/loongarch-opts.cc
  5e852be9fbcd6b98822c986918099da1  gcc/config/loongarch/loongarch-opts.h
! f42170d324293ddaaf014bfe990b848b  gcc/config/loongarch/loongarch-protos.h
  dadec2097ca9c4947a49a5766ac8ee89  gcc/config/loongarch/loongarch-str.h
  fc623524d75c7561f85f81615ecad0ac  gcc/config/loongarch/loongarch-target-attr.cc
  3cfb174db8bc99a9361e597a3e9bd35e  gcc/config/loongarch/loongarch-tune.h
! 6f74feee1e5b9636e1df56aa447d09cb  gcc/config/loongarch/loongarch.cc
! 57abfb8c653a24903f61e5cf93ac929f  gcc/config/loongarch/loongarch.h
! 1b11d059c390458cbbf8e16a8efa5e6f  gcc/config/loongarch/loongarch.md
  62f9bea81246c3dac622d969dabefc1b  gcc/config/loongarch/loongarch.opt
  387011bb9dde5e25493f3602b2fd17bb  gcc/config/loongarch/loongarch.opt.urls
  561a66379ab213d1901626005734b467  gcc/config/loongarch/lsx.md
  c7466e5dbde45f48269999a0ee23e193  gcc/config/loongarch/lsxintrin.h
  fe51977e0ac69b0829287b1c8d3f5060  gcc/config/loongarch/musl.h
! 55f55f0084d1c0ba8a1c1d5015b69af7  gcc/config/loongarch/predicates.md
  f91faa5449d6dd76f5957fa796f00464  gcc/config/loongarch/simd.md
  2e69737d13e1bfc019d62d20daa42769  gcc/config/loongarch/sync.md
  70d4362e3209c6d2b4d8ad4c79d65a4c  gcc/config/loongarch/t-linux
--- 4549,4567 ----
  c7eeb48ab4223ecfdb09fa5e4ce61d71  gcc/config/loongarch/loongarch-modes.def
  4f6f228dac0484d6ba3fbad6ddb6d8af  gcc/config/loongarch/loongarch-opts.cc
  5e852be9fbcd6b98822c986918099da1  gcc/config/loongarch/loongarch-opts.h
! 49b2aa817558104dbb573a33ececbecb  gcc/config/loongarch/loongarch-protos.h
  dadec2097ca9c4947a49a5766ac8ee89  gcc/config/loongarch/loongarch-str.h
  fc623524d75c7561f85f81615ecad0ac  gcc/config/loongarch/loongarch-target-attr.cc
  3cfb174db8bc99a9361e597a3e9bd35e  gcc/config/loongarch/loongarch-tune.h
! f4bb410c49842101038ee7fdf2cba0c8  gcc/config/loongarch/loongarch.cc
! 44710020cadd48029a693da29d33aaf0  gcc/config/loongarch/loongarch.h
! 5a282fafa8dd7dfaa411a45841c60928  gcc/config/loongarch/loongarch.md
  62f9bea81246c3dac622d969dabefc1b  gcc/config/loongarch/loongarch.opt
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! 99f3bb1790c2cf94d293e7b4064693e8  gcc/config/loongarch/predicates.md
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  70d4362e3209c6d2b4d8ad4c79d65a4c  gcc/config/loongarch/t-linux
*************** f91faa5449d6dd76f5957fa796f00464  gcc/co
*** 4566,4593 ****
  a52ea9773b8048a300f52875af013b56  gcc/config/lynx.h
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- 48b67249c74f1913ef52d401648f6f39  gcc/config/m32c/m32c.cc
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- 817aac5b490e4cff868119006498dfc6  gcc/config/m32c/minmax.md
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- 62b8bec7974665ff57363b777939bfc4  gcc/config/m32c/muldiv.md
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  563cc48283d2ad1aafbb8112d2454bb9  gcc/config/m32r/constraints.md
  7e9f0903e6ea894cbb3089749e4636a0  gcc/config/m32r/little.h
  aa8d8313b5501250a95eca293ac8e65a  gcc/config/m32r/m32r-opts.h
--- 4570,4575 ----
*************** f7bed44c80aaefbbda5efbce9514615a  gcc/co
*** 4660,4666 ****
  416e7e40813d736926bb6a4f4b386070  gcc/config/microblaze/microblaze.h
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  1bfdc8ff504b1a00dc9e86930fd88313  gcc/config/microblaze/microblaze.opt
! b068232199fc8154ef950e53bf98f53d  gcc/config/microblaze/microblaze.opt.urls
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  9409433d74a181d64a217f0be3f66f76  gcc/config/microblaze/rtems.h
  1e468b43b0177b751414cf4e3158a103  gcc/config/microblaze/sync.md
--- 4642,4648 ----
  416e7e40813d736926bb6a4f4b386070  gcc/config/microblaze/microblaze.h
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! 66fa9daea12c701fea0c159404d4eeb4  gcc/config/microblaze/microblaze.opt.urls
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  9409433d74a181d64a217f0be3f66f76  gcc/config/microblaze/rtems.h
  1e468b43b0177b751414cf4e3158a103  gcc/config/microblaze/sync.md
*************** e6f31576821b9aa774bbc1c700e7fc0b  gcc/co
*** 4826,4836 ****
  e081143def3cf3a59cd1181fc9162d41  gcc/config/msp430/msp430-modes.def
  8d1a8981d2063519f82f0f9b0800346f  gcc/config/msp430/msp430-opts.h
  8ccbcf1f4b240d705396f26fdf612391  gcc/config/msp430/msp430-protos.h
! b78c3e0a544725d50c5b7b83fcaad2c5  gcc/config/msp430/msp430.cc
  fcaead57275e6b5ed6c0371ae6636d82  gcc/config/msp430/msp430.h
  07200b765e3e64c4fc593ff89d120350  gcc/config/msp430/msp430.md
  a03bbfba7e7041abe6a04b49d7e51b1a  gcc/config/msp430/msp430.opt
! 11f459d643f1369e6fdb3dc78d733505  gcc/config/msp430/msp430.opt.urls
  9f534dca9b41e0ff17624a4758318e36  gcc/config/msp430/predicates.md
  9edfa0b71859bf8b782a1502ebc42dd8  gcc/config/msp430/t-msp430
  7aa00f7ad5ed515a6973ecda14b0e497  gcc/config/nds32/constants.md
--- 4808,4818 ----
  e081143def3cf3a59cd1181fc9162d41  gcc/config/msp430/msp430-modes.def
  8d1a8981d2063519f82f0f9b0800346f  gcc/config/msp430/msp430-opts.h
  8ccbcf1f4b240d705396f26fdf612391  gcc/config/msp430/msp430-protos.h
! 86d411c20e1029d2e87ed132a9f04bbc  gcc/config/msp430/msp430.cc
  fcaead57275e6b5ed6c0371ae6636d82  gcc/config/msp430/msp430.h
  07200b765e3e64c4fc593ff89d120350  gcc/config/msp430/msp430.md
  a03bbfba7e7041abe6a04b49d7e51b1a  gcc/config/msp430/msp430.opt
! ea485f0619b848fffad83f5eecd28966  gcc/config/msp430/msp430.opt.urls
  9f534dca9b41e0ff17624a4758318e36  gcc/config/msp430/predicates.md
  9edfa0b71859bf8b782a1502ebc42dd8  gcc/config/msp430/t-msp430
  7aa00f7ad5ed515a6973ecda14b0e497  gcc/config/nds32/constants.md
*************** a8e6872a63592d6d7b17cb1654d424c9  gcc/co
*** 4873,4879 ****
  63a74b74ef6ce025798a026c2ef864ba  gcc/config/nds32/nds32.h
  5683ba48791fba79d913c4f0742a9cc6  gcc/config/nds32/nds32.md
  70126739fc43ac4b6e9ff569899872fb  gcc/config/nds32/nds32.opt
! f78aa0badf7dd1439d951eab3c0e183e  gcc/config/nds32/nds32.opt.urls
  c09acceb380f58ddb795ee3e973945d7  gcc/config/nds32/nds32_init.inc
  4e39d1b69768be76a7437a80a2039198  gcc/config/nds32/nds32_intrinsic.h
  6241ca722fb83eeb99584fbc59ab4fc6  gcc/config/nds32/nds32_isr.h
--- 4855,4861 ----
  63a74b74ef6ce025798a026c2ef864ba  gcc/config/nds32/nds32.h
  5683ba48791fba79d913c4f0742a9cc6  gcc/config/nds32/nds32.md
  70126739fc43ac4b6e9ff569899872fb  gcc/config/nds32/nds32.opt
! f83dc6414614bf080e92c0fd40154986  gcc/config/nds32/nds32.opt.urls
  c09acceb380f58ddb795ee3e973945d7  gcc/config/nds32/nds32_init.inc
  4e39d1b69768be76a7437a80a2039198  gcc/config/nds32/nds32_intrinsic.h
  6241ca722fb83eeb99584fbc59ab4fc6  gcc/config/nds32/nds32_isr.h
*************** ea47b9aaff57a2a9d2393ed60a70f379  gcc/co
*** 4932,4938 ****
  0800c027b50e3ddb0bdb4cedbcf57204  gcc/config/or1k/linux.h
  8c4edc2eb61a43fb9f67ceb977f850e1  gcc/config/or1k/or1k-opts.h
  0dc32c21bc6353a22cc723aa5e94e7c4  gcc/config/or1k/or1k-protos.h
! 2c4174f606f2c5ef251b04557a3fefd5  gcc/config/or1k/or1k.cc
  41ea77ba00a7d899c45539f070a4e223  gcc/config/or1k/or1k.h
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  db353534acb45de5e73096b05454650a  gcc/config/or1k/or1k.opt
--- 4914,4920 ----
  0800c027b50e3ddb0bdb4cedbcf57204  gcc/config/or1k/linux.h
  8c4edc2eb61a43fb9f67ceb977f850e1  gcc/config/or1k/or1k-opts.h
  0dc32c21bc6353a22cc723aa5e94e7c4  gcc/config/or1k/or1k-protos.h
! 9377f178d70af1bc66bc030a50dbe624  gcc/config/or1k/or1k.cc
  41ea77ba00a7d899c45539f070a4e223  gcc/config/or1k/or1k.h
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  db353534acb45de5e73096b05454650a  gcc/config/or1k/or1k.opt
*************** bcda2f5a4a2728d5f6bc53cbbd26f90c  gcc/co
*** 5053,5059 ****
  71bb6b628401a63410f99976d969ed4a  gcc/config/riscv/peephole.md
  16cf6e3ed290820f3a87012495b1227b  gcc/config/riscv/pic.md
  5259023ff7c1538fe8f46ddc8b9a51f2  gcc/config/riscv/pipeline-checker
! 4019c6530baa6025a49905982860eb05  gcc/config/riscv/predicates.md
  fbba4e9f3f0e00cdc072f9a3d399d0d1  gcc/config/riscv/riscv-avlprop.cc
  28bce4c8c28ba8acca9ceede4540540c  gcc/config/riscv/riscv-bclr-lowest-set-bit.cc
  7f7d3639030a4672597f5ffcc2083cd0  gcc/config/riscv/riscv-builtins.cc
--- 5035,5041 ----
  71bb6b628401a63410f99976d969ed4a  gcc/config/riscv/peephole.md
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  5259023ff7c1538fe8f46ddc8b9a51f2  gcc/config/riscv/pipeline-checker
! 7aca54a777435134e2d351b52836b2c7  gcc/config/riscv/predicates.md
  fbba4e9f3f0e00cdc072f9a3d399d0d1  gcc/config/riscv/riscv-avlprop.cc
  28bce4c8c28ba8acca9ceede4540540c  gcc/config/riscv/riscv-bclr-lowest-set-bit.cc
  7f7d3639030a4672597f5ffcc2083cd0  gcc/config/riscv/riscv-builtins.cc
*************** d0bbeee24eccae51546e551a0235140a  gcc/co
*** 5080,5086 ****
  cc1a6f4948a99d7cf0b785c01cf0a063  gcc/config/riscv/riscv-opts.h
  b8f6d36a9d7d3ef28a80c20bec990411  gcc/config/riscv/riscv-passes.def
  8fcaaf812bb193e0fad76d6b5f82f2af  gcc/config/riscv/riscv-profiles.def
! 55027df16793573c859b102a237104b2  gcc/config/riscv/riscv-protos.h
  0f5bf394cade69aeff5c57f69d880d00  gcc/config/riscv/riscv-scalar-crypto.def
  c171108cfab16c74097a841489b04298  gcc/config/riscv/riscv-selftests.cc
  41d585e61cee0deacc33bd07c93e79e2  gcc/config/riscv/riscv-shorten-memrefs.cc
--- 5062,5068 ----
  cc1a6f4948a99d7cf0b785c01cf0a063  gcc/config/riscv/riscv-opts.h
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  8fcaaf812bb193e0fad76d6b5f82f2af  gcc/config/riscv/riscv-profiles.def
! af7c5ae858fe2f10c9a63d15c8cdea40  gcc/config/riscv/riscv-protos.h
  0f5bf394cade69aeff5c57f69d880d00  gcc/config/riscv/riscv-scalar-crypto.def
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  41d585e61cee0deacc33bd07c93e79e2  gcc/config/riscv/riscv-shorten-memrefs.cc
*************** c171108cfab16c74097a841489b04298  gcc/co
*** 5088,5094 ****
  f57a4d1f0a5a49304e07ae38a6990bc8  gcc/config/riscv/riscv-string.cc
  83bc8b8b85874456078c4c683d82a3e6  gcc/config/riscv/riscv-subset.h
  da26032fa71bbdaccc0766633e3f86bb  gcc/config/riscv/riscv-target-attr.cc
! 5ed4c9c4d817b4443970bde1aa032fdf  gcc/config/riscv/riscv-v.cc
  23f9fe60c9f6f052bd55875310c01b0e  gcc/config/riscv/riscv-v.h
  3d17a86fd1ba10efb8809c613d1eb6cf  gcc/config/riscv/riscv-vect-permconst.cc
  5c3100beef34fe1879075f8cfb95e70e  gcc/config/riscv/riscv-vector-builtins-bases.cc
--- 5070,5076 ----
  f57a4d1f0a5a49304e07ae38a6990bc8  gcc/config/riscv/riscv-string.cc
  83bc8b8b85874456078c4c683d82a3e6  gcc/config/riscv/riscv-subset.h
  da26032fa71bbdaccc0766633e3f86bb  gcc/config/riscv/riscv-target-attr.cc
! d8e8e4d101990f0cda7e1e6a0b2615ad  gcc/config/riscv/riscv-v.cc
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  3d17a86fd1ba10efb8809c613d1eb6cf  gcc/config/riscv/riscv-vect-permconst.cc
  5c3100beef34fe1879075f8cfb95e70e  gcc/config/riscv/riscv-vector-builtins-bases.cc
*************** a6642c27cbc8f18cf3cab4881911ed3f  gcc/co
*** 5100,5114 ****
  8fe75d6009ec6dac9babd319503bb3f6  gcc/config/riscv/riscv-vector-builtins.cc
  6f087b25674ebed60ebd0e55c4fe30e1  gcc/config/riscv/riscv-vector-builtins.def
  b65281b3d979c9c774d30d65281a07ab  gcc/config/riscv/riscv-vector-builtins.h
! 47eaa02f26ab10731d3808c4008a9998  gcc/config/riscv/riscv-vector-costs.cc
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  4dd506c7e0c9b67fb2b6c5acdf4f44b7  gcc/config/riscv/riscv-vector-switch.def
  75866c86ec05a7abe2fa3f55828938b0  gcc/config/riscv/riscv-vsetvl.cc
  10ae51c30c9b8e6dce66f20016fae344  gcc/config/riscv/riscv-vsetvl.def
  85dee253312a7f85a1d4f8554a601105  gcc/config/riscv/riscv-zicfilp.cc
! 32864bad4d2ee6e1cf771360bfe15ae3  gcc/config/riscv/riscv.cc
  162190a7bb8bb544480bfc4ec576c934  gcc/config/riscv/riscv.h
! 6eddf4f8d9abc275ac4c8f399bfd8c4b  gcc/config/riscv/riscv.md
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  c46d0bd22d91fa2b15da3c7c1e942c5a  gcc/config/riscv/riscv.opt.urls
  fab1eef01628cdb4fc6f7a48edf3ff51  gcc/config/riscv/riscv_bitmanip.h
--- 5082,5096 ----
  8fe75d6009ec6dac9babd319503bb3f6  gcc/config/riscv/riscv-vector-builtins.cc
  6f087b25674ebed60ebd0e55c4fe30e1  gcc/config/riscv/riscv-vector-builtins.def
  b65281b3d979c9c774d30d65281a07ab  gcc/config/riscv/riscv-vector-builtins.h
! 013e38b27837342297d21ff86bd83bdf  gcc/config/riscv/riscv-vector-costs.cc
  8c1680c1bc7e171e4992d3aa9ea64d18  gcc/config/riscv/riscv-vector-costs.h
  4dd506c7e0c9b67fb2b6c5acdf4f44b7  gcc/config/riscv/riscv-vector-switch.def
  75866c86ec05a7abe2fa3f55828938b0  gcc/config/riscv/riscv-vsetvl.cc
  10ae51c30c9b8e6dce66f20016fae344  gcc/config/riscv/riscv-vsetvl.def
  85dee253312a7f85a1d4f8554a601105  gcc/config/riscv/riscv-zicfilp.cc
! 3ac3401805cce0eda84d0b4f10f48218  gcc/config/riscv/riscv.cc
  162190a7bb8bb544480bfc4ec576c934  gcc/config/riscv/riscv.h
! 00a13f090d9eac7b32611a8e51fe6692  gcc/config/riscv/riscv.md
  e308091c87a21c63c81c369a708bc67b  gcc/config/riscv/riscv.opt
  c46d0bd22d91fa2b15da3c7c1e942c5a  gcc/config/riscv/riscv.opt.urls
  fab1eef01628cdb4fc6f7a48edf3ff51  gcc/config/riscv/riscv_bitmanip.h
*************** fe202105dd9e81b9ce8fdcc11d52c294  gcc/co
*** 5138,5151 ****
  0478f4e79601d91fb8ad8f210b304a7b  gcc/config/riscv/t-withmultilib-generator
  457bc4a582b0b8d80c60ee135931f5c8  gcc/config/riscv/thead-peephole.md
  325f22596295559607b476e5a2a4d491  gcc/config/riscv/thead-vector-builtins-functions.def
! bcf728ad2379630774fd5bb529d4ee86  gcc/config/riscv/thead-vector.md
  bc9e0f6e45851cb27855fbd19172bf5e  gcc/config/riscv/thead.cc
  03801432922f48ba0343aa17544bdba7  gcc/config/riscv/thead.md
  a95321fbec5a4da32a9ee8145b8b0c6d  gcc/config/riscv/tt-ascalon-d8.md
  dcbac9d3c6831ff1cd18effca9c7bb28  gcc/config/riscv/vector-bfloat16.md
  1efc7e76b1f8a6c41de01fba7e0d33b9  gcc/config/riscv/vector-crypto.md
  604805ea8530b1a6391150e8388a63fb  gcc/config/riscv/vector-iterators.md
! 9602776b7d6d61285df5eaa5f40f4b53  gcc/config/riscv/vector.md
  18d213c106fe52eebc74017d5ff892ce  gcc/config/riscv/xiangshan.md
  39ba96197510d4ac114a827d7ffbf806  gcc/config/riscv/zc.md
  a4add97cfb1c6c831a14ef470fc57915  gcc/config/riscv/zicond.md
--- 5120,5133 ----
  0478f4e79601d91fb8ad8f210b304a7b  gcc/config/riscv/t-withmultilib-generator
  457bc4a582b0b8d80c60ee135931f5c8  gcc/config/riscv/thead-peephole.md
  325f22596295559607b476e5a2a4d491  gcc/config/riscv/thead-vector-builtins-functions.def
! 20d5b4bb0f3ffe345d7963dae027c447  gcc/config/riscv/thead-vector.md
  bc9e0f6e45851cb27855fbd19172bf5e  gcc/config/riscv/thead.cc
  03801432922f48ba0343aa17544bdba7  gcc/config/riscv/thead.md
  a95321fbec5a4da32a9ee8145b8b0c6d  gcc/config/riscv/tt-ascalon-d8.md
  dcbac9d3c6831ff1cd18effca9c7bb28  gcc/config/riscv/vector-bfloat16.md
  1efc7e76b1f8a6c41de01fba7e0d33b9  gcc/config/riscv/vector-crypto.md
  604805ea8530b1a6391150e8388a63fb  gcc/config/riscv/vector-iterators.md
! 9da46a6ebcde869935ad8f8549accf3e  gcc/config/riscv/vector.md
  18d213c106fe52eebc74017d5ff892ce  gcc/config/riscv/xiangshan.md
  39ba96197510d4ac114a827d7ffbf806  gcc/config/riscv/zc.md
  a4add97cfb1c6c831a14ef470fc57915  gcc/config/riscv/zicond.md
*************** cf5e812e9a79fb52359bbbe481b92261  gcc/co
*** 5161,5167 ****
  619dc6299815cdf10ebe571a1e57eafe  gcc/config/rl78/rl78.h
  ebbceacded87efe37fb6bbc894f7f0d5  gcc/config/rl78/rl78.md
  7549cde2462d8ce47201e563f43f72a6  gcc/config/rl78/rl78.opt
! 627f7814959fdb52d10a7da79edccf25  gcc/config/rl78/rl78.opt.urls
  5c258b0f94ee73e8ae71fa8dd144ab24  gcc/config/rl78/t-rl78
  abc0cdce92f661e664fc8de0c36c56dc  gcc/config/rpath.opt
  1ba216c6712cc1a82121154d5193a339  gcc/config/rpath.opt.urls
--- 5143,5149 ----
  619dc6299815cdf10ebe571a1e57eafe  gcc/config/rl78/rl78.h
  ebbceacded87efe37fb6bbc894f7f0d5  gcc/config/rl78/rl78.md
  7549cde2462d8ce47201e563f43f72a6  gcc/config/rl78/rl78.opt
! 35cab4e64e2e34381938e85a24bae2f3  gcc/config/rl78/rl78.opt.urls
  5c258b0f94ee73e8ae71fa8dd144ab24  gcc/config/rl78/t-rl78
  abc0cdce92f661e664fc8de0c36c56dc  gcc/config/rpath.opt
  1ba216c6712cc1a82121154d5193a339  gcc/config/rpath.opt.urls
*************** a8b1f3ddfb1f6f99004ac2db6cd9dc74  gcc/co
*** 5182,5190 ****
  d0faac423dbdf9cf30ccf83ac9d2e60d  gcc/config/rs6000/aix.h
  1fceb97e97a40dc3014fd5d2a8ab5d07  gcc/config/rs6000/aix64.opt
  d70f08b893e019d12b16dc9a70754ef9  gcc/config/rs6000/aix64.opt.urls
! 7a458de4c2e17a9a5c5b134cd5307283  gcc/config/rs6000/aix71.h
! 20f4005e48ef1b44aaa1abcda010edb0  gcc/config/rs6000/aix72.h
! f6a351fafc8d9c1ddd46b271f0c859c9  gcc/config/rs6000/aix73.h
  ae4bd752599ffdd2833c6e78d03d39f0  gcc/config/rs6000/altivec.h
  f03bdef1224a610cfb7130f3c687b87f  gcc/config/rs6000/altivec.md
  059307efbb31814d946437a40ade09c1  gcc/config/rs6000/amo.h
--- 5164,5172 ----
  d0faac423dbdf9cf30ccf83ac9d2e60d  gcc/config/rs6000/aix.h
  1fceb97e97a40dc3014fd5d2a8ab5d07  gcc/config/rs6000/aix64.opt
  d70f08b893e019d12b16dc9a70754ef9  gcc/config/rs6000/aix64.opt.urls
! 48e2c945bd49f48743765c272b092dc6  gcc/config/rs6000/aix71.h
! efc4d9cc6fcf24af7ea6e89c0c82127f  gcc/config/rs6000/aix72.h
! 1d313bdc511e984bdf559d61807bde14  gcc/config/rs6000/aix73.h
  ae4bd752599ffdd2833c6e78d03d39f0  gcc/config/rs6000/altivec.h
  f03bdef1224a610cfb7130f3c687b87f  gcc/config/rs6000/altivec.md
  059307efbb31814d946437a40ade09c1  gcc/config/rs6000/amo.h
*************** f83fd3bf0d9fbc30c9401eec549fdc2c  gcc/co
*** 5193,5199 ****
  161814e9f6f10782769302881ac26227  gcc/config/rs6000/bmiintrin.h
  ee17a95e2411ef6ef4f1588d17e2cf66  gcc/config/rs6000/cell.md
  837f16df42ea04e41a4450e7f9ebe42a  gcc/config/rs6000/constraints.md
! abeb41de7dfa216c254877ecd48052f1  gcc/config/rs6000/crypto.md
  841aa28da573ce031fe43ae0fb24bfd9  gcc/config/rs6000/darwin.h
  8c9c110a4faa8e47a4c4caef834d7c1d  gcc/config/rs6000/darwin.md
  8ef5306087b5e728b308cf63664b051d  gcc/config/rs6000/darwin.opt
--- 5175,5181 ----
  161814e9f6f10782769302881ac26227  gcc/config/rs6000/bmiintrin.h
  ee17a95e2411ef6ef4f1588d17e2cf66  gcc/config/rs6000/cell.md
  837f16df42ea04e41a4450e7f9ebe42a  gcc/config/rs6000/constraints.md
! 9dfea0dab8f972986488db93eb23fab1  gcc/config/rs6000/crypto.md
  841aa28da573ce031fe43ae0fb24bfd9  gcc/config/rs6000/darwin.h
  8c9c110a4faa8e47a4c4caef834d7c1d  gcc/config/rs6000/darwin.md
  8ef5306087b5e728b308cf63664b051d  gcc/config/rs6000/darwin.opt
*************** db237fc1717a4075e7b9480205a32fd5  gcc/co
*** 5253,5283 ****
  25ea383c1f398321c28d21896c9d79db  gcc/config/rs6000/predicates.md
  63ccc96ff2cef948c080eac4455d02b1  gcc/config/rs6000/rbtree.cc
  8ece9ca8167f5056fa411488a97c6131  gcc/config/rs6000/rbtree.h
! 9be252ce87cecf1829cb579ecd696303  gcc/config/rs6000/rs6000-builtin.cc
! 5f55438b54e629713ba06eeb9a75bd37  gcc/config/rs6000/rs6000-builtins.def
! 001c1335a8df0c0d4f9feb001d488885  gcc/config/rs6000/rs6000-c.cc
  c97babd518212b16f2837b9b1d5d8359  gcc/config/rs6000/rs6000-call.cc
! 094faf83d43883def20529728178ccb0  gcc/config/rs6000/rs6000-cpus.def
  7b860836fdc33cdfdd29f6348a553096  gcc/config/rs6000/rs6000-d.cc
  1ac6ae1e7d6d83d76667769f7166b9a7  gcc/config/rs6000/rs6000-d.h
! 49cf5c100ee20edb22f4390541532f68  gcc/config/rs6000/rs6000-gen-builtins.cc
  c165dfc83b2c9e75d3906f429e76a3fa  gcc/config/rs6000/rs6000-internal.h
  68da03c0d0c1dfafebf4ba706e6d3ff9  gcc/config/rs6000/rs6000-linux.cc
  4768cacdca0b901f6cb649726cca5eeb  gcc/config/rs6000/rs6000-logue.cc
  108998dcf0201ccd3e147d71251ca9f6  gcc/config/rs6000/rs6000-modes.def
! e8a3118f8f5a2aa7f988ed45bae99eeb  gcc/config/rs6000/rs6000-opts.h
! fab9961e9c2dca827c0ac5e7b100d398  gcc/config/rs6000/rs6000-overload.def
  dc46fa102175551da2f4ce2ee5c6435c  gcc/config/rs6000/rs6000-p8swap.cc
  da37007432adac35e44d7592e307e64a  gcc/config/rs6000/rs6000-passes.def
  384645a6c72587ac7501915a0c737e64  gcc/config/rs6000/rs6000-pcrel-opt.cc
  d3a1c98fd13be04e1250b073cb8dcef2  gcc/config/rs6000/rs6000-protos.h
  9e39e759376eb97f2a56ebfc28c8d149  gcc/config/rs6000/rs6000-string.cc
! 505106a6c6516140530fe5f55a87e44e  gcc/config/rs6000/rs6000-tables.opt
  ce8de9a27f36b759a69194616c02eb38  gcc/config/rs6000/rs6000-tables.opt.urls
! bcf781e9687d0164eeab8e20a7ed9eb7  gcc/config/rs6000/rs6000.cc
! 838ab0dea9bee1b30cbf4cb875917f74  gcc/config/rs6000/rs6000.h
  a575dd5c5592c7d23a9b53b985c01120  gcc/config/rs6000/rs6000.md
! fc53ceb489fffb4124155c557c54157f  gcc/config/rs6000/rs6000.opt
  80708ca71755b0d8d354f113f0617617  gcc/config/rs6000/rs6000.opt.urls
  89d4cadf8216efa86b72204e660cc4b0  gcc/config/rs6000/rs64.md
  d57d0eb0a8e2193f5cef2aaf1ad6d722  gcc/config/rs6000/rtems.h
--- 5235,5265 ----
  25ea383c1f398321c28d21896c9d79db  gcc/config/rs6000/predicates.md
  63ccc96ff2cef948c080eac4455d02b1  gcc/config/rs6000/rbtree.cc
  8ece9ca8167f5056fa411488a97c6131  gcc/config/rs6000/rbtree.h
! 63d5e60d2087274a3edb3f6b7b726b0a  gcc/config/rs6000/rs6000-builtin.cc
! f036412353f68a4e76f55c35b8f3e4ee  gcc/config/rs6000/rs6000-builtins.def
! 15e52baa355b0c3b725c3e6e55524af0  gcc/config/rs6000/rs6000-c.cc
  c97babd518212b16f2837b9b1d5d8359  gcc/config/rs6000/rs6000-call.cc
! 4579aba833c122ad0e6a91b573653e2c  gcc/config/rs6000/rs6000-cpus.def
  7b860836fdc33cdfdd29f6348a553096  gcc/config/rs6000/rs6000-d.cc
  1ac6ae1e7d6d83d76667769f7166b9a7  gcc/config/rs6000/rs6000-d.h
! 19cf935ce7de136fe7ef1a4a6350f541  gcc/config/rs6000/rs6000-gen-builtins.cc
  c165dfc83b2c9e75d3906f429e76a3fa  gcc/config/rs6000/rs6000-internal.h
  68da03c0d0c1dfafebf4ba706e6d3ff9  gcc/config/rs6000/rs6000-linux.cc
  4768cacdca0b901f6cb649726cca5eeb  gcc/config/rs6000/rs6000-logue.cc
  108998dcf0201ccd3e147d71251ca9f6  gcc/config/rs6000/rs6000-modes.def
! e6f2820356a7ee18c353376ab3490fb6  gcc/config/rs6000/rs6000-opts.h
! de7c129a7b61a7dbc765b98ee8e58df3  gcc/config/rs6000/rs6000-overload.def
  dc46fa102175551da2f4ce2ee5c6435c  gcc/config/rs6000/rs6000-p8swap.cc
  da37007432adac35e44d7592e307e64a  gcc/config/rs6000/rs6000-passes.def
  384645a6c72587ac7501915a0c737e64  gcc/config/rs6000/rs6000-pcrel-opt.cc
  d3a1c98fd13be04e1250b073cb8dcef2  gcc/config/rs6000/rs6000-protos.h
  9e39e759376eb97f2a56ebfc28c8d149  gcc/config/rs6000/rs6000-string.cc
! 835f22c956cc4deb83970ee9a9b5b79b  gcc/config/rs6000/rs6000-tables.opt
  ce8de9a27f36b759a69194616c02eb38  gcc/config/rs6000/rs6000-tables.opt.urls
! 4e95fc675ae78a931fed1e8424322497  gcc/config/rs6000/rs6000.cc
! 1fe32d82d416dcd84f66e1535442f5be  gcc/config/rs6000/rs6000.h
  a575dd5c5592c7d23a9b53b985c01120  gcc/config/rs6000/rs6000.md
! e407423336f12658b509205c3e8f7130  gcc/config/rs6000/rs6000.opt
  80708ca71755b0d8d354f113f0617617  gcc/config/rs6000/rs6000.opt.urls
  89d4cadf8216efa86b72204e660cc4b0  gcc/config/rs6000/rs64.md
  d57d0eb0a8e2193f5cef2aaf1ad6d722  gcc/config/rs6000/rtems.h
*************** b1a1f1ea8636fe96381989b926619397  gcc/co
*** 5288,5294 ****
  0955c6a2d639cf6eaade88aa538b81b8  gcc/config/rs6000/sync.md
  e8c76038df323d77e90f69c78138b1fd  gcc/config/rs6000/sysv4.h
  e51499a69ac94adadb730c6c5491b97d  gcc/config/rs6000/sysv4.opt
! b1ed936b1a3e7303c34f1e54ec933230  gcc/config/rs6000/sysv4.opt.urls
  70c9ce454104e71a94ca85d02060e59c  gcc/config/rs6000/sysv4le.h
  38641efeb21dd097d73b2d9208aefb09  gcc/config/rs6000/t-aix52
  889ba001a8d4b18df30d57995b9a1e9e  gcc/config/rs6000/t-aix64
--- 5270,5276 ----
  0955c6a2d639cf6eaade88aa538b81b8  gcc/config/rs6000/sync.md
  e8c76038df323d77e90f69c78138b1fd  gcc/config/rs6000/sysv4.h
  e51499a69ac94adadb730c6c5491b97d  gcc/config/rs6000/sysv4.opt
! 0ca73e6f14270f4ed0893f866e64b36f  gcc/config/rs6000/sysv4.opt.urls
  70c9ce454104e71a94ca85d02060e59c  gcc/config/rs6000/sysv4le.h
  38641efeb21dd097d73b2d9208aefb09  gcc/config/rs6000/t-aix52
  889ba001a8d4b18df30d57995b9a1e9e  gcc/config/rs6000/t-aix64
*************** e37cfdac5f4b92aac6cd0fbfbb97bd8f  gcc/co
*** 5334,5340 ****
  63d27d06289d5f9814baae9a6feaa996  gcc/config/rtems.opt.urls
  f67f80a8f1bd3161efb391f094501313  gcc/config/rx/constraints.md
  4616a7d31fd4d03afbea82ed634db44a  gcc/config/rx/elf.opt
! 495c9b539f4b3f5645b59d1084a92957  gcc/config/rx/elf.opt.urls
  84ae77475029b49553276e3d7ed74cec  gcc/config/rx/linux.h
  be88b902c0fc07fc260a843e527ad245  gcc/config/rx/predicates.md
  59ddeb68971245eee8a59e9be4929548  gcc/config/rx/rx-modes.def
--- 5316,5322 ----
  63d27d06289d5f9814baae9a6feaa996  gcc/config/rtems.opt.urls
  f67f80a8f1bd3161efb391f094501313  gcc/config/rx/constraints.md
  4616a7d31fd4d03afbea82ed634db44a  gcc/config/rx/elf.opt
! c44b381242fc679206eebe3588894489  gcc/config/rx/elf.opt.urls
  84ae77475029b49553276e3d7ed74cec  gcc/config/rx/linux.h
  be88b902c0fc07fc260a843e527ad245  gcc/config/rx/predicates.md
  59ddeb68971245eee8a59e9be4929548  gcc/config/rx/rx-modes.def
*************** c7cc18c3c6e80f769c4e27296c120108  gcc/co
*** 5342,5348 ****
  cc1176df362777967ec78fe3d96e72a2  gcc/config/rx/rx-protos.h
  ae726748d180fff39a94bdf7ef28615d  gcc/config/rx/rx.cc
  a941959b1d010160d6e46cb0c0688ad7  gcc/config/rx/rx.h
! af202939e77f64a897608f3ee32327c4  gcc/config/rx/rx.md
  0329c06217618ce2a83cd6bbd4458da8  gcc/config/rx/rx.opt
  1823f8ae7b80bcaf2f3428c53ab91c64  gcc/config/rx/rx.opt.urls
  032cf36abc28f171fc24229e32796402  gcc/config/rx/t-linux
--- 5324,5330 ----
  cc1176df362777967ec78fe3d96e72a2  gcc/config/rx/rx-protos.h
  ae726748d180fff39a94bdf7ef28615d  gcc/config/rx/rx.cc
  a941959b1d010160d6e46cb0c0688ad7  gcc/config/rx/rx.h
! bfac0e2363492daf4865c134ee21f8e1  gcc/config/rx/rx.md
  0329c06217618ce2a83cd6bbd4458da8  gcc/config/rx/rx.opt
  1823f8ae7b80bcaf2f3428c53ab91c64  gcc/config/rx/rx.opt.urls
  032cf36abc28f171fc24229e32796402  gcc/config/rx/t-linux
*************** e8e8e9d9ac77a373e64a4713263b87e2  gcc/co
*** 5508,5514 ****
  abde77f75ec4cefb2f0eb3d2c6cf77b7  gcc/config/stormy16/stormy16.h
  bbad5b8a70d79255de83d544195f0790  gcc/config/stormy16/stormy16.md
  51840716cdce43e88ec11c16eb350360  gcc/config/stormy16/stormy16.opt
! 83f5016198e7f4905149f32898b70e29  gcc/config/stormy16/stormy16.opt.urls
  d19ed9ef1a788e81cff50106a06c6236  gcc/config/t-darwin
  5e2dc1428bcfb476145dd18ff2a20a23  gcc/config/t-dragonfly
  9bfd1e245845b2e6709d295356d9cb05  gcc/config/t-freebsd
--- 5490,5496 ----
  abde77f75ec4cefb2f0eb3d2c6cf77b7  gcc/config/stormy16/stormy16.h
  bbad5b8a70d79255de83d544195f0790  gcc/config/stormy16/stormy16.md
  51840716cdce43e88ec11c16eb350360  gcc/config/stormy16/stormy16.opt
! 3b06e944684cb824207e1faf024180ae  gcc/config/stormy16/stormy16.opt.urls
  d19ed9ef1a788e81cff50106a06c6236  gcc/config/t-darwin
  5e2dc1428bcfb476145dd18ff2a20a23  gcc/config/t-dragonfly
  9bfd1e245845b2e6709d295356d9cb05  gcc/config/t-freebsd
*************** f8a0009eac88f5ab515601ae54b55cb1  gcc/co
*** 5574,5580 ****
  328d4024b64b9a4b2f4203f0f80e02b6  gcc/config/visium/visium.h
  104eb550ddf9cc976851bd4d1e3e9d7d  gcc/config/visium/visium.md
  3cff36cc3705e28c0fe358569d10ed56  gcc/config/visium/visium.opt
! 7a0d924f742d55d1f16c844de561f075  gcc/config/visium/visium.opt.urls
  aa7aaadd68d34888760a4211e46f08aa  gcc/config/vms/make-crtlmap.awk
  45d0e4dd9c352329976ea74a927e1147  gcc/config/vms/t-vms
  d1ca39da669836b595db0004d8645cd8  gcc/config/vms/t-vmsnative
--- 5556,5562 ----
  328d4024b64b9a4b2f4203f0f80e02b6  gcc/config/visium/visium.h
  104eb550ddf9cc976851bd4d1e3e9d7d  gcc/config/visium/visium.md
  3cff36cc3705e28c0fe358569d10ed56  gcc/config/visium/visium.opt
! d308974ee76c98f9c1e01fa5de9567c8  gcc/config/visium/visium.opt.urls
  aa7aaadd68d34888760a4211e46f08aa  gcc/config/vms/make-crtlmap.awk
  45d0e4dd9c352329976ea74a927e1147  gcc/config/vms/t-vms
  d1ca39da669836b595db0004d8645cd8  gcc/config/vms/t-vmsnative
*************** dbd5811fcd8a1caf49e4e9091afdc18c  gcc/co
*** 5637,5650 ****
  6ffda24346906b56c23b732dee11ec56  gcc/config/xtensa/xtensa-dynconfig.cc
  9a9ea234526c2b6ec2dde5659d16935c  gcc/config/xtensa/xtensa-opts.h
  f11b25bf61cd607f1829b2d5c5d306b9  gcc/config/xtensa/xtensa-passes.def
! a071a2118672dd214a5b6970d7c3faca  gcc/config/xtensa/xtensa-protos.h
! 5b49fab80bf7b8a969d748d0d56ef024  gcc/config/xtensa/xtensa.cc
! c60f07bed189e2a8fb8abfe19368e9f9  gcc/config/xtensa/xtensa.h
! 708d79fd2376cbc3e1fc949938300b92  gcc/config/xtensa/xtensa.md
! 093588e637649f5260b04ad13fe609e6  gcc/config/xtensa/xtensa.opt
! db57d7603312357e8c0cfb21c32353d1  gcc/config/xtensa/xtensa.opt.urls
! e1391735dd812eb888bfd74169f187f8  gcc/configure
! 471cc166017acb3a6cb505699255eaf4  gcc/configure.ac
  a2bfe87830136c2d55b591b943cecd3f  gcc/configure.tgt
  8a46839a73059f70ef105be9706c2554  gcc/context.cc
  08023c1005def168a8b675813b95d9f4  gcc/context.h
--- 5619,5632 ----
  6ffda24346906b56c23b732dee11ec56  gcc/config/xtensa/xtensa-dynconfig.cc
  9a9ea234526c2b6ec2dde5659d16935c  gcc/config/xtensa/xtensa-opts.h
  f11b25bf61cd607f1829b2d5c5d306b9  gcc/config/xtensa/xtensa-passes.def
! eabefa7848e30cb14ae3473ccb4f1c5e  gcc/config/xtensa/xtensa-protos.h
! f63f42f74fb67364359dc3dd9374625b  gcc/config/xtensa/xtensa.cc
! f4bcf6f51210e6c25d738abf93218402  gcc/config/xtensa/xtensa.h
! 52f26b165e1fe62791b88ba6e211d921  gcc/config/xtensa/xtensa.md
! 411cab921f0a965cbb5411dc8b28fc82  gcc/config/xtensa/xtensa.opt
! 107b37908c9eb8a26c5b7a6074ccb338  gcc/config/xtensa/xtensa.opt.urls
! 612b6d4a423173c62f062b12e25e8d8d  gcc/configure
! c4eb64229a10814981976bab423552cf  gcc/configure.ac
  a2bfe87830136c2d55b591b943cecd3f  gcc/configure.tgt
  8a46839a73059f70ef105be9706c2554  gcc/context.cc
  08023c1005def168a8b675813b95d9f4  gcc/context.h
*************** c5ad0142a191862e3e81ecd3573754b3  gcc/co
*** 5655,5661 ****
  55a33ae415bde0fd2e36ba584894e50b  gcc/coroutine-passes.cc
  c10700723a41c720aada0096f369147e  gcc/coverage.cc
  d27317cee558d7c78afbdb6529e36649  gcc/coverage.h
! c78b51dbbf8e58fe55d3bbcb21cbcd85  gcc/cp/ChangeLog
  70c059f2b75a2fc1bb95a526b21b8cd7  gcc/cp/ChangeLog-1993
  7cbd106e10a0ba7c052bee3fe20671c2  gcc/cp/ChangeLog-1994
  3b1e3ed23ad4363f75e6fd2fbb583dee  gcc/cp/ChangeLog-1995
--- 5637,5643 ----
  55a33ae415bde0fd2e36ba584894e50b  gcc/coroutine-passes.cc
  c10700723a41c720aada0096f369147e  gcc/coverage.cc
  d27317cee558d7c78afbdb6529e36649  gcc/coverage.h
! 4e302cc4882e42128fc8a3574507d999  gcc/cp/ChangeLog
  70c059f2b75a2fc1bb95a526b21b8cd7  gcc/cp/ChangeLog-1993
  7cbd106e10a0ba7c052bee3fe20671c2  gcc/cp/ChangeLog-1994
  3b1e3ed23ad4363f75e6fd2fbb583dee  gcc/cp/ChangeLog-1995
*************** d9b8a76735523ab737e8778b90397d97  gcc/cp
*** 5695,5726 ****
  689c8a6810ac9e15b64d4e745bda0f11  gcc/cp/call.cc
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! ef390f51aadfa8852dd3cbc4e973fbf5  gcc/cp/constexpr.cc
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  ab81cc984e2b72c49098e64c4e798924  gcc/cp/contracts.cc
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! e149e170a1e39253c161848d0dde21f9  gcc/cp/cp-gimplify.cc
  5deb6a9935508ca534b8ee8e84b2a1cc  gcc/cp/cp-lang.cc
  1a3e309babdfdd0ff5e03d09e6b5870d  gcc/cp/cp-name-hint.h
  eba8d8a1725223519fba5d4d69afd5c9  gcc/cp/cp-objcp-common.cc
  a2555a7340b152d673783c07a3d102bb  gcc/cp/cp-objcp-common.h
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! 11c8ff75b7a7468329e25642c0bf42e2  gcc/cp/cp-tree.h
  e2854dfa428fab45fc41bf58fef71e61  gcc/cp/cp-ubsan.cc
  0f660920514d4f51007f6841a25e3af6  gcc/cp/cvt.cc
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  1d04eec9859d91686ca501e9221f30ac  gcc/cp/cxx-pretty-print.h
  82a41d873e1c90067158c89e6c1bd4bb  gcc/cp/cxxapi-data.csv
! e8dc9b4b4d33f02046bf771caeb812a3  gcc/cp/decl.cc
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  12ccd5244973d74a0536adf58261b416  gcc/cp/dump.cc
! dea70e86e803da1ef437f6bf7c69cbae  gcc/cp/error.cc
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  70f36ac126d5a18ee7be5d40cf58c2c9  gcc/cp/expr.cc
  447ddbe59eba62b9a389b9ba11701cfc  gcc/cp/friend.cc
--- 5677,5708 ----
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  144dd1ae510a7436b569b007470b62da  gcc/cp/cfns.gperf
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! c4bf6272ee9cceeb6e34829ccb897c20  gcc/cp/class.cc
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  ab81cc984e2b72c49098e64c4e798924  gcc/cp/contracts.cc
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! b272581f7dd151ffe535478341d8cd91  gcc/cp/cp-gimplify.cc
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  eba8d8a1725223519fba5d4d69afd5c9  gcc/cp/cp-objcp-common.cc
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! 9f97170340cbac11d02d481cd543f37f  gcc/cp/cp-tree.h
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  0f660920514d4f51007f6841a25e3af6  gcc/cp/cvt.cc
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  82a41d873e1c90067158c89e6c1bd4bb  gcc/cp/cxxapi-data.csv
! 9d3aede451ced654aa6bf5edddd3a400  gcc/cp/decl.cc
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! b5df3f92afac840c412b1bddf76291d5  gcc/cp/error.cc
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  447ddbe59eba62b9a389b9ba11701cfc  gcc/cp/friend.cc
*************** b9032a113a137533247a90fda508e897  gcc/cp
*** 5731,5759 ****
  bc388fb8287f2de7cdf4d78eb8f5d998  gcc/cp/lang-specs.h
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! 6d1dfdccbfbfe5467a281664d8fbe792  gcc/cp/mangle.cc
  3d68343c4a9d614bb00b91ad53e79a0b  gcc/cp/mapper-client.cc
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  4be7487ea09330ba02fb0695bc32c905  gcc/cp/mapper-resolver.cc
  54609938d396496c7c5bf3f4cbfddaec  gcc/cp/metafns.gperf
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! 809c31a95f95b6a5fcbc3fb34af9ffa7  gcc/cp/module.cc
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! bf752a5323d349f10a0246685a3a2ccf  gcc/cp/parser.cc
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! c2d54685cdefc44b581f2d90592009ab  gcc/cp/semantics.cc
  64c36b2ea66c9f8f477b19d24e06a2cb  gcc/cp/std-name-hint.gperf
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! eda38042dc821a8664987e661d7e102e  gcc/cp/tree.cc
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  40eb09924b1139e6f7994869420c0c98  gcc/cp/typeck2.cc
--- 5713,5741 ----
  bc388fb8287f2de7cdf4d78eb8f5d998  gcc/cp/lang-specs.h
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! f97f062dd7f7951d852c55a777650ccf  gcc/cp/tree.cc
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  40eb09924b1139e6f7994869420c0c98  gcc/cp/typeck2.cc
*************** fe61b2918e14694ac3e0e909cacea80f  gcc/cu
*** 5778,5784 ****
  86700ca4710faebe1a0dbd2da6bcc75d  gcc/custom-sarif-properties/digraphs.h
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! 88c801ab9fb8db3ace7abad5d3b9e3f4  gcc/d/ChangeLog
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--- 5760,5766 ----
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! dc7957587cfd1b6c8539dfc9df1f9c67  gcc/d/ChangeLog
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*************** a84c5c8dc5dd34c74b6c874a99718559  gcc/d/
*** 6026,6033 ****
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! 97d491fba0dd57fe8e4fb67f2c7f8b88  gcc/data-streamer-in.cc
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  63245724941a35dfab045b09f88d3ab4  gcc/data-streamer.cc
  3f7ee49cd1f2d78f1b902b28ea5ced9d  gcc/data-streamer.h
--- 6008,6015 ----
  c91433fbbe79c3e110e263ab981dea5e  gcc/d/runtime.def
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! a0901b0b96f3f275898ecc131f2585f5  gcc/d/types.cc
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  3f7ee49cd1f2d78f1b902b28ea5ced9d  gcc/data-streamer.h
*************** c1ba108db39c2659b939d1a8a6cba51d  gcc/di
*** 6122,6128 ****
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  80cd25171e4056b26c59c89d93ca6249  gcc/diagnostics/url.h
! b5e210d1bf47aa0c5045d643c69881e0  gcc/digraph.cc
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--- 6104,6110 ----
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! 0956a36149562ea551a09ab40c4ebe4b  gcc/digraph.cc
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*************** ee65c9e3e7c3fb1fd0128c23f4130e51  gcc/do
*** 6140,6146 ****
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--- 6122,6128 ----
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*************** aa98c00cad5e7ccb99b898a166288d0c  gcc/do
*** 6150,6156 ****
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--- 6132,6138 ----
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*************** bde53a0a190c3a74b047eb2b53c080eb  gcc/do
*** 6163,6171 ****
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--- 6145,6153 ----
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*************** c2fc9f8e6a1cb39a7237e4ac3d7fcd7f  gcc/do
*** 6203,6209 ****
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--- 6185,6191 ----
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*************** b12261ad56bcabd07b4a1b739f271527  gcc/do
*** 6220,6227 ****
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--- 6202,6209 ----
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  d2b53a62ec4e23a8e4cbe16d2843c100  gcc/doc/standards.texi
! df84a270262b90da99a37aaae35fa93c  gcc/doc/tm.texi
! 9256770f69b0875fed973b94ec0a8d53  gcc/doc/tm.texi.in
  61e80fc645225b20d6a7d34c7e7a404b  gcc/doc/tree-ssa.texi
  2d263928ebdba30d4e096adf01758e79  gcc/doc/trouble.texi
  83ea8ece47a3447f8da5fddd982c9d29  gcc/doc/ux.texi
*************** f27465a07748d0f8d8813d3107b5680c  gcc/et
*** 6257,6265 ****
  e927ed115966aaba96ebbcd19b6acefd  gcc/except.cc
  d61f76c4b55102abe0d6908ab60489e7  gcc/except.h
  2af24b814afb179d911a33733d593eba  gcc/exec-tool.in
! e3b758ef604b48f000fb865e38253381  gcc/explow.cc
  9542db78094e70fd18442ce8a2b02264  gcc/explow.h
! 82a6eed405414fee082896bb6a2bd1c6  gcc/expmed.cc
  2431f17e1f416ef0b9c38b1b975942a4  gcc/expmed.h
  eb75df114e69863f6370174248bbfadd  gcc/expr.cc
  54b30ae6372ded76e375ade2621552a1  gcc/expr.h
--- 6239,6247 ----
  e927ed115966aaba96ebbcd19b6acefd  gcc/except.cc
  d61f76c4b55102abe0d6908ab60489e7  gcc/except.h
  2af24b814afb179d911a33733d593eba  gcc/exec-tool.in
! 51d883e2e3efe392cb427420abbe95cc  gcc/explow.cc
  9542db78094e70fd18442ce8a2b02264  gcc/explow.h
! a1086b579ca0cf41bca92db8032dd9b7  gcc/expmed.cc
  2431f17e1f416ef0b9c38b1b975942a4  gcc/expmed.h
  eb75df114e69863f6370174248bbfadd  gcc/expr.cc
  54b30ae6372ded76e375ade2621552a1  gcc/expr.h
*************** e0210f6d49bd9ceab84ba5169fbcfc99  gcc/fi
*** 6270,6276 ****
  f80b38c70a85f9aeae9688b937b028ba  gcc/file-find.h
  9ca41121de6a799cd4d23363ea1c9b0c  gcc/file-prefix-map.cc
  5e60fafc10687b7792c492e27473ed4d  gcc/file-prefix-map.h
! 8c0b2a616de40bb6e8e1b06b0e90c702  gcc/final.cc
  3f5e6ac132421f17c9c8232626731e46  gcc/fixed-value.cc
  1caa253d024b0e3dcf3e6ba5ca8eeab1  gcc/fixed-value.h
  57d536e4a123ac5161bf8eae17154030  gcc/flag-types.h
--- 6252,6258 ----
  f80b38c70a85f9aeae9688b937b028ba  gcc/file-find.h
  9ca41121de6a799cd4d23363ea1c9b0c  gcc/file-prefix-map.cc
  5e60fafc10687b7792c492e27473ed4d  gcc/file-prefix-map.h
! b4a18c8d0dacb99b95b772e94f976754  gcc/final.cc
  3f5e6ac132421f17c9c8232626731e46  gcc/fixed-value.cc
  1caa253d024b0e3dcf3e6ba5ca8eeab1  gcc/fixed-value.h
  57d536e4a123ac5161bf8eae17154030  gcc/flag-types.h
*************** f80b38c70a85f9aeae9688b937b028ba  gcc/fi
*** 6280,6286 ****
  50b999b375e3a5a95a002f592e6d4514  gcc/fold-const.cc
  0ec02a37dbbe9cb267f0ea1263085ed3  gcc/fold-const.h
  503251519661f1768b70d9b424bdc12b  gcc/fold-mem-offsets.cc
! b4acf33ed004d3c2674d2bf8eb5b178a  gcc/fortran/ChangeLog
  083c53fadafdcf3be46713838a51e36c  gcc/fortran/ChangeLog-2002
  2a4ca18d211fb2603139354fd16398ed  gcc/fortran/ChangeLog-2003
  e7462609ebd0dd7c874e0fc00e2833aa  gcc/fortran/ChangeLog-2004
--- 6262,6268 ----
  50b999b375e3a5a95a002f592e6d4514  gcc/fold-const.cc
  0ec02a37dbbe9cb267f0ea1263085ed3  gcc/fold-const.h
  503251519661f1768b70d9b424bdc12b  gcc/fold-mem-offsets.cc
! e5d246d2ac5446d5a4597fad662f330f  gcc/fortran/ChangeLog
  083c53fadafdcf3be46713838a51e36c  gcc/fortran/ChangeLog-2002
  2a4ca18d211fb2603139354fd16398ed  gcc/fortran/ChangeLog-2003
  e7462609ebd0dd7c874e0fc00e2833aa  gcc/fortran/ChangeLog-2004
*************** e2a44896b23e988d9494957a8fa9b066  gcc/fo
*** 6360,6366 ****
  22050427a75e58c301664b6859f72718  gcc/fortran/parse.cc
  c97a1f016de974126c688bb9c805f323  gcc/fortran/parse.h
  f8f17e966c9b06f3143a910582383fb7  gcc/fortran/primary.cc
! 607d6f18f8de6cc91165f7a125c5cd7e  gcc/fortran/resolve.cc
  e23f6eefa51bb3b4caa3d75c0409cfcd  gcc/fortran/scanner.cc
  18963b3f6aacca960fd6aa72b429a9d2  gcc/fortran/scanner.h
  664f19f5a29de9abc4642568f758c47c  gcc/fortran/simplify.cc
--- 6342,6348 ----
  22050427a75e58c301664b6859f72718  gcc/fortran/parse.cc
  c97a1f016de974126c688bb9c805f323  gcc/fortran/parse.h
  f8f17e966c9b06f3143a910582383fb7  gcc/fortran/primary.cc
! dedd6d4aa4a39577c88ee5dc83018f93  gcc/fortran/resolve.cc
  e23f6eefa51bb3b4caa3d75c0409cfcd  gcc/fortran/scanner.cc
  18963b3f6aacca960fd6aa72b429a9d2  gcc/fortran/scanner.h
  664f19f5a29de9abc4642568f758c47c  gcc/fortran/simplify.cc
*************** e23f6eefa51bb3b4caa3d75c0409cfcd  gcc/fo
*** 6368,6383 ****
  ef5ff085d6f19e0b84135e46b7281b70  gcc/fortran/symbol.cc
  4fa06f769be3f1b439a574ee842c82ca  gcc/fortran/target-memory.cc
  ea8837444e2a08a95a3ea747c94b8106  gcc/fortran/target-memory.h
! e52cc479259ccde25f372f6e15478a65  gcc/fortran/trans-array.cc
  a0c40b654df0b5c5213047d26e48e97a  gcc/fortran/trans-array.h
  5c567026f9fbc4fea9b59c22743687c4  gcc/fortran/trans-common.cc
  98960d7450a15e1ecc9789bd0bde16a7  gcc/fortran/trans-const.cc
  0d5cf4117521dba2aea9c8fd7ac67888  gcc/fortran/trans-const.h
! 910ecb3b9cbacbba105f1752cef0504e  gcc/fortran/trans-decl.cc
  7587366d5466b3ccf2ecc3152adf9e0c  gcc/fortran/trans-expr.cc
! 1e9019ec9c08335a5b10db9869e2534c  gcc/fortran/trans-intrinsic.cc
! 9d578d72e2bcb2e0fc0dc71c709c80f8  gcc/fortran/trans-io.cc
! a7dd5c301725a5395b938c4328a5e0d3  gcc/fortran/trans-openmp.cc
  974f8aeec761eac4ee1be974addd51d5  gcc/fortran/trans-stmt.cc
  6fbc90714f9730e84515bbaadff313f9  gcc/fortran/trans-stmt.h
  f8cac5e2268c177aff676d2dbb690f51  gcc/fortran/trans-types.cc
--- 6350,6365 ----
  ef5ff085d6f19e0b84135e46b7281b70  gcc/fortran/symbol.cc
  4fa06f769be3f1b439a574ee842c82ca  gcc/fortran/target-memory.cc
  ea8837444e2a08a95a3ea747c94b8106  gcc/fortran/target-memory.h
! 40cb236ccb42c8f778d277fc59baaae9  gcc/fortran/trans-array.cc
  a0c40b654df0b5c5213047d26e48e97a  gcc/fortran/trans-array.h
  5c567026f9fbc4fea9b59c22743687c4  gcc/fortran/trans-common.cc
  98960d7450a15e1ecc9789bd0bde16a7  gcc/fortran/trans-const.cc
  0d5cf4117521dba2aea9c8fd7ac67888  gcc/fortran/trans-const.h
! 8122b7fcee76ae037d67925b0b8cd603  gcc/fortran/trans-decl.cc
  7587366d5466b3ccf2ecc3152adf9e0c  gcc/fortran/trans-expr.cc
! cf1cd2d936d63b4a12209bc73b627e02  gcc/fortran/trans-intrinsic.cc
! 269d2b121570a82898b133a3274071a7  gcc/fortran/trans-io.cc
! 5aae8344983c76e250d5a9804f13e0ad  gcc/fortran/trans-openmp.cc
  974f8aeec761eac4ee1be974addd51d5  gcc/fortran/trans-stmt.cc
  6fbc90714f9730e84515bbaadff313f9  gcc/fortran/trans-stmt.h
  f8cac5e2268c177aff676d2dbb690f51  gcc/fortran/trans-types.cc
*************** b05737bbc68b136b84a297541d337fb7  gcc/gc
*** 6412,6418 ****
  b3c028c9d05ffaa2d3d12afa3b3d6061  gcc/gcov-io.cc
  15293b4de55e6ae02fef2f87d2745ed3  gcc/gcov-io.h
  59c446908bdce0e047d42a7886f3904a  gcc/gcov-tool.cc
! 0f7759f10a61cc578edbf9c1fa9cec15  gcc/gcov.cc
  a03969607849dc4defdd19f2bd8f098b  gcc/gcse-common.cc
  277a0876871bec996d99dc4d7e020460  gcc/gcse-common.h
  a6262b86b3027259364f310d5668e6a3  gcc/gcse.cc
--- 6394,6400 ----
  b3c028c9d05ffaa2d3d12afa3b3d6061  gcc/gcov-io.cc
  15293b4de55e6ae02fef2f87d2745ed3  gcc/gcov-io.h
  59c446908bdce0e047d42a7886f3904a  gcc/gcov-tool.cc
! 6145ed803fd49507f71441a009b95b0f  gcc/gcov.cc
  a03969607849dc4defdd19f2bd8f098b  gcc/gcse-common.cc
  277a0876871bec996d99dc4d7e020460  gcc/gcse-common.h
  a6262b86b3027259364f310d5668e6a3  gcc/gcse.cc
*************** e8ef831ecab58724c781ef6c239eb959  gcc/gi
*** 6472,6478 ****
  98c92461c94c7a7e1f7c09e62e05167f  gcc/gimple-crc-optimization.cc
  e33888307c479ce11d601ebd8fc8f0af  gcc/gimple-expr.cc
  61721564f913cdbebe438f7c378b316e  gcc/gimple-expr.h
! da617b4c14aa5a1d4741220ee47a18c5  gcc/gimple-fold.cc
  d4285bef3fb661843b5d37c21e759c95  gcc/gimple-fold.h
  109e0f96a9d27a8a25bb73d61b701bbc  gcc/gimple-harden-conditionals.cc
  ebf0fc6c9a10c730d10710fdec206805  gcc/gimple-harden-control-flow.cc
--- 6454,6460 ----
  98c92461c94c7a7e1f7c09e62e05167f  gcc/gimple-crc-optimization.cc
  e33888307c479ce11d601ebd8fc8f0af  gcc/gimple-expr.cc
  61721564f913cdbebe438f7c378b316e  gcc/gimple-expr.h
! e78fee3b3e034e6f9747efbb63ec2633  gcc/gimple-fold.cc
  d4285bef3fb661843b5d37c21e759c95  gcc/gimple-fold.h
  109e0f96a9d27a8a25bb73d61b701bbc  gcc/gimple-harden-conditionals.cc
  ebf0fc6c9a10c730d10710fdec206805  gcc/gimple-harden-control-flow.cc
*************** cc3bc9f050d83e91dde135d1aaa4aa45  gcc/gi
*** 6496,6508 ****
  47be556d1ffdffe8df16fdea25e9fe0e  gcc/gimple-predict.h
  507f851a06264c7415919c28e6afa3da  gcc/gimple-pretty-print.cc
  188a3366d8d8b4ba413f704fa241a1e2  gcc/gimple-pretty-print.h
! 34865803d801f526fc01f3f4bbc75024  gcc/gimple-range-cache.cc
! c7aea08144ac3dfedef02e2efd73b2e9  gcc/gimple-range-cache.h
  d69dec8fe89be66b09721beced1a6f07  gcc/gimple-range-edge.cc
  1001ed4a3c498c8d659f609b65b1b127  gcc/gimple-range-edge.h
! 12e32161282b4b47908436e4b4ba5fa5  gcc/gimple-range-fold.cc
  c84294b3bbebf60858449ae953fae160  gcc/gimple-range-fold.h
! 420447af73a8d6a64aa06e6b91ba94d3  gcc/gimple-range-gori.cc
  3f397ecbcf642d6d782fe5e774680054  gcc/gimple-range-gori.h
  871f906e172004d8ff9ab02c90b303c7  gcc/gimple-range-infer.cc
  7b22b6e89d46ee067b182629fcb97a4d  gcc/gimple-range-infer.h
--- 6478,6490 ----
  47be556d1ffdffe8df16fdea25e9fe0e  gcc/gimple-predict.h
  507f851a06264c7415919c28e6afa3da  gcc/gimple-pretty-print.cc
  188a3366d8d8b4ba413f704fa241a1e2  gcc/gimple-pretty-print.h
! 0411b54c8c250fa65360fdf77e1bcb64  gcc/gimple-range-cache.cc
! fed39c5b7ccbe9fef78cb20fe5a094d8  gcc/gimple-range-cache.h
  d69dec8fe89be66b09721beced1a6f07  gcc/gimple-range-edge.cc
  1001ed4a3c498c8d659f609b65b1b127  gcc/gimple-range-edge.h
! 8460db5e163737abbfe8e969a2f48e81  gcc/gimple-range-fold.cc
  c84294b3bbebf60858449ae953fae160  gcc/gimple-range-fold.h
! 314d9122c0deb103438e02976c279fff  gcc/gimple-range-gori.cc
  3f397ecbcf642d6d782fe5e774680054  gcc/gimple-range-gori.h
  871f906e172004d8ff9ab02c90b303c7  gcc/gimple-range-infer.cc
  7b22b6e89d46ee067b182629fcb97a4d  gcc/gimple-range-infer.h
*************** cdb2ce2b488734517babc7160c5009ae  gcc/gi
*** 6515,6522 ****
  a4932ff9aca9b1faf77d94e18d1a98dd  gcc/gimple-range-tests.cc
  6aea6dbdcfdbb9cc7eaba0885ef8339c  gcc/gimple-range-trace.cc
  e45cb6aa50c3ff1d1592d7f2758cb778  gcc/gimple-range-trace.h
! 02777a8ae49f72253e52431084e1cf91  gcc/gimple-range.cc
! d7845f849ad3dd11fdee8ef672936b7e  gcc/gimple-range.h
  8a9bf24197a610cfba7953c1233dd5ef  gcc/gimple-ssa-backprop.cc
  e1a7065df5a3fda33b25bbeef59fcf3c  gcc/gimple-ssa-isolate-paths.cc
  841e25177d0ec3b994aade444aaf7d1f  gcc/gimple-ssa-nonnull-compare.cc
--- 6497,6504 ----
  a4932ff9aca9b1faf77d94e18d1a98dd  gcc/gimple-range-tests.cc
  6aea6dbdcfdbb9cc7eaba0885ef8339c  gcc/gimple-range-trace.cc
  e45cb6aa50c3ff1d1592d7f2758cb778  gcc/gimple-range-trace.h
! 8b2bafc3fa66bdaabaa93d8af1c8762f  gcc/gimple-range.cc
! b284f979b1dc05312e57543e7aa4d6c4  gcc/gimple-range.h
  8a9bf24197a610cfba7953c1233dd5ef  gcc/gimple-ssa-backprop.cc
  e1a7065df5a3fda33b25bbeef59fcf3c  gcc/gimple-ssa-isolate-paths.cc
  841e25177d0ec3b994aade444aaf7d1f  gcc/gimple-ssa-nonnull-compare.cc
*************** fd706cd70d2b5c6a514eef109a117112  gcc/gi
*** 6541,6547 ****
  e35a6083f100e687d2e1c31c46aabecd  gcc/gimple-warn-recursion.cc
  4a43f38776337834415600ed88fb9563  gcc/gimple.cc
  208b5a93bd83c9b24330756189d7f056  gcc/gimple.def
! 72589cf8cf38daf58173bae09359bc01  gcc/gimple.h
  46bdb18976fdb25accadbfdc07f14a8e  gcc/gimplify-me.cc
  cc5b43d0554c69571cd007e727fbb7d1  gcc/gimplify-me.h
  b8dd4145c1714748ffcfa90cb4937033  gcc/gimplify.cc
--- 6523,6529 ----
  e35a6083f100e687d2e1c31c46aabecd  gcc/gimple-warn-recursion.cc
  4a43f38776337834415600ed88fb9563  gcc/gimple.cc
  208b5a93bd83c9b24330756189d7f056  gcc/gimple.def
! bdfa24068b8a667b864afec3aab3c472  gcc/gimple.h
  46bdb18976fdb25accadbfdc07f14a8e  gcc/gimplify-me.cc
  cc5b43d0554c69571cd007e727fbb7d1  gcc/gimplify-me.h
  b8dd4145c1714748ffcfa90cb4937033  gcc/gimplify.cc
*************** c7c9628cd16fe3e0263939ceb0a865fa  gcc/in
*** 6688,6697 ****
  8a34b6abb2591b8c30c7fb4187261ee3  gcc/intl.cc
  22c5866f6858fea288e5e2f1adc96e40  gcc/intl.h
  920db3effdd509146b3f00be906c0885  gcc/ipa-comdats.cc
! 5404630cd27ac3f8e27db5f500fd775d  gcc/ipa-cp.cc
! 4d6f3ed19a0000835b68366644c08a7e  gcc/ipa-cp.h
  0951d893930a76f52aa7e3f0fbd7201e  gcc/ipa-devirt.cc
! ae1e2041798741a74dbd720bfa8af4c5  gcc/ipa-fnsummary.cc
  179f7c3a6fbca4d8bf253b9fc8e5b21f  gcc/ipa-fnsummary.h
  c4202186d7ed3511a93359f9b276438b  gcc/ipa-free-lang-data.cc
  bd8846ab41db2000eb2e2f0acea327ea  gcc/ipa-icf-gimple.cc
--- 6670,6679 ----
  8a34b6abb2591b8c30c7fb4187261ee3  gcc/intl.cc
  22c5866f6858fea288e5e2f1adc96e40  gcc/intl.h
  920db3effdd509146b3f00be906c0885  gcc/ipa-comdats.cc
! 646e45f0d3905809ea8ace7bf74a6df9  gcc/ipa-cp.cc
! bff71bc7b721a547da3a7ddc6b208fb9  gcc/ipa-cp.h
  0951d893930a76f52aa7e3f0fbd7201e  gcc/ipa-devirt.cc
! 0f5f3d9b3c56e80eb4660f2cc0778ff7  gcc/ipa-fnsummary.cc
  179f7c3a6fbca4d8bf253b9fc8e5b21f  gcc/ipa-fnsummary.h
  c4202186d7ed3511a93359f9b276438b  gcc/ipa-free-lang-data.cc
  bd8846ab41db2000eb2e2f0acea327ea  gcc/ipa-icf-gimple.cc
*************** cdf80ca29c90f97b4cca06b029f8353b  gcc/ip
*** 6714,6720 ****
  80b4cc7719c703dfe60955dfb86002ae  gcc/ipa-predicate.cc
  a25a62951e49120c7882ca20d2486581  gcc/ipa-predicate.h
  7e00759eeb8f2ddaa2f77da1db8adf24  gcc/ipa-profile.cc
! bc3a9517dcc5c7f6f2a62984655bce2b  gcc/ipa-prop.cc
  ab51096414a0554c4c1069e327ad7801  gcc/ipa-prop.h
  14aace4627625a58b2f0a8aec7cd94f5  gcc/ipa-pure-const.cc
  f2d87c9921ca158119d238ee8d50abb6  gcc/ipa-ref.cc
--- 6696,6702 ----
  80b4cc7719c703dfe60955dfb86002ae  gcc/ipa-predicate.cc
  a25a62951e49120c7882ca20d2486581  gcc/ipa-predicate.h
  7e00759eeb8f2ddaa2f77da1db8adf24  gcc/ipa-profile.cc
! 6a19540cd67ba1c3f095f81eded40ebf  gcc/ipa-prop.cc
  ab51096414a0554c4c1069e327ad7801  gcc/ipa-prop.h
  14aace4627625a58b2f0a8aec7cd94f5  gcc/ipa-pure-const.cc
  f2d87c9921ca158119d238ee8d50abb6  gcc/ipa-ref.cc
*************** f9608e9005487c369e6c38949ab36fa1  gcc/m2
*** 7893,7899 ****
  2a18164ee5f162ac117e6fedb58158a2  gcc/machmode.def
  0c9209452a934f189aa0860038b3a65c  gcc/machmode.h
  197298337dae14fdd7ab928a1f03bec6  gcc/main.cc
! 491a3c06f335a234bf0af24407e703b8  gcc/match.pd
  b106a08a1793a5495dd87c412456484b  gcc/mcf.cc
  897c541ca992e145ad451c98941c7647  gcc/mem-stats-traits.h
  4f86eeea7af520ce0b773c1f2e34b5b4  gcc/mem-stats.h
--- 7875,7881 ----
  2a18164ee5f162ac117e6fedb58158a2  gcc/machmode.def
  0c9209452a934f189aa0860038b3a65c  gcc/machmode.h
  197298337dae14fdd7ab928a1f03bec6  gcc/main.cc
! 5b095e2df95cf37efbe4db5b7fceb695  gcc/match.pd
  b106a08a1793a5495dd87c412456484b  gcc/mcf.cc
  897c541ca992e145ad451c98941c7647  gcc/mem-stats-traits.h
  4f86eeea7af520ce0b773c1f2e34b5b4  gcc/mem-stats.h
*************** df4d718a9c9934a10272384f58351e0f  gcc/op
*** 7962,7968 ****
  e45c50053d2064312ea73720cdb8e5d9  gcc/optabs-query.h
  0135b6d221cd61d59fecebf7206e304e  gcc/optabs-tree.cc
  201b2569727bf062f908121f208a860f  gcc/optabs-tree.h
! 185cc54393703007fe03979babecb031  gcc/optabs.cc
  c5f46ef2e21b33c46222e08c7533480c  gcc/optabs.def
  81371a1b977075ff9a2b9637ac88cfa3  gcc/optabs.h
  10284dae2b1b50618cee778ef473c34c  gcc/optc-gen.awk
--- 7944,7950 ----
  e45c50053d2064312ea73720cdb8e5d9  gcc/optabs-query.h
  0135b6d221cd61d59fecebf7206e304e  gcc/optabs-tree.cc
  201b2569727bf062f908121f208a860f  gcc/optabs-tree.h
! 5ba2e11c36901a4bc86611a69cf37e72  gcc/optabs.cc
  c5f46ef2e21b33c46222e08c7533480c  gcc/optabs.def
  81371a1b977075ff9a2b9637ac88cfa3  gcc/optabs.h
  10284dae2b1b50618cee778ef473c34c  gcc/optc-gen.awk
*************** b2f9b18f946c2e60e4f6cba0ab2df54e  gcc/pe
*** 7996,8006 ****
  51380e9db88b682bc96a35cc4bce56a5  gcc/plugin.cc
  af6268dd53154434eb4c4d1c299e0ee2  gcc/plugin.def
  5678cfbc9cf98f9e69bee1118c787a42  gcc/plugin.h
! fb3397f5313a17da4c078b659e5c20a3  gcc/po/ChangeLog
  2c2fbc71d2acc1ddfb9fb9501458921b  gcc/po/EXCLUDES
  73ae249e691da38b778718022db3bbde  gcc/po/be.po
  dc880fdf00071de200d0a050acab2d15  gcc/po/da.po
! 1a56f01265925390f8aeeef497e518fe  gcc/po/de.po
  b831e79d9a1e4ff56315068d97004be1  gcc/po/el.po
  746d4a44505d519b4735ec4b98b7f20b  gcc/po/es.po
  7a6d51f7527e21e20156259c98cac705  gcc/po/exgettext
--- 7978,7988 ----
  51380e9db88b682bc96a35cc4bce56a5  gcc/plugin.cc
  af6268dd53154434eb4c4d1c299e0ee2  gcc/plugin.def
  5678cfbc9cf98f9e69bee1118c787a42  gcc/plugin.h
! dd1fe4b56dbd7bb57ceaf0d29f2e518c  gcc/po/ChangeLog
  2c2fbc71d2acc1ddfb9fb9501458921b  gcc/po/EXCLUDES
  73ae249e691da38b778718022db3bbde  gcc/po/be.po
  dc880fdf00071de200d0a050acab2d15  gcc/po/da.po
! 526acffad37f45214db44abb7e8c2d64  gcc/po/de.po
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  746d4a44505d519b4735ec4b98b7f20b  gcc/po/es.po
  7a6d51f7527e21e20156259c98cac705  gcc/po/exgettext
*************** db24d9f938cefb2027e91a5068f5f1d0  gcc/pr
*** 8053,8063 ****
  bea702966301b6b7e6294ef33ec8b443  gcc/pta-andersen.h
  706c6f6185e00db6f945b89759097531  gcc/pub-sub.cc
  f72a1e84c9facd65dc1c42ee67f21583  gcc/pub-sub.h
! 6d775d65d7f0d1f54bc8d7b3177d17b2  gcc/range-op-float.cc
  5b7facbc76df7d457131d6ab875c3b62  gcc/range-op-mixed.h
! f4cba1bfd3b506f536d929e22e20525d  gcc/range-op-ptr.cc
! cf65d64ae38adb74e74e34c58cf68528  gcc/range-op.cc
! 08eea1a2533e737fb45e4cf1818b5d33  gcc/range-op.h
  5224210104d440bc7bae81953ca2e7f1  gcc/range.cc
  19ba1dec644467b75ebc4246acf8ff8f  gcc/range.h
  685295910dd30e1779dc47adcdaa7cbb  gcc/read-md.cc
--- 8035,8045 ----
  bea702966301b6b7e6294ef33ec8b443  gcc/pta-andersen.h
  706c6f6185e00db6f945b89759097531  gcc/pub-sub.cc
  f72a1e84c9facd65dc1c42ee67f21583  gcc/pub-sub.h
! baab0c2ad805d6d5d47b409b65c38351  gcc/range-op-float.cc
  5b7facbc76df7d457131d6ab875c3b62  gcc/range-op-mixed.h
! 69b841901021a7600a6c55aa08c8a6ab  gcc/range-op-ptr.cc
! ae0b4a659b3f4a0952726601a7f4dcde  gcc/range-op.cc
! 41245bef16499e87b06264ddc3caa493  gcc/range-op.h
  5224210104d440bc7bae81953ca2e7f1  gcc/range.cc
  19ba1dec644467b75ebc4246acf8ff8f  gcc/range.h
  685295910dd30e1779dc47adcdaa7cbb  gcc/read-md.cc
*************** d1e8f06dfe7f0d64ebabef7c52035296  gcc/re
*** 8069,8075 ****
  45b87c4baefe4e526664defa3b15f968  gcc/real.h
  034d6804511ba5d0c988e1e98ab47d5d  gcc/realmpfr.cc
  5ada18d8279938c02c4d9f3751acf660  gcc/realmpfr.h
! 7fbdfd1ffe1a75841b1fe6694f435364  gcc/recog.cc
  70ff0cfdb2d7d28d6188422d526830c6  gcc/recog.h
  8bff9b4e294312d53b3edc3a5599f0a3  gcc/ree.cc
  cccab40b3ac43a58e799adb120a5dfbf  gcc/reg-notes.def
--- 8051,8057 ----
  45b87c4baefe4e526664defa3b15f968  gcc/real.h
  034d6804511ba5d0c988e1e98ab47d5d  gcc/realmpfr.cc
  5ada18d8279938c02c4d9f3751acf660  gcc/realmpfr.h
! cf3431811e710981fe8c6f711b598914  gcc/recog.cc
  70ff0cfdb2d7d28d6188422d526830c6  gcc/recog.h
  8bff9b4e294312d53b3edc3a5599f0a3  gcc/ree.cc
  cccab40b3ac43a58e799adb120a5dfbf  gcc/reg-notes.def
*************** cccab40b3ac43a58e799adb120a5dfbf  gcc/re
*** 8077,8083 ****
  cbae359b740a87a489f2cbe509ba7e6d  gcc/regcprop.cc
  e871bb7c9089d9ade710735b0803cff1  gcc/regcprop.h
  435320d85f05d8915fcbd110db42a930  gcc/regenerate-attr-urls.py
! 5e402924ce5d4a7e3c923c23d6947bc8  gcc/regenerate-opt-urls.py
  0e3a39b230beb335e14d1d6336b7985e  gcc/reginfo.cc
  4fc0401c76f75e872ceb423b786535b3  gcc/regrename.cc
  3305b4e257d68cf35538509ba53235c4  gcc/regrename.h
--- 8059,8065 ----
  cbae359b740a87a489f2cbe509ba7e6d  gcc/regcprop.cc
  e871bb7c9089d9ade710735b0803cff1  gcc/regcprop.h
  435320d85f05d8915fcbd110db42a930  gcc/regenerate-attr-urls.py
! f0820f7cb3f73e347a678f682c773982  gcc/regenerate-opt-urls.py
  0e3a39b230beb335e14d1d6336b7985e  gcc/reginfo.cc
  4fc0401c76f75e872ceb423b786535b3  gcc/regrename.cc
  3305b4e257d68cf35538509ba53235c4  gcc/regrename.h
*************** eab7365dceccf86b8e9a8ccbb365afc3  gcc/rt
*** 8117,8124 ****
  24f0dd01b35b9a9b7f5bf7db574be3ec  gcc/rtl-tests.cc
  27956813d0124f5b5ec60d5a48840a34  gcc/rtl.cc
  a9ad8cbba3c33e3fbc0b79c6938a0295  gcc/rtl.def
! 1ddd2444adb70f3c6e041e2e5bc3bb1c  gcc/rtl.h
! 7ff1c4f5f03f9f3f90b58f300088af4a  gcc/rtlanal.cc
  57073d447ccb92aa7b0276e4471824df  gcc/rtlanal.h
  9a5e61517f096479200fef046f8b2d35  gcc/rtlhash.cc
  0c917b0591a65e7996befc0d1e294cc3  gcc/rtlhash.h
--- 8099,8106 ----
  24f0dd01b35b9a9b7f5bf7db574be3ec  gcc/rtl-tests.cc
  27956813d0124f5b5ec60d5a48840a34  gcc/rtl.cc
  a9ad8cbba3c33e3fbc0b79c6938a0295  gcc/rtl.def
! e93c98527e742dc249b0cd8b10211bd8  gcc/rtl.h
! 78a6761be9094aabb776bbba41b1906f  gcc/rtlanal.cc
  57073d447ccb92aa7b0276e4471824df  gcc/rtlanal.h
  9a5e61517f096479200fef046f8b2d35  gcc/rtlhash.cc
  0c917b0591a65e7996befc0d1e294cc3  gcc/rtlhash.h
*************** da5c82758bbb99130aa6287f7a6c1342  gcc/sc
*** 8665,8671 ****
  017ab43b4cc0ef03de29f6129f0423e0  gcc/sched-rgn.cc
  9e378364d914a59876b4a6de4497fd39  gcc/sel-sched-dump.cc
  3b84f3b6b449c883935ef347892e770c  gcc/sel-sched-dump.h
! ce78ce26a3c148575eb45a6e3b88fb3b  gcc/sel-sched-ir.cc
  291a3a1dd9369c3712c90457c320acad  gcc/sel-sched-ir.h
  f04046c3702a78faced8e75c7064288f  gcc/sel-sched.cc
  c8e14bcadd8fd37034a186ff2eed497c  gcc/sel-sched.h
--- 8647,8653 ----
  017ab43b4cc0ef03de29f6129f0423e0  gcc/sched-rgn.cc
  9e378364d914a59876b4a6de4497fd39  gcc/sel-sched-dump.cc
  3b84f3b6b449c883935ef347892e770c  gcc/sel-sched-dump.h
! b6ebd1ec9c5747afb270517ad94fe6a2  gcc/sel-sched-ir.cc
  291a3a1dd9369c3712c90457c320acad  gcc/sel-sched-ir.h
  f04046c3702a78faced8e75c7064288f  gcc/sel-sched.cc
  c8e14bcadd8fd37034a186ff2eed497c  gcc/sel-sched.h
*************** fdb979dbe9a110ffa6e78f1d2a5bc11e  gcc/se
*** 8680,8692 ****
  6dc6ae93a1fbd519f338fda091482073  gcc/selftest.h
  1c334344ba785f0a69ca21056f1f847a  gcc/sese.cc
  f7a30cc2e8344fa489739267da2d868b  gcc/sese.h
! ef4c4caa3f358b8d15a4b7063b9770e8  gcc/shortest-paths.h
  c5e97158cfb2af3204a5d8562aefaf85  gcc/shrink-wrap.cc
  4c1386d4baf5f8c0978b1ca3b17d79e1  gcc/shrink-wrap.h
  3f3d94e6f52cc07f64e195e1a75dc485  gcc/signop.h
  b4c90fe064bba484ce5c18adb1a9e544  gcc/simple-diagnostic-path.cc
  7affe31db6f7cb9c7fc77937feef0758  gcc/simple-diagnostic-path.h
! 34a0f727aedc1e389a0c0c1101955d59  gcc/simplify-rtx.cc
  d1aec926a9488869692e8fe2f61ca75f  gcc/sort.cc
  7daa38cb1d09a2f88958f00a965d40a1  gcc/sparseset.cc
  3883b6ff1845dcec7b2822124018ab05  gcc/sparseset.h
--- 8662,8674 ----
  6dc6ae93a1fbd519f338fda091482073  gcc/selftest.h
  1c334344ba785f0a69ca21056f1f847a  gcc/sese.cc
  f7a30cc2e8344fa489739267da2d868b  gcc/sese.h
! 664a1170caa1b13ee6d513a44d8de3c8  gcc/shortest-paths.h
  c5e97158cfb2af3204a5d8562aefaf85  gcc/shrink-wrap.cc
  4c1386d4baf5f8c0978b1ca3b17d79e1  gcc/shrink-wrap.h
  3f3d94e6f52cc07f64e195e1a75dc485  gcc/signop.h
  b4c90fe064bba484ce5c18adb1a9e544  gcc/simple-diagnostic-path.cc
  7affe31db6f7cb9c7fc77937feef0758  gcc/simple-diagnostic-path.h
! 71e8ba2d7056924dad4727e578cd297c  gcc/simplify-rtx.cc
  d1aec926a9488869692e8fe2f61ca75f  gcc/sort.cc
  7daa38cb1d09a2f88958f00a965d40a1  gcc/sparseset.cc
  3883b6ff1845dcec7b2822124018ab05  gcc/sparseset.h
*************** d294651bcc46af1abb89e48cd851fd40  gcc/ta
*** 8735,8746 ****
  fe7cc01d7dd25103bc61ab1a33dd54dc  gcc/target-globals.h
  8d0dbf3229219f76ac06bdd053725387  gcc/target-hooks-macros.h
  f24751f278bee1ac8dc861467d9f96a3  gcc/target-insns.def
! 469210d4d24f5df60b35bb5111add1be  gcc/target.def
  9ca827d4a70bd09cb862e2583cb8500a  gcc/target.h
! bf20a6542e361b29f15f9f2b47d47e2f  gcc/targhooks.cc
  b1068b0d3d77d5a55802a29a9f8a08d7  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 2a6d7660eb618460c88880f317c0f27b  gcc/testsuite/ChangeLog
  47e8e29b649ead73b8a1e4797da470ed  gcc/testsuite/ChangeLog-1993-2007
  35198a9e4fd31b935de8789faabf3351  gcc/testsuite/ChangeLog-2008
  0f19934540750356d1b91595cebfd9a8  gcc/testsuite/ChangeLog-2009
--- 8717,8728 ----
  fe7cc01d7dd25103bc61ab1a33dd54dc  gcc/target-globals.h
  8d0dbf3229219f76ac06bdd053725387  gcc/target-hooks-macros.h
  f24751f278bee1ac8dc861467d9f96a3  gcc/target-insns.def
! 8b1a67916743a992fef7062af4d163ce  gcc/target.def
  9ca827d4a70bd09cb862e2583cb8500a  gcc/target.h
! 2b5ed5f473de31fccbd53235aa79d207  gcc/targhooks.cc
  b1068b0d3d77d5a55802a29a9f8a08d7  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! ec1541633273956b7b9a57bea6ac6654  gcc/testsuite/ChangeLog
  47e8e29b649ead73b8a1e4797da470ed  gcc/testsuite/ChangeLog-1993-2007
  35198a9e4fd31b935de8789faabf3351  gcc/testsuite/ChangeLog-2008
  0f19934540750356d1b91595cebfd9a8  gcc/testsuite/ChangeLog-2009
*************** f22c1d6f613d0a75782bbe2b9985409c  gcc/te
*** 18210,18216 ****
  7bf4703348c765739d583b7192f279b4  gcc/testsuite/c-c++-common/analyzer/deref-before-check-pr77425.c
  886f3f33c2d279807ee7298e0c063925  gcc/testsuite/c-c++-common/analyzer/deref-before-check-qemu-qtest_rsp_args.c
  e72d4d58ac74047ac994b14980352fac  gcc/testsuite/c-c++-common/analyzer/disabling.c
! 93b5f6eb0952c9e9214d55a7b761545e  gcc/testsuite/c-c++-common/analyzer/divide-by-zero-1.c
  155cdffe9cf626079175c33466c8ac56  gcc/testsuite/c-c++-common/analyzer/divide-by-zero-pr124195-2.c
  19aacf9c33e54908fddb0b6eaf172fdd  gcc/testsuite/c-c++-common/analyzer/dot-output.c
  fda96ad160dde929000c954a08b084bf  gcc/testsuite/c-c++-common/analyzer/dump-state.c
--- 18192,18200 ----
  7bf4703348c765739d583b7192f279b4  gcc/testsuite/c-c++-common/analyzer/deref-before-check-pr77425.c
  886f3f33c2d279807ee7298e0c063925  gcc/testsuite/c-c++-common/analyzer/deref-before-check-qemu-qtest_rsp_args.c
  e72d4d58ac74047ac994b14980352fac  gcc/testsuite/c-c++-common/analyzer/disabling.c
! aa1acae6869c0285246b355028c04cd4  gcc/testsuite/c-c++-common/analyzer/divide-by-zero-1.c
! 486a6e84d73cd0235064bc11843376f6  gcc/testsuite/c-c++-common/analyzer/divide-by-zero-2.c
! aba207418f1489160e8dda1de9882836  gcc/testsuite/c-c++-common/analyzer/divide-by-zero-3.c
  155cdffe9cf626079175c33466c8ac56  gcc/testsuite/c-c++-common/analyzer/divide-by-zero-pr124195-2.c
  19aacf9c33e54908fddb0b6eaf172fdd  gcc/testsuite/c-c++-common/analyzer/dot-output.c
  fda96ad160dde929000c954a08b084bf  gcc/testsuite/c-c++-common/analyzer/dump-state.c
*************** abfa35b8a5fc745a6ae1279a469abdb3  gcc/te
*** 18324,18330 ****
  f96a5e26ebe3f224244fcc898ace703b  gcc/testsuite/c-c++-common/analyzer/inlining-6.c
  03a1d1ad07367c4df1878142d6ed4cd4  gcc/testsuite/c-c++-common/analyzer/inlining-7-multiline.c
  28235c739e7b12bff289d278f8971f92  gcc/testsuite/c-c++-common/analyzer/inlining-7.c
! 7a48058aaf7419920b16429c67d04982  gcc/testsuite/c-c++-common/analyzer/invalid-shift-1.c
  c2fe5f3adb1d4f5c27c7d505befae7b9  gcc/testsuite/c-c++-common/analyzer/ipa-callbacks-1.c
  3cb97718e1fbbc9845c767bb007b9fa9  gcc/testsuite/c-c++-common/analyzer/isatty-1.c
  a710cd85a1cb3f973bf3b9b487e3c805  gcc/testsuite/c-c++-common/analyzer/leak-2.c
--- 18308,18317 ----
  f96a5e26ebe3f224244fcc898ace703b  gcc/testsuite/c-c++-common/analyzer/inlining-6.c
  03a1d1ad07367c4df1878142d6ed4cd4  gcc/testsuite/c-c++-common/analyzer/inlining-7-multiline.c
  28235c739e7b12bff289d278f8971f92  gcc/testsuite/c-c++-common/analyzer/inlining-7.c
! c20b78e1995f96f03e66d14927018590  gcc/testsuite/c-c++-common/analyzer/invalid-shift-1.c
! bed2e29e2d94b2f5dc65788c71b9ae91  gcc/testsuite/c-c++-common/analyzer/invalid-shift-2.c
! b9eba32a59107009bb97b0306bea23a5  gcc/testsuite/c-c++-common/analyzer/invalid-shift-3.c
! cce1ed5e0fa4a1eb3376b9ebfe32dfbc  gcc/testsuite/c-c++-common/analyzer/invalid-shift-4.c
  c2fe5f3adb1d4f5c27c7d505befae7b9  gcc/testsuite/c-c++-common/analyzer/ipa-callbacks-1.c
  3cb97718e1fbbc9845c767bb007b9fa9  gcc/testsuite/c-c++-common/analyzer/isatty-1.c
  a710cd85a1cb3f973bf3b9b487e3c805  gcc/testsuite/c-c++-common/analyzer/leak-2.c
*************** e7df9a3155c5c6021ee481fcc76afa2a  gcc/te
*** 22388,22393 ****
--- 22375,22381 ----
  0918dccee8951925f7bc4640874a6cd3  gcc/testsuite/g++.dg/analyzer/cstdlib-2.C
  4eff577cfbafc7e71c5a97654882870b  gcc/testsuite/g++.dg/analyzer/cstdlib.C
  7951a855cc080064bcfdf98631e39a2e  gcc/testsuite/g++.dg/analyzer/ctor-dtor-1.C
+ ca19b24e4ca61370ea7f7cfe8f438371  gcc/testsuite/g++.dg/analyzer/divide-by-zero-7.C
  d1eaf073a251f60143e80284bc5a504c  gcc/testsuite/g++.dg/analyzer/dyncast-1.C
  8705636d8f03a04f16322230221596d5  gcc/testsuite/g++.dg/analyzer/exception-could-throw-1.C
  e975b4050956fb04b44b1cf687bc1223  gcc/testsuite/g++.dg/analyzer/exception-could-throw-2.C
*************** be892275c368a2986b53d48a115a663b  gcc/te
*** 22904,22909 ****
--- 22892,22898 ----
  de469835fa2d0f9d4c8b18a256aa97b7  gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p6.observe.C
  4577c57ef596f164df664590cfec9cb9  gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p7.3.C
  a1f6b480f3bec7ed4dbac50a5f7f89b3  gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8-2.C
+ 032d17077810770f725a6ae66b29cffc  gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8-3.C
  051716109086ec3036567a6f6adf4e44  gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8.C
  22e7409253edd05900bc4b7fd6eccf18  gcc/testsuite/g++.dg/contracts/cpp26/basic.scope.contract.p1.C
  9b7ba0d56e419d6aee6c2e9bbdfde638  gcc/testsuite/g++.dg/contracts/cpp26/basic.scope.contract.p2.1.C
*************** ccba3040ed86b5ffae7d72b18f556d1c  gcc/te
*** 25981,25986 ****
--- 25970,25976 ----
  be2e2da855b83583283092ca0bb72265  gcc/testsuite/g++.dg/cpp0x/rv-conv4.C
  1cf65d6b3d6f2efdc39e97cc285cfb7c  gcc/testsuite/g++.dg/cpp0x/rv-conv5.C
  889a7002f4d78b4abd44856da792f8dc  gcc/testsuite/g++.dg/cpp0x/rv-copy1.C
+ fa930410478009be16ff5c21544f405c  gcc/testsuite/g++.dg/cpp0x/rv-decl1.C
  de88aaa56b0d394bd02f079bb0f4dddf  gcc/testsuite/g++.dg/cpp0x/rv-deduce.C
  f213598004dcfd0117fecc9593637790  gcc/testsuite/g++.dg/cpp0x/rv-deduce2.C
  589e28fb5e0fffb1d369fc47ca52bcfd  gcc/testsuite/g++.dg/cpp0x/rv-dotstar.C
*************** a7b34171000020208252212900f8f284  gcc/te
*** 27815,27820 ****
--- 27805,27812 ----
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*** 29482,29487 ****
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*** 33642,33647 ****
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*** 34545,34551 ****
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*************** bae6d6398266dd286951a779994c5fea  gcc/te
*** 37497,37505 ****
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*** 37667,37672 ****
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*************** aa8f04eae840cf292352166e158cfd5c  gcc/te
*** 37709,37714 ****
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*** 37718,37724 ****
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*************** bcea9ee60707a95dc9fe1a749981578a  gcc/te
*** 37925,37930 ****
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*** 38038,38043 ****
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*** 40632,40637 ****
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*** 45975,45980 ****
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*************** ac01d71fcbc92c609cbf00b9a9c8b025  gcc/te
*** 46287,46293 ****
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*** 46305,46311 ****
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*** 47187,47193 ****
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*************** a455f61709435004a057458df1666c32  gcc/te
*** 48410,48416 ****
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--- 48425,48431 ----
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*************** a314ab9d8d3e4818826dc35a5aed87e4  gcc/te
*** 50239,50245 ****
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*************** b4cc34b145ee2695a25e012a95c4991b  gcc/te
*** 50906,50911 ****
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*************** fd6b9c1ae3833951eb92de84a938f778  gcc/te
*** 51238,51244 ****
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*************** fffc1f01ecc10021cef74e15e08fad3d  gcc/te
*** 57392,57398 ****
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*** 57897,57903 ****
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*************** b7d6fb3e14f86c09ea6f178c014109c3  gcc/te
*** 58582,58587 ****
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*** 58764,58769 ****
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*** 60537,60543 ****
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*** 62638,62644 ****
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*************** ed19fe5db03432f1e8a33694b1dcda3e  gcc/te
*** 62668,62674 ****
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*************** cb909e7812f73f90414b63042c95d199  gcc/te
*** 64451,64457 ****
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*************** abf36d925f7053c105cfd3f71d64a6a7  gcc/te
*** 64852,64857 ****
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*************** cef3bfd56530a07f8eb43ec1a8c7552d  gcc/te
*** 64870,64881 ****
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*************** bcc1e80ace8dfce442cc953aeebe8f09  gcc/te
*** 64971,64976 ****
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*** 65045,65050 ****
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*************** f4c56a02709c699f81b07b81dd1a2c1e  gcc/te
*** 65055,65073 ****
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*************** edcbca34043637027e3769b565e4b273  gcc/te
*** 65719,65729 ****
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*************** eba056f8fdfc01dd50d19a42ad34bd50  gcc/te
*** 66234,66240 ****
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--- 66275,66280 ----
*************** a356a547d4f122d4cbb05a15d0ae98a9  gcc/te
*** 66839,66846 ****
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*************** bfbef312c1eb167e9b377420da07c0dd  gcc/te
*** 67212,67218 ****
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*************** c0921723f41125298bfcb2f99d6e1a7e  gcc/te
*** 71316,71321 ****
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*************** fede82c538ecebf82ae0f495a35f66db  gcc/te
*** 76999,77004 ****
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*************** aa168ab73051b82a62ea3739df9b7948  gcc/te
*** 79777,79782 ****
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*************** d1b973f36a4fb5310a2535b0d664c5ad  gcc/te
*** 88573,88578 ****
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*************** f92820a41f6f283edfca4bf4ea0ab663  gcc/te
*** 88599,88605 ****
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*************** cda0d89452347311cc45a79be2d8f0fc  gcc/te
*** 89298,89309 ****
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*************** f6fd4449a72ddd84f5687641334109d2  gcc/te
*** 89333,89350 ****
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*** 89355,89361 ****
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*** 90573,90579 ****
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*** 90593,90598 ****
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*** 92689,92695 ****
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*** 93378,93384 ****
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*** 94060,94065 ****
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*** 94329,94334 ****
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*** 94374,94379 ****
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*** 95686,95691 ****
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*** 95772,95777 ****
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*************** c75487042d6fbca84e1dba3b5e8f92d0  gcc/te
*** 98325,98337 ****
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! b77bd8a5e7f751adc1d87356d0e9ae90  gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c
! edc504cb604b88f40f1956be2783986b  gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c
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! a4ffb1d924ea0e92dc750a5ab958b920  gcc/testsuite/gcc.target/powerpc/vsx-vector-6-func-1op.c
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--- 98394,98406 ----
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! 9205ea530dd2d29da2209a279c2518a7  gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c
! 33409176ad460dc64976c38546f92634  gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c
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! d21e2d315157cae8358c1a4fc6245b14  gcc/testsuite/gcc.target/powerpc/vsx-vector-6-func-1op.c
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*************** ef0ff25c6903087992aa69002e1fe999  gcc/te
*** 99530,99535 ****
--- 99599,99605 ----
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  d7cf53ef302f30f2c25f866e2db8247c  gcc/testsuite/gcc.target/riscv/pr105733.c
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*************** ac11119f9210fdbe0a0f2e3211742dd1  gcc/te
*** 99669,99675 ****
--- 99739,99747 ----
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*************** ae7832d0dbfbabb51f555f2e9c3138bc  gcc/te
*** 99683,99688 ****
--- 99755,99761 ----
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*************** ade16f059b010bf66d77fcf2968ef4e1  gcc/te
*** 100207,100214 ****
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--- 100280,100287 ----
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! 34c4cc8c4270e0f79800e5de7eeb149f  gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c
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*************** e89716c1c2b6e0975a892021487cb55f  gcc/te
*** 100394,100407 ****
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--- 100467,100480 ----
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! c101d51c648b7f10fdc74b705b821639  gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c
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*************** e69ac673a560685af831869d72b01154  gcc/te
*** 100546,100551 ****
--- 100619,100625 ----
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*************** f2ec98071ccfe1a1f2bdf4df284cc4bf  gcc/te
*** 100568,100573 ****
--- 100642,100648 ----
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  ee8bcba5f6876f2027f0f263f81465aa  gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/extract_last-1.c
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*************** e6cd9ea69c640eb0a252e4da30d07f39  gcc/te
*** 100626,100632 ****
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--- 100701,100707 ----
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*************** a57153c5795f4e1a6d4cfb4702343803  gcc/te
*** 101623,101629 ****
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--- 101698,101704 ----
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! 389083dd5cbb88a5ffffd113c05dd3f2  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c
  c765369ff3aff0333c4a2ac3d0a39e25  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-interleave-run.c
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*************** f1ef6fa13c480640b814506c7de90cc4  gcc/te
*** 102188,102213 ****
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--- 102263,102288 ----
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*************** ee4d762425ee9fa02262080e983ca873  gcc/te
*** 102257,102264 ****
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*************** af39bb531df9d78fb100a8bc074d5527  gcc/te
*** 102363,102368 ****
--- 102438,102447 ----
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*************** e6cc517e272187e5f7690fb2c2f902f1  gcc/te
*** 103396,103401 ****
--- 103475,103481 ----
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*************** f94586f8a444e654ba0f0cada142b1b5  gcc/te
*** 103901,103907 ****
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*************** ff5bbc31f569f4e1b8286fe3e8f4153b  gcc/te
*** 105171,105176 ****
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*************** a45efe7a1d6f8b7f15f7befa3e7b1768  gcc/te
*** 107728,107733 ****
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*** 112630,112635 ****
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*** 113001,113006 ****
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*************** b5a297f740fa264744c9afc7fff7715d  gcc/te
*** 113766,113771 ****
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*************** c9bae3926493665cd6a3a6bca4b52e53  gcc/te
*** 114632,114637 ****
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*** 117534,117539 ****
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*** 121465,121470 ****
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*** 123966,123971 ****
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  3c812d9c40899c50bf02d8f0caaf64e8  gcc/testsuite/gnat.dg/enum_rep2.adb
*************** af452bfcd099f7ad757c0709565fb6f2  gcc/te
*** 128222,128228 ****
  c0366f2c31a7d5fba486ea04c6f08b9a  gcc/testsuite/lib/go.exp
  569a9bbf0bbca4b3648f90532f4b4b21  gcc/testsuite/lib/htmltest.py
  c0b7997d28c0e4c1e52d9c22fe7612a7  gcc/testsuite/lib/hwasan-dg.exp
! 9c051e217fd6295446de2b0e5c9df969  gcc/testsuite/lib/lto.exp
  8788f5bd86ca545e5cc667a7883372aa  gcc/testsuite/lib/mike-g++.exp
  3252f65e1ec61c730a6ac983f56b3fd7  gcc/testsuite/lib/mike-gcc.exp
  6cae4002752080c9ace9f60df166aefe  gcc/testsuite/lib/modules.exp
--- 128318,128324 ----
  c0366f2c31a7d5fba486ea04c6f08b9a  gcc/testsuite/lib/go.exp
  569a9bbf0bbca4b3648f90532f4b4b21  gcc/testsuite/lib/htmltest.py
  c0b7997d28c0e4c1e52d9c22fe7612a7  gcc/testsuite/lib/hwasan-dg.exp
! 0004228a966ad4872fadf6b312327a16  gcc/testsuite/lib/lto.exp
  8788f5bd86ca545e5cc667a7883372aa  gcc/testsuite/lib/mike-g++.exp
  3252f65e1ec61c730a6ac983f56b3fd7  gcc/testsuite/lib/mike-gcc.exp
  6cae4002752080c9ace9f60df166aefe  gcc/testsuite/lib/modules.exp
*************** de9eeadec9703aff96169206e31a3a22  gcc/te
*** 128260,128266 ****
  275f7eb9618e6b097a58c1fba25cdb9c  gcc/testsuite/lib/scanwpaipa.exp
  9bc4cbcf0cb4f1aa30a8cf3142d157eb  gcc/testsuite/lib/target-libpath.exp
  6f6a566231f79b409eb113cf2e7f5132  gcc/testsuite/lib/target-supports-dg.exp
! 7eec10224354120170fe7c900216373f  gcc/testsuite/lib/target-supports.exp
  b1eb2edcf4941bfb00c200eb000a0a7b  gcc/testsuite/lib/target-utils.exp
  98b890f6c455deafd6ca241993fc5d67  gcc/testsuite/lib/timeout-dg.exp
  0afb0c69501fa44908d13017be208db3  gcc/testsuite/lib/timeout.exp
--- 128356,128362 ----
  275f7eb9618e6b097a58c1fba25cdb9c  gcc/testsuite/lib/scanwpaipa.exp
  9bc4cbcf0cb4f1aa30a8cf3142d157eb  gcc/testsuite/lib/target-libpath.exp
  6f6a566231f79b409eb113cf2e7f5132  gcc/testsuite/lib/target-supports-dg.exp
! 9f7ce810d5eb057c94bcb6e692ecd40e  gcc/testsuite/lib/target-supports.exp
  b1eb2edcf4941bfb00c200eb000a0a7b  gcc/testsuite/lib/target-utils.exp
  98b890f6c455deafd6ca241993fc5d67  gcc/testsuite/lib/timeout-dg.exp
  0afb0c69501fa44908d13017be208db3  gcc/testsuite/lib/timeout.exp
*************** a4340dde4019e28f9fad54b2a7770c74  gcc/tr
*** 131038,131048 ****
  ed70c897fa5690940494f2b8b6e27f21  gcc/tree-affine.h
  bc74f92323ee5636997f0c03aec16115  gcc/tree-assume.cc
  a0c02d542dbd50cb44704b2ffce2739c  gcc/tree-call-cdce.cc
! 2bb5fd65b4dcb26760b786589ff6a903  gcc/tree-cfg.cc
  809e1f07de4be5a3fc990f66bd6d1105  gcc/tree-cfg.h
! 53fe3cc3880a544ddf9677a41df1f033  gcc/tree-cfgcleanup.cc
  645c34c74323c655a1d20f8f76e64b27  gcc/tree-cfgcleanup.h
! 447f46e51936add5de4aaa77a96039ba  gcc/tree-chrec.cc
  1cf760e3e7aab6f94a5e56897486623d  gcc/tree-chrec.h
  a3fd0a3b7cf7687811c2d140c14f489d  gcc/tree-complex.cc
  dea74d5dd62de97a94d9f3e749f5bd06  gcc/tree-core.h
--- 131134,131144 ----
  ed70c897fa5690940494f2b8b6e27f21  gcc/tree-affine.h
  bc74f92323ee5636997f0c03aec16115  gcc/tree-assume.cc
  a0c02d542dbd50cb44704b2ffce2739c  gcc/tree-call-cdce.cc
! 4c6383dea2657d6c52b37b717b5589db  gcc/tree-cfg.cc
  809e1f07de4be5a3fc990f66bd6d1105  gcc/tree-cfg.h
! 004be06477b671feecb3c825f52a13d9  gcc/tree-cfgcleanup.cc
  645c34c74323c655a1d20f8f76e64b27  gcc/tree-cfgcleanup.h
! 87926ca0e9c5b40ce5574d6aa2ce245a  gcc/tree-chrec.cc
  1cf760e3e7aab6f94a5e56897486623d  gcc/tree-chrec.h
  a3fd0a3b7cf7687811c2d140c14f489d  gcc/tree-complex.cc
  dea74d5dd62de97a94d9f3e749f5bd06  gcc/tree-core.h
*************** e4c2f21e28741c793a32ae0fc8dbfa4c  gcc/tr
*** 131054,131060 ****
  6249f69b6938f0c765dfd5c8b8919870  gcc/tree-diagnostic-client-data-hooks.cc
  d386999a86d3286d44906721ad4390cc  gcc/tree-diagnostic-sink-extensions.h
  e034d1768d04fbcb8aefa0625b256dcd  gcc/tree-diagnostic.cc
! a6a0ac4b89f1e6240c0c94394b10339b  gcc/tree-diagnostic.h
  c3f03b9ec39a5dd9d9d6328f439b796c  gcc/tree-dump.cc
  324fb4c2b4c5efd6cfc188ff13bca7ee  gcc/tree-dump.h
  15b0d5dea2517e8735029b57cc29208e  gcc/tree-eh.cc
--- 131150,131156 ----
  6249f69b6938f0c765dfd5c8b8919870  gcc/tree-diagnostic-client-data-hooks.cc
  d386999a86d3286d44906721ad4390cc  gcc/tree-diagnostic-sink-extensions.h
  e034d1768d04fbcb8aefa0625b256dcd  gcc/tree-diagnostic.cc
! 2356f32b95e1208633e492dbb6aec24a  gcc/tree-diagnostic.h
  c3f03b9ec39a5dd9d9d6328f439b796c  gcc/tree-dump.cc
  324fb4c2b4c5efd6cfc188ff13bca7ee  gcc/tree-dump.h
  15b0d5dea2517e8735029b57cc29208e  gcc/tree-eh.cc
*************** c1c4fe85c3abe80948e72eb9950ff189  gcc/tr
*** 131110,131116 ****
  ec31925fe8431d27258939fc79f1f02e  gcc/tree-ssa-dom.h
  b0752286b16612fce67b55c8b0bdbdbc  gcc/tree-ssa-dse.cc
  1df01d660e0f98ade0ae7a3152aa33ed  gcc/tree-ssa-dse.h
! 22dd91b31ccfeb89c466bc88dee69f57  gcc/tree-ssa-forwprop.cc
  bb90d30f7c6176fd9edf8b10cc7803b6  gcc/tree-ssa-ifcombine.cc
  96b11e029c398aaecd1c642c41c88884  gcc/tree-ssa-live.cc
  7c36b95c9d109be3302936ceed49fb4f  gcc/tree-ssa-live.h
--- 131206,131212 ----
  ec31925fe8431d27258939fc79f1f02e  gcc/tree-ssa-dom.h
  b0752286b16612fce67b55c8b0bdbdbc  gcc/tree-ssa-dse.cc
  1df01d660e0f98ade0ae7a3152aa33ed  gcc/tree-ssa-dse.h
! bde3557a4a4ed5d14b6a5136ec256ac0  gcc/tree-ssa-forwprop.cc
  bb90d30f7c6176fd9edf8b10cc7803b6  gcc/tree-ssa-ifcombine.cc
  96b11e029c398aaecd1c642c41c88884  gcc/tree-ssa-live.cc
  7c36b95c9d109be3302936ceed49fb4f  gcc/tree-ssa-live.h
*************** fa83f982a805985b3a3da2ca5e10e43a  gcc/tr
*** 131133,131139 ****
  9b5221bc2087b040736afeb799949b04  gcc/tree-ssa-operands.cc
  f83d0b12185538e6f679296bebfe3d2f  gcc/tree-ssa-operands.h
  3f9ddde6942294b6dc34b670fdaab66f  gcc/tree-ssa-phiopt.cc
! 43dbb34d514798f88d4fe157b76cc274  gcc/tree-ssa-phiprop.cc
  e356f4c7b22c3759a86c782d5e99d1a8  gcc/tree-ssa-pre.cc
  5d6622629ccbf56551beb5cb3cc8684a  gcc/tree-ssa-propagate.cc
  d38017eb69a50f24b5e47ee97928afde  gcc/tree-ssa-propagate.h
--- 131229,131235 ----
  9b5221bc2087b040736afeb799949b04  gcc/tree-ssa-operands.cc
  f83d0b12185538e6f679296bebfe3d2f  gcc/tree-ssa-operands.h
  3f9ddde6942294b6dc34b670fdaab66f  gcc/tree-ssa-phiopt.cc
! 92ad5cbf538d0838f11679a2c649a672  gcc/tree-ssa-phiprop.cc
  e356f4c7b22c3759a86c782d5e99d1a8  gcc/tree-ssa-pre.cc
  5d6622629ccbf56551beb5cb3cc8684a  gcc/tree-ssa-propagate.cc
  d38017eb69a50f24b5e47ee97928afde  gcc/tree-ssa-propagate.h
*************** ccd81769582e0122376dc2d42e8c2af1  gcc/tr
*** 131151,131157 ****
  0446a2ea253b8980787fe93568c7836b  gcc/tree-ssa-tail-merge.cc
  4835f0b56bdf88ee25d6d6e08808a7db  gcc/tree-ssa-ter.cc
  ade30359e437d413371ab6bf896f2aa8  gcc/tree-ssa-ter.h
! 937f647b1c97c5dbf05cfad994927673  gcc/tree-ssa-threadbackward.cc
  ad70c411b7d21101dac0ae7123f4d652  gcc/tree-ssa-threadedge.cc
  68901eab6fa42a8561fa69c7ce55bf1d  gcc/tree-ssa-threadedge.h
  5eaf91b9a03861ce39b4478c6bb848e9  gcc/tree-ssa-threadupdate.cc
--- 131247,131253 ----
  0446a2ea253b8980787fe93568c7836b  gcc/tree-ssa-tail-merge.cc
  4835f0b56bdf88ee25d6d6e08808a7db  gcc/tree-ssa-ter.cc
  ade30359e437d413371ab6bf896f2aa8  gcc/tree-ssa-ter.h
! 4c513039b9c6f19dac425ae61676f4d9  gcc/tree-ssa-threadbackward.cc
  ad70c411b7d21101dac0ae7123f4d652  gcc/tree-ssa-threadedge.cc
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  5eaf91b9a03861ce39b4478c6bb848e9  gcc/tree-ssa-threadupdate.cc
*************** a423c268d5ba9ac563732fd6d038c572  gcc/tr
*** 131177,131184 ****
  624e853033600b79b38e595705354ec3  gcc/tree-vect-loop.cc
  ea563f2f1f50f0980e0888d5fb188c39  gcc/tree-vect-patterns.cc
  e530cc3aafb91a29f53ad4826859fa85  gcc/tree-vect-slp-patterns.cc
! beceb269db5d769f09c9eb3d5503007e  gcc/tree-vect-slp.cc
! a206b811cd3ee69336b7878cf2194c3c  gcc/tree-vect-stmts.cc
  42032e04f389a2e0f43fbb46ac091dac  gcc/tree-vector-builder.cc
  4a1b4947e64a076fdca46d14aab2181f  gcc/tree-vector-builder.h
  81d28f6819c1567e669e6b16e316ba24  gcc/tree-vectorizer.cc
--- 131273,131280 ----
  624e853033600b79b38e595705354ec3  gcc/tree-vect-loop.cc
  ea563f2f1f50f0980e0888d5fb188c39  gcc/tree-vect-patterns.cc
  e530cc3aafb91a29f53ad4826859fa85  gcc/tree-vect-slp-patterns.cc
! aa27925f514de9edea8010a6bce18960  gcc/tree-vect-slp.cc
! 32d79b2b1344adcae6a41a02977d78ef  gcc/tree-vect-stmts.cc
  42032e04f389a2e0f43fbb46ac091dac  gcc/tree-vector-builder.cc
  4a1b4947e64a076fdca46d14aab2181f  gcc/tree-vector-builder.h
  81d28f6819c1567e669e6b16e316ba24  gcc/tree-vectorizer.cc
*************** df6e60fd226c010029982dccb67d2e71  gcc/va
*** 131206,131219 ****
  87b8ea160aedd51d0b39987c651c19c5  gcc/value-pointer-equiv.h
  25abf8431e827e6fdd5d719820f13b81  gcc/value-prof.cc
  062dd0b6b7d499b7d7b9a11718fe3ecb  gcc/value-prof.h
! be1170a025f3c3a0a5977676d6c260f5  gcc/value-query.cc
! 141e7cfea53719c3627b16f5cd7347cd  gcc/value-query.h
  232e88bef5fe263fb56ac139fedbeff7  gcc/value-range-pretty-print.cc
  4235b252ca8759d55215ee9cd42e1e93  gcc/value-range-pretty-print.h
! e992c1401c79c9a800a799632e7c3a66  gcc/value-range-storage.cc
! 93e35ace3b0e7ef184149d285231fb36  gcc/value-range-storage.h
! 44450674ee82f7f36311b3b58ea85b33  gcc/value-range.cc
! 54f52d51793d03199259f9706fb0a9a1  gcc/value-range.h
  89dd7a2e6c8aad8f04c37053eb24ec36  gcc/value-relation.cc
  ea7df3e5b6ab2e6e23e741431d583880  gcc/value-relation.h
  d6e6c12ad7955457218136e35f5a30d6  gcc/var-tracking.cc
--- 131302,131315 ----
  87b8ea160aedd51d0b39987c651c19c5  gcc/value-pointer-equiv.h
  25abf8431e827e6fdd5d719820f13b81  gcc/value-prof.cc
  062dd0b6b7d499b7d7b9a11718fe3ecb  gcc/value-prof.h
! 415a35e15b00d5f7ef3a7bd5ee1b61b8  gcc/value-query.cc
! c559980f2936e62bb80a512b1682d0fd  gcc/value-query.h
  232e88bef5fe263fb56ac139fedbeff7  gcc/value-range-pretty-print.cc
  4235b252ca8759d55215ee9cd42e1e93  gcc/value-range-pretty-print.h
! c52feacf8aa8466aace1377dc368a67c  gcc/value-range-storage.cc
! e65249df44ee10434babf84d1f108509  gcc/value-range-storage.h
! 85ec4b4a240d25a8d0296a413e960bcb  gcc/value-range.cc
! dc6847f80ec5b2bfbfb505a18197c8a8  gcc/value-range.h
  89dd7a2e6c8aad8f04c37053eb24ec36  gcc/value-relation.cc
  ea7df3e5b6ab2e6e23e741431d583880  gcc/value-relation.h
  d6e6c12ad7955457218136e35f5a30d6  gcc/var-tracking.cc
*************** b43850588531a10c92f2edb3db6ca034  gcc/wi
*** 131243,131249 ****
  36083181908ce997d5ccb6a13d6a0420  gcc/xml.cc
  d3b8c9cd116758ef43c7e9f5026f80ad  gcc/xml.h
  16b269105785ad40c1839dea7bf507a8  gnattools/ChangeLog
! f568f67baaeb26c2d9a4ad3be7810baa  gnattools/Makefile.in
  69a1a2005bd16d110bd6195bdbc8bafd  gnattools/configure
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  b02cf121e44636c2a8e605f3463baf06  gotools/ChangeLog
--- 131339,131345 ----
  36083181908ce997d5ccb6a13d6a0420  gcc/xml.cc
  d3b8c9cd116758ef43c7e9f5026f80ad  gcc/xml.h
  16b269105785ad40c1839dea7bf507a8  gnattools/ChangeLog
! dd45099c09c4c5c5ef999f453c372b06  gnattools/Makefile.in
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  b02cf121e44636c2a8e605f3463baf06  gotools/ChangeLog
*************** f26e462c6f89f856041d649e1dfa527e  includ
*** 131317,131327 ****
  46d6319e8ffc7eabf27cbecd6141a912  libada/configure
  ab9e00e84d092822a6cc241ba44f609b  libada/configure.ac
  46d3fe6da7a771cc2d5420c4137a6861  libatomic/.gitignore
! 83d657f4aa0e8f43c30951d2eb7ddfdf  libatomic/ChangeLog
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! e0bb77f7c38e767f851204b0f112d72b  libatomic/Makefile.in
! 357dab2e679ef947dacf67e851f4e4ba  libatomic/acinclude.m4
! 24697a8f49205fd232a3f6f3870a5d40  libatomic/aclocal.m4
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  c2ba65aefa7f432b1b7da4bddfaf3862  libatomic/config/aarch64/aarch64-config.h
--- 131413,131423 ----
  46d6319e8ffc7eabf27cbecd6141a912  libada/configure
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  46d3fe6da7a771cc2d5420c4137a6861  libatomic/.gitignore
! 015f95a1c78b927c26e8f0ffa89a3fb6  libatomic/ChangeLog
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! 9d8df11efea7190e7628fd28505b1691  libatomic/Makefile.in
! c71e52c92fcc7c91ee0b4a3685c98bf4  libatomic/acinclude.m4
! aca4499ba41919adee70a940d26e1b87  libatomic/aclocal.m4
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*************** ed3d69739cb2f35407547229f0393f92  libato
*** 131355,131362 ****
  18e12ed35584156293b3386bbaa4c810  libatomic/config/x86/fenv.c
  ff7145d48440dfce80b40e64432d54b2  libatomic/config/x86/host-config.h
  9dba85cfea4771af56b0d0f71f9dd213  libatomic/config/x86/init.c
! a50d0ae6478b7ef8c414f1cc486ccbf0  libatomic/configure
! cfbdf0beba5ceb685a2a71fe953728d2  libatomic/configure.ac
  0de16a62b4d69145d18c1019044e5415  libatomic/configure.tgt
  17dfc1d9215cf4dc01bf9f1341c7fadf  libatomic/exch_n.c
  76fb1d5ff64fb8b03a50051ea26a10b3  libatomic/fadd_n.c
--- 131451,131458 ----
  18e12ed35584156293b3386bbaa4c810  libatomic/config/x86/fenv.c
  ff7145d48440dfce80b40e64432d54b2  libatomic/config/x86/host-config.h
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! 7feef78bc80b5a1f27a5245e54c38533  libatomic/configure
! 60d72b653adc80a0f9eb3e64a12806c5  libatomic/configure.ac
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  17dfc1d9215cf4dc01bf9f1341c7fadf  libatomic/exch_n.c
  76fb1d5ff64fb8b03a50051ea26a10b3  libatomic/fadd_n.c
*************** c93b85d7b95ed603e6bde591f826d6c5  libato
*** 131382,131388 ****
  25ed5bbc5d4edc9b495cdaad40b37de2  libatomic/store_n.c
  5ba2afdc380e3c38e33233fa77823f2c  libatomic/tas_n.c
  8772872393a7b4f226a2ff99cd0767b9  libatomic/testsuite/Makefile.am
! c048f9d27d78810024a0052bbf3568c6  libatomic/testsuite/Makefile.in
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  64915dff2d4513942794e67acc165a35  libatomic/testsuite/lib/libatomic.exp
--- 131478,131484 ----
  25ed5bbc5d4edc9b495cdaad40b37de2  libatomic/store_n.c
  5ba2afdc380e3c38e33233fa77823f2c  libatomic/tas_n.c
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! d99e6fdac5c42201497012d6229f91dc  libatomic/testsuite/Makefile.in
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  64915dff2d4513942794e67acc165a35  libatomic/testsuite/lib/libatomic.exp
*************** c03a072efac9b30f8f8429ac52fd246b  libato
*** 131415,131421 ****
  8a7308fda7ed1543cb9e3be0f8e47bce  libatomic/testsuite/libatomic.c/atomic-store-5.c
  40618200985a15bcba64f871863da498  libatomic/testsuite/libatomic.c/c.exp
  97b0c9cdfcb733664bdf4efe0f5dc449  libatomic/testsuite/libatomic.c/generic-2.c
! e0a6b9f8092da30a160192d96ae60a1d  libbacktrace/ChangeLog
  eb3a88b53140eb234a99a4b3a55e56bf  libbacktrace/ChangeLog.jit
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--- 131511,131517 ----
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*** 131435,131441 ****
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--- 131531,131537 ----
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--- 132165,132173 ----
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*** 133751,133759 ****
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*** 134661,134677 ****
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*** 140439,140446 ****
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*************** bbb8b404de421c08a4468a7c149897e3  libgom
*** 140505,140511 ****
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--- 140597,140603 ----
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*************** e52d95644dc6f186070f349a5903ca72  libibe
*** 144110,144122 ****
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--- 144202,144214 ----
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*************** aa8f2630a2936b0e0a9b41f87cb03fc7  libitm
*** 144167,144174 ****
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*************** e15ca5fea1fc328695442dd6616fa3cb  libitm
*** 144186,144192 ****
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--- 144278,144284 ----
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*************** f01966720c236be4a6f849bb79c2e3a0  libsan
*** 145917,145923 ****
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--- 146009,146015 ----
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*************** c081b77fbf9129f8cd4308501efe591a  libssp
*** 145933,145939 ****
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--- 146025,146031 ----
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*************** a73d560a3ba317c5ad0a7919d87b4b6d  libssp
*** 145947,145953 ****
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--- 146039,146045 ----
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*** 146181,146187 ****
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--- 146273,146279 ----
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*************** abf1c74de0fb52f696034bd48432d075  libstd
*** 146644,146650 ****
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--- 146736,146742 ----
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*************** f053b22f5819f7ed1f6ed5ffe14dc5a3  libstd
*** 146657,146666 ****
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--- 146749,146758 ----
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*************** ba88833f52a0518e73f3f865cd474fcd  libstd
*** 146685,146691 ****
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--- 146777,146783 ----
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*************** ab1a2667b1fb6a0843b439656cb56a71  libstd
*** 146696,146702 ****
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--- 146788,146794 ----
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*************** b07bdc6c6cec90e9cf7a74c52af0e9fc  libstd
*** 146705,146711 ****
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--- 146797,146803 ----
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  91a3a127b4d8b0d05094dd720c6074ae  libstdc++-v3/include/bits/ranges_algo.h
  2376637350495a1dbd9c27901ed68027  libstdc++-v3/include/bits/ranges_algobase.h
  be4d83717ac91b3baa833f61b2456293  libstdc++-v3/include/bits/ranges_base.h
*************** cbd44f9447b308b0901004443db53e93  libstd
*** 146728,146736 ****
  22a9676313472917eaaccc27ddfb10f4  libstdc++-v3/include/bits/requires_hosted.h
  0a8f60f26dfea4bfea0ec71fe4a45ee8  libstdc++-v3/include/bits/sat_arith.h
  39e2988a6581d891172e27c28e87c62f  libstdc++-v3/include/bits/semaphore_base.h
! a5e720346d3b4c60bfbcb9cf9a79f417  libstdc++-v3/include/bits/shared_ptr.h
  06d870671ae35152d9e8442900c80215  libstdc++-v3/include/bits/shared_ptr_atomic.h
! 702f905b7fc00c89ecacee8e82ba19d9  libstdc++-v3/include/bits/shared_ptr_base.h
  a3287036233bd3e6387160d82f75e7dd  libstdc++-v3/include/bits/simd_alg.h
  f8b1a070b2932ca8805b08178cbccf75  libstdc++-v3/include/bits/simd_details.h
  3173beedaa41588474c5481ec450cd20  libstdc++-v3/include/bits/simd_flags.h
--- 146820,146828 ----
  22a9676313472917eaaccc27ddfb10f4  libstdc++-v3/include/bits/requires_hosted.h
  0a8f60f26dfea4bfea0ec71fe4a45ee8  libstdc++-v3/include/bits/sat_arith.h
  39e2988a6581d891172e27c28e87c62f  libstdc++-v3/include/bits/semaphore_base.h
! b7a12ec2370990cc1497acc595d1d860  libstdc++-v3/include/bits/shared_ptr.h
  06d870671ae35152d9e8442900c80215  libstdc++-v3/include/bits/shared_ptr_atomic.h
! 1cc9b97ad3b4daebc9ebe312f1406415  libstdc++-v3/include/bits/shared_ptr_base.h
  a3287036233bd3e6387160d82f75e7dd  libstdc++-v3/include/bits/simd_alg.h
  f8b1a070b2932ca8805b08178cbccf75  libstdc++-v3/include/bits/simd_details.h
  3173beedaa41588474c5481ec450cd20  libstdc++-v3/include/bits/simd_flags.h
*************** c70bbf877307a51d2c70e9955edf27f6  libstd
*** 146779,146785 ****
  fa6a2197d9927c61c24b530816008594  libstdc++-v3/include/bits/stl_vector.h
  96570e9668a903cd69d5febdf0595994  libstdc++-v3/include/bits/stream_iterator.h
  5d9b3cc499e4ec992ba0bb9a3de1d791  libstdc++-v3/include/bits/streambuf.tcc
! 0caf96ea77db9790a800c94f57f8ab35  libstdc++-v3/include/bits/streambuf_iterator.h
  16c1b7fd1686282fe8921246a80255d1  libstdc++-v3/include/bits/string_view.tcc
  ed462c96f62bdf1b74863ce869094491  libstdc++-v3/include/bits/stringfwd.h
  2eaea6618dd32c781462a159568c3920  libstdc++-v3/include/bits/text_encoding-data.h
--- 146871,146877 ----
  fa6a2197d9927c61c24b530816008594  libstdc++-v3/include/bits/stl_vector.h
  96570e9668a903cd69d5febdf0595994  libstdc++-v3/include/bits/stream_iterator.h
  5d9b3cc499e4ec992ba0bb9a3de1d791  libstdc++-v3/include/bits/streambuf.tcc
! 6343ef1e67538a9623d0775ee71895cb  libstdc++-v3/include/bits/streambuf_iterator.h
  16c1b7fd1686282fe8921246a80255d1  libstdc++-v3/include/bits/string_view.tcc
  ed462c96f62bdf1b74863ce869094491  libstdc++-v3/include/bits/stringfwd.h
  2eaea6618dd32c781462a159568c3920  libstdc++-v3/include/bits/text_encoding-data.h
*************** a315f61009849bba79498b388f94c177  libstd
*** 146788,146794 ****
  8d7b0008119045f5029e61c141c3c2ff  libstdc++-v3/include/bits/unicode.h
  cca61b6eab779ef500cceeed96c678a8  libstdc++-v3/include/bits/uniform_int_dist.h
  966bb21f0f44c4b2b6e713e62aeb90ae  libstdc++-v3/include/bits/unique_lock.h
! a911e8012ebb64890a0e12c16e4345ed  libstdc++-v3/include/bits/unique_ptr.h
  b1052f564f9839906c0d1f1f7a3296ea  libstdc++-v3/include/bits/unordered_map.h
  3e95bc3dafd1a579438226ba448f80e4  libstdc++-v3/include/bits/unordered_set.h
  4fbbeaf99e17abfaf62cec53ac3c9193  libstdc++-v3/include/bits/uses_allocator.h
--- 146880,146886 ----
  8d7b0008119045f5029e61c141c3c2ff  libstdc++-v3/include/bits/unicode.h
  cca61b6eab779ef500cceeed96c678a8  libstdc++-v3/include/bits/uniform_int_dist.h
  966bb21f0f44c4b2b6e713e62aeb90ae  libstdc++-v3/include/bits/unique_lock.h
! 722fac3b4af50bc63abc72f7120b80c6  libstdc++-v3/include/bits/unique_ptr.h
  b1052f564f9839906c0d1f1f7a3296ea  libstdc++-v3/include/bits/unordered_map.h
  3e95bc3dafd1a579438226ba448f80e4  libstdc++-v3/include/bits/unordered_set.h
  4fbbeaf99e17abfaf62cec53ac3c9193  libstdc++-v3/include/bits/uses_allocator.h
*************** ddd4bdc2fa29f8f2aa3386cead9ebcb2  libstd
*** 146800,146807 ****
  16c6db3f5b1e7b3e37c3febbf4dc4e8c  libstdc++-v3/include/bits/valarray_before.h
  682dec8d9b388681bc1f171ba0c5590e  libstdc++-v3/include/bits/vec_ops.h
  5a7dd3eca21d4650e654ea51da466c59  libstdc++-v3/include/bits/vector.tcc
! 543cf57b6ede0865f0d6ded6ec5427cc  libstdc++-v3/include/bits/version.def
! 29fbc02e75371bf75aa0871428303686  libstdc++-v3/include/bits/version.h
  f92789aa59d1ed5207e13c936667059d  libstdc++-v3/include/bits/version.tpl
  d99b1b69e5f87e5a631c8a881d053766  libstdc++-v3/include/c/cassert
  7f5b12607c4d7cbbcf705b672613447b  libstdc++-v3/include/c/cctype
--- 146892,146899 ----
  16c6db3f5b1e7b3e37c3febbf4dc4e8c  libstdc++-v3/include/bits/valarray_before.h
  682dec8d9b388681bc1f171ba0c5590e  libstdc++-v3/include/bits/vec_ops.h
  5a7dd3eca21d4650e654ea51da466c59  libstdc++-v3/include/bits/vector.tcc
! ae1e85f3adbba68624784dcdc24add83  libstdc++-v3/include/bits/version.def
! 6531f407cc29e442f9192eef7f513307  libstdc++-v3/include/bits/version.h
  f92789aa59d1ed5207e13c936667059d  libstdc++-v3/include/bits/version.tpl
  d99b1b69e5f87e5a631c8a881d053766  libstdc++-v3/include/c/cassert
  7f5b12607c4d7cbbcf705b672613447b  libstdc++-v3/include/c/cctype
*************** ebd19bf2f0ddfba2e4c0f871732bd72e  libstd
*** 146952,146958 ****
  c6720f0a7f2a3f9397a1d015515a6ca6  libstdc++-v3/include/experimental/bits/simd_ppc.h
  0662d0d55ec4b23de175ab4f20cff996  libstdc++-v3/include/experimental/bits/simd_scalar.h
  82cf5cd853fbb734d4d3834ef245bf9a  libstdc++-v3/include/experimental/bits/simd_sve.h
! cec39e405f7bc231bc91014af991d76e  libstdc++-v3/include/experimental/bits/simd_x86.h
  307d08fcd366e3e25a81cdceecb3375c  libstdc++-v3/include/experimental/bits/simd_x86_conversions.h
  60c94b172174d97035d0f922981ceaf2  libstdc++-v3/include/experimental/bits/string_view.tcc
  bb1f9ef706b721a2de289747165208b1  libstdc++-v3/include/experimental/buffer
--- 147044,147050 ----
  c6720f0a7f2a3f9397a1d015515a6ca6  libstdc++-v3/include/experimental/bits/simd_ppc.h
  0662d0d55ec4b23de175ab4f20cff996  libstdc++-v3/include/experimental/bits/simd_scalar.h
  82cf5cd853fbb734d4d3834ef245bf9a  libstdc++-v3/include/experimental/bits/simd_sve.h
! 15970ebad8bfa9d18acff6c589c325e6  libstdc++-v3/include/experimental/bits/simd_x86.h
  307d08fcd366e3e25a81cdceecb3375c  libstdc++-v3/include/experimental/bits/simd_x86_conversions.h
  60c94b172174d97035d0f922981ceaf2  libstdc++-v3/include/experimental/bits/string_view.tcc
  bb1f9ef706b721a2de289747165208b1  libstdc++-v3/include/experimental/buffer
*************** a8e79cb6c591611cd6113eed355c3de6  libstd
*** 147369,147375 ****
  d1dc8325fc8c069a07bab71a935bced3  libstdc++-v3/include/std/filesystem
  f004e380db68bad2f1a8548323345a5c  libstdc++-v3/include/std/flat_map
  b384f6e8eb77f0d5747534b3ed9a89cb  libstdc++-v3/include/std/flat_set
! 14fa0aceca3461a5dfbdd0084a7b5778  libstdc++-v3/include/std/format
  7e1c7765d1205d0a0571065e7e1f111d  libstdc++-v3/include/std/forward_list
  c85826e5073be733076e4825a96a991c  libstdc++-v3/include/std/fstream
  5907213253b81e40fd9101e5d092fc82  libstdc++-v3/include/std/functional
--- 147461,147467 ----
  d1dc8325fc8c069a07bab71a935bced3  libstdc++-v3/include/std/filesystem
  f004e380db68bad2f1a8548323345a5c  libstdc++-v3/include/std/flat_map
  b384f6e8eb77f0d5747534b3ed9a89cb  libstdc++-v3/include/std/flat_set
! 4a7723bd79b4395cd143b72f24c1c5ae  libstdc++-v3/include/std/format
  7e1c7765d1205d0a0571065e7e1f111d  libstdc++-v3/include/std/forward_list
  c85826e5073be733076e4825a96a991c  libstdc++-v3/include/std/fstream
  5907213253b81e40fd9101e5d092fc82  libstdc++-v3/include/std/functional
*************** b33d9f7d5e6dae4596b350ebc5fd6b8f  libstd
*** 147387,147393 ****
  2f3eb4865a149d33afc45095dfd51d15  libstdc++-v3/include/std/list
  979d756bd9149a01a697b92c921e75a0  libstdc++-v3/include/std/locale
  b9368104d884bddd988db2b9e69ab485  libstdc++-v3/include/std/map
! 8da8fd4e156bd678bb2e430f392bb519  libstdc++-v3/include/std/mdspan
  5439ce157f7c11ab4eddd8c04799fea4  libstdc++-v3/include/std/memory
  ea0d67f29f1a73f1ccdade0115646a1c  libstdc++-v3/include/std/memory_resource
  567571e5d45a92d724eb13976d8d825d  libstdc++-v3/include/std/meta
--- 147479,147485 ----
  2f3eb4865a149d33afc45095dfd51d15  libstdc++-v3/include/std/list
  979d756bd9149a01a697b92c921e75a0  libstdc++-v3/include/std/locale
  b9368104d884bddd988db2b9e69ab485  libstdc++-v3/include/std/map
! 255a13f24a7b5e508bdf5bfa1d1762b5  libstdc++-v3/include/std/mdspan
  5439ce157f7c11ab4eddd8c04799fea4  libstdc++-v3/include/std/memory
  ea0d67f29f1a73f1ccdade0115646a1c  libstdc++-v3/include/std/memory_resource
  567571e5d45a92d724eb13976d8d825d  libstdc++-v3/include/std/meta
*************** f5a5ebc7b6133572f8f361cde93ec52f  libstd
*** 147416,147429 ****
  5a01cfa5d80dcfd00d0912607effe056  libstdc++-v3/include/std/stdexcept
  1172bfca0fe1fdb144e0d95b173239d1  libstdc++-v3/include/std/stdfloat
  8000144a02174c1b4e859b4cc4af6301  libstdc++-v3/include/std/stop_token
! e6e7d75896bc3f784a372c70020e9d04  libstdc++-v3/include/std/streambuf
  76bd18b5fc744472aa3988d57a5928c5  libstdc++-v3/include/std/string
  f1890d5dbe9c9ef672c11e6397c881b9  libstdc++-v3/include/std/string_view
  2357e8bc64ed236c453da02aa0eab3ea  libstdc++-v3/include/std/syncstream
  0574b134b5132494e9294186a6a4511c  libstdc++-v3/include/std/system_error
  3de44f0df6167a88cbfda331087cb3e8  libstdc++-v3/include/std/text_encoding
  0e55da688cfae6ed254c1328fad9c8ad  libstdc++-v3/include/std/thread
! bf9dc0b041052f9a9e59ac623efd295a  libstdc++-v3/include/std/tuple
  6012bdc37182602278786360b36e503b  libstdc++-v3/include/std/type_traits
  66a7939bfcb3a6f5966552f3fb49a384  libstdc++-v3/include/std/typeindex
  994522acd96f1b6084469da322d17c19  libstdc++-v3/include/std/unordered_map
--- 147508,147521 ----
  5a01cfa5d80dcfd00d0912607effe056  libstdc++-v3/include/std/stdexcept
  1172bfca0fe1fdb144e0d95b173239d1  libstdc++-v3/include/std/stdfloat
  8000144a02174c1b4e859b4cc4af6301  libstdc++-v3/include/std/stop_token
! 3773b676d041cd3a500431ae737f5859  libstdc++-v3/include/std/streambuf
  76bd18b5fc744472aa3988d57a5928c5  libstdc++-v3/include/std/string
  f1890d5dbe9c9ef672c11e6397c881b9  libstdc++-v3/include/std/string_view
  2357e8bc64ed236c453da02aa0eab3ea  libstdc++-v3/include/std/syncstream
  0574b134b5132494e9294186a6a4511c  libstdc++-v3/include/std/system_error
  3de44f0df6167a88cbfda331087cb3e8  libstdc++-v3/include/std/text_encoding
  0e55da688cfae6ed254c1328fad9c8ad  libstdc++-v3/include/std/thread
! 8ef30587757a1234aab215609f1a2e45  libstdc++-v3/include/std/tuple
  6012bdc37182602278786360b36e503b  libstdc++-v3/include/std/type_traits
  66a7939bfcb3a6f5966552f3fb49a384  libstdc++-v3/include/std/typeindex
  994522acd96f1b6084469da322d17c19  libstdc++-v3/include/std/unordered_map
*************** fbb127f006c65ae37d591c627cc6235c  libstd
*** 147723,147729 ****
  04669634e7d7f19fae4baadedc6d0908  libstdc++-v3/src/c++17/uint128_t.h
  3b693644866857e3152dd11055b1cbd5  libstdc++-v3/src/c++20/Makefile.am
  e5a726de140540a59e2007eceae3acd1  libstdc++-v3/src/c++20/Makefile.in
! 951f0c490df6a0fb2f9c0fd9ee0eb9e0  libstdc++-v3/src/c++20/atomic.cc
  e017d47cedd4e843177ec9ff2c936541  libstdc++-v3/src/c++20/clock.cc
  beadb627afafbd9d018802046c0b4403  libstdc++-v3/src/c++20/cow-string-inst.cc
  950ea458edaf556ab767e8e46c180ee3  libstdc++-v3/src/c++20/format-inst.cc
--- 147815,147821 ----
  04669634e7d7f19fae4baadedc6d0908  libstdc++-v3/src/c++17/uint128_t.h
  3b693644866857e3152dd11055b1cbd5  libstdc++-v3/src/c++20/Makefile.am
  e5a726de140540a59e2007eceae3acd1  libstdc++-v3/src/c++20/Makefile.in
! 5ef17b396924faca2ae22d3b9424b38d  libstdc++-v3/src/c++20/atomic.cc
  e017d47cedd4e843177ec9ff2c936541  libstdc++-v3/src/c++20/clock.cc
  beadb627afafbd9d018802046c0b4403  libstdc++-v3/src/c++20/cow-string-inst.cc
  950ea458edaf556ab767e8e46c180ee3  libstdc++-v3/src/c++20/format-inst.cc
*************** d86f0747545c10f31cd6319173d83b5e  libstd
*** 148534,148545 ****
  1ba2bc9c63c405cabe299bd2a4a1618b  libstdc++-v3/testsuite/20_util/function_objects/searchers.cc
  d3f286838c2e6cde9335959dc86d5375  libstdc++-v3/testsuite/20_util/function_ref/assign.cc
  a14986e98d1dd97abc2ff044b76b6ec5  libstdc++-v3/testsuite/20_util/function_ref/call.cc
! d3fb86addcd2698986c24055a86ef525  libstdc++-v3/testsuite/20_util/function_ref/cons.cc
  c13631fa982dd192af2bf8c125ad420c  libstdc++-v3/testsuite/20_util/function_ref/cons_neg.cc
! 6769087af53b9f703272c8bf23f3c862  libstdc++-v3/testsuite/20_util/function_ref/conv.cc
  653b07c8ea1777ba938ed74b08272334  libstdc++-v3/testsuite/20_util/function_ref/cw_cons_neg.cc
! 9bb37c83ee96f3925ec94116da75e0a9  libstdc++-v3/testsuite/20_util/function_ref/dangling.cc
! a80798784aec1c674f911d361ed75ef6  libstdc++-v3/testsuite/20_util/function_ref/dangling_neg.cc
  839b0c83e1a0bd5c0ee958739de5e6c7  libstdc++-v3/testsuite/20_util/function_ref/deduction.cc
  fe11d1f21c6bd06aa902315e0eb169b2  libstdc++-v3/testsuite/20_util/function_ref/incomplete_neg.cc
  d98606abcb3c5938ecf7e2652a647a32  libstdc++-v3/testsuite/20_util/function_ref/mutation.cc
--- 148626,148637 ----
  1ba2bc9c63c405cabe299bd2a4a1618b  libstdc++-v3/testsuite/20_util/function_objects/searchers.cc
  d3f286838c2e6cde9335959dc86d5375  libstdc++-v3/testsuite/20_util/function_ref/assign.cc
  a14986e98d1dd97abc2ff044b76b6ec5  libstdc++-v3/testsuite/20_util/function_ref/call.cc
! 6ee2643d102c4aac2a32abcdd8af9791  libstdc++-v3/testsuite/20_util/function_ref/cons.cc
  c13631fa982dd192af2bf8c125ad420c  libstdc++-v3/testsuite/20_util/function_ref/cons_neg.cc
! 1c16f2398c69794de972c93ac7cadbd9  libstdc++-v3/testsuite/20_util/function_ref/conv.cc
  653b07c8ea1777ba938ed74b08272334  libstdc++-v3/testsuite/20_util/function_ref/cw_cons_neg.cc
! 5bffb6d03fd158475718309dcf5e21d5  libstdc++-v3/testsuite/20_util/function_ref/dangling.cc
! 52e7e2526afab8574d75b97cb541f9f2  libstdc++-v3/testsuite/20_util/function_ref/dangling_neg.cc
  839b0c83e1a0bd5c0ee958739de5e6c7  libstdc++-v3/testsuite/20_util/function_ref/deduction.cc
  fe11d1f21c6bd06aa902315e0eb169b2  libstdc++-v3/testsuite/20_util/function_ref/incomplete_neg.cc
  d98606abcb3c5938ecf7e2652a647a32  libstdc++-v3/testsuite/20_util/function_ref/mutation.cc
*************** acc813dd1edb9480437149d28cd4faf0  libstd
*** 149488,149493 ****
--- 149580,149586 ----
  a1777c1ca6e6ccbc0dc6a67b203de34a  libstdc++-v3/testsuite/20_util/tuple/cons/45228.cc
  5f560bc64a22df5d5f503f66bf4988e9  libstdc++-v3/testsuite/20_util/tuple/cons/48476.cc
  a544eaffc09d2f08d3f55b4de21a8e2a  libstdc++-v3/testsuite/20_util/tuple/cons/66338.cc
+ e6b4352240c76f291381c5722bf047d3  libstdc++-v3/testsuite/20_util/tuple/cons/78302.cc
  69ef222a495cc90bb822f4aef0455234  libstdc++-v3/testsuite/20_util/tuple/cons/90700.cc
  ff68c58e703f42df94152788de82dc8f  libstdc++-v3/testsuite/20_util/tuple/cons/96592.cc
  35210f669c1ffcb61840aca038c6d510  libstdc++-v3/testsuite/20_util/tuple/cons/96803.cc
*************** c0d16a219e2474e2e5ce998569dc7e4c  libstd
*** 149619,149624 ****
--- 149712,149718 ----
  d22e49077a2aa222f8a5c424929064ff  libstdc++-v3/testsuite/20_util/unique_ptr/io/lwg2948.cc
  bb40414adb587ca6cdd1ffd17960c9e2  libstdc++-v3/testsuite/20_util/unique_ptr/lwg2762.cc
  455915dfcf4dc6251c24ac413d3dfcde  libstdc++-v3/testsuite/20_util/unique_ptr/lwg4148.cc
+ 7314924b4534c814fb3127346d74c45f  libstdc++-v3/testsuite/20_util/unique_ptr/lwg4324.cc
  87e06a6a0e860218833fae6dd91e1c1a  libstdc++-v3/testsuite/20_util/unique_ptr/modifiers/43183.cc
  376eb786dd68f5c32a230ca8c8e98471  libstdc++-v3/testsuite/20_util/unique_ptr/modifiers/48398.cc
  d2648f16a39e71baba3fec77e9979cee  libstdc++-v3/testsuite/20_util/unique_ptr/modifiers/93562.cc
*************** d6d11350cf8ab8df03ef7200d4a0780b  libstd
*** 152648,152654 ****
  16fc7fe4ef465e60ef744c7605395b8b  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/typedefs.cc
  e569186d63466f61fb9efd8a252846ab  libstdc++-v3/testsuite/24_iterators/istream_iterator/sentinel.cc
  486fa49e6e6487aad2e12a66d481a54c  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/105580.cc
! 760ec72aec19e561ff5ebdd8628478ba  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2.cc
  056750d63b569b4e5db468fd95af8d9a  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2627.cc
  1a5f450007f055452b3fb783807645f9  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/92285.cc
  fb71f2bb8648d1c2bc6a0ce5b333fd41  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/cons/constexpr.cc
--- 152742,152748 ----
  16fc7fe4ef465e60ef744c7605395b8b  libstdc++-v3/testsuite/24_iterators/istream_iterator/requirements/typedefs.cc
  e569186d63466f61fb9efd8a252846ab  libstdc++-v3/testsuite/24_iterators/istream_iterator/sentinel.cc
  486fa49e6e6487aad2e12a66d481a54c  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/105580.cc
! de12d5926e38b3552446c5f07138e7c2  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2.cc
  056750d63b569b4e5db468fd95af8d9a  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2627.cc
  1a5f450007f055452b3fb783807645f9  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/92285.cc
  fb71f2bb8648d1c2bc6a0ce5b333fd41  libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/cons/constexpr.cc
diff -Nrcpad gcc-17-20260503/config/ChangeLog gcc-17-20260510/config/ChangeLog
*** gcc-17-20260503/config/ChangeLog	Sun May  3 22:32:04 2026
--- gcc-17-20260510/config/ChangeLog	Sun May 10 22:32:05 2026
***************
*** 1,3 ****
--- 1,7 ----
+ 2026-05-05  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* visibility.m4: New file.
+ 
  2026-04-13  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
  
  	PR target/69639
diff -Nrcpad gcc-17-20260503/config/visibility.m4 gcc-17-20260510/config/visibility.m4
*** gcc-17-20260503/config/visibility.m4	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/config/visibility.m4	Sun May 10 22:32:05 2026
***************
*** 0 ****
--- 1,14 ----
+ dnl Check whether the target supports hidden visibility.
+ AC_DEFUN([GCC_CHECK_ATTRIBUTE_VISIBILITY], [
+   AC_CACHE_CHECK([whether the target supports hidden visibility],
+ 		 gcc_cv_have_attribute_visibility, [
+   save_CFLAGS="$CFLAGS"
+   CFLAGS="$CFLAGS -Werror"
+   AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[void __attribute__((visibility("hidden"))) foo(void) { }]], [])],
+ 		    gcc_cv_have_attribute_visibility=yes,
+ 		    gcc_cv_have_attribute_visibility=no)
+   CFLAGS="$save_CFLAGS"])
+   if test $gcc_cv_have_attribute_visibility = yes; then
+     AC_DEFINE(HAVE_ATTRIBUTE_VISIBILITY, 1,
+       [Define to 1 if the target supports __attribute__((visibility(...))).])
+   fi])
diff -Nrcpad gcc-17-20260503/contrib/ChangeLog gcc-17-20260510/contrib/ChangeLog
*** gcc-17-20260503/contrib/ChangeLog	Sun May  3 22:32:04 2026
--- gcc-17-20260510/contrib/ChangeLog	Sun May 10 22:32:05 2026
***************
*** 1,3 ****
--- 1,8 ----
+ 2026-05-04  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* compare-all-tests: Remove references to m32c.
+ 	* config-list.mk: Likewise.
+ 
  2026-04-30  Jakub Jelinek  <jakub@redhat.com>
  
  	* gennews (files): Add files for GCC 16.
diff -Nrcpad gcc-17-20260503/contrib/compare-all-tests gcc-17-20260510/contrib/compare-all-tests
*** gcc-17-20260503/contrib/compare-all-tests	Sun May  3 22:32:04 2026
--- gcc-17-20260510/contrib/compare-all-tests	Sun May 10 22:32:05 2026
*************** arm_opts='-mthumb/-march=armv5t -mthumb/
*** 24,30 ****
  cris_opts='-march=v32 -march=v1'
  h8300_opts='/ -mh -mh/-mn -ms -ms/-mn -msx -msx/-mn -mint32 -mh/-mint32 -mh/-mn/-mint32 -ms/-mint32 -ms/-mn/-mint32 -msx/-mint32 -msx/-mn/-mint32'
  i386_opts='-m32 -m64 -m32/-msse/-msse2/-mfpmath=sse'
- m32c_opts='-mcpu=r8c -mcpu=m16c -mcpu=m32c'
  m68k_opts='-m68000 -m68020 -m68020/-m68881 -m68040/-m68881 -m68060/-m68881 -mcfv4e'
  mips_opts='-msoft-float/-mgp32/-mips16 -mabi=32/-mfp32/-mgp32/-mips16 -mabi=o64/-mfp64/-mgp64/-mips16 -msoft-float/-mgp32 -mfp32/-mgp32 -march=mips64r2/-mabi=32/-mfp64/-mgp32 -msoft-float/-mgp64 -msingle-float/-mfp32/-mgp64 -mfp64/-mgp64'
  mn10300_opts='-mam33 -mam33-2'
--- 24,29 ----
*************** s390_opts='-m31 -m31/-mzarch -m64'
*** 34,40 ****
  sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
  sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
  
! all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32c m32r m68k mcore mips mmix mn10300 pa pdp11 ppc sh sparc v850 vax xstormy16 xtensa' # e500 
  
  test_one_file ()
  {
--- 33,39 ----
  sh_opts='-m3 -m3e -m4 -m4a -m4al -m4/-mieee -m1 -m1/-mno-cbranchdi -m2a -m2a/-mieee -m2e -m2e/-mieee'
  sparc_opts='-mcpu=v8/-m32 -mcpu=v9/-m32 -m64'
  
! all_targets='alpha arm avr bfin cris fr30 frv h8300 ia64 iq2000 m32r m68k mcore mips mmix mn10300 pa pdp11 ppc sh sparc v850 vax xstormy16 xtensa' # e500
  
  test_one_file ()
  {
diff -Nrcpad gcc-17-20260503/contrib/config-list.mk gcc-17-20260510/contrib/config-list.mk
*** gcc-17-20260503/contrib/config-list.mk	Sun May  3 22:32:04 2026
--- gcc-17-20260510/contrib/config-list.mk	Sun May 10 22:32:05 2026
*************** LIST = \
*** 66,72 ****
    lm32-rtems lm32-uclinux \
    loongarch32-linux-gnuf64 loongarch32-linux-gnuf32 loongarch32-linux-gnusf \
    loongarch64-linux-gnuf64 loongarch64-linux-gnuf32 loongarch64-linux-gnusf \
!   m32c-elfOPT-enable-obsolete m32r-elf m32rle-elf \
    m68k-elf m68k-netbsdelf \
    m68k-uclinux m68k-linux m68k-rtems \
    mcore-elf microblaze-linux microblaze-elf \
--- 66,72 ----
    lm32-rtems lm32-uclinux \
    loongarch32-linux-gnuf64 loongarch32-linux-gnuf32 loongarch32-linux-gnusf \
    loongarch64-linux-gnuf64 loongarch64-linux-gnuf32 loongarch64-linux-gnusf \
!   m32r-elf m32rle-elf \
    m68k-elf m68k-netbsdelf \
    m68k-uclinux m68k-linux m68k-rtems \
    mcore-elf microblaze-linux microblaze-elf \
diff -Nrcpad gcc-17-20260503/gcc/ChangeLog gcc-17-20260510/gcc/ChangeLog
*** gcc-17-20260503/gcc/ChangeLog	Sun May  3 22:32:04 2026
--- gcc-17-20260510/gcc/ChangeLog	Sun May 10 22:32:05 2026
***************
*** 1,3 ****
--- 1,807 ----
+ 2026-05-09  Michiel Derhaeg  <Michiel.Derhaeg@synopsys.com>
+ 
+ 	PR target/125217
+ 	* config/riscv/riscv.cc (riscv_gen_multi_pop_insn): Rename variable.
+ 	(riscv_expand_epilogue): Don't emit cm.popret with shadow stack.
+ 
+ 2026-05-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR middle-end/117871
+ 	* cfghooks.cc (cfg_hooks): Change the type
+ 	to be a pointer to a const struct cfg_hooks.
+ 	(get_cfg_hooks): Return the current pointer
+ 	rather the struct.
+ 	(set_cfg_hooks): Change the argument type and
+ 	set the cfg_hooks directly to it.
+ 	* cfghooks.h (gimple_cfg_hooks): Constify.
+ 	(rtl_cfg_hooks): Likewise.
+ 	(cfg_layout_rtl_cfg_hooks): Likewise.
+ 	(get_cfg_hooks): Update declration.
+ 	(set_cfg_hooks): Likewise.
+ 	* cfgrtl.cc (rtl_cfg_hooks): Constify.
+ 	(cfg_layout_rtl_cfg_hooks): Likewise.
+ 	* sel-sched-ir.cc (orig_cfg_hooks): Change to a pointer.
+ 	(sel_create_basic_block): Update
+ 	for orig_cfg_hooks being a pointer.
+ 	(sel_register_cfg_hooks): Update for the constification
+ 	of cfg_hooks.
+ 	* tree-cfg.cc (gimple_cfg_hooks): Constify.
+ 
+ 2026-05-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* cfghooks.cc (current_ir_name): New function.
+ 	(dump_bb_for_graph): Use current_ir_name
+ 	instead of accessing the name field.
+ 	(dump_bb_as_sarif_properties): Likewise.
+ 	(redirect_edge_and_branch): Likewise.
+ 	(can_remove_branch_p): Likewise.
+ 	(redirect_edge_and_branch_force): Likewise.
+ 	(split_block_1): Likewise.
+ 	(move_block_after): Likewise.
+ 	(delete_basic_block): Likewise.
+ 	(split_edge): Likewise.
+ 	(create_basic_block_1): Likewise.
+ 	(can_merge_blocks_p): Likewise.
+ 	(predict_edge): Likewise.
+ 	(predicted_by_p): Likewise.
+ 	(merge_blocks): Likewise.
+ 	(make_forwarder_block): Likewise.
+ 	(force_nonfallthru): Likewise.
+ 	(can_duplicate_block_p): Likewise.
+ 	(duplicate_block): Likewise.
+ 	(block_ends_with_call_p): Likewise.
+ 	(block_ends_with_condjump_p): Likewise.
+ 	(flow_call_edges_add): Likewise.
+ 	* cfghooks.h (struct cfg_hooks): Remove the name
+ 	field.
+ 	* cfgrtl.cc (rtl_cfg_hooks): Update for the removal
+ 	of the name field.
+ 	(cfg_layout_rtl_cfg_hooks): Likewise.
+ 	* tree-cfg.cc (struct cfg_hooks): Likewise.
+ 
+ 2026-05-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* cfghooks.cc (current_ir_type): Return cfghooks' ir field.
+ 	* cfghooks.h (struct cfg_hooks): Add ir field.
+ 	* cfgrtl.cc (rtl_cfg_hooks): Update for new ir field.
+ 	(cfg_layout_rtl_cfg_hooks): Likewise.
+ 	* tree-cfg.cc (gimple_cfg_hooks): Likewise.
+ 
+ 2026-05-09  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/125239
+ 	* config/i386/i386-features.cc (ix86_place_single_vector_set):
+ 	For CONST_VECTOR source, check CONST0_RTX with
+ 	X86_CSE_CONST0_VECTOR and CONSTM1_RTX with X86_CSE_CONSTM1_VECTOR.
+ 	(ix86_broadcast_inner): Set x86_cse kind to X86_CSE_CONST0_VECTOR
+ 	for CONST0_RTX and X86_CSE_CONSTM1_VECTOR for CONSTM1_RTX.
+ 
+ 2026-05-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/125234
+ 	* match.pd (`(a !=/== b) &\| ((a|b) ==/!= 0)`): Fix
+ 	resulting constant form.
+ 
+ 2026-05-08  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	PR middle-end/124637
+ 	* calls.cc (load_register_parameters): If using store_constructor
+ 	to place a constant structure in a register, use a right shift to
+ 	align the structure/padding if required on big-endian targets.
+ 
+ 2026-05-08  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/119422
+ 	* match.pd(`(bool >= A) >= A -> bool >= A`): New pattern.
+ 
+ 2026-05-08  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR target/124955
+ 	* config/riscv/riscv.md (masked shifted bitfield extraction): New
+ 	splitter to utilize slliw to eliminate the need for sign extnesion.
+ 
+ 2026-05-08  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/93504
+ 	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
+ 	Generalize existing code for (X & C) | ((X|Y) & ~C) to handle
+ 	(X & C) | ((X^Y) & ~C) as well.
+ 
+ 2026-05-08  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	* expmed.cc (synth_mult): Add more constraints to recent change
+ 	to avoid "false positive" array bounds warnings during bootstrap.
+ 
+ 2026-05-08  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* config/loongarch/loongarch.cc (loongarch_print_operand): Print
+ 	the symbol name for SYMBOL_REF with %c.
+ 
+ 2026-05-08  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR target/125049
+ 	* config/loongarch/predicates.md (ssp_operand): New
+ 	define_predicate.
+ 	(ssp_normal_operand): New define_predicate.
+ 	* config/loongarch/constraints.md (ZE): New define_constraint.
+ 	(ZF): New define_constraint.
+ 	* config/loongarch/loongarch.md (UNSPEC_SSP): New unspec.
+ 	(cbranch4): Add "@" to create gen_cbranch4(machine_mode, ...).
+ 	(@stack_protect_combined_set_normal_<mode>): New define_insn.
+ 	(@stack_protect_combined_set_extreme_<mode>): New define_insn.
+ 	(@stack_protect_combined_test_internal_<mode>): New define_insn.
+ 	(stack_protect_combined_set): New define_expand.
+ 	(stack_protect_combined_test): New define_expand.
+ 	* config/loongarch/loongarch-protos.h
+ 	(loongarch_output_asm_load_canary): Declare.
+ 	* config/loongarch/loongarch.cc (loongarch_print_operand): Allow
+ 	'v' to print d/w for DImode/SImode.
+ 	(loongarch_output_asm_load_canary): Implement.
+ 
+ 2026-05-08  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* config/loongarch/loongarch.md (*ctzsi2_extend): New
+ 	define_insn.
+ 
+ 2026-05-08  Vijay Shankar  <vijay@linux.ibm.com>
+ 
+ 	PR target/113353
+ 	* config/rs6000/rs6000.cc (rs6000_builtin_vectorized_function):
+ 	Emit xvrdpic/xvrspic.
+ 	* config/rs6000/rs6000-overload.def (__builtin_vec_nearbyint):
+ 	Modified bif-id and overload-id.
+ 
+ 2026-05-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/125174
+ 	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Cost
+ 	the number of OMP SIMD calls number of vector stmts.
+ 
+ 2026-05-08  Bohan Lei  <garthlei@linux.alibaba.com>
+ 
+ 	* config/riscv/riscv-v.cc (shuffle_even_odd_patterns): Use vnsrl
+ 	when possible.
+ 
+ 2026-05-08  Soumya AR  <soumyaa@nvidia.com>
+ 
+ 	PR target/124895
+ 	* config/aarch64/aarch64-passes.def (pass_narrow_gp_writes): Move pass
+ 	before pass_free_cfg.
+ 
+ 2026-05-08  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/125100
+ 	* config/i386/i386-features.cc (x86_cse_kind): Add
+ 	X86_CSE_CONST_VECTOR.
+ 	(redundant_pattern): Add dest_mode.
+ 	(ix86_place_single_vector_set): Handle X86_CSE_CONST_VECTOR.
+ 	Generate SUBREG for constant integer source.
+ 	(ix86_broadcast_inner): Add an INSN argument.  Use CONST_VECTOR
+ 	in REG_EQUAL note.  Set load kind to X86_CSE_CONST_VECTOR for
+ 	native and converted CONST_VECTORs.  Return CONST_VECTOR if it
+ 	can be converted to constant integer load.
+ 	(pass_x86_cse::candidate_vector_p): Add an INSN argument and
+ 	pass the insn to ix86_broadcast_inner.
+ 	(pass_x86_cse::x86_cse): Add a basic block bitmap for calls.
+ 	Pass the insn to candidate_vector_p.  Handle X86_CSE_CONST_VECTOR.
+ 	Set dest_mode.  Keep constant integer load when crossing a
+ 	function call.  Convert CONST_VECTOR load no larger than integer
+ 	register to constant integer load even if there are no redundant
+ 	CONST_VECTOR loads.
+ 
+ 2026-05-07  Eikansh Gupta  <eikansh.gupta@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/109878
+ 	* match.pd(min/max (a & CST0, a & CST1)): New pattern.
+ 	(min/max (a, a & CST)): New pattern.
+ 
+ 2026-05-07  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/106244
+ 	* config/riscv/riscv.md ((and (ashift X Y) const_int 1)): New splitter.
+ 
+ 2026-05-07  Eikansh Gupta  <eikansh.gupta@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/123514
+ 	* match.pd ((x - (x<0)) ^ -(x<0) into ABS_EXPR<x>): New pattern.
+ 
+ 2026-05-07  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	* rtlanal.cc (commutative_operand_precedence): Bump the precedence
+ 	of non-commutative binary arithmetic to 3.  Give comparisons a
+ 	precedence of 2.
+ 
+ 2026-05-07  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	* combine.cc (make_compound_operation_int): Remove PLUS and MINUS
+ 	simplifications and PLUS operand order swapping.  Delegate those
+ 	tasks to simplify_gen_binary instead.
+ 
+ 2026-05-07  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	* alloc-pool.h (object_allocator::allocate): Generalize to handle
+ 	non-default constructors.
+ 
+ 2026-05-07  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	* rtl.h (post_ra_split_completed): Declare.
+ 	* final.cc (rest_of_clean_state): Set it to false.
+ 	* recog.cc (post_ra_split_completed): New variable.
+ 	(split_insn): Temporarily set post_ra_split_completed while walking
+ 	the new instructions.
+ 	(split_all_insns, split_all_insns_noflow): Set post_ra_split_completed
+ 	after completing a post-reload split.
+ 	* config/rx/rx.md (*cmpsi, *tstsi, *cmpsf, *conditional_branch)
+ 	(*sccc, *stcc, *stcc_reg, *abssi2_flags, *addsi3_flags, adc_internal)
+ 	(*adc_flags, *andsi3_flags, *negsi2_flags, *one_cmplsi2_flags)
+ 	(*iorsi3_flags, *rotlsi3_flags, *rotrsi3_flags, *ashrsi3_flags)
+ 	(*lshrsi3_flags, *ashlsi3_flags, *sat, *subsi3_flags, sbb_internal)
+ 	(*sbb_flags, *xorsi3_flags, *bmcc): Require post_ra_split_completed
+ 	rather than reload_completed.
+ 	(comparesi3_<extend_types:code><small_int_modes:mode>, addsi3_flags)
+ 	(subsi3_flags): Require post_ra_split_completed.
+ 
+ 2026-05-07  Pengxuan Zheng  <pengxuan.zheng@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/125214
+ 	* match.pd (min|max(a+|-c,b+|-c)): Add integral type check.
+ 
+ 2026-05-07  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	PR middle-end/122871
+ 	* expmed.cc (synth_mult): Handle doubleword left shifts by
+ 	BITS_PER_WORD bits or more, for scalar modes.
+ 	* optabs.cc (expand_doubleword_mult): Avoid generating multiply
+ 	instructions by immediate constants 0, 1 or 2.
+ 
+ 2026-05-07  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	* config/rs6000/crypto.md (UNSPEC_XXAESENCP): New unspec entry.
+ 	(UNSPEC_XXAES128ENCP): Likewise.
+ 	(UNSPEC_XXAES192ENCP): Likewise.
+ 	(UNSPEC_XXAES256ENCP): Likewise.
+ 	(UNSPEC_XXAESDECP): Likewise.
+ 	(UNSPEC_XXAES128DECP): Likewise.
+ 	(UNSPEC_XXAES192DECP): Likewise.
+ 	(UNSPEC_XXAES256DECP): Likewise.
+ 	(UNSPEC_XXAESGENLKP): Likewise.
+ 	(UNSPEC_XXAES128GENLKP): Likewise.
+ 	(UNSPEC_XXAES192GENLKP): Likewise.
+ 	(UNSPEC_XXAES256GENLKP): Likewise.
+ 	(UNSPEC_XXGFMUL128): Likewise.
+ 	(UNSPEC_XXGFMUL128GCM): Likewise.
+ 	(UNSPEC_XXGFMUL128XTS): Likewise.
+ 	(AESACC_base_code): New iterator for xxaesencp and xxaesdecp base
+ 	mnemonics.
+ 	(AESACC_code): New iterator for xxaesencp and xxaesdecp extended
+ 	mnemonics.
+ 	(AESGENLKP_code): New iterator for xxaesgenlkp extended mnemonics.
+ 	(AESGF_code): New iterator for xxgfmul128 extended mnemonics.
+ 	(AESACC_base_insn): New attribute iterator for xxaesencp and xxaesdecp
+ 	base mnemonics.
+ 	(AESACC_insn): New attribute iterator for xxaesencp and xxaesdecp
+ 	extended mnemonics.
+ 	(AESGENLKP_insn): New attribute iterator for xxaesgenlkp extended
+ 	mnemonics.
+ 	(AESGF_insn): New attribute iterator for xxgfmul128 extended mnemonics.
+ 	(<AESACC_base_insn>): New define_insn for xxaesencp and xxaesdecp base
+ 	mnemonics.
+ 	(<AESACC_insn>): New define_insn for xxaesencp and xxaesdecp extended
+ 	mnemonics.
+ 	(<AESGENLKP_insn>): New define_insn for xxaesgenlkp extended mnemonics.
+ 	(xxaesgenlkp): New define_insn for genlkp base mnemonic.
+ 	(<AESGF_insn>): New define_insn for xxgfmul128 extended mnemonics.
+ 	(xxgfmul128): New define_insn for xxgfmul128 base mnemonic.
+ 	* config/rs6000/rs6000-builtins.def: Added new builtin definitions for
+ 	AES acceleration.
+ 	* doc/extend.texi: Add new section for AES acceleration builtins
+ 	for Future ISA.
+ 
+ 2026-05-07  Pan Li  <pan2.li@intel.com>
+ 
+ 	* config/riscv/predicates.md: Add lt to swapped operator.
+ 	* config/riscv/riscv-v.cc (get_swapped_cmp_rtx_code): Handle
+ 	the rtl as well.
+ 
+ 2026-05-07  Pengxuan Zheng  <pengxuan.zheng@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/116008
+ 	PR tree-optimization/124560
+ 	* match.pd (min|max(a+|-c,b+|-c)): New patterns.
+ 
+ 2026-05-06  Jason Merrill  <jason@redhat.com>
+ 
+ 	* Makefile.in (TAGS): Add diagnostics/ and text-art/.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* range-op-float.cc (fop_unordered): Make static and const.
+ 	(fop_ordered): Likewise.
+ 	(fop_unordered_lt): Likewise.
+ 	(fop_unordered_le): Likewise.
+ 	(fop_unordered_gt): Likewise.
+ 	(fop_unordered_ge): Likewise.
+ 	(fop_unordered_equal): Likewise.
+ 	(fop_ltgt): Likewise.
+ 	(fop_div): Likewise.
+ 	* range-op-ptr.cc (op_pointer_plus): Likewise.
+ 	(op_pointer_diff): Likewise.
+ 	* range-op.cc (op_equal): Likewise.
+ 	(op_not_equal): Likewise.
+ 	(op_lt): Likewise.
+ 	(op_le): Likewise.
+ 	(op_gt): Likewise.
+ 	(op_ge): Likewise.
+ 	(op_ident): Likewise.
+ 	(op_cst): Likewise.
+ 	(op_cast): Likewise.
+ 	(op_view): Likewise.
+ 	(op_plus): Likewise.
+ 	(op_abs): Likewise.
+ 	(op_minus): Likewise.
+ 	(op_negate): Likewise.
+ 	(op_mult): Likewise.
+ 	(op_addr): Likewise.
+ 	(op_bitwise_not): Likewise.
+ 	(op_bitwise_xor): Likewise.
+ 	(op_bitwise_and): Likewise.
+ 	(op_bitwise_or): Likewise.
+ 	(op_min): Likewise.
+ 	(op_max): Likewise.
+ 	(operator_table): Make static.  Fix typo in comment.
+ 	(range_op_handler::range_op_handler): Fix typo in leading comment.
+ 	(range_op_handler::range_op): Make returned ptr const.  Use
+ 	nullptr.
+ 	(RO_III): Make static.
+ 	(RO_IFI): Likewise.
+ 	(RO_IFF): Likewise.
+ 	(RO_FFF): Likewise.
+ 	(RO_FIF): Likewise.
+ 	(RO_FII): Likewise.
+ 	(RO_PPP): Likewise.
+ 	(RO_PPI): Likewise.
+ 	(RO_IPP): Likewise.
+ 	(RO_IPI): Likewise.
+ 	(RO_PIP): Likewise.
+ 	(RO_PII): Likewise.
+ 	(op_trunc_div): Make const.
+ 	(op_floor_div): Likewise.
+ 	(op_round_div): Likewise.
+ 	(op_ceil_div): Likewise.
+ 	* range-op.h (range_op_handler::range_op): Make returned ptr
+ 	const.
+ 	(range_op_handler::m_operator): Make const.
+ 	(range_op_table::operator[]): Make const.  Make returned ptr
+ 	const.
+ 	(range_op_table::set): Make range_operator const.
+ 	(range_op_table::m_range_tree): Make ptrs const.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* value-range.cc (value_range::print): New, based on
+ 	value_range::dump.
+ 	* value-range.h (value_range::print): New decl.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* value-range.h: Remove stray slash in comment.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* Makefile.in (ANALYZER_OBJS): Add analyzer/state-transition.o.
+ 	* digraph.cc (test_path::append_edge): New.
+ 	(test_path::reverse): New.
+ 	* shortest-paths.h (get_shortest_path): Use append_edge and
+ 	reverse.
+ 	* tree-diagnostic.h
+ 	(tree_dump_pretty_printer::~tree_dump_pretty_printer): Only flush
+ 	when the buffer's stream is non-null.
+ 
+ 2026-05-06  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* value-range-storage.cc (prange_storage::alloc): Use prange_format.
+ 	(prange_storage::prange_storage): Likewise.
+ 	(prange_format::prange_format): New.
+ 	(prange_storage::set_prange): Use prange_foramt and only write
+ 	required words to storage.
+ 	(prange_storage::get_prange): Only read required words.
+ 	(prange_storage::equal_p): Adjust for new enum.
+ 	(prange_storage::fits_p): Use prange_format to determine size.
+ 	* value-range-storage.h (enum prange_kind): New.
+ 	(class prange_format): New.
+ 	(get_low, get_high, get_value, get_mask): Replace with get_word.
+ 	(set_low, set_high, set_value, set_mask): Replace with set_word.
+ 	(get_word): New.
+ 	(set_word): New.
+ 
+ 2026-05-06  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* gimple-fold.cc (get_maxval_strlen): Return the same value if
+ 	passed a constant.
+ 
+ 2026-05-06  Zhongyao Chen  <chenzhongyao.hit@gmail.com>
+ 
+ 	PR target/122558
+ 	* config/riscv/riscv-vector-costs.cc (get_lmul_cost_scaling):
+ 	New function to calculate multiplicative scaling factors.
+ 	(costs::adjust_stmt_cost): Apply LMUL scaling uniformly to all
+ 	vector statements.
+ 
+ 2026-05-06  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	* config/loongarch/loongarch.cc (loongarch_rtx_costs): Add
+ 	RTX cost handling for the ORDERED RTX code.
+ 
+ 2026-05-06  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	PR target/125057
+ 	* config/loongarch/loongarch.cc
+ 	(loongarch_split_vector_move): Complete the split condition.
+ 	* config/loongarch/loongarch.h (LSX_REG_RTX_P): Delete.
+ 	(LASX_REG_RTX_P): Delete.
+ 	(GP_REG_RTX_P): Define macro.
+ 
+ 2026-05-06  Robin Dapp  <rdapp@oss.qualcomm.com>
+ 
+ 	* config/riscv/riscv-protos.h (whole_reg_to_reg_move_p):
+ 	Rename from this...
+ 	(whole_reg_move_p): ...to this.
+ 	(whole_reg_loadstore_p): Declare.
+ 	* config/riscv/riscv-v.cc (whole_reg_to_reg_move_p): Ditto.
+ 	(whole_reg_move_p): Ditto.
+ 	(whole_reg_loadstore_p): New function.
+ 	* config/riscv/thead-vector.md: Use renamed function.
+ 	* config/riscv/vector.md (@pred_store<mode>): Use new function.
+ 
+ 2026-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	* config/i386/x86-tune.def (avx512_two_epilogues): Enable
+ 	for m_ZNVER6.
+ 	(avx512_masked_epilogues): Likewise.
+ 
+ 2026-05-05  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/120587
+ 	PR target/125155
+ 	* config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Allow condition
+ 	condition flag register in SImode.
+ 
+ 2026-05-05  wangzicong  <wangzicong@masscore.cn>
+ 
+ 	* config/riscv/riscv.cc (riscv_modes_tieable_p): Make tuple modes
+ 	not tieable to some modes.
+ 
+ 2026-05-05  Gaius Mulley  <gaiusmod2@gmail.com>
+ 
+ 	PR modula2/120189
+ 	* doc/gm2.texi (Building a shared library): Rewrite the
+ 	description of the shared library and include complete code into
+ 	the example.
+ 
+ 2026-05-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/125185
+ 	* tree-vect-slp.cc (vect_analyze_slp_reduc_chain): Guard
+ 	first vect_slp_linearize_chain call.
+ 
+ 2026-05-05  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+ 
+ 	* config/xtensa/xtensa.cc (xtensa_legitimize_address):
+ 	Modify to extend the upper limit of the coverable offset if the
+ 	address displacement of the corresponding machine instruction is
+ 	greater than 255.
+ 
+ 2026-05-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/125180
+ 	* config/i386/i386.md (HI/SI test -> QI test splitter): Punt if
+ 	operands[2] is a volatile MEM.
+ 
+ 2026-05-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/125124
+ 	* tree-vect-slp.cc (vect_bb_slp_scalar_cost): Disable
+ 	BB SLP partitioning sanity-check.
+ 
+ 2026-05-04  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR c/121911
+ 	* target.def (stack_protect_guard_symbol_p): New target hook.
+ 	* targhooks.cc (default_stack_protect_guard): Use the type of
+ 	uintptr_t, instead of ptr_type_node, if the
+ 	stack_protect_guard_symbol_p hook returns true.
+ 	* config/i386/i386.cc (ix86_stack_protect_guard_symbol_p): New.
+ 	(TARGET_STACK_PROTECT_GUARD_SYMBOL_P): Likewise.
+ 	* doc/tm.texi: Regenerated.
+ 	* doc/tm.texi.in (TARGET_STACK_PROTECT_GUARD_SYMBOL_P): New.
+ 
+ 2026-05-04  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* config/m32c/*: Delete entire directory.
+ 	* attr-urls.def: Remove references to m32c.
+ 	* config.gcc: Likewise.
+ 	* config/msp430/msp430.cc (msp430_expand_epilogue): Likewise.
+ 	* configure: Regenerate.
+ 	* configure.ac: Remove references to m32c.
+ 	* doc/extend.texi: Likewise.
+ 	* doc/install.texi: Likewise.
+ 	* doc/invoke.texi: Likewise.
+ 	* doc/md.texi: Likewise.
+ 	* explow.cc (promote_mode): Likewise.
+ 	* regenerate-opt-urls.py: Likewise.
+ 	* config/microblaze/microblaze.opt.urls: Regenerate.
+ 	* config/msp430/msp430.opt.urls: Regenerate.
+ 	* config/nds32/nds32.opt.urls: Regenerate.
+ 	* config/rl78/rl78.opt.urls: Regenerate.
+ 	* config/rs6000/sysv4.opt.urls: Regenerate.
+ 	* config/rx/elf.opt.urls: Regenerate.
+ 	* config/stormy16/stormy16.opt.urls: Regenerate.
+ 	* config/visium/visium.opt.urls: Regenerate.
+ 
+ 2026-05-04  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_expand_sve_vec_perm): Check
+ 	whether all indices of a variable selector refer to the first
+ 	values vector.
+ 
+ 2026-05-04  Mark Wielaard  <mark@klomp.org>
+ 
+ 	* config/xtensa/xtensa.opt.urls: Regenerated.
+ 
+ 2026-05-04  Nathan Myers  <ncm@cantrip.org>
+ 
+ 	* doc/invoke.texi: insert "result" in comment text
+ 
+ 2026-05-04  Artemiy Volkov  <artemiy.volkov@arm.com>
+ 
+ 	PR tree-optimization/122679
+ 	* tree-ssa-forwprop.cc (simplify_vector_constructor): Check the
+ 	PROP_gimple_lvec property before returning false.
+ 
+ 2026-05-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/116823
+ 	* tree-ssa-phiprop.cc (can_handle_load): Skip past
+ 	clobbers for !aggregate.
+ 
+ 2026-05-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* data-streamer-in.cc (streamer_read_value_range): Update for
+ 	renaming of value_range::set_type to value_range::set_range_class.
+ 	* gimple-range-gori.cc (gori_compute::compute_operand_range):
+ 	Likewise.
+ 	(gori_compute::compute_operand1_and_operand2_range): Likewise.
+ 	(gori_stmt_info::gori_stmt_info): Likewise.
+ 	(gori_calc_operands): Likewise.
+ 	(gori_name_helper): Likewise.
+ 	* ipa-cp.cc (ipcp_vr_lattice::set_to_bottom): Likewise.
+ 	* ipa-cp.h (ipcp_vr_lattice::init): Likewise.
+ 	* ipa-fnsummary.cc (evaluate_properties_for_edge): Likewise.
+ 	* ipa-prop.cc (ipa_vr::get_vrange): Likewise.
+ 	* range-op.h (range_cast): Likewise.
+ 	* value-range.h (value_range::set_type): Rename to...
+ 	(value_range::set_range_class): ...this, and add a note to the
+ 	leading comment that it doesn't set the type of the underlying
+ 	vrange.
+ 	(value_range::init): Add a similar note to the leading comment.
+ 
+ 2026-05-04  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* gimple-range-cache.cc (ranger_cache::range_of_expr): Handle
+ 	NULL statement.
+ 
+ 2026-05-04  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* gimple-range-fold.cc (fold_using_range::fold_stmt): Move
+ 	range_of_address call into nested 'if' with other routines.
+ 
+ 2026-05-04  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* gimple-range-cache.cc (ranger_cache::ranger_cache): Allocate bitmap.
+ 	(ranger_cache::~ranger_cache): Free bitmap.
+ 	(ranger_cache::mark_stale): New.
+ 	(ranger_cache::get_global_range): Check if NAME is marked stale.
+ 	* gimple-range-cache.h (ranger_cache::mark_stale): New.
+ 	* gimple-range.cc (gimple_ranger::update_range_info): New variant.
+ 	* gimple-range.h (update_range_info): New prototype.
+ 	* gimple.h (gimple_set_modified): Call update_range_info.
+ 	* value-query.cc (range_query::update_range_info): New variant.
+ 	* value-query.h (range_query::update_range_info): New prototype.
+ 
+ 2026-05-04  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* value-range.cc (irange::intersect): Snap bounds as they are created.
+ 
+ 2026-05-04  Andrew MacLeod  <amacleod@redhat.com>
+ 
+ 	* value-query.cc (range_query::get_tree_range): Check if return
+ 	range R supports the expression type.
+ 
+ 2026-05-04  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	* config/i386/i386.md (*bt<SWI48:mode>_mask): Use
+ 	int248_register_operand for operand 1 predicate.
+ 	(*jcc_bt<mode>_mask): Use nonimmediate_operand for operand 1 predicate.
+ 	(*jcc_bt<SWI48:mode>_mask_1): Use nonimmediate_operand for operand 1
+ 	predicate and int248_register_operand for operand 2 predicate.
+ 	(BT followed by CMOV splitter): Use nonimmediate_operand
+ 	for operand 1 predicate.
+ 	(*bt<mode>_setcqi): Ditto.
+ 	(*bt<mode>_setncqi): Ditto.
+ 	(*bt<mode>_setnc<mode>): Ditto.
+ 	(*bt<mode>_setncqi_2): Ditto.
+ 	(*bt<mode>_setc<mode>_mask): Use nonimmediate_operand for operand 1
+ 	predicate and int248_register_operand for operand 2 predicate.
+ 
+ 2026-05-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/123120
+ 	PR tree-optimization/116823
+ 	* tree-ssa-phiprop.cc (phiprop_insert_phi): Add other_vuse
+ 	argument, use it instead of the vuse on the use_stmt.
+ 	(can_handle_load): Add aggregate argument. Also return the vuse
+ 	of the load/store when the insert is allowed.
+ 	Skipping over one non-modifying store for !aggregate.
+ 	(propagate_with_phi): Update call to can_handle_load
+ 	and phiprop_insert_phi.
+ 
+ 2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	Revert:
+ 	2025-04-30  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/120003
+ 	* tree-ssa-threadbackward.cc (back_threader::find_paths_to_names):
+ 	Allow block re-use but do not enlarge the path beyond such a
+ 	re-use.
+ 
+ 2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/125156
+ 	* tree-cfgcleanup.cc (cleanup_control_expr_graph): Clear
+ 	EDGE_TRUE_VALUE and EDGE_FALSE_VALUE edge flags only.
+ 
+ 2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/125146
+ 	* gimple-fold.cc (fold_stmt_1): Discard stmts in seq
+ 	after failed gimple_simplify as well.
+ 
+ 2026-05-04  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* config.gcc (powerpc*-*-*): Add support for supporting
+ 	--with-cpu=future.
+ 	* config/rs6000/aix71.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
+ 	if the user used the -mcpu=future option.
+ 	* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
+ 	* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
+ 	ENB_FUTURE and issue diagnostic requiring -mcpu=future.
+ 	(rs6000_builtin_is_supported): Return TARGET_FUTURE for
+ 	ENB_FUTURE built-ins.
+ 	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+ 	_ARCH_FUTURE if -mcpu=future.
+ 	* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
+ 	(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
+ 	(rs6000_cpu_opt_value): New entry for 'future' via the RS6000_CPU macro.
+ 	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
+ 	BSTZ_FUTURE for future.
+ 	(write_decls): Add ENB_FUTURE in bif_enable enum of generated header
+ 	file.
+ 	* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
+ 	* config/rs6000/rs6000-tables.opt: Regenerate.
+ 	* config/rs6000/rs6000.cc (rs6000_machine_from_flags) If -mcpu=future,
+ 	set the .machine directive to "future".
+ 	(rs6000_opt_masks): Add entry for -mfuture.
+ 	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
+ 	if the user used the -mcpu=future option.
+ 	* config/rs6000/rs6000.opt (-mfuture): New option.
+ 	* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document
+ 	-mcpu=future.
+ 
+ 2026-05-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+ 
+ 	* doc/extend.texi (Xtensa Named Address Spaces):
+ 	Document '__force_l32'.
+ 	(Xtensa Attributes): Document 'force_l32'.
+ 	* doc/invoke.texi (Xtensa Options):
+ 	Document '-m[no-]force-l32'.
+ 
+ 2026-05-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+ 
+ 	* config/xtensa/xtensa.cc (xtensa_expand_load_force_l32_2):
+ 	New sub-function for inspecting pseudos that clearly point to the
+ 	function's stack frame.
+ 	(xtensa_expand_load_force_l32):
+ 	Add handling for loading from the generic address space when the
+ 	"-mforce-l32" option is enabled, however, obvious references to
+ 	function stack frames are excluded.
+ 	* config/xtensa/xtensa.opt (mforce-l32):
+ 	New target-specific option definition.
+ 
+ 2026-05-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+ 
+ 	* config/xtensa/xtensa.cc (xtensa_attribute_table,
+ 	TARGET_ATTRIBUTE_TABLE):
+ 	New definitions for target-specific attributes.
+ 	(xtensa_expand_load_force_l32_1): New sub-function for inspecting
+ 	the attribute from the specified MEM rtx.
+ 	(xtensa_expand_load_force_l32): Add handlings for for addresses
+ 	with offsets.
+ 	(xtensa_handle_force_l32_attribute_1,
+ 	xtensa_handle_force_l32_attribute):
+ 	New functions for handling the attribute.
+ 
+ 2026-05-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+ 
+ 	* config/xtensa/xtensa-protos.h
+ 	(xtensa_expand_load_force_l32): New function prototype.
+ 	* config/xtensa/xtensa.cc (#include): Add "expmed.h".
+ 	(TARGET_LEGITIMATE_ADDRESS_P):
+ 	Change a whitespace delimiter from HTAB to SPACE.
+ 	(TARGET_ADDR_SPACE_SUBSET_P, TARGET_ADDR_SPACE_CONVERT,
+ 	TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P):
+ 	New macro definitions for named address space.
+ 	(xtensa_addr_space_subset_p, xtensa_addr_space_convert,
+ 	xtensa_addr_space_legitimate_address_p):
+ 	New hook function prototypes and definitions required for
+ 	implementing the named address space.
+ 	(xtensa_expand_load_force_l32): New function that generates RTXes
+ 	that perform loads from memory belonging to the named address
+ 	space.
+ 	* config/xtensa/xtensa.h (ADDR_SPACE_FORCE_L32):
+ 	New macro for the ID# of the named address space.
+ 	(REGISTER_TARGET_PRAGMAS): New hook for registering C language
+ 	identifier for the named address space.
+ 	* config/xtensa/xtensa.md
+ 	(zero_extend<mode>si2_internal): Rename from zero_extend<mode>si2.
+ 	(zero_extend<mode>si2): New RTL generation pattern that calls
+ 	xtensa_expand_load_force_l32().
+ 	(extendhisi2, extendqisi2, movhi, movqi):
+ 	Change to call xtensa_expand_load_force_l32() first.
+ 	(*shift_per_byte): Delete the insn condition.
+ 
+ 2026-05-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR rtl-optimization/124766
+ 	* simplify-rtx.cc (simplify_context::simplify_relational_operation_1):
+ 	Simplify x + y == y constructs.
+ 
+ 2026-05-04  Avinal Kumar  <avinal.xlvii@gmail.com>
+ 
+ 	PR tree-optimization/116700
+ 	* match.pd: (A > B ? ABS(A) : B -> MAX(A, B)): New pattern
+ 	for non-negative B.
+ 
+ 2026-05-03  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* tree-chrec.cc (chrec_fold_plus_poly_poly): Move
+ 	rtype definition to right before the use.
+ 
+ 2026-05-03  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+ 
+ 	PR tree-optimization/122569
+ 	* tree-ssa-forwprop.cc (simplify_count_zeroes): Avoid
+ 	shift-by-HOST_BITS_PER_WIDE_INT UB when computing the all-ones
+ 	value for the CLZ validator.
+ 
+ 2026-05-03  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR target/124009
+ 	* config/riscv/iterators.md (scc_0): Add any_lt.
+ 	* config/riscv/zicond.md: Add splitters to select between 2^n and 0.
+ 
+ 2026-05-03  Collin Funk  <collin.funk1@gmail.com>
+ 
+ 	* glimits.h (__STDC_VERSION_LIMITS_H__): Only define the macro
+ 	if it was not already defined.
+ 
+ 2026-05-03  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR target/125152
+ 	* config/riscv/riscv.cc (riscv_expand_conditional_move): Extract the
+ 	mode after operand canonicalization.
+ 
  2026-05-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
  
  	* tree-ssa-phiopt.cc (pass_phiopt::execute): Set cfgcleanup
diff -Nrcpad gcc-17-20260503/gcc/DATESTAMP gcc-17-20260510/gcc/DATESTAMP
*** gcc-17-20260503/gcc/DATESTAMP	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/DATESTAMP	Sun May 10 22:32:05 2026
***************
*** 1 ****
! 20260503
--- 1 ----
! 20260510
diff -Nrcpad gcc-17-20260503/gcc/Makefile.in gcc-17-20260510/gcc/Makefile.in
*** gcc-17-20260503/gcc/Makefile.in	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/Makefile.in	Sun May 10 22:32:05 2026
*************** ANALYZER_OBJS = \
*** 1383,1388 ****
--- 1383,1389 ----
  	analyzer/sm-signal.o \
  	analyzer/sm-taint.o \
  	analyzer/state-purge.o \
+ 	analyzer/state-transition.o \
  	analyzer/store.o \
  	analyzer/supergraph.o \
  	analyzer/supergraph-fixup-locations.o \
*************** TAGS: lang.tags
*** 4848,4853 ****
--- 4849,4855 ----
  	done;						\
  	$(ETAGS) -o TAGS.sub c-family/*.h c-family/*.cc \
  	      *.h *.cc \
+ 	      diagnostics/*.h diagnostics/*.cc text-art/*.h text-art/*.cc \
  	      ../include/*.h ../libiberty/*.c \
  	      ../libcpp/*.cc ../libcpp/include/*.h \
  	      --language=none --regex="/\(char\|unsigned int\|int\|bool\|void\|HOST_WIDE_INT\|enum [A-Za-z_0-9]+\) [*]?\([A-Za-z_0-9]+\)/\2/" common.opt	\
diff -Nrcpad gcc-17-20260503/gcc/ada/ChangeLog gcc-17-20260510/gcc/ada/ChangeLog
*** gcc-17-20260503/gcc/ada/ChangeLog	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/ada/ChangeLog	Sun May 10 22:32:05 2026
***************
*** 1,3 ****
--- 1,9 ----
+ 2026-05-03  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/125168
+ 	* libgnat/s-dorepr__freebsd.adb (Two_Prod): Adjust to renaming.
+ 	(Two_Sqr): Likewise.
+ 
  2026-05-01  Eric Botcazou  <ebotcazou@adacore.com>
  
  	PR ada/87936
diff -Nrcpad gcc-17-20260503/gcc/ada/einfo.ads gcc-17-20260510/gcc/ada/einfo.ads
*** gcc-17-20260503/gcc/ada/einfo.ads	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/ada/einfo.ads	Sun May 10 22:32:05 2026
*************** package Einfo is
*** 3647,3668 ****
  --       type of the object.
  
  --    Lit_Hash [root type only]
! --       Defined in enumeration types and subtypes. Non-empty only for the
! --       case of an enumeration root type, where it contains the entity for
  --       the generated hash function. See unit Exp_Imgv for full details of
  --       the nature and use of this entity for implementing the Value
  --       attribute for the enumeration type in question.
  
! --    Lit_Indexes
! --       Defined in enumeration types and subtypes. Non-empty only for the
! --       case of an enumeration root type, where it contains the entity for
  --       the generated indexes entity. See unit Exp_Imgv for full details of
  --       the nature and use of this entity for implementing the Image and
  --       Value attributes for the enumeration type in question.
  
! --    Lit_Strings
! --       Defined in enumeration types and subtypes. Non-empty only for the
! --       case of an enumeration root type, where it contains the entity for
  --       the literals string entity. See unit Exp_Imgv for full details of
  --       the nature and use of this entity for implementing the Image and
  --       Value attributes for the enumeration type in question.
--- 3647,3665 ----
  --       type of the object.
  
  --    Lit_Hash [root type only]
! --       Defined in enumeration types and subtypes. Contains the entity for
  --       the generated hash function. See unit Exp_Imgv for full details of
  --       the nature and use of this entity for implementing the Value
  --       attribute for the enumeration type in question.
  
! --    Lit_Indexes [root type only]
! --       Defined in enumeration types and subtypes. Contains the entity for
  --       the generated indexes entity. See unit Exp_Imgv for full details of
  --       the nature and use of this entity for implementing the Image and
  --       Value attributes for the enumeration type in question.
  
! --    Lit_Strings [root type only]
! --       Defined in enumeration types and subtypes. Contains the entity for
  --       the literals string entity. See unit Exp_Imgv for full details of
  --       the nature and use of this entity for implementing the Image and
  --       Value attributes for the enumeration type in question.
*************** package Einfo is
*** 5530,5541 ****
     --  E_Enumeration_Subtype
     --    First_Entity $$$ type
     --    Renamed_Object $$$
-    --    Lit_Strings                          (root type only)
     --    First_Literal
     --    Lit_Indexes                          (root type only)
     --    Default_Aspect_Value                 (base type only)
     --    Scalar_Range
-    --    Lit_Hash                             (root type only)
     --    Enum_Pos_To_Rep                      (type only)
     --    Static_Discrete_Predicate
     --    Has_Biased_Representation
--- 5527,5538 ----
     --  E_Enumeration_Subtype
     --    First_Entity $$$ type
     --    Renamed_Object $$$
     --    First_Literal
+    --    Lit_Hash                             (root type only)
     --    Lit_Indexes                          (root type only)
+    --    Lit_Strings                          (root type only)
     --    Default_Aspect_Value                 (base type only)
     --    Scalar_Range
     --    Enum_Pos_To_Rep                      (type only)
     --    Static_Discrete_Predicate
     --    Has_Biased_Representation
diff -Nrcpad gcc-17-20260503/gcc/ada/exp_imgv.adb gcc-17-20260510/gcc/ada/exp_imgv.adb
*** gcc-17-20260503/gcc/ada/exp_imgv.adb	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/ada/exp_imgv.adb	Sun May 10 22:32:05 2026
*************** package body Exp_Imgv is
*** 1061,1071 ****
  
        --  Ada 2022 allows 'Image on private types, so fetch the underlying
        --  type to obtain the structure of the type. We use the base type,
!       --  not the root type for discrete types, to handle properly derived
!       --  types, but we use the root type for enumeration types, because the
!       --  literal map is attached to the root. Should be inherited ???
  
!       if Is_Real_Type (Ptyp) or else Is_Enumeration_Type (Ptyp) then
           Rtyp := Underlying_Type (Root_Type (Ptyp));
        else
           Rtyp := Underlying_Type (Base_Type (Ptyp));
--- 1061,1070 ----
  
        --  Ada 2022 allows 'Image on private types, so fetch the underlying
        --  type to obtain the structure of the type. We use the base type,
!       --  not the root type, for discrete types in order to handle derived
!       --  types, except for character types for which this is not needed.
  
!       if Is_Real_Type (Ptyp) or else Is_Character_Type (Ptyp) then
           Rtyp := Underlying_Type (Root_Type (Ptyp));
        else
           Rtyp := Underlying_Type (Base_Type (Ptyp));
*************** package body Exp_Imgv is
*** 1076,1082 ****
  
        Enum_Case := False;
  
!       if Rtyp = Standard_Boolean then
           --  Use inline expansion if the -gnatd_x switch is not passed to the
           --  compiler. Otherwise expand into a call to the runtime.
  
--- 1075,1081 ----
  
        Enum_Case := False;
  
!       if Is_Boolean_Type (Rtyp) then
           --  Use inline expansion if the -gnatd_x switch is not passed to the
           --  compiler. Otherwise expand into a call to the runtime.
  
diff -Nrcpad gcc-17-20260503/gcc/ada/gen_il-gen-gen_entities.adb gcc-17-20260510/gcc/ada/gen_il-gen-gen_entities.adb
*** gcc-17-20260503/gcc/ada/gen_il-gen-gen_entities.adb	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/ada/gen_il-gen-gen_entities.adb	Sun May 10 22:32:05 2026
*************** begin -- Gen_IL.Gen.Gen_Entities
*** 551,561 ****
         (Sm (First_Literal, Node_Id),
          Sm (Has_Enumeration_Rep_Clause, Flag),
          Sm (Has_Pragma_Ordered, Flag, Impl_Base_Type_Only),
!         Sm (Lit_Indexes, Node_Id),
!         Sm (Lit_Strings, Node_Id),
          Sm (Nonzero_Is_True, Flag, Base_Type_Only,
!             Pre => "Root_Type (N) = Standard_Boolean"),
!         Sm (Lit_Hash, Node_Id, Root_Type_Only)));
  
     Cc (E_Enumeration_Type, Enumeration_Kind,
         --  Enumeration types, created by an enumeration type declaration
--- 551,561 ----
         (Sm (First_Literal, Node_Id),
          Sm (Has_Enumeration_Rep_Clause, Flag),
          Sm (Has_Pragma_Ordered, Flag, Impl_Base_Type_Only),
!         Sm (Lit_Hash, Node_Id, Root_Type_Only),
!         Sm (Lit_Indexes, Node_Id, Root_Type_Only),
!         Sm (Lit_Strings, Node_Id, Root_Type_Only),
          Sm (Nonzero_Is_True, Flag, Base_Type_Only,
!             Pre => "Root_Type (N) = Standard_Boolean")));
  
     Cc (E_Enumeration_Type, Enumeration_Kind,
         --  Enumeration types, created by an enumeration type declaration
diff -Nrcpad gcc-17-20260503/gcc/algol68/a68-parser-taxes.cc gcc-17-20260510/gcc/algol68/a68-parser-taxes.cc
*** gcc-17-20260503/gcc/algol68/a68-parser-taxes.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/algol68/a68-parser-taxes.cc	Sun May 10 22:32:05 2026
*************** is_mappable_routine (const char *z)
*** 142,182 ****
  
    /* Math routines.  */
    ACCEPT (z, "arccos");
-   ACCEPT (z, "arccosdg");
    ACCEPT (z, "arccot");
-   ACCEPT (z, "arccotdg");
    ACCEPT (z, "arcsin");
-   ACCEPT (z, "arcsindg");
    ACCEPT (z, "arctan");
-   ACCEPT (z, "arctandg");
-   ACCEPT (z, "beta");
-   ACCEPT (z, "betainc");
-   ACCEPT (z, "cbrt");
    ACCEPT (z, "cos");
-   ACCEPT (z, "cosdg");
-   ACCEPT (z, "cospi");
-   ACCEPT (z, "cot");
-   ACCEPT (z, "cot");
-   ACCEPT (z, "cotdg");
-   ACCEPT (z, "cotpi");
-   ACCEPT (z, "curt");
-   ACCEPT (z, "erf");
-   ACCEPT (z, "erfc");
    ACCEPT (z, "exp");
-   ACCEPT (z, "gamma");
-   ACCEPT (z, "gammainc");
-   ACCEPT (z, "gammaincg");
-   ACCEPT (z, "gammaincgf");
    ACCEPT (z, "ln");
    ACCEPT (z, "log");
    ACCEPT (z, "pi");
    ACCEPT (z, "sin");
-   ACCEPT (z, "sindg");
-   ACCEPT (z, "sinpi");
    ACCEPT (z, "sqrt");
    ACCEPT (z, "tan");
-   ACCEPT (z, "tandg");
-   ACCEPT (z, "tanpi");
    /* Random generator.  */
    ACCEPT (z, "nextrandom");
    ACCEPT (z, "random");
--- 142,158 ----
diff -Nrcpad gcc-17-20260503/gcc/alloc-pool.h gcc-17-20260510/gcc/alloc-pool.h
*** gcc-17-20260503/gcc/alloc-pool.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/alloc-pool.h	Sun May 10 22:32:05 2026
*************** public:
*** 499,508 ****
  
    /* Allocate memory for instance of type T and call a default constructor.  */
  
!   inline T *
!   allocate () ATTRIBUTE_MALLOC
    {
!     return ::new (m_allocator.allocate ()) T;
    }
  
    /* Allocate memory for instance of type T and return void * that
--- 499,509 ----
  
    /* Allocate memory for instance of type T and call a default constructor.  */
  
!   template<typename... Ts>
!   inline ATTRIBUTE_MALLOC T *
!   allocate (Ts... args)
    {
!     return ::new (m_allocator.allocate ()) T (std::forward<Ts> (args)...);
    }
  
    /* Allocate memory for instance of type T and return void * that
diff -Nrcpad gcc-17-20260503/gcc/analyzer/ChangeLog gcc-17-20260510/gcc/analyzer/ChangeLog
*** gcc-17-20260503/gcc/analyzer/ChangeLog	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/ChangeLog	Sun May 10 22:32:05 2026
***************
*** 1,3 ****
--- 1,275 ----
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* svalue.cc (svalue::make_dump_widget): Show value ranges in
+ 	svalue dumps.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer-logging.h (class text_art::canvas): New forward decl.
+ 	(logger::log_canvas): New decl.
+ 	* diagnostic-manager.cc (path_builder::get_supergraph): New.
+ 	(logger::log_canvas): New.
+ 	(dump_to_logger): New.
+ 	(log_region_model): New.
+ 	(epath_rewind_context::epath_rewind_context): Add params
+ 	src_model and dst_model, using them to initialize m_src_model and
+ 	m_dst_model.
+ 	(epath_rewind_context::get_src_region_model): New.
+ 	(epath_rewind_context::get_dst_region_model): New.
+ 	(epath_rewind_context::m_src_model): New.
+ 	(epath_rewind_context::m_dst_model): New.
+ 	(make_raw_dst_region_model): New.
+ 	(diagnostic_manager::annotate_exploded_path): Walk EPATH forwards,
+ 	populating new vectors src_models and dst_models without state
+ 	purging or merging, so that we can reliably rewind state.  Pass
+ 	these models to epath_rewind_context when rewinding state.
+ 	* engine.cc (interprocedural_call::try_to_rewind_data_flow): Get
+ 	src and dst region_model instances via vfuncs of ctxt, rather than
+ 	accessing the eedge.
+ 	* ops.cc (rewind_context::on_data_origin): Get src and dst
+ 	region_model instances via vfuncs of ctxt, rather than accessing
+ 	the eedge.
+ 	(greturn_op::try_to_rewind_data_flow): Likewise.
+ 	* ops.h (rewind_context::rewind_context): Drop param "eedge".
+ 	(rewind_context::get_src_region_model): New vfunc.
+ 	(rewind_context::get_dst_region_model): New vfunc.
+ 	(rewind_context::m_eedge): Drop field.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* analyzer.cc (printable_expr_p): New.
+ 	* call-info.cc: Include "analyzer/state-transition.h".
+ 	(call_info::add_events_to_path): Add state_transition param.
+ 	* call-info.h (call_info::add_events_to_path): Likewise.
+ 	* callsite-expr.h: New file, based on material from supergraph.h.
+ 	(class callsite_expr_element): New.
+ 	* checker-event.cc: Include "analyzer/callsite-expr.h" and
+ 	"analyzer/state-transition.h".
+ 	(event_kind_to_string): Handle event_kind::state_transition.
+ 	(state_transition_event::print_desc): New.
+ 	(state_transition_event::prepare_for_emission): New.
+ 	(function_entry_event::function_entry_event): Drop.
+ 	(function_entry_event::print_desc): Use any m_state_trans.
+ 	(function_entry_event::prepare_for_emission): New.
+ 	(call_event::call_event): Add "state_trans" param and store it in
+ 	m_state_trans.
+ 	(call_event::print_desc): Use m_state_trans if present to call
+ 	describe_call_with_state, adding a fallback wording for
+ 	pending_diagnostic subclasses that don't implement it.
+ 	(call_event::prepare_for_emission): New, storing event id into
+ 	state_transition.
+ 	(return_event::return_event): Add "state_trans" param and store it
+ 	in m_state_trans.
+ 	(return_event::print_desc): Use m_state_trans if present to call
+ 	describe_return_of_state.
+ 	(return_event::prepare_for_emission): New, storing event id into
+ 	state_transition.
+ 	* checker-event.h (enum class event_kind): Add state_transition.
+ 	(class state_transition_event): New.
+ 	(function_entry_event::function_entry_event): Add "state_trans"
+ 	param and store it in m_state_trans.  Drop 2nd ctor.
+ 	(function_entry_event::prepare_for_emission): New decl.
+ 	(function_entry_event::get_state_transition_at_call): New.
+ 	(function_entry_event::m_state_trans): New.
+ 	(call_event::call_event): Add "state_trans" param.
+ 	(call_event::prepare_for_emission): New decl.
+ 	(call_event::get_state_transition_at_call): New.
+ 	(call_event::m_state_trans): New.
+ 	(return_event::return_event): Add "state_trans" param.
+ 	(return_event::prepare_for_emission): New decl.
+ 	(return_event::m_state_trans): New.
+ 	* common.h: Define INCLUDE_ALGORITHM.
+ 	(class state_transition): New forward decl
+ 	(class state_transition_at_call): New forward decl
+ 	(class state_transition_at_return): New forward decl
+ 	(printable_expr_p): New decl.
+ 	(struct diagnostic_state): New.
+ 	(struct rewind_context): New forward decl.
+ 	(custom_edge_info::add_events_to_path): Add "state_trans" param.
+ 	(try_to_rewind_data_flow): New vfunc.
+ 	* diagnostic-manager.cc (compatible_epath_p): Update for change
+ 	from m_edges to m_elements.
+ 	(diagnostic_manager::emit_saved_diagnostic):  Make "epath"
+ 	non-const.  Call annotate_exploded_path on it and log before and
+ 	after.  Update for new param to add_events_for_eedge.
+ 	(class epath_rewind_context): New.
+ 	(diagnostic_manager::annotate_exploded_path): New.
+ 	(diagnostic_manager::build_emission_path): Update for change from
+ 	m_edges to m_elements.  Pass any state transition to
+ 	add_events_for_eedge.
+ 	(diagnostic_manager::add_events_for_eedge): Add "state_trans"
+ 	parameter.  Pass it when creating events, and if we don't create
+ 	an event referencing it, make a state_transition_event for it.
+ 	(diagnostic_manager::prune_for_sm_diagnostic): Handl
+ 	event_kind::state_transition.
+ 	* diagnostic-manager.h (saved_diagnostic::get_best_epath): Drop
+ 	"const" from return value.
+ 	(diagnostic_manager::annotate_exploded_path): New decl.
+ 	(diagnostic_manager::add_events_for_eedge): Add "state_trans"
+ 	param.
+ 	* engine.cc: Include "pretty-print-markup.h".
+ 	(leak_ploc_fixer_for_epath::fixup_for_epath): Update for change
+ 	from m_edges to m_elements.
+ 	(throw_custom_edge::add_events_to_path): Add state_transition
+ 	param.
+ 	(unwind_custom_edge::add_events_to_path): Likewise.
+ 	(interprocedural_call::print): Use get_gcall.
+ 	(interprocedural_call::update_model): Likewise.
+ 	(interprocedural_call::add_events_to_path): Likewise.  Pass
+ 	state_transition if of correct subclass.
+ 	(interprocedural_call::try_to_rewind_data_flow): New.
+ 	(interprocedural_call::get_gcall): New.
+ 	(interprocedural_return::add_events_to_path): Add state_transition
+ 	param and pass if of correct subclass.
+ 	(interprocedural_return::try_to_rewind_data_flow): New.
+ 	(tainted_args_function_info::add_events_to_path): Add
+ 	state_transition param.
+ 	(tainted_args_call_info::add_events_to_path): Likewise.
+ 	* event-loc-info.h (event_loc_info_for_function_entry): New decl.
+ 	* exploded-graph.h (interprocedural_call::interprocedural_call):
+ 	Pass and store call_and_return_op rather than gcall.
+ 	(interprocedural_call::add_events_to_path): Add state_trans param.
+ 	(interprocedural_call::try_to_rewind_data_flow): New.
+ 	(interprocedural_call::m_call_stmt): Replace with...
+ 	(interprocedural_call::m_op): ...this.
+ 	(interprocedural_return::add_events_to_path): Add state_trans
+ 	param.
+ 	(interprocedural_return::try_to_rewind_data_flow): New.
+ 	(rewind_info_t::add_events_to_path): New.
+ 	* exploded-path.cc (exploded_path::exploded_path): Drop explicit
+ 	copy ctor.
+ 	(diagnostic_state::dump_to_pp): New.
+ 	(diagnostic_state::dump): New.
+ 	(exploded_path::find_stmt_backwards): Update for change from
+ 	m_edges to m_elements.
+ 	(exploded_path::get_final_enode): Likewise.
+ 	(exploded_path::feasible_p): Likewise.
+ 	(exploded_path::dump_to_pp): Likewise.  Dump state transitions.
+ 	(exploded_path::maybe_log): New.
+ 	(exploded_path::reverse): New.
+ 	* exploded-path.h: Include "analyzer/checker-event.h" and
+ 	"analyzer/state-transition.h".
+ 	(struct exploded_path::element_t): New.
+ 	(exploded_path::exploded_path): Replace ctors with "= default".
+ 	(exploded_path::length): Reimplement.
+ 	(exploded_path::maybe_log): New decl.
+ 	(exploded_path::append_edge): New.
+ 	(exploded_path::reverse): New.
+ 	(exploded_path::m_edges): Replace with...
+ 	(exploded_path::m_elements): ...this, using std::vector rather
+ 	than auto_vec.
+ 	* feasible-graph.cc (feasible_graph::make_epath): Update for
+ 	change from m_edges to m_elements.
+ 	* infinite-recursion.cc
+ 	(infinite_recursion_diagnostic::add_function_entry_event): Add
+ 	"state_trans" param and pass it to base class call.
+ 	(recursive_function_entry_event::recursive_function_entry_event):
+ 	Pass nullptr for state transition.
+ 	* ops.cc: Include "analyzer/callsite-expr.h" and
+ 	"analyzer/state-transition.h".
+ 	(event_loc_info_for_function_entry): New.
+ 	(rewind_context::on_data_origin): New.
+ 	(rewind_context::on_data_flow): New.
+ 	(gassign_op::try_to_rewind_data_flow): New.
+ 	(greturn_op::try_to_rewind_data_flow): New.
+ 	(call_and_return_op::execute): Update for change to
+ 	interprocedural_call.
+ 	(call_and_return_op::try_to_rewind_data_flow): New.
+ 	(phis_for_edge_op::try_to_rewind_data_flow): New.
+ 	* ops.h (struct rewind_context): New.
+ 	(operation::try_to_rewind_data_flow): New vfunc.
+ 	(gassign_op::try_to_rewind_data_flow): New.
+ 	(predict_op::try_to_rewind_data_flow): New.
+ 	(greturn_op::try_to_rewind_data_flow): New.
+ 	(call_and_return_op::try_to_rewind_data_flow): New.
+ 	(control_flow_op::try_to_rewind_data_flow): New.
+ 	(phis_for_edge_op::try_to_rewind_data_flow): New.
+ 	* pending-diagnostic.cc (interesting_t::add_read_region): New.
+ 	(interesting_t::dump_to_pp): Dump m_read_regions.
+ 	(pending_diagnostic::add_function_entry_event): Add "state_trans"
+ 	param and pass it to function_entry_event.  Call
+ 	event_loc_info_for_function_entry.
+ 	(pending_diagnostic::add_call_event): Add "state_trans" param and
+ 	pass it to call_event.
+ 	* pending-diagnostic.h: Include "analyzer/state-transition.h".
+ 	(struct interesting_t): Update leading comment.
+ 	(interesting_t::add_read_region): New.
+ 	(interesting_t::m_read_regions): New.
+ 	(struct origin_of_state): New.
+ 	(call_with_state::call_with_state): Add state_trans param and use
+ 	it to initialize m_state_trans and m_src_event_id.
+ 	(call_with_state::m_state_trans): New field.
+ 	(call_with_state::m_src_event_id): New field.
+ 	(return_of_state::return_of_state): Add state_trans param and use
+ 	it to initialize m_state_trans and m_src_event_id.
+ 	(return_of_state::m_state_trans): New field.
+ 	(return_of_state::m_src_event_id): New field.
+ 	(struct copy_of_state): New.
+ 	(struct use_of_state): New.
+ 	(pending_diagnostic::describe_origin_of_state): New vfunc.
+ 	(pending_diagnostic::describe_copy_of_state): New vfunc.
+ 	(pending_diagnostic::describe_use_of_state): New vfunc.
+ 	(pending_diagnostic::add_function_entry_event): Add "state_trans"
+ 	param.
+ 	(pending_diagnostic::add_call_event): Likewise.
+ 	* poisoned-value-diagnostic.cc
+ 	(poisoned_value_diagnostic::mark_interesting_stuff): Add call to
+ 	add_read_region.
+ 	* region-model.cc: Include "analyzer/state-transition.h".
+ 	(callsite_expr::maybe_get_param_location): New.
+ 	(callsite_expr::get_param_tree): New.
+ 	(div_by_zero_diagnostic::div_by_zero_diagnostic): Add
+ 	"divisor_reg" param and use it to initialize m_divisor_reg.
+ 	(div_by_zero_diagnostic::mark_interesting_stuff): New.
+ 	(div_by_zero_diagnostic::add_function_entry_event): New.
+ 	(div_by_zero_diagnostic::describe_origin_of_state): New.
+ 	(div_by_zero_diagnostic::describe_call_with_state): New.
+ 	(div_by_zero_diagnostic::describe_return_of_state): New.
+ 	(div_by_zero_diagnostic::describe_copy_of_state): New.
+ 	(div_by_zero_diagnostic::describe_use_of_state): New.
+ 	(div_by_zero_diagnostic::m_divisor_reg): New field.
+ 	(region_model::get_gassign_result): Pass region to calls to
+ 	make_shift_count_negative_diagnostic,
+ 	make_shift_count_overflow_diagnostic, and
+ 	div_by_zero_diagnostic.
+ 	(exception_thrown_from_unrecognized_call::add_events_to_path): Add
+ 	state_transition param.
+ 	* region-model.h (make_shift_count_negative_diagnostic): Add
+ 	"src_region" param.
+ 	(make_shift_count_overflow_diagnostic): Likewise.
+ 	* region.h: Include "analyzer/store.h" and
+ 	"text-art/tree-widget.h".
+ 	* setjmp-longjmp.cc (rewind_info_t::add_events_to_path): Add
+ 	state_transition param.
+ 	* shift-diagnostics.cc
+ 	(shift_count_negative_diagnostic::shift_count_negative_diagnostic):
+ 	Add src_region param and use it to initialize m_src_region.
+ 	(shift_count_negative_diagnostic::mark_interesting_stuff): New.
+ 	(shift_count_negative_diagnostic::m_src_region): New.
+ 	(make_shift_count_negative_diagnostic): Add src_region param.
+ 	(shift_count_overflow_diagnostic::shift_count_overflow_diagnostic):
+ 	Add src_region param and use it to initialize m_src_region.
+ 	(shift_count_overflow_diagnostic::mark_interesting_stuff): New.
+ 	(shift_count_overflow_diagnostic::m_src_region): New field.
+ 	(make_shift_count_overflow_diagnostic): Add src_region param.
+ 	* sm-signal.cc (signal_delivery_edge_info_t::add_events_to_path):
+ 	Add state_transition param.
+ 	* state-transition.cc: New file.
+ 	* state-transition.h: New file.
+ 	* supergraph.h (class callsite_expr): Move to callsite-expr.h.
+ 	* varargs.cc (va_arg_diagnostic::add_call_event): Add state_trans
+ 	param.
+ 
+ 2026-05-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* kf.cc (kf_strcasecmp::impl_call_post): Remove unused variable.
+ 
+ 2026-05-04  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* svalue.cc (binop_svalue::maybe_get_value_range): Update for
+ 	renaming of value_range::set_type to value_range::set_range_class.
+ 	(unaryop_svalue::maybe_get_value_range): Likewise.
+ 
  2026-04-28  David Malcolm  <dmalcolm@redhat.com>
  
  	PR analyzer/124217
diff -Nrcpad gcc-17-20260503/gcc/analyzer/analyzer-logging.h gcc-17-20260510/gcc/analyzer/analyzer-logging.h
*** gcc-17-20260503/gcc/analyzer/analyzer-logging.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/analyzer-logging.h	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 25,30 ****
--- 25,32 ----
  
  #include "diagnostic-core.h"
  
+ namespace text_art { class canvas; }
+ 
  namespace ana {
  
  /* A logger encapsulates a logging stream: a way to send
*************** class logger
*** 50,55 ****
--- 52,59 ----
      ATTRIBUTE_GCC_DIAG(2, 0);
    void end_log_line ();
  
+   void log_canvas (const text_art::canvas &);
+ 
    void enter_scope (const char *scope_name);
    void enter_scope (const char *scope_name, const char *fmt, va_list *ap)
      ATTRIBUTE_GCC_DIAG(3, 0);
diff -Nrcpad gcc-17-20260503/gcc/analyzer/analyzer.cc gcc-17-20260510/gcc/analyzer/analyzer.cc
*** gcc-17-20260503/gcc/analyzer/analyzer.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/analyzer.cc	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 29,34 ****
--- 29,44 ----
  
  namespace ana {
  
+ bool
+ printable_expr_p (const_tree expr)
+ {
+   if (TREE_CODE (expr) == SSA_NAME
+       && !SSA_NAME_VAR (expr))
+     return false;
+ 
+   return true;
+ }
+ 
  /* Workaround for missing location information for some stmts,
     which ultimately should be solved by fixing the frontends
     to provide the locations (TODO).  */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/call-info.cc gcc-17-20260510/gcc/analyzer/call-info.cc
*** gcc-17-20260503/gcc/analyzer/call-info.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/call-info.cc	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 43,48 ****
--- 43,49 ----
  #include "analyzer/exploded-graph.h"
  #include "analyzer/call-details.h"
  #include "analyzer/call-info.h"
+ #include "analyzer/state-transition.h"
  
  #if ENABLE_ANALYZER
  
*************** call_info::print (pretty_printer *pp) co
*** 96,102 ****
  void
  call_info::add_events_to_path (checker_path *emission_path,
  			       const exploded_edge &eedge,
! 			       pending_diagnostic &) const
  {
    class call_event : public custom_event
    {
--- 97,104 ----
  void
  call_info::add_events_to_path (checker_path *emission_path,
  			       const exploded_edge &eedge,
! 			       pending_diagnostic &,
! 			       const state_transition *) const
  {
    class call_event : public custom_event
    {
*************** call_info::add_events_to_path (checker_p
*** 121,126 ****
--- 123,132 ----
    tree caller_fndecl = src_point.get_fndecl ();
    const int stack_depth = src_point.get_stack_depth ();
  
+   /* TODO: we don't yet make use of the state_transition (if any), as
+      doing so presumably requires a combinatorial explosion of
+      known functions vs pending diagnostics.  */
+ 
    emission_path->add_event
      (std::make_unique<call_event> (event_loc_info (get_call_stmt ().location,
  						   caller_fndecl,
diff -Nrcpad gcc-17-20260503/gcc/analyzer/call-info.h gcc-17-20260510/gcc/analyzer/call-info.h
*** gcc-17-20260503/gcc/analyzer/call-info.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/call-info.h	Sun May 10 22:32:05 2026
*************** public:
*** 33,39 ****
    void print (pretty_printer *pp) const override;
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd) const override;
  
    const gcall &get_call_stmt () const { return m_call_stmt; }
    tree get_fndecl () const { return m_fndecl; }
--- 33,40 ----
    void print (pretty_printer *pp) const override;
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd,
! 			   const state_transition *state_trans) const override;
  
    const gcall &get_call_stmt () const { return m_call_stmt; }
    tree get_fndecl () const { return m_fndecl; }
diff -Nrcpad gcc-17-20260503/gcc/analyzer/callsite-expr.h gcc-17-20260510/gcc/analyzer/callsite-expr.h
*** gcc-17-20260503/gcc/analyzer/callsite-expr.h	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/analyzer/callsite-expr.h	Sun May 10 22:32:05 2026
***************
*** 0 ****
--- 1,104 ----
+ /* User-facing descriptions of expressions at call sites.
+    Copyright (C) 2019-2026 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_CALLSITE_EXPR_H
+ #define GCC_ANALYZER_CALLSITE_EXPR_H
+ 
+ #include "pretty-print-markup.h"
+ 
+ namespace ana {
+ 
+ /* An ID representing an expression at a callsite:
+    either a parameter index, or the return value (or unknown).  */
+ 
+ class callsite_expr
+ {
+  public:
+   callsite_expr () : m_val (-1) {}
+ 
+   static callsite_expr from_zero_based_param (int idx)
+   {
+     return callsite_expr (idx + 1);
+   }
+ 
+   static callsite_expr from_return_value ()
+   {
+     return callsite_expr (0);
+   }
+ 
+   bool param_p () const
+   {
+     return m_val > 0;
+   }
+ 
+   /* Get 1-based param number.  */
+   int param_num () const
+   {
+     gcc_assert (param_p ());
+     return m_val;
+   }
+ 
+   tree get_param_tree (tree fndecl) const;
+ 
+   bool
+   maybe_get_param_location (tree fndecl,
+ 			    location_t *out_loc) const;
+ 
+   bool return_value_p () const
+   {
+     return m_val == 0;
+   }
+ 
+  private:
+   callsite_expr (int val) : m_val (val) {}
+ 
+   int m_val; /* 1-based parm, 0 for return value, or -1 for "unknown".  */
+ };
+ 
+ class callsite_expr_element : public pp_element
+ {
+ public:
+   callsite_expr_element (callsite_expr expr) : m_expr (expr) {}
+ 
+   void
+   add_to_phase_2 (pp_markup::context &ctxt) final override
+   {
+ 
+     if (m_expr.return_value_p ())
+       pp_string (&ctxt.m_pp, "return value");
+     else if (m_expr.param_p ())
+       {
+ 	/* We can't call pp_printf directly on ctxt.m_pp from within
+ 	   formatting.  As a workaround, work with a clone of the pp.  */
+ 	std::unique_ptr<pretty_printer> pp (ctxt.m_pp.clone ());
+ 	pp_printf (pp.get (), "parameter %i", m_expr.param_num ());
+ 	pp_string (&ctxt.m_pp, pp_formatted_text (pp.get ()));
+       }
+     else
+       pp_string (&ctxt.m_pp, "unknown");
+   }
+ 
+ private:
+   callsite_expr m_expr;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_CALLSITE_EXPR_H */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/checker-event.cc gcc-17-20260510/gcc/analyzer/checker-event.cc
*** gcc-17-20260503/gcc/analyzer/checker-event.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/checker-event.cc	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 45,50 ****
--- 45,52 ----
  #include "analyzer/constraint-manager.h"
  #include "analyzer/checker-event.h"
  #include "analyzer/exploded-graph.h"
+ #include "analyzer/callsite-expr.h"
+ #include "analyzer/state-transition.h"
  
  #if ENABLE_ANALYZER
  
*************** event_kind_to_string (enum event_kind ek
*** 67,72 ****
--- 69,76 ----
        return "stmt";
      case event_kind::region_creation:
        return "region_creation";
+     case event_kind::state_transition:
+       return "state_transition";
      case event_kind::function_entry:
        return "function_entry";
      case event_kind::state_change:
*************** statement_event::print_desc (pretty_prin
*** 301,306 ****
--- 305,398 ----
    pp_gimple_stmt_1 (&pp, m_stmt, 0, (dump_flags_t)0);
  }
  
+ /* class state_transition_event : public checker_event.  */
+ 
+ void
+ state_transition_event::print_desc (pretty_printer &pp) const
+ {
+   gcc_assert (m_state_trans);
+   switch (m_state_trans->get_kind ())
+     {
+     default:
+       gcc_unreachable ();
+     case state_transition::kind::origin:
+       {
+ 	const state_transition_origin &state_trans
+ 	  = *static_cast <const state_transition_origin *> (m_state_trans);
+ 	if (m_pending_diagnostic)
+ 	  {
+ 	    evdesc::origin_of_state evd (state_trans.m_dst_reg_expr);
+ 	    if (m_pending_diagnostic->describe_origin_of_state (pp, evd))
+ 	      return;
+ 	  }
+ 	pp_printf (&pp, "value originates here");
+       }
+       break;
+ 
+     case state_transition::kind::at_call:
+     case state_transition::kind::at_return:
+       // These should be handled by call_event and return_event
+       gcc_unreachable ();
+       break;
+ 
+     case state_transition::kind::copy:
+       {
+ 	const state_transition_copy &state_trans
+ 	  = *static_cast <const state_transition_copy *> (m_state_trans);
+ 	if (m_pending_diagnostic)
+ 	  {
+ 	    evdesc::copy_of_state evd (state_trans.m_src_reg_expr,
+ 				       state_trans.get_src_event_id (),
+ 				       state_trans.m_dst_reg_expr);
+ 	    if (m_pending_diagnostic->describe_copy_of_state (pp, evd))
+ 	      return;
+ 	  }
+ 	auto event_id = state_trans.get_src_event_id ();
+ 	if (event_id.known_p ())
+ 	  pp_printf (&pp, "copying value from %@ from %qE to %qE",
+ 		     &event_id,
+ 		     state_trans.m_src_reg_expr,
+ 		     state_trans.m_dst_reg_expr);
+ 	else
+ 	  pp_printf (&pp, "copying value from %qE to %qE",
+ 		     state_trans.m_src_reg_expr,
+ 		     state_trans.m_dst_reg_expr);
+       }
+       break;
+     case state_transition::kind::use:
+       {
+ 	const state_transition_use &state_trans
+ 	  = *static_cast <const state_transition_use *> (m_state_trans);
+ 	if (m_pending_diagnostic)
+ 	  {
+ 	    evdesc::use_of_state evd (state_trans.m_src_reg_expr,
+ 				      state_trans.get_src_event_id ());
+ 	    if (m_pending_diagnostic->describe_use_of_state (pp, evd))
+ 	      return;
+ 	  }
+ 	auto event_id = state_trans.get_src_event_id ();
+ 	if (state_trans.get_src_event_id ().known_p ())
+ 	  pp_printf (&pp, "using value from %@ from %qE",
+ 		     &event_id,
+ 		     state_trans.m_src_reg_expr);
+ 	else
+ 	  pp_printf (&pp, "using value from %qE",
+ 		     state_trans.m_src_reg_expr);
+       }
+       break;
+     }
+ }
+ 
+ void
+ state_transition_event::
+ prepare_for_emission (checker_path *path,
+ 		      pending_diagnostic *pd,
+ 		      diagnostics::paths::event_id_t emission_id)
+ {
+   checker_event::prepare_for_emission (path, pd, emission_id);
+   const_cast<state_transition *> (m_state_trans)->m_event_id = emission_id;
+ }
+ 
  /* class region_creation_event : public checker_event.  */
  
  region_creation_event::region_creation_event (const event_loc_info &loc_info)
*************** region_creation_event_debug::print_desc
*** 376,391 ****
  
  /* class function_entry_event : public checker_event.  */
  
- function_entry_event::function_entry_event (const program_point &dst_point,
- 					    const program_state &state)
- : checker_event (event_kind::function_entry,
- 		 event_loc_info (dst_point.get_location (),
- 				 dst_point.get_fndecl (),
- 				 dst_point.get_stack_depth ())),
-   m_state (state)
- {
- }
- 
  /* Implementation of diagnostics::paths::event::print_desc vfunc for
     function_entry_event.
  
--- 468,473 ----
*************** function_entry_event::function_entry_eve
*** 394,399 ****
--- 476,500 ----
  void
  function_entry_event::print_desc (pretty_printer &pp) const
  {
+   if (m_state_trans)
+     {
+       callsite_expr expr = m_state_trans->get_callsite_expr ();
+       if (tree parm = expr.get_param_tree (m_effective_fndecl))
+ 	{
+ 	  auto src_event_id = m_state_trans->get_src_event_id ();
+ 	  if (src_event_id.known_p ())
+ 	    pp_printf (&pp,
+ 		       "entry to %qE with problematic value from %@ for %qE",
+ 		       m_effective_fndecl,
+ 		       &src_event_id,
+ 		       parm);
+ 	  else
+ 	    pp_printf (&pp, "entry to %qE with problematic value for %qE",
+ 		       m_effective_fndecl, parm);
+ 	  return;
+ 	}
+     }
+ 
    pp_printf (&pp, "entry to %qE", m_effective_fndecl);
  }
  
*************** function_entry_event::get_meaning () con
*** 406,411 ****
--- 507,523 ----
    return meaning (verb::enter, noun::function);
  }
  
+ void
+ function_entry_event::
+ prepare_for_emission (checker_path *path,
+ 		      pending_diagnostic *pd,
+ 		      diagnostics::paths::event_id_t emission_id)
+ {
+   checker_event::prepare_for_emission (path, pd, emission_id);
+   if (m_state_trans)
+     const_cast<state_transition_at_call *> (m_state_trans)->m_event_id = emission_id;
+ }
+ 
  /* class state_change_event : public checker_event.  */
  
  /* state_change_event's ctor.  */
*************** catch_cfg_edge_event::get_meaning () con
*** 730,737 ****
  /* call_event's ctor.  */
  
  call_event::call_event (const exploded_edge &eedge,
! 			const event_loc_info &loc_info)
! : superedge_event (event_kind::call_, eedge, loc_info)
  {
     m_src_snode = eedge.m_src->get_supernode ();
     m_dest_snode = eedge.m_dest->get_supernode ();
--- 842,851 ----
  /* call_event's ctor.  */
  
  call_event::call_event (const exploded_edge &eedge,
! 			const event_loc_info &loc_info,
! 			const state_transition_at_call *state_trans)
! : superedge_event (event_kind::call_, eedge, loc_info),
!   m_state_trans (state_trans)
  {
     m_src_snode = eedge.m_src->get_supernode ();
     m_dest_snode = eedge.m_dest->get_supernode ();
*************** call_event::call_event (const exploded_e
*** 751,766 ****
  void
  call_event::print_desc (pretty_printer &pp) const
  {
!   if (m_critical_state.m_state && m_pending_diagnostic)
      {
!       gcc_assert (m_critical_state.m_var);
!       tree var = fixup_tree_for_diagnostic (m_critical_state.m_var);
!       evdesc::call_with_state evd (m_src_snode->m_fun->decl,
! 				   m_dest_snode->m_fun->decl,
! 				   var,
! 				   m_critical_state.m_state);
!       if (m_pending_diagnostic->describe_call_with_state (pp, evd))
! 	return;
      }
  
    pp_printf (&pp,
--- 865,914 ----
  void
  call_event::print_desc (pretty_printer &pp) const
  {
!   if (m_pending_diagnostic)
      {
!       if (m_critical_state.m_state)
! 	{
! 	  gcc_assert (m_critical_state.m_var);
! 	  tree var = fixup_tree_for_diagnostic (m_critical_state.m_var);
! 	  evdesc::call_with_state evd (m_src_snode->m_fun->decl,
! 				       m_dest_snode->m_fun->decl,
! 				       var,
! 				       m_critical_state.m_state,
! 				       m_state_trans);
! 	  if (m_pending_diagnostic->describe_call_with_state (pp, evd))
! 	    return;
! 	}
!       else if (m_state_trans)
! 	{
! 	  evdesc::call_with_state evd (m_src_snode->m_fun->decl,
! 				       m_dest_snode->m_fun->decl,
! 				       NULL_TREE, nullptr,
! 				       m_state_trans);
! 	  if (m_pending_diagnostic->describe_call_with_state (pp, evd))
! 	    return;
! 	  callsite_expr expr = m_state_trans->get_callsite_expr ();
! 	  if (expr.param_p ())
! 	    {
! 	      auto src_event_id = m_state_trans->get_src_event_id ();
! 	      if (src_event_id.known_p ())
! 		pp_printf (&pp,
! 			   "passing problematic value from %@ from %qE to %qE"
! 			   " via parameter %i",
! 			   &src_event_id,
! 			   get_caller_fndecl (),
! 			   get_callee_fndecl (),
! 			   expr.param_num ());
! 	      else
! 		pp_printf (&pp,
! 			   "passing problematic value from %qE to %qE"
! 			   " via parameter %i",
! 			   get_caller_fndecl (),
! 			   get_callee_fndecl (),
! 			   expr.param_num ());
! 	      return;
! 	    }
! 	}
      }
  
    pp_printf (&pp,
*************** call_event::get_program_state () const
*** 806,819 ****
    return &m_eedge.m_src->get_state ();
  }
  
  /* class return_event : public checker_event.  */
  
  /* return_event's ctor.  */
  
  return_event::return_event (const exploded_edge &eedge,
! 			    const event_loc_info &loc_info)
  : checker_event (event_kind::return_, loc_info),
!   m_eedge (eedge)
  {
    m_src_snode = eedge.m_src->get_supernode ();
    m_dest_snode = eedge.m_dest->get_supernode ();
--- 954,979 ----
    return &m_eedge.m_src->get_state ();
  }
  
+ void
+ call_event::prepare_for_emission (checker_path *path,
+ 				  pending_diagnostic *pd,
+ 				  diagnostics::paths::event_id_t emission_id)
+ {
+   checker_event::prepare_for_emission (path, pd, emission_id);
+   if (m_state_trans)
+     const_cast<state_transition_at_call *> (m_state_trans)->m_event_id = emission_id;
+ }
+ 
  /* class return_event : public checker_event.  */
  
  /* return_event's ctor.  */
  
  return_event::return_event (const exploded_edge &eedge,
! 			    const event_loc_info &loc_info,
! 			    const state_transition_at_return *state_trans)
  : checker_event (event_kind::return_, loc_info),
!   m_eedge (eedge),
!   m_state_trans (state_trans)
  {
    m_src_snode = eedge.m_src->get_supernode ();
    m_dest_snode = eedge.m_dest->get_supernode ();
*************** return_event::print_desc (pretty_printer
*** 839,852 ****
        state involved in the pending diagnostic, give the pending
        diagnostic a chance to describe this return (in terms of
        itself).  */
!   if (m_critical_state.m_state && m_pending_diagnostic)
      {
!       evdesc::return_of_state evd (m_dest_snode->m_fun->decl,
! 				   m_src_snode->m_fun->decl,
! 				   m_critical_state.m_state);
!       if (m_pending_diagnostic->describe_return_of_state (pp, evd))
! 	return;
      }
    pp_printf (&pp,
  	     "returning to %qE from %qE",
  	     m_dest_snode->m_fun->decl,
--- 999,1026 ----
        state involved in the pending diagnostic, give the pending
        diagnostic a chance to describe this return (in terms of
        itself).  */
!   if (m_pending_diagnostic)
      {
!       if (m_critical_state.m_state)
! 	{
! 	  evdesc::return_of_state evd (m_dest_snode->m_fun->decl,
! 				       m_src_snode->m_fun->decl,
! 				       m_critical_state.m_state,
! 				       nullptr);
! 	  if (m_pending_diagnostic->describe_return_of_state (pp, evd))
! 	    return;
! 	}
!       else if (m_state_trans)
! 	{
! 	  evdesc::return_of_state evd (m_dest_snode->m_fun->decl,
! 				       m_src_snode->m_fun->decl,
! 				       nullptr,
! 				       m_state_trans);
! 	  if (m_pending_diagnostic->describe_return_of_state (pp, evd))
! 	    return;
! 	}
      }
+ 
    pp_printf (&pp,
  	     "returning to %qE from %qE",
  	     m_dest_snode->m_fun->decl,
*************** return_event::get_program_state () const
*** 876,881 ****
--- 1050,1065 ----
    return &m_eedge.m_dest->get_state ();
  }
  
+ void
+ return_event::prepare_for_emission (checker_path *path,
+ 				    pending_diagnostic *pd,
+ 				    diagnostics::paths::event_id_t emission_id)
+ {
+   checker_event::prepare_for_emission (path, pd, emission_id);
+   if (m_state_trans)
+     const_cast<state_transition_at_return *> (m_state_trans)->m_event_id = emission_id;
+ }
+ 
  /* class start_consolidated_cfg_edges_event : public checker_event.  */
  
  void
diff -Nrcpad gcc-17-20260503/gcc/analyzer/checker-event.h gcc-17-20260510/gcc/analyzer/checker-event.h
*** gcc-17-20260503/gcc/analyzer/checker-event.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/checker-event.h	Sun May 10 22:32:05 2026
*************** enum class event_kind
*** 37,42 ****
--- 37,43 ----
    custom,
    stmt,
    region_creation,
+   state_transition,
    function_entry,
    state_change,
    start_cfg_edge,
*************** extern const char *event_kind_to_string
*** 68,73 ****
--- 69,75 ----
         custom_event (event_kind::custom)
  	 precanned_custom_event
         statement_event (event_kind::stmt)
+        state_transition_event (event_kind::data_flow)
         region_creation_event (event_kind::region_creation)
         function_entry_event (event_kind::function_entry)
         state_change_event (event_kind::state_change)
*************** public:
*** 245,250 ****
--- 247,277 ----
    const program_state m_dst_state;
  };
  
+ /* A concrete checker_event subclass referencing a state_transition,
+    for cases where the state_transition doesn't already have its own event.  */
+ 
+ class state_transition_event : public checker_event
+ {
+ public:
+   state_transition_event (const event_loc_info &loc_info,
+ 			  const state_transition *state_trans)
+   : checker_event (event_kind::state_transition, loc_info),
+     m_state_trans (state_trans)
+   {
+     gcc_assert (m_state_trans);
+   }
+ 
+   void print_desc (pretty_printer &) const final override;
+ 
+   void prepare_for_emission (checker_path *path,
+ 			     pending_diagnostic *pd,
+ 			     diagnostics::paths::event_id_t emission_id) final override;
+ 
+ private:
+   // borrowed from the exploded_path
+   const state_transition *m_state_trans;
+ };
+ 
  /* An abstract event subclass describing the creation of a region that
     is significant for a diagnostic.
  
*************** class function_entry_event : public chec
*** 352,366 ****
  {
  public:
    function_entry_event (const event_loc_info &loc_info,
! 			const program_state &state)
    : checker_event (event_kind::function_entry, loc_info),
!     m_state (state)
    {
    }
  
-   function_entry_event (const program_point &dst_point,
- 			const program_state &state);
- 
    void print_desc (pretty_printer &pp) const override;
    meaning get_meaning () const override;
  
--- 379,392 ----
  {
  public:
    function_entry_event (const event_loc_info &loc_info,
! 			const program_state &state,
! 			const state_transition_at_call *state_trans)
    : checker_event (event_kind::function_entry, loc_info),
!     m_state (state),
!     m_state_trans (state_trans)
    {
    }
  
    void print_desc (pretty_printer &pp) const override;
    meaning get_meaning () const override;
  
*************** public:
*** 372,379 ****
--- 398,414 ----
      return &m_state;
    }
  
+   void
+   prepare_for_emission (checker_path *path,
+ 			pending_diagnostic *pd,
+ 			diagnostics::paths::event_id_t emission_id) final override;
+ 
+   const state_transition_at_call *
+   get_state_transition_at_call () const { return m_state_trans; }
+ 
  private:
    const program_state &m_state;
+   const state_transition_at_call *m_state_trans;
  };
  
  /* Subclass of checker_event describing a state change.  */
*************** class call_event : public superedge_even
*** 558,564 ****
  {
  public:
    call_event (const exploded_edge &eedge,
! 	      const event_loc_info &loc_info);
  
    void print_desc (pretty_printer &pp) const override;
    meaning get_meaning () const override;
--- 593,600 ----
  {
  public:
    call_event (const exploded_edge &eedge,
! 	      const event_loc_info &loc_info,
! 	      const state_transition_at_call *state_trans);
  
    void print_desc (pretty_printer &pp) const override;
    meaning get_meaning () const override;
*************** public:
*** 568,573 ****
--- 604,614 ----
    const program_state *
    get_program_state () const final override;
  
+   void
+   prepare_for_emission (checker_path *path,
+ 			pending_diagnostic *pd,
+ 			diagnostics::paths::event_id_t emission_id) final override;
+ 
    /* Mark this edge event as being either an interprocedural call or
       return in which VAR is in STATE, and that this is critical to the
       diagnostic (so that print_desc can attempt to get a better description
*************** public:
*** 577,582 ****
--- 618,626 ----
      m_critical_state = critical_state (var, state);
    }
  
+   const state_transition_at_call *
+   get_state_transition_at_call () const { return m_state_trans; }
+ 
  protected:
    tree get_caller_fndecl () const;
    tree get_callee_fndecl () const;
*************** protected:
*** 584,589 ****
--- 628,634 ----
    const supernode *m_src_snode;
    const supernode *m_dest_snode;
    critical_state m_critical_state;
+   const state_transition_at_call *m_state_trans;
  };
  
  /* A concrete event subclass for an interprocedural return.  */
*************** class return_event : public checker_even
*** 592,598 ****
  {
  public:
    return_event (const exploded_edge &eedge,
! 		const event_loc_info &loc_info);
  
    void print_desc (pretty_printer &pp) const final override;
    meaning get_meaning () const override;
--- 637,644 ----
  {
  public:
    return_event (const exploded_edge &eedge,
! 		const event_loc_info &loc_info,
! 		const state_transition_at_return *state_trans);
  
    void print_desc (pretty_printer &pp) const final override;
    meaning get_meaning () const override;
*************** public:
*** 608,613 ****
--- 654,664 ----
    const program_state *
    get_program_state () const override;
  
+   void
+   prepare_for_emission (checker_path *path,
+ 			pending_diagnostic *pd,
+ 			diagnostics::paths::event_id_t emission_id) final override;
+ 
    /* Mark this edge event as being either an interprocedural call or
       return in which VAR is in STATE, and that this is critical to the
       diagnostic (so that print_desc can attempt to get a better description
*************** public:
*** 622,627 ****
--- 673,679 ----
    const supernode *m_dest_snode;
    const call_and_return_op *m_call_and_return_op;
    critical_state m_critical_state;
+   const state_transition_at_return *m_state_trans;
  };
  
  /* A concrete event subclass for the start of a consolidated run of CFG
diff -Nrcpad gcc-17-20260503/gcc/analyzer/common.h gcc-17-20260510/gcc/analyzer/common.h
*** gcc-17-20260503/gcc/analyzer/common.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/common.h	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 22,27 ****
--- 22,28 ----
  #define GCC_ANALYZER_COMMON_H
  
  #include "config.h"
+ #define INCLUDE_ALGORITHM
  #define INCLUDE_LIST
  #define INCLUDE_MAP
  #define INCLUDE_SET
*************** class call_summary;
*** 139,144 ****
--- 140,148 ----
  class call_summary_replay;
  struct per_function_data;
  struct interesting_t;
+ class state_transition;
+   class state_transition_at_call;
+   class state_transition_at_return;
  class uncertainty_t;
  
  class feasible_node;
*************** extern void dump_tree (pretty_printer *p
*** 155,160 ****
--- 159,165 ----
  extern void dump_quoted_tree (pretty_printer *pp, tree t);
  extern void print_quoted_type (pretty_printer *pp, tree t);
  extern void print_expr_for_user (pretty_printer *pp, tree t);
+ extern bool printable_expr_p (const_tree expr);
  extern int readability_comparator (const void *p1, const void *p2);
  extern int tree_cmp (const void *p1, const void *p2);
  extern tree fixup_tree_for_diagnostic (tree);
*************** enum class access_direction
*** 374,379 ****
--- 379,422 ----
    write
  };
  
+ /* State tracked along an execution path that's pertinent to a specific
+    diagnostic (e.g. for a divide-by-zero warning where the zero value
+    comes from).  */
+ 
+ struct diagnostic_state
+ {
+   diagnostic_state ()
+   : m_region_holding_value (nullptr)
+   {
+   }
+ 
+   diagnostic_state (std::string debug_desc,
+ 		   const region *region_holding_value)
+   : m_debug_desc (std::move (debug_desc)),
+     m_region_holding_value (region_holding_value)
+   {
+   }
+ 
+   void dump_to_pp (pretty_printer *) const;
+   void dump () const;
+ 
+   bool
+   operator== (const diagnostic_state &other) const
+   {
+     return m_region_holding_value == other.m_region_holding_value;
+   }
+   bool
+   operator!= (const diagnostic_state &other) const
+   {
+     return !(*this == other);
+   }
+ 
+   std::string m_debug_desc;
+   const region *m_region_holding_value;
+ };
+ 
+ struct rewind_context;
+ 
  /* Abstract base class for associating custom data with an
     exploded_edge, for handling non-standard edges such as
     rewinding from a longjmp, signal handlers, etc.
*************** public:
*** 406,418 ****
  
    virtual void add_events_to_path (checker_path *emission_path,
  				   const exploded_edge &eedge,
! 				   pending_diagnostic &pd) const = 0;
  
    virtual exploded_node *create_enode (exploded_graph &eg,
  				       const program_point &point,
  				       program_state &&state,
  				       exploded_node *enode_for_diag,
  				       region_model_context *ctxt) const;
  };
  
  /* Abstract base class for splitting state.
--- 449,468 ----
  
    virtual void add_events_to_path (checker_path *emission_path,
  				   const exploded_edge &eedge,
! 				   pending_diagnostic &pd,
! 				   const state_transition *state_trans) const = 0;
  
    virtual exploded_node *create_enode (exploded_graph &eg,
  				       const program_point &point,
  				       program_state &&state,
  				       exploded_node *enode_for_diag,
  				       region_model_context *ctxt) const;
+ 
+   virtual bool
+   try_to_rewind_data_flow (rewind_context &) const
+   {
+     return false;
+   }
  };
  
  /* Abstract base class for splitting state.
diff -Nrcpad gcc-17-20260503/gcc/analyzer/diagnostic-manager.cc gcc-17-20260510/gcc/analyzer/diagnostic-manager.cc
*** gcc-17-20260503/gcc/analyzer/diagnostic-manager.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/diagnostic-manager.cc	Sun May 10 22:32:05 2026
*************** compatible_epath_p (const exploded_path
*** 917,923 ****
        while (lhs_eedge_idx >= 0)
  	{
  	  /* Find LHS_PATH's next superedge.  */
! 	  lhs_eedge = lhs_path->m_edges[lhs_eedge_idx];
  	  if (lhs_eedge->m_sedge)
  	    break;
  	  else
--- 917,923 ----
        while (lhs_eedge_idx >= 0)
  	{
  	  /* Find LHS_PATH's next superedge.  */
! 	  lhs_eedge = lhs_path->m_elements[lhs_eedge_idx].m_eedge;
  	  if (lhs_eedge->m_sedge)
  	    break;
  	  else
*************** compatible_epath_p (const exploded_path
*** 926,932 ****
        while (rhs_eedge_idx >= 0)
  	{
  	  /* Find RHS_PATH's next superedge.  */
! 	  rhs_eedge = rhs_path->m_edges[rhs_eedge_idx];
  	  if (rhs_eedge->m_sedge)
  	    break;
  	  else
--- 926,932 ----
        while (rhs_eedge_idx >= 0)
  	{
  	  /* Find RHS_PATH's next superedge.  */
! 	  rhs_eedge = rhs_path->m_elements[rhs_eedge_idx].m_eedge;
  	  if (rhs_eedge->m_sedge)
  	    break;
  	  else
*************** public:
*** 1087,1092 ****
--- 1087,1095 ----
  
    const state_machine *get_sm () const { return m_sd.m_sm; }
  
+   const supergraph &
+   get_supergraph () const { return m_eg.get_supergraph (); }
+ 
  private:
    typedef reachability<eg_traits> enode_reachability;
  
*************** diagnostic_manager::emit_saved_diagnosti
*** 1555,1567 ****
         sd.get_index (), sd.m_d->get_kind (), sd.get_supernode ()->m_id);
    log ("num dupes: %i", sd.get_num_dupes ());
  
!   const exploded_path *epath = sd.get_best_epath ();
    gcc_assert (epath);
  
    /* Precompute all enodes from which the diagnostic is reachable.  */
    path_builder pb (eg, *epath, sd.get_feasibility_problem (), sd);
  
!   /* This is the diagnostics::paths::path subclass that will be built for
       the diagnostic.  */
    checker_path emission_path (get_logical_location_manager (),
  			      eg.get_ext_state (),
--- 1558,1577 ----
         sd.get_index (), sd.m_d->get_kind (), sd.get_supernode ()->m_id);
    log ("num dupes: %i", sd.get_num_dupes ());
  
!   exploded_path *epath = sd.get_best_epath ();
    gcc_assert (epath);
  
+   epath->maybe_log (get_logger (), "best epath");
+ 
    /* Precompute all enodes from which the diagnostic is reachable.  */
    path_builder pb (eg, *epath, sd.get_feasibility_problem (), sd);
  
!   /* Annotate EPATH with information specific to the diagnostic, such
!      as pertinent data flow events.  */
!   annotate_exploded_path (pb, *epath);
!   epath->maybe_log (get_logger (), "best epath with annotations");
! 
!   /* This is the diagnostics::paths::path instance that will be built for
       the diagnostic.  */
    checker_path emission_path (get_logical_location_manager (),
  			      eg.get_ext_state (),
*************** diagnostic_manager::emit_saved_diagnosti
*** 1589,1595 ****
       trailing eedge stashed, add any events for it.  This is for use
       in handling longjmp, to show where a longjmp is rewinding to.  */
    if (sd.m_trailing_eedge)
!     add_events_for_eedge (pb, *sd.m_trailing_eedge, &emission_path, nullptr);
  
    emission_path.inject_any_inlined_call_events (get_logger ());
  
--- 1599,1606 ----
       trailing eedge stashed, add any events for it.  This is for use
       in handling longjmp, to show where a longjmp is rewinding to.  */
    if (sd.m_trailing_eedge)
!     add_events_for_eedge (pb, *sd.m_trailing_eedge, &emission_path, nullptr,
! 			  nullptr);
  
    emission_path.inject_any_inlined_call_events (get_logger ());
  
*************** diagnostic_manager::get_logical_location
*** 1640,1645 ****
--- 1651,1992 ----
    return *mgr;
  }
  
+ /* Dump C to this logger, indenting each line by the current
+    indentation level.  */
+ 
+ void
+ logger::log_canvas (const text_art::canvas &c)
+ {
+   std::string per_line_prefix (m_indent_level, ' ');
+   c.print_to_pp (get_printer (), per_line_prefix.c_str ());
+   pp_flush (get_printer ());
+ }
+ 
+ /* Dump OBJ to LOGGER, using OBJ's make_dump_widget member function.  */
+ 
+ template <typename T>
+ void
+ dump_to_logger (const T &obj,
+ 		logger *logger,
+ 		const char *label)
+ {
+   if (!logger)
+     return;
+   text_art::theme *theme = global_dc->get_diagram_theme ();
+   if (!theme)
+     return;
+ 
+   logger->log ("%s:", label);
+   logger->inc_indent ();
+ 
+   text_art::style_manager sm;
+   text_art::style tree_style (text_art::get_style_from_color_cap_name ("note"));
+ 
+   text_art::style::id_t tree_style_id (sm.get_or_create_id (tree_style));
+ 
+   text_art::dump_widget_info dwi (sm, *theme, tree_style_id);
+   if (auto w = obj.make_dump_widget (dwi))
+     {
+       text_art::canvas c (w->to_canvas (dwi.m_sm));
+       logger->log_canvas (c);
+     }
+ 
+   logger->dec_indent ();
+ }
+ 
+ static void
+ log_region_model (logger *logger,
+ 		  const char *label,
+ 		  const region_model &model)
+ {
+   dump_to_logger<region_model> (model, logger, label);
+ }
+ 
+ class epath_rewind_context : public rewind_context
+ {
+ public:
+   epath_rewind_context (logger *logger,
+ 			diagnostic_state input_state,
+ 			state_transition *&last_state_transition,
+ 			exploded_path::element_t &epath_element,
+ 			const region_model &src_model,
+ 			const region_model &dst_model)
+   : rewind_context (logger, input_state),
+     m_last_state_transition (last_state_transition),
+     m_epath_element (epath_element),
+     m_src_model (src_model),
+     m_dst_model (dst_model)
+   {
+   }
+ 
+   const region_model &
+   get_src_region_model () const final override
+   {
+     return m_src_model;
+   }
+ 
+   const region_model &
+   get_dst_region_model () const final override
+   {
+     return m_dst_model;
+   }
+ 
+   bool
+   could_be_affected_by_write_p (tree lhs) final override
+   {
+     if (!m_input.m_region_holding_value)
+       return false;
+ 
+     if (TREE_CODE (lhs) == SSA_NAME)
+       if (tree decl = m_input.m_region_holding_value->maybe_get_decl ())
+ 	return decl == lhs;
+ 
+     return true;
+   }
+ 
+   void
+   add_state_transition (std::unique_ptr<state_transition> st) final override
+   {
+     gcc_assert (st.get ());
+     if (m_logger)
+       {
+ 	m_logger->start_log_line ();
+ 	m_logger->log_partial ("adding state transition: ");
+ 	st->dump_to_pp (m_logger->get_printer ());
+ 	m_logger->end_log_line ();
+       }
+ 
+     /* Chain up the state_transition instances, so that each state transition
+        has a pointer to the one that occurred before it (but was created after
+        it, since we are rewinding the epath).  */
+     if (m_last_state_transition)
+       m_last_state_transition->m_prev_state_transition = st.get ();
+     m_last_state_transition = st.get ();
+ 
+     m_epath_element.m_state_transition = std::move (st);
+   }
+ 
+ private:
+   state_transition *&m_last_state_transition;
+   exploded_path::element_t &m_epath_element;
+   const region_model &m_src_model;
+   const region_model &m_dst_model;
+ };
+ 
+ /* Return a region_model for the state after any operation/custom_edge_info
+    on EEDGE, but without state purging or state merging.  Use SRC_MODEL as
+    the source state.
+ 
+    We do this to make it easier to rewind state transitions in
+    diagnostic_manager::annotate_exploded_path.  */
+ 
+ static region_model
+ make_raw_dst_region_model (logger *logger,
+ 			   const exploded_edge *eedge,
+ 			   const region_model &src_model,
+ 			   const supergraph &sg)
+ {
+   LOG_SCOPE (logger);
+ 
+   region_model_context *const ctxt = nullptr;
+ 
+   if (logger)
+     {
+       log_region_model (logger, "src_model", src_model);
+       log_region_model (logger, "dst_model",
+ 			*eedge->m_dest->get_state ().m_region_model);
+     }
+ 
+   if (eedge->m_custom_info)
+     {
+       if (logger)
+ 	{
+ 	  logger->start_log_line ();
+ 	  eedge->m_custom_info->print (logger->get_printer ());
+ 	  logger->end_log_line ();
+ 	}
+       region_model new_model (src_model);
+       eedge->m_custom_info->update_model (&new_model, eedge, ctxt);
+       if (logger)
+ 	log_region_model (logger, "new model after custom_info", new_model);
+       return new_model;
+     }
+   else
+     {
+       const superedge *sedge = eedge->m_sedge;
+       if (sedge)
+ 	{
+ 	  if (logger)
+ 	    {
+ 	      label_text desc (sedge->get_description (false));
+ 	      logger->log ("  sedge: SN:%i -> SN:%i %s",
+ 			   sedge->m_src->m_id,
+ 			   sedge->m_dest->m_id,
+ 			   desc.get ());
+ 	    }
+ 
+ 	  if (auto op = sedge->get_op ())
+ 	    {
+ 	      if (logger)
+ 		{
+ 		  logger->start_log_line ();
+ 		  op->print_as_edge_label (logger->get_printer (), false);
+ 		  logger->end_log_line ();
+ 		}
+ 	      feasibility_state fs (src_model, sg);
+ 	      op->execute_for_feasibility (*eedge,
+ 					   fs,
+ 					   ctxt,
+ 					   nullptr);
+ 	      log_region_model (logger, "after operation, fs model",
+ 				fs.get_model ());
+ 	      return fs.get_model ();
+ 	    }
+ 	  else
+ 	    {
+ 	      if (logger)
+ 		logger->log ("null operation, using src_model");
+ 	      return src_model;
+ 	    }
+ 	}
+       else
+ 	{
+ 	  /* Special-case the initial eedge from the origin node to the
+ 	     initial function by pushing a frame for it.  */
+ 	  if (eedge->m_src->m_index == 0)
+ 	    {
+ 	      function *fun = eedge->m_dest->get_function ();
+ 	      gcc_assert (fun);
+ 	      region_model new_model (src_model);
+ 	      new_model.push_frame (*fun, nullptr, nullptr, ctxt);
+ 	      if (logger)
+ 		{
+ 		  logger->log ("  pushing frame for %qD", fun->decl);
+ 		  log_region_model (logger, "new model", new_model);
+ 		}
+ 	      return new_model;
+ 	    }
+ 	}
+     }
+ 
+   return src_model;
+ }
+ 
+ /* Populate the elements of EPATH with diagnostic_state and state_transition
+    information pertinent to the pending diagnostic.  */
+ 
+ void
+ diagnostic_manager::annotate_exploded_path (const path_builder &pb,
+ 					    exploded_path &epath) const
+ {
+   auto logger = get_logger ();
+   LOG_SCOPE (logger);
+ 
+   // TODO: consolidate this with build_emission_path?
+   interesting_t interest;
+   pb.get_pending_diagnostic ()->mark_interesting_stuff (&interest);
+ 
+   gcc_assert (epath.m_elements.size () > 0);
+ 
+   diagnostic_state curr_state;
+   state_transition *last_state_transition = nullptr;
+ 
+   if (interest.m_read_regions.size () > 0)
+     curr_state = interest.m_read_regions[0];
+ 
+   /* Walk EPATH forwards, generating region_model instances for the elements
+      of EPATH without state purging or merging, so that we can reliably
+      rewind state.  */
+   std::vector<region_model> src_models;
+   std::vector<region_model> dst_models;
+   for (int idx = 0; idx < epath.m_elements.size (); ++idx)
+     {
+       auto eedge = epath.m_elements[idx].m_eedge;
+       if (logger)
+ 	logger->log ("edge[%i]: considering EN %i -> EN %i",
+ 		     idx,
+ 		     eedge->m_src->m_index,
+ 		     eedge->m_dest->m_index);
+       region_model src_model (pb.get_ext_state ().get_model_manager ());
+       if (idx > 0)
+ 	src_model = dst_models[idx - 1];
+       src_models.push_back (src_model);
+       dst_models.push_back
+ 	(make_raw_dst_region_model (logger,
+ 				    eedge,
+ 				    src_model,
+ 				    pb.get_supergraph ()));
+     }
+ 
+   /* Walk EPATH backwards, using the region_models we just built,
+      propagating annotation information backwards.  */
+   for (int idx = epath.m_elements.size () - 1; idx >= 0; --idx)
+     {
+       exploded_path::element_t &iter_element = epath.m_elements[idx];
+       if (logger)
+ 	{
+ 	  logger->log ("edge[%i]: considering rewinding EN %i -> EN %i",
+ 		       idx,
+ 		       iter_element.m_eedge->m_src->m_index,
+ 		       iter_element.m_eedge->m_dest->m_index);
+ 	  logger->start_log_line ();
+ 	  logger->log_partial ("curr_state: ");
+ 	  curr_state.dump_to_pp (logger->get_printer ());
+ 	  logger->end_log_line ();
+ 	}
+       iter_element.m_state_at_dst = curr_state;
+       const exploded_edge *eedge = iter_element.m_eedge;
+       gcc_assert (eedge);
+ 
+       epath_rewind_context ctxt (logger, curr_state,
+ 				 last_state_transition, iter_element,
+ 				 src_models[idx], dst_models[idx]);
+       if (eedge->m_custom_info)
+ 	{
+ 	  if (logger)
+ 	    {
+ 	      logger->start_log_line ();
+ 	      logger->log_partial ("custom_edge_info: ");
+ 	      eedge->m_custom_info->print (logger->get_printer ());
+ 	      logger->end_log_line ();
+ 	    }
+ 	  if (!eedge->m_custom_info->try_to_rewind_data_flow (ctxt))
+ 	    {
+ 	      if (logger)
+ 		logger->log ("could not rewind custom info");
+ 	      return;
+ 	    }
+ 	}
+       else if (const operation *op = eedge->maybe_get_op ())
+ 	{
+ 	  if (logger)
+ 	    {
+ 	      logger->start_log_line ();
+ 	      logger->log_partial ("op: ");
+ 	      op->print_as_edge_label (logger->get_printer (), false);
+ 	      logger->end_log_line ();
+ 	    }
+ 	  if (!op->try_to_rewind_data_flow (ctxt))
+ 	    {
+ 	      if (logger)
+ 		logger->log ("could not rewind op");
+ 	      return;
+ 	    }
+ 	}
+ 
+       iter_element.m_state_at_src = ctxt.m_output;
+       curr_state = ctxt.m_output;
+       if (logger)
+ 	{
+ 	  logger->log ("rewound");
+ 	  logger->start_log_line ();
+ 	  logger->log_partial ("curr_state: ");
+ 	  curr_state.dump_to_pp (logger->get_printer ());
+ 	  logger->end_log_line ();
+ 	}
+     }
+ }
+ 
  /* Emit a "path" of events to EMISSION_PATH describing the exploded path
     EPATH within EG.  */
  
*************** diagnostic_manager::build_emission_path
*** 1683,1692 ****
    }
  
    /* Walk EPATH, adding events as appropriate.  */
!   for (unsigned i = 0; i < epath.m_edges.length (); i++)
      {
!       const exploded_edge *eedge = epath.m_edges[i];
!       add_events_for_eedge (pb, *eedge, emission_path, &interest);
      }
    add_event_on_final_node (pb, epath.get_final_enode (),
  			   emission_path, &interest);
--- 2030,2041 ----
    }
  
    /* Walk EPATH, adding events as appropriate.  */
!   for (unsigned i = 0; i < epath.m_elements.size (); ++i)
      {
!       const exploded_edge *eedge = epath.m_elements[i].m_eedge;
!       gcc_assert (eedge);
!       add_events_for_eedge (pb, *eedge, emission_path, &interest,
! 			    epath.m_elements[i].m_state_transition.get ());
      }
    add_event_on_final_node (pb, epath.get_final_enode (),
  			   emission_path, &interest);
*************** void
*** 1895,1901 ****
  diagnostic_manager::add_events_for_eedge (const path_builder &pb,
  					  const exploded_edge &eedge,
  					  checker_path *emission_path,
! 					  interesting_t *interest) const
  {
    const exploded_node *src_node = eedge.m_src;
    const program_point &src_point = src_node->get_point ();
--- 2244,2251 ----
  diagnostic_manager::add_events_for_eedge (const path_builder &pb,
  					  const exploded_edge &eedge,
  					  checker_path *emission_path,
! 					  interesting_t *interest,
! 					  const state_transition *state_trans) const
  {
    const exploded_node *src_node = eedge.m_src;
    const program_point &src_point = src_node->get_point ();
*************** diagnostic_manager::add_events_for_eedge
*** 1913,1923 ****
--- 2263,2281 ----
        src_point.print (pp, format (false));
        pp_string (pp, "-> ");
        dst_point.print (pp, format (false));
+       if (state_trans)
+ 	{
+ 	  pp_string (pp, " {");
+ 	  state_trans->dump_to_pp (pp);
+ 	  pp_string (pp, "}");
+ 	}
        get_logger ()->end_log_line ();
      }
    const program_state &src_state = src_node->get_state ();
    const program_state &dst_state = dst_node->get_state ();
  
+   bool created_event_for_state_trans = false;
+ 
    /* Add state change events for the states that have changed.
       We add these before events for superedges, so that if we have a
       state_change_event due to following an edge, we'll get this sequence
*************** diagnostic_manager::add_events_for_eedge
*** 1946,1956 ****
    /* Allow non-standard edges to add events, e.g. when rewinding from
       longjmp to a setjmp.  */
    if (eedge.m_custom_info)
!     eedge.m_custom_info->add_events_to_path (emission_path, eedge, *pd);
  
    /* Don't add events for insignificant edges at verbosity levels below 3.  */
    if (m_verbosity < 3)
!     if (!significant_edge_p (pb, eedge))
        return;
  
    /* Add events for operations.  */
--- 2304,2318 ----
    /* Allow non-standard edges to add events, e.g. when rewinding from
       longjmp to a setjmp.  */
    if (eedge.m_custom_info)
!     {
!       eedge.m_custom_info->add_events_to_path (emission_path, eedge, *pd,
! 					       state_trans);
!       created_event_for_state_trans = true;
!     }
  
    /* Don't add events for insignificant edges at verbosity levels below 3.  */
    if (m_verbosity < 3)
!     if (!significant_edge_p (pb, eedge) && !state_trans)
        return;
  
    /* Add events for operations.  */
*************** diagnostic_manager::add_events_for_eedge
*** 1962,1968 ****
    if (dst_point.get_supernode ()->entry_p ())
      {
        pb.get_pending_diagnostic ()->add_function_entry_event
! 	(eedge, emission_path);
        /* Create region_creation_events for on-stack regions within
  	 this frame.  */
        if (interest)
--- 2324,2334 ----
    if (dst_point.get_supernode ()->entry_p ())
      {
        pb.get_pending_diagnostic ()->add_function_entry_event
! 	(eedge, emission_path,
! 	 (state_trans
! 	  ? state_trans->dyn_cast_state_transition_at_call ()
! 	  : nullptr));
!       created_event_for_state_trans = true;
        /* Create region_creation_events for on-stack regions within
  	 this frame.  */
        if (interest)
*************** diagnostic_manager::add_events_for_eedge
*** 2028,2033 ****
--- 2394,2407 ----
  	}
      }
  
+   /* If we have a state transition and haven't yet created an
+      event that describes it, do so now.  */
+   if (state_trans && !created_event_for_state_trans)
+     emission_path->add_event
+       (std::make_unique<state_transition_event>
+        (eedge.m_src->get_point (),
+ 	state_trans));
+ 
    if (pb.get_feasibility_problem ()
        && &pb.get_feasibility_problem ()->m_eedge == &eedge)
      {
*************** diagnostic_manager::prune_for_sm_diagnos
*** 2241,2246 ****
--- 2615,2635 ----
  	  /* Don't filter these.  */
  	  break;
  
+ 	case event_kind::state_transition:
+ 	  /* Prune these if they have an empty description.  */
+ 	  {
+ 	    tree_dump_pretty_printer pp (nullptr);
+ 	    base_event->print_desc (pp);
+ 	    if (strlen (pp_formatted_text (&pp)) == 0)
+ 	      {
+ 		log (("filtering event %i:"
+ 		      " state_transition_event with empty description"),
+ 		     idx);
+ 		path->delete_event (idx);
+ 	      }
+ 	  }
+ 	  break;
+ 
  	case event_kind::function_entry:
  	  if (m_verbosity < 1)
  	    {
diff -Nrcpad gcc-17-20260503/gcc/analyzer/diagnostic-manager.h gcc-17-20260510/gcc/analyzer/diagnostic-manager.h
*** gcc-17-20260503/gcc/analyzer/diagnostic-manager.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/diagnostic-manager.h	Sun May 10 22:32:05 2026
*************** public:
*** 101,107 ****
    }
  
    bool calc_best_epath (epath_finder *pf);
!   const exploded_path *get_best_epath () const { return m_best_epath.get (); }
    unsigned get_epath_length () const;
  
    void add_duplicate (saved_diagnostic *other);
--- 101,107 ----
    }
  
    bool calc_best_epath (epath_finder *pf);
!   exploded_path *get_best_epath () const { return m_best_epath.get (); }
    unsigned get_epath_length () const;
  
    void add_duplicate (saved_diagnostic *other);
*************** private:
*** 201,206 ****
--- 201,210 ----
    const diagnostics::logical_locations::manager &
    get_logical_location_manager () const;
  
+   void
+   annotate_exploded_path (const path_builder &pb,
+ 			  exploded_path &epath) const;
+ 
    void build_emission_path (const path_builder &pb,
  			    const exploded_path &epath,
  			    checker_path *emission_path) const;
*************** private:
*** 213,219 ****
    void add_events_for_eedge (const path_builder &pb,
  			     const exploded_edge &eedge,
  			     checker_path *emission_path,
! 			     interesting_t *interest) const;
  
    bool significant_edge_p (const path_builder &pb,
  			   const exploded_edge &eedge) const;
--- 217,224 ----
    void add_events_for_eedge (const path_builder &pb,
  			     const exploded_edge &eedge,
  			     checker_path *emission_path,
! 			     interesting_t *interest,
! 			     const state_transition *state_trans) const;
  
    bool significant_edge_p (const path_builder &pb,
  			   const exploded_edge &eedge) const;
diff -Nrcpad gcc-17-20260503/gcc/analyzer/engine.cc gcc-17-20260510/gcc/analyzer/engine.cc
*** gcc-17-20260503/gcc/analyzer/engine.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/engine.cc	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 37,42 ****
--- 37,43 ----
  #include "gimple-predict.h"
  #include "context.h"
  #include "channels.h"
+ #include "pretty-print-markup.h"
  
  #include "text-art/dump.h"
  
*************** public:
*** 308,317 ****
  	       after the SSA name was set? (if any).  */
  
  	    for (unsigned idx = idx_of_def_stmt + 1;
! 		 idx < epath.m_edges.length ();
  		 ++idx)
  	      {
! 		const exploded_edge *eedge = epath.m_edges[idx];
  		if (logger)
  		  logger->log ("eedge[%i]: EN %i -> EN %i",
  			       idx,
--- 309,318 ----
  	       after the SSA name was set? (if any).  */
  
  	    for (unsigned idx = idx_of_def_stmt + 1;
! 		 idx < epath.m_elements.size ();
  		 ++idx)
  	      {
! 		const exploded_edge *eedge = epath.m_elements[idx].m_eedge;
  		if (logger)
  		  logger->log ("eedge[%i]: EN %i -> EN %i",
  			       idx,
*************** public:
*** 352,361 ****
  	  retval = gimple_return_retval (return_stmt);
  
  	log_scope sentinel (logger, "walking backward along epath");
! 	int idx;
! 	const exploded_edge *eedge;
! 	FOR_EACH_VEC_ELT_REVERSE (epath.m_edges, idx, eedge)
  	  {
  	    if (logger)
  	      {
  		logger->log ("eedge[%i]: EN %i -> EN %i",
--- 353,362 ----
  	  retval = gimple_return_retval (return_stmt);
  
  	log_scope sentinel (logger, "walking backward along epath");
! 	for (int idx = epath.m_elements.size () - 1; idx >= 0; --idx)
  	  {
+ 	    const exploded_path::element_t &element = epath.m_elements[idx];
+ 	    const exploded_edge *eedge = element.m_eedge;
  	    if (logger)
  	      {
  		logger->log ("eedge[%i]: EN %i -> EN %i",
*************** private:
*** 403,412 ****
    {
      LOG_SCOPE (logger);
  
!     int idx;
!     const exploded_edge *eedge;
!     FOR_EACH_VEC_ELT_REVERSE (epath.m_edges, idx, eedge)
        {
  	if (eedge->m_src->get_stack_depth ()
  	    != eedge->m_dest->get_stack_depth ())
  	  {
--- 404,413 ----
    {
      LOG_SCOPE (logger);
  
!     for (int idx = epath.m_elements.size () - 1; idx >= 0; --idx)
        {
+ 	const exploded_path::element_t &element = epath.m_elements[idx];
+ 	const exploded_edge *eedge = element.m_eedge;
  	if (eedge->m_src->get_stack_depth ()
  	    != eedge->m_dest->get_stack_depth ())
  	  {
*************** public:
*** 1319,1325 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &) const final override
    {
      const exploded_node *dst_node = eedge.m_dest;
      const program_point &dst_point = dst_node->get_point ();
--- 1320,1327 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &,
! 			   const state_transition *) const final override
    {
      const exploded_node *dst_node = eedge.m_dest;
      const program_point &dst_point = dst_node->get_point ();
*************** public:
*** 1369,1375 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &) const final override
    {
      const exploded_node *src_node = eedge.m_src;
      const program_point &src_point = src_node->get_point ();
--- 1371,1378 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &,
! 			   const state_transition *) const final override
    {
      const exploded_node *src_node = eedge.m_src;
      const program_point &src_point = src_node->get_point ();
*************** void
*** 1644,1650 ****
  interprocedural_call::print (pretty_printer *pp) const
  {
    pp_string (pp, "call to ");
!   pp_gimple_stmt_1 (pp, &m_call_stmt, 0, (dump_flags_t)0);
  }
  
  void
--- 1647,1653 ----
  interprocedural_call::print (pretty_printer *pp) const
  {
    pp_string (pp, "call to ");
!   pp_gimple_stmt_1 (pp, &get_gcall (), 0, (dump_flags_t)0);
  }
  
  void
*************** interprocedural_call::update_model (regi
*** 1667,1682 ****
  				    const exploded_edge */*eedge*/,
  				    region_model_context *ctxt) const
  {
!   model->update_for_gcall (m_call_stmt, ctxt, &m_callee_fun);
    return true;
  }
  
  void
  interprocedural_call::add_events_to_path (checker_path *emission_path,
  					  const exploded_edge &eedge,
! 					  pending_diagnostic &pd) const
  {
!   pd.add_call_event (eedge, m_call_stmt, *emission_path);
  }
  
  // class interprocedural_return : public custom_edge_info
--- 1670,1737 ----
  				    const exploded_edge */*eedge*/,
  				    region_model_context *ctxt) const
  {
!   model->update_for_gcall (get_gcall (), ctxt, &m_callee_fun);
    return true;
  }
  
  void
  interprocedural_call::add_events_to_path (checker_path *emission_path,
  					  const exploded_edge &eedge,
! 					  pending_diagnostic &pd,
! 					  const state_transition *state_trans) const
  {
!   pd.add_call_event (eedge, get_gcall (), *emission_path,
! 		     (state_trans
! 		      ? state_trans->dyn_cast_state_transition_at_call ()
! 		      : nullptr));
! }
! 
! bool
! interprocedural_call::try_to_rewind_data_flow (rewind_context &ctxt) const
! {
!   auto logger = ctxt.m_logger;
! 
!   // Rewind from params to arguments
!   if (ctxt.m_input.m_region_holding_value)
!     {
!       const region_model &dst_enode_model = ctxt.get_dst_region_model ();
!       tree dst_tree
! 	= dst_enode_model.get_representative_tree
! 	    (ctxt.m_input.m_region_holding_value);
!       if (dst_tree)
! 	{
! 	  callsite_expr expr;
! 	  tree src_tree
! 	    = m_op.map_expr_from_callee_to_caller (m_callee_fun.decl,
! 						   dst_tree,
! 						   &expr);
! 	  if (src_tree)
! 	    {
! 	      const region_model &src_enode_model = ctxt.get_src_region_model ();
! 	      ctxt.m_output.m_region_holding_value
! 		= src_enode_model.get_lvalue (src_tree, nullptr);
! 
! 	      ctxt.add_state_transition
! 		(std::make_unique<state_transition_at_call> (expr));
! 
! 	      if (logger)
! 		{
! 		  callsite_expr_element e (expr);
! 		  logger->log ("updating m_region_holding_value from %qE to %qE"
! 			       " (callsite_expr: %e)",
! 			       dst_tree, src_tree, &e);
! 		}
! 	    }
! 	}
!     }
! 
!   return true;
! }
! 
! const gcall &
! interprocedural_call::get_gcall () const
! {
!   return m_op.get_gcall ();
  }
  
  // class interprocedural_return : public custom_edge_info
*************** interprocedural_return::update_model (re
*** 1715,1721 ****
  void
  interprocedural_return::add_events_to_path (checker_path *emission_path,
  					    const exploded_edge &eedge,
! 					    pending_diagnostic &) const
  {
    const program_point &dst_point = eedge.m_dest->get_point ();
    emission_path->add_event
--- 1770,1777 ----
  void
  interprocedural_return::add_events_to_path (checker_path *emission_path,
  					    const exploded_edge &eedge,
! 					    pending_diagnostic &,
! 					    const state_transition *state_trans) const
  {
    const program_point &dst_point = eedge.m_dest->get_point ();
    emission_path->add_event
*************** interprocedural_return::add_events_to_pa
*** 1723,1729 ****
         (eedge,
  	event_loc_info (m_call_stmt.location,
  			dst_point.get_fndecl (),
! 			dst_point.get_stack_depth ())));
  }
  
  /* class exploded_edge : public dedge<eg_traits>.  */
--- 1779,1806 ----
         (eedge,
  	event_loc_info (m_call_stmt.location,
  			dst_point.get_fndecl (),
! 			dst_point.get_stack_depth ()),
! 	(state_trans
! 	 ? state_trans->dyn_cast_state_transition_at_return ()
! 	 : nullptr)));
! }
! 
! bool
! interprocedural_return::try_to_rewind_data_flow (rewind_context &ctxt) const
! {
!   auto logger = ctxt.m_logger;
! 
!   tree lhs = gimple_call_lhs (&m_call_stmt);
!   if (!lhs)
!     return true;
! 
!   const region_model &src_enode_model = ctxt.get_src_region_model ();
!   tree fndecl = src_enode_model.get_current_function ()->decl;
!   tree fn_result = DECL_RESULT (fndecl);
! 
!   ctxt.on_data_flow (DECL_RESULT (fndecl), lhs);
! 
!   return true;
  }
  
  /* class exploded_edge : public dedge<eg_traits>.  */
*************** public:
*** 2311,2317 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &,
! 			   pending_diagnostic &) const final override
    {
      emission_path->add_event
        (std::make_unique<tainted_args_function_custom_event>
--- 2388,2395 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &,
! 			   pending_diagnostic &,
! 			   const state_transition *) const final override
    {
      emission_path->add_event
        (std::make_unique<tainted_args_function_custom_event>
*************** public:
*** 2767,2773 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &,
! 			   pending_diagnostic &) const final override
    {
      /* Show the field in the struct declaration, e.g.
         "(1) field 'store' is marked with '__attribute__((tainted_args))'"  */
--- 2845,2852 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &,
! 			   pending_diagnostic &,
! 			   const state_transition *) const final override
    {
      /* Show the field in the struct declaration, e.g.
         "(1) field 'store' is marked with '__attribute__((tainted_args))'"  */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/event-loc-info.h gcc-17-20260510/gcc/analyzer/event-loc-info.h
*** gcc-17-20260503/gcc/analyzer/event-loc-info.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/event-loc-info.h	Sun May 10 22:32:05 2026
*************** struct event_loc_info
*** 39,44 ****
--- 39,48 ----
    int m_depth;
  };
  
+ extern event_loc_info
+ event_loc_info_for_function_entry (const program_point &point,
+ 				   const state_transition_at_call *state_trans);
+ 
  } // namespace ana
  
  #endif /* GCC_ANALYZER_EVENT_LOC_INFO_H */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/exploded-graph.h gcc-17-20260510/gcc/analyzer/exploded-graph.h
*** gcc-17-20260503/gcc/analyzer/exploded-graph.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/exploded-graph.h	Sun May 10 22:32:05 2026
*************** private:
*** 381,389 ****
  class interprocedural_call : public custom_edge_info
  {
  public:
!   interprocedural_call (const gcall &call_stmt,
  			function &callee_fun)
!   : m_call_stmt (call_stmt),
      m_callee_fun (callee_fun)
    {}
  
--- 381,389 ----
  class interprocedural_call : public custom_edge_info
  {
  public:
!   interprocedural_call (const call_and_return_op &op,
  			function &callee_fun)
!   : m_op (op),
      m_callee_fun (callee_fun)
    {}
  
*************** public:
*** 402,411 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd) const final override;
  
  private:
!   const gcall &m_call_stmt;
    function &m_callee_fun;
  };
  
--- 402,417 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd,
! 			   const state_transition *state_trans) const final override;
! 
!   bool
!   try_to_rewind_data_flow (rewind_context &) const final override;
! 
!   const gcall &get_gcall () const;
  
  private:
!   const call_and_return_op &m_op;
    function &m_callee_fun;
  };
  
*************** public:
*** 434,440 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd) const final override;
  
  private:
    const gcall &m_call_stmt;
--- 440,450 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd,
! 			   const state_transition *state_trans) const final override;
! 
!   bool
!   try_to_rewind_data_flow (rewind_context &) const final override;
  
  private:
    const gcall &m_call_stmt;
*************** public:
*** 463,469 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd) const final override;
  
    program_point
    get_point_before_setjmp () const
--- 473,480 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge,
! 			   pending_diagnostic &pd,
! 			   const state_transition *state_trans) const final override;
  
    program_point
    get_point_before_setjmp () const
diff -Nrcpad gcc-17-20260503/gcc/analyzer/exploded-path.cc gcc-17-20260510/gcc/analyzer/exploded-path.cc
*** gcc-17-20260503/gcc/analyzer/exploded-path.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/exploded-path.cc	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 26,44 ****
  
  namespace ana {
  
! /* class exploded_path.  */
  
! /* Copy ctor.  */
  
! exploded_path::exploded_path (const exploded_path &other)
! : m_edges (other.m_edges.length ())
  {
!   int i;
!   const exploded_edge *eedge;
!   FOR_EACH_VEC_ELT (other.m_edges, i, eedge)
!     m_edges.quick_push (eedge);
  }
  
  /* Look for the last use of SEARCH_STMT within this path.
     If found write the edge's index to *OUT_IDX and return true, otherwise
     return false.  */
--- 26,55 ----
  
  namespace ana {
  
! // struct diagnostic_state
  
! void
! diagnostic_state::dump_to_pp (pretty_printer *pp) const
! {
!   pp_printf (pp, "%s: {", m_debug_desc.c_str ());
!   if (m_region_holding_value)
!     {
!       pp_string (pp, "region holding value: ");
!       m_region_holding_value->dump_to_pp (pp, false);
!     }
!   pp_string (pp, "}");
! }
  
! void
! diagnostic_state::dump () const
  {
!   tree_dump_pretty_printer pp (stderr);
!   dump_to_pp (&pp);
!   pp_newline (&pp);
  }
  
+ /* class exploded_path.  */
+ 
  /* Look for the last use of SEARCH_STMT within this path.
     If found write the edge's index to *OUT_IDX and return true, otherwise
     return false.  */
*************** bool
*** 47,77 ****
  exploded_path::find_stmt_backwards (const gimple *search_stmt,
  				    int *out_idx) const
  {
!   int i;
!   const exploded_edge *eedge;
!   FOR_EACH_VEC_ELT_REVERSE (m_edges, i, eedge)
!     if (search_stmt->code == GIMPLE_PHI)
!       {
! 	/* Each phis_for_edge_op instance handles multiple phi stmts
! 	   at once, so we have to special-case the search for a phi stmt.  */
! 	if (auto op = eedge->maybe_get_op ())
! 	  if (auto phis_op = op->dyn_cast_phis_for_edge_op ())
! 	    if (phis_op->defines_ssa_name_p (gimple_phi_result (search_stmt)))
  	      {
  		*out_idx = i;
  		return true;
  	      }
!       }
!     else
!       {
! 	/* Non-phi stmt.  */
! 	if (const gimple *stmt = eedge->maybe_get_stmt ())
! 	  if (stmt == search_stmt)
! 	    {
! 	      *out_idx = i;
! 	      return true;
! 	    }
!       }
    return false;
  }
  
--- 58,90 ----
  exploded_path::find_stmt_backwards (const gimple *search_stmt,
  				    int *out_idx) const
  {
!   for (int i = m_elements.size () - 1; i >= 0; --i)
!     {
!       const element_t *element = &m_elements[i];
!       const exploded_edge *eedge = element->m_eedge;
!       if (search_stmt->code == GIMPLE_PHI)
! 	{
! 	  /* Each phis_for_edge_op instance handles multiple phi stmts
! 	     at once, so we have to special-case the search for a phi stmt.  */
! 	  if (auto op = eedge->maybe_get_op ())
! 	    if (auto phis_op = op->dyn_cast_phis_for_edge_op ())
! 	      if (phis_op->defines_ssa_name_p (gimple_phi_result (search_stmt)))
! 		{
! 		  *out_idx = i;
! 		  return true;
! 		}
! 	}
!       else
! 	{
! 	  /* Non-phi stmt.  */
! 	  if (const gimple *stmt = eedge->maybe_get_stmt ())
! 	    if (stmt == search_stmt)
  	      {
  		*out_idx = i;
  		return true;
  	      }
! 	}
!     }
    return false;
  }
  
*************** exploded_path::find_stmt_backwards (cons
*** 80,87 ****
  exploded_node *
  exploded_path::get_final_enode () const
  {
!   gcc_assert (m_edges.length () > 0);
!   return m_edges[m_edges.length () - 1]->m_dest;
  }
  
  /* Check state along this path, returning true if it is feasible.
--- 93,100 ----
  exploded_node *
  exploded_path::get_final_enode () const
  {
!   gcc_assert (m_elements.size () > 0);
!   return m_elements.back ().m_eedge->m_dest;
  }
  
  /* Check state along this path, returning true if it is feasible.
*************** exploded_path::feasible_p (logger *logge
*** 99,107 ****
  			   eg->get_supergraph ());
  
    /* Traverse the path, updating this state.  */
!   for (unsigned edge_idx = 0; edge_idx < m_edges.length (); edge_idx++)
      {
!       const exploded_edge *eedge = m_edges[edge_idx];
        if (logger)
  	logger->log ("considering edge %i: EN:%i -> EN:%i",
  		     edge_idx,
--- 112,120 ----
  			   eg->get_supergraph ());
  
    /* Traverse the path, updating this state.  */
!   for (unsigned edge_idx = 0; edge_idx < m_elements.size (); ++edge_idx)
      {
!       const exploded_edge *eedge = m_elements[edge_idx].m_eedge;
        if (logger)
  	logger->log ("considering edge %i: EN:%i -> EN:%i",
  		     edge_idx,
*************** void
*** 140,152 ****
  exploded_path::dump_to_pp (pretty_printer *pp,
  			   const extrinsic_state *ext_state) const
  {
!   for (unsigned i = 0; i < m_edges.length (); i++)
      {
!       const exploded_edge *eedge = m_edges[i];
!       pp_printf (pp, "m_edges[%i]: EN %i -> EN %i",
  		 i,
  		 eedge->m_src->m_index,
  		 eedge->m_dest->m_index);
        pp_newline (pp);
  
        if (ext_state)
--- 153,172 ----
  exploded_path::dump_to_pp (pretty_printer *pp,
  			   const extrinsic_state *ext_state) const
  {
!   for (unsigned i = 0; i < m_elements.size (); ++i)
      {
!       const element_t &element = m_elements[i];
!       const exploded_edge *eedge = element.m_eedge;
!       pp_printf (pp, "m_elements[%i]: EN %i -> EN %i",
  		 i,
  		 eedge->m_src->m_index,
  		 eedge->m_dest->m_index);
+       if (element.m_state_transition)
+ 	{
+ 	  pp_string (pp, " {");
+ 	  element.m_state_transition->dump_to_pp (pp);
+ 	  pp_string (pp, "}");
+ 	}
        pp_newline (pp);
  
        if (ext_state)
*************** exploded_path::dump_to_file (const char
*** 188,193 ****
--- 208,256 ----
    fclose (fp);
  }
  
+ /* Print a multiline form of this path to LOGGER, prefixing it with DESC.  */
+ 
+ void
+ exploded_path::maybe_log (logger *logger, const char *desc) const
+ {
+   if (!logger)
+     return;
+   logger->start_log_line ();
+   logger->log_partial ("%s: ", desc);
+   logger->end_log_line ();
+   for (unsigned idx = 0; idx < m_elements.size (); idx++)
+     {
+       const exploded_edge &eedge = *m_elements[idx].m_eedge;
+       const exploded_node *src_node = eedge.m_src;
+       const program_point &src_point = src_node->get_point ();
+       const exploded_node *dst_node = eedge.m_dest;
+       const program_point &dst_point = dst_node->get_point ();
+ 
+       pretty_printer *pp = logger->get_printer ();
+       logger->start_log_line ();
+       pp_printf (pp, "  [%i] EN %i -> EN %i: ",
+ 		 idx,
+ 		 src_node->m_index,
+ 		 dst_node->m_index);
+       src_point.print (pp, format (false));
+       pp_string (pp, " -> ");
+       dst_point.print (pp, format (false));
+       if (auto state_trans = m_elements[idx].m_state_transition.get ())
+ 	{
+ 	  pp_string (pp, " {");
+ 	  state_trans->dump_to_pp (pp);
+ 	  pp_string (pp, "}");
+ 	}
+       logger->end_log_line ();
+     }
+ }
+ 
+ void
+ exploded_path::reverse ()
+ {
+   std::reverse (m_elements.begin (), m_elements.end ());
+ }
+ 
  } // namespace ana
  
  #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/exploded-path.h gcc-17-20260510/gcc/analyzer/exploded-path.h
*** gcc-17-20260503/gcc/analyzer/exploded-path.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/exploded-path.h	Sun May 10 22:32:05 2026
*************** along with GCC; see the file COPYING3.
*** 22,27 ****
--- 22,29 ----
  #define GCC_ANALYZER_EXPLODED_PATH_H
  
  #include "analyzer/exploded-graph.h"
+ #include "analyzer/checker-event.h"
+ #include "analyzer/state-transition.h"
  
  namespace ana {
  
*************** namespace ana {
*** 30,39 ****
  class exploded_path
  {
  public:
!   exploded_path () : m_edges () {}
!   exploded_path (const exploded_path &other);
  
!   unsigned length () const { return m_edges.length (); }
  
    bool find_stmt_backwards (const gimple *search_stmt,
  			    int *out_idx) const;
--- 32,76 ----
  class exploded_path
  {
  public:
!   struct element_t
!   {
!     element_t (const exploded_edge *eedge)
!     : m_eedge (eedge)
!     {
!     }
!     element_t (const element_t &other)
!     : m_eedge (other.m_eedge),
!       m_state_at_src (other.m_state_at_src),
!       m_state_at_dst (other.m_state_at_dst),
!       m_state_transition (nullptr)
!     {
!       if (other.m_state_transition)
! 	m_state_transition = other.m_state_transition->clone ();
!     }
  
!     element_t (element_t &&other) = default;
! 
!     element_t &operator= (const element_t &other)
!     {
!       m_eedge = other.m_eedge;
!       m_state_at_src = other.m_state_at_src;
!       m_state_at_dst = other.m_state_at_dst;
!       m_state_transition = (other.m_state_transition
! 			    ? other.m_state_transition->clone ()
! 			    : nullptr);
!       return *this;
!     }
! 
!     const exploded_edge *m_eedge;
!     diagnostic_state m_state_at_src;
!     diagnostic_state m_state_at_dst;
!     std::unique_ptr<state_transition> m_state_transition;
!   };
! 
!   exploded_path () = default;
!   exploded_path (const exploded_path &other) = default;
! 
!   unsigned length () const { return m_elements.size (); }
  
    bool find_stmt_backwards (const gimple *search_stmt,
  			    int *out_idx) const;
*************** public:
*** 47,56 ****
    void dump_to_file (const char *filename,
  		     const extrinsic_state &ext_state) const;
  
    bool feasible_p (logger *logger, std::unique_ptr<feasibility_problem> *out,
  		    engine *eng, const exploded_graph *eg) const;
  
!   auto_vec<const exploded_edge *> m_edges;
  };
  
  /* Finding the shortest exploded_path within an exploded_graph.  */
--- 84,104 ----
    void dump_to_file (const char *filename,
  		     const extrinsic_state &ext_state) const;
  
+   void maybe_log (logger *logger, const char *desc) const;
+ 
    bool feasible_p (logger *logger, std::unique_ptr<feasibility_problem> *out,
  		    engine *eng, const exploded_graph *eg) const;
  
!   void
!   append_edge (const exploded_edge *edge)
!   {
!     m_elements.push_back (edge);
!   }
! 
!   void
!   reverse ();
! 
!   std::vector<element_t> m_elements;
  };
  
  /* Finding the shortest exploded_path within an exploded_graph.  */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/feasible-graph.cc gcc-17-20260510/gcc/analyzer/feasible-graph.cc
*** gcc-17-20260503/gcc/analyzer/feasible-graph.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/feasible-graph.cc	Sun May 10 22:32:05 2026
*************** feasible_graph::make_epath (feasible_nod
*** 187,198 ****
        gcc_assert (fnode->m_preds.length () == 1);
        feasible_edge *pred_fedge
  	= static_cast <feasible_edge *> (fnode->m_preds[0]);
!       epath->m_edges.safe_push (pred_fedge->get_inner_edge ());
        fnode = static_cast <feasible_node *> (pred_fedge->m_src);
      }
  
    /* Now reverse it.  */
!   epath->m_edges.reverse ();
  
    return epath;
  }
--- 187,198 ----
        gcc_assert (fnode->m_preds.length () == 1);
        feasible_edge *pred_fedge
  	= static_cast <feasible_edge *> (fnode->m_preds[0]);
!       epath->m_elements.push_back (pred_fedge->get_inner_edge ());
        fnode = static_cast <feasible_node *> (pred_fedge->m_src);
      }
  
    /* Now reverse it.  */
!   epath->reverse ();
  
    return epath;
  }
diff -Nrcpad gcc-17-20260503/gcc/analyzer/infinite-recursion.cc gcc-17-20260510/gcc/analyzer/infinite-recursion.cc
*** gcc-17-20260503/gcc/analyzer/infinite-recursion.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/infinite-recursion.cc	Sun May 10 22:32:06 2026
*************** public:
*** 98,104 ****
  
    void
    add_function_entry_event (const exploded_edge &eedge,
! 			    checker_path *emission_path) final override
    {
      /* Subclass of function_entry_event for use when reporting both
         the initial and subsequent entries to the function of interest,
--- 98,105 ----
  
    void
    add_function_entry_event (const exploded_edge &eedge,
! 			    checker_path *emission_path,
! 			    const state_transition_at_call *state_trans) final override
    {
      /* Subclass of function_entry_event for use when reporting both
         the initial and subsequent entries to the function of interest,
*************** public:
*** 111,117 ****
  				      const program_state &dst_state,
  				      const infinite_recursion_diagnostic &pd,
  				      bool topmost)
!       : function_entry_event (dst_point, dst_state),
  	m_pd (pd),
  	m_topmost (topmost)
        {
--- 112,120 ----
  				      const program_state &dst_state,
  				      const infinite_recursion_diagnostic &pd,
  				      bool topmost)
!       : function_entry_event (event_loc_info (dst_point),
! 			      dst_state,
! 			      nullptr),
  	m_pd (pd),
  	m_topmost (topmost)
        {
*************** public:
*** 161,167 ****
  	(std::make_unique<recursive_function_entry_event>
  	 (dst_point, dst_node->get_state (), *this, true));
      else
!       pending_diagnostic::add_function_entry_event (eedge, emission_path);
    }
  
    /* Customize the location where the warning_event appears, putting
--- 164,171 ----
  	(std::make_unique<recursive_function_entry_event>
  	 (dst_point, dst_node->get_state (), *this, true));
      else
!       pending_diagnostic::add_function_entry_event (eedge, emission_path,
! 						    state_trans);
    }
  
    /* Customize the location where the warning_event appears, putting
diff -Nrcpad gcc-17-20260503/gcc/analyzer/kf.cc gcc-17-20260510/gcc/analyzer/kf.cc
*** gcc-17-20260503/gcc/analyzer/kf.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/kf.cc	Sun May 10 22:32:06 2026
*************** public:
*** 2879,2885 ****
  void
  kf_strcasecmp::impl_call_post (const call_details &cd) const
  {
!   if (tree lhs_type = cd.get_lhs_type ())
      {
        const svalue *result_val
  	= cd.get_or_create_conjured_svalue (cd.get_lhs_region ());
--- 2879,2885 ----
  void
  kf_strcasecmp::impl_call_post (const call_details &cd) const
  {
!   if (cd.get_lhs_type ())
      {
        const svalue *result_val
  	= cd.get_or_create_conjured_svalue (cd.get_lhs_region ());
diff -Nrcpad gcc-17-20260503/gcc/analyzer/ops.cc gcc-17-20260510/gcc/analyzer/ops.cc
*** gcc-17-20260503/gcc/analyzer/ops.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/ops.cc	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 38,43 ****
--- 38,45 ----
  #include "analyzer/call-summary.h"
  #include "analyzer/call-info.h"
  #include "analyzer/analysis-plan.h"
+ #include "analyzer/callsite-expr.h"
+ #include "analyzer/state-transition.h"
  
  #if ENABLE_ANALYZER
  
*************** event_loc_info::event_loc_info (const pr
*** 66,71 ****
--- 68,92 ----
    m_depth = point.get_stack_depth ();
  }
  
+ /* Make an event_loc_info suitable for a function_entry_event at POINT.
+    If STATE_TRANS is non-null, then try to extract the pertinent parameter
+    from it and use the location of that parameter, rather than that of the
+    function name.  */
+ 
+ event_loc_info
+ event_loc_info_for_function_entry (const program_point &point,
+ 				   const state_transition_at_call *state_trans)
+ {
+   event_loc_info result (point);
+   if (state_trans)
+     {
+       callsite_expr expr = state_trans->get_callsite_expr ();
+       expr.maybe_get_param_location (point.get_fndecl (),
+ 				     &result.m_loc);
+     }
+   return result;
+ }
+ 
  // struct operation_context
  
  void
*************** private:
*** 190,195 ****
--- 211,263 ----
    } m_path_context;
  };
  
+ // struct rewind_context
+ 
+ void
+ rewind_context::on_data_origin (tree dst_tree)
+ {
+   gcc_assert (dst_tree);
+   const region_model &dst_enode_model = get_dst_region_model ();
+   const region *dst_reg_in_dst_enode
+     = dst_enode_model.get_lvalue (dst_tree, nullptr);
+   if (m_input.m_region_holding_value == dst_reg_in_dst_enode)
+     {
+       if (m_logger)
+ 	m_logger->log ("data origin, into %qE", dst_tree);
+       m_output.m_region_holding_value = nullptr;
+       add_state_transition
+ 	(std::make_unique<state_transition_origin> (dst_tree));
+     }
+ }
+ 
+ void
+ rewind_context::on_data_flow (tree src_tree, tree dst_tree)
+ {
+   gcc_assert (src_tree);
+   gcc_assert (dst_tree);
+   const region_model &dst_enode_model = get_dst_region_model ();
+   const region *dst_reg_in_dst_enode
+     = dst_enode_model.get_lvalue (dst_tree, nullptr);
+   if (m_input.m_region_holding_value == dst_reg_in_dst_enode)
+     {
+       if (m_logger)
+ 	m_logger->log ("rewinding from %qE to %qE", dst_tree, src_tree);
+       const region_model &src_enode_model = get_src_region_model ();
+       const region *src_reg_in_src_enode
+ 	= src_enode_model.get_lvalue (src_tree, nullptr);
+       m_output.m_region_holding_value = src_reg_in_src_enode;
+ 
+       if (TREE_CODE (src_tree) == RESULT_DECL)
+ 	add_state_transition (std::make_unique<state_transition_at_return> ());
+       else if (auto state_trans
+ 		 = state_transition::make (m_output.m_region_holding_value,
+ 					   src_tree,
+ 					   m_input.m_region_holding_value,
+ 					   dst_tree))
+ 	add_state_transition (std::move (state_trans));
+     }
+ }
+ 
  // class gimple_stmt_op : public operation
  
  void
*************** gimple_stmt_op::add_any_events_for_eedge
*** 663,670 ****
--- 731,788 ----
      }
  }
  
+ // class gasm_op : public gimple_stmt_op
+ 
  // class gassign_op : public gimple_stmt_op
  
+ bool
+ gassign_op::try_to_rewind_data_flow (rewind_context &ctxt) const
+ {
+   auto logger = ctxt.m_logger;
+   LOG_SCOPE (logger);
+   if (logger)
+     {
+       logger->start_log_line ();
+       pp_gimple_stmt_1 (logger->get_printer (), &get_stmt (), 0,
+ 			(dump_flags_t)0);
+       logger->end_log_line ();
+     }
+ 
+   const gassign &assign = get_gassign ();
+   tree lhs = gimple_assign_lhs (&assign);
+ 
+   if (!ctxt.could_be_affected_by_write_p (lhs))
+     return true;
+ 
+   tree rhs1 = gimple_assign_rhs1 (&assign);
+   enum tree_code op = gimple_assign_rhs_code (&assign);
+ 
+   switch (op)
+     {
+     default:
+       return false;
+ 
+     case NOP_EXPR:
+     case SSA_NAME:
+     case VAR_DECL:
+     case PARM_DECL:
+     case COMPONENT_REF:
+       ctxt.on_data_flow (rhs1, lhs);
+       break;
+ 
+     case INTEGER_CST:
+     case REAL_CST:
+       if (logger)
+ 	logger->log ("value comes from here");
+       ctxt.on_data_origin (lhs);
+       break;
+     }
+ 
+   return true;
+ }
+ 
+ // class predict_op : public gimple_stmt_op
+ 
  // class greturn_op : public gimple_stmt_op
  
  void
*************** greturn_op::add_any_events_for_eedge (co
*** 734,739 ****
--- 852,874 ----
    // No-op.
  }
  
+ 
+ bool
+ greturn_op::try_to_rewind_data_flow (rewind_context &ctxt) const
+ {
+   auto logger = ctxt.m_logger;
+   LOG_SCOPE (logger);
+ 
+   if (get_retval ())
+     {
+       const region_model &src_enode_model = ctxt.get_src_region_model ();
+       tree fndecl = src_enode_model.get_current_function ()->decl;
+       ctxt.on_data_flow (get_retval (), DECL_RESULT (fndecl));
+     }
+ 
+   return true;
+ }
+ 
  // class call_and_return_op : public gimple_stmt_op
  
  std::unique_ptr<operation>
*************** call_and_return_op::execute (operation_c
*** 839,845 ****
  	    const program_point dst_point
  	      (callee_entry_snode, *dst_call_string);
  	    auto edge_info
! 	      = std::make_unique<interprocedural_call> (get_gcall (),
  							*callee_fun);
  	    edge_info->update_state (&dst_state, nullptr, &ctxt);
  	    op_ctxt.add_outcome (dst_point, dst_state, false, nullptr,
--- 974,980 ----
  	    const program_point dst_point
  	      (callee_entry_snode, *dst_call_string);
  	    auto edge_info
! 	      = std::make_unique<interprocedural_call> (*this,
  							*callee_fun);
  	    edge_info->update_state (&dst_state, nullptr, &ctxt);
  	    op_ctxt.add_outcome (dst_point, dst_state, false, nullptr,
*************** replay_call_summaries (operation_context
*** 1023,1028 ****
--- 1158,1170 ----
      }
  }
  
+ bool
+ call_and_return_op::try_to_rewind_data_flow (rewind_context &ctxt) const
+ {
+   LOG_SCOPE (ctxt.m_logger);
+   return true;
+ }
+ 
  /* A concrete call_info subclass representing a replay of a call summary.  */
  
  class call_summary_edge_info : public call_info
*************** phis_for_edge_op::add_any_events_for_eed
*** 2350,2355 ****
--- 2492,2507 ----
    // No-op
  }
  
+ bool
+ phis_for_edge_op::try_to_rewind_data_flow (rewind_context &ctxt) const
+ {
+   auto logger = ctxt.m_logger;
+   LOG_SCOPE (logger);
+   for (auto iter : m_pairs)
+     ctxt.on_data_flow (iter.m_src, iter.m_dst);
+   return true;
+ }
+ 
  // class resx_op : public gimple_stmt_op
  
  void
diff -Nrcpad gcc-17-20260503/gcc/analyzer/ops.h gcc-17-20260510/gcc/analyzer/ops.h
*** gcc-17-20260503/gcc/analyzer/ops.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/ops.h	Sun May 10 22:32:06 2026
*************** struct operation_context
*** 74,79 ****
--- 74,112 ----
    const superedge &m_sedge;
  };
  
+ struct rewind_context
+ {
+   rewind_context (logger *logger,
+ 		  diagnostic_state input_state)
+   : m_logger (logger),
+     m_input (input_state),
+     m_output (input_state)
+   {
+   }
+ 
+   void
+   on_data_origin (tree dst);
+ 
+   void
+   on_data_flow (tree src, tree dst);
+ 
+   virtual const region_model &
+   get_src_region_model () const = 0;
+ 
+   virtual const region_model &
+   get_dst_region_model () const = 0;
+ 
+   virtual bool
+   could_be_affected_by_write_p (tree lhs) = 0;
+ 
+   virtual void
+   add_state_transition (std::unique_ptr<state_transition>) = 0;
+ 
+   logger *m_logger;
+   diagnostic_state m_input;
+   diagnostic_state m_output;
+ };
+ 
  /* Abstract base class for an operation along a superedge.  */
  
  class operation
*************** class operation
*** 163,168 ****
--- 196,207 ----
  
    enum kind get_kind () const { return m_kind; }
  
+   virtual bool
+   try_to_rewind_data_flow (rewind_context &) const
+   {
+     return false;
+   }
+ 
  protected:
    operation (enum kind kind_)
    : m_kind (kind_)
*************** public:
*** 279,284 ****
--- 318,326 ----
    {
      return *as_a <const gassign *> (&get_stmt ());
    }
+ 
+   bool
+   try_to_rewind_data_flow (rewind_context &ctxt) const final override;
  };
  
  /* An operation subclass for a GIMPLE_PREDICT stmt.
*************** public:
*** 300,305 ****
--- 342,353 ----
    {
      return std::make_unique<predict_op> (get_stmt ());
    }
+ 
+   bool
+   try_to_rewind_data_flow (rewind_context &) const final override
+   {
+     return true;
+   }
  };
  
  /* An operation subclass representing both:
*************** public:
*** 350,355 ****
--- 398,406 ----
    {
      return gimple_return_retval (&get_greturn ());
    }
+ 
+   bool
+   try_to_rewind_data_flow (rewind_context &ctxt) const final override;
  };
  
  /* A concrete operation subclass representing the effect of a GIMPLE_CALL stmt.
*************** public:
*** 428,433 ****
--- 479,487 ----
    const known_function *
    maybe_get_known_function (const call_details &cd) const;
  
+   bool
+   try_to_rewind_data_flow (rewind_context &ctxt) const final override;
+ 
  private:
    cgraph_edge *
    get_any_cgraph_edge (operation_context &op_ctxt) const;
*************** public:
*** 638,643 ****
--- 692,703 ----
  
    const gimple &get_ctrlflow_stmt () const { return m_ctrlflow_stmt; }
  
+   bool
+   try_to_rewind_data_flow (rewind_context &) const final override
+   {
+     return true;
+   }
+ 
  protected:
    control_flow_op (enum kind kind_,
  		   ::edge cfg_edge,
*************** public:
*** 983,988 ****
--- 1043,1051 ----
    add_any_events_for_eedge (const exploded_edge &eedge,
  			    checker_path &out_path) const final override;
  
+   bool
+   try_to_rewind_data_flow (rewind_context &ctxt) const final override;
+ 
    const std::vector<pair> &get_pairs () const { return m_pairs; }
  
  private:
diff -Nrcpad gcc-17-20260503/gcc/analyzer/pending-diagnostic.cc gcc-17-20260510/gcc/analyzer/pending-diagnostic.cc
*** gcc-17-20260503/gcc/analyzer/pending-diagnostic.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/pending-diagnostic.cc	Sun May 10 22:32:06 2026
*************** interesting_t::add_region_creation (cons
*** 58,63 ****
--- 58,72 ----
    m_region_creation.safe_push (reg);
  }
  
+ /* Mark the value read from REG as being interesting.  */
+ 
+ void
+ interesting_t::add_read_region (const region *reg, std::string debug_desc)
+ {
+   gcc_assert (reg);
+   m_read_regions.push_back (diagnostic_state (std::move (debug_desc), reg));
+ }
+ 
  void
  interesting_t::dump_to_pp (pretty_printer *pp, bool simple) const
  {
*************** interesting_t::dump_to_pp (pretty_printe
*** 70,75 ****
--- 79,92 ----
  	pp_string (pp, ", ");
        reg->dump_to_pp (pp, simple);
      }
+   pp_string (pp, "], read regions: [");
+   for (i = 0; i < m_read_regions.size (); ++i)
+     {
+       auto &ann = m_read_regions[i];
+       if (i > 0)
+ 	pp_string (pp, ", ");
+       ann.dump_to_pp (pp);
+     }
    pp_string (pp, "]}");
  }
  
*************** pending_diagnostic::fixup_location (loca
*** 199,212 ****
  
  void
  pending_diagnostic::add_function_entry_event (const exploded_edge &eedge,
! 					      checker_path *emission_path)
  {
    const exploded_node *dst_node = eedge.m_dest;
    const program_point &dst_point = dst_node->get_point ();
    const program_state &dst_state = dst_node->get_state ();
    emission_path->add_event
!     (std::make_unique<function_entry_event> (dst_point,
! 					     dst_state));
  }
  
  /* Base implementation of pending_diagnostic::add_call_event.
--- 216,236 ----
  
  void
  pending_diagnostic::add_function_entry_event (const exploded_edge &eedge,
! 					      checker_path *emission_path,
! 					      const state_transition_at_call *state_trans)
  {
    const exploded_node *dst_node = eedge.m_dest;
    const program_point &dst_point = dst_node->get_point ();
    const program_state &dst_state = dst_node->get_state ();
+ 
+   /* If we have STATE_TRANS with a specific param, put the event on
+      that parameter, otherwise put in on the function name.  */
+   auto loc_info {event_loc_info_for_function_entry (dst_point, state_trans)};
+ 
    emission_path->add_event
!     (std::make_unique<function_entry_event> (loc_info,
! 					     dst_state,
! 					     state_trans));
  }
  
  /* Base implementation of pending_diagnostic::add_call_event.
*************** pending_diagnostic::add_function_entry_e
*** 215,225 ****
  void
  pending_diagnostic::add_call_event (const exploded_edge &eedge,
  				    const gcall &,
! 				    checker_path &emission_path)
  {
    emission_path.add_event
      (std::make_unique<call_event> (eedge,
! 				   event_loc_info (eedge.m_src)));
  }
  
  /* Base implementation of pending_diagnostic::add_region_creation_events.
--- 239,251 ----
  void
  pending_diagnostic::add_call_event (const exploded_edge &eedge,
  				    const gcall &,
! 				    checker_path &emission_path,
! 				    const state_transition_at_call *state_trans)
  {
    emission_path.add_event
      (std::make_unique<call_event> (eedge,
! 				   event_loc_info (eedge.m_src),
! 				   state_trans));
  }
  
  /* Base implementation of pending_diagnostic::add_region_creation_events.
diff -Nrcpad gcc-17-20260503/gcc/analyzer/pending-diagnostic.h gcc-17-20260510/gcc/analyzer/pending-diagnostic.h
*** gcc-17-20260503/gcc/analyzer/pending-diagnostic.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/pending-diagnostic.h	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 23,45 ****
  
  #include "diagnostics/metadata.h"
  #include "analyzer/sm.h"
  
  namespace ana {
  
  /* A bundle of information about things that are of interest to a
!    pending_diagnostic.
  
!    For now, merely the set of regions that are pertinent to the
     diagnostic, so that we can notify the user about when they
!    were created.  */
  
  struct interesting_t
  {
    void add_region_creation (const region *reg);
  
    void dump_to_pp (pretty_printer *pp, bool simple) const;
  
    auto_vec<const region *> m_region_creation;
  };
  
  /* Various bundles of information used for generating more precise
--- 23,53 ----
  
  #include "diagnostics/metadata.h"
  #include "analyzer/sm.h"
+ #include "analyzer/state-transition.h"
  
  namespace ana {
  
  /* A bundle of information about things that are of interest to a
!    pending_diagnostic:
  
!    * a set of regions that are pertinent to the
     diagnostic, so that we can notify the user about when they
!    were created.
! 
!    * a set of regions that a pertinent value for the diagnostic was
!    read from, so that we can notify the user about where those values
!    came from.  */
  
  struct interesting_t
  {
    void add_region_creation (const region *reg);
  
+   void add_read_region (const region *reg, std::string debug_desc);
+ 
    void dump_to_pp (pretty_printer *pp, bool simple) const;
  
    auto_vec<const region *> m_region_creation;
+   std::vector<diagnostic_state> m_read_regions;
  };
  
  /* Various bundles of information used for generating more precise
*************** struct state_change
*** 74,96 ****
    const state_change_event &m_event;
  };
  
  /* For use by pending_diagnostic::describe_call_with_state.  */
  
  struct call_with_state
  {
    call_with_state (tree caller_fndecl, tree callee_fndecl,
! 		   tree expr, state_machine::state_t state)
    : m_caller_fndecl (caller_fndecl),
      m_callee_fndecl (callee_fndecl),
      m_expr (expr),
!     m_state (state)
    {
    }
  
    tree m_caller_fndecl;
    tree m_callee_fndecl;
    tree m_expr;
    state_machine::state_t m_state;
  };
  
  /* For use by pending_diagnostic::describe_return_of_state.  */
--- 82,123 ----
    const state_change_event &m_event;
  };
  
+ /* For use by pending_diagnostic::describe_origin_of_state.  */
+ 
+ struct origin_of_state
+ {
+   origin_of_state (tree dst_reg_expr)
+   : m_dst_reg_expr (dst_reg_expr)
+   {
+     gcc_assert (m_dst_reg_expr);
+   }
+ 
+   tree m_dst_reg_expr;
+ };
+ 
  /* For use by pending_diagnostic::describe_call_with_state.  */
  
  struct call_with_state
  {
    call_with_state (tree caller_fndecl, tree callee_fndecl,
! 		   tree expr, state_machine::state_t state,
! 		   const state_transition_at_call *state_trans)
    : m_caller_fndecl (caller_fndecl),
      m_callee_fndecl (callee_fndecl),
      m_expr (expr),
!     m_state (state),
!     m_state_trans (state_trans)
    {
+     if (state_trans)
+       m_src_event_id = state_trans->get_src_event_id ();
    }
  
    tree m_caller_fndecl;
    tree m_callee_fndecl;
    tree m_expr;
    state_machine::state_t m_state;
+   const state_transition_at_call *m_state_trans;
+   diagnostics::paths::event_id_t m_src_event_id;
  };
  
  /* For use by pending_diagnostic::describe_return_of_state.  */
*************** struct call_with_state
*** 98,113 ****
  struct return_of_state
  {
    return_of_state (tree caller_fndecl, tree callee_fndecl,
! 		   state_machine::state_t state)
    : m_caller_fndecl (caller_fndecl),
      m_callee_fndecl (callee_fndecl),
!     m_state (state)
    {
    }
  
    tree m_caller_fndecl;
    tree m_callee_fndecl;
    state_machine::state_t m_state;
  };
  
  /* For use by pending_diagnostic::describe_final_event.  */
--- 125,182 ----
  struct return_of_state
  {
    return_of_state (tree caller_fndecl, tree callee_fndecl,
! 		   state_machine::state_t state,
! 		   const state_transition_at_return *state_trans)
    : m_caller_fndecl (caller_fndecl),
      m_callee_fndecl (callee_fndecl),
!     m_state (state),
!     m_state_trans (state_trans)
    {
+     if (state_trans)
+       m_src_event_id = state_trans->get_src_event_id ();
    }
  
    tree m_caller_fndecl;
    tree m_callee_fndecl;
    state_machine::state_t m_state;
+   const state_transition_at_return *m_state_trans;
+   diagnostics::paths::event_id_t m_src_event_id;
+ };
+ 
+ /* For use by pending_diagnostic::describe_copy_of_state.  */
+ 
+ struct copy_of_state
+ {
+   copy_of_state (tree src_reg_expr,
+ 		 diagnostics::paths::event_id_t src_event_id,
+ 		 tree dst_reg_expr)
+   : m_src_reg_expr (src_reg_expr),
+     m_src_event_id (src_event_id),
+     m_dst_reg_expr (dst_reg_expr)
+   {
+     gcc_assert (m_src_reg_expr);
+     gcc_assert (m_dst_reg_expr);
+   }
+ 
+   tree m_src_reg_expr;
+   diagnostics::paths::event_id_t m_src_event_id;
+   tree m_dst_reg_expr;
+ };
+ 
+ /* For use by pending_diagnostic::describe_use_of_state.  */
+ 
+ struct use_of_state
+ {
+   use_of_state (tree src_reg_expr,
+ 		diagnostics::paths::event_id_t src_event_id)
+   : m_src_reg_expr (src_reg_expr),
+     m_src_event_id (src_event_id)
+   {
+     gcc_assert (m_src_reg_expr);
+   }
+ 
+   tree m_src_reg_expr;
+   diagnostics::paths::event_id_t m_src_event_id;
  };
  
  /* For use by pending_diagnostic::describe_final_event.  */
*************** class pending_diagnostic
*** 268,273 ****
--- 337,356 ----
      return diagnostics::paths::event::meaning ();
    }
  
+   /* Precision-of-wording vfunc for use in describing state_transition_event
+      instances of state_transition::kind::origin.
+      Return true if a description of the event was printed to the
+      pretty-printer, or false otherwise.
+      For example, a divide-by-zero diagnostic might use:
+        "zero value originates here"
+      at the point where the zero comes from.  */
+   virtual bool describe_origin_of_state (pretty_printer &,
+ 					 const evdesc::origin_of_state &)
+   {
+     /* Default no-op implementation.  */
+     return false;
+   }
+ 
    /* Precision-of-wording vfunc for describing an interprocedural call
       carrying critial state for the diagnostic, from caller to callee.
  
*************** class pending_diagnostic
*** 299,304 ****
--- 382,413 ----
      return false;
    }
  
+   /* Precision-of-wording vfunc for use in describing state_transition_event
+      instances of state_transition::kind::copy.
+      Return true if a description of the event was printed to the
+      pretty-printer, or false otherwise.
+      For example, a divide-by-zero diagnostic might use:
+      "copying zero value from (3) from 'x' to 'y'".  */
+   virtual bool describe_copy_of_state (pretty_printer &,
+ 				       const evdesc::copy_of_state &)
+   {
+     /* Default no-op implementation.  */
+     return false;
+   }
+ 
+   /* Precision-of-wording vfunc for use in describing state_transition_event
+      instances of state_transition::kind::use.
+      Return true if a description of the event was printed to the
+      pretty-printer, or false otherwise.
+      For example, a divide-by-zero diagnostic might use:
+      "using zero value from (7) from 'y'".  */
+   virtual bool describe_use_of_state (pretty_printer &,
+ 				      const evdesc::use_of_state &)
+   {
+     /* Default no-op implementation.  */
+     return false;
+   }
+ 
    /* Precision-of-wording vfunc for describing the final event within a
       diagnostic path.
  
*************** class pending_diagnostic
*** 322,328 ****
  
    virtual void
    add_function_entry_event (const exploded_edge &eedge,
! 			    checker_path *emission_path);
  
    /* Vfunc for extending/overriding creation of the events for an
       exploded_edge, allowing for custom events to be created that are
--- 431,438 ----
  
    virtual void
    add_function_entry_event (const exploded_edge &eedge,
! 			    checker_path *emission_path,
! 			    const state_transition_at_call *state_trans);
  
    /* Vfunc for extending/overriding creation of the events for an
       exploded_edge, allowing for custom events to be created that are
*************** class pending_diagnostic
*** 343,349 ****
       the variadic arguments.  */
    virtual void add_call_event (const exploded_edge &,
  			       const gcall &call_stmt,
! 			       checker_path &emission_path);
  
    /* Vfunc for adding any events for the creation of regions identified
       by the mark_interesting_stuff vfunc.
--- 453,460 ----
       the variadic arguments.  */
    virtual void add_call_event (const exploded_edge &,
  			       const gcall &call_stmt,
! 			       checker_path &emission_path,
! 			       const state_transition_at_call *state_trans);
  
    /* Vfunc for adding any events for the creation of regions identified
       by the mark_interesting_stuff vfunc.
diff -Nrcpad gcc-17-20260503/gcc/analyzer/poisoned-value-diagnostic.cc gcc-17-20260510/gcc/analyzer/poisoned-value-diagnostic.cc
*** gcc-17-20260503/gcc/analyzer/poisoned-value-diagnostic.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/poisoned-value-diagnostic.cc	Sun May 10 22:32:06 2026
*************** public:
*** 155,161 ****
    void mark_interesting_stuff (interesting_t *interest) final override
    {
      if (m_src_region)
!       interest->add_region_creation (m_src_region);
    }
  
    /* Attempt to suppress false positives.
--- 155,164 ----
    void mark_interesting_stuff (interesting_t *interest) final override
    {
      if (m_src_region)
!       {
! 	interest->add_region_creation (m_src_region);
! 	interest->add_read_region (m_src_region, "poisoned value");
!       }
    }
  
    /* Attempt to suppress false positives.
diff -Nrcpad gcc-17-20260503/gcc/analyzer/region-model.cc gcc-17-20260510/gcc/analyzer/region-model.cc
*** gcc-17-20260503/gcc/analyzer/region-model.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/region-model.cc	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 69,74 ****
--- 69,75 ----
  #include "analyzer/feasible-graph.h"
  #include "analyzer/record-layout.h"
  #include "analyzer/function-set.h"
+ #include "analyzer/state-transition.h"
  
  #if ENABLE_ANALYZER
  
*************** private:
*** 855,866 ****
    const region *m_base_reg_b;
  };
  
  class div_by_zero_diagnostic
  : public pending_diagnostic_subclass<div_by_zero_diagnostic>
  {
  public:
!   div_by_zero_diagnostic (const gassign *assign)
!   : m_assign (assign)
    {}
  
    const char *get_kind () const final override
--- 856,912 ----
    const region *m_base_reg_b;
  };
  
+ /* Locate the parameter with the given index within FNDECL.
+    ARGNUM is zero based, -1 indicates the `this' argument of a method.
+    Return the location of the FNDECL itself if there are problems.  */
+ 
+ bool
+ callsite_expr::maybe_get_param_location (tree fndecl,
+ 					 location_t *out_loc) const
+ {
+   gcc_assert (fndecl);
+ 
+   if (DECL_ARTIFICIAL (fndecl))
+     return false;
+ 
+   tree param = get_param_tree (fndecl);
+   if (!param)
+     return false;
+ 
+   *out_loc = DECL_SOURCE_LOCATION (param);
+   return true;
+ }
+ 
+ /* If this callsite_expr refers to a parameter, get the PARM_DECL from
+    FNDECL.
+    Return NULL_TREE on any problems.  */
+ 
+ tree
+ callsite_expr::get_param_tree (tree fndecl) const
+ {
+   if (!param_p ())
+     return NULL_TREE;
+ 
+   int i;
+   tree param;
+ 
+   /* Locate param by index within DECL_ARGUMENTS (fndecl).  */
+   for (i = 1, param = DECL_ARGUMENTS (fndecl);
+        i < param_num () && param;
+        i++, param = TREE_CHAIN (param))
+     ;
+ 
+   return param;
+ }
+ 
  class div_by_zero_diagnostic
  : public pending_diagnostic_subclass<div_by_zero_diagnostic>
  {
  public:
!   div_by_zero_diagnostic (const gassign *assign,
! 			  const region *divisor_reg)
!   : m_assign (assign),
!     m_divisor_reg (divisor_reg)
    {}
  
    const char *get_kind () const final override
*************** public:
*** 891,898 ****
--- 937,1078 ----
      return true;
    }
  
+   void
+   mark_interesting_stuff (interesting_t *interest)
+   {
+     interest->add_read_region (m_divisor_reg, "divisor zero value");
+   }
+ 
+   void
+   add_function_entry_event (const exploded_edge &eedge,
+ 			    checker_path *emission_path,
+ 			    const state_transition_at_call *state_trans)
+   {
+     class custom_function_entry_event : public function_entry_event
+     {
+     public:
+       custom_function_entry_event (const event_loc_info &loc_info,
+ 				   const program_state &state,
+ 				   const state_transition_at_call *state_trans)
+       : function_entry_event (loc_info,
+ 			      state,
+ 			      state_trans)
+       {
+       }
+ 
+       void print_desc (pretty_printer &pp) const override
+       {
+ 	if (auto state_trans = get_state_transition_at_call ())
+ 	  {
+ 	    auto expr = state_trans->get_callsite_expr ();
+ 	    if (tree parm = expr.get_param_tree (m_effective_fndecl))
+ 	      {
+ 		auto src_event_id = state_trans->get_src_event_id ();
+ 		if (src_event_id.known_p ())
+ 		  pp_printf (&pp, "entry to %qE with zero from %@ for %qE",
+ 			     m_effective_fndecl,
+ 			     &src_event_id,
+ 			     parm);
+ 		else
+ 		  pp_printf (&pp, "entry to %qE with zero for %qE",
+ 			     m_effective_fndecl, parm);
+ 		return;
+ 	      }
+ 	  }
+ 	return function_entry_event::print_desc (pp);
+       }
+     };
+ 
+     const exploded_node *dst_node = eedge.m_dest;
+     const program_point &dst_point = dst_node->get_point ();
+     const program_state &dst_state = dst_node->get_state ();
+     auto loc_info {event_loc_info_for_function_entry (dst_point, state_trans)};
+     emission_path->add_event
+       (std::make_unique<custom_function_entry_event> (loc_info,
+ 						      dst_state,
+ 						      state_trans));
+   }
+ 
+   bool
+   describe_origin_of_state (pretty_printer &pp,
+ 			    const evdesc::origin_of_state &) final override
+   {
+     pp_printf (&pp, "zero value originates here");
+     return true;
+   }
+ 
+   bool
+   describe_call_with_state (pretty_printer &pp,
+ 			    const evdesc::call_with_state &evd) final override
+   {
+     if (evd.m_state_trans)
+       {
+ 	callsite_expr expr = evd.m_state_trans->get_callsite_expr ();
+ 	if (expr.param_p ())
+ 	  {
+ 	    if (evd.m_src_event_id.known_p ())
+ 	      pp_printf (&pp, "passing zero from %@ from %qE to %qE via parameter %i",
+ 			 &evd.m_src_event_id,
+ 			 evd.m_caller_fndecl,
+ 			 evd.m_callee_fndecl,
+ 			 expr.param_num ());
+ 	    else
+ 	      pp_printf (&pp, "passing zero from %qE to %qE via parameter %i",
+ 			 evd.m_caller_fndecl,
+ 			 evd.m_callee_fndecl,
+ 			 expr.param_num ());
+ 	    return true;
+ 	  }
+       }
+ 
+     return false;
+   }
+ 
+   bool
+   describe_return_of_state (pretty_printer &pp,
+ 			    const evdesc::return_of_state &evd) final override
+   {
+     if (evd.m_src_event_id.known_p ())
+       pp_printf (&pp, "returning zero from %@ from %qE here",
+ 		 &evd.m_src_event_id,
+ 		 evd.m_callee_fndecl);
+     else
+       pp_printf (&pp, "returning zero from %qE here",
+ 	       evd.m_callee_fndecl);
+     return true;
+   }
+ 
+   bool
+   describe_copy_of_state (pretty_printer &pp,
+ 			  const evdesc::copy_of_state &evd) final override
+   {
+     if (evd.m_src_event_id.known_p ())
+       pp_printf (&pp, "copying zero value from %@ from %qE to %qE",
+ 		 &evd.m_src_event_id,
+ 		 evd.m_src_reg_expr, evd.m_dst_reg_expr);
+     else
+       pp_printf (&pp, "copying zero value from %qE to %qE",
+ 		 evd.m_src_reg_expr, evd.m_dst_reg_expr);
+     return true;
+   }
+ 
+   bool
+   describe_use_of_state (pretty_printer &pp,
+ 			 const evdesc::use_of_state &evd) final override
+   {
+     if (evd.m_src_event_id.known_p ())
+       pp_printf (&pp, "using zero value from %@ from %qE",
+ 		 &evd.m_src_event_id,
+ 		 evd.m_src_reg_expr);
+     else
+       pp_printf (&pp, "using zero value from %qE",
+ 		 evd.m_src_reg_expr);
+     return true;
+   }
+ 
  private:
    const gassign *m_assign;
+   const region *m_divisor_reg;
  };
  
  /* Check the pointer subtraction SVAL_A - SVAL_B at ASSIGN and add
*************** region_model::get_gassign_result (const
*** 1101,1115 ****
  		  && INTEGRAL_TYPE_P (TREE_TYPE (rhs1)))
  		{
  		  if (tree_int_cst_sgn (rhs2_cst) < 0)
! 		    ctxt->warn
! 		      (make_shift_count_negative_diagnostic (assign, rhs2_cst));
  		  else if (compare_tree_int (rhs2_cst,
  					     TYPE_PRECISION (TREE_TYPE (rhs1)))
  			   >= 0)
! 		    ctxt->warn (make_shift_count_overflow_diagnostic
! 				(assign,
! 				 int (TYPE_PRECISION (TREE_TYPE (rhs1))),
! 				 rhs2_cst));
  		}
  	  }
  
--- 1281,1306 ----
  		  && INTEGRAL_TYPE_P (TREE_TYPE (rhs1)))
  		{
  		  if (tree_int_cst_sgn (rhs2_cst) < 0)
! 		    {
! 		      const region *rhs2_reg
! 			= get_lvalue (gimple_assign_rhs2 (assign), nullptr);
! 		      ctxt->warn
! 			(make_shift_count_negative_diagnostic (assign,
! 							       rhs2_cst,
! 							       rhs2_reg));
! 		    }
  		  else if (compare_tree_int (rhs2_cst,
  					     TYPE_PRECISION (TREE_TYPE (rhs1)))
  			   >= 0)
! 		    {
! 		      const region *rhs2_reg
! 			= get_lvalue (gimple_assign_rhs2 (assign), nullptr);
! 		      ctxt->warn (make_shift_count_overflow_diagnostic
! 				  (assign,
! 				   int (TYPE_PRECISION (TREE_TYPE (rhs1))),
! 				   rhs2_cst,
! 				   rhs2_reg));
! 		    }
  		}
  	  }
  
*************** region_model::get_gassign_result (const
*** 1130,1137 ****
  		{
  		  if (ctxt)
  		    {
  		      ctxt->warn
! 			(std::make_unique<div_by_zero_diagnostic> (assign));
  		      ctxt->terminate_path ();
  		    }
  		  return nullptr;
--- 1321,1331 ----
  		{
  		  if (ctxt)
  		    {
+ 		      const region *rhs2_reg
+ 			= get_lvalue (gimple_assign_rhs2 (assign), nullptr);
  		      ctxt->warn
! 			(std::make_unique<div_by_zero_diagnostic> (assign,
! 								   rhs2_reg));
  		      ctxt->terminate_path ();
  		    }
  		  return nullptr;
*************** public:
*** 1935,1941 ****
    void
    add_events_to_path (checker_path *emission_path,
  		      const exploded_edge &eedge,
! 		      pending_diagnostic &) const final override
    {
      const exploded_node *dst_node = eedge.m_dest;
      const program_point &dst_point = dst_node->get_point ();
--- 2129,2136 ----
    void
    add_events_to_path (checker_path *emission_path,
  		      const exploded_edge &eedge,
! 		      pending_diagnostic &,
! 		      const state_transition *) const final override
    {
      const exploded_node *dst_node = eedge.m_dest;
      const program_point &dst_point = dst_node->get_point ();
diff -Nrcpad gcc-17-20260503/gcc/analyzer/region-model.h gcc-17-20260510/gcc/analyzer/region-model.h
*** gcc-17-20260503/gcc/analyzer/region-model.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/region-model.h	Sun May 10 22:32:06 2026
*************** make_poisoned_value_diagnostic (tree exp
*** 1338,1349 ****
  
  extern std::unique_ptr<pending_diagnostic>
  make_shift_count_negative_diagnostic (const gassign *assign,
! 				      tree count_cst);
  
  extern std::unique_ptr<pending_diagnostic>
  make_shift_count_overflow_diagnostic (const gassign *assign,
  				      int operand_precision,
! 				      tree count_cst);
  
  extern std::unique_ptr<pending_diagnostic>
  make_write_to_const_diagnostic (const region *dest_reg, tree decl);
--- 1338,1351 ----
  
  extern std::unique_ptr<pending_diagnostic>
  make_shift_count_negative_diagnostic (const gassign *assign,
! 				      tree count_cst,
! 				      const region *src_region);
  
  extern std::unique_ptr<pending_diagnostic>
  make_shift_count_overflow_diagnostic (const gassign *assign,
  				      int operand_precision,
! 				      tree count_cst,
! 				      const region *src_region);
  
  extern std::unique_ptr<pending_diagnostic>
  make_write_to_const_diagnostic (const region *dest_reg, tree decl);
diff -Nrcpad gcc-17-20260503/gcc/analyzer/region.h gcc-17-20260510/gcc/analyzer/region.h
*** gcc-17-20260503/gcc/analyzer/region.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/region.h	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 22,28 ****
  #define GCC_ANALYZER_REGION_H
  
  #include "analyzer/symbol.h"
! #include "text-art/widget.h"
  
  namespace ana {
  
--- 22,29 ----
  #define GCC_ANALYZER_REGION_H
  
  #include "analyzer/symbol.h"
! #include "analyzer/store.h"
! #include "text-art/tree-widget.h"
  
  namespace ana {
  
diff -Nrcpad gcc-17-20260503/gcc/analyzer/setjmp-longjmp.cc gcc-17-20260510/gcc/analyzer/setjmp-longjmp.cc
*** gcc-17-20260503/gcc/analyzer/setjmp-longjmp.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/setjmp-longjmp.cc	Sun May 10 22:32:06 2026
*************** rewind_info_t::update_model (region_mode
*** 469,475 ****
  void
  rewind_info_t::add_events_to_path (checker_path *emission_path,
  				   const exploded_edge &eedge,
! 				   pending_diagnostic &) const
  {
    const exploded_node *src_node = eedge.m_src;
    const program_point &src_point = src_node->get_point ();
--- 469,476 ----
  void
  rewind_info_t::add_events_to_path (checker_path *emission_path,
  				   const exploded_edge &eedge,
! 				   pending_diagnostic &,
! 				   const state_transition *) const
  {
    const exploded_node *src_node = eedge.m_src;
    const program_point &src_point = src_node->get_point ();
diff -Nrcpad gcc-17-20260503/gcc/analyzer/shift-diagnostics.cc gcc-17-20260510/gcc/analyzer/shift-diagnostics.cc
*** gcc-17-20260503/gcc/analyzer/shift-diagnostics.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/shift-diagnostics.cc	Sun May 10 22:32:06 2026
*************** class shift_count_negative_diagnostic
*** 35,42 ****
  : public pending_diagnostic_subclass<shift_count_negative_diagnostic>
  {
  public:
!   shift_count_negative_diagnostic (const gassign *assign, tree count_cst)
!   : m_assign (assign), m_count_cst (count_cst)
    {}
  
    const char *get_kind () const final override
--- 35,43 ----
  : public pending_diagnostic_subclass<shift_count_negative_diagnostic>
  {
  public:
!   shift_count_negative_diagnostic (const gassign *assign, tree count_cst,
! 				   const region *src_region)
!   : m_assign (assign), m_count_cst (count_cst), m_src_region (src_region)
    {}
  
    const char *get_kind () const final override
*************** public:
*** 70,84 ****
      return true;
    }
  
  private:
    const gassign *m_assign;
    tree m_count_cst;
  };
  
  std::unique_ptr<pending_diagnostic>
! make_shift_count_negative_diagnostic (const gassign *assign, tree count_cst)
  {
!   return std::make_unique<shift_count_negative_diagnostic> (assign, count_cst);
  }
  
  /* A subclass of pending_diagnostic for complaining about shifts
--- 71,94 ----
      return true;
    }
  
+   void
+   mark_interesting_stuff (interesting_t *interest)
+   {
+     interest->add_read_region (m_src_region, "shift count value");
+   }
+ 
  private:
    const gassign *m_assign;
    tree m_count_cst;
+   const region *m_src_region;
  };
  
  std::unique_ptr<pending_diagnostic>
! make_shift_count_negative_diagnostic (const gassign *assign, tree count_cst,
! 				      const region *src_region)
  {
!   return std::make_unique<shift_count_negative_diagnostic>
!     (assign, count_cst, src_region);
  }
  
  /* A subclass of pending_diagnostic for complaining about shifts
*************** class shift_count_overflow_diagnostic
*** 90,98 ****
  public:
    shift_count_overflow_diagnostic (const gassign *assign,
  				   int operand_precision,
! 				   tree count_cst)
    : m_assign (assign), m_operand_precision (operand_precision),
!     m_count_cst (count_cst)
    {}
  
    const char *get_kind () const final override
--- 100,110 ----
  public:
    shift_count_overflow_diagnostic (const gassign *assign,
  				   int operand_precision,
! 				   tree count_cst,
! 				   const region *src_region)
    : m_assign (assign), m_operand_precision (operand_precision),
!     m_count_cst (count_cst),
!     m_src_region (src_region)
    {}
  
    const char *get_kind () const final override
*************** public:
*** 128,146 ****
      return true;
    }
  
  private:
    const gassign *m_assign;
    int m_operand_precision;
    tree m_count_cst;
  };
  
  std::unique_ptr<pending_diagnostic>
  make_shift_count_overflow_diagnostic (const gassign *assign,
  				      int operand_precision,
! 				      tree count_cst)
  {
    return std::make_unique<shift_count_overflow_diagnostic>
!     (assign, operand_precision, count_cst);
  }
  
  } // namespace ana
--- 140,166 ----
      return true;
    }
  
+   void
+   mark_interesting_stuff (interesting_t *interest)
+   {
+     interest->add_read_region (m_src_region, "shift count value");
+   }
+ 
  private:
    const gassign *m_assign;
    int m_operand_precision;
    tree m_count_cst;
+   const region *m_src_region;
  };
  
  std::unique_ptr<pending_diagnostic>
  make_shift_count_overflow_diagnostic (const gassign *assign,
  				      int operand_precision,
! 				      tree count_cst,
! 				      const region *src_region)
  {
    return std::make_unique<shift_count_overflow_diagnostic>
!     (assign, operand_precision, count_cst, src_region);
  }
  
  } // namespace ana
diff -Nrcpad gcc-17-20260503/gcc/analyzer/sm-signal.cc gcc-17-20260510/gcc/analyzer/sm-signal.cc
*** gcc-17-20260503/gcc/analyzer/sm-signal.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/sm-signal.cc	Sun May 10 22:32:06 2026
*************** public:
*** 221,227 ****
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge ATTRIBUTE_UNUSED,
! 			   pending_diagnostic &)
      const final override
    {
      emission_path->add_event
--- 221,228 ----
  
    void add_events_to_path (checker_path *emission_path,
  			   const exploded_edge &eedge ATTRIBUTE_UNUSED,
! 			   pending_diagnostic &,
! 			   const state_transition *)
      const final override
    {
      emission_path->add_event
diff -Nrcpad gcc-17-20260503/gcc/analyzer/state-transition.cc gcc-17-20260510/gcc/analyzer/state-transition.cc
*** gcc-17-20260503/gcc/analyzer/state-transition.cc	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/analyzer/state-transition.cc	Sun May 10 22:32:06 2026
***************
*** 0 ****
--- 1,184 ----
+ /* Classes for tracking pertinent events that happen along
+    an execution path.
+    Copyright (C) 2026 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #include "analyzer/common.h"
+ 
+ #include "tree-diagnostic.h"
+ 
+ #include "gimple-pretty-print.h"
+ #include "gimple-iterator.h"
+ #include "tree-cfg.h"
+ #include "tree-dfa.h"
+ #include "fold-const.h"
+ #include "cgraph.h"
+ #include "text-art/dump.h"
+ #include "text-art/tree-widget.h"
+ 
+ #include "analyzer/ops.h"
+ #include "analyzer/call-details.h"
+ #include "analyzer/exploded-graph.h"
+ #include "analyzer/checker-path.h"
+ #include "analyzer/impl-sm-context.h"
+ #include "analyzer/constraint-manager.h"
+ #include "analyzer/call-summary.h"
+ #include "analyzer/call-info.h"
+ #include "analyzer/analysis-plan.h"
+ #include "analyzer/callsite-expr.h"
+ #include "analyzer/state-transition.h"
+ 
+ #if ENABLE_ANALYZER
+ 
+ namespace ana {
+ 
+ // class state_transition
+ 
+ DEBUG_FUNCTION void
+ state_transition::dump () const
+ {
+   tree_dump_pretty_printer pp (stderr);
+   dump_to_pp (&pp);
+   pp_newline (&pp);
+ }
+ 
+ std::unique_ptr<state_transition>
+ state_transition::make (const region *src_reg,
+ 			tree src_reg_expr,
+ 			const region *dst_reg,
+ 			tree dst_reg_expr)
+ {
+   gcc_assert (src_reg != dst_reg);
+   gcc_assert (dst_reg);
+ 
+   if (!src_reg)
+     return std::make_unique<state_transition_origin> (dst_reg_expr);
+ 
+   if (src_reg->get_parent_region () ==  dst_reg->get_parent_region ())
+     if (tree src_decl =  src_reg->maybe_get_decl ())
+       if (tree dst_decl =  dst_reg->maybe_get_decl ())
+ 	{
+ 	  if (TREE_CODE (src_decl) == SSA_NAME
+ 	      && TREE_CODE (dst_decl) == SSA_NAME
+ 	      && SSA_NAME_VAR (src_decl)
+ 	      && SSA_NAME_VAR (src_decl) == SSA_NAME_VAR (dst_decl))
+ 	    {
+ 	      /* Avoid printing "copying value from 'y' to 'y'.  */
+ 	      return nullptr;
+ 	    }
+ 	}
+ 
+   if (printable_expr_p (src_reg_expr))
+     {
+       if (printable_expr_p (dst_reg_expr))
+ 	return std::make_unique<state_transition_copy> (src_reg_expr,
+ 							dst_reg_expr);
+       else
+ 	return std::make_unique<state_transition_use> (src_reg_expr);
+     }
+   else
+     return nullptr;
+ }
+ 
+ diagnostics::paths::event_id_t
+ state_transition::get_src_event_id () const
+ {
+   if (!m_prev_state_transition)
+     return diagnostics::paths::event_id_t ();
+   return m_prev_state_transition->m_event_id;
+ }
+ // class state_transition_origin : public state_transition
+ 
+ std::unique_ptr<state_transition>
+ state_transition_origin::clone () const
+ {
+   return std::make_unique<state_transition_origin> (m_dst_reg_expr);
+ }
+ 
+ void
+ state_transition_origin::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_printf (pp, "state_transition_origin (dst: %qE)",
+ 	     m_dst_reg_expr);
+ }
+ 
+ // class state_transition_at_call : public state_transition
+ 
+ std::unique_ptr<state_transition>
+ state_transition_at_call::clone () const
+ {
+   return std::make_unique<state_transition_at_call> (m_expr);
+ }
+ 
+ void
+ state_transition_at_call::dump_to_pp (pretty_printer *pp) const
+ {
+   callsite_expr_element e (m_expr);
+   pp_printf (pp, "state_transition_at_call (callsite_expr: %e)", &e);
+ }
+ 
+ // class state_transition_at_return : public state_transition
+ 
+ std::unique_ptr<state_transition>
+ state_transition_at_return::clone () const
+ {
+   return std::make_unique<state_transition_at_return> ();
+ }
+ 
+ void
+ state_transition_at_return::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_printf (pp, "state_transition_at_return");
+ }
+ 
+ // class state_transition_copy : public state_transition
+ 
+ std::unique_ptr<state_transition>
+ state_transition_copy::clone () const
+ {
+   return std::make_unique<state_transition_copy> (m_src_reg_expr,
+ 						  m_dst_reg_expr);
+ }
+ 
+ void
+ state_transition_copy::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_printf (pp, "state_transition_copy (src: %qE, dst: %qE)",
+ 	     m_src_reg_expr,
+ 	     m_dst_reg_expr);
+ }
+ 
+ // class state_transition_use : public state_transition
+ 
+ std::unique_ptr<state_transition>
+ state_transition_use::clone () const
+ {
+   return std::make_unique<state_transition_use> (m_src_reg_expr);
+ }
+ 
+ void
+ state_transition_use::dump_to_pp (pretty_printer *pp) const
+ {
+   pp_printf (pp, "state_transition_use (src: %qE)",
+ 	     m_src_reg_expr);
+ }
+ 
+ } // namespace ana
+ 
+ #endif /* #if ENABLE_ANALYZER */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/state-transition.h gcc-17-20260510/gcc/analyzer/state-transition.h
*** gcc-17-20260503/gcc/analyzer/state-transition.h	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/analyzer/state-transition.h	Sun May 10 22:32:06 2026
***************
*** 0 ****
--- 1,191 ----
+ /* Classes for tracking pertinent events that happen along
+    an execution path.
+    Copyright (C) 2026 Free Software Foundation, Inc.
+    Contributed by David Malcolm <dmalcolm@redhat.com>.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANALYZER_STATE_TRANSITION_H
+ #define GCC_ANALYZER_STATE_TRANSITION_H
+ 
+ #include "diagnostics/event-id.h"
+ #include "analyzer/callsite-expr.h"
+ 
+ namespace ana {
+ 
+ class state_transition
+ {
+ public:
+   enum class kind
+   {
+     origin,
+     at_call,
+     at_return,
+     copy,
+     use
+   };
+ 
+   state_transition ()
+   : m_prev_state_transition (nullptr)
+   {
+   }
+ 
+   virtual ~state_transition () {}
+ 
+   virtual std::unique_ptr<state_transition>
+   clone () const = 0;
+ 
+   virtual void
+   dump_to_pp (pretty_printer *pp) const = 0;
+ 
+   virtual enum kind get_kind () const = 0;
+ 
+   virtual const state_transition_at_call *
+   dyn_cast_state_transition_at_call () const { return nullptr; }
+ 
+   virtual const state_transition_at_return *
+   dyn_cast_state_transition_at_return () const { return nullptr; }
+ 
+   void dump () const;
+ 
+   static std::unique_ptr<state_transition>
+   make (const region *src_reg,
+ 	tree src_reg_expr,
+ 	const region *dst_reg,
+ 	tree dst_reg_expr);
+ 
+   diagnostics::paths::event_id_t
+   get_src_event_id () const;
+ 
+   state_transition *m_prev_state_transition;
+   diagnostics::paths::event_id_t m_event_id;
+ };
+ 
+ class state_transition_origin : public state_transition
+ {
+ public:
+   state_transition_origin (tree dst_reg_expr)
+   : m_dst_reg_expr (dst_reg_expr)
+   {
+   }
+ 
+   std::unique_ptr<state_transition>
+   clone () const final override;
+ 
+   void
+   dump_to_pp (pretty_printer *pp) const final override;
+ 
+   enum kind
+   get_kind () const final override { return kind::origin; }
+ 
+   tree m_dst_reg_expr;
+ };
+ 
+ class state_transition_at_call : public state_transition
+ {
+ public:
+   state_transition_at_call (callsite_expr expr)
+   : m_expr (expr)
+   {
+   }
+ 
+   std::unique_ptr<state_transition>
+   clone () const final override;
+ 
+   void
+   dump_to_pp (pretty_printer *pp) const final override;
+ 
+   enum kind
+   get_kind () const final override { return kind::at_call; }
+ 
+   const state_transition_at_call *
+   dyn_cast_state_transition_at_call () const final override { return this; }
+ 
+   callsite_expr
+   get_callsite_expr () const { return m_expr; }
+ 
+ private:
+   callsite_expr m_expr;
+ };
+ 
+ class state_transition_at_return : public state_transition
+ {
+ public:
+   std::unique_ptr<state_transition>
+   clone () const final override;
+ 
+   void
+   dump_to_pp (pretty_printer *pp) const final override;
+ 
+   enum kind
+   get_kind () const final override { return kind::at_return; }
+ 
+   const state_transition_at_return *
+   dyn_cast_state_transition_at_return () const final override { return this; }
+ };
+ 
+ class state_transition_copy : public state_transition
+ {
+ public:
+   state_transition_copy (tree src_reg_expr,
+ 			 tree dst_reg_expr)
+   : m_src_reg_expr (src_reg_expr),
+     m_dst_reg_expr (dst_reg_expr)
+   {
+     gcc_assert (m_src_reg_expr);
+     gcc_assert (printable_expr_p (m_src_reg_expr));
+ 
+     gcc_assert (m_dst_reg_expr);
+     gcc_assert (printable_expr_p (m_dst_reg_expr));
+   }
+ 
+   std::unique_ptr<state_transition>
+   clone () const final override;
+ 
+   void
+   dump_to_pp (pretty_printer *pp) const final override;
+ 
+   enum kind
+   get_kind () const final override { return kind::copy; }
+ 
+   tree m_src_reg_expr;
+   tree m_dst_reg_expr;
+ };
+ 
+ class state_transition_use : public state_transition
+ {
+ public:
+   state_transition_use (tree src_reg_expr)
+   : m_src_reg_expr (src_reg_expr)
+   {
+   }
+ 
+   std::unique_ptr<state_transition>
+   clone () const final override;
+ 
+   void
+   dump_to_pp (pretty_printer *pp) const final override;
+ 
+   enum kind
+   get_kind () const final override { return kind::use; }
+ 
+   tree m_src_reg_expr;
+ };
+ 
+ } // namespace ana
+ 
+ #endif /* GCC_ANALYZER_STATE_TRANSITION_H */
diff -Nrcpad gcc-17-20260503/gcc/analyzer/supergraph.h gcc-17-20260510/gcc/analyzer/supergraph.h
*** gcc-17-20260503/gcc/analyzer/supergraph.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/supergraph.h	Sun May 10 22:32:06 2026
*************** private:
*** 323,362 ****
    ::edge m_cfg_edge;
  };
  
- /* An ID representing an expression at a callsite:
-    either a parameter index, or the return value (or unknown).  */
- 
- class callsite_expr
- {
-  public:
-   callsite_expr () : m_val (-1) {}
- 
-   static callsite_expr from_zero_based_param (int idx)
-   {
-     return callsite_expr (idx + 1);
-   }
- 
-   static callsite_expr from_return_value ()
-   {
-     return callsite_expr (0);
-   }
- 
-   bool param_p () const
-   {
-     return m_val > 0;
-   }
- 
-   bool return_value_p () const
-   {
-     return m_val == 0;
-   }
- 
-  private:
-   callsite_expr (int val) : m_val (val) {}
- 
-   int m_val; /* 1-based parm, 0 for return value, or -1 for "unknown".  */
- };
- 
  /* Base class for adding additional content to the .dot output
     for a supergraph.  */
  
--- 323,328 ----
diff -Nrcpad gcc-17-20260503/gcc/analyzer/svalue.cc gcc-17-20260510/gcc/analyzer/svalue.cc
*** gcc-17-20260503/gcc/analyzer/svalue.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/svalue.cc	Sun May 10 22:32:06 2026
*************** svalue::make_dump_widget (const text_art
*** 227,232 ****
--- 227,240 ----
  
    print_dump_widget_label (&pp);
  
+   value_range out;
+   if (maybe_get_value_range (out))
+     {
+       pp_printf (&pp, " value range: {"),
+ 	out.print (&pp);
+       pp_string (&pp, "}");
+     }
+ 
    std::unique_ptr<text_art::tree_widget> w
      (text_art::tree_widget::make (dwi, &pp));
  
*************** unaryop_svalue::maybe_get_value_range_1
*** 1594,1600 ****
  	     a VARYING of the unknown value as the 2nd operand.  */
  	  value_range varying (type);
  	  varying.set_varying (type);
! 	  out.set_type (type);
  	  if (handler.fold_range (out, type, arg_vr, varying))
  	    return true;
  	}
--- 1602,1608 ----
  	     a VARYING of the unknown value as the 2nd operand.  */
  	  value_range varying (type);
  	  varying.set_varying (type);
! 	  out.set_range_class (type);
  	  if (handler.fold_range (out, type, arg_vr, varying))
  	    return true;
  	}
*************** binop_svalue::maybe_get_value_range_1 (v
*** 1742,1748 ****
  	range_op_handler handler (m_op);
  	if (handler)
  	  {
! 	    out.set_type (type);
  	    if (handler.fold_range (out, get_type (), lhs, rhs))
  	      return true;
  	  }
--- 1750,1756 ----
  	range_op_handler handler (m_op);
  	if (handler)
  	  {
! 	    out.set_range_class (type);
  	    if (handler.fold_range (out, get_type (), lhs, rhs))
  	      return true;
  	  }
diff -Nrcpad gcc-17-20260503/gcc/analyzer/varargs.cc gcc-17-20260510/gcc/analyzer/varargs.cc
*** gcc-17-20260503/gcc/analyzer/varargs.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/analyzer/varargs.cc	Sun May 10 22:32:06 2026
*************** public:
*** 775,781 ****
       adding a custom call_event subclass.  */
    void add_call_event (const exploded_edge &eedge,
  		       const gcall &call_stmt,
! 		       checker_path &emission_path) override
    {
      /* As per call_event, but show the number of variadic arguments
         in the call.  */
--- 775,782 ----
       adding a custom call_event subclass.  */
    void add_call_event (const exploded_edge &eedge,
  		       const gcall &call_stmt,
! 		       checker_path &emission_path,
! 		       const state_transition_at_call *state_trans) override
    {
      /* As per call_event, but show the number of variadic arguments
         in the call.  */
*************** public:
*** 785,791 ****
        va_arg_call_event (const exploded_edge &eedge,
  			 const event_loc_info &loc_info,
  			 int num_variadic_arguments)
!       : call_event (eedge, loc_info),
  	m_num_variadic_arguments (num_variadic_arguments)
        {
        }
--- 786,792 ----
        va_arg_call_event (const exploded_edge &eedge,
  			 const event_loc_info &loc_info,
  			 int num_variadic_arguments)
!       : call_event (eedge, loc_info, nullptr),
  	m_num_variadic_arguments (num_variadic_arguments)
        {
        }
*************** public:
*** 819,825 ****
  	    num_variadic_arguments));
        }
      else
!       pending_diagnostic::add_call_event (eedge, call_stmt, emission_path);
    }
  
  protected:
--- 820,827 ----
  	    num_variadic_arguments));
        }
      else
!       pending_diagnostic::add_call_event (eedge, call_stmt, emission_path,
! 					  state_trans);
    }
  
  protected:
diff -Nrcpad gcc-17-20260503/gcc/attr-urls.def gcc-17-20260510/gcc/attr-urls.def
*** gcc-17-20260503/gcc/attr-urls.def	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/attr-urls.def	Sun May 10 22:32:06 2026
*************** const attr_url_entry all_attrs[] = {
*** 20,26 ****
   { "assume", "gcc/Common-Attributes.html#index-assume", "", 6},
   { "assume_aligned", "gcc/Common-Attributes.html#index-assume_005faligned", "", 14},
   { "aux", "gcc/ARC-Attributes.html#index-aux_002c-ARC", "ARC", 3},
-  { "bank_switch", "gcc/M32C-Attributes.html#index-bank_005fswitch_002c-M32C", "M32C", 11},
   { "below100", "gcc/Xstormy16-Attributes.html#index-below100_002c-Xstormy16", "Xstormy16", 8},
   { "break_handler", "gcc/MicroBlaze-Attributes.html#index-break_005fhandler_002c-MicroBlaze", "MicroBlaze", 13},
   { "brk_interrupt", "gcc/RL78-Attributes.html#index-brk_005finterrupt_002c-RL78", "RL78", 13},
--- 20,25 ----
*************** const attr_url_entry all_attrs[] = {
*** 54,60 ****
   { "externally_visible", "gcc/Common-Attributes.html#index-externally_005fvisible", "", 18},
   { "fallthrough", "gcc/Common-Attributes.html#index-fallthrough", "", 11},
   { "far", "gcc/MIPS-Attributes.html#index-far_002c-MIPS", "MIPS", 3},
-  { "fast_interrupt", "gcc/M32C-Attributes.html#index-fast_005finterrupt_002c-M32C", "M32C", 14},
   { "fast_interrupt", "gcc/MicroBlaze-Attributes.html#index-fast_005finterrupt_002c-MicroBlaze", "MicroBlaze", 14},
   { "fast_interrupt", "gcc/RX-Attributes.html#index-fast_005finterrupt_002c-RX", "RX", 14},
   { "fastcall", "gcc/x86-Attributes.html#index-fastcall_002c-x86-32", "x86-32", 8},
--- 53,58 ----
*************** const attr_url_entry all_attrs[] = {
*** 70,76 ****
   { "forwarder_section", "gcc/Epiphany-Attributes.html#index-forwarder_005fsection_002c-Epiphany", "Epiphany", 17},
   { "function_return", "gcc/x86-Attributes.html#index-function_005freturn_002c-x86", "x86", 15},
   { "function_vector", "gcc/H8_002f300-Attributes.html#index-function_005fvector_002c-H8_002f300", "H8/300", 15},
-  { "function_vector", "gcc/M32C-Attributes.html#index-function_005fvector_002c-M16C_002fM32C", "M16C/M32C", 15},
   { "function_vector", "gcc/SH-Attributes.html#index-function_005fvector_002c-SH", "SH", 15},
   { "gcc_struct", "gcc/PowerPC-Attributes.html#index-gcc_005fstruct_002c-PowerPC", "PowerPC", 10},
   { "gcc_struct", "gcc/x86-Attributes.html#index-gcc_005fstruct_002c-x86", "x86", 10},
--- 68,73 ----
*************** const attr_url_entry all_attrs[] = {
*** 90,96 ****
   { "interrupt", "gcc/C-SKY-Attributes.html#index-interrupt_002c-C-SKY", "C-SKY", 9},
   { "interrupt", "gcc/Common-Attributes.html#index-interrupt", "", 9},
   { "interrupt", "gcc/Epiphany-Attributes.html#index-interrupt_002c-Epiphany", "Epiphany", 9},
-  { "interrupt", "gcc/M32C-Attributes.html#index-interrupt_002c-M32C", "M32C", 9},
   { "interrupt", "gcc/M32R_002fD-Attributes.html#index-interrupt_002c-M32R_002fD", "M32R/D", 9},
   { "interrupt", "gcc/MIPS-Attributes.html#index-interrupt_002c-MIPS", "MIPS", 9},
   { "interrupt", "gcc/MSP430-Attributes.html#index-interrupt_002c-MSP430", "MSP430", 9},
--- 87,92 ----
diff -Nrcpad gcc-17-20260503/gcc/c/ChangeLog gcc-17-20260510/gcc/c/ChangeLog
*** gcc-17-20260503/gcc/c/ChangeLog	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/c/ChangeLog	Sun May 10 22:32:06 2026
***************
*** 1,3 ****
--- 1,10 ----
+ 2026-05-06  Martin Uecker  <uecker@tugraz.at>
+ 
+ 	PR c/124985
+ 	* c-decl.cc (pushtag): Update comment.
+ 	(declspecs_add_type): Mark TYPE_STUB_DECL as used.
+ 	* c-typeck.cc (function_to_pointer_conversion): Fix grammar in comment.
+ 
  2026-05-01  Martin Uecker  <uecker@tugraz.at>
  
  	PR c/124576
diff -Nrcpad gcc-17-20260503/gcc/c/c-decl.cc gcc-17-20260510/gcc/c/c-decl.cc
*** gcc-17-20260503/gcc/c/c-decl.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/c/c-decl.cc	Sun May 10 22:32:06 2026
*************** pushtag (location_t loc, tree name, tree
*** 1709,1715 ****
       NULL-named TYPE_DECL node helps dwarfout.c to know when it needs
       to output a representation of a tagged type, and it also gives
       us a convenient place to record the "scope start" address for the
!      tagged type.  */
  
    TYPE_STUB_DECL (type) = pushdecl (build_decl (loc,
  						TYPE_DECL, NULL_TREE, type));
--- 1709,1716 ----
       NULL-named TYPE_DECL node helps dwarfout.c to know when it needs
       to output a representation of a tagged type, and it also gives
       us a convenient place to record the "scope start" address for the
!      tagged type, and it is used to track whether the type is used
!      in a non-local context via mark_decl_used.  */
  
    TYPE_STUB_DECL (type) = pushdecl (build_decl (loc,
  						TYPE_DECL, NULL_TREE, type));
*************** declspecs_add_type (location_t loc, stru
*** 13134,13139 ****
--- 13135,13145 ----
  	      specs->typedef_p = true;
  	      specs->locations[cdw_typedef] = loc;
  	    }
+ 
+ 	  if (TREE_CODE (type) == RECORD_TYPE || TREE_CODE (type) == UNION_TYPE
+ 	      || TREE_CODE (type) == ENUMERAL_TYPE)
+ 	    mark_decl_used (TYPE_STUB_DECL (type), false);
+ 
  	  if (spec.expr)
  	    {
  	      tree expr = save_expr (fold_convert (void_type_node, spec.expr));
diff -Nrcpad gcc-17-20260503/gcc/c/c-typeck.cc gcc-17-20260510/gcc/c/c-typeck.cc
*** gcc-17-20260503/gcc/c/c-typeck.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/c/c-typeck.cc	Sun May 10 22:32:06 2026
*************** function_to_pointer_conversion (location
*** 2373,2379 ****
  
    tree exp2 = build_unary_op (loc, ADDR_EXPR, exp, false);
  
!   /* If the function is defined and known to not to require a non-local
       context, make sure no trampoline is generated.  */
    if (TREE_CODE (exp) == FUNCTION_DECL
        && DECL_INITIAL (exp) && !C_FUNC_NONLOCAL_CONTEXT (exp))
--- 2373,2379 ----
  
    tree exp2 = build_unary_op (loc, ADDR_EXPR, exp, false);
  
!   /* If the function is defined and known to not require a non-local
       context, make sure no trampoline is generated.  */
    if (TREE_CODE (exp) == FUNCTION_DECL
        && DECL_INITIAL (exp) && !C_FUNC_NONLOCAL_CONTEXT (exp))
diff -Nrcpad gcc-17-20260503/gcc/c-family/ChangeLog gcc-17-20260510/gcc/c-family/ChangeLog
*** gcc-17-20260503/gcc/c-family/ChangeLog	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/c-family/ChangeLog	Sun May 10 22:32:06 2026
***************
*** 1,3 ****
--- 1,10 ----
+ 2026-05-04  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR c/121911
+ 	* c-common.cc (c_common_nodes_and_builtins): If the
+ 	stack_protect_guard_symbol_p hook returns true, declare a global
+ 	symbol for stack protection guard.
+ 
  2026-04-29  Julian Brown  <julian@codesourcery.com>
  
  	* c-common.h (c_omp_region_type): Add C_ORT_EXIT_DATA,
diff -Nrcpad gcc-17-20260503/gcc/c-family/c-common.cc gcc-17-20260510/gcc/c-family/c-common.cc
*** gcc-17-20260503/gcc/c-family/c-common.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/c-family/c-common.cc	Sun May 10 22:32:06 2026
*************** c_common_nodes_and_builtins (void)
*** 4927,4932 ****
--- 4927,4937 ----
  	}
      }
  
+   /* Call the target stack_protect_guard hook if the stack protection
+      guard is declared as a global symbol.  */
+   if (targetm.stack_protect_guard_symbol_p ())
+     lang_hooks.decls.pushdecl (targetm.stack_protect_guard ());
+ 
    if (TREE_CODE (va_list_type_node) == ARRAY_TYPE)
      {
        va_list_arg_type_node = va_list_ref_type_node =
diff -Nrcpad gcc-17-20260503/gcc/calls.cc gcc-17-20260510/gcc/calls.cc
*** gcc-17-20260503/gcc/calls.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/calls.cc	Sun May 10 22:32:06 2026
*************** load_register_parameters (struct arg_dat
*** 2252,2261 ****
  		   && !TREE_SIDE_EFFECTS (tree_value)
  		   && immediate_const_ctor_p (DECL_INITIAL (tree_value)))
  	    {
  	      rtx target = gen_reg_rtx (word_mode);
  	      store_constructor (DECL_INITIAL (tree_value), target, 0,
! 				 int_expr_size (DECL_INITIAL (tree_value)),
! 				 false);
  	      reg = gen_rtx_REG (word_mode, REGNO (reg));
  	      emit_move_insn (reg, target);
  	    }
--- 2252,2271 ----
  		   && !TREE_SIDE_EFFECTS (tree_value)
  		   && immediate_const_ctor_p (DECL_INITIAL (tree_value)))
  	    {
+ 	      HOST_WIDE_INT size = int_expr_size (DECL_INITIAL (tree_value));
  	      rtx target = gen_reg_rtx (word_mode);
  	      store_constructor (DECL_INITIAL (tree_value), target, 0,
! 				 size, false);
! 	      /* On big-endian targets, store_constructor places fields
! 		 from the MSB, which places any padding bits in the least
! 		 significant bytes.  If required, use a logical right shift
! 		 to place things where expected in a register parameter.  */
! 	      if (BYTES_BIG_ENDIAN
! 		  && size < UNITS_PER_WORD
! 		  && args[i].locate.where_pad == PAD_DOWNWARD)
! 		target = expand_shift (RSHIFT_EXPR, word_mode, target,
! 				       (UNITS_PER_WORD - size) * BITS_PER_UNIT,
! 				       NULL_RTX, 1);
  	      reg = gen_rtx_REG (word_mode, REGNO (reg));
  	      emit_move_insn (reg, target);
  	    }
diff -Nrcpad gcc-17-20260503/gcc/cfghooks.cc gcc-17-20260510/gcc/cfghooks.cc
*** gcc-17-20260503/gcc/cfghooks.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/cfghooks.cc	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 45,51 ****
  #endif
  
  /* A pointer to one of the hooks containers.  */
! static struct cfg_hooks *cfg_hooks;
  
  /* Initialization of functions specific to the rtl IR.  */
  void
--- 45,51 ----
  #endif
  
  /* A pointer to one of the hooks containers.  */
! static const struct cfg_hooks *cfg_hooks;
  
  /* Initialization of functions specific to the rtl IR.  */
  void
*************** gimple_register_cfg_hooks (void)
*** 69,84 ****
    cfg_hooks = &gimple_cfg_hooks;
  }
  
! struct cfg_hooks
  get_cfg_hooks (void)
  {
!   return *cfg_hooks;
  }
  
  void
! set_cfg_hooks (struct cfg_hooks new_cfg_hooks)
  {
!   *cfg_hooks = new_cfg_hooks;
  }
  
  /* Returns current ir type.  */
--- 69,84 ----
    cfg_hooks = &gimple_cfg_hooks;
  }
  
! const struct cfg_hooks *
  get_cfg_hooks (void)
  {
!   return cfg_hooks;
  }
  
  void
! set_cfg_hooks (const struct cfg_hooks *new_cfg_hooks)
  {
!   cfg_hooks = new_cfg_hooks;
  }
  
  /* Returns current ir type.  */
*************** set_cfg_hooks (struct cfg_hooks new_cfg_
*** 86,99 ****
  enum ir_type
  current_ir_type (void)
  {
!   if (cfg_hooks == &gimple_cfg_hooks)
!     return IR_GIMPLE;
!   else if (cfg_hooks == &rtl_cfg_hooks)
!     return IR_RTL_CFGRTL;
!   else if (cfg_hooks == &cfg_layout_rtl_cfg_hooks)
!     return IR_RTL_CFGLAYOUT;
!   else
!     gcc_unreachable ();
  }
  
  /* Verify the CFG consistency.
--- 86,109 ----
  enum ir_type
  current_ir_type (void)
  {
!   return cfg_hooks->ir;
! }
! 
! static const char *
! current_ir_name (void)
! {
!   enum ir_type ir = cfg_hooks->ir;
!   switch (ir)
!     {
!     case IR_GIMPLE:
!       return "gimple";
!     case IR_RTL_CFGRTL:
!       return "rtl";
!     case IR_RTL_CFGLAYOUT:
!       return "cfglayout mode";
!     default:
!       gcc_unreachable();
!     }
  }
  
  /* Verify the CFG consistency.
*************** dump_bb_for_graph (pretty_printer *pp, b
*** 346,352 ****
  {
    if (!cfg_hooks->dump_bb_for_graph)
      internal_error ("%s does not support dump_bb_for_graph",
! 		    cfg_hooks->name);
    /* TODO: Add pretty printer for counter.  */
    if (bb->count.initialized_p ())
      pp_printf (pp, "COUNT:" "%" PRId64, bb->count.to_gcov_type ());
--- 356,362 ----
  {
    if (!cfg_hooks->dump_bb_for_graph)
      internal_error ("%s does not support dump_bb_for_graph",
! 		    current_ir_name ());
    /* TODO: Add pretty printer for counter.  */
    if (bb->count.initialized_p ())
      pp_printf (pp, "COUNT:" "%" PRId64, bb->count.to_gcov_type ());
*************** dump_bb_as_sarif_properties (diagnostics
*** 362,368 ****
  {
    if (!cfg_hooks->dump_bb_for_graph)
      internal_error ("%s does not support dump_bb_as_sarif_properties",
! 		    cfg_hooks->name);
    namespace bb_property_names = custom_sarif_properties::cfg::basic_block;
    if (bb->index == ENTRY_BLOCK)
      output_bag.set_string (bb_property_names::kind, "entry");
--- 372,378 ----
  {
    if (!cfg_hooks->dump_bb_for_graph)
      internal_error ("%s does not support dump_bb_as_sarif_properties",
! 		    current_ir_name ());
    namespace bb_property_names = custom_sarif_properties::cfg::basic_block;
    if (bb->index == ENTRY_BLOCK)
      output_bag.set_string (bb_property_names::kind, "entry");
*************** redirect_edge_and_branch (edge e, basic_
*** 416,422 ****
  
    if (!cfg_hooks->redirect_edge_and_branch)
      internal_error ("%s does not support redirect_edge_and_branch",
! 		    cfg_hooks->name);
  
    ret = cfg_hooks->redirect_edge_and_branch (e, dest);
  
--- 426,432 ----
  
    if (!cfg_hooks->redirect_edge_and_branch)
      internal_error ("%s does not support redirect_edge_and_branch",
! 		    current_ir_name ());
  
    ret = cfg_hooks->redirect_edge_and_branch (e, dest);
  
*************** can_remove_branch_p (const_edge e)
*** 436,442 ****
  {
    if (!cfg_hooks->can_remove_branch_p)
      internal_error ("%s does not support can_remove_branch_p",
! 		    cfg_hooks->name);
  
    if (EDGE_COUNT (e->src->succs) != 2)
      return false;
--- 446,452 ----
  {
    if (!cfg_hooks->can_remove_branch_p)
      internal_error ("%s does not support can_remove_branch_p",
! 		    current_ir_name ());
  
    if (EDGE_COUNT (e->src->succs) != 2)
      return false;
*************** redirect_edge_and_branch_force (edge e,
*** 530,536 ****
  
    if (!cfg_hooks->redirect_edge_and_branch_force)
      internal_error ("%s does not support redirect_edge_and_branch_force",
! 		    cfg_hooks->name);
  
    if (current_loops != NULL)
      rescan_loop_exit (e, false, true);
--- 540,546 ----
  
    if (!cfg_hooks->redirect_edge_and_branch_force)
      internal_error ("%s does not support redirect_edge_and_branch_force",
! 		    current_ir_name ());
  
    if (current_loops != NULL)
      rescan_loop_exit (e, false, true);
*************** split_block_1 (basic_block bb, void *i)
*** 567,573 ****
    edge res;
  
    if (!cfg_hooks->split_block)
!     internal_error ("%s does not support split_block", cfg_hooks->name);
  
    new_bb = cfg_hooks->split_block (bb, i);
    if (!new_bb)
--- 577,583 ----
    edge res;
  
    if (!cfg_hooks->split_block)
!     internal_error ("%s does not support split_block", current_ir_name ());
  
    new_bb = cfg_hooks->split_block (bb, i);
    if (!new_bb)
*************** move_block_after (basic_block bb, basic_
*** 632,638 ****
    bool ret;
  
    if (!cfg_hooks->move_block_after)
!     internal_error ("%s does not support move_block_after", cfg_hooks->name);
  
    ret = cfg_hooks->move_block_after (bb, after);
  
--- 642,649 ----
    bool ret;
  
    if (!cfg_hooks->move_block_after)
!     internal_error ("%s does not support move_block_after",
! 		    current_ir_name ());
  
    ret = cfg_hooks->move_block_after (bb, after);
  
*************** void
*** 645,651 ****
  delete_basic_block (basic_block bb)
  {
    if (!cfg_hooks->delete_basic_block)
!     internal_error ("%s does not support delete_basic_block", cfg_hooks->name);
  
    cfg_hooks->delete_basic_block (bb);
  
--- 656,663 ----
  delete_basic_block (basic_block bb)
  {
    if (!cfg_hooks->delete_basic_block)
!     internal_error ("%s does not support delete_basic_block",
! 		    current_ir_name ());
  
    cfg_hooks->delete_basic_block (bb);
  
*************** split_edge (edge e)
*** 692,698 ****
    basic_block src = e->src, dest = e->dest;
  
    if (!cfg_hooks->split_edge)
!     internal_error ("%s does not support split_edge", cfg_hooks->name);
  
    if (current_loops != NULL)
      rescan_loop_exit (e, false, true);
--- 704,710 ----
    basic_block src = e->src, dest = e->dest;
  
    if (!cfg_hooks->split_edge)
!     internal_error ("%s does not support split_edge", current_ir_name ());
  
    if (current_loops != NULL)
      rescan_loop_exit (e, false, true);
*************** create_basic_block_1 (void *head, void *
*** 770,776 ****
    basic_block ret;
  
    if (!cfg_hooks->create_basic_block)
!     internal_error ("%s does not support create_basic_block", cfg_hooks->name);
  
    ret = cfg_hooks->create_basic_block (head, end, after);
  
--- 782,789 ----
    basic_block ret;
  
    if (!cfg_hooks->create_basic_block)
!     internal_error ("%s does not support create_basic_block",
! 		    current_ir_name ());
  
    ret = cfg_hooks->create_basic_block (head, end, after);
  
*************** can_merge_blocks_p (basic_block bb1, bas
*** 811,817 ****
    bool ret;
  
    if (!cfg_hooks->can_merge_blocks_p)
!     internal_error ("%s does not support can_merge_blocks_p", cfg_hooks->name);
  
    ret = cfg_hooks->can_merge_blocks_p (bb1, bb2);
  
--- 824,831 ----
    bool ret;
  
    if (!cfg_hooks->can_merge_blocks_p)
!     internal_error ("%s does not support can_merge_blocks_p",
! 		    current_ir_name ());
  
    ret = cfg_hooks->can_merge_blocks_p (bb1, bb2);
  
*************** void
*** 822,828 ****
  predict_edge (edge e, enum br_predictor predictor, int probability)
  {
    if (!cfg_hooks->predict_edge)
!     internal_error ("%s does not support predict_edge", cfg_hooks->name);
  
    cfg_hooks->predict_edge (e, predictor, probability);
  }
--- 836,843 ----
  predict_edge (edge e, enum br_predictor predictor, int probability)
  {
    if (!cfg_hooks->predict_edge)
!     internal_error ("%s does not support predict_edge",
! 		    current_ir_name ());
  
    cfg_hooks->predict_edge (e, predictor, probability);
  }
*************** bool
*** 831,837 ****
  predicted_by_p (const_basic_block bb, enum br_predictor predictor)
  {
    if (!cfg_hooks->predict_edge)
!     internal_error ("%s does not support predicted_by_p", cfg_hooks->name);
  
    return cfg_hooks->predicted_by_p (bb, predictor);
  }
--- 846,853 ----
  predicted_by_p (const_basic_block bb, enum br_predictor predictor)
  {
    if (!cfg_hooks->predict_edge)
!     internal_error ("%s does not support predicted_by_p",
! 		    current_ir_name ());
  
    return cfg_hooks->predicted_by_p (bb, predictor);
  }
*************** merge_blocks (basic_block a, basic_block
*** 845,851 ****
    edge_iterator ei;
  
    if (!cfg_hooks->merge_blocks)
!     internal_error ("%s does not support merge_blocks", cfg_hooks->name);
  
    /* Pick the more reliable count.  If both qualities agrees, pick the larger
       one since turning mistakely hot code to cold is more harmful.  */
--- 861,868 ----
    edge_iterator ei;
  
    if (!cfg_hooks->merge_blocks)
!     internal_error ("%s does not support merge_blocks",
! 		    current_ir_name ());
  
    /* Pick the more reliable count.  If both qualities agrees, pick the larger
       one since turning mistakely hot code to cold is more harmful.  */
*************** make_forwarder_block (basic_block bb, bo
*** 936,942 ****
  
    if (!cfg_hooks->make_forwarder_block)
      internal_error ("%s does not support make_forwarder_block",
! 		    cfg_hooks->name);
  
    fallthru = split_block_after_labels (bb);
    dummy = fallthru->src;
--- 953,959 ----
  
    if (!cfg_hooks->make_forwarder_block)
      internal_error ("%s does not support make_forwarder_block",
! 		    current_ir_name ());
  
    fallthru = split_block_after_labels (bb);
    dummy = fallthru->src;
*************** force_nonfallthru (edge e)
*** 1082,1088 ****
  
    if (!cfg_hooks->force_nonfallthru)
      internal_error ("%s does not support force_nonfallthru",
! 		    cfg_hooks->name);
  
    ret = cfg_hooks->force_nonfallthru (e);
    if (ret != NULL)
--- 1099,1105 ----
  
    if (!cfg_hooks->force_nonfallthru)
      internal_error ("%s does not support force_nonfallthru",
! 		    current_ir_name ());
  
    ret = cfg_hooks->force_nonfallthru (e);
    if (ret != NULL)
*************** can_duplicate_block_p (const_basic_block
*** 1116,1122 ****
  {
    if (!cfg_hooks->can_duplicate_block_p)
      internal_error ("%s does not support can_duplicate_block_p",
! 		    cfg_hooks->name);
  
    if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun) || bb == ENTRY_BLOCK_PTR_FOR_FN (cfun))
      return false;
--- 1133,1139 ----
  {
    if (!cfg_hooks->can_duplicate_block_p)
      internal_error ("%s does not support can_duplicate_block_p",
! 		    current_ir_name ());
  
    if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun) || bb == ENTRY_BLOCK_PTR_FOR_FN (cfun))
      return false;
*************** duplicate_block (basic_block bb, edge e,
*** 1145,1151 ****
  
    if (!cfg_hooks->duplicate_block)
      internal_error ("%s does not support duplicate_block",
! 		    cfg_hooks->name);
  
    if (bb->count < new_count)
      new_count = bb->count;
--- 1162,1168 ----
  
    if (!cfg_hooks->duplicate_block)
      internal_error ("%s does not support duplicate_block",
! 		    current_ir_name ());
  
    if (bb->count < new_count)
      new_count = bb->count;
*************** bool
*** 1219,1225 ****
  block_ends_with_call_p (basic_block bb)
  {
    if (!cfg_hooks->block_ends_with_call_p)
!     internal_error ("%s does not support block_ends_with_call_p", cfg_hooks->name);
  
    return (cfg_hooks->block_ends_with_call_p) (bb);
  }
--- 1236,1243 ----
  block_ends_with_call_p (basic_block bb)
  {
    if (!cfg_hooks->block_ends_with_call_p)
!     internal_error ("%s does not support block_ends_with_call_p",
! 		    current_ir_name ());
  
    return (cfg_hooks->block_ends_with_call_p) (bb);
  }
*************** block_ends_with_condjump_p (const_basic_
*** 1231,1237 ****
  {
    if (!cfg_hooks->block_ends_with_condjump_p)
      internal_error ("%s does not support block_ends_with_condjump_p",
! 		    cfg_hooks->name);
  
    return (cfg_hooks->block_ends_with_condjump_p) (bb);
  }
--- 1249,1255 ----
  {
    if (!cfg_hooks->block_ends_with_condjump_p)
      internal_error ("%s does not support block_ends_with_condjump_p",
! 		    current_ir_name ());
  
    return (cfg_hooks->block_ends_with_condjump_p) (bb);
  }
*************** flow_call_edges_add (sbitmap blocks)
*** 1249,1255 ****
  {
    if (!cfg_hooks->flow_call_edges_add)
      internal_error ("%s does not support flow_call_edges_add",
! 		    cfg_hooks->name);
  
    return (cfg_hooks->flow_call_edges_add) (blocks);
  }
--- 1267,1273 ----
  {
    if (!cfg_hooks->flow_call_edges_add)
      internal_error ("%s does not support flow_call_edges_add",
! 		    current_ir_name ());
  
    return (cfg_hooks->flow_call_edges_add) (blocks);
  }
diff -Nrcpad gcc-17-20260503/gcc/cfghooks.h gcc-17-20260510/gcc/cfghooks.h
*** gcc-17-20260503/gcc/cfghooks.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/cfghooks.h	Sun May 10 22:32:06 2026
*************** public:
*** 77,84 ****
  
  struct cfg_hooks
  {
!   /* Name of the corresponding ir.  */
!   const char *name;
  
    /* Debugging.  */
    bool (*verify_flow_info) (void);
--- 77,84 ----
  
  struct cfg_hooks
  {
!   /* The ir that hooks corresponds with.  */
!   enum ir_type ir;
  
    /* Debugging.  */
    bool (*verify_flow_info) (void);
*************** void profile_record_check_consistency (p
*** 283,298 ****
  void profile_record_account_profile (profile_record *);
  
  /* Hooks containers.  */
! extern struct cfg_hooks gimple_cfg_hooks;
! extern struct cfg_hooks rtl_cfg_hooks;
! extern struct cfg_hooks cfg_layout_rtl_cfg_hooks;
  
  /* Declarations.  */
  extern enum ir_type current_ir_type (void);
  extern void rtl_register_cfg_hooks (void);
  extern void cfg_layout_rtl_register_cfg_hooks (void);
  extern void gimple_register_cfg_hooks (void);
! extern struct cfg_hooks get_cfg_hooks (void);
! extern void set_cfg_hooks (struct cfg_hooks);
  
  #endif /* GCC_CFGHOOKS_H */
--- 283,298 ----
  void profile_record_account_profile (profile_record *);
  
  /* Hooks containers.  */
! extern const struct cfg_hooks gimple_cfg_hooks;
! extern const struct cfg_hooks rtl_cfg_hooks;
! extern const struct cfg_hooks cfg_layout_rtl_cfg_hooks;
  
  /* Declarations.  */
  extern enum ir_type current_ir_type (void);
  extern void rtl_register_cfg_hooks (void);
  extern void cfg_layout_rtl_register_cfg_hooks (void);
  extern void gimple_register_cfg_hooks (void);
! extern const struct cfg_hooks *get_cfg_hooks (void);
! extern void set_cfg_hooks (const struct cfg_hooks *);
  
  #endif /* GCC_CFGHOOKS_H */
diff -Nrcpad gcc-17-20260503/gcc/cfgrtl.cc gcc-17-20260510/gcc/cfgrtl.cc
*** gcc-17-20260503/gcc/cfgrtl.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/cfgrtl.cc	Sun May 10 22:32:06 2026
*************** rtl_account_profile_record (basic_block
*** 5384,5391 ****
  }
  
  /* Implementation of CFG manipulation for linearized RTL.  */
! struct cfg_hooks rtl_cfg_hooks = {
!   "rtl",
    rtl_verify_flow_info,
    rtl_dump_bb,
    rtl_dump_bb_for_graph,
--- 5384,5391 ----
  }
  
  /* Implementation of CFG manipulation for linearized RTL.  */
! const struct cfg_hooks rtl_cfg_hooks = {
!   IR_RTL_CFGRTL,
    rtl_verify_flow_info,
    rtl_dump_bb,
    rtl_dump_bb_for_graph,
*************** struct cfg_hooks rtl_cfg_hooks = {
*** 5427,5434 ****
     This representation will hopefully become the default one in future
     version of the compiler.  */
  
! struct cfg_hooks cfg_layout_rtl_cfg_hooks = {
!   "cfglayout mode",
    rtl_verify_flow_info_1,
    rtl_dump_bb,
    rtl_dump_bb_for_graph,
--- 5427,5434 ----
     This representation will hopefully become the default one in future
     version of the compiler.  */
  
! const struct cfg_hooks cfg_layout_rtl_cfg_hooks = {
!   IR_RTL_CFGLAYOUT,
    rtl_verify_flow_info_1,
    rtl_dump_bb,
    rtl_dump_bb_for_graph,
diff -Nrcpad gcc-17-20260503/gcc/combine.cc gcc-17-20260510/gcc/combine.cc
*** gcc-17-20260503/gcc/combine.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/combine.cc	Sun May 10 22:32:06 2026
*************** make_compound_operation_int (scalar_int_
*** 8118,8176 ****
        break;
  
      case PLUS:
-       lhs = XEXP (x, 0);
-       rhs = XEXP (x, 1);
-       lhs = make_compound_operation (lhs, next_code);
-       rhs = make_compound_operation (rhs, next_code);
-       if (GET_CODE (lhs) == MULT && GET_CODE (XEXP (lhs, 0)) == NEG)
- 	{
- 	  tem = simplify_gen_binary (MULT, mode, XEXP (XEXP (lhs, 0), 0),
- 				     XEXP (lhs, 1));
- 	  new_rtx = simplify_gen_binary (MINUS, mode, rhs, tem);
- 	}
-       else if (GET_CODE (lhs) == MULT
- 	       && (CONST_INT_P (XEXP (lhs, 1)) && INTVAL (XEXP (lhs, 1)) < 0))
- 	{
- 	  tem = simplify_gen_binary (MULT, mode, XEXP (lhs, 0),
- 				     simplify_gen_unary (NEG, mode,
- 							 XEXP (lhs, 1),
- 							 mode));
- 	  new_rtx = simplify_gen_binary (MINUS, mode, rhs, tem);
- 	}
-       else
- 	{
- 	  SUBST (XEXP (x, 0), lhs);
- 	  SUBST (XEXP (x, 1), rhs);
- 	}
-       maybe_swap_commutative_operands (x);
-       return x;
- 
      case MINUS:
!       lhs = XEXP (x, 0);
!       rhs = XEXP (x, 1);
!       lhs = make_compound_operation (lhs, next_code);
!       rhs = make_compound_operation (rhs, next_code);
!       if (GET_CODE (rhs) == MULT && GET_CODE (XEXP (rhs, 0)) == NEG)
! 	{
! 	  tem = simplify_gen_binary (MULT, mode, XEXP (XEXP (rhs, 0), 0),
! 				     XEXP (rhs, 1));
! 	  return simplify_gen_binary (PLUS, mode, tem, lhs);
! 	}
!       else if (GET_CODE (rhs) == MULT
! 	       && (CONST_INT_P (XEXP (rhs, 1)) && INTVAL (XEXP (rhs, 1)) < 0))
! 	{
! 	  tem = simplify_gen_binary (MULT, mode, XEXP (rhs, 0),
! 				     simplify_gen_unary (NEG, mode,
! 							 XEXP (rhs, 1),
! 							 mode));
! 	  return simplify_gen_binary (PLUS, mode, tem, lhs);
! 	}
!       else
! 	{
! 	  SUBST (XEXP (x, 0), lhs);
! 	  SUBST (XEXP (x, 1), rhs);
! 	  return x;
! 	}
  
      case AND:
        /* If the second operand is not a constant, we can't do anything
--- 8118,8129 ----
        break;
  
      case PLUS:
      case MINUS:
!       lhs = make_compound_operation (XEXP (x, 0), next_code);
!       rhs = make_compound_operation (XEXP (x, 1), next_code);
!       if (lhs != XEXP (x, 0) || rhs != XEXP (x, 1))
! 	return simplify_gen_binary (code, mode, lhs, rhs);
!       return x;
  
      case AND:
        /* If the second operand is not a constant, we can't do anything
diff -Nrcpad gcc-17-20260503/gcc/config/aarch64/aarch64-passes.def gcc-17-20260510/gcc/config/aarch64/aarch64-passes.def
*** gcc-17-20260503/gcc/config/aarch64/aarch64-passes.def	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/aarch64/aarch64-passes.def	Sun May 10 22:32:06 2026
*************** INSERT_PASS_BEFORE (pass_late_thread_pro
*** 26,29 ****
  INSERT_PASS_BEFORE (pass_shorten_branches, 1, pass_insert_bti);
  INSERT_PASS_BEFORE (pass_early_remat, 1, pass_ldp_fusion);
  INSERT_PASS_BEFORE (pass_peephole2, 1, pass_ldp_fusion);
! INSERT_PASS_BEFORE (pass_cleanup_barriers, 1, pass_narrow_gp_writes);
--- 26,29 ----
  INSERT_PASS_BEFORE (pass_shorten_branches, 1, pass_insert_bti);
  INSERT_PASS_BEFORE (pass_early_remat, 1, pass_ldp_fusion);
  INSERT_PASS_BEFORE (pass_peephole2, 1, pass_ldp_fusion);
! INSERT_PASS_BEFORE (pass_free_cfg, 1, pass_narrow_gp_writes);
diff -Nrcpad gcc-17-20260503/gcc/config/aarch64/aarch64.cc gcc-17-20260510/gcc/config/aarch64/aarch64.cc
*** gcc-17-20260503/gcc/config/aarch64/aarch64.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/aarch64/aarch64.cc	Sun May 10 22:32:06 2026
*************** aarch64_expand_sve_vec_perm (rtx target,
*** 27344,27351 ****
    rtx sel_reg = force_reg (sel_mode, sel);
  
    /* Check if the sel only references the first values vector.  */
!   if (CONST_VECTOR_P (sel)
!       && aarch64_const_vec_all_in_range_p (sel, 0, nunits - 1))
      {
        emit_unspec2 (target, UNSPEC_TBL, op0, sel_reg);
        return;
--- 27344,27352 ----
    rtx sel_reg = force_reg (sel_mode, sel);
  
    /* Check if the sel only references the first values vector.  */
!   if (GET_MODE_MASK (GET_MODE_INNER (sel_mode)) <= nunits - 1U
!       || (CONST_VECTOR_P (sel)
! 	  && aarch64_const_vec_all_in_range_p (sel, 0, nunits - 1)))
      {
        emit_unspec2 (target, UNSPEC_TBL, op0, sel_reg);
        return;
diff -Nrcpad gcc-17-20260503/gcc/config/i386/i386-features.cc gcc-17-20260510/gcc/config/i386/i386-features.cc
*** gcc-17-20260503/gcc/config/i386/i386-features.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/i386/i386-features.cc	Sun May 10 22:32:06 2026
*************** enum x86_cse_kind
*** 3222,3227 ****
--- 3222,3228 ----
  {
    X86_CSE_CONST0_VECTOR,
    X86_CSE_CONSTM1_VECTOR,
+   X86_CSE_CONST_VECTOR,
    X86_CSE_VEC_DUP,
    X86_CSE_TLS_GD,
    X86_CSE_TLS_LD_BASE,
*************** struct redundant_pattern
*** 3240,3245 ****
--- 3241,3249 ----
    rtx tlsdesc_val;
    /* The inner scalar mode.  */
    machine_mode mode;
+   /* The destination mode which can be changed to the integer mode of
+      the same time.  */
+   machine_mode dest_mode;
    /* The instruction which sets the inner scalar.  Nullptr if the inner
       scalar is applied to the whole function, instead of within the same
       block.  */
*************** ix86_place_single_vector_set (rtx dest,
*** 3271,3279 ****
  			      redundant_pattern *load = nullptr)
  {
    basic_block bb = nearest_common_dominator_for_set (CDI_DOMINATORS, bbs);
!   /* For X86_CSE_VEC_DUP, don't place the vector set outside of the loop
!      to avoid extra spills.  */
!   if (!load || load->kind != X86_CSE_VEC_DUP)
      {
        while (bb->loop_father->latch
  	     != EXIT_BLOCK_PTR_FOR_FN (cfun))
--- 3275,3285 ----
  			      redundant_pattern *load = nullptr)
  {
    basic_block bb = nearest_common_dominator_for_set (CDI_DOMINATORS, bbs);
!   /* For X86_CSE_VEC_DUP and X86_CSE_CONST_VECTOR, don't place the vector
!      set outside of the loop to avoid extra spills.  */
!   if (!load
!       || (load->kind != X86_CSE_VEC_DUP
! 	  && load->kind != X86_CSE_CONST_VECTOR))
      {
        while (bb->loop_father->latch
  	     != EXIT_BLOCK_PTR_FOR_FN (cfun))
*************** ix86_place_single_vector_set (rtx dest,
*** 3281,3286 ****
--- 3287,3320 ----
  				      bb->loop_father->header);
      }
  
+   if (CONST_INT_P (src))
+     dest = gen_rtx_SUBREG (load->dest_mode, dest, 0);
+   else if (CONST_VECTOR_P (src))
+     {
+       /* The only possible CONST_VECTORs of SRC are CONST0_RTX and
+ 	 CONSTM1_RTX.  Otherwise,
+ 
+ 	 rtx set = gen_rtx_SET (dest, src);
+ 
+ 	 won't be a valid instruction.  CONST0_RTX always works.  It
+ 	 can comes from:
+ 
+ 	 1. remove_partial_avx_dependency with LOAD == NULL.
+ 	 2. X86_CSE_VEC_DUP with
+ 
+ 	 (insn 48 58 16 3 (set (reg:V4HI 123)
+ 		(const_vector:V4HI [
+ 			(const_int 0 [0]) repeated x4
+ 		  ])) 2065 {*movv4hi_internal} (nil))
+ 
+ 	 3. X86_CSE_CONST0_VECTOR.
+        */
+       machine_mode mode = GET_MODE (dest);
+       if (!(src == CONST0_RTX (mode)
+ 	    || (src == CONSTM1_RTX (mode)
+ 		&& load->kind == X86_CSE_CONSTM1_VECTOR)))
+ 	gcc_unreachable ();
+     }
    rtx set = gen_rtx_SET (dest, src);
  
    rtx_insn *insn = BB_HEAD (bb);
*************** ix86_place_single_vector_set (rtx dest,
*** 3321,3330 ****
  	}
      }
  
!   /* NB: CONST_VECTOR load is generated and handled in x86_cse.  */
!   if (load
!       && !CONST_VECTOR_P (src)
!       && load->kind == X86_CSE_VEC_DUP)
      {
        /* Get the source from LOAD as (reg:SI 99) in
  
--- 3355,3361 ----
  	}
      }
  
!   if (load && load->kind == X86_CSE_VEC_DUP)
      {
        /* Get the source from LOAD as (reg:SI 99) in
  
*************** ix86_broadcast_inner (rtx op, machine_mo
*** 3729,3783 ****
    if (nunits < 2)
      return nullptr;
  
!   *kind_p = X86_CSE_VEC_DUP;
! 
!   rtx reg;
!   if (GET_CODE (op) == VEC_DUPLICATE)
      {
!       /* Only
! 	  (vec_duplicate:V4SI (reg:SI 99))
! 	  (vec_duplicate:V2DF (mem/u/c:DF (symbol_ref/u:DI ("*.LC1") [flags 0x2]) [0  S8 A64]))
! 	 are supported.  Set OP to the broadcast source by default.  */
!       op = XEXP (op, 0);
!       reg = op;
!       if (SUBREG_P (op)
! 	  && SUBREG_BYTE (op) == 0
! 	  && !paradoxical_subreg_p (op))
! 	reg = SUBREG_REG (op);
!       if (!REG_P (reg))
  	{
! 	  if (MEM_P (op)
! 	      && SYMBOL_REF_P (XEXP (op, 0))
! 	      && CONSTANT_POOL_ADDRESS_P (XEXP (op, 0)))
  	    {
! 	      /* Handle constant broadcast from memory.  */
! 	      *scalar_mode_p = GET_MODE_INNER (mode);
! 	      *insn_p = nullptr;
! 	      return op;
  	    }
- 	  return nullptr;
  	}
      }
!   else if (CONST_VECTOR_P (op))
      {
        rtx first = XVECEXP (op, 0, 0);
!       for (int i = 1; i < nunits; ++i)
  	{
! 	  rtx tmp = XVECEXP (op, 0, i);
! 	  /* Vector duplicate value.  */
! 	  if (!rtx_equal_p (tmp, first))
  	    return nullptr;
  	}
-       /* Use the inner mode to handle
- 	   (const_vector:V2QI [(const_int 0 [0]) repeated x2])
-        */
-       *scalar_mode_p = GET_MODE_INNER (mode);
-       *insn_p = nullptr;
-       return first;
      }
!   else
      return nullptr;
  
    mode = GET_MODE (op);
  
    /* Only single def chain is supported.  */
--- 3760,3935 ----
    if (nunits < 2)
      return nullptr;
  
!   bool const_vector_p = CONST_VECTOR_P (op);
!   bool duplicated = GET_CODE (op) == VEC_DUPLICATE;
!   rtx orig_op = op;
!   if (!const_vector_p)
      {
!       /* Check CONST_VECTOR in REG_EQUAL note.  */
!       rtx equal = find_reg_equal_equiv_note (*insn_p);
!       if (equal)
  	{
! 	  equal = XEXP (equal, 0);
! 	  const_vector_p = CONST_VECTOR_P (equal);
! 	  /* Use CONST_VECTOR in REG_EQUAL note.  */
! 	  if (const_vector_p)
  	    {
! 	      /* Handle REG_EQUAL note in:
! 
! 		 (insn 7 5 12 2 (set (subreg:V8SI (reg:V4DI 100) 0)
! 			(vec_duplicate:V8SI (reg:SI 102)))
! 		    (expr_list:REG_DEAD (reg:SI 102)
! 		       (expr_list:REG_EQUAL (const_vector:V4DI [
! 			  (const_int -1 [0xffffffffffffffff]) repeated x4]) (nil))))
! 
! 		 NB: Don't treat it as CONST_VECTOR since EQUAL isn't
! 		 supported by ISAs as in gcc.target/i386/pr40957.c.  */
! 	      if (GET_MODE (equal) != mode)
! 		const_vector_p = false;
! 	      else
! 		op = equal;
  	    }
  	}
      }
! 
!   machine_mode inner_mode = GET_MODE_INNER (mode);
! 
!   if (const_vector_p)
      {
+       bool int_load_p = GET_MODE_SIZE (mode) <= UNITS_PER_WORD;
+       *kind_p = X86_CSE_CONST_VECTOR;
+       if (int_load_p)
+ 	{
+ 	  /* This CONST_VECTOR load can be converted to constant
+ 	     integer load.  */
+ 	  *scalar_mode_p = mode;
+ 	  *insn_p = nullptr;
+ 	  return op;
+ 	}
+ 
+       /* This CONST_VECTOR is wider than the integer register.  */
        rtx first = XVECEXP (op, 0, 0);
! 
!       if (duplicated)
  	{
! 	  /* Check if CONST_VECTOR in REG_EQUAL note is duplicated in
! 
! 	     (insn 10 7 12 2 (set (reg:V8SI 128)
! 		(vec_duplicate:V8SI (vec_select:V2SI (reg:V4SI 180)
! 			(parallel [(const_int 0 [0])
! 				   (const_int 1 [0x1])]))))
! 		  (expr_list:REG_EQUAL (const_vector:V8SI [
! 		    (const_int 0 [0])
! 		    (const_int 34 [0x22])
! 		    (const_int 0 [0])
! 		    (const_int 34 [0x22])
! 		    (const_int 0 [0])
! 		    (const_int 34 [0x22])
! 		    (const_int 0 [0])
! 		    (const_int 34 [0x22])])(nil)))
! 
! 	   */
! 
! 	  bool duplicated_const_vector = true;
! 	  for (int i = 1; i < nunits; ++i)
! 	    {
! 	      rtx tmp = XVECEXP (op, 0, i);
! 	      if (!rtx_equal_p (tmp, first))
! 		{
! 		  duplicated_const_vector = false;
! 		  break;
! 		}
! 	    }
! 
! 	  if (duplicated_const_vector)
! 	    {
! 	      bool const_double_p = CONST_DOUBLE_P (first);
! 	      /* Force the floating point constant to memory.  */
! 	      if (const_double_p)
! 		first = validize_mem (force_const_mem (inner_mode, first));
! 
! 	      if (const_double_p || CONST_INT_P (first))
! 		{
! 		  /* Handle
! 
! 		     (insn 7 6 8 2 (set (reg:V4SF 99)
! 			  (vec_duplicate:V4SF (mem/u/c:SF (symbol_ref/u:DI ("*.LC2") [flags 0x2]) [0  S4 A32])))
! 			(expr_list:REG_EQUAL (const_vector:V4SF [
! 			   (const_double:SF 3.4e+1 [0x0.88p+6]) repeated x4]) (nil)))
! 
! 		     and
! 
! 		     (insn 14 15 16 3 (set (reg:V4SI 116)
! 			  (vec_duplicate:V4SI (reg:SI 117)))
! 		       (expr_list:REG_EQUAL (const_vector:V4SI [
! 			  (const_int 34 [0x22]) repeated x4]) (nil)))
! 
! 		   */
! 		  *kind_p = X86_CSE_VEC_DUP;
! 		  *insn_p = nullptr;
! 		  *scalar_mode_p = inner_mode;
! 		  return first;
! 		}
! 	    }
! 
! 	  op = orig_op;
! 	}
!       else
! 	{
! 	  /* Only native CONST_VECTOR is allowed.  */
! 	  if (orig_op != op)
  	    return nullptr;
+ 
+ 	  /* Check if VEC_DUPLICATE can be used.  */
+ 	  for (int i = 1; i < nunits; ++i)
+ 	    {
+ 	      rtx tmp = XVECEXP (op, 0, i);
+ 	      /* Vector duplicate value.  */
+ 	      if (!rtx_equal_p (tmp, first))
+ 		return nullptr;
+ 	    }
+ 
+ 	  /* Use the inner mode to handle
+ 	     (const_vector:V2QI [(const_int 0 [0]) repeated x2])
+ 	   */
+ 	  *scalar_mode_p = inner_mode;
+ 	  *insn_p = nullptr;
+ 	  return first;
  	}
      }
! 
!   if (!duplicated)
      return nullptr;
  
+   *kind_p = X86_CSE_VEC_DUP;
+ 
+   /* Only
+ 
+      (vec_duplicate:V4SI (reg:SI 99))
+      (vec_duplicate:V2DF (mem/u/c:DF (symbol_ref/u:DI ("*.LC1") [flags 0x2]) [0 S8 A64]))
+ 
+      are supported.  Set OP to the broadcast source by default.  */
+   op = XEXP (op, 0);
+   rtx reg = op;
+   if (SUBREG_P (op)
+       && SUBREG_BYTE (op) == 0
+       && !paradoxical_subreg_p (op))
+     reg = SUBREG_REG (op);
+   if (!REG_P (reg))
+     {
+       if (MEM_P (op)
+ 	  && SYMBOL_REF_P (XEXP (op, 0))
+ 	  && CONSTANT_POOL_ADDRESS_P (XEXP (op, 0)))
+ 	{
+ 	  /* Handle constant broadcast from memory.  */
+ 	  *scalar_mode_p = inner_mode;
+ 	  *insn_p = nullptr;
+ 	  return op;
+ 	}
+       return nullptr;
+     }
+ 
+   machine_mode orig_mode = mode;
    mode = GET_MODE (op);
  
    /* Only single def chain is supported.  */
*************** ix86_broadcast_inner (rtx op, machine_mo
*** 3813,3825 ****
  	 Set *INSN_P to nullptr and return SET_SRC if SET_SRC is an
  	 integer constant.  */
        op = src;
!       if (SCALAR_INT_MODE_P (mode))
  	{
! 	  if (mode != GET_MODE (reg))
! 	    op = gen_int_mode (INTVAL (src), mode);
  	}
!       else if (op == const0_rtx)
! 	op = CONST0_RTX (mode);
        *insn_p = nullptr;
      }
    else
--- 3965,4014 ----
  	 Set *INSN_P to nullptr and return SET_SRC if SET_SRC is an
  	 integer constant.  */
        op = src;
!       if (SCALAR_INT_MODE_P (mode) && mode != GET_MODE (reg))
! 	op = gen_int_mode (INTVAL (src), mode);
!       if (op == const0_rtx)
  	{
! 	   if (standard_sse_constant_p (CONST0_RTX (orig_mode),
! 					orig_mode) == 1)
! 	     {
! 	       *scalar_mode_p = QImode;
! 	       *kind_p = X86_CSE_CONST0_VECTOR;
! 	       *insn_p = nullptr;
! 	       return const0_rtx;
! 	     }
! 	   op = CONST0_RTX (mode);
  	}
!       else if (op == constm1_rtx
! 	       && standard_sse_constant_p (CONSTM1_RTX (orig_mode),
! 					   orig_mode) == 2)
! 	{
! 	  *scalar_mode_p = QImode;
! 	  *kind_p = X86_CSE_CONSTM1_VECTOR;
! 	  *insn_p = nullptr;
! 	  return constm1_rtx;
! 	}
! 
!       /* Check if we can convert:
! 
! 	 (insn 14 465 412 3 (set (reg:SI 507 [ j_lsm.26 ])
! 		(const_int 2 [0x2])) "foo.c":10:12 discrim 2 100 {*movsi_internal} (nil))
! 	 ...
! 	 (insn 518 507 434 16 (set (reg:V2SI 493)
! 		(vec_duplicate:V2SI (reg:SI 507 [ j_lsm.26 ]))) 2395 {*vec_dupv2si} (nil))
! 
! 	 to constant integer load:
! 
! 	 (insn 566 55 56 6 (set (subreg:DI (reg:V2SI 517) 0)
! 		(const_int 8589934594 [0x200000002])) -1 (nil))
! 	 ...
! 	 (insn 518 507 434 16 (set (reg:V2SI 493)
! 		(reg:V2SI 517)) 2066 {*movv2si_internal} (nil))
! 
!        */
!       if (GET_MODE_SIZE (orig_mode) <= UNITS_PER_WORD)
! 	*kind_p = X86_CSE_CONST_VECTOR;
! 
        *insn_p = nullptr;
      }
    else
*************** private:
*** 4356,4362 ****
    unsigned int x86_cse (void);
    bool candidate_gnu_tls_p (rtx_insn *, attr_tls64);
    bool candidate_gnu2_tls_p (rtx, attr_tls64);
!   bool candidate_vector_p (rtx);
    rtx_insn *tls_set_insn_from_symbol (const_rtx, const_rtx);
  }; // class pass_x86_cse
  
--- 4545,4551 ----
    unsigned int x86_cse (void);
    bool candidate_gnu_tls_p (rtx_insn *, attr_tls64);
    bool candidate_gnu2_tls_p (rtx, attr_tls64);
!   bool candidate_vector_p (rtx, rtx_insn *);
    rtx_insn *tls_set_insn_from_symbol (const_rtx, const_rtx);
  }; // class pass_x86_cse
  
*************** pass_x86_cse::candidate_gnu2_tls_p (rtx
*** 4538,4544 ****
    INSN is a vector broadcast instruction.  */
  
  bool
! pass_x86_cse::candidate_vector_p (rtx set)
  {
    rtx src = SET_SRC (set);
    rtx dest = SET_DEST (set);
--- 4727,4733 ----
    INSN is a vector broadcast instruction.  */
  
  bool
! pass_x86_cse::candidate_vector_p (rtx set, rtx_insn *insn)
  {
    rtx src = SET_SRC (set);
    rtx dest = SET_DEST (set);
*************** pass_x86_cse::candidate_vector_p (rtx se
*** 4551,4556 ****
--- 4740,4746 ----
    if (!REG_P (dest) && !SUBREG_P (dest))
      return false;
  
+   def_insn = insn;
    val = ix86_broadcast_inner (src, mode, &scalar_mode, &kind,
  			      &def_insn);
    return val ? true : false;
*************** pass_x86_cse::x86_cse (void)
*** 4584,4589 ****
--- 4774,4780 ----
    unsigned int i;
    auto_bitmap updated_gnu_tls_insns;
    auto_bitmap updated_gnu2_tls_insns;
+   auto_bitmap call_bbs;
  
    df_set_flags (DF_DEFER_INSN_RESCAN);
  
*************** pass_x86_cse::x86_cse (void)
*** 4601,4613 ****
  	     them.  */
  	  unsigned int threshold = 2;
  
  	  rtx set = single_set (insn);
! 	  if (!set && !CALL_P (insn))
  	    continue;
  
  	  tlsdesc_val = nullptr;
  
  	  attr_tls64 tls64 = get_attr_tls64 (insn);
  	  switch (tls64)
  	    {
  	    case TLS64_GD:
--- 4792,4810 ----
  	     them.  */
  	  unsigned int threshold = 2;
  
+ 	  bool call_p = CALL_P (insn);
  	  rtx set = single_set (insn);
! 	  if (!set && !call_p)
  	    continue;
  
  	  tlsdesc_val = nullptr;
  
  	  attr_tls64 tls64 = get_attr_tls64 (insn);
+ 
+ 	  /* NB: TLS calls preserve all registers.  */
+ 	  if (call_p && tls64 == TLS64_NONE)
+ 	    bitmap_set_bit (call_bbs, BLOCK_FOR_INSN (insn)->index);
+ 
  	  switch (tls64)
  	    {
  	    case TLS64_GD:
*************** pass_x86_cse::x86_cse (void)
*** 4633,4639 ****
  		continue;
  
  	      /* Check for vector broadcast.  */
! 	      if (candidate_vector_p (set))
  		break;
  	      continue;
  	    }
--- 4830,4836 ----
  		continue;
  
  	      /* Check for vector broadcast.  */
! 	      if (candidate_vector_p (set, insn))
  		break;
  	      continue;
  	    }
*************** pass_x86_cse::x86_cse (void)
*** 4644,4650 ****
  		&& load->kind == kind
  		&& load->mode == scalar_mode
  		&& (load->bb == bb
! 		    || kind != X86_CSE_VEC_DUP
  		    /* Non all 0s/1s vector load must be in the same
  		       basic block if it is in a recursive call.  */
  		    || !recursive_call_p)
--- 4841,4848 ----
  		&& load->kind == kind
  		&& load->mode == scalar_mode
  		&& (load->bb == bb
! 		    || (kind != X86_CSE_VEC_DUP
! 			&& kind != X86_CSE_CONST_VECTOR)
  		    /* Non all 0s/1s vector load must be in the same
  		       basic block if it is in a recursive call.  */
  		    || !recursive_call_p)
*************** pass_x86_cse::x86_cse (void)
*** 4677,4688 ****
--- 4875,4893 ----
  	     instruction basic block and the instruction kind.  */
  	  load = new redundant_pattern;
  
+ 	  /* Convert CONST_VECTOR load no larger than integer register
+ 	     to constant integer load even if there is no redundant
+ 	     CONST_VECTOR load.  */
+ 	  if (CONST_VECTOR_P (val))
+ 	    threshold = 1;
+ 
  	  load->val = copy_rtx (val);
  	  if (tlsdesc_val)
  	    load->tlsdesc_val = copy_rtx (tlsdesc_val);
  	  else
  	    load->tlsdesc_val = nullptr;
  	  load->mode = scalar_mode;
+ 	  load->dest_mode = mode;
  	  load->size = GET_MODE_SIZE (mode);
  	  load->def_insn = def_insn;
  	  load->count = 1;
*************** pass_x86_cse::x86_cse (void)
*** 4724,4733 ****
  		    || load->size <= UNITS_PER_WORD))
  	      {
  		/* Generate CONST_VECTOR load.  */
  		mode = ix86_get_vector_cse_mode (load->size,
  						 load->mode);
  
! 		if (load->val == CONST0_RTX (load->mode))
  		  broadcast_source = CONST0_RTX (mode);
  		else if (load->val == CONSTM1_RTX (load->mode))
  		  broadcast_source = CONSTM1_RTX (mode);
--- 4929,4941 ----
  		    || load->size <= UNITS_PER_WORD))
  	      {
  		/* Generate CONST_VECTOR load.  */
+ 	      case X86_CSE_CONST_VECTOR:
  		mode = ix86_get_vector_cse_mode (load->size,
  						 load->mode);
  
! 		if (CONST_VECTOR_P (load->val))
! 		  broadcast_source = load->val;
! 		else if (load->val == CONST0_RTX (load->mode))
  		  broadcast_source = CONST0_RTX (mode);
  		else if (load->val == CONSTM1_RTX (load->mode))
  		  broadcast_source = CONSTM1_RTX (mode);
*************** pass_x86_cse::x86_cse (void)
*** 4757,4771 ****
  		       */
  		    machine_mode int_mode
  		      = int_mode_for_mode (mode).require ();
  		    broadcast_source = simplify_subreg (int_mode,
  							broadcast_source,
  							mode, 0);
  		    gcc_assert (broadcast_source != nullptr);
! 		    replace_vector_const (mode, broadcast_source,
! 					  load->insns, int_mode);
! 		    /* Keep redundant constant integer load.  */
! 		    load->broadcast_source = nullptr;
! 		    load->broadcast_reg = nullptr;
  		    break;
  		  }
  	      }
--- 4965,5010 ----
  		       */
  		    machine_mode int_mode
  		      = int_mode_for_mode (mode).require ();
+ 		    load->dest_mode = int_mode;
  		    broadcast_source = simplify_subreg (int_mode,
  							broadcast_source,
  							mode, 0);
  		    gcc_assert (broadcast_source != nullptr);
! 
! 		    bool keep_const_int_load = false;
! 		    if (!bitmap_empty_p (call_bbs))
! 		      {
! 			bitmap_iterator bi;
! 			unsigned int id;
! 			EXECUTE_IF_SET_IN_BITMAP (load->bbs, 0, id, bi)
! 			  if (bitmap_bit_p (call_bbs, id))
! 			    {
! 			      /* NB: Constant integer load is faster
! 				 than save and restore an integer
! 				 register when crossing a function call.
! 			       */
! 			      keep_const_int_load = true;
! 			      break;
! 			    }
! 		      }
! 
! 		    if (keep_const_int_load)
! 		      {
! 			/* Keep constant integer load.  */
! 			replace_vector_const (mode, broadcast_source,
! 					      load->insns, int_mode);
! 			load->broadcast_source = nullptr;
! 			load->broadcast_reg = nullptr;
! 		      }
! 		    else
! 		      {
! 			broadcast_reg = gen_reg_rtx (mode);
! 			reg = gen_reg_rtx (load->mode);
! 			replace_vector_const (mode, broadcast_reg,
! 					      load->insns, load->mode);
! 			load->broadcast_source = broadcast_source;
! 			load->broadcast_reg = broadcast_reg;
! 		      }
  		    break;
  		  }
  	      }
*************** pass_x86_cse::x86_cse (void)
*** 4796,4801 ****
--- 5035,5041 ----
  		case X86_CSE_CONSTM1_VECTOR:
  		  broadcast_source = CONSTM1_RTX (mode);
  		  break;
+ 		case X86_CSE_CONST_VECTOR:
  		case X86_CSE_VEC_DUP:
  		  if (!broadcast_source)
  		    {
*************** pass_x86_cse::x86_cse (void)
*** 4887,4892 ****
--- 5127,5133 ----
  					      updated_gnu_tls_insns,
  					      updated_gnu2_tls_insns);
  		  break;
+ 		case X86_CSE_CONST_VECTOR:
  		case X86_CSE_VEC_DUP:
  		  /* Keep redundant constant integer load.  */
  		  if (!load->broadcast_reg)
diff -Nrcpad gcc-17-20260503/gcc/config/i386/i386.cc gcc-17-20260510/gcc/config/i386/i386.cc
*** gcc-17-20260503/gcc/config/i386/i386.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/i386/i386.cc	Sun May 10 22:32:06 2026
*************** ix86_stack_protect_guard (void)
*** 25524,25529 ****
--- 25524,25537 ----
    return default_stack_protect_guard ();
  }
  
+ /* Implement TARGET_STACK_PROTECT_GUARD_SYMBOL_P.  */
+ 
+ static bool
+ ix86_stack_protect_guard_symbol_p (void)
+ {
+   return TARGET_SSP_GLOBAL_GUARD;
+ }
+ 
  static bool
  ix86_stack_protect_runtime_enabled_p (void)
  {
*************** ix86_libgcc_floating_mode_supported_p
*** 28539,28544 ****
--- 28547,28556 ----
  #undef TARGET_STACK_PROTECT_GUARD
  #define TARGET_STACK_PROTECT_GUARD ix86_stack_protect_guard
  
+ #undef TARGET_STACK_PROTECT_GUARD_SYMBOL_P
+ #define TARGET_STACK_PROTECT_GUARD_SYMBOL_P \
+   ix86_stack_protect_guard_symbol_p
+ 
  #undef TARGET_STACK_PROTECT_RUNTIME_ENABLED_P
  #define TARGET_STACK_PROTECT_RUNTIME_ENABLED_P \
    ix86_stack_protect_runtime_enabled_p
diff -Nrcpad gcc-17-20260503/gcc/config/i386/i386.md gcc-17-20260510/gcc/config/i386/i386.md
*** gcc-17-20260503/gcc/config/i386/i386.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/i386/i386.md	Sun May 10 22:32:06 2026
***************
*** 12772,12777 ****
--- 12772,12778 ----
     "reload_completed
      && GET_MODE (operands[2]) != QImode
      && (!REG_P (operands[2]) || ANY_QI_REG_P (operands[2]))
+     && !(MEM_P (operands[2]) && MEM_VOLATILE_P (operands[2]))
      && ((ix86_match_ccmode (insn, CCZmode)
  	 && !(INTVAL (operands[3]) & ~255))
  	|| (ix86_match_ccmode (insn, CCNOmode)
***************
*** 19573,19580 ****
              (match_operand:SWI48 0 "nonimmediate_operand" "r,m")
              (const_int 1)
  	    (subreg:QI
! 	      (and:SWI248
! 		(match_operand:SWI248 1 "register_operand")
  		(match_operand 2 "const_int_operand")) 0))))]
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<SWI48:MODE>mode)-1))
--- 19574,19581 ----
              (match_operand:SWI48 0 "nonimmediate_operand" "r,m")
              (const_int 1)
  	    (subreg:QI
! 	      (and
! 		(match_operand 1 "int248_register_operand")
  		(match_operand 2 "const_int_operand")) 0))))]
    "TARGET_USE_BT
     && (INTVAL (operands[2]) & (GET_MODE_BITSIZE (<SWI48:MODE>mode)-1))
***************
*** 19629,19635 ****
    [(set (pc)
    	(if_then_else (match_operator 0 "bt_comparison_operator"
  			[(zero_extract:SWI48
! 			   (match_operand:SWI48 1 "register_operand")
  			   (const_int 1)
  			   (and:QI
  			     (match_operand:QI 2 "register_operand")
--- 19630,19636 ----
    [(set (pc)
    	(if_then_else (match_operator 0 "bt_comparison_operator"
  			[(zero_extract:SWI48
! 			   (match_operand:SWI48 1 "nonimmediate_operand")
  			   (const_int 1)
  			   (and:QI
  			     (match_operand:QI 2 "register_operand")
***************
*** 19665,19675 ****
    [(set (pc)
    	(if_then_else (match_operator 0 "bt_comparison_operator"
  			[(zero_extract:SWI48
! 			   (match_operand:SWI48 1 "register_operand")
  			   (const_int 1)
  			   (subreg:QI
! 			     (and:SWI248
! 			       (match_operand:SWI248 2 "register_operand")
  			       (match_operand 3 "const_int_operand")) 0))
  			 (const_int 0)])
  		      (label_ref (match_operand 4))
--- 19666,19676 ----
    [(set (pc)
    	(if_then_else (match_operator 0 "bt_comparison_operator"
  			[(zero_extract:SWI48
! 			   (match_operand:SWI48 1 "nonimmediate_operand")
  			   (const_int 1)
  			   (subreg:QI
! 			     (and
! 			       (match_operand 2 "int248_register_operand")
  			       (match_operand 3 "const_int_operand")) 0))
  			 (const_int 0)])
  		      (label_ref (match_operand 4))
***************
*** 19704,19710 ****
  	(if_then_else:SWI248
  	 (match_operator 5 "bt_comparison_operator"
  	  [(zero_extract:SWI48
! 	    (match_operand:SWI48 1 "register_operand")
  	    (const_int 1)
  	    (match_operand:QI 2 "register_operand"))
  	   (const_int 0)])
--- 19705,19711 ----
  	(if_then_else:SWI248
  	 (match_operator 5 "bt_comparison_operator"
  	  [(zero_extract:SWI48
! 	    (match_operand:SWI48 1 "nonimmediate_operand")
  	    (const_int 1)
  	    (match_operand:QI 2 "register_operand"))
  	   (const_int 0)])
***************
*** 19730,19736 ****
  (define_insn_and_split "*bt<mode>_setcqi"
    [(set (subreg:SWI48 (match_operand:QI 0 "register_operand") 0)
          (zero_extract:SWI48
!          (match_operand:SWI48 1 "register_operand")
           (const_int 1)
           (match_operand:QI 2 "register_operand")))
     (clobber (reg:CC FLAGS_REG))]
--- 19731,19737 ----
  (define_insn_and_split "*bt<mode>_setcqi"
    [(set (subreg:SWI48 (match_operand:QI 0 "register_operand") 0)
          (zero_extract:SWI48
!          (match_operand:SWI48 1 "nonimmediate_operand")
           (const_int 1)
           (match_operand:QI 2 "register_operand")))
     (clobber (reg:CC FLAGS_REG))]
***************
*** 19750,19756 ****
  	(and:QI
  	 (not:QI
  	  (subreg:QI
! 	   (lshiftrt:SWI48 (match_operand:SWI48 1 "register_operand")
  			   (match_operand:QI 2 "register_operand")) 0))
  	 (const_int 1)))
     (clobber (reg:CC FLAGS_REG))]
--- 19751,19757 ----
  	(and:QI
  	 (not:QI
  	  (subreg:QI
! 	   (lshiftrt:SWI48 (match_operand:SWI48 1 "nonimmediate_operand")
  			   (match_operand:QI 2 "register_operand")) 0))
  	 (const_int 1)))
     (clobber (reg:CC FLAGS_REG))]
***************
*** 19768,19774 ****
    [(set (match_operand:SWI48 0 "register_operand")
  	(and:SWI48
  	 (not:SWI48
! 	  (lshiftrt:SWI48 (match_operand:SWI48 1 "register_operand")
  			  (match_operand:QI 2 "register_operand")))
  	 (const_int 1)))
     (clobber (reg:CC FLAGS_REG))]
--- 19769,19775 ----
    [(set (match_operand:SWI48 0 "register_operand")
  	(and:SWI48
  	 (not:SWI48
! 	  (lshiftrt:SWI48 (match_operand:SWI48 1 "nonimmediate_operand")
  			  (match_operand:QI 2 "register_operand")))
  	 (const_int 1)))
     (clobber (reg:CC FLAGS_REG))]
***************
*** 19789,19795 ****
    [(set (match_operand:QI 0 "register_operand")
  	(eq:QI
  	  (zero_extract:SWI48
!  	    (match_operand:SWI48 1 "register_operand")
  	    (const_int 1)
  	    (match_operand:QI 2 "register_operand"))
  	  (const_int 0)))
--- 19790,19796 ----
    [(set (match_operand:QI 0 "register_operand")
  	(eq:QI
  	  (zero_extract:SWI48
! 	    (match_operand:SWI48 1 "nonimmediate_operand")
  	    (const_int 1)
  	    (match_operand:QI 2 "register_operand"))
  	  (const_int 0)))
***************
*** 19808,19818 ****
  (define_insn_and_split "*bt<mode>_setc<mode>_mask"
    [(set (match_operand:SWI48 0 "register_operand")
  	(zero_extract:SWI48
!  	  (match_operand:SWI48 1 "register_operand")
  	  (const_int 1)
  	  (subreg:QI
! 	    (and:SWI48
! 	      (match_operand:SWI48 2 "register_operand")
  	      (match_operand 3 "const_int_operand")) 0)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_BT
--- 19809,19819 ----
  (define_insn_and_split "*bt<mode>_setc<mode>_mask"
    [(set (match_operand:SWI48 0 "register_operand")
  	(zero_extract:SWI48
! 	  (match_operand:SWI48 1 "nonimmediate_operand")
  	  (const_int 1)
  	  (subreg:QI
! 	    (and
! 	      (match_operand 2 "int248_register_operand")
  	      (match_operand 3 "const_int_operand")) 0)))
     (clobber (reg:CC FLAGS_REG))]
    "TARGET_USE_BT
diff -Nrcpad gcc-17-20260503/gcc/config/i386/x86-tune.def gcc-17-20260510/gcc/config/i386/x86-tune.def
*** gcc-17-20260503/gcc/config/i386/x86-tune.def	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/i386/x86-tune.def	Sun May 10 22:32:06 2026
*************** DEF_TUNE (X86_TUNE_AVX512_MOVE_BY_PIECES
*** 654,665 ****
  /* X86_TUNE_AVX512_TWO_EPILOGUES: Use two vector epilogues for 512-bit
     vectorized loops.  */
  DEF_TUNE (X86_TUNE_AVX512_TWO_EPILOGUES, "avx512_two_epilogues",
! 	  m_ZNVER4 | m_ZNVER5)
  
  /* X86_TUNE_AVX512_MAKED_EPILOGUES: Use two masked vector epilogues
     when fit.  */
  DEF_TUNE (X86_TUNE_AVX512_MASKED_EPILOGUES, "avx512_masked_epilogues",
! 	  m_ZNVER4 | m_ZNVER5 | m_C86_4G_M7)
  
  /*****************************************************************************/
  /*****************************************************************************/
--- 654,665 ----
  /* X86_TUNE_AVX512_TWO_EPILOGUES: Use two vector epilogues for 512-bit
     vectorized loops.  */
  DEF_TUNE (X86_TUNE_AVX512_TWO_EPILOGUES, "avx512_two_epilogues",
! 	  m_ZNVER4 | m_ZNVER5 | m_ZNVER6)
  
  /* X86_TUNE_AVX512_MAKED_EPILOGUES: Use two masked vector epilogues
     when fit.  */
  DEF_TUNE (X86_TUNE_AVX512_MASKED_EPILOGUES, "avx512_masked_epilogues",
! 	  m_ZNVER4 | m_ZNVER5 | m_ZNVER6 | m_C86_4G_M7)
  
  /*****************************************************************************/
  /*****************************************************************************/
diff -Nrcpad gcc-17-20260503/gcc/config/loongarch/constraints.md gcc-17-20260510/gcc/config/loongarch/constraints.md
*** gcc-17-20260503/gcc/config/loongarch/constraints.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/loongarch/constraints.md	Sun May 10 22:32:06 2026
***************
*** 370,372 ****
--- 370,381 ----
     and offset that is suitable for use in instructions with the same
     addressing mode as @code{preld}."
     (match_test "loongarch_12bit_offset_address_p (op, mode)"))
+ 
+ (define_constraint "ZE"
+   "A symbolic suitable as stack canary in the normal/medium code model."
+   (match_operand 0 "ssp_normal_operand"))
+ 
+ (define_constraint "ZF"
+   "A symbolic suitable as stack canary, but in the extreme code model."
+   (and (match_operand 0 "ssp_operand")
+        (not (match_operand 0 "ssp_normal_operand"))))
diff -Nrcpad gcc-17-20260503/gcc/config/loongarch/loongarch-protos.h gcc-17-20260510/gcc/config/loongarch/loongarch-protos.h
*** gcc-17-20260503/gcc/config/loongarch/loongarch-protos.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/loongarch/loongarch-protos.h	Sun May 10 22:32:06 2026
*************** extern bool loongarch_parse_fmv_features
*** 235,238 ****
--- 235,239 ----
  extern void get_feature_mask_for_version (tree, loongarch_fmv_feature_mask *,
  					  auto_vec<unsigned int> *);
  extern int loongarch_compare_version_priority (tree, tree);
+ extern void loongarch_output_asm_load_canary (rtx reg, rtx canary, rtx tmp);
  #endif /* ! GCC_LOONGARCH_PROTOS_H */
diff -Nrcpad gcc-17-20260503/gcc/config/loongarch/loongarch.cc gcc-17-20260510/gcc/config/loongarch/loongarch.cc
*** gcc-17-20260503/gcc/config/loongarch/loongarch.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/loongarch/loongarch.cc	Sun May 10 22:32:06 2026
*************** loongarch_rtx_costs (rtx x, machine_mode
*** 4280,4285 ****
--- 4280,4286 ----
      case EQ:
      case NE:
      case UNORDERED:
+     case ORDERED:
      case LTGT:
      case UNGE:
      case UNGT:
*************** loongarch_split_vector_move (rtx dest, r
*** 5108,5115 ****
    machine_mode mode = GET_MODE (dest);
    bool lsx_p = LSX_SUPPORTED_MODE_P (mode);
  
!   if (FP_REG_RTX_P (dest))
      {
        gcc_assert (!MEM_P (src));
  
        rtx (*gen_vinsgr2vr_d) (rtx, rtx, rtx, rtx);
--- 5109,5145 ----
    machine_mode mode = GET_MODE (dest);
    bool lsx_p = LSX_SUPPORTED_MODE_P (mode);
  
!   if (FP_REG_RTX_P (dest) && GP_REG_RTX_P (src))
      {
+     /* Since the LoongArch architecture has not yet implemented vector
+        parameter passing, the following operations are required when
+        a function returns a vector type that needs to be passed to a
+        vector register.
+ 
+        As shown in the following instruction sequence:
+ 
+        (call_insn 5 6 12 2 (parallel [
+ 	     (set (reg:V2DI 4 $r4)
+ 		  (call (mem:SI (symbol_ref:DI ("bar"))
+ 				(const_int 0 [0])))
+ 		  (clobber (reg:SI 1 $r1)))]))
+        (insn 12 5 7 2 (set (reg:V2DI 32 $f0)
+ 			   (reg:V2DI 4 $r4)))
+ 
+        insn 12 will be split here as follows:
+        (insn 15 5 16 2 (set (reg:V2DI 32 $f0)
+ 			    (vec_merge:V2DI
+ 				(vec_duplicate:V2DI (reg:DI 4 $r4))
+ 				(reg:V2DI 32 $f0)
+ 				(const_int 1 [0x1]))))
+        (insn 16 15 7 2 (set (reg:V2DI 32 $f0)
+ 			    (vec_merge:V2DI
+ 				(vec_duplicate:V2DI (reg:DI 5 $r5 [+8 ]))
+ 				(reg:V2DI 32 $f0)
+ 				(const_int 2 [0x2]))))
+ 
+        This can be reproduced with the test case lsx-mov-2.c.
+      */
        gcc_assert (!MEM_P (src));
  
        rtx (*gen_vinsgr2vr_d) (rtx, rtx, rtx, rtx);
*************** loongarch_split_vector_move (rtx dest, r
*** 5138,5145 ****
  					  GEN_INT (1 << index)));
  	}
      }
!   else if (FP_REG_RTX_P (src))
      {
        gcc_assert (!MEM_P (dest));
  
        rtx (*gen_vpickve2gr_d) (rtx, rtx, rtx);
--- 5168,5179 ----
  					  GEN_INT (1 << index)));
  	}
      }
!   else if (FP_REG_RTX_P (src) && GP_REG_RTX_P (dest))
      {
+       /* Transfer vector data from vector registers to GPRs, generally
+ 	 for vector argument handling.
+ 	 This can be reproduced with the test case lsx-mov-1.c.
+        */
        gcc_assert (!MEM_P (dest));
  
        rtx (*gen_vpickve2gr_d) (rtx, rtx, rtx);
*************** loongarch_split_vector_move (rtx dest, r
*** 5166,5172 ****
  	  emit_insn (gen_vpickve2gr_d (d, new_src, GEN_INT (index)));
  	}
      }
!   else
      {
        /* This part of the code is designed to handle the following situations:
  	 (set (reg:V2DI 4 $r4)
--- 5200,5206 ----
  	  emit_insn (gen_vpickve2gr_d (d, new_src, GEN_INT (index)));
  	}
      }
!   else if (GP_REG_RTX_P (src) && GP_REG_RTX_P (dest))
      {
        /* This part of the code is designed to handle the following situations:
  	 (set (reg:V2DI 4 $r4)
*************** loongarch_print_operand (FILE *file, rtx
*** 6722,6728 ****
  
  
      case 'c':
!       if (CONST_INT_P (op))
  	fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (op));
        else
  	output_operand_lossage ("unsupported operand for code '%c'", letter);
--- 6756,6764 ----
  
  
      case 'c':
!       if (SYMBOL_REF_P (op))
! 	output_addr_const (asm_out_file, op);
!       else if (CONST_INT_P (op))
  	fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (op));
        else
  	output_operand_lossage ("unsupported operand for code '%c'", letter);
*************** loongarch_print_operand (FILE *file, rtx
*** 6935,6946 ****
--- 6971,6984 ----
  	case E_V4SFmode:
  	case E_V8SImode:
  	case E_V8SFmode:
+ 	case E_SImode:
  	  fprintf (file, "w");
  	  break;
  	case E_V2DImode:
  	case E_V2DFmode:
  	case E_V4DImode:
  	case E_V4DFmode:
+ 	case E_DImode:
  	  fprintf (file, "d");
  	  break;
  	default:
*************** loongarch_option_same_function_versions
*** 12110,12115 ****
--- 12148,12202 ----
    return feature_mask1 == feature_mask2;
  }
  
+ /* Output assembly to materialize the address of the stack canary value
+    into reg.  The third argument, tmp, should be and should only be
+    non-NULL if the extreme code model is effective for the canary.  If
+    the fourth arugment, load, is true, the canary value is loaded into
+    the register.
+ 
+    The assembly cannot be splitted due to security reason.  */
+ void
+ loongarch_output_asm_load_canary (rtx reg, rtx canary, rtx tmp)
+ {
+   gcc_checking_assert (ssp_operand (canary, VOIDmode));
+   gcc_checking_assert ((!tmp) == ssp_normal_operand (canary, VOIDmode));
+   gcc_checking_assert (register_operand (reg, Pmode));
+ 
+   rtx op[] = {reg, canary, tmp};
+   bool got = (loongarch_classify_symbol (canary) == SYMBOL_GOT_DISP);
+   bool need_ld = false;
+ 
+   if (la_opt_explicit_relocs != EXPLICIT_RELOCS_ALWAYS)
+     {
+       if (got)
+ 	output_asm_insn (tmp ? "la.global\t%0,%2,%1" : "la.global\t%0,%1",
+ 			 op);
+       else
+ 	output_asm_insn (tmp ? "la.local\t%0,%2,%1" : "la.local\t%0,%1",
+ 			 op);
+ 
+       need_ld = true;
+     }
+   else
+     {
+       output_asm_insn ("pcalau12i\t%0,%r1", op);
+       if (!tmp)
+ 	output_asm_insn ("ld.%v0\t%0,%0,%L1", op);
+       else
+ 	{
+ 	  output_asm_insn ("addi.d\t%2,$r0,%L1", op);
+ 	  output_asm_insn ("lu32i.d\t%2,%R1", op);
+ 	  output_asm_insn ("lu52i.d\t%2,%2,%H1", op);
+ 	  output_asm_insn ("ldx.d\t%0,%0,%2", op);
+ 	}
+ 
+       need_ld = got;
+     }
+ 
+   if (need_ld)
+     output_asm_insn ("ld.%v0\t%0,%0,0", op);
+ }
+ 
  /* Initialize the GCC target structure.  */
  #undef TARGET_ASM_ALIGNED_HI_OP
  #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
diff -Nrcpad gcc-17-20260503/gcc/config/loongarch/loongarch.h gcc-17-20260510/gcc/config/loongarch/loongarch.h
*** gcc-17-20260503/gcc/config/loongarch/loongarch.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/loongarch/loongarch.h	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 368,375 ****
    ((unsigned int) ((int) (REGNO) - LASX_REG_FIRST) < LASX_REG_NUM)
  
  #define FP_REG_RTX_P(X) (REG_P (X) && FP_REG_P (REGNO (X)))
! #define LSX_REG_RTX_P(X) (REG_P (X) && LSX_REG_P (REGNO (X)))
! #define LASX_REG_RTX_P(X) (REG_P (X) && LASX_REG_P (REGNO (X)))
  
  /* Select a register mode required for caller save of hard regno REGNO.  */
  #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
--- 368,374 ----
    ((unsigned int) ((int) (REGNO) - LASX_REG_FIRST) < LASX_REG_NUM)
  
  #define FP_REG_RTX_P(X) (REG_P (X) && FP_REG_P (REGNO (X)))
! #define GP_REG_RTX_P(X) (REG_P (X) && GP_REG_P (REGNO (X)))
  
  /* Select a register mode required for caller save of hard regno REGNO.  */
  #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
diff -Nrcpad gcc-17-20260503/gcc/config/loongarch/loongarch.md gcc-17-20260510/gcc/config/loongarch/loongarch.md
*** gcc-17-20260503/gcc/config/loongarch/loongarch.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/loongarch/loongarch.md	Sun May 10 22:32:06 2026
***************
*** 83,88 ****
--- 83,90 ----
    UNSPEC_LOAD_SYMBOL_OFFSET64
    UNSPEC_LA_PCREL_64_PART1
    UNSPEC_LA_PCREL_64_PART2
+ 
+   UNSPEC_SSP
  ])
  
  (define_c_enum "unspecv" [
***************
*** 1452,1457 ****
--- 1454,1468 ----
    [(set_attr "type" "clz")
     (set_attr "mode" "<MODE>")])
  
+ (define_insn "*ctzsi2_extend"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(any_extend:DI
+ 	  (ctz:SI (match_operand:SI 1 "register_operand" "r"))))]
+   "TARGET_64BIT"
+   "ctz.w\t%0,%1"
+   [(set_attr "type" "clz")
+    (set_attr "mode" "SI")])
+ 
  ;;
  ;;  ....................
  ;;
***************
*** 3677,3683 ****
  ;; QImode values so we can force zero-extension.
  (define_mode_iterator BR [(QI "TARGET_64BIT") SI (DI "TARGET_64BIT")])
  
! (define_expand "cbranch<mode>4"
    [(set (pc)
  	(if_then_else (match_operator 0 "comparison_operator"
  			[(match_operand:BR 1 "register_operand")
--- 3688,3694 ----
  ;; QImode values so we can force zero-extension.
  (define_mode_iterator BR [(QI "TARGET_64BIT") SI (DI "TARGET_64BIT")])
  
! (define_expand "@cbranch<mode>4"
    [(set (pc)
  	(if_then_else (match_operator 0 "comparison_operator"
  			[(match_operand:BR 1 "register_operand")
***************
*** 4986,4991 ****
--- 4997,5086 ----
      operands[0] = loongarch_rewrite_mem_for_simple_ldst (operands[0]);
    })
  
+ ;; Set and check against stack canary without leaving it in a register.
+ ;; DO NOT ATTEMPT TO SPLIT THESE INSNS!  It's important for security reason
+ ;; that the canary value does not live beyond the life of this sequence.
+ 
+ (define_insn "@stack_protect_combined_set_normal_<mode>"
+   [(set (match_operand:P 0 "memory_operand" "=m,ZC")
+         (unspec:P [(mem:P (match_operand:P 1 "ssp_normal_operand"))]
+ 		  UNSPEC_SSP))
+    (set (match_scratch:P 2 "=&r,&r") (const_int 0))]
+   ""
+ {
+   loongarch_output_asm_load_canary (operands[2], operands[1], NULL_RTX);
+   output_asm_insn (which_alternative ? "stptr.d\t%2,%0" : "st.d\t%2,%0",
+ 		   operands);
+   return "ori\t%2,$r0,0";
+ }
+   [(set_attr "type" "store")
+    (set_attr "length" "20")])
+ 
+ (define_insn "@stack_protect_combined_set_extreme_<mode>"
+   [(set (match_operand:P 0 "memory_operand" "=m,ZC")
+         (unspec:P [(mem:P (match_operand:P 1 "ssp_operand"))] UNSPEC_SSP))
+    (set (match_scratch:P 2 "=&r,&r") (const_int 0))
+    (set (match_scratch:P 3 "=&r,&r") (const_int 0))]
+   ""
+ {
+   loongarch_output_asm_load_canary (operands[2], operands[1], operands[3]);
+   output_asm_insn (which_alternative ? "stptr.d\t%2,%0" : "st.d\t%2,%0",
+ 		   operands);
+   return "ori\t%2,$r0,0\n\tori\t%3,$r0,0";
+ }
+   [(set_attr "type" "store")
+    (set_attr "length" "36")])
+ 
+ (define_insn "@stack_protect_combined_test_internal_<mode>"
+   [(set (match_operand:P 0 "register_operand" "=r,r,&r,&r")
+ 	(xor:P
+ 	  (match_operand:P 1 "memory_operand" "=m,ZC,m,ZC")
+ 	    (unspec:P
+ 	      [(mem:P (match_operand:P 2 "ssp_operand" "ZE,ZE,ZF,ZF"))]
+ 	      UNSPEC_SSP)))
+    (set (match_scratch:P 3 "=&r,&r,&r,&r") (const_int 0))]
+   ""
+ {
+   rtx t = (which_alternative >= 2 ? operands[0] : NULL_RTX);
+   loongarch_output_asm_load_canary (operands[3], operands[2], t);
+   output_asm_insn ((which_alternative & 1) ? "ldptr.d\t%0,%1"
+ 					   : "ld.d\t%0,%1",
+ 		   operands);
+   return "xor\t%0,%0,%3\n\tori\t%3,$r0,0";
+ }
+   [(set_attr "type" "load,load,load,load")
+    (set_attr "length" "24,24,36,36")])
+ 
+ (define_expand "stack_protect_combined_set"
+   [(match_operand 0 "memory_operand")
+    (match_operand 1 "memory_operand")]
+   ""
+ {
+   rtx canary = XEXP (operands[1], 0);
+   auto fn = (ssp_normal_operand (canary, VOIDmode)
+ 	     ? gen_stack_protect_combined_set_normal
+ 	     : gen_stack_protect_combined_set_extreme);
+ 
+   emit_insn (fn (Pmode, operands[0], canary));
+   DONE;
+ })
+ 
+ (define_expand "stack_protect_combined_test"
+   [(match_operand 0 "memory_operand")
+    (match_operand 1 "memory_operand")
+    (match_operand 2 "")]
+   ""
+ {
+   rtx t = gen_reg_rtx (Pmode);
+   rtx canary = XEXP (operands[1], 0);
+   emit_insn (gen_stack_protect_combined_test_internal (Pmode, t,
+ 						       operands[0],
+ 						       canary));
+   rtx cond = gen_rtx_EQ (VOIDmode, t, const0_rtx);
+   emit_jump_insn (gen_cbranch4 (Pmode, cond, t, const0_rtx, operands[2]));
+   DONE;
+ })
+ 
  ;; Synchronization instructions.
  
  (include "sync.md")
diff -Nrcpad gcc-17-20260503/gcc/config/loongarch/predicates.md gcc-17-20260510/gcc/config/loongarch/predicates.md
*** gcc-17-20260503/gcc/config/loongarch/predicates.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/loongarch/predicates.md	Sun May 10 22:32:06 2026
***************
*** 610,615 ****
--- 610,623 ----
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "symbolic_off64_operand")))
  
+ ;; Currently stack canary must be the global symbol __stack_chk_guard.
+ (define_predicate "ssp_operand" (match_code "symbol_ref"))
+ 
+ ;; If the stack canary is within the normal/medium code model.
+ (define_predicate "ssp_normal_operand"
+   (and (match_operand 0 "ssp_operand")
+        (not (match_operand 0 "symbolic_off64_operand"))))
+ 
  (define_predicate "equality_operator"
    (match_code "eq,ne"))
  
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/addsub.md gcc-17-20260510/gcc/config/m32c/addsub.md
*** gcc-17-20260503/gcc/config/m32c/addsub.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/addsub.md	Thu Jan  1 00:00:00 1970
***************
*** 1,259 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; add, sub
- 
- (define_insn "addqi3"
-   [(set (match_operand:QI 0 "mra_or_sp_operand"
- 		  "=SdRhl,SdRhl,??Rmm,??Rmm, *Raa,*Raa,SdRhl,??Rmm")
- 	(plus:QI (match_operand:QI 1 "mra_operand"
- 		  "%0,0,0,0, 0,0,0,0")
- 		 (match_operand:QI 2 "mrai_operand"
- 		  "iSdRhl,?Rmm,iSdRhl,?Rmm, iSdRhl,?Rmm,*Raa,*Raa")))]
-   ""
-   "add.b\t%2,%0"
-   [(set_attr "flags" "oszc")]
-   )
- 
- (define_insn "addhi3"
-   [(set (match_operand:HI 0 "m32c_nonimmediate_operand"
- 	 	  "=SdRhi,SdRhi,??Rmm,??Rmm, SdRhi,??Rmm, Rhi, Raw, Raw, !Rsp")
- 	(plus:HI (match_operand:HI 1 "m32c_any_operand"
- 		  "%0,0,0,0, 0,0, Raw, Rfb, Rfb, 0")
- 		 (match_operand:HI 2 "m32c_any_operand"
- 		  "IU2sSdRhi,?Rmm,IU2sSdRhi,?Rmm, IM2,IM2, IS2IU2, I00, IS1, i")))]
-   ""
-   "@
-    add.w\t%2,%0
-    add.w\t%2,%0
-    add.w\t%2,%0
-    add.w\t%2,%0
-    sub.w\t%m2,%0
-    sub.w\t%m2,%0
-    mova\t%d2[%1],%0
-    stc\t%1,%0
-    mova\t%D2[%1],%0
-    add.w\t%2,%0"
-   [(set_attr "flags" "oszc,oszc,oszc,oszc,oszc,oszc,n,n,n,oszc")]
-   )
- 
- (define_insn "addpsi3"
-   [(set (match_operand:PSI 0 "m32c_nonimmediate_operand" "=Rpi,Raa,SdRpi,SdRpi,Rsp*Rmm, Rpi,Rpi")
- 	(plus:PSI (match_operand:PSI 1 "m32c_nonimmediate_operand" "0,0,0,0,0, Raa,Rad")
- 		  (match_operand:PSI 2 "m32c_any_operand" "Is3,IS1,iSdRpi,?Rmm,i, i,IS2")))]
-   "TARGET_A24"
-   "@
-    add.l:q\t%2,%0
-    addx\t%2,%0
-    add.l\t%2,%0
-    add.l\t%2,%0
-    add.l\t%2,%0
-    mova\t%d2[%1],%0
-    mova\t%D2[%1],%0"
-   [(set_attr "flags" "oszc,oszc,oszc,oszc,oszc,n,n")]
-   )
- 
- (define_expand "addsi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
-         (plus:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0")
-                  (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
-   "TARGET_A24 ||TARGET_A16"
-   ""
-   )
- 
- (define_insn "addsi3_1"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,??Rmm,RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
-         (plus:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0,0,0,0,0")
-                  (match_operand:SI 2 "mrai_operand" "IU2,IU2,i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
-   "TARGET_A16"
-   "*
-   
-   switch (which_alternative)
-     { 
-     case 0:
-       return \"add.w %X2,%h0\;adcf.w %H0\";
-     case 1:
-       return \"add.w %X2,%h0\;adcf.w %H0\";
-     case 2:
-       if (GET_CODE (operands[2]) == SYMBOL_REF)
-         {
-           output_asm_insn (\"add.w #%%lo(%d2),%h0\",operands);
-           return \"adc.w #%%hi(%d2),%H0\";
-         }
-       else
-         {
-           output_asm_insn (\"add.w %X2,%h0\",operands);
-           operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-           return \"adc.w %X2,%H0\";
-         }
-     case 3:
-       return \"add.w %h2,%h0\;adc.w %H2,%H0\";
-     case 4:
-       output_asm_insn (\"add.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"adc.w %X2,%H0\";
-     case 5:
-       return \"add.w %h2,%h0\;adc.w %H2,%H0\";
-     case 6:
-       return \"add.w %h2,%h0\;adc.w %H2,%H0\";
-     case 7:
-       return \"add.w %h2,%h0\;adc.w %H2,%H0\";
-     default:
-       gcc_unreachable ();
-     }"
-   [(set_attr "flags" "x,x,x,x,x,x,x,x")]
- )
- 
- (define_insn "addsi3_2"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
-         (plus:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0")
-                  (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
-   "TARGET_A24"
-   "add.l\t%2,%0"
-   [(set_attr "flags" "oszc")]
- )
- 
- (define_insn "subqi3"
-   [(set (match_operand:QI 0 "mra_or_sp_operand"
- 		   "=SdRhl,SdRhl,??Rmm,??Rmm, Raa,Raa,SdRhl,??Rmm, *Rsp")
- 	(minus:QI (match_operand:QI 1 "mra_operand"
- 		   "0,0,0,0, 0,0,0,0, 0")
- 		  (match_operand:QI 2 "mrai_operand"
- 		   "iSdRhl,?Rmm,iSdRhl,?Rmm, iSdRhl,?Rmm,Raa,Raa, i")))]
-   ""
-   "sub.b\t%2,%0"
-   [(set_attr "flags" "oszc")]
-   )
- 
- (define_insn "subhi3"
-   [(set (match_operand:HI 0 "mra_operand"
- 		   "=SdRhi,SdRhi,??Rmm,??Rmm, SdRhi,??Rmm")
- 	(minus:HI (match_operand:HI 1 "mras_operand"
- 		   "0,0,0,0, 0,0")
- 		  (match_operand:HI 2 "mrai_operand"
- 		   "IU2SdRhi,?Rmm,IU2SdRhi,?Rmm, IM2,IM2")))]
-   ""
-   "@
-    sub.w\t%2,%0
-    sub.w\t%2,%0
-    sub.w\t%2,%0
-    sub.w\t%2,%0
-    add.w\t%m2,%0
-    add.w\t%m2,%0"
-   [(set_attr "flags" "oszc,oszc,oszc,oszc,oszc,oszc")]
-   )
- 
- (define_insn "subpsi3"
-   [(set (match_operand:PSI 0 "mra_operand" "=RpiSd,RpiSd,??Rmm,??Rmm")
- 	(minus:PSI (match_operand:PSI 1 "mra_operand" "0,0,0,0")
- 		   (match_operand:PSI 2 "mrai_operand" "iRpiSd,?Rmm,iRpiSd,?Rmm")))]
-   "TARGET_A24"
-   "sub.%&\t%2,%0"
-   [(set_attr "flags" "oszc")]
-   )
- 
- (define_expand "subsi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
-         (minus:SI (match_operand:SI 1 "mra_operand" "0,0,0,0")
-                   (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
-   "TARGET_A24 ||TARGET_A16"
-   ""
- )
- 
- (define_insn "subsi3_1"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
-         (minus:SI (match_operand:SI 1 "mra_operand" "0,0,0,0,0,0")
-                   (match_operand:SI 2 "mrai_operand" "i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
-   "TARGET_A16"
-   "*
-   switch (which_alternative)
-     {
-     case 0:
-       output_asm_insn (\"sub.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"sbb.w %X2,%H0\";
-     case 1:
-       return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
-     case 2:
-       output_asm_insn (\"sub.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"sbb.w %X2,%H0\";
-     case 3:
-       return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
-     case 4:
-       return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
-     case 5:
-       return \"sub.w %h2,%h0\;sbb.w %H2,%H0\";
-     default:
-       gcc_unreachable ();
-     }"
-   [(set_attr "flags" "x,x,x,x,x,x")]
- )
- 
- (define_insn "subsi3_2"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
-         (minus:SI (match_operand:SI 1 "mra_operand" "0,0,0,0")
-                   (match_operand:SI 2 "mrai_operand" "iRsiSd,?Rmm,iRsiSd,?Rmm")))]
-   "TARGET_A24"
-   "sub.l\t%2,%0"
-   [(set_attr "flags" "oszc,oszc,oszc,oszc")]
- )
- 
- (define_insn "negqi2"
-   [(set (match_operand:QI 0 "mra_operand" "=SdRhl,??Rmm")
- 	(neg:QI (match_operand:QI 1 "mra_operand" "0,0")))]
-   ""
-   "neg.b\t%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "neghi2"
-   [(set (match_operand:HI 0 "mra_operand" "=SdRhi,??Rmm")
- 	(neg:HI (match_operand:HI 1 "mra_operand" "0,0")))]
-   ""
-   "neg.w\t%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- ; We can negate an SImode by operating on the subparts.  GCC deals
- ; with this itself for larger modes, but not SI.
- (define_insn "negsi2"
-   [(set (match_operand:SI 0 "mra_operand" "=SdR03,??Rmm")
- 	(neg:SI (match_operand:SI 1 "mra_operand" "0,0")))]
-   ""
-   "not.w %h0 | not.w %H0 | add.w #1,%h0 | adcf.w %H0"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "absqi2"
-   [(set (match_operand:QI 0 "mra_operand" "=RhlSd,??Rmm")
- 	(abs:QI (match_operand:QI 1 "mra_operand" "0,0")))]
-   ""
-   "abs.b\t%0"
-   [(set_attr "flags" "oszc")]
-   )
- 
- (define_insn "abshi2"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,??Rmm")
- 	(abs:HI (match_operand:HI 1 "mra_operand" "0,0")))]
-   ""
-   "abs.w\t%0"
-   [(set_attr "flags" "oszc")]
-   )
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/bitops.md gcc-17-20260510/gcc/config/m32c/bitops.md
*** gcc-17-20260503/gcc/config/m32c/bitops.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/bitops.md	Thu Jan  1 00:00:00 1970
***************
*** 1,421 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; Bit-wise operations (and, ior, xor, shift)
- 
- ; On the R8C and M16C, "address" for bit instructions is usually (but
- ; not always!) the *bit* address, not the *byte* address.  This
- ; confuses gcc, so we avoid cases where gcc would produce the wrong
- ; code.  We're left with absolute addresses and registers, and the odd
- ; case of shifting a bit by a variable.
- 
- ; On the M32C, "address" for bit instructions is a regular address,
- ; and the bit number is stored in a separate field.  Thus, we can let
- ; gcc do more interesting things.  However, the M32C cannot set all
- ; the bits in a 16-bit register, which the R8C/M16C can do.
- 
- ; However, it all means that we end up with two sets of patterns, one
- ; for each chip.
- 
- ;;----------------------------------------------------------------------
- 
- ;; First off, all the ways we can set one bit, other than plain IOR.
- 
- (define_insn "bset_qi"
-   [(set (match_operand:QI 0 "memsym_operand" "+Si")
- 	(ior:QI (subreg:QI (ashift:HI (const_int 1)
- 				      (subreg:QI (match_operand:HI 1 "a_qi_operand" "Raa") 0)) 0)
- 		(match_dup 0)))]
-   "TARGET_A16"
-   "bset\t%0[%1]"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "bset_hi"
-   [(set (zero_extract:HI (match_operand:QI 0 "memsym_operand" "+Si")
- 			 (const_int 1)
- 			 (zero_extend:HI (subreg:QI (match_operand:HI 1 "a_qi_operand" "Raa") 0)))
- 	(const_int 1))]
-   "TARGET_A16"
-   "bset\t%0[%1]"
-   [(set_attr "flags" "n")]
-   )  
- 
- ;;----------------------------------------------------------------------
- 
- ;; Now all the ways we can clear one bit, other than plain AND.
- 
- ; This is odd because the shift patterns use QI counts, but we can't
- ; easily put QI in $aN without causing problems elsewhere.
- (define_insn "bclr_qi"
-   [(set (zero_extract:HI (match_operand:QI 0 "memsym_operand" "+Si")
- 			 (const_int 1)
- 			 (zero_extend:HI (subreg:QI (match_operand:HI 1 "a_qi_operand" "Raa") 0)))
- 	(const_int 0))]
-   "TARGET_A16"
-   "bclr\t%0[%1]"
-   [(set_attr "flags" "n")]
-   )  
- 
- 
- ;;----------------------------------------------------------------------
- 
- ;; Now the generic patterns.
- 
- (define_insn "andqi3_16"
-   [(set (match_operand:QI 0 "mra_operand" "=Sp,Rqi,RhlSd,RhlSd,??Rmm,??Rmm")
- 	(and:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0")
- 		(match_operand:QI 2 "mrai_operand" "Imb,Imb,iRhlSd,?Rmm,iRhlSd,?Rmm")))]
-   "TARGET_A16"
-   "@
-    bclr\t%B2,%0
-    bclr\t%B2,%h0
-    and.b\t%x2,%0
-    and.b\t%x2,%0
-    and.b\t%x2,%0
-    and.b\t%x2,%0"
-   [(set_attr "flags" "n,n,sz,sz,sz,sz")]
-   )
- 
- (define_insn "andhi3_16"
-   [(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,??Rmm,RhiSd,??Rmm")
- 	(and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0")
- 		(match_operand:HI 2 "mrai_operand" "ImB,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
-   "TARGET_A16"
-   "@
-    
-    bclr\t%B2,%0
-    bclr\t%B2-8,1+%0
-    bclr\t%B2,%0
-    and.w\t%X2,%0
-    and.w\t%X2,%0
-    and.w\t%X2,%0
-    and.w\t%X2,%0"
-   [(set_attr "flags" "n,n,n,sz,sz,sz,sz")]
-   )
- 
- (define_insn "andsi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
-         (and:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0,0,0")
-                 (match_operand:SI 2 "mrai_operand" "i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
-   ""
-   "*
-   switch (which_alternative)
-     {
-     case 0:
-       output_asm_insn (\"and.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"and.w %X2,%H0\";
-     case 1:
-       return \"and.w %h2,%h0\;and.w %H2,%H0\";
-     case 2:
-       output_asm_insn (\"and.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"and.w %X2,%H0\";
-     case 3:
-       return \"and.w %h2,%h0\;and.w %H2,%H0\";
-     case 4:
-       return \"and.w %h2,%h0\;and.w %H2,%H0\";
-     case 5:
-       return \"and.w %h2,%h0\;and.w %H2,%H0\";
-     default:
-       gcc_unreachable ();
-     }"
-   [(set_attr "flags" "x,x,x,x,x,x")]
- )
- 
- 
- (define_insn "iorqi3_16"
-   [(set (match_operand:QI 0 "mra_operand" "=Sp,Rqi,RqiSd,??Rmm,RqiSd,??Rmm")
- 	(ior:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0")
- 		(match_operand:QI 2 "mrai_operand" "Ilb,Ilb,iRhlSd,iRhlSd,?Rmm,?Rmm")))]
-   "TARGET_A16"
-   "@
-    bset\t%B2,%0
-    bset\t%B2,%h0
-    or.b\t%x2,%0
-    or.b\t%x2,%0
-    or.b\t%x2,%0
-    or.b\t%x2,%0"
-   [(set_attr "flags" "n,n,sz,sz,sz,sz")]
-   )
- 
- (define_insn "iorhi3_16"
-   [(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,RhiSd,??Rmm,??Rmm")
- 	(ior:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0")
- 		(match_operand:HI 2 "mrai_operand" "Ilb,Ilw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))]
-   "TARGET_A16"
-   "@
-    bset %B2,%0
-    bset\t%B2-8,1+%0
-    bset\t%B2,%0
-    or.w\t%X2,%0
-    or.w\t%X2,%0
-    or.w\t%X2,%0
-    or.w\t%X2,%0"
-   [(set_attr "flags" "n,n,n,sz,sz,sz,sz")]
-   )
- 
- ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- 
- (define_insn "andqi3_24"
-   [(set (match_operand:QI 0 "mra_operand" "=Sd,Rqi,RhlSd,RhlSd,??Rmm,??Rmm")
- 	(and:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0")
- 		(match_operand:QI 2 "mrai_operand" "Imb,Imb,iRhlSd,?Rmm,iRhlSd,?Rmm")))]
-   "TARGET_A24"
-   "@
-    bclr\t%B2,%0
-    bclr\t%B2,%0
-    and.b\t%x2,%0
-    and.b\t%x2,%0
-    and.b\t%x2,%0
-    and.b\t%x2,%0"
-   [(set_attr "flags" "n,n,sz,sz,sz,sz")]
-   )
- 
- (define_insn "andhi3_24"
-   [(set (match_operand:HI 0 "mra_operand" "=Sd,Sd,?Rhl,?Rhl,RhiSd,??Rmm,RhiSd,??Rmm")
- 	(and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0,0")
- 		(match_operand:HI 2 "mrai_operand" "ImB,Imw,ImB,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
-   "TARGET_A24"
-   "@
-    bclr\t%B2,%0
-    bclr\t%B2-8,1+%0
-    bclr\t%B2,%h0
-    bclr\t%B2-8,%H0
-    and.w\t%X2,%0
-    and.w\t%X2,%0
-    and.w\t%X2,%0
-    and.w\t%X2,%0"
-   [(set_attr "flags" "n,n,n,n,sz,sz,sz,sz")]
-   )
- 
- 
- 
- (define_insn "iorqi3_24"
-   [(set (match_operand:QI 0 "mra_operand" "=RqiSd,RqiSd,??Rmm,RqiSd,??Rmm")
- 	(ior:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0")
- 		(match_operand:QI 2 "mrai_operand" "Ilb,iRhlSd,iRhlSd,?Rmm,?Rmm")))]
-   "TARGET_A24"
-   "@
-    bset\t%B2,%0
-    or.b\t%x2,%0
-    or.b\t%x2,%0
-    or.b\t%x2,%0
-    or.b\t%x2,%0"
-   [(set_attr "flags" "n,sz,sz,sz,sz")]
-   )
- 
- (define_insn "iorhi3_24"
-   [(set (match_operand:HI 0 "mra_operand" "=Sd,Sd,?Rhl,?Rhl,RhiSd,RhiSd,??Rmm,??Rmm")
- 	(ior:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0,0")
- 		(match_operand:HI 2 "mrai_operand" "Ilb,Ilw,Ilb,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))]
-   "TARGET_A24"
-   "@
-    bset\t%B2,%0
-    bset\t%B2-8,1+%0
-    bset\t%B2,%h0
-    bset\t%B2-8,%H0
-    or.w\t%X2,%0
-    or.w\t%X2,%0
-    or.w\t%X2,%0
-    or.w\t%X2,%0"
-   [(set_attr "flags" "n,n,n,n,sz,sz,sz,sz")]
-   )
- 
- 
- ; ----------------------------------------------------------------------
- 
- (define_expand "andqi3"
-   [(set (match_operand:QI 0 "mra_operand" "")
- 	(and:QI (match_operand:QI 1 "mra_operand" "")
- 		(match_operand:QI 2 "mrai_operand" "")))]
-   ""
-   "if (TARGET_A16)
-      emit_insn (gen_andqi3_16 (operands[0], operands[1], operands[2]));
-    else
-      emit_insn (gen_andqi3_24 (operands[0], operands[1], operands[2]));
-    DONE;"
-   )
- 
- (define_expand "andhi3"
-   [(set (match_operand:HI 0 "mra_operand" "")
- 	(and:HI (match_operand:HI 1 "mra_operand" "")
- 		(match_operand:HI 2 "mrai_operand" "")))]
-   ""
-   "if (TARGET_A16)
-      emit_insn (gen_andhi3_16 (operands[0], operands[1], operands[2]));
-    else
-      emit_insn (gen_andhi3_24 (operands[0], operands[1], operands[2]));
-    DONE;"
-   )
- 
- (define_expand "iorqi3"
-   [(set (match_operand:QI 0 "mra_operand" "")
- 	(ior:QI (match_operand:QI 1 "mra_operand" "")
- 		(match_operand:QI 2 "mrai_operand" "")))]
-   ""
-   "if (TARGET_A16)
-      emit_insn (gen_iorqi3_16 (operands[0], operands[1], operands[2]));
-    else
-      emit_insn (gen_iorqi3_24 (operands[0], operands[1], operands[2]));
-    DONE;"
-   )
- 
- (define_expand "iorhi3"
-   [(set (match_operand:HI 0 "mra_operand" "")
- 	(ior:HI (match_operand:HI 1 "mra_operand" "")
- 		(match_operand:HI 2 "mrai_operand" "")))]
-   ""
-   "if (TARGET_A16)
-      emit_insn (gen_iorhi3_16 (operands[0], operands[1], operands[2]));
-    else
-      emit_insn (gen_iorhi3_24 (operands[0], operands[1], operands[2]));
-    DONE;"
-   )
- 
- (define_insn "iorsi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
-         (ior:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0,0,0")
-                 (match_operand:SI 2 "mrai_operand" "i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
-   ""
-   "*
-   switch (which_alternative)
-     {
-     case 0:
-       output_asm_insn (\"or.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"or.w %X2,%H0\";
-     case 1:
-       return \"or.w %h2,%h0\;or.w %H2,%H0\";
-     case 2:
-       output_asm_insn (\"or.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"or.w %X2,%H0\";
-     case 3:
-       return \"or.w %h2,%h0\;or.w %H2,%H0\";
-     case 4:
-       return \"or.w %h2,%h0\;or.w %H2,%H0\";
-     case 5:
-       return \"or.w %h2,%h0\;or.w %H2,%H0\";
-     default:
-       gcc_unreachable ();
-     }"
-   [(set_attr "flags" "x,x,x,x,x,x")]
- )
- 
- (define_insn "xorqi3"
-   [(set (match_operand:QI 0 "mra_operand" "=RhlSd,RhlSd,??Rmm,??Rmm")
- 	(xor:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0")
- 		(match_operand:QI 2 "mrai_operand" "iRhlSd,?Rmm,iRhlSd,?Rmm")))]
-   ""
-   "xor.b\t%x2,%0"
-   [(set_attr "flags" "sz,sz,sz,sz")]
-   )
- 
- (define_insn "xorhi3"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm")
- 	(xor:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0")
- 		(match_operand:HI 2 "mrai_operand" "iRhiSd,?Rmm,iRhiSd,?Rmm")))]
-   ""
-   "xor.w\t%X2,%0"
-   [(set_attr "flags" "sz,sz,sz,sz")]
-   )
- 
- (define_insn "xorsi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm,??Rmm,RsiSd")
-         (xor:SI (match_operand:SI 1 "mra_operand" "%0,0,0,0,0,0")
-                 (match_operand:SI 2 "mrai_operand" "i,?Rmm,i,RsiSd,?Rmm,RsiSd")))]
-   ""
-   "*
-   switch (which_alternative)
-     {
-     case 0:
-       output_asm_insn (\"xor.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"xor.w %X2,%H0\";
-     case 1:
-       return \"xor.w %h2,%h0\;xor.w %H2,%H0\";
-     case 2:
-       output_asm_insn (\"xor.w %X2,%h0\",operands);
-       operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
-       return \"xor.w %X2,%H0\";
-     case 3:
-       return \"xor.w %h2,%h0\;xor.w %H2,%H0\";
-     case 4:
-       return \"xor.w %h2,%h0\;xor.w %H2,%H0\";
-     case 5:
-       return \"xor.w %h2,%h0\;xor.w %H2,%H0\";
-     default:
-       gcc_unreachable ();
-     }"
-   [(set_attr "flags" "x,x,x,x,x,x")]
- )
- 
- (define_insn "one_cmplqi2"
-   [(set (match_operand:QI 0 "mra_operand" "=RhlSd,??Rmm")
- 	(not:QI (match_operand:QI 1 "mra_operand" "0,0")))]
-   ""
-   "not.b\t%0"
-   [(set_attr "flags" "sz,sz")]
-   )
- 
- (define_insn "one_cmplhi2"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,??Rmm")
- 	(not:HI (match_operand:HI 1 "mra_operand" "0,0")))]
-   ""
-   "not.w\t%0"
-   [(set_attr "flags" "sz,sz")]
-   )
- 
- ; Optimizations using bit opcodes
- 
- ; We need this because combine only looks at three insns at a time,
- ; and the bclr_qi pattern uses four - mov, shift, not, and.  GCC
- ; should never expand this pattern, because it only shifts a constant
- ; by a constant, so gcc should do that itself.
- (define_insn "shift1_qi"
-   [(set (match_operand:QI 0 "mra_operand" "=Rqi")
- 	(ashift:QI (const_int 1)
- 		   (match_operand 1 "const_int_operand" "In4")))]
-   ""
-   "mov.b\t#1,%0\n\tshl.b\t%1,%0"
-   )
- (define_insn "shift1_hi"
-   [(set (match_operand:HI 0 "mra_operand" "=Rhi")
- 	(ashift:HI (const_int 1)
- 		   (match_operand 1 "const_int_operand" "In4")))]
-   ""
-   "mov.w\t#1,%0\n\tshl.w\t%1,%0"
-   )
- 
- ; Generic insert-bit expander, needed so that we can use the bit
- ; opcodes for volatile bitfields.
- 
- (define_expand "insv"
-   [(set (zero_extract:HI (match_operand:HI 0 "mra_operand" "")
- 			 (match_operand 1 "const_int_operand" "")
- 			 (match_operand 2 "const_int_operand" ""))
- 	(match_operand:HI 3 "const_int_operand" ""))]
-   ""
-   "if (m32c_expand_insv (operands))
-      FAIL;
-    DONE;"
-   )
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/blkmov.md gcc-17-20260510/gcc/config/m32c/blkmov.md
*** gcc-17-20260503/gcc/config/m32c/blkmov.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/blkmov.md	Thu Jan  1 00:00:00 1970
***************
*** 1,241 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2006-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; various block move instructions
- 
- ;; R8C:
- ;;  SMOVB - while (r3--) { *a1-- = *r1ha0--; } - memcpy
- ;;  SMOVF - while (r3--) { *a1++ = *r1ha0++; } - memcpy
- ;;  SSTR  - while (r3--) { *a1++ = [r0l,r0]; } - memset
- 
- ;; M32CM:
- ;;  SCMPU - while (*a0 && *a0 != *a1) { a0++; a1++; } - strcmp
- ;;  SIN   - while (r3--) { *a1++ = *a0; }
- ;;  SMOVB - while (r3--) { *a1-- = *a0--; } - memcpy
- ;;  SMOVF - while (r3--) { *a1++ = *a0++; } - memcpy
- ;;  SMOVU - while (*a1++ = *a0++) ; - strcpy
- ;;  SOUT  - while (r3--) { *a1 = *a0++; }
- ;;  SSTR  - while (r3--) { *a1++ = [r0l,r0]; } - memset
- 
- 
- 
- ;; 0 = destination (mem:BLK ...)
- ;; 1 = source (mem:BLK ...)
- ;; 2 = count
- ;; 3 = alignment
- (define_expand "cpymemhi"
-   [(match_operand 0 "ap_operand" "")
-    (match_operand 1 "ap_operand" "")
-    (match_operand 2 "m32c_r3_operand" "")
-    (match_operand 3 "" "")
-    ]
-   ""
-   "if (m32c_expand_cpymemhi(operands)) DONE; FAIL;"
-   )
- 
- ;; We can't use mode iterators for these because M16C uses r1h to extend
- ;; the source address, for copying data from ROM to RAM.  We don't yet
- ;; support that, but we need to zero our r1h, so the patterns differ.
- 
- ;; 0 = dest (out)
- ;; 1 = src (out)
- ;; 2 = count (out)
- ;; 3 = dest (in)
- ;; 4 = src (in)
- ;; 5 = count (in)
- (define_insn "cpymemhi_bhi_op"
-   [(set (mem:QI (match_operand:HI 3 "ap_operand" "0"))
- 	(mem:QI (match_operand:HI 4 "ap_operand" "1")))
-    (set (match_operand:HI 2 "m32c_r3_operand" "=R3w")
- 	(const_int 0))
-    (set (match_operand:HI 0 "ap_operand" "=Ra1")
- 	(plus:HI (match_dup 3)
- 		  (zero_extend:HI (match_operand:HI 5 "m32c_r3_operand" "2"))))
-    (set (match_operand:HI 1 "ap_operand" "=Ra0")
- 	(plus:HI (match_dup 4)
- 		  (zero_extend:HI (match_dup 5))))
-    (use (reg:HI R1_REGNO))]
-   "TARGET_A16"
-   "mov.b:q\t#0,r1h\n\tsmovf.b\t; %0[0..%2-1]=r1h%1[]"
-   )
- (define_insn "cpymemhi_bpsi_op"
-   [(set (mem:QI (match_operand:PSI 3 "ap_operand" "0"))
- 	(mem:QI (match_operand:PSI 4 "ap_operand" "1")))
-    (set (match_operand:HI 2 "m32c_r3_operand" "=R3w")
- 	(const_int 0))
-    (set (match_operand:PSI 0 "ap_operand" "=Ra1")
- 	(plus:PSI (match_dup 3)
- 		  (zero_extend:PSI (match_operand:HI 5 "m32c_r3_operand" "2"))))
-    (set (match_operand:PSI 1 "ap_operand" "=Ra0")
- 	(plus:PSI (match_dup 4)
- 		  (zero_extend:PSI (match_dup 5))))]
-   "TARGET_A24"
-   "smovf.b\t; %0[0..%2-1]=%1[]"
-   )
- (define_insn "cpymemhi_whi_op"
-   [(set (mem:HI (match_operand:HI 3 "ap_operand" "0"))
- 	(mem:HI (match_operand:HI 4 "ap_operand" "1")))
-    (set (match_operand:HI 2 "m32c_r3_operand" "=R3w")
- 	(const_int 0))
-    (set (match_operand:HI 0 "ap_operand" "=Ra1")
- 	(plus:HI (match_dup 3)
- 		  (zero_extend:HI (match_operand:HI 5 "m32c_r3_operand" "2"))))
-    (set (match_operand:HI 1 "ap_operand" "=Ra0")
- 	(plus:HI (match_dup 4)
- 		  (zero_extend:HI (match_dup 5))))
-    (use (reg:HI R1_REGNO))]
-   "TARGET_A16"
-   "mov.b:q\t#0,r1h\n\tsmovf.w\t; %0[0..%2-1]=r1h%1[]"
-   )
- (define_insn "cpymemhi_wpsi_op"
-   [(set (mem:HI (match_operand:PSI 3 "ap_operand" "0"))
- 	(mem:HI (match_operand:PSI 4 "ap_operand" "1")))
-    (set (match_operand:HI 2 "m32c_r3_operand" "=R3w")
- 	(const_int 0))
-    (set (match_operand:PSI 0 "ap_operand" "=Ra1")
- 	(plus:PSI (match_dup 3)
- 		  (zero_extend:PSI (match_operand:HI 5 "m32c_r3_operand" "2"))))
-    (set (match_operand:PSI 1 "ap_operand" "=Ra0")
- 	(plus:PSI (match_dup 4)
- 		  (zero_extend:PSI (match_dup 5))))]
-   "TARGET_A24"
-   "smovf.w\t; %0[0..%2-1]=%1[]"
-   )
- 
- 
- 
- ;; 0 = destination (mem:BLK ...)
- ;; 1 = number of bytes
- ;; 2 = value to store
- ;; 3 = alignment
- (define_expand "setmemhi"
-   [(match_operand 0 "ap_operand" "")
-    (match_operand 1 "m32c_r3_operand" "")
-    (match_operand 2 "m32c_r0_operand" "")
-    (match_operand 3 "" "")
-    ]
-   "TARGET_A24"
-   "if (m32c_expand_setmemhi(operands)) DONE; FAIL;"
-   )
- 
- ;; 0 = address (out)
- ;; 1 = count (out)
- ;; 2 = value (in)
- ;; 3 = address (in)
- ;; 4 = count (in)
- (define_insn "setmemhi_b<mode>_op"
-   [(set (mem:QI (match_operand:HPSI 3 "ap_operand" "0"))
- 	(match_operand:QI 2 "m32c_r0_operand" "R0w"))
-    (set (match_operand:HI 1 "m32c_r3_operand" "=R3w")
- 	(const_int 0))
-    (set (match_operand:HPSI 0 "ap_operand" "=Ra1")
- 	(plus:HPSI (match_dup 3)
- 		  (zero_extend:HPSI (match_operand:HI 4 "m32c_r3_operand" "1"))))]
-   "TARGET_A24"
-   "sstr.b\t; %0[0..%1-1]=%2"
-   )
- 
- (define_insn "setmemhi_w<mode>_op"
-   [(set (mem:HI (match_operand:HPSI 3 "ap_operand" "0"))
- 	(match_operand:HI 2 "m32c_r0_operand" "R0w"))
-    (set (match_operand:HI 1 "m32c_r3_operand" "=R3w")
- 	(const_int 0))
-    (set (match_operand:HPSI 0 "ap_operand" "=Ra1")
- 	(plus:HPSI (match_dup 3)
- 		  (zero_extend:HPSI (match_operand:HI 4 "m32c_r3_operand" "1"))))]
-   "TARGET_A24"
-   "sstr.w\t; %0[0..%1-1]=%2"
-   )
- 
- 
- ;; SCMPU sets the flags according to the result of the string
- ;; comparison.  GCC wants the result to be a signed value reflecting
- ;; the result, which it then compares to zero.  Hopefully we can
- ;; optimize that later (see peephole in cond.md).  Meanwhile, the
- ;; strcmp builtin is expanded to a SCMPU followed by a flags-to-int
- ;; pattern in cond.md.
- 
- ;; 0 = result:HI
- ;; 1 = destination (mem:BLK ...)
- ;; 2 = source (mem:BLK ...)
- ;; 3 = alignment
- 
- (define_expand "cmpstrsi"
-   [(match_operand:HI 0 "register_operand" "")
-    (match_operand 1 "memory_operand" "")
-    (match_operand 2 "memory_operand" "")
-    (match_operand 3 "const_int_operand" "")
-    ]
-   "TARGET_A24"
-   "if (m32c_expand_cmpstr(operands)) DONE; FAIL;"
-   )
- 
- ;; 0 = string1
- ;; 1 = string2
- 
- (define_insn "cmpstrhi_op"
-   [(set (reg:CC FLG_REGNO)
- 	(compare:CC (mem:BLK (match_operand:PSI 0 "ap_operand" "Ra0"))
- 		    (mem:BLK (match_operand:PSI 1 "ap_operand" "Ra1"))))
-    (clobber (match_operand:PSI 2 "ap_operand" "=0"))
-    (clobber (match_operand:PSI 3 "ap_operand" "=1"))]
-   "TARGET_A24"
-   "scmpu.b\t; flags := strcmp(*%0,*%1)"
-   [(set_attr "flags" "oszc")]
-   )
- 
- 
- 
- ;; Note that SMOVU leaves the address registers pointing *after*
- ;; the NUL at the end of the string.  This is not what gcc expects; it
- ;; expects the address registers to point *at* the NUL.  The expander
- ;; must emit a suitable add insn.
- 
- ;; 0 = target: set to &NUL in dest
- ;; 1 = destination (mem:BLK ...)
- ;; 2 = source (mem:BLK ...)
- 
- (define_expand "movstr"
-   [(match_operand 0 "m32c_nonimmediate_operand" "")
-    (match_operand 1 "" "")
-    (match_operand 2 "" "")
-    ]
-   "TARGET_A24"
-   "if (m32c_expand_movstr(operands)) DONE; FAIL;"
-   )
- 
- ;; 0 = dest (out)
- ;; 1 = src (out) (clobbered)
- ;; 2 = dest (in)
- ;; 3 = src (in)
- (define_insn "movstr_op"
-   [(set (mem:BLK (match_operand:PSI 2 "ap_operand" "0"))
- 	(mem:BLK (match_operand:PSI 3 "ap_operand" "1")))
-    (set (match_operand:PSI 0 "ap_operand" "=Ra1")
- 	(plus:PSI (match_dup 2)
- 		  (unspec:PSI [(const_int 0)] UNS_SMOVU)))
-    (set (match_operand:PSI 1 "ap_operand" "=Ra0")
- 	(plus:PSI (match_dup 3)
- 		  (unspec:PSI [(const_int 0)] UNS_SMOVU)))]
-   "TARGET_A24"
-   "smovu.b\t; while (*%2++ := *%3++) != 0"
-   [(set_attr "flags" "*")]
-   )
-   
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/cond.md gcc-17-20260510/gcc/config/m32c/cond.md
*** gcc-17-20260503/gcc/config/m32c/cond.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/cond.md	Thu Jan  1 00:00:00 1970
***************
*** 1,309 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ; conditionals - cmp, jcc, setcc, etc.
- 
- ; Special note about conditional instructions: GCC always emits the
- ; compare right before the insn, which is good, because m32c's mov
- ; insns modify the flags.  However, this means that any conditional
- ; insn that may require reloading must be kept with its compare until
- ; after reload finishes, else the reload insns might clobber the
- ; flags.  Thus, these rules:
- ;
- ; * the cmp* expanders just save the operands in compare_op0 and
- ;   compare_op1 via m32c_pend_compare.
- ; * conditional insns that won't need reload can call
- ;   m32c_unpend_compare before their expansion.
- ; * other insns must expand to include the compare operands within,
- ;   then split after reload to a separate compare and conditional.
- 
- ; Until support for relaxing is supported in gas, we must assume that
- ; short labels won't reach, so we must use long labels.
- ; Unfortunately, there aren't any conditional jumps with long labels,
- ; so instead we invert the conditional and jump around a regular jump.
- 
- ; Note that we can, at some point in the future, add code to omit the
- ; "cmp" portion of the insn if the preceding insn happened to set the
- ; right flags already.  For example, a mov followed by a "cmp *,0" is
- ; redundant; the move already set the Z flag.
- 
- (define_insn_and_split "cbranch<mode>4"
-   [(set (pc) (if_then_else
- 	      (match_operator 0 "m32c_cmp_operator"
- 			      [(match_operand:QHPSI 1 "mra_operand" "RraSd")
- 			       (match_operand:QHPSI 2 "mrai_operand" "iRraSd")])
-               (label_ref (match_operand 3 "" ""))
- 	      (pc)))]
-   ""
-   "#"
-   "reload_completed"
-   [(set (reg:CC FLG_REGNO)
- 	(compare (match_dup 1)
- 		 (match_dup 2)))
-    (set (pc) (if_then_else (match_op_dup 0 [(reg:CC FLG_REGNO) (const_int 0)])
- 			   (label_ref (match_dup 3))
- 			   (pc)))]
-   ""
-   )
- 
- (define_insn "bcc_op"
-   [(set (pc)
-         (if_then_else (match_operator 0 "ordered_comparison_operator"
- 		       [(reg:CC FLG_REGNO) (const_int 0)])
-                       (label_ref (match_operand 1 ""))
-                       (pc)))]
-   ""
-   "j%c0\t%l1"
-   [(set_attr "flags" "n")]
- )
- 
- (define_insn "stzx_16"
-   [(set (match_operand:QI 0 "register_operand" "=R0w,R0w,R0w")
- 	(if_then_else:QI (eq (reg:CC FLG_REGNO) (const_int 0))
- 			 (match_operand:QI 1 "const_int_operand" "i,i,0")
- 			 (match_operand:QI 2 "const_int_operand" "i,0,i")))]
-   "TARGET_A16 && reload_completed"
-   "@
-    stzx\t%1,%2,%0
-    stz\t%1,%0
-    stnz\t%2,%0"
-   [(set_attr "flags" "n,n,n")]
- )
- 
- (define_insn "stzx_24_<mode>"
-   [(set (match_operand:QHI 0 "mra_operand" "=RraSd,RraSd,RraSd")
- 	(if_then_else:QHI (eq (reg:CC FLG_REGNO) (const_int 0))
- 			 (match_operand:QHI 1 "const_int_operand" "i,i,0")
- 			 (match_operand:QHI 2 "const_int_operand" "i,0,i")))]
-   "TARGET_A24 && reload_completed"
-   "@
-    stzx.<bwl>\t%1,%2,%0
-    stz.<bwl>\t%1,%0
-    stnz.<bwl>\t%2,%0"
-   [(set_attr "flags" "n,n,n")])
- 
- (define_insn_and_split "stzx_reversed_<mode>"
-   [(set (match_operand:QHI 0 "m32c_r0_operand" "=R0w")
- 	(if_then_else:QHI (ne (reg:CC FLG_REGNO) (const_int 0))
- 			 (match_operand:QHI 1 "const_int_operand" "")
- 			 (match_operand:QHI 2 "const_int_operand" "")))]
-   "(TARGET_A24 || GET_MODE (operands[0]) == QImode) && reload_completed"
-   "#"
-   ""
-   [(set (match_dup 0)
- 	(if_then_else:QHI (eq (reg:CC FLG_REGNO) (const_int 0))
- 		      (match_dup 2)
- 		      (match_dup 1)))]
-   ""
-   )
- 
- 
- (define_insn "cmp<mode>_op"
-   [(set (reg:CC FLG_REGNO)
- 	(compare (match_operand:QHPSI 0 "mra_operand" "RraSd")
- 		 (match_operand:QHPSI 1 "mrai_operand" "RraSdi")))]
-   ""
-   "* return m32c_output_compare(insn, operands); "
-   [(set_attr "flags" "oszc")])
- 
- ;; m32c_conditional_register_usage changes the setcc_gen_code array to
- ;; point to the _24 variants if needed.
- 
- ;; We need to keep the compare and conditional sets together through
- ;; reload, because reload might need to add address reloads to the
- ;; set, which would clobber the flags.  By keeping them together, the
- ;; reloads get put before the compare, thus preserving the flags.
- 
- ;; These are the post-split patterns for the conditional sets.
- 
- (define_insn "scc_op"
-   [(set (match_operand:QI 0 "register_operand" "=Rqi")
- 	(match_operator:QI 1 "ordered_comparison_operator"
- 	 [(reg:CC FLG_REGNO) (const_int 0)]))]
-   "TARGET_A16 && reload_completed"
-   "* return m32c_scc_pattern(operands, GET_CODE (operands[1]));")
- 
- (define_insn "scc_24_op"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd")
- 	(match_operator:HI 1 "ordered_comparison_operator"
- 	 [(reg:CC FLG_REGNO) (const_int 0)]))]
-   "TARGET_A24 && reload_completed"
-   "sc%c1\t%0"
-   [(set_attr "flags" "n")]
- )
- 
- ;; These are the pre-split patterns for the conditional sets.
- 
- (define_expand "cstore<mode>4"
-   [(set (match_operand:QI 0 "register_operand")
- 	(match_operator:QI 1 "ordered_comparison_operator"
- 	 [(match_operand:QHPSI 2 "mra_operand")
- 	  (match_operand:QHPSI 3 "mrai_operand")]))]
-   ""
- {
-   if (TARGET_A24)
-     {
-       rtx o = gen_reg_rtx (HImode);
-       emit_insn (gen_cstore<mode>4_24 (o, operands[1],
- 				       operands[2], operands[3]));
-       emit_move_insn (operands[0], gen_lowpart (QImode, o));
-       DONE;
-     }
- })
- 
- (define_insn_and_split "*cstore<mode>4_16"
-   [(set (match_operand:QI 0 "register_operand" "=Rqi")
- 	(match_operator:QI 1 "ordered_comparison_operator"
- 	 [(match_operand:QHPSI 2 "mra_operand" "RraSd")
- 	  (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))]
-   "TARGET_A16"
-   "#"
-   "&& reload_completed"
-   [(set (reg:CC FLG_REGNO)
- 	(compare (match_dup 2)
- 		 (match_dup 3)))
-    (set (match_dup 0)
- 	(match_op_dup 1 [(reg:CC FLG_REGNO) (const_int 0)]))]
-   ""
-   [(set_attr "flags" "x")]
- )
- 
- (define_insn_and_split "cstore<mode>4_24"
-   [(set (match_operand:HI 0 "mra_nopp_operand" "=RhiSd")
- 	(match_operator:HI 1 "ordered_comparison_operator"
- 	 [(match_operand:QHPSI 2 "mra_operand" "RraSd")
- 	  (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))]
-   "TARGET_A24"
-   "#"
-   "&& reload_completed"
-   [(set (reg:CC FLG_REGNO)
- 	(compare (match_dup 2)
- 		 (match_dup 3)))
-    (set (match_dup 0)
- 	(match_op_dup 1 [(reg:CC FLG_REGNO) (const_int 0)]))]
-   ""
-   [(set_attr "flags" "x")]
- )
- 
- (define_insn_and_split "movqicc_<code>_<mode>"
-   [(set (match_operand:QI 0 "register_operand" "=R0w")
-         (if_then_else:QI (eqne_cond (match_operand:QHPSI 1 "mra_operand" "RraSd")
- 				    (match_operand:QHPSI 2 "mrai_operand" "RraSdi"))
- 			  (match_operand:QI 3 "const_int_operand" "")
- 			  (match_operand:QI 4 "const_int_operand" "")))]
-   ""
-   "#"
-   "reload_completed"
-   [(set (reg:CC FLG_REGNO)
- 	(compare (match_dup 1)
- 		 (match_dup 2)))
-    (set (match_dup 0)
-         (if_then_else:QI (eqne_cond (reg:CC FLG_REGNO) (const_int 0))
- 			 (match_dup 3)
- 			 (match_dup 4)))]
-   ""
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn_and_split "movhicc_<code>_<mode>"
-   [(set (match_operand:HI 0 "register_operand" "=R0w")
-         (if_then_else:HI (eqne_cond (match_operand:QHPSI 1 "mra_operand" "RraSd")
- 				    (match_operand:QHPSI 2 "mrai_operand" "RraSdi"))
- 			  (match_operand:HI 3 "const_int_operand" "")
- 			  (match_operand:HI 4 "const_int_operand" "")))]
-   "TARGET_A24"
-   "#"
-   "reload_completed"
-   [(set (reg:CC FLG_REGNO)
- 	(compare (match_dup 1)
- 		 (match_dup 2)))
-    (set (match_dup 0)
-         (if_then_else:HI (eqne_cond (reg:CC FLG_REGNO) (const_int 0))
- 			 (match_dup 3)
- 			 (match_dup 4)))]
-   ""
-   [(set_attr "flags" "x")]
-   )
- 
- ;; And these are the expanders.
- 
- (define_expand "movqicc"
-   [(set (match_operand:QI 0 "register_operand" "")
-         (if_then_else:QI (match_operand 1 "m32c_eqne_operator" "")
-                          (match_operand:QI 2 "const_int_operand" "")
-                          (match_operand:QI 3 "const_int_operand" "")))]
-   ""
-   "if (m32c_expand_movcc(operands))
-      FAIL;
-    DONE;"
- )
- 
- (define_expand "movhicc"
-   [(set (match_operand:HI 0 "mra_operand" "")
-         (if_then_else:HI (match_operand 1 "m32c_eqne_operator" "")
-                          (match_operand:HI 2 "const_int_operand" "")
-                          (match_operand:HI 3 "const_int_operand" "")))]
-   "TARGET_A24"
-   "if (m32c_expand_movcc(operands))
-      FAIL;
-    DONE;"
- )
- 
- 
- ;; CMP opcodes subtract two values, set the flags, and discard the
- ;; value.  This pattern recovers the sign of the discarded value based
- ;; on the flags.  Operand 0 is set to -1, 0, or 1.  This is used for
- ;; the cmpstr pattern.  For optimal code, this should be removed if
- ;; followed by a suitable CMP insn (see the peephole following).  This
- ;; pattern is 7 bytes and 5 cycles.  If you don't need specific
- ;; values, a 5/4 pattern can be made with SCGT and BMLT to set the
- ;; appropriate bits.
- 
- (define_insn "cond_to_int"
-   [(set (match_operand:HI 0 "mra_qi_operand" "=Rqi")
- 	(if_then_else:HI (lt (reg:CC FLG_REGNO) (const_int 0))
- 			 (const_int -1)
- 			 (if_then_else:HI (eq (reg:CC FLG_REGNO) (const_int 0))
- 					  (const_int 0)
- 					  (const_int -1))))]
-   "TARGET_A24"
-   "sceq\t%0\n\tbmgt\t1,%h0\n\tdec.w\t%0"
-   [(set_attr "flags" "x")]
-   )  
- 
- ;; A cond_to_int followed by a compare against zero is essentially a
- ;; no-op.  However, the result of the cond_to_int may be used by later
- ;; insns, so make sure it's dead before deleting its set.
- 
- (define_peephole2
-   [(set (match_operand:HI 0 "mra_qi_operand" "")
- 	(if_then_else:HI (lt (reg:CC FLG_REGNO) (const_int 0))
- 			 (const_int -1)
- 			 (if_then_else:HI (eq (reg:CC FLG_REGNO) (const_int 0))
- 					  (const_int 0)
- 					  (const_int -1))))
-    (set (reg:CC FLG_REGNO)
- 	(compare (match_operand:HI 1 "mra_qi_operand" "")
- 		 (const_int 0)))
-    ]
-   "rtx_equal_p (operands[0], operands[1])
-      && dead_or_set_p (peep2_next_insn (1), operands[0])"
-   [(const_int 1)]
-   "")
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/constraints.md gcc-17-20260510/gcc/config/m32c/constraints.md
*** gcc-17-20260503/gcc/config/m32c/constraints.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/constraints.md	Thu Jan  1 00:00:00 1970
***************
*** 1,225 ****
- ;; m32c constraints
- ;; Copyright (C) 2012-2026 Free Software Foundation, Inc.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published by
- ;; the Free Software Foundation; either version 3, or (at your option)
- ;; any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- (define_register_constraint "Rsp" "SP_REGS"
-   "@internal")
- 
- (define_register_constraint "Rfb" "FB_REGS"
-   "@internal")
- 
- (define_register_constraint "Rsb" "SB_REGS"
-   "@internal")
- 
- (define_register_constraint "Rcr" "TARGET_A16 ? CR_REGS : NO_REGS"
-   "@internal")
- 
- (define_register_constraint "Rcl" "TARGET_A24 ? CR_REGS : NO_REGS"
-   "@internal")
- 
- (define_register_constraint "R0w" "R0_REGS"
-   "@internal")
- 
- (define_register_constraint "R1w" "R1_REGS"
-   "@internal")
- 
- (define_register_constraint "R2w" "R2_REGS"
-   "@internal")
- 
- (define_register_constraint "R3w" "R3_REGS"
-   "@internal")
- 
- (define_register_constraint "R02" "R02_REGS"
-   "@internal")
- 
- (define_register_constraint "R13" "R13_REGS"
-   "@internal")
- 
- (define_register_constraint "R03" "R03_REGS"
-   "@internal")
- 
- (define_register_constraint "Rdi" "DI_REGS"
-   "@internal")
- 
- (define_register_constraint "Rhl" "HL_REGS"
-   "@internal")
- 
- (define_register_constraint "R23" "R23_REGS"
-   "@internal")
- 
- (define_register_constraint "Ra0" "A0_REGS"
-   "@internal")
- 
- (define_register_constraint "Ra1" "A1_REGS"
-   "@internal")
- 
- (define_register_constraint "Raa" "A_REGS"
-   "@internal")
- 
- (define_register_constraint "Raw" "TARGET_A16 ? A_REGS : NO_REGS"
-   "@internal")
- 
- (define_register_constraint "Ral" "TARGET_A24 ? A_REGS : NO_REGS"
-   "@internal")
- 
- (define_register_constraint "Rqi" "QI_REGS"
-   "@internal")
- 
- (define_register_constraint "Rad" "AD_REGS"
-   "@internal")
- 
- (define_register_constraint "Rsi" "SI_REGS"
-   "@internal")
- 
- (define_register_constraint "Rhi" "HI_REGS"
-   "@internal")
- 
- (define_register_constraint "Rhc" "HC_REGS"
-   "@internal")
- 
- (define_register_constraint "Rra" "RA_REGS"
-   "@internal")
- 
- (define_register_constraint "Rfl" "FLG_REGS"
-   "@internal")
- 
- (define_register_constraint "Rmm" "fixed_regs[MEM0_REGNO] ? NO_REGS : MEM_REGS"
-   "@internal")
- 
- (define_register_constraint "Rpi" "TARGET_A16 ? HI_REGS : RA_REGS"
-   "@internal")
- 
- ;;; For integer constant constraints:
- ;;; s=signed u=unsigned n=nonzero m=minus l=log2able,
- ;;; [sun] bits [SUN] bytes, p=pointer size
- ;;; I[-0-9][0-9] matches that number
- 
- (define_constraint "Is3"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -8, 7)")))
- 
- (define_constraint "IS1"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -128, 127)")))
- 
- (define_constraint "IS2"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -32768, 32767)")))
- 
- (define_constraint "IU2"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, 0, 65535)")))
- 
- (define_constraint "IU3"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, 0, 0x00ffffff)")))
- 
- (define_constraint "In4"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -8, 8) && ival")))
- 
- (define_constraint "In5"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -16, 16) && ival")))
- 
- (define_constraint "In6"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -32, 32) && ival")))
- 
- (define_constraint "IM2"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (ival, -65536, -1)")))
- 
- (define_constraint "Ilb"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (exact_log2 (ival), 0, 7)")))
- 
- (define_constraint "Imb"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (exact_log2 ((ival ^ 0xff) & 0xff), 0, 7)")))
- 
- (define_constraint "ImB"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (exact_log2 ((ival ^ 0xffff) & 0xffff), 0, 7)")))
- 
- (define_constraint "Ilw"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (exact_log2 (ival), 0, 15)")))
- 
- (define_constraint "Imw"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "IN_RANGE (exact_log2 ((ival ^ 0xffff) & 0xffff), 0, 15)")))
- 
- (define_constraint "I00"
-   "@internal"
-   (and (match_code "const_int")
-        (match_test "ival == 0")))
- 
- (define_memory_constraint "SF"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_SF)"))
- 
- (define_memory_constraint "Sd"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Sd)"))
- 
- (define_memory_constraint "Sa"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Sa)"))
- 
- (define_memory_constraint "Si"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Si)"))
- 
- (define_memory_constraint "Ss"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Ss)"))
- 
- (define_memory_constraint "Sf"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Sf)"))
- 
- (define_memory_constraint "Sb"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Sb)"))
- 
- (define_memory_constraint "Sp"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Sp)"))
- 
- (define_memory_constraint "S1"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_S1)"))
- 
- (define_constraint "Rpa"
-   "@internal"
-   (match_test "m32c_matches_constraint_p (op, CONSTRAINT_Rpa)"))
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/jump.md gcc-17-20260510/gcc/config/m32c/jump.md
*** gcc-17-20260503/gcc/config/m32c/jump.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/jump.md	Thu Jan  1 00:00:00 1970
***************
*** 1,134 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; jump, conditionals, calls, etc
- 
- (define_insn "indirect_jump_16"
-   [(set (pc)
-        (match_operand:HI 0 "register_operand" "Rhi"))]
-   "TARGET_A16"
- ;  "jmpi.a\t%0"
-   ; no 16-bit jmpi in r8c
-   "push.b #0 | push.w\t%0 | rts"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "indirect_jump_24"
-   [(set (pc)
-        (match_operand:PSI 0 "register_operand" "Rpi"))]
-   "TARGET_A24"
-   "jmpi.a\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_expand "indirect_jump"
-   [(match_operand 0 "register_operand" "")]
-   ""
-   "if (TARGET_A16)
-      emit_jump_insn (gen_indirect_jump_16(operands[0]));
-    else
-      emit_jump_insn (gen_indirect_jump_24(operands[0]));
-    DONE;"
-   )
- 
- ; We can replace this with jmp.s when gas supports relaxing.  m32c
- ; opcodes are too complicated to try to compute their sizes here, it's
- ; far easier (and more reliable) to let gas worry about it.
- (define_insn "jump"
-   [(set (pc)
- 	(label_ref (match_operand 0 "" "")))]
-   ""
-   "jmp.a\t%l0"
-   [(set_attr "flags" "n")]
- )
- 
- ; No 16-bit indirect calls on r8c/m16c.  */
- (define_insn "call"
-   [(call (match_operand:QI 0 "memory_operand" "Si,SaSb,?Rmm")
- 	 (match_operand 1 "" ""))
-    (use (match_operand 2 "immediate_operand" ""))]
-   ""
-   "*
- switch (which_alternative) {
-   case 0:
-     {
-       HOST_WIDE_INT func_vect_num = 
-       current_function_special_page_vector(XEXP (operands[0], 0));
-       if (func_vect_num)
-         {
-           operands[3] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
-           return \"jsrs\t%3\";
-         }
-       else
-         return \"jsr.a\t%0\";
-     }
-   case 1: return TARGET_A16 ? \"push.w %a0 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a0\";
-   case 2: return \"jsri.a\t%a0\";
-   default: gcc_unreachable ();
- }"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "call_value"
-   [(set (match_operand 0 "m32c_return_operand" "=RdiRmmRpa,RdiRmmRpa,RdiRmmRpa")
- 	(call (match_operand:QI 1 "memory_operand" "Si,SaSb,?Rmm")
- 	      (match_operand 2 "" "")))
-    (use (match_operand 3 "immediate_operand" ""))]
-   ""
-   "*
- switch (which_alternative) {
-   case 0:
-     {
-       HOST_WIDE_INT func_vect_num = 
-       current_function_special_page_vector(XEXP (operands[1], 0));
-       if (func_vect_num)
-         {
-           operands[4] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
-           return \"jsrs\t%4\";
-         }
-       else
-         return \"jsr.a\t%1\";
-     }
-   case 1: return TARGET_A16 ? \"push.w %a1 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a1\";
-   case 2: return \"jsri.a\t%a1\";
-   default: gcc_unreachable ();
- }"
-   [(set_attr "flags" "x,x,x")]
-   )
- 
- (define_expand "untyped_call"
-   [(parallel [(call (match_operand 0 "" "")
-                     (const_int 0))
-               (match_operand 1 "" "")
-               (match_operand 2 "" "")])]
-   ""
-   "
- {
-   int i;
- 
-   emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
- 
-   for (i = 0; i < XVECLEN (operands[2], 0); i++)
-     {
-       rtx set = XVECEXP (operands[2], 0, i);
-       emit_move_insn (SET_DEST (set), SET_SRC (set));
-     }
-   DONE;
- }")
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c-modes.def gcc-17-20260510/gcc/config/m32c/m32c-modes.def
*** gcc-17-20260503/gcc/config/m32c/m32c-modes.def	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c-modes.def	Thu Jan  1 00:00:00 1970
***************
*** 1,28 ****
- /* Target-Specific Modes for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- /* 24-bit pointers, whole */
- /*INT_MODE (PI, 3);*/
- 
- /* 24-bit pointers, in 32-bit units */
- PARTIAL_INT_MODE (SI, 24, PSI);
- 
- /* 48-bit MULEX result */
- /* INT_MODE (MI, 6); */
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c-pragma.cc gcc-17-20260510/gcc/config/m32c/m32c-pragma.cc
*** gcc-17-20260503/gcc/config/m32c/m32c-pragma.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c-pragma.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,128 ****
- /* M32C Pragma support
-    Copyright (C) 2004-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat, Inc.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 3, or (at your option)
-    any later version.
- 
-    GCC is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- #define IN_TARGET_CODE 1
- 
- #include "config.h"
- #include "system.h"
- #include "coretypes.h"
- #include "tm.h"
- #include "c-family/c-common.h"
- #include "c-family/c-pragma.h"
- #include "m32c-protos.h"
- 
- /* Implements the "GCC memregs" pragma.  This pragma takes only an
-    integer, and is semantically identical to the -memregs= command
-    line option.  The only catch is, the programmer should only use
-    this pragma at the beginning of the file (preferably, in some
-    project-wide header) to avoid ABI changes related to changing the
-    list of available "registers".  */
- static void
- m32c_pragma_memregs (cpp_reader * reader ATTRIBUTE_UNUSED)
- {
-   /* on off */
-   tree val;
-   enum cpp_ttype type;
-   HOST_WIDE_INT i;
- 
-   type = pragma_lex (&val);
-   if (type == CPP_NUMBER)
-     {
-       if (tree_fits_uhwi_p (val))
- 	{
- 	  i = tree_to_uhwi (val);
- 
- 	  type = pragma_lex (&val);
- 	  if (type != CPP_EOF)
- 	    warning (0, "junk at end of %<#pragma GCC memregs%> [0-16]");
- 
- 	  if (i >= 0 && i <= 16)
- 	    {
- 	      if (!ok_to_change_target_memregs)
- 		{
- 		  warning (0,
- 			   "%<#pragma GCC memregs%> must precede any function declarations");
- 		  return;
- 		}
- 	      target_memregs = i;
- 	      m32c_conditional_register_usage ();
- 	    }
- 	  else
- 	    {
- 	      warning (0, "%<#pragma GCC memregs%> takes a number [0-16]");
- 	    }
- 
- 	  return;
- 	}
-     }
- 
-   error ("%<#pragma GCC memregs%> takes a number [0-16]");
- }
- 
- /* Implements the "pragma ADDRESS" pragma.  This pragma takes a
-    variable name and an address, and arranges for that variable to be
-    "at" that address.  The variable is also made volatile.  */
- static void
- m32c_pragma_address (cpp_reader * reader ATTRIBUTE_UNUSED)
- {
-   /* on off */
-   tree var, addr;
-   enum cpp_ttype type;
- 
-   type = pragma_lex (&var);
-   if (type == CPP_NAME)
-     {
-       type = pragma_lex (&addr);
-       if (type == CPP_NUMBER)
- 	{
- 	  if (var != error_mark_node)
- 	    {
- 	      unsigned uaddr = tree_to_uhwi (addr);
- 	      m32c_note_pragma_address (IDENTIFIER_POINTER (var), uaddr);
- 	    }
- 
- 	  type = pragma_lex (&var);
- 	  if (type != CPP_EOF)
- 	    {
- 	      error ("junk at end of %<#pragma ADDRESS%>");
- 	    }
- 	  return;
- 	}
-     }
-   error ("malformed %<#pragma ADDRESS%> variable address");
- }
- 
- /* Implements REGISTER_TARGET_PRAGMAS.  */
- void
- m32c_register_pragmas (void)
- {
-   c_register_pragma ("GCC", "memregs", m32c_pragma_memregs);
-   c_register_pragma (NULL, "ADDRESS", m32c_pragma_address);
-   c_register_pragma (NULL, "address", m32c_pragma_address);
- 
-   /* R8C and M16C have 16-bit pointers in a 20-bit address zpace.
-      M32C has 24-bit pointers in a 24-bit address space, so does not
-      need far pointers, but we accept the qualifier anyway, as a
-      no-op.  */
-   if (TARGET_A16)
-     c_register_addr_space ("__far", ADDR_SPACE_FAR);
-   else
-     c_register_addr_space ("__far", ADDR_SPACE_GENERIC);
- }
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c-protos.h gcc-17-20260510/gcc/config/m32c/m32c-protos.h
*** gcc-17-20260503/gcc/config/m32c/m32c-protos.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c-protos.h	Thu Jan  1 00:00:00 1970
***************
*** 1,80 ****
- /* Target Prototypes for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- void m32c_conditional_register_usage (void);
- unsigned int m32c_dwarf_frame_regnum (int);
- int  m32c_eh_return_data_regno (int);
- void m32c_emit_epilogue (void);
- void m32c_emit_prologue (void);
- int  m32c_epilogue_uses (int);
- int  m32c_function_arg_regno_p (int);
- void m32c_init_expanders (void);
- int  m32c_initial_elimination_offset (int, int);
- void m32c_output_reg_pop (FILE *, int);
- void m32c_output_reg_push (FILE *, int);
- poly_int64 m32c_push_rounding (poly_int64);
- void m32c_register_pragmas (void);
- void m32c_note_pragma_address (const char *, unsigned);
- int  m32c_regno_ok_for_base_p (int);
- int  m32c_trampoline_alignment (void);
- int  m32c_trampoline_size (void);
- 
- #ifdef RTX_CODE
- 
- rtx  m32c_eh_return_stackadj_rtx (void);
- void m32c_emit_eh_epilogue (rtx);
- int  m32c_expand_cmpstr (rtx *);
- int  m32c_expand_insv (rtx *);
- int  m32c_expand_movcc (rtx *);
- int  m32c_expand_cpymemhi (rtx *);
- int  m32c_expand_movstr (rtx *);
- void m32c_expand_neg_mulpsi3 (rtx *);
- int  m32c_expand_setmemhi (rtx *);
- bool m32c_matches_constraint_p (rtx, int);
- bool m32c_illegal_subreg_p (rtx);
- bool m32c_immd_dbl_mov (rtx *, machine_mode);
- rtx  m32c_incoming_return_addr_rtx (void);
- int  m32c_legitimize_reload_address (rtx *, machine_mode, int, int, int);
- int  m32c_limit_reload_class (machine_mode, int);
- bool m32c_mov_ok (rtx *, machine_mode);
- char * m32c_output_compare (rtx_insn *, rtx *);
- int  m32c_prepare_move (rtx *, machine_mode);
- int  m32c_prepare_shift (rtx *, int, int);
- int  m32c_reg_ok_for_base_p (rtx, int);
- enum reg_class m32c_regno_reg_class (int);
- rtx  m32c_return_addr_rtx (int);
- const char *m32c_scc_pattern (rtx *, RTX_CODE);
- int  m32c_secondary_reload_class (int, machine_mode, rtx);
- int  m32c_split_move (rtx *, machine_mode, int);
- int  m32c_split_psi_p (rtx *);
- int current_function_special_page_vector (rtx);
- 
- #endif
- 
- #ifdef TREE_CODE
- 
- tree m32c_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
- void m32c_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
- bool m32c_promote_function_return (const_tree);
- int  m32c_special_page_vector_p (tree);
- void m32c_output_aligned_common (FILE *, tree, const char *,
- 				 int, int, int);
- 
- #endif
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c.abi gcc-17-20260510/gcc/config/m32c/m32c.abi
*** gcc-17-20260503/gcc/config/m32c/m32c.abi	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c.abi	Thu Jan  1 00:00:00 1970
***************
*** 1,131 ****
-    Target Definitions for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.
- 
- 
- These are just some random notes I used during development of this
- port.  Please don't consider these to be "official" specifications,
- just additional information to help make the code easier to
- understand.
- 
- 
- Frame
- =====
- 
- 	+--------------------
- 	| incoming args
- 	+--------------------
- 	| return Address
- osp ->	+--------------------
- 	| saved fp
- fp ->	+--------------------
- 	| local data
- 	+--------------------
- 	| saved regs
- 	+--------------------
- 	| outgoing args (opt)
- sp ->	+--------------------
- 
- Argument Passing
- ================
- 
- r8c, m16c
- ---------
- 
- First arg may be passed in r1l or r1 if it (1) fits (QImode or
- HImode), (2) is named, and (3) is an integer or pointer type (no
- structs, floats, etc).  Otherwise, it's passed on the stack.
- 
- Second arg may be passed in r2, same restrictions (but not QImode),
- even if the first arg is passed on the stack.
- 
- Third and further args are passed on the stack.  No padding is used,
- stack "alignment" is 8 bits.
- 
- m32cm, m32c
- -----------
- First arg may be passed in r0l or r0, same restrictions as above.
- 
- Second and further args are passed on the stack.  Padding is used
- after QImode parameters (i.e. lower-addressed byte is the value,
- higher-addressed byte is the padding), stack "alignment" is 16 bits.
- 
- 
- Return Value
- ============
- 
- r8c, m16c
- ---------
- 
- QImode in r0l
- HImode in r0
- near pointer in r0
- (desired)
- SImode in r2r0
- far pointer in r2r0
- (actual)
- Anything bigger than 16 bits is returned in memory, at mem0 (mem0
- through mem15 are provided by libgcc.a)
- 
- Aggregate values (regardless of size) are returned by pushing a
- pointer to a temporary area on the stack after the args are pushed.
- The function fills in this area with the value.  Note that this
- pointer on the stack does not affect how register arguments, if any,
- are configured.
- 
- m32cm, m32c
- -----------
- Same.
- 
- 
- Registers Preserved Across Calls
- ================================
- 
- r8c, m16c
- ---------
- sb, fb, sp (i.e. nearly all registers are call clobbered)
- 
- m32cm, m32c
- -----------
- r1, r2, r3, a0, a1, sb, fb, sp
- (except when used for return values)
- 
- 
- Interrupt Handlers
- ==================
- 
- The stack frame is slightly different for interrupt handlers, because
- (1) we don't have a usable parent frame, and (2) we have to use
- special instructions to return and thus must save/restore everything
- differently.
- 
- 	+--------------------
- 	| program state
- osp ->	+--------------------
- 	| return address
- 	+--------------------
- 	| saved r0..fp (pushm)
- fp ->	+--------------------
- 	| local data
- 	+--------------------
- 	| saved regs mem0..mem15
- 	+--------------------
- 	| outgoing args (opt)
- sp ->	+--------------------
- 
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c.cc gcc-17-20260510/gcc/config/m32c/m32c.cc
*** gcc-17-20260503/gcc/config/m32c/m32c.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c.cc	Thu Jan  1 00:00:00 1970
***************
*** 1,4511 ****
- /* Target Code for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- #define IN_TARGET_CODE 1
- 
- #include "config.h"
- #include "system.h"
- #include "coretypes.h"
- #include "backend.h"
- #include "target.h"
- #include "rtl.h"
- #include "tree.h"
- #include "stringpool.h"
- #include "attribs.h"
- #include "df.h"
- #include "memmodel.h"
- #include "tm_p.h"
- #include "optabs.h"
- #include "regs.h"
- #include "emit-rtl.h"
- #include "recog.h"
- #include "diagnostic-core.h"
- #include "output.h"
- #include "insn-attr.h"
- #include "flags.h"
- #include "reload.h"
- #include "stor-layout.h"
- #include "varasm.h"
- #include "calls.h"
- #include "explow.h"
- #include "expr.h"
- #include "tm-constrs.h"
- #include "builtins.h"
- #include "opts.h"
- 
- /* This file should be included last.  */
- #include "target-def.h"
- 
- /* Prototypes */
- 
- /* Used by m32c_pushm_popm.  */
- typedef enum
- {
-   PP_pushm,
-   PP_popm,
-   PP_justcount
- } Push_Pop_Type;
- 
- static bool m32c_function_needs_enter (void);
- static tree interrupt_handler (tree *, tree, tree, int, bool *);
- static tree function_vector_handler (tree *, tree, tree, int, bool *);
- static int interrupt_p (tree node);
- static int bank_switch_p (tree node);
- static int fast_interrupt_p (tree node);
- static int interrupt_p (tree node);
- static bool m32c_asm_integer (rtx, unsigned int, int);
- static int m32c_comp_type_attributes (const_tree, const_tree);
- static bool m32c_fixed_condition_code_regs (unsigned int *, unsigned int *);
- static struct machine_function *m32c_init_machine_status (void);
- static void m32c_insert_attributes (tree, tree *);
- static bool m32c_legitimate_address_p (machine_mode, rtx, bool,
- 				       code_helper = ERROR_MARK);
- static bool m32c_addr_space_legitimate_address_p (machine_mode, rtx, bool,
- 						  addr_space_t,
- 						  code_helper = ERROR_MARK);
- static rtx m32c_function_arg (cumulative_args_t, const function_arg_info &);
- static bool m32c_pass_by_reference (cumulative_args_t,
- 				    const function_arg_info &);
- static void m32c_function_arg_advance (cumulative_args_t,
- 				       const function_arg_info &);
- static unsigned int m32c_function_arg_boundary (machine_mode, const_tree);
- static int m32c_pushm_popm (Push_Pop_Type);
- static bool m32c_strict_argument_naming (cumulative_args_t);
- static rtx m32c_struct_value_rtx (tree, int);
- static rtx m32c_subreg (machine_mode, rtx, machine_mode, int);
- static int need_to_save (int);
- static rtx m32c_function_value (const_tree, const_tree, bool);
- static rtx m32c_libcall_value (machine_mode, const_rtx);
- 
- /* Returns true if an address is specified, else false.  */
- static bool m32c_get_pragma_address (const char *varname, unsigned *addr);
- 
- static bool m32c_hard_regno_mode_ok (unsigned int, machine_mode);
- 
- #define SYMBOL_FLAG_FUNCVEC_FUNCTION    (SYMBOL_FLAG_MACH_DEP << 0)
- 
- #define streq(a,b) (strcmp ((a), (b)) == 0)
- 
- /* Internal support routines */
- 
- /* Debugging statements are tagged with DEBUG0 only so that they can
-    be easily enabled individually, by replacing the '0' with '1' as
-    needed.  */
- #define DEBUG0 0
- #define DEBUG1 1
- 
- #if DEBUG0
- #include "print-tree.h"
- /* This is needed by some of the commented-out debug statements
-    below.  */
- static char const *class_names[LIM_REG_CLASSES] = REG_CLASS_NAMES;
- #endif
- static int class_contents[LIM_REG_CLASSES][1] = REG_CLASS_CONTENTS;
- 
- /* These are all to support encode_pattern().  */
- static char pattern[30], *patternp;
- static GTY(()) rtx patternr[30];
- #define RTX_IS(x) (streq (pattern, x))
- 
- /* Some macros to simplify the logic throughout this file.  */
- #define IS_MEM_REGNO(regno) ((regno) >= MEM0_REGNO && (regno) <= MEM7_REGNO)
- #define IS_MEM_REG(rtx) (GET_CODE (rtx) == REG && IS_MEM_REGNO (REGNO (rtx)))
- 
- #define IS_CR_REGNO(regno) ((regno) >= SB_REGNO && (regno) <= PC_REGNO)
- #define IS_CR_REG(rtx) (GET_CODE (rtx) == REG && IS_CR_REGNO (REGNO (rtx)))
- 
- static int
- far_addr_space_p (rtx x)
- {
-   if (GET_CODE (x) != MEM)
-     return 0;
- #if DEBUG0
-   fprintf(stderr, "\033[35mfar_addr_space: "); debug_rtx(x);
-   fprintf(stderr, " = %d\033[0m\n", MEM_ADDR_SPACE (x) == ADDR_SPACE_FAR);
- #endif
-   return MEM_ADDR_SPACE (x) == ADDR_SPACE_FAR;
- }
- 
- /* We do most RTX matching by converting the RTX into a string, and
-    using string compares.  This vastly simplifies the logic in many of
-    the functions in this file.
- 
-    On exit, pattern[] has the encoded string (use RTX_IS("...") to
-    compare it) and patternr[] has pointers to the nodes in the RTX
-    corresponding to each character in the encoded string.  The latter
-    is mostly used by print_operand().
- 
-    Unrecognized patterns have '?' in them; this shows up when the
-    assembler complains about syntax errors.
- */
- 
- static void
- encode_pattern_1 (rtx x)
- {
-   int i;
- 
-   if (patternp == pattern + sizeof (pattern) - 2)
-     {
-       patternp[-1] = '?';
-       return;
-     }
- 
-   patternr[patternp - pattern] = x;
- 
-   switch (GET_CODE (x))
-     {
-     case REG:
-       *patternp++ = 'r';
-       break;
-     case SUBREG:
-       if (GET_MODE_SIZE (GET_MODE (x)) !=
- 	  GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
- 	*patternp++ = 'S';
-       if (GET_MODE (x) == PSImode
- 	  && GET_CODE (XEXP (x, 0)) == REG)
- 	*patternp++ = 'S';
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case MEM:
-       *patternp++ = 'm';
-       /* FALLTHRU */
-     case CONST:
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case SIGN_EXTEND:
-       *patternp++ = '^';
-       *patternp++ = 'S';
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case ZERO_EXTEND:
-       *patternp++ = '^';
-       *patternp++ = 'Z';
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case PLUS:
-       *patternp++ = '+';
-       encode_pattern_1 (XEXP (x, 0));
-       encode_pattern_1 (XEXP (x, 1));
-       break;
-     case PRE_DEC:
-       *patternp++ = '>';
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case POST_INC:
-       *patternp++ = '<';
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case LO_SUM:
-       *patternp++ = 'L';
-       encode_pattern_1 (XEXP (x, 0));
-       encode_pattern_1 (XEXP (x, 1));
-       break;
-     case HIGH:
-       *patternp++ = 'H';
-       encode_pattern_1 (XEXP (x, 0));
-       break;
-     case SYMBOL_REF:
-       *patternp++ = 's';
-       break;
-     case LABEL_REF:
-       *patternp++ = 'l';
-       break;
-     case CODE_LABEL:
-       *patternp++ = 'c';
-       break;
-     case CONST_INT:
-     case CONST_DOUBLE:
-       *patternp++ = 'i';
-       break;
-     case UNSPEC:
-       *patternp++ = 'u';
-       *patternp++ = '0' + XCINT (x, 1, UNSPEC);
-       for (i = 0; i < XVECLEN (x, 0); i++)
- 	encode_pattern_1 (XVECEXP (x, 0, i));
-       break;
-     case USE:
-       *patternp++ = 'U';
-       break;
-     case PARALLEL:
-       *patternp++ = '|';
-       for (i = 0; i < XVECLEN (x, 0); i++)
- 	encode_pattern_1 (XVECEXP (x, 0, i));
-       break;
-     case EXPR_LIST:
-       *patternp++ = 'E';
-       encode_pattern_1 (XEXP (x, 0));
-       if (XEXP (x, 1))
- 	encode_pattern_1 (XEXP (x, 1));
-       break;
-     default:
-       *patternp++ = '?';
- #if DEBUG0
-       fprintf (stderr, "can't encode pattern %s\n",
- 	       GET_RTX_NAME (GET_CODE (x)));
-       debug_rtx (x);
- #endif
-       break;
-     }
- }
- 
- static void
- encode_pattern (rtx x)
- {
-   patternp = pattern;
-   encode_pattern_1 (x);
-   *patternp = 0;
- }
- 
- /* Since register names indicate the mode they're used in, we need a
-    way to determine which name to refer to the register with.  Called
-    by print_operand().  */
- 
- static const char *
- reg_name_with_mode (int regno, machine_mode mode)
- {
-   int mlen = GET_MODE_SIZE (mode);
-   if (regno == R0_REGNO && mlen == 1)
-     return "r0l";
-   if (regno == R0_REGNO && (mlen == 3 || mlen == 4))
-     return "r2r0";
-   if (regno == R0_REGNO && mlen == 6)
-     return "r2r1r0";
-   if (regno == R0_REGNO && mlen == 8)
-     return "r3r1r2r0";
-   if (regno == R1_REGNO && mlen == 1)
-     return "r1l";
-   if (regno == R1_REGNO && (mlen == 3 || mlen == 4))
-     return "r3r1";
-   if (regno == A0_REGNO && TARGET_A16 && (mlen == 3 || mlen == 4))
-     return "a1a0";
-   return reg_names[regno];
- }
- 
- /* How many bytes a register uses on stack when it's pushed.  We need
-    to know this because the push opcode needs to explicitly indicate
-    the size of the register, even though the name of the register
-    already tells it that.  Used by m32c_output_reg_{push,pop}, which
-    is only used through calls to ASM_OUTPUT_REG_{PUSH,POP}.  */
- 
- static int
- reg_push_size (int regno)
- {
-   switch (regno)
-     {
-     case R0_REGNO:
-     case R1_REGNO:
-       return 2;
-     case R2_REGNO:
-     case R3_REGNO:
-     case FLG_REGNO:
-       return 2;
-     case A0_REGNO:
-     case A1_REGNO:
-     case SB_REGNO:
-     case FB_REGNO:
-     case SP_REGNO:
-       if (TARGET_A16)
- 	return 2;
-       else
- 	return 3;
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* Given two register classes, find the largest intersection between
-    them.  If there is no intersection, return RETURNED_IF_EMPTY
-    instead.  */
- static reg_class_t
- reduce_class (reg_class_t original_class, reg_class_t limiting_class,
- 	      reg_class_t returned_if_empty)
- {
-   HARD_REG_SET cc;
-   int i;
-   reg_class_t best = NO_REGS;
-   unsigned int best_size = 0;
- 
-   if (original_class == limiting_class)
-     return original_class;
- 
-   cc = reg_class_contents[original_class] & reg_class_contents[limiting_class];
- 
-   for (i = 0; i < LIM_REG_CLASSES; i++)
-     {
-       if (hard_reg_set_subset_p (reg_class_contents[i], cc))
- 	if (best_size < reg_class_size[i])
- 	  {
- 	    best = (reg_class_t) i;
- 	    best_size = reg_class_size[i];
- 	  }
- 
-     }
-   if (best == NO_REGS)
-     return returned_if_empty;
-   return best;
- }
- 
- /* Used by m32c_register_move_cost to determine if a move is
-    impossibly expensive.  */
- static bool
- class_can_hold_mode (reg_class_t rclass, machine_mode mode)
- {
-   /* Cache the results:  0=untested  1=no  2=yes */
-   static char results[LIM_REG_CLASSES][MAX_MACHINE_MODE];
- 
-   if (results[(int) rclass][mode] == 0)
-     {
-       int r;
-       results[rclass][mode] = 1;
-       for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
- 	if (in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, r)
- 	    && m32c_hard_regno_mode_ok (r, mode))
- 	  {
- 	    results[rclass][mode] = 2;
- 	    break;
- 	  }
-     }
- 
- #if DEBUG0
-   fprintf (stderr, "class %s can hold %s? %s\n",
- 	   class_names[(int) rclass], mode_name[mode],
- 	   (results[rclass][mode] == 2) ? "yes" : "no");
- #endif
-   return results[(int) rclass][mode] == 2;
- }
- 
- /* Run-time Target Specification.  */
- 
- /* Memregs are memory locations that gcc treats like general
-    registers, as there are a limited number of true registers and the
-    m32c families can use memory in most places that registers can be
-    used.
- 
-    However, since memory accesses are more expensive than registers,
-    we allow the user to limit the number of memregs available, in
-    order to try to persuade gcc to try harder to use real registers.
- 
-    Memregs are provided by lib1funcs.S.
- */
- 
- int ok_to_change_target_memregs = TRUE;
- 
- /* Implements TARGET_OPTION_OVERRIDE.  */
- 
- #undef TARGET_OPTION_OVERRIDE
- #define TARGET_OPTION_OVERRIDE m32c_option_override
- 
- static void
- m32c_option_override (void)
- {
-   /* We limit memregs to 0..16, and provide a default.  */
-   if (OPTION_SET_P (target_memregs))
-     {
-       if (target_memregs < 0 || target_memregs > 16)
- 	error ("invalid target memregs value %<%d%>", target_memregs);
-     }
-   else
-     target_memregs = 16;
- 
-   if (TARGET_A24)
-     flag_ivopts = 0;
- 
-   /* This target defaults to strict volatile bitfields.  */
-   if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
-     flag_strict_volatile_bitfields = 1;
- 
-   /* r8c/m16c have no 16-bit indirect call, so thunks are involved.
-      This is always worse than an absolute call.  */
-   if (TARGET_A16)
-     flag_no_function_cse = 1;
- 
-   /* This wants to put insns between compares and their jumps.  */
-   /* FIXME: The right solution is to properly trace the flags register
-      values, but that is too much work for stage 4.  */
-   flag_combine_stack_adjustments = 0;
- }
- 
- #undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE
- #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE m32c_override_options_after_change
- 
- static void
- m32c_override_options_after_change (void)
- {
-   if (TARGET_A16)
-     flag_no_function_cse = 1;
- }
- 
- /* Defining data structures for per-function information */
- 
- /* The usual; we set up our machine_function data.  */
- static struct machine_function *
- m32c_init_machine_status (void)
- {
-   return ggc_cleared_alloc<machine_function> ();
- }
- 
- /* Implements INIT_EXPANDERS.  We just set up to call the above
-    function.  */
- void
- m32c_init_expanders (void)
- {
-   init_machine_status = m32c_init_machine_status;
- }
- 
- /* Storage Layout */
- 
- /* Register Basics */
- 
- /* Basic Characteristics of Registers */
- 
- /* Whether a mode fits in a register is complex enough to warrant a
-    table.  */
- static struct
- {
-   char qi_regs;
-   char hi_regs;
-   char pi_regs;
-   char si_regs;
-   char di_regs;
- } nregs_table[FIRST_PSEUDO_REGISTER] =
- {
-   { 1, 1, 2, 2, 4 },		/* r0 */
-   { 0, 1, 0, 0, 0 },		/* r2 */
-   { 1, 1, 2, 2, 0 },		/* r1 */
-   { 0, 1, 0, 0, 0 },		/* r3 */
-   { 0, 1, 1, 0, 0 },		/* a0 */
-   { 0, 1, 1, 0, 0 },		/* a1 */
-   { 0, 1, 1, 0, 0 },		/* sb */
-   { 0, 1, 1, 0, 0 },		/* fb */
-   { 0, 1, 1, 0, 0 },		/* sp */
-   { 1, 1, 1, 0, 0 },		/* pc */
-   { 0, 0, 0, 0, 0 },		/* fl */
-   { 1, 1, 1, 0, 0 },		/* ap */
-   { 1, 1, 2, 2, 4 },		/* mem0 */
-   { 1, 1, 2, 2, 4 },		/* mem1 */
-   { 1, 1, 2, 2, 4 },		/* mem2 */
-   { 1, 1, 2, 2, 4 },		/* mem3 */
-   { 1, 1, 2, 2, 4 },		/* mem4 */
-   { 1, 1, 2, 2, 0 },		/* mem5 */
-   { 1, 1, 2, 2, 0 },		/* mem6 */
-   { 1, 1, 0, 0, 0 },		/* mem7 */
- };
- 
- /* Implements TARGET_CONDITIONAL_REGISTER_USAGE.  We adjust the number
-    of available memregs, and select which registers need to be preserved
-    across calls based on the chip family.  */
- 
- #undef TARGET_CONDITIONAL_REGISTER_USAGE
- #define TARGET_CONDITIONAL_REGISTER_USAGE m32c_conditional_register_usage
- void
- m32c_conditional_register_usage (void)
- {
-   int i;
- 
-   if (target_memregs >= 0 && target_memregs <= 16)
-     {
-       /* The command line option is bytes, but our "registers" are
- 	 16-bit words.  */
-       for (i = (target_memregs+1)/2; i < 8; i++)
- 	{
- 	  fixed_regs[MEM0_REGNO + i] = 1;
- 	  CLEAR_HARD_REG_BIT (reg_class_contents[MEM_REGS], MEM0_REGNO + i);
- 	}
-     }
- 
-   /* M32CM and M32C preserve more registers across function calls.  */
-   if (TARGET_A24)
-     {
-       call_used_regs[R1_REGNO] = 0;
-       call_used_regs[R2_REGNO] = 0;
-       call_used_regs[R3_REGNO] = 0;
-       call_used_regs[A0_REGNO] = 0;
-       call_used_regs[A1_REGNO] = 0;
-     }
- }
- 
- /* How Values Fit in Registers */
- 
- /* Implements TARGET_HARD_REGNO_NREGS.  This is complicated by the fact that
-    different registers are different sizes from each other, *and* may
-    be different sizes in different chip families.  */
- static unsigned int
- m32c_hard_regno_nregs_1 (unsigned int regno, machine_mode mode)
- {
-   if (regno == FLG_REGNO && mode == CCmode)
-     return 1;
-   if (regno >= FIRST_PSEUDO_REGISTER)
-     return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD);
- 
-   if (regno >= MEM0_REGNO && regno <= MEM7_REGNO)
-     return (GET_MODE_SIZE (mode) + 1) / 2;
- 
-   if (GET_MODE_SIZE (mode) <= 1)
-     return nregs_table[regno].qi_regs;
-   if (GET_MODE_SIZE (mode) <= 2)
-     return nregs_table[regno].hi_regs;
-   if (regno == A0_REGNO && mode == SImode && TARGET_A16)
-     return 2;
-   if ((GET_MODE_SIZE (mode) <= 3 || mode == PSImode) && TARGET_A24)
-     return nregs_table[regno].pi_regs;
-   if (GET_MODE_SIZE (mode) <= 4)
-     return nregs_table[regno].si_regs;
-   if (GET_MODE_SIZE (mode) <= 8)
-     return nregs_table[regno].di_regs;
-   return 0;
- }
- 
- static unsigned int
- m32c_hard_regno_nregs (unsigned int regno, machine_mode mode)
- {
-   unsigned int rv = m32c_hard_regno_nregs_1 (regno, mode);
-   return rv ? rv : 1;
- }
- 
- /* Implement TARGET_HARD_REGNO_MODE_OK.  The above function does the work
-    already; just test its return value.  */
- static bool
- m32c_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
- {
-   return m32c_hard_regno_nregs_1 (regno, mode) != 0;
- }
- 
- /* Implement TARGET_MODES_TIEABLE_P.  In general, modes aren't tieable since
-    registers are all different sizes.  However, since most modes are
-    bigger than our registers anyway, it's easier to implement this
-    function that way, leaving QImode as the only unique case.  */
- static bool
- m32c_modes_tieable_p (machine_mode m1, machine_mode m2)
- {
-   if (GET_MODE_SIZE (m1) == GET_MODE_SIZE (m2))
-     return 1;
- 
- #if 0
-   if (m1 == QImode || m2 == QImode)
-     return 0;
- #endif
- 
-   return 1;
- }
- 
- /* Register Classes */
- 
- /* Implements REGNO_REG_CLASS.  */
- enum reg_class
- m32c_regno_reg_class (int regno)
- {
-   switch (regno)
-     {
-     case R0_REGNO:
-       return R0_REGS;
-     case R1_REGNO:
-       return R1_REGS;
-     case R2_REGNO:
-       return R2_REGS;
-     case R3_REGNO:
-       return R3_REGS;
-     case A0_REGNO:
-       return A0_REGS;
-     case A1_REGNO:
-       return A1_REGS;
-     case SB_REGNO:
-       return SB_REGS;
-     case FB_REGNO:
-       return FB_REGS;
-     case SP_REGNO:
-       return SP_REGS;
-     case FLG_REGNO:
-       return FLG_REGS;
-     default:
-       if (IS_MEM_REGNO (regno))
- 	return MEM_REGS;
-       return ALL_REGS;
-     }
- }
- 
- /* Implements REGNO_OK_FOR_BASE_P.  */
- int
- m32c_regno_ok_for_base_p (int regno)
- {
-   if (regno == A0_REGNO
-       || regno == A1_REGNO || regno >= FIRST_PSEUDO_REGISTER)
-     return 1;
-   return 0;
- }
- 
- /* Implements TARGET_PREFERRED_RELOAD_CLASS.  In general, prefer general
-    registers of the appropriate size.  */
- 
- #undef TARGET_PREFERRED_RELOAD_CLASS
- #define TARGET_PREFERRED_RELOAD_CLASS m32c_preferred_reload_class
- 
- static reg_class_t
- m32c_preferred_reload_class (rtx x, reg_class_t rclass)
- {
-   reg_class_t newclass = rclass;
- 
- #if DEBUG0
-   fprintf (stderr, "\npreferred_reload_class for %s is ",
- 	   class_names[rclass]);
- #endif
-   if (rclass == NO_REGS)
-     rclass = GET_MODE (x) == QImode ? HL_REGS : R03_REGS;
- 
-   if (reg_classes_intersect_p (rclass, CR_REGS))
-     {
-       switch (GET_MODE (x))
- 	{
- 	case E_QImode:
- 	  newclass = HL_REGS;
- 	  break;
- 	default:
- 	  /*      newclass = HI_REGS; */
- 	  break;
- 	}
-     }
- 
-   else if (newclass == QI_REGS && GET_MODE_SIZE (GET_MODE (x)) > 2)
-     newclass = SI_REGS;
-   else if (GET_MODE_SIZE (GET_MODE (x)) > 4
- 	   && ! reg_class_subset_p (R03_REGS, rclass))
-     newclass = DI_REGS;
- 
-   rclass = reduce_class (rclass, newclass, rclass);
- 
-   if (GET_MODE (x) == QImode)
-     rclass = reduce_class (rclass, HL_REGS, rclass);
- 
- #if DEBUG0
-   fprintf (stderr, "%s\n", class_names[rclass]);
-   debug_rtx (x);
- 
-   if (GET_CODE (x) == MEM
-       && GET_CODE (XEXP (x, 0)) == PLUS
-       && GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS)
-     fprintf (stderr, "Glorm!\n");
- #endif
-   return rclass;
- }
- 
- /* Implements TARGET_PREFERRED_OUTPUT_RELOAD_CLASS.  */
- 
- #undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS
- #define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS m32c_preferred_output_reload_class
- 
- static reg_class_t
- m32c_preferred_output_reload_class (rtx x, reg_class_t rclass)
- {
-   return m32c_preferred_reload_class (x, rclass);
- }
- 
- /* Implements LIMIT_RELOAD_CLASS.  We basically want to avoid using
-    address registers for reloads since they're needed for address
-    reloads.  */
- int
- m32c_limit_reload_class (machine_mode mode, int rclass)
- {
- #if DEBUG0
-   fprintf (stderr, "limit_reload_class for %s: %s ->",
- 	   mode_name[mode], class_names[rclass]);
- #endif
- 
-   if (mode == QImode)
-     rclass = reduce_class (rclass, HL_REGS, rclass);
-   else if (mode == HImode)
-     rclass = reduce_class (rclass, HI_REGS, rclass);
-   else if (mode == SImode)
-     rclass = reduce_class (rclass, SI_REGS, rclass);
- 
-   if (rclass != A_REGS)
-     rclass = reduce_class (rclass, DI_REGS, rclass);
- 
- #if DEBUG0
-   fprintf (stderr, " %s\n", class_names[rclass]);
- #endif
-   return rclass;
- }
- 
- /* Implements SECONDARY_RELOAD_CLASS.  QImode have to be reloaded in
-    r0 or r1, as those are the only real QImode registers.  CR regs get
-    reloaded through appropriately sized general or address
-    registers.  */
- int
- m32c_secondary_reload_class (int rclass, machine_mode mode, rtx x)
- {
-   int cc = class_contents[rclass][0];
- #if DEBUG0
-   fprintf (stderr, "\nsecondary reload class %s %s\n",
- 	   class_names[rclass], mode_name[mode]);
-   debug_rtx (x);
- #endif
-   if (mode == QImode
-       && GET_CODE (x) == MEM && (cc & ~class_contents[R23_REGS][0]) == 0)
-     return QI_REGS;
-   if (reg_classes_intersect_p (rclass, CR_REGS)
-       && GET_CODE (x) == REG
-       && REGNO (x) >= SB_REGNO && REGNO (x) <= SP_REGNO)
-     return (TARGET_A16 || mode == HImode) ? HI_REGS : A_REGS;
-   return NO_REGS;
- }
- 
- /* Implements TARGET_CLASS_LIKELY_SPILLED_P.  A_REGS is needed for address
-    reloads.  */
- 
- #undef TARGET_CLASS_LIKELY_SPILLED_P
- #define TARGET_CLASS_LIKELY_SPILLED_P m32c_class_likely_spilled_p
- 
- static bool
- m32c_class_likely_spilled_p (reg_class_t regclass)
- {
-   if (regclass == A_REGS)
-     return true;
- 
-   return (reg_class_size[(int) regclass] == 1);
- }
- 
- /* Implements TARGET_CLASS_MAX_NREGS.  We calculate this according to its
-    documented meaning, to avoid potential inconsistencies with actual
-    class definitions.  */
- 
- #undef TARGET_CLASS_MAX_NREGS
- #define TARGET_CLASS_MAX_NREGS m32c_class_max_nregs
- 
- static unsigned char
- m32c_class_max_nregs (reg_class_t regclass, machine_mode mode)
- {
-   int rn;
-   unsigned char max = 0;
- 
-   for (rn = 0; rn < FIRST_PSEUDO_REGISTER; rn++)
-     if (TEST_HARD_REG_BIT (reg_class_contents[(int) regclass], rn))
-       {
- 	unsigned char n = m32c_hard_regno_nregs (rn, mode);
- 	if (max < n)
- 	  max = n;
-       }
-   return max;
- }
- 
- /* Implements TARGET_CAN_CHANGE_MODE_CLASS.  Only r0 and r1 can change to
-    QI (r0l, r1l) because the chip doesn't support QI ops on other
-    registers (well, it does on a0/a1 but if we let gcc do that, reload
-    suffers).  Otherwise, we allow changes to larger modes.  */
- static bool
- m32c_can_change_mode_class (machine_mode from,
- 			    machine_mode to, reg_class_t rclass)
- {
-   int rn;
- #if DEBUG0
-   fprintf (stderr, "can change from %s to %s in %s\n",
- 	   mode_name[from], mode_name[to], class_names[rclass]);
- #endif
- 
-   /* If the larger mode isn't allowed in any of these registers, we
-      can't allow the change.  */
-   for (rn = 0; rn < FIRST_PSEUDO_REGISTER; rn++)
-     if (class_contents[rclass][0] & (1 << rn))
-       if (! m32c_hard_regno_mode_ok (rn, to))
- 	return false;
- 
-   if (to == QImode)
-     return (class_contents[rclass][0] & 0x1ffa) == 0;
- 
-   if (class_contents[rclass][0] & 0x0005	/* r0, r1 */
-       && GET_MODE_SIZE (from) > 1)
-     return true;
-   if (GET_MODE_SIZE (from) > 2)	/* all other regs */
-     return true;
- 
-   return false;
- }
- 
- /* Helpers for the rest of the file.  */
- /* TRUE if the rtx is a REG rtx for the given register.  */
- #define IS_REG(rtx,regno) (GET_CODE (rtx) == REG \
- 			   && REGNO (rtx) == regno)
- /* TRUE if the rtx is a pseudo - specifically, one we can use as a
-    base register in address calculations (hence the "strict"
-    argument).  */
- #define IS_PSEUDO(rtx,strict) (!strict && GET_CODE (rtx) == REG \
- 			       && (REGNO (rtx) == AP_REGNO \
- 				   || REGNO (rtx) >= FIRST_PSEUDO_REGISTER))
- 
- #define A0_OR_PSEUDO(x) (IS_REG(x, A0_REGNO) || REGNO (x) >= FIRST_PSEUDO_REGISTER)
- 
- /* Implements matching for constraints (see next function too).  'S' is
-    for memory constraints, plus "Rpa" for PARALLEL rtx's we use for
-    call return values.  */
- bool
- m32c_matches_constraint_p (rtx value, int constraint)
- {
-   encode_pattern (value);
- 
-   switch (constraint) {
-   case CONSTRAINT_SF:
-     return (far_addr_space_p (value)
- 	    && ((RTX_IS ("mr")
- 		 && A0_OR_PSEUDO (patternr[1])
- 		 && GET_MODE (patternr[1]) == SImode)
- 		|| (RTX_IS ("m+^Sri")
- 		    && A0_OR_PSEUDO (patternr[4])
- 		    && GET_MODE (patternr[4]) == HImode)
- 		|| (RTX_IS ("m+^Srs")
- 		    && A0_OR_PSEUDO (patternr[4])
- 		    && GET_MODE (patternr[4]) == HImode)
- 		|| (RTX_IS ("m+^S+ris")
- 		    && A0_OR_PSEUDO (patternr[5])
- 		    && GET_MODE (patternr[5]) == HImode)
- 		|| RTX_IS ("ms")));
-   case CONSTRAINT_Sd:
-     {
-       /* This is the common "src/dest" address */
-       rtx r;
-       if (GET_CODE (value) == MEM && CONSTANT_P (XEXP (value, 0)))
- 	return true;
-       if (RTX_IS ("ms") || RTX_IS ("m+si"))
- 	return true;
-       if (RTX_IS ("m++rii"))
- 	{
- 	  if (REGNO (patternr[3]) == FB_REGNO
- 	      && INTVAL (patternr[4]) == 0)
- 	    return true;
- 	}
-       if (RTX_IS ("mr"))
- 	r = patternr[1];
-       else if (RTX_IS ("m+ri") || RTX_IS ("m+rs") || RTX_IS ("m+r+si"))
- 	r = patternr[2];
-       else
- 	return false;
-       if (REGNO (r) == SP_REGNO)
- 	return false;
-       return m32c_legitimate_address_p (GET_MODE (value), XEXP (value, 0), 1);
-     }
-   case CONSTRAINT_Sa:
-     {
-       rtx r;
-       if (RTX_IS ("mr"))
- 	r = patternr[1];
-       else if (RTX_IS ("m+ri"))
- 	r = patternr[2];
-       else
- 	return false;
-       return (IS_REG (r, A0_REGNO) || IS_REG (r, A1_REGNO));
-     }
-   case CONSTRAINT_Si:
-     return (RTX_IS ("mi") || RTX_IS ("ms") || RTX_IS ("m+si"));
-   case CONSTRAINT_Ss:
-     return ((RTX_IS ("mr")
- 	     && (IS_REG (patternr[1], SP_REGNO)))
- 	    || (RTX_IS ("m+ri") && (IS_REG (patternr[2], SP_REGNO))));
-   case CONSTRAINT_Sf:
-     return ((RTX_IS ("mr")
- 	     && (IS_REG (patternr[1], FB_REGNO)))
- 	    || (RTX_IS ("m+ri") && (IS_REG (patternr[2], FB_REGNO))));
-   case CONSTRAINT_Sb:
-     return ((RTX_IS ("mr")
- 	     && (IS_REG (patternr[1], SB_REGNO)))
- 	    || (RTX_IS ("m+ri") && (IS_REG (patternr[2], SB_REGNO))));
-   case CONSTRAINT_Sp:
-     /* Absolute addresses 0..0x1fff used for bit addressing (I/O ports) */
-     return (RTX_IS ("mi")
- 	    && !(INTVAL (patternr[1]) & ~0x1fff));
-   case CONSTRAINT_S1:
-     return r1h_operand (value, QImode);
-   case CONSTRAINT_Rpa:
-     return GET_CODE (value) == PARALLEL;
-   default:
-     return false;
-   }
- }
- 
- /* STACK AND CALLING */
- 
- /* Frame Layout */
- 
- /* Implements RETURN_ADDR_RTX.  Note that R8C and M16C push 24 bits
-    (yes, THREE bytes) onto the stack for the return address, but we
-    don't support pointers bigger than 16 bits on those chips.  This
-    will likely wreak havoc with exception unwinding.  FIXME.  */
- rtx
- m32c_return_addr_rtx (int count)
- {
-   machine_mode mode;
-   int offset;
-   rtx ra_mem;
- 
-   if (count)
-     return NULL_RTX;
-   /* we want 2[$fb] */
- 
-   if (TARGET_A24)
-     {
-       /* It's four bytes */
-       mode = PSImode;
-       offset = 4;
-     }
-   else
-     {
-       /* FIXME: it's really 3 bytes */
-       mode = HImode;
-       offset = 2;
-     }
- 
-   ra_mem =
-     gen_rtx_MEM (mode, plus_constant (Pmode, gen_rtx_REG (Pmode, FP_REGNO),
- 				      offset));
-   return copy_to_mode_reg (mode, ra_mem);
- }
- 
- /* Implements INCOMING_RETURN_ADDR_RTX.  See comment above.  */
- rtx
- m32c_incoming_return_addr_rtx (void)
- {
-   /* we want [sp] */
-   return gen_rtx_MEM (PSImode, gen_rtx_REG (PSImode, SP_REGNO));
- }
- 
- /* Exception Handling Support */
- 
- /* Implements EH_RETURN_DATA_REGNO.  Choose registers able to hold
-    pointers.  */
- int
- m32c_eh_return_data_regno (int n)
- {
-   switch (n)
-     {
-     case 0:
-       return MEM0_REGNO;
-     case 1:
-       return MEM0_REGNO+4;
-     default:
-       return INVALID_REGNUM;
-     }
- }
- 
- /* Implements EH_RETURN_STACKADJ_RTX.  Saved and used later in
-    m32c_emit_eh_epilogue.  */
- rtx
- m32c_eh_return_stackadj_rtx (void)
- {
-   if (!cfun->machine->eh_stack_adjust)
-     {
-       rtx sa;
- 
-       sa = gen_rtx_REG (Pmode, R0_REGNO);
-       cfun->machine->eh_stack_adjust = sa;
-     }
-   return cfun->machine->eh_stack_adjust;
- }
- 
- /* Registers That Address the Stack Frame */
- 
- /* Implements DWARF_FRAME_REGNUM and DEBUGGER_REGNO.  Note that
-    the original spec called for dwarf numbers to vary with register
-    width as well, for example, r0l, r0, and r2r0 would each have
-    different dwarf numbers.  GCC doesn't support this, and we don't do
-    it, and gdb seems to like it this way anyway.  */
- unsigned int
- m32c_dwarf_frame_regnum (int n)
- {
-   switch (n)
-     {
-     case R0_REGNO:
-       return 5;
-     case R1_REGNO:
-       return 6;
-     case R2_REGNO:
-       return 7;
-     case R3_REGNO:
-       return 8;
-     case A0_REGNO:
-       return 9;
-     case A1_REGNO:
-       return 10;
-     case FB_REGNO:
-       return 11;
-     case SB_REGNO:
-       return 19;
- 
-     case SP_REGNO:
-       return 12;
-     case PC_REGNO:
-       return 13;
-     default:
-       return DWARF_FRAME_REGISTERS + 1;
-     }
- }
- 
- /* The frame looks like this:
- 
-    ap -> +------------------------------
-          | Return address (3 or 4 bytes)
- 	 | Saved FB (2 or 4 bytes)
-    fb -> +------------------------------
- 	 | local vars
-          | register saves fb
- 	 |        through r0 as needed
-    sp -> +------------------------------
- */
- 
- /* We use this to wrap all emitted insns in the prologue.  */
- static rtx
- F (rtx x)
- {
-   RTX_FRAME_RELATED_P (x) = 1;
-   return x;
- }
- 
- /* This maps register numbers to the PUSHM/POPM bitfield, and tells us
-    how much the stack pointer moves for each, for each cpu family.  */
- static struct
- {
-   int reg1;
-   int bit;
-   int a16_bytes;
-   int a24_bytes;
- } pushm_info[] =
- {
-   /* These are in reverse push (nearest-to-sp) order.  */
-   { R0_REGNO, 0x80, 2, 2 },
-   { R1_REGNO, 0x40, 2, 2 },
-   { R2_REGNO, 0x20, 2, 2 },
-   { R3_REGNO, 0x10, 2, 2 },
-   { A0_REGNO, 0x08, 2, 4 },
-   { A1_REGNO, 0x04, 2, 4 },
-   { SB_REGNO, 0x02, 2, 4 },
-   { FB_REGNO, 0x01, 2, 4 }
- };
- 
- #define PUSHM_N (ARRAY_SIZE (pushm_info))
- 
- /* Returns TRUE if we need to save/restore the given register.  We
-    save everything for exception handlers, so that any register can be
-    unwound.  For interrupt handlers, we save everything if the handler
-    calls something else (because we don't know what *that* function
-    might do), but try to be a bit smarter if the handler is a leaf
-    function.  We always save $a0, though, because we use that in the
-    epilogue to copy $fb to $sp.  */
- static int
- need_to_save (int regno)
- {
-   if (fixed_regs[regno])
-     return 0;
-   if (crtl->calls_eh_return)
-     return 1;
-   if (regno == FP_REGNO)
-     return 0;
-   if (cfun->machine->is_interrupt
-       && (!cfun->machine->is_leaf
- 	  || (regno == A0_REGNO
- 	      && m32c_function_needs_enter ())
- 	  ))
-     return 1;
-   if (df_regs_ever_live_p (regno)
-       && (!call_used_or_fixed_reg_p (regno) || cfun->machine->is_interrupt))
-     return 1;
-   return 0;
- }
- 
- /* This function contains all the intelligence about saving and
-    restoring registers.  It always figures out the register save set.
-    When called with PP_justcount, it merely returns the size of the
-    save set (for eliminating the frame pointer, for example).  When
-    called with PP_pushm or PP_popm, it emits the appropriate
-    instructions for saving (pushm) or restoring (popm) the
-    registers.  */
- static int
- m32c_pushm_popm (Push_Pop_Type ppt)
- {
-   int reg_mask = 0;
-   int byte_count = 0, bytes;
-   int i;
-   rtx dwarf_set[PUSHM_N];
-   int n_dwarfs = 0;
-   int nosave_mask = 0;
- 
-   if (crtl->return_rtx
-       && GET_CODE (crtl->return_rtx) == PARALLEL
-       && !(crtl->calls_eh_return || cfun->machine->is_interrupt))
-     {
-       rtx exp = XVECEXP (crtl->return_rtx, 0, 0);
-       rtx rv = XEXP (exp, 0);
-       int rv_bytes = GET_MODE_SIZE (GET_MODE (rv));
- 
-       if (rv_bytes > 2)
- 	nosave_mask |= 0x20;	/* PSI, SI */
-       else
- 	nosave_mask |= 0xf0;	/* DF */
-       if (rv_bytes > 4)
- 	nosave_mask |= 0x50;	/* DI */
-     }
- 
-   for (i = 0; i < (int) PUSHM_N; i++)
-     {
-       /* Skip if neither register needs saving.  */
-       if (!need_to_save (pushm_info[i].reg1))
- 	continue;
- 
-       if (pushm_info[i].bit & nosave_mask)
- 	continue;
- 
-       reg_mask |= pushm_info[i].bit;
-       bytes = TARGET_A16 ? pushm_info[i].a16_bytes : pushm_info[i].a24_bytes;
- 
-       if (ppt == PP_pushm)
- 	{
- 	  machine_mode mode = (bytes == 2) ? HImode : SImode;
- 	  rtx addr;
- 
- 	  /* Always use stack_pointer_rtx instead of calling
- 	     rtx_gen_REG ourselves.  Code elsewhere in GCC assumes
- 	     that there is a single rtx representing the stack pointer,
- 	     namely stack_pointer_rtx, and uses == to recognize it.  */
- 	  addr = stack_pointer_rtx;
- 
- 	  if (byte_count != 0)
- 	    addr = gen_rtx_PLUS (GET_MODE (addr), addr, GEN_INT (byte_count));
- 
- 	  dwarf_set[n_dwarfs++] =
- 	    gen_rtx_SET (gen_rtx_MEM (mode, addr),
- 			 gen_rtx_REG (mode, pushm_info[i].reg1));
- 	  F (dwarf_set[n_dwarfs - 1]);
- 
- 	}
-       byte_count += bytes;
-     }
- 
-   if (cfun->machine->is_interrupt)
-     {
-       cfun->machine->intr_pushm = reg_mask & 0xfe;
-       reg_mask = 0;
-       byte_count = 0;
-     }
- 
-   if (cfun->machine->is_interrupt)
-     for (i = MEM0_REGNO; i <= MEM7_REGNO; i++)
-       if (need_to_save (i))
- 	{
- 	  byte_count += 2;
- 	  cfun->machine->intr_pushmem[i - MEM0_REGNO] = 1;
- 	}
- 
-   if (ppt == PP_pushm && byte_count)
-     {
-       rtx note = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (n_dwarfs + 1));
-       rtx pushm;
- 
-       if (reg_mask)
- 	{
- 	  XVECEXP (note, 0, 0)
- 	    = gen_rtx_SET (stack_pointer_rtx,
- 			   gen_rtx_PLUS (GET_MODE (stack_pointer_rtx),
- 					 stack_pointer_rtx,
- 					 GEN_INT (-byte_count)));
- 	  F (XVECEXP (note, 0, 0));
- 
- 	  for (i = 0; i < n_dwarfs; i++)
- 	    XVECEXP (note, 0, i + 1) = dwarf_set[i];
- 
- 	  pushm = F (emit_insn (gen_pushm (GEN_INT (reg_mask))));
- 
- 	  add_reg_note (pushm, REG_FRAME_RELATED_EXPR, note);
- 	}
- 
-       if (cfun->machine->is_interrupt)
- 	for (i = MEM0_REGNO; i <= MEM7_REGNO; i++)
- 	  if (cfun->machine->intr_pushmem[i - MEM0_REGNO])
- 	    {
- 	      if (TARGET_A16)
- 		pushm = emit_insn (gen_pushhi_16 (gen_rtx_REG (HImode, i)));
- 	      else
- 		pushm = emit_insn (gen_pushhi_24 (gen_rtx_REG (HImode, i)));
- 	      F (pushm);
- 	    }
-     }
-   if (ppt == PP_popm && byte_count)
-     {
-       if (cfun->machine->is_interrupt)
- 	for (i = MEM7_REGNO; i >= MEM0_REGNO; i--)
- 	  if (cfun->machine->intr_pushmem[i - MEM0_REGNO])
- 	    {
- 	      if (TARGET_A16)
- 		emit_insn (gen_pophi_16 (gen_rtx_REG (HImode, i)));
- 	      else
- 		emit_insn (gen_pophi_24 (gen_rtx_REG (HImode, i)));
- 	    }
-       if (reg_mask)
- 	emit_insn (gen_popm (GEN_INT (reg_mask)));
-     }
- 
-   return byte_count;
- }
- 
- /* Implements INITIAL_ELIMINATION_OFFSET.  See the comment above that
-    diagrams our call frame.  */
- int
- m32c_initial_elimination_offset (int from, int to)
- {
-   int ofs = 0;
- 
-   if (from == AP_REGNO)
-     {
-       if (TARGET_A16)
- 	ofs += 5;
-       else
- 	ofs += 8;
-     }
- 
-   if (to == SP_REGNO)
-     {
-       ofs += m32c_pushm_popm (PP_justcount);
-       ofs += get_frame_size ();
-     }
- 
-   /* Account for push rounding.  */
-   if (TARGET_A24)
-     ofs = (ofs + 1) & ~1;
- #if DEBUG0
-   fprintf (stderr, "initial_elimination_offset from=%d to=%d, ofs=%d\n", from,
- 	   to, ofs);
- #endif
-   return ofs;
- }
- 
- /* Passing Function Arguments on the Stack */
- 
- /* Implements PUSH_ROUNDING.  The R8C and M16C have byte stacks, the
-    M32C has word stacks.  */
- poly_int64
- m32c_push_rounding (poly_int64 n)
- {
-   if (TARGET_R8C || TARGET_M16C)
-     return n;
-   return (n + 1) & ~1;
- }
- 
- #undef TARGET_PUSH_ARGUMENT
- #define TARGET_PUSH_ARGUMENT hook_bool_uint_true
- 
- /* Passing Arguments in Registers */
- 
- /* Implements TARGET_FUNCTION_ARG.  Arguments are passed partly in
-    registers, partly on stack.  If our function returns a struct, a
-    pointer to a buffer for it is at the top of the stack (last thing
-    pushed).  The first few real arguments may be in registers as
-    follows:
- 
-    R8C/M16C:	arg1 in r1 if it's QI or HI (else it's pushed on stack)
- 		arg2 in r2 if it's HI (else pushed on stack)
- 		rest on stack
-    M32C:        arg1 in r0 if it's QI or HI (else it's pushed on stack)
- 		rest on stack
- 
-    Structs are not passed in registers, even if they fit.  Only
-    integer and pointer types are passed in registers.
- 
-    Note that when arg1 doesn't fit in r1, arg2 may still be passed in
-    r2 if it fits.  */
- #undef TARGET_FUNCTION_ARG
- #define TARGET_FUNCTION_ARG m32c_function_arg
- static rtx
- m32c_function_arg (cumulative_args_t ca_v, const function_arg_info &arg)
- {
-   CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
- 
-   /* Can return a reg, parallel, or 0 for stack */
-   rtx rv = NULL_RTX;
- #if DEBUG0
-   fprintf (stderr, "func_arg %d (%s, %d)\n",
- 	   ca->parm_num, mode_name[arg.mode], arg.named);
-   debug_tree (arg.type);
- #endif
- 
-   if (arg.end_marker_p ())
-     return GEN_INT (0);
- 
-   if (ca->force_mem || !arg.named)
-     {
- #if DEBUG0
-       fprintf (stderr, "func arg: force %d named %d, mem\n", ca->force_mem,
- 	       arg.named);
- #endif
-       return NULL_RTX;
-     }
- 
-   if (arg.type && INTEGRAL_TYPE_P (arg.type) && POINTER_TYPE_P (arg.type))
-     return NULL_RTX;
- 
-   if (arg.aggregate_type_p ())
-     return NULL_RTX;
- 
-   switch (ca->parm_num)
-     {
-     case 1:
-       if (GET_MODE_SIZE (arg.mode) == 1 || GET_MODE_SIZE (arg.mode) == 2)
- 	rv = gen_rtx_REG (arg.mode, TARGET_A16 ? R1_REGNO : R0_REGNO);
-       break;
- 
-     case 2:
-       if (TARGET_A16 && GET_MODE_SIZE (arg.mode) == 2)
- 	rv = gen_rtx_REG (arg.mode, R2_REGNO);
-       break;
-     }
- 
- #if DEBUG0
-   debug_rtx (rv);
- #endif
-   return rv;
- }
- 
- #undef TARGET_PASS_BY_REFERENCE
- #define TARGET_PASS_BY_REFERENCE m32c_pass_by_reference
- static bool
- m32c_pass_by_reference (cumulative_args_t, const function_arg_info &)
- {
-   return 0;
- }
- 
- /* Implements INIT_CUMULATIVE_ARGS.  */
- void
- m32c_init_cumulative_args (CUMULATIVE_ARGS * ca,
- 			   tree fntype,
- 			   rtx libname ATTRIBUTE_UNUSED,
- 			   tree fndecl,
- 			   int n_named_args ATTRIBUTE_UNUSED)
- {
-   if (fntype && aggregate_value_p (TREE_TYPE (fntype), fndecl))
-     ca->force_mem = 1;
-   else
-     ca->force_mem = 0;
-   ca->parm_num = 1;
- }
- 
- /* Implements TARGET_FUNCTION_ARG_ADVANCE.  force_mem is set for
-    functions returning structures, so we always reset that.  Otherwise,
-    we only need to know the sequence number of the argument to know what
-    to do with it.  */
- #undef TARGET_FUNCTION_ARG_ADVANCE
- #define TARGET_FUNCTION_ARG_ADVANCE m32c_function_arg_advance
- static void
- m32c_function_arg_advance (cumulative_args_t ca_v,
- 			   const function_arg_info &)
- {
-   CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v);
- 
-   if (ca->force_mem)
-     ca->force_mem = 0;
-   else
-     ca->parm_num++;
- }
- 
- /* Implements TARGET_FUNCTION_ARG_BOUNDARY.  */
- #undef TARGET_FUNCTION_ARG_BOUNDARY
- #define TARGET_FUNCTION_ARG_BOUNDARY m32c_function_arg_boundary
- static unsigned int
- m32c_function_arg_boundary (machine_mode mode ATTRIBUTE_UNUSED,
- 			    const_tree type ATTRIBUTE_UNUSED)
- {
-   return (TARGET_A16 ? 8 : 16);
- }
- 
- /* Implements FUNCTION_ARG_REGNO_P.  */
- int
- m32c_function_arg_regno_p (int r)
- {
-   if (TARGET_A24)
-     return (r == R0_REGNO);
-   return (r == R1_REGNO || r == R2_REGNO);
- }
- 
- /* HImode and PSImode are the two "native" modes as far as GCC is
-    concerned, but the chips also support a 32-bit mode which is used
-    for some opcodes in R8C/M16C and for reset vectors and such.  */
- #undef TARGET_VALID_POINTER_MODE
- #define TARGET_VALID_POINTER_MODE m32c_valid_pointer_mode
- static bool
- m32c_valid_pointer_mode (scalar_int_mode mode)
- {
-   if (mode == HImode
-       || mode == PSImode
-       || mode == SImode
-       )
-     return 1;
-   return 0;
- }
- 
- /* How Scalar Function Values Are Returned */
- 
- /* Implements TARGET_LIBCALL_VALUE.  Most values are returned in $r0, or some
-    combination of registers starting there (r2r0 for longs, r3r1r2r0
-    for long long, r3r2r1r0 for doubles), except that that ABI
-    currently doesn't work because it ends up using all available
-    general registers and gcc often can't compile it.  So, instead, we
-    return anything bigger than 16 bits in "mem0" (effectively, a
-    memory location).  */
- 
- #undef TARGET_LIBCALL_VALUE
- #define TARGET_LIBCALL_VALUE m32c_libcall_value
- 
- static rtx
- m32c_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED)
- {
-   /* return reg or parallel */
- #if 0
-   /* FIXME: GCC has difficulty returning large values in registers,
-      because that ties up most of the general registers and gives the
-      register allocator little to work with.  Until we can resolve
-      this, large values are returned in memory.  */
-   if (mode == DFmode)
-     {
-       rtx rv;
- 
-       rv = gen_rtx_PARALLEL (mode, rtvec_alloc (4));
-       XVECEXP (rv, 0, 0) = gen_rtx_EXPR_LIST (VOIDmode,
- 					      gen_rtx_REG (HImode,
- 							   R0_REGNO),
- 					      GEN_INT (0));
-       XVECEXP (rv, 0, 1) = gen_rtx_EXPR_LIST (VOIDmode,
- 					      gen_rtx_REG (HImode,
- 							   R1_REGNO),
- 					      GEN_INT (2));
-       XVECEXP (rv, 0, 2) = gen_rtx_EXPR_LIST (VOIDmode,
- 					      gen_rtx_REG (HImode,
- 							   R2_REGNO),
- 					      GEN_INT (4));
-       XVECEXP (rv, 0, 3) = gen_rtx_EXPR_LIST (VOIDmode,
- 					      gen_rtx_REG (HImode,
- 							   R3_REGNO),
- 					      GEN_INT (6));
-       return rv;
-     }
- 
-   if (TARGET_A24 && GET_MODE_SIZE (mode) > 2)
-     {
-       rtx rv;
- 
-       rv = gen_rtx_PARALLEL (mode, rtvec_alloc (1));
-       XVECEXP (rv, 0, 0) = gen_rtx_EXPR_LIST (VOIDmode,
- 					      gen_rtx_REG (mode,
- 							   R0_REGNO),
- 					      GEN_INT (0));
-       return rv;
-     }
- #endif
- 
-   if (GET_MODE_SIZE (mode) > 2)
-     return gen_rtx_REG (mode, MEM0_REGNO);
-   return gen_rtx_REG (mode, R0_REGNO);
- }
- 
- /* Implements TARGET_FUNCTION_VALUE.  Functions and libcalls have the same
-    conventions.  */
- 
- #undef TARGET_FUNCTION_VALUE
- #define TARGET_FUNCTION_VALUE m32c_function_value
- 
- static rtx
- m32c_function_value (const_tree valtype,
- 		     const_tree fn_decl_or_type ATTRIBUTE_UNUSED,
- 		     bool outgoing ATTRIBUTE_UNUSED)
- {
-   /* return reg or parallel */
-   const machine_mode mode = TYPE_MODE (valtype);
-   return m32c_libcall_value (mode, NULL_RTX);
- }
- 
- /* Implements TARGET_FUNCTION_VALUE_REGNO_P.  */
- 
- #undef TARGET_FUNCTION_VALUE_REGNO_P
- #define TARGET_FUNCTION_VALUE_REGNO_P m32c_function_value_regno_p
- 
- static bool
- m32c_function_value_regno_p (const unsigned int regno)
- {
-   return (regno == R0_REGNO || regno == MEM0_REGNO);
- }
- 
- /* How Large Values Are Returned */
- 
- /* We return structures by pushing the address on the stack, even if
-    we use registers for the first few "real" arguments.  */
- #undef TARGET_STRUCT_VALUE_RTX
- #define TARGET_STRUCT_VALUE_RTX m32c_struct_value_rtx
- static rtx
- m32c_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED,
- 		       int incoming ATTRIBUTE_UNUSED)
- {
-   return 0;
- }
- 
- /* Function Entry and Exit */
- 
- /* Implements EPILOGUE_USES.  Interrupts restore all registers.  */
- int
- m32c_epilogue_uses (int regno ATTRIBUTE_UNUSED)
- {
-   if (cfun->machine->is_interrupt)
-     return 1;
-   return 0;
- }
- 
- /* Implementing the Varargs Macros */
- 
- #undef TARGET_STRICT_ARGUMENT_NAMING
- #define TARGET_STRICT_ARGUMENT_NAMING m32c_strict_argument_naming
- static bool
- m32c_strict_argument_naming (cumulative_args_t ca ATTRIBUTE_UNUSED)
- {
-   return 1;
- }
- 
- /* Trampolines for Nested Functions */
- 
- /*
-    m16c:
-    1 0000 75C43412              mov.w   #0x1234,a0
-    2 0004 FC000000              jmp.a   label
- 
-    m32c:
-    1 0000 BC563412              mov.l:s #0x123456,a0
-    2 0004 CC000000              jmp.a   label
- */
- 
- /* Implements TRAMPOLINE_SIZE.  */
- int
- m32c_trampoline_size (void)
- {
-   /* Allocate extra space so we can avoid the messy shifts when we
-      initialize the trampoline; we just write past the end of the
-      opcode.  */
-   return TARGET_A16 ? 8 : 10;
- }
- 
- /* Implements TRAMPOLINE_ALIGNMENT.  */
- int
- m32c_trampoline_alignment (void)
- {
-   return 2;
- }
- 
- /* Implements TARGET_TRAMPOLINE_INIT.  */
- 
- #undef TARGET_TRAMPOLINE_INIT
- #define TARGET_TRAMPOLINE_INIT m32c_trampoline_init
- static void
- m32c_trampoline_init (rtx m_tramp, tree fndecl, rtx chainval)
- {
-   rtx function = XEXP (DECL_RTL (fndecl), 0);
- 
- #define A0(m,i) adjust_address (m_tramp, m, i)
-   if (TARGET_A16)
-     {
-       /* Note: we subtract a "word" because the moves want signed
- 	 constants, not unsigned constants.  */
-       emit_move_insn (A0 (HImode, 0), GEN_INT (0xc475 - 0x10000));
-       emit_move_insn (A0 (HImode, 2), chainval);
-       emit_move_insn (A0 (QImode, 4), GEN_INT (0xfc - 0x100));
-       /* We use 16-bit addresses here, but store the zero to turn it
- 	 into a 24-bit offset.  */
-       emit_move_insn (A0 (HImode, 5), function);
-       emit_move_insn (A0 (QImode, 7), GEN_INT (0x00));
-     }
-   else
-     {
-       /* Note that the PSI moves actually write 4 bytes.  Make sure we
- 	 write stuff out in the right order, and leave room for the
- 	 extra byte at the end.  */
-       emit_move_insn (A0 (QImode, 0), GEN_INT (0xbc - 0x100));
-       emit_move_insn (A0 (PSImode, 1), chainval);
-       emit_move_insn (A0 (QImode, 4), GEN_INT (0xcc - 0x100));
-       emit_move_insn (A0 (PSImode, 5), function);
-     }
- #undef A0
- }
- 
- #undef TARGET_LRA_P
- #define TARGET_LRA_P hook_bool_void_false
- 
- /* Addressing Modes */
- 
- /* The r8c/m32c family supports a wide range of non-orthogonal
-    addressing modes, including the ability to double-indirect on *some*
-    of them.  Not all insns support all modes, either, but we rely on
-    predicates and constraints to deal with that.  */
- #undef TARGET_LEGITIMATE_ADDRESS_P
- #define TARGET_LEGITIMATE_ADDRESS_P m32c_legitimate_address_p
- bool
- m32c_legitimate_address_p (machine_mode mode, rtx x, bool strict, code_helper)
- {
-   int mode_adjust;
-   if (CONSTANT_P (x))
-     return 1;
- 
-   if (TARGET_A16 && GET_MODE (x) != HImode && GET_MODE (x) != SImode)
-     return 0;
-   if (TARGET_A24 && GET_MODE (x) != PSImode)
-     return 0;
- 
-   /* Wide references to memory will be split after reload, so we must
-      ensure that all parts of such splits remain legitimate
-      addresses.  */
-   mode_adjust = GET_MODE_SIZE (mode) - 1;
- 
-   /* allowing PLUS yields mem:HI(plus:SI(mem:SI(plus:SI in m32c_split_move */
-   if (GET_CODE (x) == PRE_DEC
-       || GET_CODE (x) == POST_INC || GET_CODE (x) == PRE_MODIFY)
-     {
-       return (GET_CODE (XEXP (x, 0)) == REG
- 	      && REGNO (XEXP (x, 0)) == SP_REGNO);
-     }
- 
- #if 0
-   /* This is the double indirection detection, but it currently
-      doesn't work as cleanly as this code implies, so until we've had
-      a chance to debug it, leave it disabled.  */
-   if (TARGET_A24 && GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) != PLUS)
-     {
- #if DEBUG_DOUBLE
-       fprintf (stderr, "double indirect\n");
- #endif
-       x = XEXP (x, 0);
-     }
- #endif
- 
-   encode_pattern (x);
-   if (RTX_IS ("r"))
-     {
-       /* Most indexable registers can be used without displacements,
- 	 although some of them will be emitted with an explicit zero
- 	 to please the assembler.  */
-       switch (REGNO (patternr[0]))
- 	{
- 	case A1_REGNO:
- 	case SB_REGNO:
- 	case FB_REGNO:
- 	case SP_REGNO:
- 	  if (TARGET_A16 && GET_MODE (x) == SImode)
- 	    return 0;
- 	  /* FALLTHRU */
- 	case A0_REGNO:
- 	  return 1;
- 
- 	default:
- 	  if (IS_PSEUDO (patternr[0], strict))
- 	    return 1;
- 	  return 0;
- 	}
-     }
- 
-   if (TARGET_A16 && GET_MODE (x) == SImode)
-     return 0;
- 
-   if (RTX_IS ("+ri"))
-     {
-       /* This is more interesting, because different base registers
- 	 allow for different displacements - both range and signedness
- 	 - and it differs from chip series to chip series too.  */
-       int rn = REGNO (patternr[1]);
-       HOST_WIDE_INT offs = INTVAL (patternr[2]);
-       switch (rn)
- 	{
- 	case A0_REGNO:
- 	case A1_REGNO:
- 	case SB_REGNO:
- 	  /* The syntax only allows positive offsets, but when the
- 	     offsets span the entire memory range, we can simulate
- 	     negative offsets by wrapping.  */
- 	  if (TARGET_A16)
- 	    return (offs >= -65536 && offs <= 65535 - mode_adjust);
- 	  if (rn == SB_REGNO)
- 	    return (offs >= 0 && offs <= 65535 - mode_adjust);
- 	  /* A0 or A1 */
- 	  return (offs >= -16777216 && offs <= 16777215);
- 
- 	case FB_REGNO:
- 	  if (TARGET_A16)
- 	    return (offs >= -128 && offs <= 127 - mode_adjust);
- 	  return (offs >= -65536 && offs <= 65535 - mode_adjust);
- 
- 	case SP_REGNO:
- 	  return (offs >= -128 && offs <= 127 - mode_adjust);
- 
- 	default:
- 	  if (IS_PSEUDO (patternr[1], strict))
- 	    return 1;
- 	  return 0;
- 	}
-     }
-   if (RTX_IS ("+rs") || RTX_IS ("+r+si"))
-     {
-       rtx reg = patternr[1];
- 
-       /* We don't know where the symbol is, so only allow base
- 	 registers which support displacements spanning the whole
- 	 address range.  */
-       switch (REGNO (reg))
- 	{
- 	case A0_REGNO:
- 	case A1_REGNO:
- 	  /* $sb needs a secondary reload, but since it's involved in
- 	     memory address reloads too, we don't deal with it very
- 	     well.  */
- 	  /*    case SB_REGNO: */
- 	  return 1;
- 	default:
- 	  if (GET_CODE (reg) == SUBREG)
- 	    return 0;
- 	  if (IS_PSEUDO (reg, strict))
- 	    return 1;
- 	  return 0;
- 	}
-     }
-   return 0;
- }
- 
- /* Implements REG_OK_FOR_BASE_P.  */
- int
- m32c_reg_ok_for_base_p (rtx x, int strict)
- {
-   if (GET_CODE (x) != REG)
-     return 0;
-   switch (REGNO (x))
-     {
-     case A0_REGNO:
-     case A1_REGNO:
-     case SB_REGNO:
-     case FB_REGNO:
-     case SP_REGNO:
-       return 1;
-     default:
-       if (IS_PSEUDO (x, strict))
- 	return 1;
-       return 0;
-     }
- }
- 
- /* We have three choices for choosing fb->aN offsets.  If we choose -128,
-    we need one MOVA -128[fb],aN opcode and 16-bit aN displacements,
-    like this:
-        EB 4B FF    mova    -128[$fb],$a0
-        D8 0C FF FF mov.w:Q #0,-1[$a0]
- 
-    Alternately, we subtract the frame size, and hopefully use 8-bit aN
-    displacements:
-        7B F4       stc $fb,$a0
-        77 54 00 01 sub #256,$a0
-        D8 08 01    mov.w:Q #0,1[$a0]
- 
-    If we don't offset (i.e. offset by zero), we end up with:
-        7B F4       stc $fb,$a0
-        D8 0C 00 FF mov.w:Q #0,-256[$a0]
- 
-    We have to subtract *something* so that we have a PLUS rtx to mark
-    that we've done this reload.  The -128 offset will never result in
-    an 8-bit aN offset, and the payoff for the second case is five
-    loads *if* those loads are within 256 bytes of the other end of the
-    frame, so the third case seems best.  Note that we subtract the
-    zero, but detect that in the addhi3 pattern.  */
- 
- #define BIG_FB_ADJ 0
- 
- /* Implements LEGITIMIZE_ADDRESS.  The only address we really have to
-    worry about is frame base offsets, as $fb has a limited
-    displacement range.  We deal with this by attempting to reload $fb
-    itself into an address register; that seems to result in the best
-    code.  */
- #undef TARGET_LEGITIMIZE_ADDRESS
- #define TARGET_LEGITIMIZE_ADDRESS m32c_legitimize_address
- static rtx
- m32c_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
- 			 machine_mode mode)
- {
- #if DEBUG0
-   fprintf (stderr, "m32c_legitimize_address for mode %s\n", mode_name[mode]);
-   debug_rtx (x);
-   fprintf (stderr, "\n");
- #endif
- 
-   if (GET_CODE (x) == PLUS
-       && GET_CODE (XEXP (x, 0)) == REG
-       && REGNO (XEXP (x, 0)) == FB_REGNO
-       && GET_CODE (XEXP (x, 1)) == CONST_INT
-       && (INTVAL (XEXP (x, 1)) < -128
- 	  || INTVAL (XEXP (x, 1)) > (128 - GET_MODE_SIZE (mode))))
-     {
-       /* reload FB to A_REGS */
-       rtx temp = gen_reg_rtx (Pmode);
-       x = copy_rtx (x);
-       emit_insn (gen_rtx_SET (temp, XEXP (x, 0)));
-       XEXP (x, 0) = temp;
-     }
- 
-   return x;
- }
- 
- /* Implements LEGITIMIZE_RELOAD_ADDRESS.  See comment above.  */
- int
- m32c_legitimize_reload_address (rtx * x,
- 				machine_mode mode,
- 				int opnum,
- 				int type, int ind_levels ATTRIBUTE_UNUSED)
- {
- #if DEBUG0
-   fprintf (stderr, "\nm32c_legitimize_reload_address for mode %s\n",
- 	   mode_name[mode]);
-   debug_rtx (*x);
- #endif
- 
-   /* At one point, this function tried to get $fb copied to an address
-      register, which in theory would maximize sharing, but gcc was
-      *also* still trying to reload the whole address, and we'd run out
-      of address registers.  So we let gcc do the naive (but safe)
-      reload instead, when the above function doesn't handle it for
-      us.
- 
-      The code below is a second attempt at the above.  */
- 
-   if (GET_CODE (*x) == PLUS
-       && GET_CODE (XEXP (*x, 0)) == REG
-       && REGNO (XEXP (*x, 0)) == FB_REGNO
-       && GET_CODE (XEXP (*x, 1)) == CONST_INT
-       && (INTVAL (XEXP (*x, 1)) < -128
- 	  || INTVAL (XEXP (*x, 1)) > (128 - GET_MODE_SIZE (mode))))
-     {
-       rtx sum;
-       int offset = INTVAL (XEXP (*x, 1));
-       int adjustment = -BIG_FB_ADJ;
- 
-       sum = gen_rtx_PLUS (Pmode, XEXP (*x, 0),
- 			  GEN_INT (adjustment));
-       *x = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - adjustment));
-       if (type == RELOAD_OTHER)
- 	type = RELOAD_FOR_OTHER_ADDRESS;
-       push_reload (sum, NULL_RTX, &XEXP (*x, 0), NULL,
- 		   A_REGS, Pmode, VOIDmode, 0, 0, opnum,
- 		   (enum reload_type) type);
-       return 1;
-     }
- 
-   if (GET_CODE (*x) == PLUS
-       && GET_CODE (XEXP (*x, 0)) == PLUS
-       && GET_CODE (XEXP (XEXP (*x, 0), 0)) == REG
-       && REGNO (XEXP (XEXP (*x, 0), 0)) == FB_REGNO
-       && GET_CODE (XEXP (XEXP (*x, 0), 1)) == CONST_INT
-       && GET_CODE (XEXP (*x, 1)) == CONST_INT
-       )
-     {
-       if (type == RELOAD_OTHER)
- 	type = RELOAD_FOR_OTHER_ADDRESS;
-       push_reload (XEXP (*x, 0), NULL_RTX, &XEXP (*x, 0), NULL,
- 		   A_REGS, Pmode, VOIDmode, 0, 0, opnum,
- 		   (enum reload_type) type);
-       return 1;
-     }
- 
-   if (TARGET_A24 && GET_MODE (*x) == PSImode)
-     {
-       push_reload (*x, NULL_RTX, x, NULL,
- 		   A_REGS, PSImode, VOIDmode, 0, 0, opnum,
- 		   (enum reload_type) type);
-       return 1;
-     }
- 
-   return 0;
- }
- 
- /* Return the appropriate mode for a named address pointer.  */
- #undef TARGET_ADDR_SPACE_POINTER_MODE
- #define TARGET_ADDR_SPACE_POINTER_MODE m32c_addr_space_pointer_mode
- static scalar_int_mode
- m32c_addr_space_pointer_mode (addr_space_t addrspace)
- {
-   switch (addrspace)
-     {
-     case ADDR_SPACE_GENERIC:
-       return TARGET_A24 ? PSImode : HImode;
-     case ADDR_SPACE_FAR:
-       return SImode;
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* Return the appropriate mode for a named address address.  */
- #undef TARGET_ADDR_SPACE_ADDRESS_MODE
- #define TARGET_ADDR_SPACE_ADDRESS_MODE m32c_addr_space_address_mode
- static scalar_int_mode
- m32c_addr_space_address_mode (addr_space_t addrspace)
- {
-   switch (addrspace)
-     {
-     case ADDR_SPACE_GENERIC:
-       return TARGET_A24 ? PSImode : HImode;
-     case ADDR_SPACE_FAR:
-       return SImode;
-     default:
-       gcc_unreachable ();
-     }
- }
- 
- /* Like m32c_legitimate_address_p, except with named addresses.  */
- #undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
- #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P \
-   m32c_addr_space_legitimate_address_p
- static bool
- m32c_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict,
- 				      addr_space_t as, code_helper ch)
- {
-   if (as == ADDR_SPACE_FAR)
-     {
-       if (TARGET_A24)
- 	return 0;
-       encode_pattern (x);
-       if (RTX_IS ("r"))
- 	{
- 	  if (GET_MODE (x) != SImode)
- 	    return 0;
- 	  switch (REGNO (patternr[0]))
- 	    {
- 	    case A0_REGNO:
- 	      return 1;
- 
- 	    default:
- 	      if (IS_PSEUDO (patternr[0], strict))
- 		return 1;
- 	      return 0;
- 	    }
- 	}
-       if (RTX_IS ("+^Sri"))
- 	{
- 	  int rn = REGNO (patternr[3]);
- 	  HOST_WIDE_INT offs = INTVAL (patternr[4]);
- 	  if (GET_MODE (patternr[3]) != HImode)
- 	    return 0;
- 	  switch (rn)
- 	    {
- 	    case A0_REGNO:
- 	      return (offs >= 0 && offs <= 0xfffff);
- 
- 	    default:
- 	      if (IS_PSEUDO (patternr[3], strict))
- 		return 1;
- 	      return 0;
- 	    }
- 	}
-       if (RTX_IS ("+^Srs"))
- 	{
- 	  int rn = REGNO (patternr[3]);
- 	  if (GET_MODE (patternr[3]) != HImode)
- 	    return 0;
- 	  switch (rn)
- 	    {
- 	    case A0_REGNO:
- 	      return 1;
- 
- 	    default:
- 	      if (IS_PSEUDO (patternr[3], strict))
- 		return 1;
- 	      return 0;
- 	    }
- 	}
-       if (RTX_IS ("+^S+ris"))
- 	{
- 	  int rn = REGNO (patternr[4]);
- 	  if (GET_MODE (patternr[4]) != HImode)
- 	    return 0;
- 	  switch (rn)
- 	    {
- 	    case A0_REGNO:
- 	      return 1;
- 
- 	    default:
- 	      if (IS_PSEUDO (patternr[4], strict))
- 		return 1;
- 	      return 0;
- 	    }
- 	}
-       if (RTX_IS ("s"))
- 	{
- 	  return 1;
- 	}
-       return 0;
-     }
- 
-   else if (as != ADDR_SPACE_GENERIC)
-     gcc_unreachable ();
- 
-   return m32c_legitimate_address_p (mode, x, strict, ch);
- }
- 
- /* Like m32c_legitimate_address, except with named address support.  */
- #undef TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS
- #define TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS m32c_addr_space_legitimize_address
- static rtx
- m32c_addr_space_legitimize_address (rtx x, rtx oldx, machine_mode mode,
- 				    addr_space_t as)
- {
-   if (as != ADDR_SPACE_GENERIC)
-     {
- #if DEBUG0
-       fprintf (stderr, "\033[36mm32c_addr_space_legitimize_address for mode %s\033[0m\n", mode_name[mode]);
-       debug_rtx (x);
-       fprintf (stderr, "\n");
- #endif
- 
-       if (GET_CODE (x) != REG)
- 	{
- 	  x = force_reg (SImode, x);
- 	}
-       return x;
-     }
- 
-   return m32c_legitimize_address (x, oldx, mode);
- }
- 
- /* Determine if one named address space is a subset of another.  */
- #undef TARGET_ADDR_SPACE_SUBSET_P
- #define TARGET_ADDR_SPACE_SUBSET_P m32c_addr_space_subset_p
- static bool
- m32c_addr_space_subset_p (addr_space_t subset, addr_space_t superset)
- {
-   gcc_assert (subset == ADDR_SPACE_GENERIC || subset == ADDR_SPACE_FAR);
-   gcc_assert (superset == ADDR_SPACE_GENERIC || superset == ADDR_SPACE_FAR);
- 
-   if (subset == superset)
-     return true;
- 
-   else
-     return (subset == ADDR_SPACE_GENERIC && superset == ADDR_SPACE_FAR);
- }
- 
- #undef TARGET_ADDR_SPACE_CONVERT
- #define TARGET_ADDR_SPACE_CONVERT m32c_addr_space_convert
- /* Convert from one address space to another.  */
- static rtx
- m32c_addr_space_convert (rtx op, tree from_type, tree to_type)
- {
-   addr_space_t from_as = TYPE_ADDR_SPACE (TREE_TYPE (from_type));
-   addr_space_t to_as = TYPE_ADDR_SPACE (TREE_TYPE (to_type));
-   rtx result;
- 
-   gcc_assert (from_as == ADDR_SPACE_GENERIC || from_as == ADDR_SPACE_FAR);
-   gcc_assert (to_as == ADDR_SPACE_GENERIC || to_as == ADDR_SPACE_FAR);
- 
-   if (to_as == ADDR_SPACE_GENERIC && from_as == ADDR_SPACE_FAR)
-     {
-       /* This is unpredictable, as we're truncating off usable address
- 	 bits.  */
- 
-       result = gen_reg_rtx (HImode);
-       emit_move_insn (result, simplify_subreg (HImode, op, SImode, 0));
-       return result;
-     }
-   else if (to_as == ADDR_SPACE_FAR && from_as == ADDR_SPACE_GENERIC)
-     {
-       /* This always works.  */
-       result = gen_reg_rtx (SImode);
-       emit_insn (gen_zero_extendhisi2 (result, op));
-       return result;
-     }
-   else
-     gcc_unreachable ();
- }
- 
- /* Condition Code Status */
- 
- #undef TARGET_FIXED_CONDITION_CODE_REGS
- #define TARGET_FIXED_CONDITION_CODE_REGS m32c_fixed_condition_code_regs
- static bool
- m32c_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
- {
-   *p1 = FLG_REGNO;
-   *p2 = INVALID_REGNUM;
-   return true;
- }
- 
- /* Describing Relative Costs of Operations */
- 
- /* Implements TARGET_REGISTER_MOVE_COST.  We make impossible moves
-    prohibitively expensive, like trying to put QIs in r2/r3 (there are
-    no opcodes to do that).  We also discourage use of mem* registers
-    since they're really memory.  */
- 
- #undef TARGET_REGISTER_MOVE_COST
- #define TARGET_REGISTER_MOVE_COST m32c_register_move_cost
- 
- static int
- m32c_register_move_cost (machine_mode mode, reg_class_t from,
- 			 reg_class_t to)
- {
-   int cost = COSTS_N_INSNS (3);
-   HARD_REG_SET cc;
- 
- /* FIXME: pick real values, but not 2 for now.  */
-   cc = reg_class_contents[from] | reg_class_contents[(int) to];
- 
-   if (mode == QImode
-       && hard_reg_set_intersect_p (cc, reg_class_contents[R23_REGS]))
-     {
-       if (hard_reg_set_subset_p (cc, reg_class_contents[R23_REGS]))
- 	cost = COSTS_N_INSNS (1000);
-       else
- 	cost = COSTS_N_INSNS (80);
-     }
- 
-   if (!class_can_hold_mode (from, mode) || !class_can_hold_mode (to, mode))
-     cost = COSTS_N_INSNS (1000);
- 
-   if (reg_classes_intersect_p (from, CR_REGS))
-     cost += COSTS_N_INSNS (5);
- 
-   if (reg_classes_intersect_p (to, CR_REGS))
-     cost += COSTS_N_INSNS (5);
- 
-   if (from == MEM_REGS || to == MEM_REGS)
-     cost += COSTS_N_INSNS (50);
-   else if (reg_classes_intersect_p (from, MEM_REGS)
- 	   || reg_classes_intersect_p (to, MEM_REGS))
-     cost += COSTS_N_INSNS (10);
- 
- #if DEBUG0
-   fprintf (stderr, "register_move_cost %s from %s to %s = %d\n",
- 	   mode_name[mode], class_names[(int) from], class_names[(int) to],
- 	   cost);
- #endif
-   return cost;
- }
- 
- /*  Implements TARGET_MEMORY_MOVE_COST.  */
- 
- #undef TARGET_MEMORY_MOVE_COST
- #define TARGET_MEMORY_MOVE_COST m32c_memory_move_cost
- 
- static int
- m32c_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
- 		       reg_class_t rclass ATTRIBUTE_UNUSED,
- 		       bool in ATTRIBUTE_UNUSED)
- {
-   /* FIXME: pick real values.  */
-   return COSTS_N_INSNS (10);
- }
- 
- /* Here we try to describe when we use multiple opcodes for one RTX so
-    that gcc knows when to use them.  */
- #undef TARGET_RTX_COSTS
- #define TARGET_RTX_COSTS m32c_rtx_costs
- static bool
- m32c_rtx_costs (rtx x, machine_mode mode, int outer_code,
- 		int opno ATTRIBUTE_UNUSED,
- 		int *total, bool speed ATTRIBUTE_UNUSED)
- {
-   int code = GET_CODE (x);
-   switch (code)
-     {
-     case REG:
-       if (REGNO (x) >= MEM0_REGNO && REGNO (x) <= MEM7_REGNO)
- 	*total += COSTS_N_INSNS (500);
-       else
- 	*total += COSTS_N_INSNS (1);
-       return true;
- 
-     case ASHIFT:
-     case LSHIFTRT:
-     case ASHIFTRT:
-       if (GET_CODE (XEXP (x, 1)) != CONST_INT)
- 	{
- 	  /* mov.b r1l, r1h */
- 	  *total +=  COSTS_N_INSNS (1);
- 	  return true;
- 	}
-       if (INTVAL (XEXP (x, 1)) > 8
- 	  || INTVAL (XEXP (x, 1)) < -8)
- 	{
- 	  /* mov.b #N, r1l */
- 	  /* mov.b r1l, r1h */
- 	  *total +=  COSTS_N_INSNS (2);
- 	  return true;
- 	}
-       return true;
- 
-     case LE:
-     case LEU:
-     case LT:
-     case LTU:
-     case GT:
-     case GTU:
-     case GE:
-     case GEU:
-     case NE:
-     case EQ:
-       if (outer_code == SET)
- 	{
- 	  *total += COSTS_N_INSNS (2);
- 	  return true;
- 	}
-       break;
- 
-     case ZERO_EXTRACT:
-       {
- 	rtx dest = XEXP (x, 0);
- 	rtx addr = XEXP (dest, 0);
- 	switch (GET_CODE (addr))
- 	  {
- 	  case CONST_INT:
- 	    *total += COSTS_N_INSNS (1);
- 	    break;
- 	  case SYMBOL_REF:
- 	    *total += COSTS_N_INSNS (3);
- 	    break;
- 	  default:
- 	    *total += COSTS_N_INSNS (2);
- 	    break;
- 	  }
- 	return true;
-       }
-       break;
- 
-     default:
-       /* Reasonable default.  */
-       if (TARGET_A16 && mode == SImode)
- 	*total += COSTS_N_INSNS (2);
-       break;
-     }
-   return false;
- }
- 
- #undef TARGET_ADDRESS_COST
- #define TARGET_ADDRESS_COST m32c_address_cost
- static int
- m32c_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED,
- 		   addr_space_t as ATTRIBUTE_UNUSED,
- 		   bool speed ATTRIBUTE_UNUSED)
- {
-   int i;
-   /*  fprintf(stderr, "\naddress_cost\n");
-       debug_rtx(addr);*/
-   switch (GET_CODE (addr))
-     {
-     case CONST_INT:
-       i = INTVAL (addr);
-       if (i == 0)
- 	return COSTS_N_INSNS(1);
-       if (i > 0 && i <= 255)
- 	return COSTS_N_INSNS(2);
-       if (i > 0 && i <= 65535)
- 	return COSTS_N_INSNS(3);
-       return COSTS_N_INSNS(4);
-     case SYMBOL_REF:
-       return COSTS_N_INSNS(4);
-     case REG:
-       return COSTS_N_INSNS(1);
-     case PLUS:
-       if (GET_CODE (XEXP (addr, 1)) == CONST_INT)
- 	{
- 	  i = INTVAL (XEXP (addr, 1));
- 	  if (i == 0)
- 	    return COSTS_N_INSNS(1);
- 	  if (i > 0 && i <= 255)
- 	    return COSTS_N_INSNS(2);
- 	  if (i > 0 && i <= 65535)
- 	    return COSTS_N_INSNS(3);
- 	}
-       return COSTS_N_INSNS(4);
-     default:
-       return 0;
-     }
- }
- 
- /* Defining the Output Assembler Language */
- 
- /* Output of Data */
- 
- /* We may have 24 bit sizes, which is the native address size.
-    Currently unused, but provided for completeness.  */
- #undef TARGET_ASM_INTEGER
- #define TARGET_ASM_INTEGER m32c_asm_integer
- static bool
- m32c_asm_integer (rtx x, unsigned int size, int aligned_p)
- {
-   switch (size)
-     {
-     case 3:
-       fprintf (asm_out_file, "\t.3byte\t");
-       output_addr_const (asm_out_file, x);
-       fputc ('\n', asm_out_file);
-       return true;
-     case 4:
-       if (GET_CODE (x) == SYMBOL_REF)
- 	{
- 	  fprintf (asm_out_file, "\t.long\t");
- 	  output_addr_const (asm_out_file, x);
- 	  fputc ('\n', asm_out_file);
- 	  return true;
- 	}
-       break;
-     }
-   return default_assemble_integer (x, size, aligned_p);
- }
- 
- /* Output of Assembler Instructions */
- 
- /* We use a lookup table because the addressing modes are non-orthogonal.  */
- 
- static struct
- {
-   char code;
-   char const *pattern;
-   char const *format;
- }
- const conversions[] = {
-   { 0, "r", "0" },
- 
-   { 0, "mr", "z[1]" },
-   { 0, "m+ri", "3[2]" },
-   { 0, "m+rs", "3[2]" },
-   { 0, "m+^Zrs", "5[4]" },
-   { 0, "m+^Zri", "5[4]" },
-   { 0, "m+^Z+ris", "7+6[5]" },
-   { 0, "m+^Srs", "5[4]" },
-   { 0, "m+^Sri", "5[4]" },
-   { 0, "m+^S+ris", "7+6[5]" },
-   { 0, "m+r+si", "4+5[2]" },
-   { 0, "ms", "1" },
-   { 0, "mi", "1" },
-   { 0, "m+si", "2+3" },
- 
-   { 0, "mmr", "[z[2]]" },
-   { 0, "mm+ri", "[4[3]]" },
-   { 0, "mm+rs", "[4[3]]" },
-   { 0, "mm+r+si", "[5+6[3]]" },
-   { 0, "mms", "[[2]]" },
-   { 0, "mmi", "[[2]]" },
-   { 0, "mm+si", "[4[3]]" },
- 
-   { 0, "i", "#0" },
-   { 0, "s", "#0" },
-   { 0, "+si", "#1+2" },
-   { 0, "l", "#0" },
- 
-   { 'l', "l", "0" },
-   { 'd', "i", "0" },
-   { 'd', "s", "0" },
-   { 'd', "+si", "1+2" },
-   { 'D', "i", "0" },
-   { 'D', "s", "0" },
-   { 'D', "+si", "1+2" },
-   { 'x', "i", "#0" },
-   { 'X', "i", "#0" },
-   { 'm', "i", "#0" },
-   { 'b', "i", "#0" },
-   { 'B', "i", "0" },
-   { 'p', "i", "0" },
- 
-   { 0, 0, 0 }
- };
- 
- /* This is in order according to the bitfield that pushm/popm use.  */
- static char const *pushm_regs[] = {
-   "fb", "sb", "a1", "a0", "r3", "r2", "r1", "r0"
- };
- 
- /* Implements TARGET_PRINT_OPERAND.  */
- 
- #undef TARGET_PRINT_OPERAND
- #define TARGET_PRINT_OPERAND m32c_print_operand
- 
- static void
- m32c_print_operand (FILE * file, rtx x, int code)
- {
-   int i, j, b;
-   const char *comma;
-   HOST_WIDE_INT ival;
-   int unsigned_const = 0;
-   int force_sign;
- 
-   /* Multiplies; constants are converted to sign-extended format but
-    we need unsigned, so 'u' and 'U' tell us what size unsigned we
-    need.  */
-   if (code == 'u')
-     {
-       unsigned_const = 2;
-       code = 0;
-     }
-   if (code == 'U')
-     {
-       unsigned_const = 1;
-       code = 0;
-     }
-   /* This one is only for debugging; you can put it in a pattern to
-      force this error.  */
-   if (code == '!')
-     {
-       fprintf (stderr, "dj: unreviewed pattern:");
-       if (current_output_insn)
- 	debug_rtx (current_output_insn);
-       gcc_unreachable ();
-     }
-   /* PSImode operations are either .w or .l depending on the target.  */
-   if (code == '&')
-     {
-       if (TARGET_A16)
- 	fprintf (file, "w");
-       else
- 	fprintf (file, "l");
-       return;
-     }
-   /* Inverted conditionals.  */
-   if (code == 'C')
-     {
-       switch (GET_CODE (x))
- 	{
- 	case LE:
- 	  fputs ("gt", file);
- 	  break;
- 	case LEU:
- 	  fputs ("gtu", file);
- 	  break;
- 	case LT:
- 	  fputs ("ge", file);
- 	  break;
- 	case LTU:
- 	  fputs ("geu", file);
- 	  break;
- 	case GT:
- 	  fputs ("le", file);
- 	  break;
- 	case GTU:
- 	  fputs ("leu", file);
- 	  break;
- 	case GE:
- 	  fputs ("lt", file);
- 	  break;
- 	case GEU:
- 	  fputs ("ltu", file);
- 	  break;
- 	case NE:
- 	  fputs ("eq", file);
- 	  break;
- 	case EQ:
- 	  fputs ("ne", file);
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       return;
-     }
-   /* Regular conditionals.  */
-   if (code == 'c')
-     {
-       switch (GET_CODE (x))
- 	{
- 	case LE:
- 	  fputs ("le", file);
- 	  break;
- 	case LEU:
- 	  fputs ("leu", file);
- 	  break;
- 	case LT:
- 	  fputs ("lt", file);
- 	  break;
- 	case LTU:
- 	  fputs ("ltu", file);
- 	  break;
- 	case GT:
- 	  fputs ("gt", file);
- 	  break;
- 	case GTU:
- 	  fputs ("gtu", file);
- 	  break;
- 	case GE:
- 	  fputs ("ge", file);
- 	  break;
- 	case GEU:
- 	  fputs ("geu", file);
- 	  break;
- 	case NE:
- 	  fputs ("ne", file);
- 	  break;
- 	case EQ:
- 	  fputs ("eq", file);
- 	  break;
- 	default:
- 	  gcc_unreachable ();
- 	}
-       return;
-     }
-   /* Used in negsi2 to do HImode ops on the two parts of an SImode
-      operand.  */
-   if (code == 'h' && GET_MODE (x) == SImode)
-     {
-       x = m32c_subreg (HImode, x, SImode, 0);
-       code = 0;
-     }
-   if (code == 'H' && GET_MODE (x) == SImode)
-     {
-       x = m32c_subreg (HImode, x, SImode, 2);
-       code = 0;
-     }
-   if (code == 'h' && GET_MODE (x) == HImode)
-     {
-       x = m32c_subreg (QImode, x, HImode, 0);
-       code = 0;
-     }
-   if (code == 'H' && GET_MODE (x) == HImode)
-     {
-       /* We can't actually represent this as an rtx.  Do it here.  */
-       if (GET_CODE (x) == REG)
- 	{
- 	  switch (REGNO (x))
- 	    {
- 	    case R0_REGNO:
- 	      fputs ("r0h", file);
- 	      return;
- 	    case R1_REGNO:
- 	      fputs ("r1h", file);
- 	      return;
- 	    default:
- 	      gcc_unreachable();
- 	    }
- 	}
-       /* This should be a MEM.  */
-       x = m32c_subreg (QImode, x, HImode, 1);
-       code = 0;
-     }
-   /* This is for BMcond, which always wants word register names.  */
-   if (code == 'h' && GET_MODE (x) == QImode)
-     {
-       if (GET_CODE (x) == REG)
- 	x = gen_rtx_REG (HImode, REGNO (x));
-       code = 0;
-     }
-   /* 'x' and 'X' need to be ignored for non-immediates.  */
-   if ((code == 'x' || code == 'X') && GET_CODE (x) != CONST_INT)
-     code = 0;
- 
-   encode_pattern (x);
-   force_sign = 0;
-   for (i = 0; conversions[i].pattern; i++)
-     if (conversions[i].code == code
- 	&& streq (conversions[i].pattern, pattern))
-       {
- 	for (j = 0; conversions[i].format[j]; j++)
- 	  /* backslash quotes the next character in the output pattern.  */
- 	  if (conversions[i].format[j] == '\\')
- 	    {
- 	      fputc (conversions[i].format[j + 1], file);
- 	      j++;
- 	    }
- 	  /* Digits in the output pattern indicate that the
- 	     corresponding RTX is to be output at that point.  */
- 	  else if (ISDIGIT (conversions[i].format[j]))
- 	    {
- 	      rtx r = patternr[conversions[i].format[j] - '0'];
- 	      switch (GET_CODE (r))
- 		{
- 		case REG:
- 		  fprintf (file, "%s",
- 			   reg_name_with_mode (REGNO (r), GET_MODE (r)));
- 		  break;
- 		case CONST_INT:
- 		  switch (code)
- 		    {
- 		    case 'b':
- 		    case 'B':
- 		      {
- 			int v = INTVAL (r);
- 			int i = (int) exact_log2 (v);
- 			if (i == -1)
- 			  i = (int) exact_log2 ((v ^ 0xffff) & 0xffff);
- 			if (i == -1)
- 			  i = (int) exact_log2 ((v ^ 0xff) & 0xff);
- 			/* Bit position.  */
- 			fprintf (file, "%d", i);
- 		      }
- 		      break;
- 		    case 'x':
- 		      /* Unsigned byte.  */
- 		      fprintf (file, HOST_WIDE_INT_PRINT_HEX,
- 			       INTVAL (r) & 0xff);
- 		      break;
- 		    case 'X':
- 		      /* Unsigned word.  */
- 		      fprintf (file, HOST_WIDE_INT_PRINT_HEX,
- 			       INTVAL (r) & 0xffff);
- 		      break;
- 		    case 'p':
- 		      /* pushm and popm encode a register set into a single byte.  */
- 		      comma = "";
- 		      for (b = 7; b >= 0; b--)
- 			if (INTVAL (r) & (1 << b))
- 			  {
- 			    fprintf (file, "%s%s", comma, pushm_regs[b]);
- 			    comma = ",";
- 			  }
- 		      break;
- 		    case 'm':
- 		      /* "Minus".  Output -X  */
- 		      ival = (-INTVAL (r) & 0xffff);
- 		      if (ival & 0x8000)
- 			ival = ival - 0x10000;
- 		      fprintf (file, HOST_WIDE_INT_PRINT_DEC, ival);
- 		      break;
- 		    default:
- 		      ival = INTVAL (r);
- 		      if (conversions[i].format[j + 1] == '[' && ival < 0)
- 			{
- 			  /* We can simulate negative displacements by
- 			     taking advantage of address space
- 			     wrapping when the offset can span the
- 			     entire address range.  */
- 			  rtx base =
- 			    patternr[conversions[i].format[j + 2] - '0'];
- 			  if (GET_CODE (base) == REG)
- 			    switch (REGNO (base))
- 			      {
- 			      case A0_REGNO:
- 			      case A1_REGNO:
- 				if (TARGET_A24)
- 				  ival = 0x1000000 + ival;
- 				else
- 				  ival = 0x10000 + ival;
- 				break;
- 			      case SB_REGNO:
- 				if (TARGET_A16)
- 				  ival = 0x10000 + ival;
- 				break;
- 			      }
- 			}
- 		      else if (code == 'd' && ival < 0 && j == 0)
- 			/* The "mova" opcode is used to do addition by
- 			   computing displacements, but again, we need
- 			   displacements to be unsigned *if* they're
- 			   the only component of the displacement
- 			   (i.e. no "symbol-4" type displacement).  */
- 			ival = (TARGET_A24 ? 0x1000000 : 0x10000) + ival;
- 
- 		      if (conversions[i].format[j] == '0')
- 			{
- 			  /* More conversions to unsigned.  */
- 			  if (unsigned_const == 2)
- 			    ival &= 0xffff;
- 			  if (unsigned_const == 1)
- 			    ival &= 0xff;
- 			}
- 		      if (streq (conversions[i].pattern, "mi")
- 			  || streq (conversions[i].pattern, "mmi"))
- 			{
- 			  /* Integers used as addresses are unsigned.  */
- 			  ival &= (TARGET_A24 ? 0xffffff : 0xffff);
- 			}
- 		      if (force_sign && ival >= 0)
- 			fputc ('+', file);
- 		      fprintf (file, HOST_WIDE_INT_PRINT_DEC, ival);
- 		      break;
- 		    }
- 		  break;
- 		case CONST_DOUBLE:
- 		  /* We don't have const_double constants.  If it
- 		     happens, make it obvious.  */
- 		  fprintf (file, "[const_double 0x%lx]",
- 			   (unsigned long) CONST_DOUBLE_HIGH (r));
- 		  break;
- 		case SYMBOL_REF:
- 		  assemble_name (file, XSTR (r, 0));
- 		  break;
- 		case LABEL_REF:
- 		  output_asm_label (r);
- 		  break;
- 		default:
- 		  fprintf (stderr, "don't know how to print this operand:");
- 		  debug_rtx (r);
- 		  gcc_unreachable ();
- 		}
- 	    }
- 	  else
- 	    {
- 	      if (conversions[i].format[j] == 'z')
- 		{
- 		  /* Some addressing modes *must* have a displacement,
- 		     so insert a zero here if needed.  */
- 		  int k;
- 		  for (k = j + 1; conversions[i].format[k]; k++)
- 		    if (ISDIGIT (conversions[i].format[k]))
- 		      {
- 			rtx reg = patternr[conversions[i].format[k] - '0'];
- 			if (GET_CODE (reg) == REG
- 			    && (REGNO (reg) == SB_REGNO
- 				|| REGNO (reg) == FB_REGNO
- 				|| REGNO (reg) == SP_REGNO))
- 			  fputc ('0', file);
- 		      }
- 		  continue;
- 		}
- 	      /* Signed displacements off symbols need to have signs
- 		 blended cleanly.  */
- 	      if (conversions[i].format[j] == '+'
- 		  && (!code || code == 'D' || code == 'd')
- 		  && ISDIGIT (conversions[i].format[j + 1])
- 		  && (GET_CODE (patternr[conversions[i].format[j + 1] - '0'])
- 		      == CONST_INT))
- 		{
- 		  force_sign = 1;
- 		  continue;
- 		}
- 	      fputc (conversions[i].format[j], file);
- 	    }
- 	break;
-       }
-   if (!conversions[i].pattern)
-     {
-       fprintf (stderr, "unconvertible operand %c `%s'", code ? code : '-',
- 	       pattern);
-       debug_rtx (x);
-       fprintf (file, "[%c.%s]", code ? code : '-', pattern);
-     }
- 
-   return;
- }
- 
- /* Implements TARGET_PRINT_OPERAND_PUNCT_VALID_P.
- 
-    See m32c_print_operand above for descriptions of what these do.  */
- 
- #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P
- #define TARGET_PRINT_OPERAND_PUNCT_VALID_P m32c_print_operand_punct_valid_p
- 
- static bool
- m32c_print_operand_punct_valid_p (unsigned char c)
- {
-   if (c == '&' || c == '!')
-     return true;
- 
-   return false;
- }
- 
- /* Implements TARGET_PRINT_OPERAND_ADDRESS.  Nothing unusual here.  */
- 
- #undef TARGET_PRINT_OPERAND_ADDRESS
- #define TARGET_PRINT_OPERAND_ADDRESS m32c_print_operand_address
- 
- static void
- m32c_print_operand_address (FILE * stream, machine_mode /*mode*/, rtx address)
- {
-   if (GET_CODE (address) == MEM)
-     address = XEXP (address, 0);
-   else
-     /* cf: gcc.dg/asm-4.c.  */
-     gcc_assert (GET_CODE (address) == REG);
- 
-   m32c_print_operand (stream, address, 0);
- }
- 
- /* Implements ASM_OUTPUT_REG_PUSH.  Control registers are pushed
-    differently than general registers.  */
- void
- m32c_output_reg_push (FILE * s, int regno)
- {
-   if (regno == FLG_REGNO)
-     fprintf (s, "\tpushc\tflg\n");
-   else
-     fprintf (s, "\tpush.%c\t%s\n",
- 	     " bwll"[reg_push_size (regno)], reg_names[regno]);
- }
- 
- /* Likewise for ASM_OUTPUT_REG_POP.  */
- void
- m32c_output_reg_pop (FILE * s, int regno)
- {
-   if (regno == FLG_REGNO)
-     fprintf (s, "\tpopc\tflg\n");
-   else
-     fprintf (s, "\tpop.%c\t%s\n",
- 	     " bwll"[reg_push_size (regno)], reg_names[regno]);
- }
- 
- /* Defining target-specific uses of `__attribute__' */
- 
- /* Used to simplify the logic below.  Find the attributes wherever
-    they may be.  */
- #define M32C_ATTRIBUTES(decl) \
-   (TYPE_P (decl)) ? TYPE_ATTRIBUTES (decl) \
-                 : DECL_ATTRIBUTES (decl) \
-                   ? (DECL_ATTRIBUTES (decl)) \
- 		  : TYPE_ATTRIBUTES (TREE_TYPE (decl))
- 
- /* Returns TRUE if the given tree has the "interrupt" attribute.  */
- static int
- interrupt_p (tree node ATTRIBUTE_UNUSED)
- {
-   tree list = M32C_ATTRIBUTES (node);
-   while (list)
-     {
-       if (is_attribute_p ("interrupt", TREE_PURPOSE (list)))
- 	return 1;
-       list = TREE_CHAIN (list);
-     }
-   return fast_interrupt_p (node);
- }
- 
- /* Returns TRUE if the given tree has the "bank_switch" attribute.  */
- static int
- bank_switch_p (tree node ATTRIBUTE_UNUSED)
- {
-   tree list = M32C_ATTRIBUTES (node);
-   while (list)
-     {
-       if (is_attribute_p ("bank_switch", TREE_PURPOSE (list)))
- 	return 1;
-       list = TREE_CHAIN (list);
-     }
-   return 0;
- }
- 
- /* Returns TRUE if the given tree has the "fast_interrupt" attribute.  */
- static int
- fast_interrupt_p (tree node ATTRIBUTE_UNUSED)
- {
-   tree list = M32C_ATTRIBUTES (node);
-   while (list)
-     {
-       if (is_attribute_p ("fast_interrupt", TREE_PURPOSE (list)))
- 	return 1;
-       list = TREE_CHAIN (list);
-     }
-   return 0;
- }
- 
- static tree
- interrupt_handler (tree * node ATTRIBUTE_UNUSED,
- 		   tree name ATTRIBUTE_UNUSED,
- 		   tree args ATTRIBUTE_UNUSED,
- 		   int flags ATTRIBUTE_UNUSED,
- 		   bool * no_add_attrs ATTRIBUTE_UNUSED)
- {
-   return NULL_TREE;
- }
- 
- /* Returns TRUE if given tree has the "function_vector" attribute. */
- int
- m32c_special_page_vector_p (tree func)
- {
-   tree list;
- 
-   if (TREE_CODE (func) != FUNCTION_DECL)
-     return 0;
- 
-   list = M32C_ATTRIBUTES (func);
-   while (list)
-     {
-       if (is_attribute_p ("function_vector", TREE_PURPOSE (list)))
-         return 1;
-       list = TREE_CHAIN (list);
-     }
-   return 0;
- }
- 
- static tree
- function_vector_handler (tree * node ATTRIBUTE_UNUSED,
-                          tree name ATTRIBUTE_UNUSED,
-                          tree args ATTRIBUTE_UNUSED,
-                          int flags ATTRIBUTE_UNUSED,
-                          bool * no_add_attrs ATTRIBUTE_UNUSED)
- {
-   if (TARGET_R8C)
-     {
-       /* The attribute is not supported for R8C target.  */
-       warning (OPT_Wattributes,
-                 "%qE attribute is not supported for R8C target",
-                 name);
-       *no_add_attrs = true;
-     }
-   else if (TREE_CODE (*node) != FUNCTION_DECL)
-     {
-       /* The attribute must be applied to functions only.  */
-       warning (OPT_Wattributes,
-                 "%qE attribute applies only to functions",
-                 name);
-       *no_add_attrs = true;
-     }
-   else if (TREE_CODE (TREE_VALUE (args)) != INTEGER_CST)
-     {
-       /* The argument must be a constant integer.  */
-       warning (OPT_Wattributes,
-                 "%qE attribute argument not an integer constant",
-                 name);
-       *no_add_attrs = true;
-     }
-   else if (TREE_INT_CST_LOW (TREE_VALUE (args)) < 18
-            || TREE_INT_CST_LOW (TREE_VALUE (args)) > 255)
-     {
-       /* The argument value must be between 18 to 255.  */
-       warning (OPT_Wattributes,
-                 "%qE attribute argument should be between 18 to 255",
-                 name);
-       *no_add_attrs = true;
-     }
-   return NULL_TREE;
- }
- 
- /* If the function is assigned the attribute 'function_vector', it
-    returns the function vector number, otherwise returns zero.  */
- int
- current_function_special_page_vector (rtx x)
- {
-   int num;
- 
-   if ((GET_CODE(x) == SYMBOL_REF)
-       && (SYMBOL_REF_FLAGS (x) & SYMBOL_FLAG_FUNCVEC_FUNCTION))
-     {
-       tree list;
-       tree t = SYMBOL_REF_DECL (x);
- 
-       if (TREE_CODE (t) != FUNCTION_DECL)
-         return 0;
- 
-       list = M32C_ATTRIBUTES (t);
-       while (list)
-         {
-           if (is_attribute_p ("function_vector", TREE_PURPOSE (list)))
-             {
-               num = TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (list)));
-               return num;
-             }
- 
-           list = TREE_CHAIN (list);
-         }
- 
-       return 0;
-     }
-   else
-     return 0;
- }
- 
- #undef TARGET_ATTRIBUTE_TABLE
- #define TARGET_ATTRIBUTE_TABLE m32c_attribute_table
- TARGET_GNU_ATTRIBUTES (m32c_attribute_table, {
-   /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
-        affects_type_identity, handler, exclude } */
-   { "interrupt", 0, 0, false, false, false, false, interrupt_handler, NULL },
-   { "bank_switch", 0, 0, false, false, false, false, interrupt_handler, NULL },
-   { "fast_interrupt", 0, 0, false, false, false, false,
-     interrupt_handler, NULL },
-   { "function_vector", 1, 1, true,  false, false, false,
-     function_vector_handler, NULL }
- });
- 
- #undef TARGET_COMP_TYPE_ATTRIBUTES
- #define TARGET_COMP_TYPE_ATTRIBUTES m32c_comp_type_attributes
- static int
- m32c_comp_type_attributes (const_tree type1 ATTRIBUTE_UNUSED,
- 			   const_tree type2 ATTRIBUTE_UNUSED)
- {
-   /* 0=incompatible 1=compatible 2=warning */
-   return 1;
- }
- 
- #undef TARGET_INSERT_ATTRIBUTES
- #define TARGET_INSERT_ATTRIBUTES m32c_insert_attributes
- static void
- m32c_insert_attributes (tree node ATTRIBUTE_UNUSED,
- 			tree * attr_ptr ATTRIBUTE_UNUSED)
- {
-   unsigned addr;
-   /* See if we need to make #pragma address variables volatile.  */
- 
-   if (VAR_P (node))
-     {
-       const char *name = IDENTIFIER_POINTER (DECL_NAME (node));
-       if (m32c_get_pragma_address  (name, &addr))
- 	{
- 	  TREE_THIS_VOLATILE (node) = true;
- 	}
-     }
- }
- 
- /* Hash table of pragma info.  */
- static GTY(()) hash_map<nofree_string_hash, unsigned> *pragma_htab;
- 
- void
- m32c_note_pragma_address (const char *varname, unsigned address)
- {
-   if (!pragma_htab)
-     pragma_htab = hash_map<nofree_string_hash, unsigned>::create_ggc (31);
- 
-   const char *name = ggc_strdup (varname);
-   unsigned int *slot = &pragma_htab->get_or_insert (name);
-   *slot = address;
- }
- 
- static bool
- m32c_get_pragma_address (const char *varname, unsigned *address)
- {
-   if (!pragma_htab)
-     return false;
- 
-   unsigned int *slot = pragma_htab->get (varname);
-   if (slot)
-     {
-       *address = *slot;
-       return true;
-     }
-   return false;
- }
- 
- void
- m32c_output_aligned_common (FILE *stream, tree decl ATTRIBUTE_UNUSED,
- 			    const char *name,
- 			    int size, int align, int global)
- {
-   unsigned address;
- 
-   if (m32c_get_pragma_address (name, &address))
-     {
-       /* We never output these as global.  */
-       assemble_name (stream, name);
-       fprintf (stream, " = 0x%04x\n", address);
-       return;
-     }
-   if (!global)
-     {
-       fprintf (stream, "\t.local\t");
-       assemble_name (stream, name);
-       fprintf (stream, "\n");
-     }
-   fprintf (stream, "\t.comm\t");
-   assemble_name (stream, name);
-   fprintf (stream, ",%u,%u\n", size, align / BITS_PER_UNIT);
- }
- 
- /* Predicates */
- 
- /* This is a list of legal subregs of hard regs.  */
- static const struct {
-   unsigned char outer_mode_size;
-   unsigned char inner_mode_size;
-   unsigned char byte_mask;
-   unsigned char legal_when;
-   unsigned int regno;
- } legal_subregs[] = {
-   {1, 2, 0x03, 1, R0_REGNO}, /* r0h r0l */
-   {1, 2, 0x03, 1, R1_REGNO}, /* r1h r1l */
-   {1, 2, 0x01, 1, A0_REGNO},
-   {1, 2, 0x01, 1, A1_REGNO},
- 
-   {1, 4, 0x01, 1, A0_REGNO},
-   {1, 4, 0x01, 1, A1_REGNO},
- 
-   {2, 4, 0x05, 1, R0_REGNO}, /* r2 r0 */
-   {2, 4, 0x05, 1, R1_REGNO}, /* r3 r1 */
-   {2, 4, 0x05, 16, A0_REGNO}, /* a1 a0 */
-   {2, 4, 0x01, 24, A0_REGNO}, /* a1 a0 */
-   {2, 4, 0x01, 24, A1_REGNO}, /* a1 a0 */
- 
-   {4, 8, 0x55, 1, R0_REGNO}, /* r3 r1 r2 r0 */
- };
- 
- /* Returns TRUE if OP is a subreg of a hard reg which we don't
-    support.  We also bail on MEMs with illegal addresses.  */
- bool
- m32c_illegal_subreg_p (rtx op)
- {
-   int offset;
-   unsigned int i;
-   machine_mode src_mode, dest_mode;
- 
-   if (GET_CODE (op) == MEM
-       && ! m32c_legitimate_address_p (Pmode, XEXP (op, 0), false))
-     {
-       return true;
-     }
- 
-   if (GET_CODE (op) != SUBREG)
-     return false;
- 
-   dest_mode = GET_MODE (op);
-   offset = SUBREG_BYTE (op);
-   op = SUBREG_REG (op);
-   src_mode = GET_MODE (op);
- 
-   if (GET_MODE_SIZE (dest_mode) == GET_MODE_SIZE (src_mode))
-     return false;
-   if (GET_CODE (op) != REG)
-     return false;
-   if (REGNO (op) >= MEM0_REGNO)
-     return false;
- 
-   offset = (1 << offset);
- 
-   for (i = 0; i < ARRAY_SIZE (legal_subregs); i ++)
-     if (legal_subregs[i].outer_mode_size == GET_MODE_SIZE (dest_mode)
- 	&& legal_subregs[i].regno == REGNO (op)
- 	&& legal_subregs[i].inner_mode_size == GET_MODE_SIZE (src_mode)
- 	&& legal_subregs[i].byte_mask & offset)
-       {
- 	switch (legal_subregs[i].legal_when)
- 	  {
- 	  case 1:
- 	    return false;
- 	  case 16:
- 	    if (TARGET_A16)
- 	      return false;
- 	    break;
- 	  case 24:
- 	    if (TARGET_A24)
- 	      return false;
- 	    break;
- 	  }
-       }
-   return true;
- }
- 
- /* Returns TRUE if we support a move between the first two operands.
-    At the moment, we just want to discourage mem to mem moves until
-    after reload, because reload has a hard time with our limited
-    number of address registers, and we can get into a situation where
-    we need three of them when we only have two.  */
- bool
- m32c_mov_ok (rtx * operands, machine_mode mode ATTRIBUTE_UNUSED)
- {
-   rtx op0 = operands[0];
-   rtx op1 = operands[1];
- 
-   if (TARGET_A24)
-     return true;
- 
- #define DEBUG_MOV_OK 0
- #if DEBUG_MOV_OK
-   fprintf (stderr, "m32c_mov_ok %s\n", mode_name[mode]);
-   debug_rtx (op0);
-   debug_rtx (op1);
- #endif
- 
-   if (GET_CODE (op0) == SUBREG)
-     op0 = XEXP (op0, 0);
-   if (GET_CODE (op1) == SUBREG)
-     op1 = XEXP (op1, 0);
- 
-   if (GET_CODE (op0) == MEM
-       && GET_CODE (op1) == MEM
-       && ! reload_completed)
-     {
- #if DEBUG_MOV_OK
-       fprintf (stderr, " - no, mem to mem\n");
- #endif
-       return false;
-     }
- 
- #if DEBUG_MOV_OK
-   fprintf (stderr, " - ok\n");
- #endif
-   return true;
- }
- 
- /* Returns TRUE if two consecutive HImode mov instructions, generated
-    for moving an immediate double data to a double data type variable
-    location, can be combined into single SImode mov instruction.  */
- bool
- m32c_immd_dbl_mov (rtx * operands ATTRIBUTE_UNUSED,
- 		   machine_mode mode ATTRIBUTE_UNUSED)
- {
-   /* ??? This relied on the now-defunct MEM_SCALAR and MEM_IN_STRUCT_P
-      flags.  */
-   return false;
- }
- 
- /* Expanders */
- 
- /* Subregs are non-orthogonal for us, because our registers are all
-    different sizes.  */
- static rtx
- m32c_subreg (machine_mode outer,
- 	     rtx x, machine_mode inner, int byte)
- {
-   int r, nr = -1;
- 
-   /* Converting MEMs to different types that are the same size, we
-      just rewrite them.  */
-   if (GET_CODE (x) == SUBREG
-       && SUBREG_BYTE (x) == 0
-       && GET_CODE (SUBREG_REG (x)) == MEM
-       && (GET_MODE_SIZE (GET_MODE (x))
- 	  == GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
-     {
-       rtx oldx = x;
-       x = gen_rtx_MEM (GET_MODE (x), XEXP (SUBREG_REG (x), 0));
-       MEM_COPY_ATTRIBUTES (x, SUBREG_REG (oldx));
-     }
- 
-   /* Push/pop get done as smaller push/pops.  */
-   if (GET_CODE (x) == MEM
-       && (GET_CODE (XEXP (x, 0)) == PRE_DEC
- 	  || GET_CODE (XEXP (x, 0)) == POST_INC))
-     return gen_rtx_MEM (outer, XEXP (x, 0));
-   if (GET_CODE (x) == SUBREG
-       && GET_CODE (XEXP (x, 0)) == MEM
-       && (GET_CODE (XEXP (XEXP (x, 0), 0)) == PRE_DEC
- 	  || GET_CODE (XEXP (XEXP (x, 0), 0)) == POST_INC))
-     return gen_rtx_MEM (outer, XEXP (XEXP (x, 0), 0));
- 
-   if (GET_CODE (x) != REG)
-     {
-       rtx r = simplify_gen_subreg (outer, x, inner, byte);
-       if (GET_CODE (r) == SUBREG
- 	  && GET_CODE (x) == MEM
- 	  && MEM_VOLATILE_P (x))
- 	{
- 	  /* Volatile MEMs don't get simplified, but we need them to
- 	     be.  We are little endian, so the subreg byte is the
- 	     offset.  */
- 	  r = adjust_address_nv (x, outer, byte);
- 	}
-       return r;
-     }
- 
-   r = REGNO (x);
-   if (r >= FIRST_PSEUDO_REGISTER || r == AP_REGNO)
-     return simplify_gen_subreg (outer, x, inner, byte);
- 
-   if (IS_MEM_REGNO (r))
-     return simplify_gen_subreg (outer, x, inner, byte);
- 
-   /* This is where the complexities of our register layout are
-      described.  */
-   if (byte == 0)
-     nr = r;
-   else if (outer == HImode)
-     {
-       if (r == R0_REGNO && byte == 2)
- 	nr = R2_REGNO;
-       else if (r == R0_REGNO && byte == 4)
- 	nr = R1_REGNO;
-       else if (r == R0_REGNO && byte == 6)
- 	nr = R3_REGNO;
-       else if (r == R1_REGNO && byte == 2)
- 	nr = R3_REGNO;
-       else if (r == A0_REGNO && byte == 2)
- 	nr = A1_REGNO;
-     }
-   else if (outer == SImode)
-     {
-       if (r == R0_REGNO && byte == 0)
- 	nr = R0_REGNO;
-       else if (r == R0_REGNO && byte == 4)
- 	nr = R1_REGNO;
-     }
-   if (nr == -1)
-     {
-       fprintf (stderr, "m32c_subreg %s %s %d\n",
- 	       mode_name[outer], mode_name[inner], byte);
-       debug_rtx (x);
-       gcc_unreachable ();
-     }
-   return gen_rtx_REG (outer, nr);
- }
- 
- /* Used to emit move instructions.  We split some moves,
-    and avoid mem-mem moves.  */
- int
- m32c_prepare_move (rtx * operands, machine_mode mode)
- {
-   if (far_addr_space_p (operands[0])
-       && CONSTANT_P (operands[1]))
-     {
-       operands[1] = force_reg (GET_MODE (operands[0]), operands[1]);
-     }
-   if (TARGET_A16 && mode == PSImode)
-     return m32c_split_move (operands, mode, 1);
-   if ((GET_CODE (operands[0]) == MEM)
-       && (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY))
-     {
-       rtx pmv = XEXP (operands[0], 0);
-       rtx dest_reg = XEXP (pmv, 0);
-       rtx dest_mod = XEXP (pmv, 1);
- 
-       emit_insn (gen_rtx_SET (dest_reg, dest_mod));
-       operands[0] = gen_rtx_MEM (mode, dest_reg);
-     }
-   if (can_create_pseudo_p () && MEM_P (operands[0]) && MEM_P (operands[1]))
-     operands[1] = copy_to_mode_reg (mode, operands[1]);
-   return 0;
- }
- 
- #define DEBUG_SPLIT 0
- 
- /* Returns TRUE if the given PSImode move should be split.  We split
-    for all r8c/m16c moves, since it doesn't support them, and for
-    POP.L as we can only *push* SImode.  */
- int
- m32c_split_psi_p (rtx * operands)
- {
- #if DEBUG_SPLIT
-   fprintf (stderr, "\nm32c_split_psi_p\n");
-   debug_rtx (operands[0]);
-   debug_rtx (operands[1]);
- #endif
-   if (TARGET_A16)
-     {
- #if DEBUG_SPLIT
-       fprintf (stderr, "yes, A16\n");
- #endif
-       return 1;
-     }
-   if (GET_CODE (operands[1]) == MEM
-       && GET_CODE (XEXP (operands[1], 0)) == POST_INC)
-     {
- #if DEBUG_SPLIT
-       fprintf (stderr, "yes, pop.l\n");
- #endif
-       return 1;
-     }
- #if DEBUG_SPLIT
-   fprintf (stderr, "no, default\n");
- #endif
-   return 0;
- }
- 
- /* Split the given move.  SPLIT_ALL is 0 if splitting is optional
-    (define_expand), 1 if it is not optional (define_insn_and_split),
-    and 3 for define_split (alternate api). */
- int
- m32c_split_move (rtx * operands, machine_mode mode, int split_all)
- {
-   rtx s[4], d[4];
-   int parts, si, di, rev = 0;
-   int rv = 0, opi = 2;
-   machine_mode submode = HImode;
-   rtx *ops, local_ops[10];
- 
-   /* define_split modifies the existing operands, but the other two
-      emit new insns.  OPS is where we store the operand pairs, which
-      we emit later.  */
-   if (split_all == 3)
-     ops = operands;
-   else
-     ops = local_ops;
- 
-   /* Else HImode.  */
-   if (mode == DImode)
-     submode = SImode;
- 
-   /* Before splitting mem-mem moves, force one operand into a
-      register.  */
-   if (can_create_pseudo_p () && MEM_P (operands[0]) && MEM_P (operands[1]))
-     {
- #if DEBUG0
-       fprintf (stderr, "force_reg...\n");
-       debug_rtx (operands[1]);
- #endif
-       operands[1] = force_reg (mode, operands[1]);
- #if DEBUG0
-       debug_rtx (operands[1]);
- #endif
-     }
- 
-   parts = 2;
- 
- #if DEBUG_SPLIT
-   fprintf (stderr, "\nsplit_move %d all=%d\n", !can_create_pseudo_p (),
- 	   split_all);
-   debug_rtx (operands[0]);
-   debug_rtx (operands[1]);
- #endif
- 
-   /* Note that split_all is not used to select the api after this
-      point, so it's safe to set it to 3 even with define_insn.  */
-   /* None of the chips can move SI operands to sp-relative addresses,
-      so we always split those.  */
-   if (satisfies_constraint_Ss (operands[0]))
-     split_all = 3;
- 
-   if (TARGET_A16
-       && (far_addr_space_p (operands[0])
- 	  || far_addr_space_p (operands[1])))
-     split_all |= 1;
- 
-   /* We don't need to split these.  */
-   if (TARGET_A24
-       && split_all != 3
-       && (mode == SImode || mode == PSImode)
-       && !(GET_CODE (operands[1]) == MEM
- 	   && GET_CODE (XEXP (operands[1], 0)) == POST_INC))
-     return 0;
- 
-   /* First, enumerate the subregs we'll be dealing with.  */
-   for (si = 0; si < parts; si++)
-     {
-       d[si] =
- 	m32c_subreg (submode, operands[0], mode,
- 		     si * GET_MODE_SIZE (submode));
-       s[si] =
- 	m32c_subreg (submode, operands[1], mode,
- 		     si * GET_MODE_SIZE (submode));
-     }
- 
-   /* Split pushes by emitting a sequence of smaller pushes.  */
-   if (GET_CODE (d[0]) == MEM && GET_CODE (XEXP (d[0], 0)) == PRE_DEC)
-     {
-       for (si = parts - 1; si >= 0; si--)
- 	{
- 	  ops[opi++] = gen_rtx_MEM (submode,
- 				    gen_rtx_PRE_DEC (Pmode,
- 						     gen_rtx_REG (Pmode,
- 								  SP_REGNO)));
- 	  ops[opi++] = s[si];
- 	}
- 
-       rv = 1;
-     }
-   /* Likewise for pops.  */
-   else if (GET_CODE (s[0]) == MEM && GET_CODE (XEXP (s[0], 0)) == POST_INC)
-     {
-       for (di = 0; di < parts; di++)
- 	{
- 	  ops[opi++] = d[di];
- 	  ops[opi++] = gen_rtx_MEM (submode,
- 				    gen_rtx_POST_INC (Pmode,
- 						      gen_rtx_REG (Pmode,
- 								   SP_REGNO)));
- 	}
-       rv = 1;
-     }
-   else if (split_all)
-     {
-       /* if d[di] == s[si] for any di < si, we'll early clobber. */
-       for (di = 0; di < parts - 1; di++)
- 	for (si = di + 1; si < parts; si++)
- 	  if (reg_mentioned_p (d[di], s[si]))
- 	    rev = 1;
- 
-       if (rev)
- 	for (si = 0; si < parts; si++)
- 	  {
- 	    ops[opi++] = d[si];
- 	    ops[opi++] = s[si];
- 	  }
-       else
- 	for (si = parts - 1; si >= 0; si--)
- 	  {
- 	    ops[opi++] = d[si];
- 	    ops[opi++] = s[si];
- 	  }
-       rv = 1;
-     }
-   /* Now emit any moves we may have accumulated.  */
-   if (rv && split_all != 3)
-     {
-       int i;
-       for (i = 2; i < opi; i += 2)
- 	emit_move_insn (ops[i], ops[i + 1]);
-     }
-   return rv;
- }
- 
- /* The m32c has a number of opcodes that act like memcpy, strcmp, and
-    the like.  For the R8C they expect one of the addresses to be in
-    R1L:An so we need to arrange for that.  Otherwise, it's just a
-    matter of picking out the operands we want and emitting the right
-    pattern for them.  All these expanders, which correspond to
-    patterns in blkmov.md, must return nonzero if they expand the insn,
-    or zero if they should FAIL.  */
- 
- /* This is a memset() opcode.  All operands are implied, so we need to
-    arrange for them to be in the right registers.  The opcode wants
-    addresses, not [mem] syntax.  $0 is the destination (MEM:BLK), $1
-    the count (HI), and $2 the value (QI).  */
- int
- m32c_expand_setmemhi(rtx *operands)
- {
-   rtx desta, count, val;
-   rtx desto, counto;
- 
-   desta = XEXP (operands[0], 0);
-   count = operands[1];
-   val = operands[2];
- 
-   desto = gen_reg_rtx (Pmode);
-   counto = gen_reg_rtx (HImode);
- 
-   if (GET_CODE (desta) != REG
-       || REGNO (desta) < FIRST_PSEUDO_REGISTER)
-     desta = copy_to_mode_reg (Pmode, desta);
- 
-   /* This looks like an arbitrary restriction, but this is by far the
-      most common case.  For counts 8..14 this actually results in
-      smaller code with no speed penalty because the half-sized
-      constant can be loaded with a shorter opcode.  */
-   if (GET_CODE (count) == CONST_INT
-       && GET_CODE (val) == CONST_INT
-       && ! (INTVAL (count) & 1)
-       && (INTVAL (count) > 1)
-       && (INTVAL (val) <= 7 && INTVAL (val) >= -8))
-     {
-       unsigned v = INTVAL (val) & 0xff;
-       v = v | (v << 8);
-       count = copy_to_mode_reg (HImode, GEN_INT (INTVAL (count) / 2));
-       val = copy_to_mode_reg (HImode, GEN_INT (v));
-       if (TARGET_A16)
- 	emit_insn (gen_setmemhi_whi_op (desto, counto, val, desta, count));
-       else
- 	emit_insn (gen_setmemhi_wpsi_op (desto, counto, val, desta, count));
-       return 1;
-     }
- 
-   /* This is the generalized memset() case.  */
-   if (GET_CODE (val) != REG
-       || REGNO (val) < FIRST_PSEUDO_REGISTER)
-     val = copy_to_mode_reg (QImode, val);
- 
-   if (GET_CODE (count) != REG
-       || REGNO (count) < FIRST_PSEUDO_REGISTER)
-     count = copy_to_mode_reg (HImode, count);
- 
-   if (TARGET_A16)
-     emit_insn (gen_setmemhi_bhi_op (desto, counto, val, desta, count));
-   else
-     emit_insn (gen_setmemhi_bpsi_op (desto, counto, val, desta, count));
- 
-   return 1;
- }
- 
- /* This is a memcpy() opcode.  All operands are implied, so we need to
-    arrange for them to be in the right registers.  The opcode wants
-    addresses, not [mem] syntax.  $0 is the destination (MEM:BLK), $1
-    is the source (MEM:BLK), and $2 the count (HI).  */
- int
- m32c_expand_cpymemhi(rtx *operands)
- {
-   rtx desta, srca, count;
-   rtx desto, srco, counto;
- 
-   desta = XEXP (operands[0], 0);
-   srca = XEXP (operands[1], 0);
-   count = operands[2];
- 
-   desto = gen_reg_rtx (Pmode);
-   srco = gen_reg_rtx (Pmode);
-   counto = gen_reg_rtx (HImode);
- 
-   if (GET_CODE (desta) != REG
-       || REGNO (desta) < FIRST_PSEUDO_REGISTER)
-     desta = copy_to_mode_reg (Pmode, desta);
- 
-   if (GET_CODE (srca) != REG
-       || REGNO (srca) < FIRST_PSEUDO_REGISTER)
-     srca = copy_to_mode_reg (Pmode, srca);
- 
-   /* Similar to setmem, but we don't need to check the value.  */
-   if (GET_CODE (count) == CONST_INT
-       && ! (INTVAL (count) & 1)
-       && (INTVAL (count) > 1))
-     {
-       count = copy_to_mode_reg (HImode, GEN_INT (INTVAL (count) / 2));
-       if (TARGET_A16)
- 	emit_insn (gen_cpymemhi_whi_op (desto, srco, counto, desta, srca, count));
-       else
- 	emit_insn (gen_cpymemhi_wpsi_op (desto, srco, counto, desta, srca, count));
-       return 1;
-     }
- 
-   /* This is the generalized memset() case.  */
-   if (GET_CODE (count) != REG
-       || REGNO (count) < FIRST_PSEUDO_REGISTER)
-     count = copy_to_mode_reg (HImode, count);
- 
-   if (TARGET_A16)
-     emit_insn (gen_cpymemhi_bhi_op (desto, srco, counto, desta, srca, count));
-   else
-     emit_insn (gen_cpymemhi_bpsi_op (desto, srco, counto, desta, srca, count));
- 
-   return 1;
- }
- 
- /* This is a stpcpy() opcode.  $0 is the destination (MEM:BLK) after
-    the copy, which should point to the NUL at the end of the string,
-    $1 is the destination (MEM:BLK), and $2 is the source (MEM:BLK).
-    Since our opcode leaves the destination pointing *after* the NUL,
-    we must emit an adjustment.  */
- int
- m32c_expand_movstr(rtx *operands)
- {
-   rtx desta, srca;
-   rtx desto, srco;
- 
-   desta = XEXP (operands[1], 0);
-   srca = XEXP (operands[2], 0);
- 
-   desto = gen_reg_rtx (Pmode);
-   srco = gen_reg_rtx (Pmode);
- 
-   if (GET_CODE (desta) != REG
-       || REGNO (desta) < FIRST_PSEUDO_REGISTER)
-     desta = copy_to_mode_reg (Pmode, desta);
- 
-   if (GET_CODE (srca) != REG
-       || REGNO (srca) < FIRST_PSEUDO_REGISTER)
-     srca = copy_to_mode_reg (Pmode, srca);
- 
-   emit_insn (gen_movstr_op (desto, srco, desta, srca));
-   /* desto ends up being a1, which allows this type of add through MOVA.  */
-   emit_insn (gen_addpsi3 (operands[0], desto, GEN_INT (-1)));
- 
-   return 1;
- }
- 
- /* This is a strcmp() opcode.  $0 is the destination (HI) which holds
-    <=>0 depending on the comparison, $1 is one string (MEM:BLK), and
-    $2 is the other (MEM:BLK).  We must do the comparison, and then
-    convert the flags to a signed integer result.  */
- int
- m32c_expand_cmpstr(rtx *operands)
- {
-   rtx src1a, src2a;
- 
-   src1a = XEXP (operands[1], 0);
-   src2a = XEXP (operands[2], 0);
- 
-   if (GET_CODE (src1a) != REG
-       || REGNO (src1a) < FIRST_PSEUDO_REGISTER)
-     src1a = copy_to_mode_reg (Pmode, src1a);
- 
-   if (GET_CODE (src2a) != REG
-       || REGNO (src2a) < FIRST_PSEUDO_REGISTER)
-     src2a = copy_to_mode_reg (Pmode, src2a);
- 
-   emit_insn (gen_cmpstrhi_op (src1a, src2a, src1a, src2a));
-   emit_insn (gen_cond_to_int (operands[0]));
- 
-   return 1;
- }
- 
- 
- typedef rtx (*shift_gen_func)(rtx, rtx, rtx);
- 
- static shift_gen_func
- shift_gen_func_for (int mode, int code)
- {
- #define GFF(m,c,f) if (mode == m && code == c) return f
-   GFF(QImode,  ASHIFT,   gen_ashlqi3_i);
-   GFF(QImode,  ASHIFTRT, gen_ashrqi3_i);
-   GFF(QImode,  LSHIFTRT, gen_lshrqi3_i);
-   GFF(HImode,  ASHIFT,   gen_ashlhi3_i);
-   GFF(HImode,  ASHIFTRT, gen_ashrhi3_i);
-   GFF(HImode,  LSHIFTRT, gen_lshrhi3_i);
-   GFF(PSImode, ASHIFT,   gen_ashlpsi3_i);
-   GFF(PSImode, ASHIFTRT, gen_ashrpsi3_i);
-   GFF(PSImode, LSHIFTRT, gen_lshrpsi3_i);
-   GFF(SImode,  ASHIFT,   TARGET_A16 ? gen_ashlsi3_16 : gen_ashlsi3_24);
-   GFF(SImode,  ASHIFTRT, TARGET_A16 ? gen_ashrsi3_16 : gen_ashrsi3_24);
-   GFF(SImode,  LSHIFTRT, TARGET_A16 ? gen_lshrsi3_16 : gen_lshrsi3_24);
- #undef GFF
-   gcc_unreachable ();
- }
- 
- /* The m32c only has one shift, but it takes a signed count.  GCC
-    doesn't want this, so we fake it by negating any shift count when
-    we're pretending to shift the other way.  Also, the shift count is
-    limited to -8..8.  It's slightly better to use two shifts for 9..15
-    than to load the count into r1h, so we do that too.  */
- int
- m32c_prepare_shift (rtx * operands, int scale, int shift_code)
- {
-   machine_mode mode = GET_MODE (operands[0]);
-   shift_gen_func func = shift_gen_func_for (mode, shift_code);
-   rtx temp;
- 
-   if (GET_CODE (operands[2]) == CONST_INT)
-     {
-       int maxc = TARGET_A24 && (mode == PSImode || mode == SImode) ? 32 : 8;
-       int count = INTVAL (operands[2]) * scale;
- 
-       while (count > maxc)
- 	{
- 	  temp = gen_reg_rtx (mode);
- 	  emit_insn (func (temp, operands[1], GEN_INT (maxc)));
- 	  operands[1] = temp;
- 	  count -= maxc;
- 	}
-       while (count < -maxc)
- 	{
- 	  temp = gen_reg_rtx (mode);
- 	  emit_insn (func (temp, operands[1], GEN_INT (-maxc)));
- 	  operands[1] = temp;
- 	  count += maxc;
- 	}
-       emit_insn (func (operands[0], operands[1], GEN_INT (count)));
-       return 1;
-     }
- 
-   temp = gen_reg_rtx (QImode);
-   if (scale < 0)
-     /* The pattern has a NEG that corresponds to this. */
-     emit_move_insn (temp, gen_rtx_NEG (QImode, operands[2]));
-   else if (TARGET_A16 && mode == SImode)
-     /* We do this because the code below may modify this, we don't
-        want to modify the origin of this value.  */
-     emit_move_insn (temp, operands[2]);
-   else
-     /* We'll only use it for the shift, no point emitting a move.  */
-     temp = operands[2];
- 
-   if (TARGET_A16 && GET_MODE_SIZE (mode) == 4)
-     {
-       /* The m16c has a limit of -16..16 for SI shifts, even when the
- 	 shift count is in a register.  Since there are so many targets
- 	 of these shifts, it's better to expand the RTL here than to
- 	 call a helper function.
- 
- 	 The resulting code looks something like this:
- 
- 		cmp.b	r1h,-16
- 		jge.b	1f
- 		shl.l	-16,dest
- 		add.b	r1h,16
- 	1f:	cmp.b	r1h,16
- 		jle.b	1f
- 		shl.l	16,dest
- 		sub.b	r1h,16
- 	1f:	shl.l	r1h,dest
- 
- 	 We take advantage of the fact that "negative" shifts are
- 	 undefined to skip one of the comparisons.  */
- 
-       rtx count;
-       rtx tempvar;
-       rtx_insn *insn;
- 
-       emit_move_insn (operands[0], operands[1]);
- 
-       count = temp;
-       rtx_code_label *label = gen_label_rtx ();
-       LABEL_NUSES (label) ++;
- 
-       tempvar = gen_reg_rtx (mode);
- 
-       if (shift_code == ASHIFT)
- 	{
- 	  /* This is a left shift.  We only need check positive counts.  */
- 	  emit_jump_insn (gen_cbranchqi4 (gen_rtx_LE (VOIDmode, 0, 0),
- 					  count, GEN_INT (16), label));
- 	  emit_insn (func (tempvar, operands[0], GEN_INT (8)));
- 	  emit_insn (func (operands[0], tempvar, GEN_INT (8)));
- 	  insn = emit_insn (gen_addqi3 (count, count, GEN_INT (-16)));
- 	  emit_label_after (label, insn);
- 	}
-       else
- 	{
- 	  /* This is a right shift.  We only need check negative counts.  */
- 	  emit_jump_insn (gen_cbranchqi4 (gen_rtx_GE (VOIDmode, 0, 0),
- 					  count, GEN_INT (-16), label));
- 	  emit_insn (func (tempvar, operands[0], GEN_INT (-8)));
- 	  emit_insn (func (operands[0], tempvar, GEN_INT (-8)));
- 	  insn = emit_insn (gen_addqi3 (count, count, GEN_INT (16)));
- 	  emit_label_after (label, insn);
- 	}
-       operands[1] = operands[0];
-       emit_insn (func (operands[0], operands[0], count));
-       return 1;
-     }
- 
-   operands[2] = temp;
-   return 0;
- }
- 
- /* The m32c has a limited range of operations that work on PSImode
-    values; we have to expand to SI, do the math, and truncate back to
-    PSI.  Yes, this is expensive, but hopefully gcc will learn to avoid
-    those cases.  */
- void
- m32c_expand_neg_mulpsi3 (rtx * operands)
- {
-   /* operands: a = b * i */
-   rtx temp1; /* b as SI */
-   rtx scale /* i as SI */;
-   rtx temp2; /* a*b as SI */
- 
-   temp1 = gen_reg_rtx (SImode);
-   temp2 = gen_reg_rtx (SImode);
-   if (GET_CODE (operands[2]) != CONST_INT)
-     {
-       scale = gen_reg_rtx (SImode);
-       emit_insn (gen_zero_extendpsisi2 (scale, operands[2]));
-     }
-   else
-     scale = copy_to_mode_reg (SImode, operands[2]);
- 
-   emit_insn (gen_zero_extendpsisi2 (temp1, operands[1]));
-   temp2 = expand_simple_binop (SImode, MULT, temp1, scale, temp2, 1, OPTAB_LIB);
-   emit_insn (gen_truncsipsi2 (operands[0], temp2));
- }
- 
- /* Pattern Output Functions */
- 
- int
- m32c_expand_movcc (rtx *operands)
- {
-   rtx rel = operands[1];
- 
-   if (GET_CODE (rel) != EQ && GET_CODE (rel) != NE)
-     return 1;
-   if (GET_CODE (operands[2]) != CONST_INT
-       || GET_CODE (operands[3]) != CONST_INT)
-     return 1;
-   if (GET_CODE (rel) == NE)
-     {
-       rtx tmp = operands[2];
-       operands[2] = operands[3];
-       operands[3] = tmp;
-       rel = gen_rtx_EQ (GET_MODE (rel), XEXP (rel, 0), XEXP (rel, 1));
-     }
- 
-   emit_move_insn (operands[0],
- 		  gen_rtx_IF_THEN_ELSE (GET_MODE (operands[0]),
- 					rel,
- 					operands[2],
- 					operands[3]));
-   return 0;
- }
- 
- /* Used for the "insv" pattern.  Return nonzero to fail, else done.  */
- int
- m32c_expand_insv (rtx *operands)
- {
-   rtx op0, src0, p;
-   int mask;
- 
-   if (INTVAL (operands[1]) != 1)
-     return 1;
- 
-   /* Our insv opcode (bset, bclr) can only insert a one-bit constant.  */
-   if (GET_CODE (operands[3]) != CONST_INT)
-     return 1;
-   if (INTVAL (operands[3]) != 0
-       && INTVAL (operands[3]) != 1
-       && INTVAL (operands[3]) != -1)
-     return 1;
- 
-   mask = 1 << INTVAL (operands[2]);
- 
-   op0 = operands[0];
-   if (GET_CODE (op0) == SUBREG
-       && SUBREG_BYTE (op0) == 0)
-     {
-       rtx sub = SUBREG_REG (op0);
-       if (GET_MODE (sub) == HImode || GET_MODE (sub) == QImode)
- 	op0 = sub;
-     }
- 
-   if (!can_create_pseudo_p ()
-       || (GET_CODE (op0) == MEM && MEM_VOLATILE_P (op0)))
-     src0 = op0;
-   else
-     {
-       src0 = gen_reg_rtx (GET_MODE (op0));
-       emit_move_insn (src0, op0);
-     }
- 
-   if (GET_MODE (op0) == HImode
-       && INTVAL (operands[2]) >= 8
-       && GET_CODE (op0) == MEM)
-     {
-       /* We are little endian.  */
-       rtx new_mem = gen_rtx_MEM (QImode, plus_constant (Pmode,
- 							XEXP (op0, 0), 1));
-       MEM_COPY_ATTRIBUTES (new_mem, op0);
-       mask >>= 8;
-     }
- 
-   /* First, we generate a mask with the correct polarity.  If we are
-      storing a zero, we want an AND mask, so invert it.  */
-   if (INTVAL (operands[3]) == 0)
-     {
-       /* Storing a zero, use an AND mask */
-       if (GET_MODE (op0) == HImode)
- 	mask ^= 0xffff;
-       else
- 	mask ^= 0xff;
-     }
-   /* Now we need to properly sign-extend the mask in case we need to
-      fall back to an AND or OR opcode.  */
-   if (GET_MODE (op0) == HImode)
-     {
-       if (mask & 0x8000)
- 	mask -= 0x10000;
-     }
-   else
-     {
-       if (mask & 0x80)
- 	mask -= 0x100;
-     }
- 
-   switch (  (INTVAL (operands[3]) ? 4 : 0)
- 	  + ((GET_MODE (op0) == HImode) ? 2 : 0)
- 	  + (TARGET_A24 ? 1 : 0))
-     {
-     case 0: p = gen_andqi3_16 (op0, src0, GEN_INT (mask)); break;
-     case 1: p = gen_andqi3_24 (op0, src0, GEN_INT (mask)); break;
-     case 2: p = gen_andhi3_16 (op0, src0, GEN_INT (mask)); break;
-     case 3: p = gen_andhi3_24 (op0, src0, GEN_INT (mask)); break;
-     case 4: p = gen_iorqi3_16 (op0, src0, GEN_INT (mask)); break;
-     case 5: p = gen_iorqi3_24 (op0, src0, GEN_INT (mask)); break;
-     case 6: p = gen_iorhi3_16 (op0, src0, GEN_INT (mask)); break;
-     case 7: p = gen_iorhi3_24 (op0, src0, GEN_INT (mask)); break;
-     default: p = NULL_RTX; break; /* Not reached, but silences a warning.  */
-     }
- 
-   emit_insn (p);
-   return 0;
- }
- 
- const char *
- m32c_scc_pattern(rtx *operands, RTX_CODE code)
- {
-   static char buf[30];
-   if (GET_CODE (operands[0]) == REG
-       && REGNO (operands[0]) == R0_REGNO)
-     {
-       if (code == EQ)
- 	return "stzx\t#1,#0,r0l";
-       if (code == NE)
- 	return "stzx\t#0,#1,r0l";
-     }
-   sprintf(buf, "bm%s\t0,%%h0\n\tand.b\t#1,%%0", GET_RTX_NAME (code));
-   return buf;
- }
- 
- /* Encode symbol attributes of a SYMBOL_REF into its
-    SYMBOL_REF_FLAGS. */
- static void
- m32c_encode_section_info (tree decl, rtx rtl, int first)
- {
-   int extra_flags = 0;
- 
-   default_encode_section_info (decl, rtl, first);
-   if (TREE_CODE (decl) == FUNCTION_DECL
-       && m32c_special_page_vector_p (decl))
- 
-     extra_flags = SYMBOL_FLAG_FUNCVEC_FUNCTION;
- 
-   if (extra_flags)
-     SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= extra_flags;
- }
- 
- /* Returns TRUE if the current function is a leaf, and thus we can
-    determine which registers an interrupt function really needs to
-    save.  The logic below is mostly about finding the insn sequence
-    that's the function, versus any sequence that might be open for the
-    current insn.  */
- static int
- m32c_leaf_function_p (void)
- {
-   int rv;
- 
-   push_topmost_sequence ();
-   rv = leaf_function_p ();
-   pop_topmost_sequence ();
-   return rv;
- }
- 
- /* Returns TRUE if the current function needs to use the ENTER/EXIT
-    opcodes.  If the function doesn't need the frame base or stack
-    pointer, it can use the simpler RTS opcode.  */
- static bool
- m32c_function_needs_enter (void)
- {
-   rtx_insn *insn;
-   rtx sp = gen_rtx_REG (Pmode, SP_REGNO);
-   rtx fb = gen_rtx_REG (Pmode, FB_REGNO);
- 
-   for (insn = get_topmost_sequence ()->first; insn; insn = NEXT_INSN (insn))
-     if (NONDEBUG_INSN_P (insn))
-       {
- 	if (reg_mentioned_p (sp, insn))
- 	  return true;
- 	if (reg_mentioned_p (fb, insn))
- 	  return true;
-       }
-   return false;
- }
- 
- /* Mark all the subexpressions of the PARALLEL rtx PAR as
-    frame-related.  Return PAR.
- 
-    dwarf2out.cc:dwarf2out_frame_debug_expr ignores sub-expressions of a
-    PARALLEL rtx other than the first if they do not have the
-    FRAME_RELATED flag set on them.  So this function is handy for
-    marking up 'enter' instructions.  */
- static rtx
- m32c_all_frame_related (rtx par)
- {
-   int len = XVECLEN (par, 0);
-   int i;
- 
-   for (i = 0; i < len; i++)
-     F (XVECEXP (par, 0, i));
- 
-   return par;
- }
- 
- /* Emits the prologue.  See the frame layout comment earlier in this
-    file.  We can reserve up to 256 bytes with the ENTER opcode, beyond
-    that we manually update sp.  */
- void
- m32c_emit_prologue (void)
- {
-   int frame_size, extra_frame_size = 0, reg_save_size;
-   int complex_prologue = 0;
- 
-   cfun->machine->is_leaf = m32c_leaf_function_p ();
-   if (interrupt_p (cfun->decl))
-     {
-       cfun->machine->is_interrupt = 1;
-       complex_prologue = 1;
-     }
-   else if (bank_switch_p (cfun->decl))
-     warning (OPT_Wattributes,
- 	     "%<bank_switch%> has no effect on non-interrupt functions");
- 
-   reg_save_size = m32c_pushm_popm (PP_justcount);
- 
-   if (interrupt_p (cfun->decl))
-     {
-       if (bank_switch_p (cfun->decl))
- 	emit_insn (gen_fset_b ());
-       else if (cfun->machine->intr_pushm)
- 	emit_insn (gen_pushm (GEN_INT (cfun->machine->intr_pushm)));
-     }
- 
-   frame_size =
-     m32c_initial_elimination_offset (FB_REGNO, SP_REGNO) - reg_save_size;
-   if (frame_size == 0
-       && !m32c_function_needs_enter ())
-     cfun->machine->use_rts = 1;
- 
-   if (flag_stack_usage_info)
-     current_function_static_stack_size = frame_size;
- 
-   if (frame_size > 254)
-     {
-       extra_frame_size = frame_size - 254;
-       frame_size = 254;
-     }
-   if (cfun->machine->use_rts == 0)
-     F (emit_insn (m32c_all_frame_related
- 		  (TARGET_A16
- 		   ? gen_prologue_enter_16 (GEN_INT (frame_size + 2))
- 		   : gen_prologue_enter_24 (GEN_INT (frame_size + 4)))));
- 
-   if (extra_frame_size)
-     {
-       complex_prologue = 1;
-       if (TARGET_A16)
- 	F (emit_insn (gen_addhi3 (gen_rtx_REG (HImode, SP_REGNO),
- 				  gen_rtx_REG (HImode, SP_REGNO),
- 				  GEN_INT (-extra_frame_size))));
-       else
- 	F (emit_insn (gen_addpsi3 (gen_rtx_REG (PSImode, SP_REGNO),
- 				   gen_rtx_REG (PSImode, SP_REGNO),
- 				   GEN_INT (-extra_frame_size))));
-     }
- 
-   complex_prologue += m32c_pushm_popm (PP_pushm);
- 
-   /* This just emits a comment into the .s file for debugging.  */
-   if (complex_prologue)
-     emit_insn (gen_prologue_end ());
- }
- 
- /* Likewise, for the epilogue.  The only exception is that, for
-    interrupts, we must manually unwind the frame as the REIT opcode
-    doesn't do that.  */
- void
- m32c_emit_epilogue (void)
- {
-   int popm_count = m32c_pushm_popm (PP_justcount);
- 
-   /* This just emits a comment into the .s file for debugging.  */
-   if (popm_count > 0 || cfun->machine->is_interrupt)
-     emit_insn (gen_epilogue_start ());
- 
-   if (popm_count > 0)
-     m32c_pushm_popm (PP_popm);
- 
-   if (cfun->machine->is_interrupt)
-     {
-       machine_mode spmode = TARGET_A16 ? HImode : PSImode;
- 
-       /* REIT clears B flag and restores $fp for us, but we still
- 	 have to fix up the stack.  USE_RTS just means we didn't
- 	 emit ENTER.  */
-       if (!cfun->machine->use_rts)
- 	{
- 	  emit_move_insn (gen_rtx_REG (spmode, A0_REGNO),
- 			  gen_rtx_REG (spmode, FP_REGNO));
- 	  emit_move_insn (gen_rtx_REG (spmode, SP_REGNO),
- 			  gen_rtx_REG (spmode, A0_REGNO));
- 	  /* We can't just add this to the POPM because it would be in
- 	     the wrong order, and wouldn't fix the stack if we're bank
- 	     switching.  */
- 	  if (TARGET_A16)
- 	    emit_insn (gen_pophi_16 (gen_rtx_REG (HImode, FP_REGNO)));
- 	  else
- 	    emit_insn (gen_poppsi (gen_rtx_REG (PSImode, FP_REGNO)));
- 	}
-       if (!bank_switch_p (cfun->decl) && cfun->machine->intr_pushm)
- 	emit_insn (gen_popm (GEN_INT (cfun->machine->intr_pushm)));
- 
-       /* The FREIT (Fast REturn from InTerrupt) instruction should be
-          generated only for M32C/M32CM targets (generate the REIT
-          instruction otherwise).  */
-       if (fast_interrupt_p (cfun->decl))
-         {
-           /* Check if fast_attribute is set for M32C or M32CM.  */
-           if (TARGET_A24)
-             {
-               emit_jump_insn (gen_epilogue_freit ());
-             }
-           /* If fast_interrupt attribute is set for an R8C or M16C
-              target ignore this attribute and generated REIT
-              instruction.  */
-           else
- 	    {
- 	      warning (OPT_Wattributes,
- 		       "%<fast_interrupt%> attribute directive ignored");
- 	      emit_jump_insn (gen_epilogue_reit_16 ());
- 	    }
-         }
-       else if (TARGET_A16)
- 	emit_jump_insn (gen_epilogue_reit_16 ());
-       else
- 	emit_jump_insn (gen_epilogue_reit_24 ());
-     }
-   else if (cfun->machine->use_rts)
-     emit_jump_insn (gen_epilogue_rts ());
-   else if (TARGET_A16)
-     emit_jump_insn (gen_epilogue_exitd_16 ());
-   else
-     emit_jump_insn (gen_epilogue_exitd_24 ());
- }
- 
- void
- m32c_emit_eh_epilogue (rtx ret_addr)
- {
-   /* R0[R2] has the stack adjustment.  R1[R3] has the address to
-      return to.  We have to fudge the stack, pop everything, pop SP
-      (fudged), and return (fudged).  This is actually easier to do in
-      assembler, so punt to libgcc.  */
-   emit_jump_insn (gen_eh_epilogue (ret_addr, cfun->machine->eh_stack_adjust));
-   /*  emit_clobber (gen_rtx_REG (HImode, R0L_REGNO)); */
- }
- 
- /* Indicate which flags must be properly set for a given conditional.  */
- static int
- flags_needed_for_conditional (rtx cond)
- {
-   switch (GET_CODE (cond))
-     {
-     case LE:
-     case GT:
-       return FLAGS_OSZ;
-     case LEU:
-     case GTU:
-       return FLAGS_ZC;
-     case LT:
-     case GE:
-       return FLAGS_OS;
-     case LTU:
-     case GEU:
-       return FLAGS_C;
-     case EQ:
-     case NE:
-       return FLAGS_Z;
-     default:
-       return FLAGS_N;
-     }
- }
- 
- #define DEBUG_CMP 0
- 
- /* Returns true if a compare insn is redundant because it would only
-    set flags that are already set correctly.  */
- static bool
- m32c_compare_redundant (rtx_insn *cmp, rtx *operands)
- {
-   int flags_needed;
-   int pflags;
-   rtx_insn *prev;
-   rtx pp, next;
-   rtx op0, op1;
- #if DEBUG_CMP
-   int prev_icode, i;
- #endif
- 
-   op0 = operands[0];
-   op1 = operands[1];
- 
- #if DEBUG_CMP
-   fprintf(stderr, "\n\033[32mm32c_compare_redundant\033[0m\n");
-   debug_rtx(cmp);
-   for (i=0; i<2; i++)
-     {
-       fprintf(stderr, "operands[%d] = ", i);
-       debug_rtx(operands[i]);
-     }
- #endif
- 
-   next = next_nonnote_insn (cmp);
-   if (!next || !INSN_P (next))
-     {
- #if DEBUG_CMP
-       fprintf(stderr, "compare not followed by insn\n");
-       debug_rtx(next);
- #endif
-       return false;
-     }
-   if (GET_CODE (PATTERN (next)) == SET
-       && GET_CODE (XEXP ( PATTERN (next), 1)) == IF_THEN_ELSE)
-     {
-       next = XEXP (XEXP (PATTERN (next), 1), 0);
-     }
-   else if (GET_CODE (PATTERN (next)) == SET)
-     {
-       /* If this is a conditional, flags_needed will be something
- 	 other than FLAGS_N, which we test below.  */
-       next = XEXP (PATTERN (next), 1);
-     }
-   else
-     {
- #if DEBUG_CMP
-       fprintf(stderr, "compare not followed by conditional\n");
-       debug_rtx(next);
- #endif
-       return false;
-     }
- #if DEBUG_CMP
-   fprintf(stderr, "conditional is: ");
-   debug_rtx(next);
- #endif
- 
-   flags_needed = flags_needed_for_conditional (next);
-   if (flags_needed == FLAGS_N)
-     {
- #if DEBUG_CMP
-       fprintf(stderr, "compare not followed by conditional\n");
-       debug_rtx(next);
- #endif
-       return false;
-     }
- 
-   /* Compare doesn't set overflow and carry the same way that
-      arithmetic instructions do, so we can't replace those.  */
-   if (flags_needed & FLAGS_OC)
-     return false;
- 
-   prev = cmp;
-   do {
-     prev = prev_nonnote_insn (prev);
-     if (!prev)
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "No previous insn.\n");
- #endif
- 	return false;
-       }
-     if (!INSN_P (prev))
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "Previous insn is a non-insn.\n");
- #endif
- 	return false;
-       }
-     pp = PATTERN (prev);
-     if (GET_CODE (pp) != SET)
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "Previous insn is not a SET.\n");
- #endif
- 	return false;
-       }
-     pflags = get_attr_flags (prev);
- 
-     /* Looking up attributes of previous insns corrupted the recog
-        tables.  */
-     INSN_UID (cmp) = -1;
-     recog (PATTERN (cmp), cmp, 0);
- 
-     if (pflags == FLAGS_N
- 	&& reg_mentioned_p (op0, pp))
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "intermediate non-flags insn uses op:\n");
- 	debug_rtx(prev);
- #endif
- 	return false;
-       }
- 
-     /* Check for comparisons against memory - between volatiles and
-        aliases, we just can't risk this one.  */
-     if (GET_CODE (operands[0]) == MEM
- 	|| GET_CODE (operands[0]) == MEM)
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "comparisons with memory:\n");
- 	debug_rtx(prev);
- #endif
- 	return false;
-       }
- 
-     /* Check for PREV changing a register that's used to compute a
-        value in CMP, even if it doesn't otherwise change flags.  */
-     if (GET_CODE (operands[0]) == REG
- 	&& rtx_referenced_p (SET_DEST (PATTERN (prev)), operands[0]))
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "sub-value affected, op0:\n");
- 	debug_rtx(prev);
- #endif
- 	return false;
-       }
-     if (GET_CODE (operands[1]) == REG
- 	&& rtx_referenced_p (SET_DEST (PATTERN (prev)), operands[1]))
-       {
- #if DEBUG_CMP
- 	fprintf(stderr, "sub-value affected, op1:\n");
- 	debug_rtx(prev);
- #endif
- 	return false;
-       }
- 
-   } while (pflags == FLAGS_N);
- #if DEBUG_CMP
-   fprintf(stderr, "previous flag-setting insn:\n");
-   debug_rtx(prev);
-   debug_rtx(pp);
- #endif
- 
-   if (GET_CODE (pp) == SET
-       && GET_CODE (XEXP (pp, 0)) == REG
-       && REGNO (XEXP (pp, 0)) == FLG_REGNO
-       && GET_CODE (XEXP (pp, 1)) == COMPARE)
-     {
-       /* Adjacent cbranches must have the same operands to be
- 	 redundant.  */
-       rtx pop0 = XEXP (XEXP (pp, 1), 0);
-       rtx pop1 = XEXP (XEXP (pp, 1), 1);
- #if DEBUG_CMP
-       fprintf(stderr, "adjacent cbranches\n");
-       debug_rtx(pop0);
-       debug_rtx(pop1);
- #endif
-       if (rtx_equal_p (op0, pop0)
- 	  && rtx_equal_p (op1, pop1))
- 	return true;
- #if DEBUG_CMP
-       fprintf(stderr, "prev cmp not same\n");
- #endif
-       return false;
-     }
- 
-   /* Else the previous insn must be a SET, with either the source or
-      dest equal to operands[0], and operands[1] must be zero.  */
- 
-   if (!rtx_equal_p (op1, const0_rtx))
-     {
- #if DEBUG_CMP
-       fprintf(stderr, "operands[1] not const0_rtx\n");
- #endif
-       return false;
-     }
-   if (GET_CODE (pp) != SET)
-     {
- #if DEBUG_CMP
-       fprintf (stderr, "pp not set\n");
- #endif
-       return false;
-     }
-   if (!rtx_equal_p (op0, SET_SRC (pp))
-       && !rtx_equal_p (op0, SET_DEST (pp)))
-     {
- #if DEBUG_CMP
-       fprintf(stderr, "operands[0] not found in set\n");
- #endif
-       return false;
-     }
- 
- #if DEBUG_CMP
-   fprintf(stderr, "cmp flags %x prev flags %x\n", flags_needed, pflags);
- #endif
-   if ((pflags & flags_needed) == flags_needed)
-     return true;
- 
-   return false;
- }
- 
- /* Return the pattern for a compare.  This will be commented out if
-    the compare is redundant, else a normal pattern is returned.  Thus,
-    the assembler output says where the compare would have been.  */
- char *
- m32c_output_compare (rtx_insn *insn, rtx *operands)
- {
-   static char templ[] = ";cmp.b\t%1,%0";
-   /*                             ^ 5  */
- 
-   templ[5] = " bwll"[GET_MODE_SIZE(GET_MODE(operands[0]))];
-   if (m32c_compare_redundant (insn, operands))
-     {
- #if DEBUG_CMP
-       fprintf(stderr, "cbranch: cmp not needed\n");
- #endif
-       return templ;
-     }
- 
- #if DEBUG_CMP
-   fprintf(stderr, "cbranch: cmp needed: `%s'\n", templ + 1);
- #endif
-   return templ + 1;
- }
- 
- #undef TARGET_ENCODE_SECTION_INFO
- #define TARGET_ENCODE_SECTION_INFO m32c_encode_section_info
- 
- /* If the frame pointer isn't used, we detect it manually.  But the
-    stack pointer doesn't have as flexible addressing as the frame
-    pointer, so we always assume we have it.  */
- 
- #undef TARGET_FRAME_POINTER_REQUIRED
- #define TARGET_FRAME_POINTER_REQUIRED hook_bool_void_true
- 
- #undef TARGET_HARD_REGNO_NREGS
- #define TARGET_HARD_REGNO_NREGS m32c_hard_regno_nregs
- #undef TARGET_HARD_REGNO_MODE_OK
- #define TARGET_HARD_REGNO_MODE_OK m32c_hard_regno_mode_ok
- #undef TARGET_MODES_TIEABLE_P
- #define TARGET_MODES_TIEABLE_P m32c_modes_tieable_p
- 
- #undef TARGET_CAN_CHANGE_MODE_CLASS
- #define TARGET_CAN_CHANGE_MODE_CLASS m32c_can_change_mode_class
- 
- #undef TARGET_DOCUMENTATION_NAME
- #define TARGET_DOCUMENTATION_NAME "M32C"
- 
- /* The Global `targetm' Variable. */
- 
- struct gcc_target targetm = TARGET_INITIALIZER;
- 
- #include "gt-m32c.h"
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c.h gcc-17-20260510/gcc/config/m32c/m32c.h
*** gcc-17-20260503/gcc/config/m32c/m32c.h	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c.h	Thu Jan  1 00:00:00 1970
***************
*** 1,635 ****
- /* Target Definitions for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    You should have received a copy of the GNU General Public License
-    along with GCC; see the file COPYING3.  If not see
-    <http://www.gnu.org/licenses/>.  */
- 
- #ifndef GCC_M32C_H
- #define GCC_M32C_H
- 
- /* Controlling the Compilation Driver, `gcc'.  */
- 
- #undef  STARTFILE_SPEC
- #define STARTFILE_SPEC "crt0.o%s crtbegin.o%s"
- 
- #undef  ENDFILE_SPEC
- #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
- 
- #undef  LINK_SPEC
- #define LINK_SPEC "%{h*} %{v:-V} \
- 		   %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}"
- 
- /* There are four CPU series we support, but they basically break down
-    into two families - the R8C/M16C families, with 16-bit address
-    registers and one set of opcodes, and the M32CM/M32C group, with
-    24-bit address registers and a different set of opcodes.  The
-    assembler doesn't care except for which opcode set is needed; the
-    big difference is in the memory maps, which we cover in
-    LIB_SPEC.  */
- 
- #undef  ASM_SPEC
- #define ASM_SPEC "\
- %{mcpu=r8c:--m16c} \
- %{mcpu=m16c:--m16c} \
- %{mcpu=m32cm:--m32c} \
- %{mcpu=m32c:--m32c} "
- 
- /* The default is R8C hardware.  We support a simulator, which has its
-    own libgloss and link map, plus one default link map for each chip
-    family.  Most of the logic here is making sure we do the right
-    thing when no CPU is specified, which defaults to R8C.  */
- #undef  LIB_SPEC
- #define LIB_SPEC "-( -lc %{msim:-lsim}%{!msim:-lnosys} -) \
- %{msim:%{!T*: %{mcpu=m32cm:%Tsim24.ld}%{mcpu=m32c:%Tsim24.ld} \
-        %{!mcpu=m32cm:%{!mcpu=m32c:%Tsim16.ld}}}} \
- %{!T*:%{!msim: %{mcpu=m16c:%Tm16c.ld} \
- 	       %{mcpu=m32cm:%Tm32cm.ld} \
- 	       %{mcpu=m32c:%Tm32c.ld} \
- 	       %{!mcpu=m16c:%{!mcpu=m32cm:%{!mcpu=m32c:%Tr8c.ld}}}}} \
- "
- 
- /* Run-time Target Specification */
- 
- /* Nothing unusual here.  */
- #define TARGET_CPU_CPP_BUILTINS() \
-   { \
-     builtin_assert ("cpu=m32c"); \
-     builtin_assert ("machine=m32c"); \
-     builtin_define ("__m32c__=1"); \
-     if (TARGET_R8C) \
-       builtin_define ("__r8c_cpu__=1"); \
-     if (TARGET_M16C) \
-       builtin_define ("__m16c_cpu__=1"); \
-     if (TARGET_M32CM) \
-       builtin_define ("__m32cm_cpu__=1"); \
-     if (TARGET_M32C) \
-       builtin_define ("__m32c_cpu__=1"); \
-   }
- 
- /* The pragma handlers need to know if we've started processing
-    functions yet, as the memregs pragma should only be given at the
-    beginning of the file.  This variable starts off TRUE and later
-    becomes FALSE.  */
- extern int ok_to_change_target_memregs;
- 
- /* TARGET_CPU is a multi-way option set in m32c.opt.  While we could
-    use enums or defines for this, this and m32c.opt are the only
-    places that know (or care) what values are being used.  */
- #define TARGET_R8C	(target_cpu == 'r')
- #define TARGET_M16C	(target_cpu == '6')
- #define TARGET_M32CM	(target_cpu == 'm')
- #define TARGET_M32C	(target_cpu == '3')
- 
- /* Address register sizes.  Warning: these are used all over the place
-    to select between the two CPU families in general.  */
- #define TARGET_A16	(TARGET_R8C || TARGET_M16C)
- #define TARGET_A24	(TARGET_M32CM || TARGET_M32C)
- 
- /* Defining data structures for per-function information */
- 
- typedef struct GTY (()) machine_function
- {
-   /* How much we adjust the stack when returning from an exception
-      handler.  */
-   rtx eh_stack_adjust;
- 
-   /* TRUE if the current function is an interrupt handler.  */
-   int is_interrupt;
- 
-   /* TRUE if the current function is a leaf function.  Currently, this
-      only affects saving $a0 in interrupt functions.  */
-   int is_leaf;
- 
-   /* Bitmask that keeps track of which registers are used in an
-      interrupt function, so we know which ones need to be saved and
-      restored.  */
-   int intr_pushm;
-   /* Likewise, one element for each memreg that needs to be saved.  */
-   char intr_pushmem[16];
- 
-   /* TRUE if the current function can use a simple RTS to return, instead
-      of the longer ENTER/EXIT pair.  */
-   int use_rts;
- }
- machine_function;
- 
- #define INIT_EXPANDERS m32c_init_expanders ()
- 
- /* Storage Layout */
- 
- #define BITS_BIG_ENDIAN 0
- #define BYTES_BIG_ENDIAN 0
- #define WORDS_BIG_ENDIAN 0
- 
- /* We can do QI, HI, and SI operations pretty much equally well, but
-    GCC expects us to have a "native" format, so we pick the one that
-    matches "int".  Pointers are 16 bits for R8C/M16C (when TARGET_A16
-    is true) and 24 bits for M32CM/M32C (when TARGET_A24 is true), but
-    24-bit pointers are stored in 32-bit words.  */
- #define UNITS_PER_WORD 2
- #define POINTER_SIZE (TARGET_A16 ? 16 : 32)
- #define POINTERS_EXTEND_UNSIGNED 1
- /* We have a problem with libgcc2.  It only defines two versions of
-    each function, one for "int" and one for "long long".  Ie it assumes
-    that "sizeof (int) == sizeof (long)".  For the M32C this is not true
-    and we need a third set of functions.  We explicitly define
-    LIBGCC2_UNITS_PER_WORD here so that it is clear that we are expecting
-    to get the SI and DI versions from the libgcc2.c sources, and we
-    provide our own set of HI functions in m32c-lib2.c, which is why this
-    definition is surrounded by #ifndef..#endif.  */
- #ifndef LIBGCC2_UNITS_PER_WORD
- #define LIBGCC2_UNITS_PER_WORD 4
- #endif
- 
- /* These match the alignment enforced by the two types of stack operations.  */
- #define PARM_BOUNDARY (TARGET_A16 ? 8 : 16)
- #define STACK_BOUNDARY (TARGET_A16 ? 8 : 16)
- 
- /* We do this because we care more about space than about speed.  For
-    the chips with 16-bit busses, we could set these to 16 if
-    desired.  */
- #define FUNCTION_BOUNDARY 8
- #define BIGGEST_ALIGNMENT 8
- 
- /* Since we have a maximum structure alignment of 8 there
-    is no need to enforce any alignment of bitfield types.  */
- #undef  PCC_BITFIELD_TYPE_MATTERS
- #define PCC_BITFIELD_TYPE_MATTERS 0
- 
- #define STRICT_ALIGNMENT 0
- #define SLOW_BYTE_ACCESS 1
- 
- /* Layout of Source Language Data Types */
- 
- #define INT_TYPE_SIZE 16
- #define SHORT_TYPE_SIZE 16
- #define LONG_TYPE_SIZE 32
- #define LONG_LONG_TYPE_SIZE 64
- 
- #define DEFAULT_SIGNED_CHAR 1
- 
- #undef PTRDIFF_TYPE
- #define PTRDIFF_TYPE (TARGET_A16 ? "int" : "long int")
- 
- #undef UINTPTR_TYPE
- #define UINTPTR_TYPE (TARGET_A16 ? "unsigned int" : "long unsigned int")
- 
- #undef  SIZE_TYPE
- #define SIZE_TYPE "unsigned int"
- 
- #undef  WCHAR_TYPE
- #define WCHAR_TYPE "long int"
- 
- #undef  WCHAR_TYPE_SIZE
- #define WCHAR_TYPE_SIZE 32
- 
- /* REGISTER USAGE */
- 
- /* Register Basics */
- 
- /* Register layout:
- 
-         [r0h][r0l]  $r0  (16 bits, or two 8-bit halves)
-         [--------]  $r2  (16 bits)
-         [r1h][r1l]  $r1  (16 bits, or two 8-bit halves)
-         [--------]  $r3  (16 bits)
-    [---][--------]  $a0  (might be 24 bits)
-    [---][--------]  $a1  (might be 24 bits)
-    [---][--------]  $sb  (might be 24 bits)
-    [---][--------]  $fb  (might be 24 bits)
-    [---][--------]  $sp  (might be 24 bits)
-    [-------------]  $pc  (20 or 24 bits)
-              [---]  $flg (CPU flags)
-    [---][--------]  $argp (virtual)
-         [--------]  $mem0 (all 16 bits)
-           . . .
-         [--------]  $mem14
- */
- 
- #define FIRST_PSEUDO_REGISTER   20
- 
- /* Note that these two tables are modified based on which CPU family
-    you select; see m32c_conditional_register_usage for details.  */
- 
- /* r0 r2 r1 r3 - a0 a1 sb fb - sp pc flg argp - mem0..mem14 */
- #define FIXED_REGISTERS     { 0, 0, 0, 0, \
- 			      0, 0, 1, 0, \
- 			      1, 1, 0, 1, \
- 			      0, 0, 0, 0, 0, 0, 0, 0 }
- #define CALL_USED_REGISTERS { 1, 1, 1, 1, \
- 			      1, 1, 1, 0, \
- 			      1, 1, 1, 1, \
- 			      1, 1, 1, 1, 1, 1, 1, 1 }
- 
- /* The *_REGNO theme matches m32c.md and most register number
-    arguments; the PC_REGNUM is the odd one out.  */
- #ifndef PC_REGNO
- #define PC_REGNO 9
- #endif
- #define PC_REGNUM PC_REGNO
- 
- /* Order of Allocation of Registers */
- 
- #define REG_ALLOC_ORDER { \
- 	0, 1, 2, 3, 4, 5, /* r0..r3, a0, a1 */ \
-         12, 13, 14, 15, 16, 17, 18, 19, /* mem0..mem7 */	\
- 	6, 7, 8, 9, 10, 11 /* sb, fb, sp, pc, flg, ap */ }
- 
- /* How Values Fit in Registers */
- 
- #define AVOID_CCMODE_COPIES
- 
- /* Register Classes */
- 
- /* Most registers are special purpose in some form or another, so this
-    table is pretty big.  Class names are used for constraints also;
-    for example the HL_REGS class (HL below) is "Rhl" in the md files.
-    See m32c_reg_class_from_constraint for the mapping.  There's some
-    duplication so that we can better isolate the reason for using
-    constraints in the md files from the actual registers used; for
-    example we may want to exclude a1a0 from SI_REGS in the future,
-    without precluding their use as HImode registers.  */
- 
- /* m7654 - m3210 - argp flg pc sp - fb sb a1 a0 - r3 r1 r2 r0 */
- /*       mmPAR */
- #define REG_CLASS_CONTENTS \
- { { 0x00000000 }, /* NO */\
-   { 0x00000100 }, /* SP  - sp */\
-   { 0x00000080 }, /* FB  - fb */\
-   { 0x00000040 }, /* SB  - sb */\
-   { 0x000001c0 }, /* CR  - sb fb sp */\
-   { 0x00000001 }, /* R0  - r0 */\
-   { 0x00000004 }, /* R1  - r1 */\
-   { 0x00000002 }, /* R2  - r2 */\
-   { 0x00000008 }, /* R3  - r3 */\
-   { 0x00000003 }, /* R02 - r0r2 */\
-   { 0x0000000c }, /* R13 - r1r3 */\
-   { 0x00000005 }, /* HL  - r0 r1 */\
-   { 0x0000000a }, /* R23 - r2 r3 */\
-   { 0x0000000f }, /* R03 - r0r2 r1r3 */\
-   { 0x00000010 }, /* A0  - a0 */\
-   { 0x00000020 }, /* A1  - a1 */\
-   { 0x00000030 }, /* A   - a0 a1 */\
-   { 0x000000f0 }, /* AD  - a0 a1 sb fp */\
-   { 0x000001f0 }, /* PS  - a0 a1 sb fp sp */\
-   { 0x00000033 }, /* R02A  - r0r2 a0 a1 */ \
-   { 0x0000003f }, /* RA  - r0 r1 r2 r3 a0 a1 */\
-   { 0x0000007f }, /* GENERAL */\
-   { 0x00000400 }, /* FLG */\
-   { 0x000001ff }, /* HC  - r0l r1 r2 r3 a0 a1 sb fb sp */\
-   { 0x000ff000 }, /* MEM */\
-   { 0x000ff003 }, /* R02_A_MEM */\
-   { 0x000ff005 }, /* A_HL_MEM */\
-   { 0x000ff00c }, /* R1_R3_A_MEM */\
-   { 0x000ff00f }, /* R03_MEM */\
-   { 0x000ff03f }, /* A_HI_MEM */\
-   { 0x000ff0ff }, /* A_AD_CR_MEM_SI */\
-   { 0x000ff5ff }, /* ALL */\
- }
- 
- #define QI_REGS HL_REGS
- #define HI_REGS RA_REGS
- #define SI_REGS R03_REGS
- #define DI_REGS R03_REGS
- 
- enum reg_class
- {
-   NO_REGS,
-   SP_REGS,
-   FB_REGS,
-   SB_REGS,
-   CR_REGS,
-   R0_REGS,
-   R1_REGS,
-   R2_REGS,
-   R3_REGS,
-   R02_REGS,
-   R13_REGS,
-   HL_REGS,
-   R23_REGS,
-   R03_REGS,
-   A0_REGS,
-   A1_REGS,
-   A_REGS,
-   AD_REGS,
-   PS_REGS,
-   R02A_REGS,
-   RA_REGS,
-   GENERAL_REGS,
-   FLG_REGS,
-   HC_REGS,
-   MEM_REGS,
-   R02_A_MEM_REGS,
-   A_HL_MEM_REGS,
-   R1_R3_A_MEM_REGS,
-   R03_MEM_REGS,
-   A_HI_MEM_REGS,
-   A_AD_CR_MEM_SI_REGS,
-   ALL_REGS,
-   LIM_REG_CLASSES
- };
- 
- #define N_REG_CLASSES LIM_REG_CLASSES
- 
- #define REG_CLASS_NAMES {\
- "NO_REGS", \
- "SP_REGS", \
- "FB_REGS", \
- "SB_REGS", \
- "CR_REGS", \
- "R0_REGS", \
- "R1_REGS", \
- "R2_REGS", \
- "R3_REGS", \
- "R02_REGS", \
- "R13_REGS", \
- "HL_REGS", \
- "R23_REGS", \
- "R03_REGS", \
- "A0_REGS", \
- "A1_REGS", \
- "A_REGS", \
- "AD_REGS", \
- "PS_REGS", \
- "R02A_REGS", \
- "RA_REGS", \
- "GENERAL_REGS", \
- "FLG_REGS", \
- "HC_REGS", \
- "MEM_REGS", \
- "R02_A_MEM_REGS", \
- "A_HL_MEM_REGS", \
- "R1_R3_A_MEM_REGS", \
- "R03_MEM_REGS", \
- "A_HI_MEM_REGS", \
- "A_AD_CR_MEM_SI_REGS", \
- "ALL_REGS", \
- }
- 
- #define REGNO_REG_CLASS(R) m32c_regno_reg_class (R)
- 
- /* We support simple displacements off address registers, nothing else.  */
- #define BASE_REG_CLASS A_REGS
- #define INDEX_REG_CLASS NO_REGS
- 
- /* We primarily use the new "long" constraint names, with the initial
-    letter classifying the constraint type and following letters
-    specifying which.  The types are:
- 
-    I - integer values
-    R - register classes
-    S - memory references (M was used)
-    A - addresses (currently unused)
- */
- 
- #define REGNO_OK_FOR_BASE_P(NUM) m32c_regno_ok_for_base_p (NUM)
- #define REGNO_OK_FOR_INDEX_P(NUM) 0
- 
- #define LIMIT_RELOAD_CLASS(MODE,CLASS) \
-   (enum reg_class) m32c_limit_reload_class (MODE, CLASS)
- 
- #define SECONDARY_RELOAD_CLASS(CLASS,MODE,X) \
-   (enum reg_class) m32c_secondary_reload_class (CLASS, MODE, X)
- 
- #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
- 
- /* STACK AND CALLING */
- 
- /* Frame Layout */
- 
- /* Standard push/pop stack, no surprises here.  */
- 
- #define STACK_GROWS_DOWNWARD 1
- #define STACK_PUSH_CODE PRE_DEC
- #define FRAME_GROWS_DOWNWARD 1
- 
- #define FIRST_PARM_OFFSET(F) 0
- 
- #define RETURN_ADDR_RTX(COUNT,FA) m32c_return_addr_rtx (COUNT)
- 
- #define INCOMING_RETURN_ADDR_RTX m32c_incoming_return_addr_rtx()
- #define INCOMING_FRAME_SP_OFFSET (TARGET_A24 ? 4 : 3)
- 
- /* Exception Handling Support */
- 
- #define EH_RETURN_DATA_REGNO(N) m32c_eh_return_data_regno (N)
- #define EH_RETURN_STACKADJ_RTX m32c_eh_return_stackadj_rtx ()
- 
- /* Registers That Address the Stack Frame */
- 
- #ifndef FP_REGNO
- #define FP_REGNO 7
- #endif
- #ifndef SP_REGNO
- #define SP_REGNO 8
- #endif
- #define AP_REGNO 11
- 
- #define STACK_POINTER_REGNUM	SP_REGNO
- #define FRAME_POINTER_REGNUM	FP_REGNO
- #define ARG_POINTER_REGNUM	AP_REGNO
- 
- /* The static chain must be pointer-capable.  */
- #define STATIC_CHAIN_REGNUM A0_REGNO
- 
- #define DWARF_FRAME_REGISTERS 20
- #define DWARF_FRAME_REGNUM(N) m32c_dwarf_frame_regnum (N)
- #define DEBUGGER_REGNO(N) m32c_dwarf_frame_regnum (N)
- 
- #undef ASM_PREFERRED_EH_DATA_FORMAT
- /* This is the same as the default in practice, except that by making
-    it explicit we tell binutils what size pointers to use.  */
- #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
-   (TARGET_A16 ? DW_EH_PE_udata2 : DW_EH_PE_udata4)
- 
- /* Eliminating Frame Pointer and Arg Pointer */
- 
- #define ELIMINABLE_REGS \
-   {{AP_REGNO, SP_REGNO}, \
-    {AP_REGNO, FB_REGNO}, \
-    {FB_REGNO, SP_REGNO}}
- 
- #define INITIAL_ELIMINATION_OFFSET(FROM,TO,VAR) \
- 	(VAR) = m32c_initial_elimination_offset(FROM,TO)
- 
- /* Passing Function Arguments on the Stack */
- 
- #define PUSH_ROUNDING(N) m32c_push_rounding (N)
- #define CALL_POPS_ARGS(C) 0
- 
- /* Passing Arguments in Registers */
- 
- typedef struct m32c_cumulative_args
- {
-   /* For address of return value buffer (structures are returned by
-      passing the address of a buffer as an invisible first argument.
-      This identifies it).  If set, the current parameter will be put
-      on the stack, regardless of type.  */
-   int force_mem;
-   /* First parm is 1, parm 0 is hidden pointer for returning
-      aggregates.  */
-   int parm_num;
- } m32c_cumulative_args;
- 
- #define CUMULATIVE_ARGS m32c_cumulative_args
- #define INIT_CUMULATIVE_ARGS(CA,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
- 	m32c_init_cumulative_args (&(CA),FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS)
- #define FUNCTION_ARG_REGNO_P(r) m32c_function_arg_regno_p (r)
- 
- /* How Large Values Are Returned */
- 
- #define DEFAULT_PCC_STRUCT_RETURN 1
- 
- /* Function Entry and Exit */
- 
- #define EXIT_IGNORE_STACK 0
- #define EPILOGUE_USES(REGNO) m32c_epilogue_uses(REGNO)
- #define EH_USES(REGNO) 0	/* FIXME */
- 
- /* Generating Code for Profiling */
- 
- #define FUNCTION_PROFILER(FILE,LABELNO)
- 
- /* Implementing the Varargs Macros */
- 
- /* Trampolines for Nested Functions */
- 
- #define TRAMPOLINE_SIZE m32c_trampoline_size ()
- #define TRAMPOLINE_ALIGNMENT m32c_trampoline_alignment ()
- 
- /* Addressing Modes */
- 
- #define HAVE_PRE_DECREMENT 1
- #define HAVE_POST_INCREMENT 1
- #define MAX_REGS_PER_ADDRESS 1
- 
- /* This is passed to the macros below, so that they can be implemented
-    in m32c.cc.  */
- #ifdef REG_OK_STRICT
- #define REG_OK_STRICT_V 1
- #else
- #define REG_OK_STRICT_V 0
- #endif
- 
- #define REG_OK_FOR_BASE_P(X) m32c_reg_ok_for_base_p (X, REG_OK_STRICT_V)
- #define REG_OK_FOR_INDEX_P(X) 0
- 
- /* #define FIND_BASE_TERM(X) when we do unspecs for symrefs */
- 
- #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \
- 	if (m32c_legitimize_reload_address(&(X),MODE,OPNUM,TYPE,IND_LEVELS)) \
- 	  goto WIN;
- 
- /* Address spaces.  */
- #define ADDR_SPACE_FAR	1
- 
- 
- /* Condition Code Status */
- 
- #define REVERSIBLE_CC_MODE(MODE) 1
- 
- /* Dividing the Output into Sections (Texts, Data, ...) */
- 
- #define TEXT_SECTION_ASM_OP ".text"
- #define DATA_SECTION_ASM_OP ".data"
- #define BSS_SECTION_ASM_OP ".bss"
- 
- #define CTOR_LIST_BEGIN
- #define CTOR_LIST_END
- #define DTOR_LIST_BEGIN
- #define DTOR_LIST_END
- #define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array"
- #define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array"
- #define INIT_ARRAY_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array"
- #define FINI_ARRAY_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array"
- 
- /* The Overall Framework of an Assembler File */
- 
- #define ASM_COMMENT_START ";"
- #define ASM_APP_ON ""
- #define ASM_APP_OFF ""
- 
- /* Output and Generation of Labels */
- 
- #define GLOBAL_ASM_OP "\t.global\t"
- 
- /* Output of Assembler Instructions */
- 
- #define REGISTER_NAMES {	\
-   "r0", "r2", "r1", "r3", \
-   "a0", "a1", "sb", "fb", "sp", \
-   "pc", "flg", "argp", \
-   "mem0",  "mem2",  "mem4",  "mem6",  "mem8",  "mem10",  "mem12",  "mem14", \
- }
- 
- #define ADDITIONAL_REGISTER_NAMES { \
-   {"r0l", 0}, \
-   {"r1l", 2}, \
-   {"r0r2", 0}, \
-   {"r1r3", 2}, \
-   {"a0a1", 4}, \
-   {"r0r2r1r3", 0} }
- 
- #undef USER_LABEL_PREFIX
- #define USER_LABEL_PREFIX "_"
- 
- #define ASM_OUTPUT_REG_PUSH(S,R) m32c_output_reg_push (S, R)
- #define ASM_OUTPUT_REG_POP(S,R) m32c_output_reg_pop (S, R)
- 
- #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
- 	m32c_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 1)
- 
- #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \
- 	m32c_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0)
- 
- 
- /* Output of Dispatch Tables */
- 
- #define ASM_OUTPUT_ADDR_VEC_ELT(S,V) \
- 	fprintf (S, "\t.word L%d\n", V)
- 
- /* Assembler Commands for Exception Regions */
- 
- #define DWARF_CIE_DATA_ALIGNMENT -1
- 
- /* Assembler Commands for Alignment */
- 
- #define ASM_OUTPUT_ALIGN(STREAM,POWER) \
- 	fprintf (STREAM, "\t.p2align\t%d\n", POWER);
- 
- /* Controlling Debugging Information Format */
- 
- #define DWARF2_ADDR_SIZE	4
- 
- /* Miscellaneous Parameters */
- 
- #define HAS_LONG_COND_BRANCH false
- #define HAS_LONG_UNCOND_BRANCH true
- #define CASE_VECTOR_MODE SImode
- #define LOAD_EXTEND_OP(MEM) ZERO_EXTEND
- 
- #define MOVE_MAX 4
- 
- #define STORE_FLAG_VALUE 1
- 
- /* 16- or 24-bit pointers */
- #define Pmode (TARGET_A16 ? HImode : PSImode)
- #define FUNCTION_MODE QImode
- 
- #define REGISTER_TARGET_PRAGMAS() m32c_register_pragmas()
- 
- #endif
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c.md gcc-17-20260510/gcc/config/m32c/m32c.md
*** gcc-17-20260503/gcc/config/m32c/m32c.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c.md	Thu Jan  1 00:00:00 1970
***************
*** 1,79 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- (define_constants
-   [(R0_REGNO 0)
-    (R2_REGNO 1)
-    (R1_REGNO 2)
-    (R3_REGNO 3)
- 
-    (A0_REGNO 4)
-    (A1_REGNO 5)
-    (SB_REGNO 6)
-    (FB_REGNO 7)
- 
-    (SP_REGNO 8)
-    (PC_REGNO 9)
-    (FLG_REGNO 10)
-    (MEM0_REGNO 12)
-    (MEM7_REGNO 19)
-    ])
- 
- (define_constants
-   [(UNS_PROLOGUE_END 1)
-    (UNS_EPILOGUE_START 2)
-    (UNS_EH_EPILOGUE 3)
-    (UNS_PUSHM 4)
-    (UNS_POPM 5)
-    (UNS_SMOVF 6)
-    (UNS_SSTR 7)
-    (UNS_SCMPU 8)
-    (UNS_SMOVU 9)
-    (UNS_FSETB 10)
-    (UNS_FREIT 11)
-    ])
- 
- ;; n = no change, x = clobbered.  The first 16 values are chosen such
- ;; that the enum has one bit set for each flag.
- (define_attr "flags" "x,c,z,zc,s,sc,sz,szc,o,oc,oz,ozc,os,osc,osz,oszc,n" (const_string "n"))
- (define_asm_attributes [(set_attr "flags" "x")])
- 
- (define_mode_iterator QHI [QI HI])
- (define_mode_iterator HPSI [(HI "TARGET_A16") (PSI "TARGET_A24")])
- (define_mode_iterator QHPSI [QI HI (PSI "TARGET_A24")])
- (define_mode_iterator QHSI [QI HI (SI "TARGET_A24")])
- (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")])
- 
- (define_code_iterator eqne_cond [eq ne])
- 
- 
- (define_insn "nop"
-   [(const_int 0)]
-   ""
-   "nop"
-   [(set_attr "flags" "n")]
- )
- 
- (define_insn "no_insn"
-   [(const_int 1)]
-   ""
-   ""
-   [(set_attr "flags" "n")]
- )
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c.opt gcc-17-20260510/gcc/config/m32c/m32c.opt
*** gcc-17-20260503/gcc/config/m32c/m32c.opt	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c.opt	Thu Jan  1 00:00:00 1970
***************
*** 1,43 ****
- ; Target Options for R8C/M16C/M32C
- ; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ; Contributed by Red Hat.
- ;
- ; This file is part of GCC.
- ;
- ; GCC is free software; you can redistribute it and/or modify it
- ; under the terms of the GNU General Public License as published
- ; by the Free Software Foundation; either version 3, or (at your
- ; option) any later version.
- ;
- ; GCC is distributed in the hope that it will be useful, but WITHOUT
- ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ; License for more details.
- ;
- ; You should have received a copy of the GNU General Public License
- ; along with GCC; see the file COPYING3.  If not see
- ; <http://www.gnu.org/licenses/>.
- 
- msim
- Target
- -msim	Use simulator runtime.
- 
- mcpu=r8c
- Target RejectNegative Var(target_cpu,'r') Init('r')
- -mcpu=r8c	Compile code for R8C variants.
- 
- mcpu=m16c
- Target RejectNegative Var(target_cpu,'6')
- -mcpu=m16c	Compile code for M16C variants.
- 
- mcpu=m32cm
- Target RejectNegative Var(target_cpu,'m')
- -mcpu=m32cm	Compile code for M32CM variants.
- 
- mcpu=m32c
- Target RejectNegative Var(target_cpu,'3')
- -mcpu=m32c	Compile code for M32C variants.
- 
- memregs=
- Target RejectNegative Joined UInteger Var(target_memregs) Init(16)
- -memregs=	Number of memreg bytes (default: 16, range: 0..16).
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/m32c.opt.urls gcc-17-20260510/gcc/config/m32c/m32c.opt.urls
*** gcc-17-20260503/gcc/config/m32c/m32c.opt.urls	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/m32c.opt.urls	Thu Jan  1 00:00:00 1970
***************
*** 1,8 ****
- ; Autogenerated by regenerate-opt-urls.py from gcc/config/m32c/m32c.opt and generated HTML
- 
- msim
- UrlSuffix(gcc/M32C-Options.html#index-msim-4)
- 
- memregs=
- UrlSuffix(gcc/M32C-Options.html#index-memregs_003d)
- 
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/minmax.md gcc-17-20260510/gcc/config/m32c/minmax.md
*** gcc-17-20260503/gcc/config/m32c/minmax.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/minmax.md	Thu Jan  1 00:00:00 1970
***************
*** 1,57 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; min, max
- 
- (define_insn "sminqi3"
-   [(set (match_operand:QI 0 "mra_operand" "=RhlSd,RhlSd,??Rmm,??Rmm,Raa,Raa")
- 	(smin:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0")
- 		 (match_operand:QI 2 "mrai_operand" "iRhlSdRaa,?Rmm,iRhlSdRaa,?Rmm,iRhlSd,?Rmm")))]
-   "TARGET_A24"
-   "min.b\t%2,%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "sminhi3"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm")
- 	(smin:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0")
- 		 (match_operand:HI 2 "mrai_operand" "iRhiSd,?Rmm,iRhiSd,?Rmm")))]
-   "TARGET_A24"
-   "min.w\t%2,%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "smaxqi3"
-   [(set (match_operand:QI 0 "mra_operand" "=RhlSd,RhlSd,??Rmm,??Rmm,Raa,Raa")
- 	(smax:QI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0")
- 		 (match_operand:QI 2 "mrai_operand" "iRhlSdRaa,?Rmm,iRhlSdRaa,?Rmm,iRhlSd,?Rmm")))]
-   "TARGET_A24"
-   "max.b\t%2,%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "smaxhi3"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm")
- 	(smax:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0")
- 		 (match_operand:HI 2 "mrai_operand" "iRhiSd,?Rmm,iRhiSd,?Rmm")))]
-   "TARGET_A24"
-   "max.w\t%2,%0"
-   [(set_attr "flags" "n")]
-   )
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/mov.md gcc-17-20260510/gcc/config/m32c/mov.md
*** gcc-17-20260503/gcc/config/m32c/mov.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/mov.md	Thu Jan  1 00:00:00 1970
***************
*** 1,490 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; move, push, extend, etc.
- 
- ;; Be careful to never create an alternative that has memory as both
- ;; src and dest, as that makes gcc think that mem-mem moves in general
- ;; are supported.  While the chip does support this, it only has two
- ;; address registers and sometimes gcc requires more than that.  One
- ;; example is code like this: a = *b where both a and b are spilled to
- ;; the stack.
- 
- (define_insn "mov<mode>_far_op1"
-   [(set (match_operand:QHI 0 "register_operand" "=Rhi")
- 	(mem:QHI (plus:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "Ra0"))
- 			 (match_operand 2 "immediate_operand" "si"))))
-    ]
-   ""
-   "lde.<bwl>\t%D2[%1],%0"
-   [(set_attr "flags" "sz")]
-   )
- 
- (define_insn "mov<mode>_far_op2"
-   [(set (mem:QHI (plus:SI (sign_extend:SI (match_operand:HI 0 "register_operand" "Ra0"))
- 			 (match_operand 1 "immediate_operand" "si")))
- 	(match_operand:QHI 2 "register_operand"
- 			  "=Rhi"))
-    ]
-   ""
-   "ste.<bwl>\t%2,%D1[%0]"
-   [(set_attr "flags" "sz")]
-   )
- 
- ;; Match push/pop before mov.b for passing char as arg,
- ;; e.g. stdlib/efgcvt.c.
- (define_insn "movqi_op"
-   [(set (match_operand:QI 0 "m32c_nonimmediate_operand"
- 			  "=SF,Rhi*Rmm, Rqi*Rmm, <,          RqiSd*Rmm, SdSs,    Rqi*Rmm, Sd")
- 	(match_operand:QI 1 "m32c_any_operand"
- 			  "Rhi*Rmm,SF, iRqi*Rmm, iRqiSd*Rmm, >,         Rqi*Rmm, SdSs,    i"))]
-   "m32c_mov_ok (operands, QImode)"
-   "@
-     lde.b\t%1,%0
-     ste.b\t%1,%0
-     mov.b\t%1,%0
-     push.b\t%1
-     pop.b\t%0
-     mov.b\t%1,%0
-     mov.b\t%1,%0
-     mov.b\t%1,%0"
-   [(set_attr "flags" "sz,sz,sz,*,*,sz,sz,sz")]
-   )
- 
- (define_expand "movqi"
-   [(set (match_operand:QI 0 "nonimmediate_operand" "=RqiSd*Rmm")
- 	(match_operand:QI 1 "general_operand" "iRqiSd*Rmm"))]
-   ""
-   "if (m32c_prepare_move (operands, QImode)) DONE;"
-   )
- 
- 
- (define_insn "movhi_op"
-   [(set (match_operand:HI 0 "m32c_nonimmediate_operand"
- 			  "=SF,Rhi*Rmm, Rhi*Rmm,     Sd, SdSs,   *Rcr, RhiSd*Rmm, <, RhiSd*Rmm, <, *Rcr")
- 	(match_operand:HI 1 "m32c_any_operand"
- 			  " Rhi*Rmm,SF, iRhi*RmmSdSs, i, Rhi*Rmm, RhiSd*Rmm, *Rcr, iRhiSd*Rmm, >, *Rcr, >"))]
-   "m32c_mov_ok (operands, HImode)"
-   "@
-    ste.w\t%1,%0
-    lde.w\t%1,%0
-    mov.w\t%1,%0
-    mov.w\t%1,%0
-    mov.w\t%1,%0
-    ldc\t%1,%0
-    stc\t%1,%0
-    push.w\t%1
-    pop.w\t%0
-    pushc\t%1
-    popc\t%0"
-   [(set_attr "flags" "sz,sz,sz,sz,sz,n,n,n,n,n,n")]
-   )
- 
- (define_expand "movhi"
-   [(set (match_operand:HI 0 "m32c_nonimmediate_operand" "=RhiSd*Rmm")
- 	(match_operand:HI 1 "m32c_any_operand" "iRhiSd*Rmm"))]
-   ""
-   "if (m32c_prepare_move (operands, HImode)) DONE;"
-   )
- 
- 
- (define_insn "movpsi_op"
-   [(set (match_operand:PSI 0 "m32c_nonimmediate_operand"
- 			   "=Raa, SdRmmRpi,  Rcl,  RpiSd*Rmm, <,       <, Rcl, RpiRaa*Rmm")
- 	(match_operand:PSI 1 "m32c_any_operand"
- 			   "sIU3, iSdRmmRpi, iRpiSd*Rmm, Rcl, Rpi*Rmm, Rcl, >, >"))]
-   "TARGET_A24 && m32c_mov_ok (operands, PSImode)"
-   "@
-    mov.l:s\t%1,%0
-    mov.l\t%1,%0
-    ldc\t%1,%0
-    stc\t%1,%0
-    push.l\t%1
-    pushc\t%1
-    popc\t%0
-    #"
-   [(set_attr "flags" "sz,sz,n,n,n,n,n,*")]
-   )
- 
- 
- ;; The intention here is to combine the add with the move to create an
- ;; indexed move.  GCC doesn't always figure this out itself.
- 
- (define_peephole2
-   [(set (match_operand:HPSI 0 "register_operand" "")
- 	(plus:HPSI (match_operand:HPSI 1 "register_operand" "")
- 		   (match_operand:HPSI 2 "immediate_operand" "")))
-    (set (match_operand:QHSI 3 "nonimmediate_operand" "")
- 	(mem:QHSI (match_operand:HPSI 4 "register_operand" "")))]
-   "REGNO (operands[0]) == REGNO (operands[1])
-    && REGNO (operands[0]) == REGNO (operands[4])
-    && (rtx_equal_p (operands[0], operands[3])
-        || (dead_or_set_p (peep2_next_insn (1), operands[4])
-           && ! reg_mentioned_p (operands[0], operands[3])))"
-   [(set (match_dup 3)
- 	(mem:QHSI (plus:HPSI (match_dup 1)
- 			     (match_dup 2))))]
-   "")
- 
- (define_peephole2
-   [(set (match_operand:HPSI 0 "register_operand" "")
- 	(plus:HPSI (match_operand:HPSI 1 "register_operand" "")
- 		   (match_operand:HPSI 2 "immediate_operand" "")))
-    (set (mem:QHSI (match_operand:HPSI 4 "register_operand" ""))
- 	(match_operand:QHSI 3 "m32c_any_operand" ""))]
-   "REGNO (operands[0]) == REGNO (operands[1])
-    && REGNO (operands[0]) == REGNO (operands[4])
-    && dead_or_set_p (peep2_next_insn (1), operands[4])
-    && ! reg_mentioned_p (operands[0], operands[3])"
-   [(set (mem:QHSI (plus:HPSI (match_dup 1)
- 			     (match_dup 2)))
- 	(match_dup 3))]
-   "")
- 
- ; Peephole to generate SImode mov instructions for storing an
- ; immediate double data to a memory location.
- (define_peephole2
-   [(set (match_operand:HI 0 "memory_operand" "")
-         (match_operand:HI 1 "const_int_operand" ""))
-    (set (match_operand:HI 2 "memory_operand" "")
-         (match_operand:HI 3 "const_int_operand" ""))]
-    "TARGET_A24 && m32c_immd_dbl_mov (operands, HImode)"
-    [(set (match_dup 4) (match_dup 5))]
-    ""
- )
- 
- ; Some PSI moves must be split.
- (define_split
-   [(set (match_operand:PSI 0 "m32c_nonimmediate_operand" "")
- 	(match_operand:PSI 1 "m32c_any_operand" ""))]
-   "reload_completed && m32c_split_psi_p (operands)"
-   [(set (match_dup 2)
- 	(match_dup 3))
-    (set (match_dup 4)
- 	(match_dup 5))]
-   "m32c_split_move (operands, PSImode, 3);"
-   )
- 
- (define_expand "movpsi"
-   [(set (match_operand:PSI 0 "m32c_nonimmediate_operand" "")
- 	(match_operand:PSI 1 "m32c_any_operand" ""))]
-   ""
-   "if (m32c_prepare_move (operands, PSImode)) DONE;"
-   )
- 
- 
- 
- (define_expand "movsi"
-   [(set (match_operand:SI 0 "m32c_nonimmediate_operand" "=RsiSd*Rmm")
- 	(match_operand:SI 1 "m32c_any_operand" "iRsiSd*Rmm"))]
-   ""
-   "if (m32c_split_move (operands, SImode, 0)) DONE;"
-   )
- 
- ; All SI moves are split if TARGET_A16
- (define_insn_and_split "movsi_splittable"
-   [(set (match_operand:SI 0 "m32c_nonimmediate_operand" "=RsiRaa<*Rmm,  RsiRaaSd*Rmm,  Ss")
- 	(match_operand:SI 1 "m32c_any_operand" "iRsiRaaSd*Rmm,  iRsiRaa>*Rmm,  RsiRaa*Rmm"))]
-   "TARGET_A16"
-   "#"
-   "TARGET_A16"
-   [(pc)]
-   "m32c_split_move (operands, SImode, 1); DONE;"
-   )
- 
- ; The movsi pattern doesn't always match because sometimes the modes
- ; don't match.
- (define_insn "push_a01_l"
-   [(set (mem:SI (pre_dec:PSI (reg:PSI SP_REGNO)))
- 	(match_operand:SI 0 "a_operand" "Raa"))]
-   ""
-   "push.l\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "movsi_24"
-   [(set (match_operand:SI 0 "m32c_nonimmediate_operand"  "=Rsi*Rmm,   Sd,       RsiSd*Rmm,     <")
- 	(match_operand:SI 1 "m32c_any_operand" "iRsiSd*Rmm, iRsi*Rmm, >, iRsiRaaSd*Rmm"))]
-   "TARGET_A24"
-   "@
-    mov.l\t%1,%0
-    mov.l\t%1,%0
-    #
-    push.l\t%1"
-   [(set_attr "flags" "sz,sz,*,n")]
-   )
- 
- (define_expand "movdi"
-   [(set (match_operand:DI 0 "m32c_nonimmediate_operand" "=RdiSd*Rmm")
- 	(match_operand:DI 1 "m32c_any_operand" "iRdiSd*Rmm"))]
-   ""
-   "if (m32c_split_move (operands, DImode, 0)) DONE;"
-   )
- 
- (define_insn_and_split "movdi_splittable"
-   [(set (match_operand:DI 0 "m32c_nonimmediate_operand" "=Rdi<*Rmm,RdiSd*Rmm")
- 	(match_operand:DI 1 "m32c_any_operand" "iRdiSd*Rmm,iRdi>*Rmm"))]
-   ""
-   "#"
-   "reload_completed"
-   [(pc)]
-   "m32c_split_move (operands, DImode, 1); DONE;"
-   )
- 
- 
- 
- 
- (define_insn "pushqi"
-   [(set (mem:QI (pre_dec:PSI (reg:PSI SP_REGNO)))
-         (match_operand:QI 0 "mrai_operand" "iRqiSd*Rmm"))]
-   ""
-   "push.b\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_expand "pushhi"
-   [(set (mem:HI (pre_dec:PSI (reg:PSI SP_REGNO)))
-         (match_operand:HI 0 "" ""))]
-   ""
-   "if (TARGET_A16)
-      gen_pushhi_16 (operands[0]);
-    else
-      gen_pushhi_24 (operands[0]);
-    DONE;"
-   )
- 
- (define_insn "pushhi_16"
-   [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNO)))
-         (match_operand:HI 0 "mrai_operand" "iRhiSd*Rmm,Rcr"))]
-   "TARGET_A16"
-   "@
-    push.w\t%0
-    pushc\t%0"
-   [(set_attr "flags" "n,n")]
-   )
- 
- (define_insn "pushhi_24"
-   [(set (mem:HI (pre_dec:PSI (reg:PSI SP_REGNO)))
-         (match_operand:HI 0 "mrai_operand" "iRhiSd*Rmm"))]
-   "TARGET_A24"
-   "push.w\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- ;(define_insn "pushpi"
- ;  [(set (mem:PSI (pre_dec:PSI (reg:PSI SP_REGNO)))
- ;        (match_operand:PI 0 "mrai_operand" "iRaa,Rcr"))]
- ;  "TARGET_A24"
- ;  "@
- ;   push.l\t%0
- ;   pushc\t%0"
- ;  )
- 
- (define_insn "pushsi"
-   [(set (mem:SI (pre_dec:PSI (reg:PSI SP_REGNO)))
-         (match_operand:SI 0 "mrai_operand" "iRsiSd*Rmm"))]
-   "TARGET_A24"
-   "push.l\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_expand "pophi"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,Rcr")
-         (mem:HI (post_inc:HI (reg:HI SP_REGNO))))]
-   ""
-   "if (TARGET_A16)
-      gen_pophi_16 (operands[0]);
-    else
-      gen_pophi_24 (operands[0]);
-    DONE;"
-   )
- 
- (define_insn "pophi_16"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,Rcr")
-         (mem:HI (post_inc:HI (reg:HI SP_REGNO))))]
-   "TARGET_A16"
-   "@
-    pop.w\t%0
-    popc\t%0"
-   [(set_attr "flags" "n,n")]
-   )
- 
- (define_insn "pophi_24"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm")
-         (mem:HI (post_inc:PSI (reg:PSI SP_REGNO))))]
-   "TARGET_A24"
-   "pop.w\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "poppsi"
-   [(set (match_operand:PSI 0 "cr_operand" "=Rcl")
-         (mem:PSI (post_inc:PSI (reg:PSI SP_REGNO))))]
-   "TARGET_A24"
-   "popc\t%0"
-   [(set_attr "flags" "n")]
-   )
- 
- 
- ;; Rhl used here as an HI-mode Rxl
- (define_insn "extendqihi2"
- [(set (match_operand:HI 0 "m32c_nonimmediate_operand" "=RhlSd*Rmm")
- 	(sign_extend:HI (match_operand:QI 1 "mra_operand" "0")))]
-   ""
-   "exts.b\t%1"
-   [(set_attr "flags" "sz")]
-   )
- 
- (define_insn "extendhisi2"
-   [(set (match_operand:SI 0 "register_operand" "=R03")
- 	(sign_extend:SI (match_operand:HI 1 "r0123_operand" "0")))]
-   ""
-   "*
-    if (REGNO(operands[0]) == 0) return \"exts.w\t%1\";
-    else return \"mov.w r1,r3 | sha.w #-8,r3 | sha.w #-7,r3\";"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "extendhipsi2"
-   [(set (match_operand:PSI 0 "register_operand" "=R03")
- 	(sign_extend:PSI (match_operand:HI 1 "register_operand" "0")))]
-   ""
-   "*
-    if (REGNO(operands[0]) == 0) return \"exts.w\t%1\";
-    else return \"mov.w r1,r3 | sha.w #-8,r3 | sha.w #-7,r3\";"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "extendpsisi2"
-   [(set (match_operand:SI 0 "mr_operand" "=R03Sd*Rmm")
- 	(sign_extend:SI (match_operand:PSI 1 "mr_operand" "0")))]
-   ""
-   "; expand psi %1 to si %0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "zero_extendpsisi2"
-   [(set (match_operand:SI 0 "mr_operand" "=R03Sd*Rmm")
- 	(zero_extend:SI (match_operand:PSI 1 "mr_operand" "0")))]
-   ""
-   "; expand psi %1 to si %0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "zero_extendhipsi2"
-   [(set (match_operand:PSI 0 "register_operand" "=Raa")
- 	(truncate:PSI (zero_extend:SI (match_operand:HI 1 "register_operand" "R03"))))]
-   ""
-   "mov.w\t%1,%0"
-   [(set_attr "flags" "sz")]
-   )
- 
- (define_insn "zero_extendhisi2"
-   [(set (match_operand:SI 0 "m32c_nonimmediate_operand" "=RsiSd")
- 	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")))]
-   ""
-   "mov.w\t#0,%H0"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "zero_extendqihi2"
-   [(set (match_operand:HI 0 "m32c_nonimmediate_operand" "=?Rhl,RhiSd*Rmm")
- 	(zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "0,0")))]
-   ""
-   "@
-    mov.b\t#0,%H0
-    and.w\t#255,%0"
-   [(set_attr "flags" "x,x")]
-   )
- 
- (define_insn "truncsipsi2_16"
-   [(set (match_operand:PSI 0 "m32c_nonimmediate_operand" "=RsiRadSd*Rmm,Raa,Rcr,RsiSd*Rmm")
- 	(truncate:PSI (match_operand:SI 1 "nonimmediate_operand" "0,RsiSd*Rmm,RsiSd*Rmm,Rcr")))]
-   "TARGET_A16"
-   "@
-    ; no-op trunc si %1 to psi %0
-    #
-    ldc\t%1,%0
-    stc\t%1,%0"
-   [(set_attr "flags" "n,*,n,n")]
-   )
- 
- (define_insn "trunchiqi2"
-   [(set (match_operand:QI 0 "m32c_nonimmediate_operand" "=RqiRmmSd")
- 	(truncate:QI (match_operand:HI 1 "mra_qi_operand" "0")))]
-   ""
-   "; no-op trunc hi %1 to qi %0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "truncsipsi2_24"
-   [(set (match_operand:PSI 0              "m32c_nonimmediate_operand" "=RsiSd*Rmm,Raa,!Rcl,RsiSd*Rmm")
- 	(truncate:PSI (match_operand:SI 1 "m32c_nonimmediate_operand" "0,RsiSd*Rmm,RsiSd*Rmm,!Rcl")))]
-   "TARGET_A24"
-   "@
-    ; no-op trunc si %1 to psi %0
-    mov.l\t%1,%0
-    ldc\t%1,%0
-    stc\t%1,%0"
-   [(set_attr "flags" "n,sz,n,n")]
-   )
- 
- (define_expand "truncsipsi2"
-   [(set (match_operand:PSI 0 "m32c_nonimmediate_operand" "=RsiRadSd*Rmm,Raa,Rcr,RsiSd*Rmm")
- 	(truncate:PSI (match_operand:SI 1 "m32c_nonimmediate_operand" "0,RsiSd*Rmm,RsiSd*Rmm,Rcr")))]
-   ""
-   ""
-   )
- 
- (define_expand "reload_inqi"
-   [(set (match_operand:QI 2 "" "=&Rqi")
- 	(match_operand:QI 1 "" ""))
-    (set (match_operand:QI 0 "" "")
- 	(match_dup 2))
-    ]
-   ""
-   "")
- 
- (define_expand "reload_outqi"
-   [(set (match_operand:QI 2 "" "=&Rqi")
- 	(match_operand:QI 1 "" ""))
-    (set (match_operand:QI 0 "" "")
- 	(match_dup 2))
-    ]
-   ""
-   "")
- 
- (define_expand "reload_inhi"
-   [(set (match_operand:HI 2 "" "=&Rhi")
- 	(match_operand:HI 1 "" ""))
-    (set (match_operand:HI 0 "" "")
- 	(match_dup 2))
-    ]
-   ""
-   "")
- 
- (define_expand "reload_outhi"
-   [(set (match_operand:HI 2 "" "=&Rhi")
- 	(match_operand:HI 1 "" ""))
-    (set (match_operand:HI 0 "" "")
- 	(match_dup 2))
-    ]
-   ""
-   "")
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/muldiv.md gcc-17-20260510/gcc/config/m32c/muldiv.md
*** gcc-17-20260503/gcc/config/m32c/muldiv.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/muldiv.md	Thu Jan  1 00:00:00 1970
***************
*** 1,287 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; multiply and divide
- 
- ; Here is the pattern for the const_int.
- (define_insn "mulqihi3_c"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,??Rmm")
-         (mult:HI (sign_extend:HI (match_operand:QI 1 "mra_operand" "%0,0"))
-                  (match_operand 2 "immediate_operand" "i,i")))]
-   ""
-   "mul.b\t%2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- ; Here is the pattern for registers and such.
- (define_insn "mulqihi3_r"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm,Raa,Raa")
-         (mult:HI (sign_extend:HI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0"))
-                  (sign_extend:HI (match_operand:QI 2 "mra_operand" "RqiSd,?Rmm,RqiSd,?Rmm,RhlSd,?Rmm"))))]
-   ""
-   "mul.b\t%2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- ; Don't try to sign_extend a const_int.  Same for all other multiplies.
- (define_expand "mulqihi3"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm,Raa,Raa")
-         (mult:HI (sign_extend:HI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0"))
-                  (match_operand:QI 2 "mra_operand" "RqiSd,?Rmm,RqiSd,?Rmm,RhlSd,?Rmm")))]
-   ""
-   "{ if (GET_MODE (operands[2]) != VOIDmode)
-       operands[2] = gen_rtx_SIGN_EXTEND (HImode, operands[2]); }"
- )
- 
- (define_insn "umulqihi3_c"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,??Rmm")
-         (mult:HI (zero_extend:HI (match_operand:QI 1 "mra_operand" "%0,0"))
-                  (match_operand 2 "immediate_operand" "i,i")))]
-   ""
-   "mulu.b\t%U2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_insn "umulqihi3_r"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm,Raa,Raa")
-         (mult:HI (zero_extend:HI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0"))
-                  (zero_extend:HI (match_operand:QI 2 "mra_operand" "RqiSd,?Rmm,RqiSd,?Rmm,RhlSd,?Rmm"))))]
-   ""
-   "mulu.b\t%U2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_expand "umulqihi3"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm,Raa,Raa")
-         (mult:HI (zero_extend:HI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0"))
-                  (match_operand:QI 2 "mra_operand" "RqiSd,?Rmm,RqiSd,?Rmm,RhlSd,?Rmm")))]
-   ""
-   "{ if (GET_MODE (operands[2]) != VOIDmode)
-       operands[2] = gen_rtx_ZERO_EXTEND (HImode, operands[2]); }"
- )
- 
- (define_insn "mulhisi3_c"
-   [(set (match_operand:SI 0 "ra_operand" "=Rsi")
-         (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0"))
-                  (match_operand:HI 2 "immediate_operand" "i")))]
-   ""
-   "mul.w\t%2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_insn "mulhisi3_r"
-   [(set (match_operand:SI 0 "mra_operand" "=Rsi,Rsi")
-         (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0,0"))
-                  (sign_extend:SI (match_operand:HI 2 "mra_operand" "RhiSd,?Rmm"))))]
-   ""
-   "mul.w\t%2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_expand "mulhisi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
-         (mult:SI (sign_extend:SI (match_operand:HI 1 "mra_operand" "%0,0,0,0"))
-                  (match_operand:HI 2 "mra_operand" "RhiSd,?Rmm,RhiSd,?Rmm")))]
-   ""
-   "{ if (GET_MODE (operands[2]) != VOIDmode)
-       operands[2] = gen_rtx_SIGN_EXTEND (SImode, operands[2]); }"
- )
- 
- (define_insn "umulhisi3_c"
-   [(set (match_operand:SI 0 "ra_operand" "=Rsi")
-         (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand" "%0"))
-                  (match_operand 2 "immediate_operand" "i")))]
-   ""
-   "mulu.w\t%u2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_insn "umulhisi3_r"
-   [(set (match_operand:SI 0 "mra_operand" "=Rsi,Rsi")
-         (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand" "%0,0"))
-                  (zero_extend:SI (match_operand:HI 2 "mra_operand" "RhiSd,?Rmm"))))]
-   ""
-   "mulu.w\t%u2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_expand "umulhisi3"
-   [(set (match_operand:SI 0 "mra_operand" "=RsiSd,RsiSd,??Rmm,??Rmm")
-         (mult:SI (zero_extend:SI (match_operand:HI 1 "mra_operand" "%0,0,0,0"))
-                  (match_operand:HI 2 "mra_operand" "RhiSd,?Rmm,RhiSd,?Rmm")))]
-   ""
-   "{ if (GET_MODE (operands[2]) != VOIDmode)
-       operands[2] = gen_rtx_ZERO_EXTEND (SImode, operands[2]); }"
- )
- 
- 
- ; GCC expects to be able to multiply pointer-sized integers too, but
- ; fortunately it only multiplies by powers of two, although sometimes
- ; they're negative.
- (define_insn "mulpsi3_op"
-   [(set (match_operand:PSI 0 "mra_operand" "=RsiSd")
- 	(mult:PSI (match_operand:PSI 1 "mra_operand" "%0")
- 		  (match_operand 2 "m32c_psi_scale" "Ilb")))]
-   "TARGET_A24"
-   "shl.l\t%b2,%0"
-   [(set_attr "flags" "szc")]
-   )
- 
- (define_expand "mulpsi3"
-   [(set (match_operand:PSI 0 "mra_operand" "=RsiSd")
- 	(mult:PSI (match_operand:PSI 1 "mra_operand" "%0")
- 		  (match_operand 2 "m32c_psi_scale" "Ilb")))]
-   "TARGET_A24"
-   "if (GET_CODE (operands[2]) != CONST_INT
-        || ! m32c_psi_scale (operands[2], PSImode))
-      {
-        m32c_expand_neg_mulpsi3 (operands);
-        DONE;
-      }"
-   )
- 
- (define_insn "mulsi3"
-   [(set (match_operand:SI 0 "r0123_operand" "=R02,R02")
-         (mult:SI (match_operand:SI 1 "r0123_operand" "%0,0")
-                  (match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))]
-   "TARGET_M32C"
-   "mul.l\t%2,%1"
-   [(set_attr "flags" "o")]
- )
- 
- (define_expand "divmodqi4"
-   [(set (match_dup 4)
- 	(sign_extend:HI (match_operand:QI 1 "register_operand" "0,0")))
-    (parallel [(set (match_operand:QI 0 "register_operand" "=R0w,R0w")
- 		   (div:QI (match_dup 4)
- 			   (match_operand:QI 2 "general_operand" "iRqiSd,?Rmm")))
- 	      (set (match_operand:QI 3 "register_operand" "=&R0h,&R0h")
- 		   (mod:QI (match_dup 4) (match_dup 2)))
- 	      ])]
-   "0"
-   "operands[4] = gen_reg_rtx (HImode);"
-   )
- 
- (define_insn "divmodqi4_n"
-   [(set (match_operand:QI 0 "register_operand" "=R0l,R0l")
- 	(div:QI (match_operand:HI 1 "register_operand" "R0w,R0w")
- 		(match_operand:QI 2 "general_operand" "iRqiSd,?Rmm")))
-    (set (match_operand:QI 3 "register_operand" "=R0h,R0h")
- 	(mod:QI (match_dup 1) (match_dup 2)))
-    ]
-   "0"
-   "div.b\t%2"
-   [(set_attr "flags" "o")]
-   )
- 
- (define_expand "udivmodqi4"
-   [(set (match_dup 4)
- 	(zero_extend:HI (match_operand:QI 1 "register_operand" "0,0")))
-    (parallel [(set (match_operand:QI 0 "register_operand" "=R0l,R0l")
- 		   (udiv:QI (match_dup 4)
- 			   (match_operand:QI 2 "general_operand" "iRqiSd,?Rmm")))
- 	      (set (match_operand:QI 3 "register_operand" "=&R0h,&R0h")
- 		   (umod:QI (match_dup 4) (match_dup 2)))
- 	      ])]
-   "0"
-   "operands[4] = gen_reg_rtx (HImode);"
-   )
- 
- (define_insn "udivmodqi4_n"
-   [(set (match_operand:QI 0 "register_operand" "=R0l,R0l")
- 	(udiv:QI (match_operand:HI 1 "register_operand" "R0w,R0w")
- 		(match_operand:QI 2 "general_operand" "iRqiSd,?Rmm")))
-    (set (match_operand:QI 3 "register_operand" "=R0h,R0h")
- 	(umod:QI (match_dup 1) (match_dup 2)))
-    ]
-   "0"
-   "divu.b\t%2"
-   [(set_attr "flags" "o")]
-   )
- 
- (define_expand "divmodhi4"
-   [(set (match_dup 4)
- 	(sign_extend:SI (match_operand:HI 1 "register_operand" "0,0")))
-    (parallel [(set (match_operand:HI 0 "register_operand" "=R0w,R0w")
- 		   (div:HI (match_dup 4)
- 			   (match_operand:HI 2 "general_operand" "iRhiSd,?Rmm")))
- 	      (set (match_operand:HI 3 "register_operand" "=R2w,R2w")
- 		   (mod:HI (match_dup 4) (match_dup 2)))
- 	      ])]
-   ""
-   "operands[4] = gen_reg_rtx (SImode);"
-   )
- 
- (define_insn "divmodhi4_n"
-   [(set (match_operand:HI 0 "m32c_r0_operand" "=R0w,R0w")
- 	(div:HI (match_operand:SI 1 "m32c_r0_operand" "R02,R02")
- 		(match_operand:HI 2 "m32c_notr2_operand" "iR1wR3wRaaSd,?Rmm")))
-    (set (match_operand:HI 3 "m32c_r2_operand" "=R2w,R2w")
- 	(mod:HI (match_dup 1) (match_dup 2)))
-    ]
-   ""
-   "div.w\t%2"
-   [(set_attr "flags" "o")]
-   )
- 
- (define_expand "udivmodhi4"
-   [(set (match_dup 4)
- 	(zero_extend:SI (match_operand:HI 1 "register_operand" "0,0")))
-    (parallel [(set (match_operand:HI 0 "register_operand" "=R0w,R0w")
- 		   (udiv:HI (match_dup 4)
- 			   (match_operand:HI 2 "general_operand" "iRhiSd,?Rmm")))
- 	      (set (match_operand:HI 3 "register_operand" "=R2w,R2w")
- 		   (umod:HI (match_dup 4) (match_dup 2)))
- 	      ])]
-   ""
-   "operands[4] = gen_reg_rtx (SImode);"
-   )
- 
- (define_insn "udivmodhi4_n"
-   [(set (match_operand:HI 0 "m32c_r0_operand" "=R0w,R0w")
- 	(udiv:HI (match_operand:SI 1 "m32c_r0_operand" "R02,R02")
- 		(match_operand:HI 2 "m32c_notr2_operand" "iR1wR3wRaaSd,?Rmm")))
-    (set (match_operand:HI 3 "m32c_r2_operand" "=R2w,R2w")
- 	(umod:HI (match_dup 1) (match_dup 2)))
-    ]
-   ""
-   "divu.w\t%2"
-   [(set_attr "flags" "o")]
-   )
- 
- (define_insn "divsi3"
-   [(set (match_operand:SI 0 "r0123_operand" "=R02,R02")
-         (div:SI (match_operand:SI 1 "r0123_operand" "0,0")
-                 (match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))]
-   "TARGET_M32C"
-   "div.l\t%2"
-   [(set_attr "flags" "o")]
- )
- 
- (define_insn "udivsi3"
-   [(set (match_operand:SI 0 "r0123_operand" "=R02,R02")
-         (udiv:SI (match_operand:SI 1 "r0123_operand" "0,0")
-                  (match_operand:SI 2 "mra_operand" "RsiSd,?Rmm")))]
-   "TARGET_M32C"
-   "divu.l\t%2"
-   [(set_attr "flags" "o")]
- )
- 
- 
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/predicates.md gcc-17-20260510/gcc/config/m32c/predicates.md
*** gcc-17-20260503/gcc/config/m32c/predicates.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/predicates.md	Thu Jan  1 00:00:00 1970
***************
*** 1,294 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; Predicates
- 
- ; TRUE for any valid operand.  We do this because general_operand
- ; refuses to match volatile memory refs.
- 
- (define_predicate "m32c_any_operand"
-   (ior (match_operand 0 "general_operand")
-        (match_code "mem,const_int,const_double"))
-   {
-     return ! m32c_illegal_subreg_p (op);
-   }
- )
- 
- ; Likewise for nonimmediate_operand.
- 
- (define_predicate "m32c_nonimmediate_operand"
-   (ior (match_operand 0 "nonimmediate_operand")
-        (match_code "mem"))
-   {
-     return ! m32c_illegal_subreg_p (op);
-   }
- )
- 
- ; TRUE if the operand is a pseudo-register.
- (define_predicate "m32c_pseudo"
-   (ior (and (match_code "reg")
- 	    (match_test "REGNO(op) >= FIRST_PSEUDO_REGISTER"))
-        (and (match_code "subreg")
- 	    (and (match_test "GET_CODE (XEXP (op, 0)) == REG")
- 		 (match_test "REGNO(XEXP (op,0)) >= FIRST_PSEUDO_REGISTER")))))
-        
- 
- ; Returning true causes many predicates to NOT match.  We allow
- ; subregs for type changing, but not for size changing.
- (define_predicate "m32c_wide_subreg"
-   (and (match_code "subreg")
-        (not (match_operand 0 "m32c_pseudo")))
-   {
-     unsigned int sizeo = GET_MODE_SIZE (GET_MODE (op));
-     unsigned int sizei = GET_MODE_SIZE (GET_MODE (XEXP (op, 0)));
-     sizeo = (sizeo + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
-     sizei = (sizei + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
-     return sizeo != sizei;
-   })
- 
- ; TRUE for r0 through r3, or a pseudo that reload could put in r0
- ; through r3 (likewise for the next couple too)
- (define_predicate "r0123_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) <= R3_REGNO"))))
- 
- ; TRUE for r0
- (define_predicate "m32c_r0_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == R0_REGNO"))))
- 
- ; TRUE for r1
- (define_predicate "m32c_r1_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == R1_REGNO"))))
- 
- ; TRUE for HL_CLASS (r0 or r1)
- (define_predicate "m32c_hl_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == R0_REGNO || REGNO(op) == R1_REGNO"))))
- 
- 
- ; TRUE for r2
- (define_predicate "m32c_r2_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == R2_REGNO"))))
- 
- ; TRUE for r3
- (define_predicate "m32c_r3_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == R3_REGNO"))))
- 
- ; TRUE for any general operand except r2.
- (define_predicate "m32c_notr2_operand"
-   (and (match_operand 0 "general_operand")
-        (ior (not (match_code "reg"))
- 	    (match_test "REGNO(op) != R2_REGNO"))))
- 
- ; TRUE for the stack pointer.
- (define_predicate "m32c_sp_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == SP_REGNO"))))
- 
- ; TRUE for control registers.
- (define_predicate "cr_operand"
-   (match_code "reg")
-   "return (REGNO (op) >= SB_REGNO
-            && REGNO (op) <= FLG_REGNO);")
- 
- ; TRUE for $a0 or $a1.
- (define_predicate "a_operand"
-   (and (match_code "reg")
-        (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO")))
- 
- ; TRUE for $a0 or $a1 or a pseudo
- (define_predicate "ap_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO (op) == A0_REGNO || REGNO (op) == A1_REGNO"))))
- 
- ; TRUE for r0 through r3, or a0 or a1.
- (define_predicate "ra_operand"
-   (and (and (match_operand 0 "register_operand" "")
- 	    (not (match_operand 1 "cr_operand" "")))
-        (not (match_operand 2 "m32c_wide_subreg" ""))))
- 
- ; Likewise, plus TRUE for memory references.
- (define_predicate "mra_operand"
-   (and (and (match_operand 0 "m32c_nonimmediate_operand" "")
- 	    (not (match_operand 1 "cr_operand" "")))
-        (not (match_operand 2 "m32c_wide_subreg" ""))))
- 
- ; Likewise, plus TRUE for subregs.
- (define_predicate "mras_operand"
-   (and (match_operand 0 "nonimmediate_operand" "")
-        (not (match_operand 1 "cr_operand" ""))))
- 
- ; As above, but no push/pop operations
- (define_predicate "mra_nopp_operand"
-   (match_operand 0 "mra_operand" "")
- {
-   if (GET_CODE (op) == MEM
-       && (GET_CODE (XEXP (op, 0)) == PRE_DEC
- 	  || (GET_CODE (XEXP (op, 0)) == POST_INC)))
-     return 0;
-   return 1;
- })
- 
- ; TRUE for memory, r0..r3, a0..a1, or immediates.
- (define_predicate "mrai_operand"
-   (and (and (match_operand 0 "m32c_any_operand" "")
- 	    (not (match_operand 1 "cr_operand" "")))
-        (not (match_operand 2 "m32c_wide_subreg" ""))))
- 
- ; Likewise, plus true for subregs.
- (define_predicate "mrasi_operand"
-   (and (match_operand 0 "general_operand" "")
-        (not (match_operand 1 "cr_operand" ""))))
- 
- ; TRUE for r0..r3 or memory.
- (define_predicate "mr_operand"
-   (and (match_operand 0 "mra_operand" "")
-        (not (match_operand 1 "a_operand" ""))))
- 
- ; TRUE for a0..a1 or memory.
- (define_predicate "ma_operand"
-   (ior (match_operand 0 "a_operand" "")
-        (match_operand 1 "memory_operand" "")))
- 
- ; TRUE for memory operands that are not indexed
- (define_predicate "memsym_operand"
-   (and (match_operand 0 "memory_operand" "")
-        (match_test "satisfies_constraint_Si (op)")))
- 
- ; TRUE for memory operands with small integer addresses
- (define_predicate "memimmed_operand"
-   (and (match_operand 0 "memory_operand" "")
-        (match_test "satisfies_constraint_Sp (op)")))
- 
- ; TRUE for r1h.  This is complicated since r1h isn't a register GCC
- ; normally knows about.
- (define_predicate "r1h_operand"
-   (match_code "zero_extract")
-   {
-     rtx reg = XEXP (op, 0);
-     rtx size = XEXP (op, 1);
-     rtx pos = XEXP (op, 2);
-     return (GET_CODE (reg) == REG
- 	    && REGNO (reg) == R1_REGNO
- 	    && GET_CODE (size) == CONST_INT
- 	    && INTVAL (size) == 8
- 	    && GET_CODE (pos) == CONST_INT
- 	    && INTVAL (pos) == 8);
-   })
- 
- ; TRUE if we can shift by this amount.  Constant shift counts have a
- ; limited range.
- (define_predicate "shiftcount_operand"
-   (ior (match_operand 0 "mra_operand" "")
-        (and (match_operand 2 "const_int_operand" "")
- 	    (match_test "INTVAL (op) >= -8 && INTVAL (op) && INTVAL (op) <= 8"))))
- (define_predicate "longshiftcount_operand"
-   (ior (match_operand 0 "mra_operand" "")
-        (and (match_operand 2 "const_int_operand" "")
- 	    (match_test "INTVAL (op) >= -32 && INTVAL (op) && INTVAL (op) <= 32"))))
- 
- ; TRUE for r0..r3, a0..a1, or sp.
- (define_predicate "mra_or_sp_operand"
-   (and (ior (match_operand 0 "mra_operand")
- 	    (match_operand 1 "m32c_sp_operand"))
-        (not (match_operand 2 "m32c_wide_subreg" ""))))
- 
- 
- ; TRUE for r2 or r3.
- (define_predicate "m32c_r2r3_operand"
-   (ior (and (match_code "reg")
- 	    (ior (match_test "REGNO(op) == R2_REGNO")
- 		 (match_test "REGNO(op) == R3_REGNO")))
-        (and (match_code "subreg")
- 	    (match_test "GET_CODE (XEXP (op, 0)) == REG && (REGNO (XEXP (op, 0)) == R2_REGNO || REGNO (XEXP (op, 0)) == R3_REGNO)"))))
- 
- ; Likewise, plus TRUE for a0..a1.
- (define_predicate "m32c_r2r3a_operand"
-   (ior (match_operand 0 "m32c_r2r3_operand" "")
-        (match_operand 0 "a_operand" "")))
- 
- ; These two are only for movqi - no subreg limit
- (define_predicate "mra_qi_operand"
-   (and (and (match_operand 0 "m32c_nonimmediate_operand" "")
- 	    (not (match_operand 1 "cr_operand" "")))
-        (not (match_operand 1 "m32c_r2r3a_operand" ""))))
- 
- (define_predicate "mrai_qi_operand"
-   (and (and (match_operand 0 "m32c_any_operand" "")
- 	    (not (match_operand 1 "cr_operand" "")))
-        (not (match_operand 1 "m32c_r2r3a_operand" ""))))
- 
- (define_predicate "a_qi_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (match_operand 1 "a_operand" "")))
- 
- ; TRUE for comparisons we support.
- (define_predicate "m32c_cmp_operator"
-   (match_code "eq,ne,gt,gtu,lt,ltu,ge,geu,le,leu"))
- 
- (define_predicate "m32c_eqne_operator"
-   (match_code "eq,ne"))
- 
- ; TRUE for mem0
- (define_predicate "m32c_mem0_operand"
-   (ior (match_operand 0 "m32c_pseudo" "")
-        (and (match_code "reg")
- 	    (match_test "REGNO(op) == MEM0_REGNO"))))
- 
- ; TRUE for things the call patterns can return.
- (define_predicate "m32c_return_operand"
-   (ior (match_operand 0 "m32c_r0_operand")
-        (ior (match_operand 0 "m32c_mem0_operand")
- 	    (match_code "parallel"))))
- 
- ; TRUE for constants we can multiply pointers by
- (define_predicate "m32c_psi_scale"
-   (and (match_operand 0 "const_int_operand")
-        (match_test "satisfies_constraint_Ilb (op)")))
- 
- ; TRUE for one bit set (bit) or clear (mask) out of N bits.
- 
- (define_predicate "m32c_1bit8_operand"
-   (and (match_operand 0 "const_int_operand")
-        (match_test "satisfies_constraint_Ilb (op)")))
- 
- (define_predicate "m32c_1bit16_operand"
-   (and (match_operand 0 "const_int_operand")
-        (match_test "satisfies_constraint_Ilw (op)")))
- 
- (define_predicate "m32c_1mask8_operand"
-   (and (match_operand 0 "const_int_operand")
-        (match_test "satisfies_constraint_ImB (op)")))
- 
- (define_predicate "m32c_1mask16_operand"
-   (and (match_operand 0 "const_int_operand")
-        (match_test "satisfies_constraint_Imw (op)")))
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/prologue.md gcc-17-20260510/gcc/config/m32c/prologue.md
*** gcc-17-20260503/gcc/config/m32c/prologue.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/prologue.md	Thu Jan  1 00:00:00 1970
***************
*** 1,201 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; Prologue and epilogue patterns
- 
- (define_expand "prologue"
-   [(const_int 1)]
-   ""
-   "m32c_emit_prologue(); DONE;"
-   )
- 
- ; For the next two, operands[0] is the amount of stack space we want
- ; to reserve.
- 
- ; We assume dwarf2out will process each set in sequence.
- (define_insn "prologue_enter_16"
-   [(set (mem:HI (plus:HI (reg:HI SP_REGNO) (const_int -2)))
- 	(reg:HI FB_REGNO))
-    (set (reg:HI FB_REGNO)
- 	(plus:HI (reg:HI SP_REGNO) (const_int -2)))
-    (set (reg:HI SP_REGNO)
- 	(minus:HI (reg:HI SP_REGNO)
- 	           (match_operand 0 "const_int_operand" "i")))
-    ]
-   "TARGET_A16"
-   {
-     /* This is due to binutils bug gas/4659.  */
-     if (INTVAL (operands[0]) == 2)
-       return "enter\t#0";
-     return "enter\t%0-2";
-   }
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "prologue_enter_24"
-   [(set (mem:SI (plus:PSI (reg:PSI SP_REGNO) (const_int -4)))
- 	(reg:SI FB_REGNO))
-    (set (reg:PSI FB_REGNO)
- 	(plus:PSI (reg:PSI SP_REGNO) (const_int -4)))
-    (set (reg:PSI SP_REGNO)
- 	(minus:PSI (reg:PSI SP_REGNO)
- 	           (match_operand 0 "const_int_operand" "i")))
-    ]
-   "TARGET_A24"
-   {
-     /* This is due to binutils bug gas/4659.  */
-     if (INTVAL (operands[0]) == 4)
-       return "enter\t#0";
-     return "enter\t%0-4";
-   }
-   [(set_attr "flags" "x")]
-   )
- 
- ; Just a comment, for debugging the assembler output.
- (define_insn "prologue_end"
-   [(unspec_volatile [(const_int 0)] UNS_PROLOGUE_END)]
-   ""
-   "; end of prologue"
-   [(set_attr "flags" "n")]
-   )
- 
- 
- 
- (define_expand "epilogue"
-   [(const_int 1)]
-   ""
-   "m32c_emit_epilogue(); DONE;"
-   )
- 
- (define_expand "eh_return"
-   [(match_operand:PSI 0 "" "")]
-   ""
-   "m32c_emit_eh_epilogue(operands[0]);
-    emit_barrier ();
-    DONE;"
-   )
- 
- (define_insn "eh_epilogue"
-   [(set (pc)
- 	(unspec_volatile [(match_operand 0 "m32c_r1_operand" "")
- 			  (match_operand 1 "m32c_r0_operand" "")
- 			  ] UNS_EH_EPILOGUE))
-    (return)]
-   ""
-   "jmp.a\t__m32c_eh_return"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_exitd_16"
-   [(set (reg:HI SP_REGNO)
- 	(plus:HI (reg:HI FB_REGNO)
- 	      (const_int 2)))
-    (set (reg:HI FB_REGNO)
- 	(mem:HI (reg:HI FB_REGNO)))
-    (return)
-    ]
-   "TARGET_A16"
-   "exitd"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_reit_16"
-   [(set (reg:HI SP_REGNO)
- 	(plus:HI (reg:HI SP_REGNO)
- 	      (const_int 4)))
-    (return)
-    ]
-   "TARGET_A16"
-   "reit"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_exitd_24"
-   [(set (reg:PSI SP_REGNO)
- 	(plus:PSI (reg:PSI FB_REGNO)
- 	      (const_int 4)))
-    (set (reg:PSI FB_REGNO)
- 	(mem:PSI (reg:PSI FB_REGNO)))
-    (return)
-    ]
-   "TARGET_A24"
-   "exitd"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_reit_24"
-   [(set (reg:PSI SP_REGNO)
- 	(plus:PSI (reg:PSI SP_REGNO)
- 	      (const_int 6)))
-    (return)
-    ]
-   "TARGET_A24"
-   "reit"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_freit"
-   [(unspec [(const_int 0)] UNS_FREIT)
-    (return)
-    ]
-   ""
-   "freit"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_rts"
-   [(return)
-    ]
-   ""
-   "rts"
-   [(set_attr "flags" "x")]
-   )
- 
- (define_insn "epilogue_start"
-   [(unspec_volatile [(const_int 0)] UNS_EPILOGUE_START)]
-   ""
-   "; start of epilogue"
-   [(set_attr "flags" "n")]
-   )
- 
- 
- ; These are used by the prologue/epilogue code.
- 
- (define_insn "pushm"
-   [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_PUSHM)]
-   ""
-   "pushm\t%p0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "popm"
-   [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_POPM)]
-   ""
-   "popm\t%p0"
-   [(set_attr "flags" "n")]
-   )
- 
- (define_insn "fset_b"
-   [(unspec [(const_int 0)] UNS_FSETB)]
-   ""
-   "fset\tB"
-   [(set_attr "flags" "n")]
-   )
- 
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/shift.md gcc-17-20260510/gcc/config/m32c/shift.md
*** gcc-17-20260503/gcc/config/m32c/shift.md	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/shift.md	Thu Jan  1 00:00:00 1970
***************
*** 1,351 ****
- ;; Machine Descriptions for R8C/M16C/M32C
- ;; Copyright (C) 2005-2026 Free Software Foundation, Inc.
- ;; Contributed by Red Hat.
- ;;
- ;; This file is part of GCC.
- ;;
- ;; GCC is free software; you can redistribute it and/or modify it
- ;; under the terms of the GNU General Public License as published
- ;; by the Free Software Foundation; either version 3, or (at your
- ;; option) any later version.
- ;;
- ;; GCC is distributed in the hope that it will be useful, but WITHOUT
- ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- ;; License for more details.
- ;;
- ;; You should have received a copy of the GNU General Public License
- ;; along with GCC; see the file COPYING3.  If not see
- ;; <http://www.gnu.org/licenses/>.
- 
- ;; bit shifting
- 
- ; Shifts are unusual for m32c.  We only support shifting in one
- ; "direction" but the shift count is signed.  Also, immediate shift
- ; counts have a limited range, and variable shift counts have to be in
- ; $r1h which GCC normally doesn't even know about.
- 
- ; Other than compensating for the above, the patterns below are pretty
- ; straightforward.
- 
- (define_insn "ashlqi3_i"
-   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
- 	(ashift:QI (match_operand:QI 1 "mra_operand" "0,0")
- 		   (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   ""
-   "@
-    sha.b\t%2,%0
-    mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "ashrqi3_i"
-   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
- 	(ashiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   ""
-   "@
-    sha.b\t%2,%0
-    mov.b\t%2,r1h\n\tsha.b\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "lshrqi3_i"
-   [(set (match_operand:QI 0 "mra_operand" "=RqiSd*Rmm,RqiSd*Rmm")
- 	(lshiftrt:QI (match_operand:QI 1 "mra_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   ""
-   "@
-    shl.b\t%2,%0
-    mov.b\t%2,r1h\n\tshl.b\tr1h,%0"
-   [(set_attr "flags" "szc,szc")]
-   )
- 
- 
- (define_expand "ashlqi3"
-   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
- 	(ashift:QI (match_operand:QI 1 "mra_operand" "")
- 		   (match_operand:QI 2 "general_operand" "")))
-    (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, 1, ASHIFT))
-      DONE;"
-   )
- 
- (define_expand "ashrqi3"
-   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
- 	(ashiftrt:QI (match_operand:QI 1 "mra_operand" "")
- 		     (neg:QI (match_operand:QI 2 "general_operand" ""))))
-    (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
-      DONE;"
-   )
- 
- (define_expand "lshrqi3"
-   [(parallel [(set (match_operand:QI 0 "mra_operand" "")
- 		   (lshiftrt:QI (match_operand:QI 1 "mra_operand" "")
- 				(neg:QI (match_operand:QI 2 "general_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
-      DONE;"
-   )
- 
- ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- 
- (define_insn "ashlhi3_i"
-   [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
- 	(ashift:HI (match_operand:HI 1 "mra_operand" "0,0")
- 		   (match_operand:QI 2 "mrai_operand" "In4,RqiSd")))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   ""
-   "@
-    sha.w\t%2,%0
-    mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "ashrhi3_i"
-   [(set (match_operand:HI 0 "mra_operand" "=SdRhi*Rmm,SdRhi*Rmm")
- 	(ashiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   ""
-   "@
-    sha.w\t%2,%0
-    mov.b\t%2,r1h\n\tsha.w\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "lshrhi3_i"
-   [(set (match_operand:HI 0 "mra_operand" "=RhiSd*Rmm,RhiSd*Rmm")
- 	(lshiftrt:HI (match_operand:HI 1 "mra_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "mrai_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   ""
-   "@
-    shl.w\t%2,%0
-    mov.b\t%2,r1h\n\tshl.w\tr1h,%0"
-   [(set_attr "flags" "szc,szc")]
-   )
- 
- 
- (define_expand "ashlhi3"
-   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
- 		   (ashift:HI (match_operand:HI 1 "mra_operand" "")
- 			      (match_operand:QI 2 "general_operand" "")))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, 1, ASHIFT))
-      DONE;"
-   )
- 
- (define_expand "ashrhi3"
-   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
- 		   (ashiftrt:HI (match_operand:HI 1 "mra_operand" "")
- 				(neg:QI (match_operand:QI 2 "general_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
-      DONE;"
-   )
- 
- (define_expand "lshrhi3"
-   [(parallel [(set (match_operand:HI 0 "mra_operand" "")
- 		   (lshiftrt:HI (match_operand:HI 1 "mra_operand" "")
- 				(neg:QI (match_operand:QI 2 "general_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
-      DONE;"
-   )
- 
- 
- 
- 
- ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- 
- 
- (define_insn "ashlpsi3_i"
-   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
- 	(ashift:PSI (match_operand:PSI 1 "mra_operand" "0,0")
- 		    (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd")))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A24"
-   "@
-    sha.l\t%2,%0
-    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "ashrpsi3_i"
-   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd*Rmm,R02RaaSd*Rmm")
- 	(ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
- 		      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A24"
-   "@
-    sha.l\t%2,%0
-    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "lshrpsi3_i"
-   [(set (match_operand:PSI 0 "mra_operand" "=R02RaaSd,??Rmm")
- 	(lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "0,0")
- 		      (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A24"
-   "@
-    shl.l\t%2,%0
-    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
-   [(set_attr "flags" "szc,szc")]
-   )
- 
- 
- (define_expand "ashlpsi3"
-   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
- 		   (ashift:PSI (match_operand:PSI 1 "mra_operand" "")
- 			       (match_operand:QI 2 "shiftcount_operand" "")))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   "TARGET_A24"
-   "if (m32c_prepare_shift (operands, 1, ASHIFT))
-      DONE;"
-   )
- 
- (define_expand "ashrpsi3"
-   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
- 		   (ashiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
- 				 (neg:QI (match_operand:QI 2 "shiftcount_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   "TARGET_A24"
-   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
-      DONE;"
-   )
- 
- (define_expand "lshrpsi3"
-   [(parallel [(set (match_operand:PSI 0 "mra_operand" "")
- 		   (lshiftrt:PSI (match_operand:PSI 1 "mra_operand" "")
- 				 (neg:QI (match_operand:QI 2 "shiftcount_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   "TARGET_A24"
-   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
-      DONE;"
-   )
- 
- ; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- 
- ; The m16c has a maximum shift count of -16..16, even when in a
- ; register.  It's optimal to use multiple shifts of -8..8 rather than
- ; loading larger constants into R1H multiple time.  The m32c can shift
- ; -32..32 either via immediates or in registers.  Hence, separate
- ; patterns.
- 
- 
- (define_insn "ashlsi3_16"
-   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
- 	(ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
- 		   (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd")))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A16"
-   "@
-    sha.l\t%2,%0
-    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "ashrsi3_16"
-   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
- 	(ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A16"
-   "@
-    sha.l\t%2,%0
-    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
-   [(set_attr "flags" "oszc,oszc")]
-   )
- 
- (define_insn "lshrsi3_16"
-   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
- 	(lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "shiftcount_operand" "In4,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A16"
-   "@
-    shl.l\t%2,%0
-    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
-   [(set_attr "flags" "szc,szc")]
-   )
- 
- 
- 
- (define_insn "ashlsi3_24"
-   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
- 	(ashift:SI (match_operand:SI 1 "r0123_operand" "0,0")
- 		   (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd")))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A24"
-   "@
-    sha.l\t%2,%0
-    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
-   )
- 
- (define_insn "ashrsi3_24"
-   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
- 	(ashiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A24"
-   "@
-    sha.l\t%2,%0
-    mov.b\t%2,r1h\n\tsha.l\tr1h,%0"
-   )
- 
- (define_insn "lshrsi3_24"
-   [(set (match_operand:SI 0 "r0123_operand" "=R03,R03")
- 	(lshiftrt:SI (match_operand:SI 1 "r0123_operand" "0,0")
- 		     (neg:QI (match_operand:QI 2 "longshiftcount_operand" "In6,RqiSd"))))
-    (clobber (match_scratch:HI 3 "=X,R1w"))]
-   "TARGET_A24"
-   "@
-    shl.l\t%2,%0
-    mov.b\t%2,r1h\n\tshl.l\tr1h,%0"
-   )
- 
- 
- 
- 
- (define_expand "ashlsi3"
-   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
- 		   (ashift:SI (match_operand:SI 1 "r0123_operand" "")
- 			      (match_operand:QI 2 "mrai_operand" "")))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, 1, ASHIFT))
-      DONE;"
-   )
- 
- (define_expand "ashrsi3"
-   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
- 		   (ashiftrt:SI (match_operand:SI 1 "r0123_operand" "")
- 				(neg:QI (match_operand:QI 2 "mrai_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, -1, ASHIFTRT))
-      DONE;"
-   )
- 
- (define_expand "lshrsi3"
-   [(parallel [(set (match_operand:SI 0 "r0123_operand" "")
- 		   (lshiftrt:SI (match_operand:SI 1 "r0123_operand" "")
- 				(neg:QI (match_operand:QI 2 "mrai_operand" ""))))
- 	      (clobber (match_scratch:HI 3 ""))])]
-   ""
-   "if (m32c_prepare_shift (operands, -1, LSHIFTRT))
-      DONE;"
-   )
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/m32c/t-m32c gcc-17-20260510/gcc/config/m32c/t-m32c
*** gcc-17-20260503/gcc/config/m32c/t-m32c	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/m32c/t-m32c	Thu Jan  1 00:00:00 1970
***************
*** 1,42 ****
- # Target Makefile Fragment for R8C/M16C/M32C
- # Copyright (C) 2005-2026 Free Software Foundation, Inc.
- # Contributed by Red Hat.
- #
- # This file is part of GCC.
- #
- # GCC is free software; you can redistribute it and/or modify it
- # under the terms of the GNU General Public License as published
- # by the Free Software Foundation; either version 3, or (at your
- # option) any later version.
- #
- # GCC is distributed in the hope that it will be useful, but WITHOUT
- # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- # or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
- # License for more details.
- #
- # You should have received a copy of the GNU General Public License
- # along with GCC; see the file COPYING3.  If not see
- # <http://www.gnu.org/licenses/>.
- 
- # target-specific files
- 
- md_file = $(srcdir)/common.md md
- 
- MD_FILES = m32c constraints predicates addsub bitops blkmov cond jump minmax mov muldiv prologue shift
- 
- # Doing it this way lets the gen* programs report the right line numbers.
- 
- md : $(MD_FILES:%=$(srcdir)/config/m32c/%.md) $(srcdir)/config/m32c/t-m32c
- 	for md in $(MD_FILES); do \
- 	  echo "(include \"$(srcdir)/config/m32c/$$md.md\")"; \
- 	done > md
- 
- m32c-pragma.o: $(srcdir)/config/m32c/m32c-pragma.cc $(RTL_H) $(TREE_H) $(CONFIG_H) $(TM_H)
- 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
- 
- # We support four CPU series, but R8C and M16C share one multilib, and
- # M32C and M32CM share another.
- 
- MULTILIB_OPTIONS = mcpu=m32cm
- MULTILIB_DIRNAMES = m32cm
- MULTILIB_MATCHES = mcpu?m32cm=mcpu?m32c mcpu?r8c=mcpu?m16c
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/config/microblaze/microblaze.opt.urls gcc-17-20260510/gcc/config/microblaze/microblaze.opt.urls
*** gcc-17-20260503/gcc/config/microblaze/microblaze.opt.urls	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/microblaze/microblaze.opt.urls	Sun May 10 22:32:06 2026
*************** msmall-divides
*** 10,16 ****
  UrlSuffix(gcc/MicroBlaze-Options.html#index-msmall-divides)
  
  mcpu=
! UrlSuffix(gcc/MicroBlaze-Options.html#index-mcpu_003d-3)
  
  mmemcpy
  UrlSuffix(gcc/MicroBlaze-Options.html#index-mmemcpy-1)
--- 10,16 ----
  UrlSuffix(gcc/MicroBlaze-Options.html#index-msmall-divides)
  
  mcpu=
! UrlSuffix(gcc/MicroBlaze-Options.html#index-mcpu_003d-2)
  
  mmemcpy
  UrlSuffix(gcc/MicroBlaze-Options.html#index-mmemcpy-1)
diff -Nrcpad gcc-17-20260503/gcc/config/msp430/msp430.cc gcc-17-20260510/gcc/config/msp430/msp430.cc
*** gcc-17-20260503/gcc/config/msp430/msp430.cc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/msp430/msp430.cc	Sun May 10 22:32:06 2026
*************** msp430_expand_epilogue (int is_eh)
*** 3165,3172 ****
    emit_jump_insn (gen_msp430_return ());
  }
  
! /* Implements EH_RETURN_STACKADJ_RTX.  Saved and used later in
!    m32c_emit_eh_epilogue.  */
  rtx
  msp430_eh_return_stackadj_rtx (void)
  {
--- 3165,3171 ----
    emit_jump_insn (gen_msp430_return ());
  }
  
! /* Implements EH_RETURN_STACKADJ_RTX.  */
  rtx
  msp430_eh_return_stackadj_rtx (void)
  {
diff -Nrcpad gcc-17-20260503/gcc/config/msp430/msp430.opt.urls gcc-17-20260510/gcc/config/msp430/msp430.opt.urls
*** gcc-17-20260503/gcc/config/msp430/msp430.opt.urls	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/msp430/msp430.opt.urls	Sun May 10 22:32:06 2026
***************
*** 1,7 ****
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/msp430/msp430.opt and generated HTML
  
  msim
! UrlSuffix(gcc/MSP430-Options.html#index-msim-5)
  
  mtiny-printf
  UrlSuffix(gcc/MSP430-Options.html#index-mtiny-printf)
--- 1,7 ----
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/msp430/msp430.opt and generated HTML
  
  msim
! UrlSuffix(gcc/MSP430-Options.html#index-msim-4)
  
  mtiny-printf
  UrlSuffix(gcc/MSP430-Options.html#index-mtiny-printf)
diff -Nrcpad gcc-17-20260503/gcc/config/nds32/nds32.opt.urls gcc-17-20260510/gcc/config/nds32/nds32.opt.urls
*** gcc-17-20260503/gcc/config/nds32/nds32.opt.urls	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config/nds32/nds32.opt.urls	Sun May 10 22:32:06 2026
*************** march=
*** 76,82 ****
  UrlSuffix(gcc/NDS32-Options.html#index-march_003d-1)
  
  mcpu=
! UrlSuffix(gcc/NDS32-Options.html#index-mcpu_003d-4)
  
  mconfig-fpu=
  UrlSuffix(gcc/NDS32-Options.html#index-mconfig-fpu_003d)
--- 76,82 ----
  UrlSuffix(gcc/NDS32-Options.html#index-march_003d-1)
  
  mcpu=
! UrlSuffix(gcc/NDS32-Options.html#index-mcpu_003d-3)
  
  mconfig-fpu=
  UrlSuffix(gcc/NDS32-Options.html#index-mconfig-fpu_003d)
diff -Nrcpad gcc-17-20260503/gcc/config/or1k/or1k.cc gcc-17-20260510/gcc/config/or1k/or1k.cc
*** gcc-17-20260503/gcc/config/or1k/or1k.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/or1k/or1k.cc	Sun May 10 22:32:06 2026
*************** or1k_trampoline_init (rtx m_tramp, tree
*** 1389,1398 ****
  static bool
  or1k_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
  {
!   /* For OpenRISC, GENERAL_REGS can hold anything, while
!      FLAG_REGS are really single bits within SP[SR].  */
    if (REGNO_REG_CLASS (regno) == FLAG_REGS)
!     return mode == BImode;
    return true;
  }
  
--- 1389,1399 ----
  static bool
  or1k_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
  {
!   /* For OpenRISC, GENERAL_REGS can hold anything, while FLAG_REGS are
!      really single bits within SP[SR].  Also allow condition flag register
!      in SImode to match or1k_can_change_mode_class.  */
    if (REGNO_REG_CLASS (regno) == FLAG_REGS)
!     return mode == BImode || mode == SImode;
    return true;
  }
  
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/predicates.md gcc-17-20260510/gcc/config/riscv/predicates.md
*** gcc-17-20260503/gcc/config/riscv/predicates.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/predicates.md	Sun May 10 22:32:06 2026
***************
*** 612,618 ****
    (match_code "eq,ne,le,leu,gt,gtu,lt,ltu"))
  
  (define_predicate "comparison_swappable_operator"
!   (match_code "gtu,gt,geu,ge,ltu"))
  
  (define_predicate "ge_operator"
    (match_code "ge,geu"))
--- 612,618 ----
    (match_code "eq,ne,le,leu,gt,gtu,lt,ltu"))
  
  (define_predicate "comparison_swappable_operator"
!   (match_code "gtu,gt,geu,ge,ltu,lt"))
  
  (define_predicate "ge_operator"
    (match_code "ge,geu"))
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/riscv-protos.h gcc-17-20260510/gcc/config/riscv/riscv-protos.h
*** gcc-17-20260503/gcc/config/riscv/riscv-protos.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/riscv-protos.h	Sun May 10 22:32:06 2026
*************** bool can_be_broadcast_p (rtx);
*** 790,796 ****
  bool strided_broadcast_p (rtx);
  bool gather_scatter_valid_offset_p (machine_mode);
  HOST_WIDE_INT estimated_poly_value (poly_int64, unsigned int);
! bool whole_reg_to_reg_move_p (rtx *, machine_mode, int);
  bool splat_to_scalar_move_p (rtx *);
  rtx get_fp_rounding_coefficient (machine_mode);
  }
--- 790,798 ----
  bool strided_broadcast_p (rtx);
  bool gather_scatter_valid_offset_p (machine_mode);
  HOST_WIDE_INT estimated_poly_value (poly_int64, unsigned int);
! bool whole_reg_move_p (rtx *, machine_mode, int);
! bool whole_reg_loadstore_p (rtx dest, rtx src, rtx mask, rtx avl, rtx
! 			    avl_type);
  bool splat_to_scalar_move_p (rtx *);
  rtx get_fp_rounding_coefficient (machine_mode);
  }
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/riscv-v.cc gcc-17-20260510/gcc/config/riscv/riscv-v.cc
*** gcc-17-20260503/gcc/config/riscv/riscv-v.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/riscv-v.cc	Sun May 10 22:32:06 2026
*************** shuffle_interleave_patterns (struct expa
*** 4052,4059 ****
  }
  
  
! /* Recognize even/odd patterns like [0 2 4 6].  We use two compress
!    and one slideup.  */
  
  static bool
  shuffle_even_odd_patterns (struct expand_vec_perm_d *d)
--- 4052,4060 ----
  }
  
  
! /* Recognize even/odd patterns like [0 2 4 6].  We try to use two narrow shifts
!    and one slideup when possible.  Otherwise, we use two compress and one
!    slideup.  */
  
  static bool
  shuffle_even_odd_patterns (struct expand_vec_perm_d *d)
*************** shuffle_even_odd_patterns (struct expand
*** 4087,4092 ****
--- 4088,4128 ----
    if (d->testing_p)
      return true;
  
+   /* When the element width is smaller than the greatest ELEN, we can use two
+      vnsrl instructions, each extracting the even/odd elements of one source,
+      and a vslideup instruction to merge them into one vector.
+ 
+      PR target/124996: VLS mode subregs larger than what
+      riscv_regmode_natural_size allows cause a memory roundtrip.  Therefore, for
+      now, we only do this when the mode size is no greater than the natural size
+      of the register.  Once this is fixed, the condition should be replaced by
+      the ELEN condition.  */
+   if (known_le (GET_MODE_SIZE (vmode), riscv_regmode_natural_size (vmode)))
+     {
+       unsigned int elen = GET_MODE_BITSIZE (GET_MODE_INNER (vmode));
+       unsigned int elen2x = elen * 2;
+       scalar_int_mode smode_elen2x = int_mode_for_size (elen2x, 0).require ();
+       scalar_int_mode smode = int_mode_for_size (elen, 0).require ();
+       machine_mode vmode_elen2x
+ 	= get_vector_mode (smode_elen2x, vlen / 2).require ();
+       machine_mode vmode_half = get_vector_mode (smode, vlen / 2).require ();
+       unsigned int shift_amt = even ? 0 : elen;
+       insn_code icode = code_for_pred_narrow_scalar (LSHIFTRT, vmode_elen2x);
+       rtx tmp = gen_reg_rtx (vmode);
+       rtx ops_shift1[]
+ 	= {gen_lowpart (vmode_half, d->target),
+ 	   gen_lowpart (vmode_elen2x, d->op0), gen_int_mode (shift_amt, Pmode)};
+       rtx ops_shift2[]
+ 	= {gen_lowpart (vmode_half, tmp), gen_lowpart (vmode_elen2x, d->op1),
+ 	   gen_int_mode (shift_amt, Pmode)};
+       emit_vlmax_insn (icode, BINARY_OP, ops_shift1);
+       emit_vlmax_insn (icode, BINARY_OP, ops_shift2);
+       rtx ops[] = {d->target, d->target, tmp, gen_int_mode (vlen / 2, Pmode)};
+       icode = code_for_pred_slide (UNSPEC_VSLIDEUP, vmode);
+       emit_vlmax_insn (icode, SLIDEUP_OP_MERGE, ops);
+       return true;
+     }
+ 
    machine_mode mask_mode = get_mask_mode (vmode);
    rvv_builder builder (mask_mode, vlen, 1);
    int bit = even ? 0 : 1;
*************** get_swapped_cmp_rtx_code (rtx_code code)
*** 6075,6080 ****
--- 6111,6118 ----
        return LE;
      case LTU:
        return GTU;
+     case LT:
+       return GT;
      default:
        gcc_unreachable ();
      }
*************** estimated_poly_value (poly_int64 val, un
*** 6451,6457 ****
  
  /* Return true it is whole register-register move.  */
  bool
! whole_reg_to_reg_move_p (rtx *ops, machine_mode mode, int avl_type_index)
  {
    /* An operation is a whole-register move if either
       (1) Its vlmax operand equals VLMAX
--- 6489,6495 ----
  
  /* Return true it is whole register-register move.  */
  bool
! whole_reg_move_p (rtx *ops, machine_mode mode, int avl_type_index)
  {
    /* An operation is a whole-register move if either
       (1) Its vlmax operand equals VLMAX
*************** whole_reg_to_reg_move_p (rtx *ops, machi
*** 6469,6474 ****
--- 6507,6538 ----
  	       && known_eq (INTVAL (ops[4]), GET_MODE_NUNITS (mode)))
  	return true;
      }
+ 
+   return false;
+ }
+ 
+ /* Same but for a whole-register load or store.  */
+ bool
+ whole_reg_loadstore_p (rtx dest, rtx src, rtx mask, rtx avl, rtx avl_type)
+ {
+   machine_mode mode = GET_MODE (dest);
+   if (!multiple_p (GET_MODE_SIZE (mode), BYTES_PER_RISCV_VECTOR))
+     return false;
+ 
+   if (((memory_operand (dest, mode)
+        && register_operand (src, mode))
+       || (register_operand (dest, mode)
+ 	  && memory_operand (src, mode)))
+       && satisfies_constraint_Wc1 (mask))
+     {
+       if (INTVAL (avl_type) == VLMAX)
+ 	return true;
+       /* AVL propagation PASS will transform FIXED-VLMAX with NUNITS < 32
+ 	 into NON-VLMAX with LEN = NUNITS.  */
+       else if (CONST_INT_P (avl)
+ 	       && known_eq (INTVAL (avl), GET_MODE_NUNITS (mode)))
+ 	return true;
+     }
    return false;
  }
  
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/riscv-vector-costs.cc gcc-17-20260510/gcc/config/riscv/riscv-vector-costs.cc
*** gcc-17-20260503/gcc/config/riscv/riscv-vector-costs.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/riscv-vector-costs.cc	Sun May 10 22:32:06 2026
*************** segment_loadstore_group_size (enum vect_
*** 1235,1240 ****
--- 1235,1279 ----
    return 0;
  }
  
+ /* Calculate LMUL-based cost scaling factor.
+    Larger LMUL values process more data but have proportionally
+    higher latency and register pressure.
+ 
+    Returns the cost scaling factor based on LMUL.  For LMUL > 1,
+    the factor represents the relative cost increase (2x, 4x, 8x).
+    For LMUL <= 1, returns 1 (no scaling).  */
+ static unsigned
+ get_lmul_cost_scaling (machine_mode mode)
+ {
+   if (!riscv_vla_mode_p (mode))
+     return 1;
+ 
+   enum vlmul_type vlmul = get_vlmul (mode);
+ 
+   /* Cost scaling based on LMUL and data processed.
+      Larger LMUL values have proportionally higher latency:
+      - m1 (LMUL_1): 1x (baseline)
+      - m2 (LMUL_2): 2x (processes 2x data, ~2x latency)
+      - m4 (LMUL_4): 4x (processes 4x data, ~4x latency)
+      - m8 (LMUL_8): 8x (processes 8x data, ~8x latency)
+      - mf2/mf4/mf8: 1x (fractional LMUL, already efficient)  */
+   switch (vlmul)
+     {
+     case LMUL_2:
+       return 2;
+     case LMUL_4:
+       return 4;
+     case LMUL_8:
+       return 8;
+     case LMUL_1:
+     case LMUL_F2:
+     case LMUL_F4:
+     case LMUL_F8:
+     default:
+       return 1;
+     }
+ }
+ 
  /* Adjust vectorization cost after calling riscv_builtin_vectorization_cost.
     For some statement, we would like to further fine-grain tweak the cost on
     top of riscv_builtin_vectorization_cost handling which doesn't have any
*************** costs::adjust_stmt_cost (enum vect_cost_
*** 1379,1384 ****
--- 1418,1434 ----
      default:
        break;
      }
+ 
+   /* Apply LMUL cost scaling uniformly to all vector operations.
+      Larger LMUL values have higher latency and register pressure,
+      which affects performance regardless of loop structure.  */
+   if (vectype)
+     {
+       unsigned lmul_factor = get_lmul_cost_scaling (TYPE_MODE (vectype));
+       if (lmul_factor > 1)
+ 	stmt_cost *= lmul_factor;
+     }
+ 
    return stmt_cost;
  }
  
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/riscv.cc gcc-17-20260510/gcc/config/riscv/riscv.cc
*** gcc-17-20260503/gcc/config/riscv/riscv.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/riscv.cc	Sun May 10 22:32:06 2026
*************** riscv_adjust_libcall_cfi_epilogue ()
*** 10123,10135 ****
  }
  
  static void
! riscv_gen_multi_pop_insn (bool use_multi_pop_normal, unsigned mask,
  			  unsigned multipop_size)
  {
    rtx insn;
    unsigned regs_count = riscv_multi_push_regs_count (mask);
  
!   if (!use_multi_pop_normal)
      insn = emit_insn (
        riscv_gen_multi_push_pop_insn (POP_IDX, multipop_size, regs_count));
    else
--- 10123,10135 ----
  }
  
  static void
! riscv_gen_multi_pop_insn (bool use_popret, unsigned mask,
  			  unsigned multipop_size)
  {
    rtx insn;
    unsigned regs_count = riscv_multi_push_regs_count (mask);
  
!   if (!use_popret)
      insn = emit_insn (
        riscv_gen_multi_push_pop_insn (POP_IDX, multipop_size, regs_count));
    else
*************** riscv_expand_epilogue (int style)
*** 10158,10168 ****
    unsigned fmask = frame->fmask;
    unsigned mask_fprs_push = 0;
    poly_int64 step2 = 0;
!   bool use_multi_pop_normal
!     = ((style == NORMAL_RETURN) && riscv_use_multi_push (frame));
!   bool use_multi_pop_sibcall
!     = ((style == SIBCALL_RETURN) && riscv_use_multi_push (frame));
!   bool use_multi_pop = use_multi_pop_normal || use_multi_pop_sibcall;
  
    bool use_restore_libcall
      = !use_multi_pop
--- 10158,10165 ----
    unsigned fmask = frame->fmask;
    unsigned mask_fprs_push = 0;
    poly_int64 step2 = 0;
!   bool use_multi_pop = ((style == NORMAL_RETURN) || (style == SIBCALL_RETURN))
! 		       && riscv_use_multi_push (frame);
  
    bool use_restore_libcall
      = !use_multi_pop
*************** riscv_expand_epilogue (int style)
*** 10430,10438 ****
        /* Undo the above fib.  */
        frame->mask = mask;
        frame->fmask = fmask;
!       riscv_gen_multi_pop_insn (use_multi_pop_normal, frame->mask,
! 				multipop_size);
!       if (use_multi_pop_normal)
  	return;
      }
    else if (use_restore_libcall)
--- 10427,10436 ----
        /* Undo the above fib.  */
        frame->mask = mask;
        frame->fmask = fmask;
!       bool use_popret = style == NORMAL_RETURN
! 			&& !need_shadow_stack_push_pop_p ();
!       riscv_gen_multi_pop_insn (use_popret, frame->mask, multipop_size);
!       if (use_popret)
  	return;
      }
    else if (use_restore_libcall)
*************** riscv_expand_epilogue (int style)
*** 10456,10462 ****
      {
        if (BITSET_P (cfun->machine->frame.mask, RETURN_ADDR_REGNUM)
  	  && style != SIBCALL_RETURN
! 	  && !cfun->machine->interrupt_handler_p)
  	emit_insn (gen_sspopchk (Pmode, t0));
        else
  	emit_insn (gen_sspopchk (Pmode, ra));
--- 10454,10461 ----
      {
        if (BITSET_P (cfun->machine->frame.mask, RETURN_ADDR_REGNUM)
  	  && style != SIBCALL_RETURN
! 	  && !cfun->machine->interrupt_handler_p
! 	  && !use_multi_pop)
  	emit_insn (gen_sspopchk (Pmode, t0));
        else
  	emit_insn (gen_sspopchk (Pmode, ra));
*************** riscv_expand_epilogue (int style)
*** 10483,10489 ****
        if (need_shadow_stack_push_pop_p ()
  	  && !((style == EXCEPTION_RETURN) && crtl->calls_eh_return)
  	  && BITSET_P (cfun->machine->frame.mask, RETURN_ADDR_REGNUM)
! 	  && !cfun->machine->interrupt_handler_p)
  	emit_jump_insn (gen_simple_return_internal (t0));
        else
  	emit_jump_insn (gen_simple_return_internal (ra));
--- 10482,10489 ----
        if (need_shadow_stack_push_pop_p ()
  	  && !((style == EXCEPTION_RETURN) && crtl->calls_eh_return)
  	  && BITSET_P (cfun->machine->frame.mask, RETURN_ADDR_REGNUM)
! 	  && !cfun->machine->interrupt_handler_p
! 	  && !use_multi_pop)
  	emit_jump_insn (gen_simple_return_internal (t0));
        else
  	emit_jump_insn (gen_simple_return_internal (ra));
*************** riscv_modes_tieable_p (machine_mode mode
*** 10992,10997 ****
--- 10992,11024 ----
       E.g. V2SI and DI are not tieable.  */
    if (riscv_vector_mode_p (mode1) != riscv_vector_mode_p (mode2))
      return false;
+ 
+   /* We don't allow tuple vector modes to be tied to any vector mode
+      that has different inner mode.  It may cause unnecessary type
+      conversions.
+      E.g.  RVVMF2x4HI and RVVM2DI are not tieable, but
+      RVVM1x4QI and RVVM1QI are tieable.  */
+   if (riscv_tuple_mode_p (mode1) || riscv_tuple_mode_p (mode2))
+   {
+     machine_mode subpart_mode1, subpart_mode2;
+     if (riscv_tuple_mode_p (mode1))
+     {
+       subpart_mode1 = riscv_vector::get_subpart_mode (mode1);
+       subpart_mode1 = GET_MODE_INNER (subpart_mode1);
+     }
+     else
+       subpart_mode1 = GET_MODE_INNER (mode1);
+     if (riscv_tuple_mode_p (mode2))
+     {
+       subpart_mode2 = riscv_vector::get_subpart_mode (mode2);
+       subpart_mode2 = GET_MODE_INNER (subpart_mode2);
+     }
+     else
+       subpart_mode2 = GET_MODE_INNER (mode2);
+     if (subpart_mode1 != subpart_mode2)
+       return false;
+   }
+ 
    return (mode1 == mode2
  	  || !(GET_MODE_CLASS (mode1) == MODE_FLOAT
  	       && GET_MODE_CLASS (mode2) == MODE_FLOAT));
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/riscv.md gcc-17-20260510/gcc/config/riscv/riscv.md
*** gcc-17-20260503/gcc/config/riscv/riscv.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/riscv.md	Sun May 10 22:32:06 2026
***************
*** 5168,5177 ****
  }
    [(set_attr "type" "branch")
     (set_attr "mode" "none")])
- 					
- 	
  
! ;; Standard extensions and pattern for optimization
  (include "bitmanip.md")
  (include "crypto.md")
  (include "sync.md")
--- 5168,5219 ----
  }
    [(set_attr "type" "branch")
     (set_attr "mode" "none")])
  
! ;; We can save an instruction for this case.  Essentially we can
! ;; test the (sanitized) shift count against zero.  This only comes
! ;; up for 32 bit objects on rv64.
! (define_split
!   [(set (match_operand:DI 0 "register_operand")
! 	(and:DI (subreg:DI
! 		 (ashift:SI (const_int 1)
! 			    (match_operand:QI 1 "register_operand")) 0)
! 		(const_int 1)))
!    (clobber (match_operand:DI 2 "register_operand"))]
!   "TARGET_64BIT"
!   [(set (match_dup 2) (and:DI (match_dup 1) (const_int 31)))
!    (set (match_dup 0) (eq:DI (match_dup 2) (const_int 0)))]
!   { operands[1] = gen_lowpart (DImode, operands[1]); })
! 
! ;; The basic idea is to realize that we can get the sign extension
! ;; for free when sign extracting a field shifting it such that
! ;; the sign bit of the field ends up in the SI sign bit.  In that
! ;; case it's just a slliw.
! ;;
! ;; It is tempting to do the extract+shift rewriting independent of
! ;; the outer AND.  But that's shown to regress code quality in other
! ;; contexts.  So we're being more conservative about trying to
! ;; exploit the free sign extension opportunities that show up with
! ;; shifted sign extractions
! (define_split
!   [(set (match_operand:DI 0 "register_operand")
! 	(and:DI
! 	 (ashift:DI (sign_extract:DI (match_operand:DI 1 "register_operand")
! 				     (match_operand 2 "const_int_operand")
! 				     (match_operand 3 "const_int_operand"))
! 		    (match_operand 4 "const_int_operand"))
! 	 (match_operand:DI 5 "const_int_operand")))
!    (clobber (match_operand:DI 6 "register_operand"))]
!   "(TARGET_64BIT
!     && INTVAL (operands[2]) + INTVAL (operands[4]) == 32
!     && SMALL_OPERAND (INTVAL (operands[5]) >> INTVAL (operands[4])))"
!   [(set (match_dup 6) (and:DI (match_dup 1) (match_dup 5)))
!    (set (match_dup 0) (sign_extend:DI (ashift:SI (match_dup 7) (match_dup 4))))]
! {
!   HOST_WIDE_INT new_mask = INTVAL (operands[5]) >> INTVAL (operands[4]);
!   operands[5] = GEN_INT (new_mask);
!   operands[7] = gen_lowpart (SImode, operands[6]);
! })
! 
  (include "bitmanip.md")
  (include "crypto.md")
  (include "sync.md")
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/thead-vector.md gcc-17-20260510/gcc/config/riscv/thead-vector.md
*** gcc-17-20260503/gcc/config/riscv/thead-vector.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/thead-vector.md	Sun May 10 22:32:06 2026
***************
*** 228,234 ****
     vs<vlmem_op_attr>.v\t%3,%0%p1
     vmv.v.v\t%0,%3
     vmv.v.v\t%0,%3"
!   "&& riscv_vector::whole_reg_to_reg_move_p (operands, <MODE>mode, 7)"
    [(set (match_dup 0) (match_dup 3))]
    ""
    [(set_attr "type" "vlde,vlde,vlde,vste,vimov,vimov")
--- 228,234 ----
     vs<vlmem_op_attr>.v\t%3,%0%p1
     vmv.v.v\t%0,%3
     vmv.v.v\t%0,%3"
!   "&& riscv_vector::whole_reg_move_p (operands, <MODE>mode, 7)"
    [(set (match_dup 0) (match_dup 3))]
    ""
    [(set_attr "type" "vlde,vlde,vlde,vste,vimov,vimov")
diff -Nrcpad gcc-17-20260503/gcc/config/riscv/vector.md gcc-17-20260510/gcc/config/riscv/vector.md
*** gcc-17-20260503/gcc/config/riscv/vector.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/riscv/vector.md	Sun May 10 22:32:06 2026
***************
*** 1967,1973 ****
     vse<sew>.v\t%3,%0%p1
     vmv.v.v\t%0,%3
     vmv.v.v\t%0,%3"
!   "&& riscv_vector::whole_reg_to_reg_move_p (operands, <MODE>mode, 7)"
    [(set (match_dup 0) (match_dup 3))]
    ""
    [(set_attr "type" "vlde,vlde,vlde,vste,vimov,vimov")
--- 1967,1982 ----
     vse<sew>.v\t%3,%0%p1
     vmv.v.v\t%0,%3
     vmv.v.v\t%0,%3"
!   "&& (register_operand (operands[0], <MODE>mode)
!        && register_operand (operands[3], <MODE>mode)
!        && riscv_vector::whole_reg_move_p (operands, <MODE>mode, 7))
!       || ((memory_operand (operands[0], <MODE>mode)
! 	  || memory_operand (operands[3], <MODE>mode))
! 	 && operands[2] != operands[0]
! 	 && !reload_completed
! 	 && riscv_vector::whole_reg_loadstore_p (operands[0], operands[3],
! 						 operands[1], operands[4],
! 						 operands[7]))"
    [(set (match_dup 0) (match_dup 3))]
    ""
    [(set_attr "type" "vlde,vlde,vlde,vste,vimov,vimov")
***************
*** 1975,1981 ****
  
  ;; Dedicated pattern for vse.v instruction since we can't reuse pred_mov pattern to include
  ;; memory operand as input which will produce inferior codegen.
! (define_insn "@pred_store<mode>"
    [(set (match_operand:V_VLS 0 "memory_operand"                 "+m")
  	(if_then_else:V_VLS
  	  (unspec:<VM>
--- 1984,1990 ----
  
  ;; Dedicated pattern for vse.v instruction since we can't reuse pred_mov pattern to include
  ;; memory operand as input which will produce inferior codegen.
! (define_insn_and_split "@pred_store<mode>"
    [(set (match_operand:V_VLS 0 "memory_operand"                 "+m")
  	(if_then_else:V_VLS
  	  (unspec:<VM>
***************
*** 1988,1993 ****
--- 1997,2008 ----
  	  (match_dup 0)))]
    "TARGET_VECTOR"
    "vse<sew>.v\t%2,%0%p1"
+   "&& !reload_completed
+   && riscv_vector::whole_reg_loadstore_p (operands[0], operands[2],
+ 					  operands[1], operands[3],
+ 					  operands[4])"
+   [(set (match_dup 0) (match_dup 2))]
+   ""
    [(set_attr "type" "vste")
     (set_attr "mode" "<MODE>")
     (set (attr "avl_type_idx") (const_int 4))
***************
*** 2016,2022 ****
     vmmv.m\t%0,%3
     vmclr.m\t%0
     vmset.m\t%0"
!   "&& riscv_vector::whole_reg_to_reg_move_p (operands, <MODE>mode, 5)"
    [(set (match_dup 0) (match_dup 3))]
    ""
    [(set_attr "type" "vldm,vstm,vmalu,vmalu,vmalu")
--- 2031,2037 ----
     vmmv.m\t%0,%3
     vmclr.m\t%0
     vmset.m\t%0"
!   "&& riscv_vector::whole_reg_move_p (operands, <MODE>mode, 5)"
    [(set (match_dup 0) (match_dup 3))]
    ""
    [(set_attr "type" "vldm,vstm,vmalu,vmalu,vmalu")
diff -Nrcpad gcc-17-20260503/gcc/config/rl78/rl78.opt.urls gcc-17-20260510/gcc/config/rl78/rl78.opt.urls
*** gcc-17-20260503/gcc/config/rl78/rl78.opt.urls	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rl78/rl78.opt.urls	Sun May 10 22:32:06 2026
***************
*** 1,7 ****
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/rl78/rl78.opt and generated HTML
  
  msim
! UrlSuffix(gcc/RL78-Options.html#index-msim-6)
  
  mmul=
  UrlSuffix(gcc/RL78-Options.html#index-mmul-1)
--- 1,7 ----
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/rl78/rl78.opt and generated HTML
  
  msim
! UrlSuffix(gcc/RL78-Options.html#index-msim-5)
  
  mmul=
  UrlSuffix(gcc/RL78-Options.html#index-mmul-1)
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/aix71.h gcc-17-20260510/gcc/config/rs6000/aix71.h
*** gcc-17-20260503/gcc/config/rs6000/aix71.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/aix71.h	Sun May 10 22:32:06 2026
*************** do {									\
*** 79,84 ****
--- 79,85 ----
  #undef ASM_CPU_SPEC
  #define ASM_CPU_SPEC \
  "%{mcpu=native: %(asm_cpu_native); \
+   mcpu=future: -mfuture; \
    mcpu=power11: -mpwr11; \
    mcpu=power10: -mpwr10; \
    mcpu=power9: -mpwr9; \
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/aix72.h gcc-17-20260510/gcc/config/rs6000/aix72.h
*** gcc-17-20260503/gcc/config/rs6000/aix72.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/aix72.h	Sun May 10 22:32:06 2026
*************** do {									\
*** 79,84 ****
--- 79,85 ----
  #undef ASM_CPU_SPEC
  #define ASM_CPU_SPEC \
  "%{mcpu=native: %(asm_cpu_native); \
+   mcpu=future: -mfuture; \
    mcpu=power11: -mpwr11; \
    mcpu=power10: -mpwr10; \
    mcpu=power9: -mpwr9; \
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/aix73.h gcc-17-20260510/gcc/config/rs6000/aix73.h
*** gcc-17-20260503/gcc/config/rs6000/aix73.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/aix73.h	Sun May 10 22:32:06 2026
*************** do {									\
*** 79,84 ****
--- 79,85 ----
  #undef ASM_CPU_SPEC
  #define ASM_CPU_SPEC \
  "%{mcpu=native: %(asm_cpu_native); \
+   mcpu=future: -mfuture; \
    mcpu=power11: -mpwr11; \
    mcpu=power10: -mpwr10; \
    mcpu=power9: -mpwr9; \
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/crypto.md gcc-17-20260510/gcc/config/rs6000/crypto.md
*** gcc-17-20260503/gcc/config/rs6000/crypto.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/crypto.md	Sun May 10 22:32:06 2026
***************
*** 35,41 ****
     UNSPEC_VSBOX
     UNSPEC_VSHASIGMA
     UNSPEC_VPERMXOR
!    UNSPEC_VPMSUM])
  
  ;; Iterator for VPMSUM/VPERMXOR
  (define_mode_iterator CR_mode [V16QI V8HI V4SI V2DI])
--- 35,56 ----
     UNSPEC_VSBOX
     UNSPEC_VSHASIGMA
     UNSPEC_VPERMXOR
!    UNSPEC_VPMSUM
!    UNSPEC_XXAESENCP
!    UNSPEC_XXAES128ENCP
!    UNSPEC_XXAES192ENCP
!    UNSPEC_XXAES256ENCP
!    UNSPEC_XXAESDECP
!    UNSPEC_XXAES128DECP
!    UNSPEC_XXAES192DECP
!    UNSPEC_XXAES256DECP
!    UNSPEC_XXAESGENLKP
!    UNSPEC_XXAES128GENLKP
!    UNSPEC_XXAES192GENLKP
!    UNSPEC_XXAES256GENLKP
!    UNSPEC_XXGFMUL128
!    UNSPEC_XXGFMUL128GCM
!    UNSPEC_XXGFMUL128XTS])
  
  ;; Iterator for VPMSUM/VPERMXOR
  (define_mode_iterator CR_mode [V16QI V8HI V4SI V2DI])
***************
*** 62,67 ****
--- 77,116 ----
  			  (UNSPEC_VCIPHERLAST  "vcipherlast")
  			  (UNSPEC_VNCIPHERLAST "vncipherlast")])
  
+ ;; Iterator and attribute for AES encrypt/decrypt
+ (define_int_iterator AESACC_base_code [UNSPEC_XXAESENCP
+ 				       UNSPEC_XXAESDECP])
+ (define_int_attr AESACC_base_insn [(UNSPEC_XXAESENCP  "xxaesencp")
+ 				   (UNSPEC_XXAESDECP  "xxaesdecp")])
+ 
+ ;; Iterator and attribute for AES encrypt/decrypt extended mnemonics
+ (define_int_iterator AESACC_code [UNSPEC_XXAES128ENCP
+ 				  UNSPEC_XXAES192ENCP
+ 				  UNSPEC_XXAES256ENCP
+ 				  UNSPEC_XXAES128DECP
+ 				  UNSPEC_XXAES192DECP
+ 				  UNSPEC_XXAES256DECP])
+ (define_int_attr AESACC_insn [(UNSPEC_XXAES128ENCP  "xxaes128encp")
+ 			      (UNSPEC_XXAES192ENCP  "xxaes192encp")
+ 			      (UNSPEC_XXAES256ENCP  "xxaes256encp")
+ 			      (UNSPEC_XXAES128DECP  "xxaes128decp")
+ 			      (UNSPEC_XXAES192DECP  "xxaes192decp")
+ 			      (UNSPEC_XXAES256DECP  "xxaes256decp")])
+ 
+ ;; Iterator and attribute for AES gen last key extended mnemonics
+ (define_int_iterator AESGENLKP_code [UNSPEC_XXAES128GENLKP
+ 				     UNSPEC_XXAES192GENLKP
+ 				     UNSPEC_XXAES256GENLKP])
+ (define_int_attr AESGENLKP_insn [(UNSPEC_XXAES128GENLKP  "xxaes128genlkp")
+ 				 (UNSPEC_XXAES192GENLKP  "xxaes192genlkp")
+ 				 (UNSPEC_XXAES256GENLKP  "xxaes256genlkp")])
+ 
+ ;; Iterator and attribute for AES galois field mult extended mnemonics
+ (define_int_iterator AESGF_code [UNSPEC_XXGFMUL128GCM
+ 				 UNSPEC_XXGFMUL128XTS])
+ (define_int_attr AESGF_insn [(UNSPEC_XXGFMUL128GCM  "xxgfmul128gcm")
+ 			     (UNSPEC_XXGFMUL128XTS  "xxgfmul128xts")])
+ 
  ;; 2 operand crypto instructions
  (define_insn "crypto_<CR_insn>_<mode>"
    [(set (match_operand:CR_vqdi 0 "register_operand" "=v")
***************
*** 111,113 ****
--- 160,213 ----
    "TARGET_CRYPTO"
    "vshasigma<CR_char> %0,%1,%2,%3"
    [(set_attr "type" "vecsimple")])
+ 
+ ;; AES acceleration instructions
+ 
+ (define_insn "<AESACC_base_insn>"
+   [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
+ 	(unspec:OO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		    (match_operand:OO 2 "vsx_register_operand" "wa")
+ 		    (match_operand:SI 3 "const_0_to_3_operand" "n")]
+ 		   AESACC_base_code))]
+   "TARGET_FUTURE"
+   "<AESACC_base_insn> %x0,%x1,%x2,%3")
+ 
+ (define_insn "<AESACC_insn>"
+   [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
+     (unspec:OO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		(match_operand:OO 2 "vsx_register_operand" "wa")]
+ 	       AESACC_code))]
+   "TARGET_FUTURE"
+   "<AESACC_insn> %x0,%x1,%x2")
+ 
+ (define_insn "xxaesgenlkp"
+   [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
+     (unspec:OO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		(match_operand:SI 2 "const_0_to_3_operand" "n")]
+ 	       UNSPEC_XXAESGENLKP))]
+   "TARGET_FUTURE"
+   "xxaesgenlkp %x0,%x1,%2")
+ 
+ (define_insn "<AESGENLKP_insn>"
+   [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
+     (unspec:OO [(match_operand:OO 1 "vsx_register_operand" "wa")]
+ 	       AESGENLKP_code))]
+   "TARGET_FUTURE"
+   "<AESGENLKP_insn> %x0,%x1")
+ 
+ (define_insn "xxgfmul128"
+   [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")
+     (unspec:V16QI [(match_operand:V16QI 1 "vsx_register_operand" "wa")
+ 		   (match_operand:V16QI 2 "vsx_register_operand" "wa")
+ 		   (match_operand:SI 3 "const_0_to_1_operand" "n")]
+ 		  UNSPEC_XXGFMUL128))]
+   "TARGET_FUTURE"
+   "xxgfmul128 %x0,%x1,%x2,%3")
+ 
+ (define_insn "<AESGF_insn>"
+   [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")
+     (unspec:V16QI [(match_operand:V16QI 1 "vsx_register_operand" "wa")
+ 		   (match_operand:V16QI 2 "vsx_register_operand" "wa")]
+ 		  AESGF_code))]
+   "TARGET_FUTURE"
+   "<AESGF_insn> %x0,%x1,%x2")
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-builtin.cc gcc-17-20260510/gcc/config/rs6000/rs6000-builtin.cc
*** gcc-17-20260503/gcc/config/rs6000/rs6000-builtin.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-builtin.cc	Sun May 10 22:32:06 2026
*************** rs6000_invalid_builtin (enum rs6000_gen_
*** 139,144 ****
--- 139,147 ----
      case ENB_MMA:
        error ("%qs requires the %qs option", name, "-mmma");
        break;
+     case ENB_FUTURE:
+       error ("%qs requires the %qs option", name, "-mcpu=future");
+       break;
      default:
      case ENB_ALWAYS:
        gcc_unreachable ();
*************** rs6000_builtin_is_supported (enum rs6000
*** 194,199 ****
--- 197,204 ----
        return TARGET_HTM;
      case ENB_MMA:
        return TARGET_MMA;
+     case ENB_FUTURE:
+       return TARGET_FUTURE;
      default:
        gcc_unreachable ();
      }
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-builtins.def gcc-17-20260510/gcc/config/rs6000/rs6000-builtins.def
*** gcc-17-20260503/gcc/config/rs6000/rs6000-builtins.def	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-builtins.def	Sun May 10 22:32:06 2026
***************
*** 3924,3926 ****
--- 3924,3972 ----
  
    void __builtin_vsx_stxvp (v256, unsigned long, const v256 *);
      STXVP nothing {mma,pair}
+ 
+ [future]
+   const v256 __builtin_aes_encrypt_paired (v256, v256, const int<2>);
+     XXAESENCP xxaesencp {}
+ 
+   const v256 __builtin_aes128_encrypt_paired (v256, v256);
+     XXAES128ENCP xxaes128encp {}
+ 
+   const v256 __builtin_aes192_encrypt_paired (v256, v256);
+     XXAES192ENCP xxaes192encp {}
+ 
+   const v256 __builtin_aes256_encrypt_paired (v256, v256);
+     XXAES256ENCP xxaes256encp {}
+ 
+   const v256 __builtin_aes_decrypt_paired (v256, v256, const int<2>);
+     XXAESDECP xxaesdecp {}
+ 
+   const v256 __builtin_aes128_decrypt_paired (v256, v256);
+     XXAES128DECP xxaes128decp {}
+ 
+   const v256 __builtin_aes192_decrypt_paired (v256, v256);
+     XXAES192DECP xxaes192decp {}
+ 
+   const v256 __builtin_aes256_decrypt_paired (v256, v256);
+     XXAES256DECP xxaes256decp {}
+ 
+   const v256 __builtin_aes_genlastkey_paired (v256, const int<2>);
+     XXAESGENLKP xxaesgenlkp {}
+ 
+   const v256 __builtin_aes128_genlastkey_paired (v256);
+     XXAES128GENLKP xxaes128genlkp {}
+ 
+   const v256 __builtin_aes192_genlastkey_paired (v256);
+     XXAES192GENLKP xxaes192genlkp {}
+ 
+   const v256 __builtin_aes256_genlastkey_paired (v256);
+     XXAES256GENLKP xxaes256genlkp {}
+ 
+   const vuc __builtin_galois_field_mult (vuc, vuc, const int<1>);
+     XXGFMUL128 xxgfmul128 {}
+ 
+   const vuc __builtin_galois_field_mult_gcm (vuc, vuc);
+     XXGFMUL128GCM xxgfmul128gcm {}
+ 
+   const vuc __builtin_galois_field_mult_xts (vuc, vuc);
+     XXGFMUL128XTS xxgfmul128xts {}
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-c.cc gcc-17-20260510/gcc/config/rs6000/rs6000-c.cc
*** gcc-17-20260503/gcc/config/rs6000/rs6000-c.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-c.cc	Sun May 10 22:32:06 2026
*************** rs6000_target_modify_macros (bool define
*** 437,442 ****
--- 437,444 ----
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
    if ((flags & OPTION_MASK_POWER11) != 0)
      rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+   if ((flags & OPTION_MASK_FUTURE) != 0)
+     rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
    if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
      rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
    if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-cpus.def gcc-17-20260510/gcc/config/rs6000/rs6000-cpus.def
*** gcc-17-20260503/gcc/config/rs6000/rs6000-cpus.def	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-cpus.def	Sun May 10 22:32:06 2026
***************
*** 83,88 ****
--- 83,92 ----
  #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER			\
  			      | OPTION_MASK_POWER11)
  
+ /* -mcpu=future flags.  */
+ #define FUTURE_MASKS_SERVER	(POWER11_MASKS_SERVER			\
+ 				 | OPTION_MASK_FUTURE)
+ 
  /* Flags that need to be turned off if -mno-vsx.  */
  #define OTHER_VSX_VECTOR_MASKS	(OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
  				 | OPTION_MASK_FLOAT128_KEYWORD		\
***************
*** 121,126 ****
--- 125,131 ----
  				 | OPTION_MASK_FPRND			\
  				 | OPTION_MASK_POWER10			\
  				 | OPTION_MASK_POWER11			\
+ 				 | OPTION_MASK_FUTURE			\
  				 | OPTION_MASK_P10_FUSION		\
  				 | OPTION_MASK_HTM			\
  				 | OPTION_MASK_ISEL			\
*************** RS6000_CPU ("power9", PROCESSOR_POWER9,
*** 249,254 ****
--- 254,260 ----
  	    | OPTION_MASK_HTM)
  RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)
  RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER)
+ RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER)
  RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
  RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
  	    | MASK_POWERPC64)
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-gen-builtins.cc gcc-17-20260510/gcc/config/rs6000/rs6000-gen-builtins.cc
*** gcc-17-20260503/gcc/config/rs6000/rs6000-gen-builtins.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-gen-builtins.cc	Sun May 10 22:32:06 2026
*************** enum bif_stanza
*** 232,237 ****
--- 232,238 ----
   BSTZ_P10,
   BSTZ_P10_64,
   BSTZ_MMA,
+  BSTZ_FUTURE,
   NUMBIFSTANZAS
  };
  
*************** static stanza_entry stanza_map[NUMBIFSTA
*** 265,271 ****
      { "htm",		BSTZ_HTM	},
      { "power10",	BSTZ_P10	},
      { "power10-64",	BSTZ_P10_64	},
!     { "mma",		BSTZ_MMA	}
    };
  
  static const char *enable_string[NUMBIFSTANZAS] =
--- 266,273 ----
      { "htm",		BSTZ_HTM	},
      { "power10",	BSTZ_P10	},
      { "power10-64",	BSTZ_P10_64	},
!     { "mma",		BSTZ_MMA	},
!     { "future",	BSTZ_FUTURE	}
    };
  
  static const char *enable_string[NUMBIFSTANZAS] =
*************** static const char *enable_string[NUMBIFS
*** 290,296 ****
      "ENB_HTM",
      "ENB_P10",
      "ENB_P10_64",
!     "ENB_MMA"
    };
  
  /* Function modifiers provide special handling for const, pure, and fpmath
--- 292,299 ----
      "ENB_HTM",
      "ENB_P10",
      "ENB_P10_64",
!     "ENB_MMA",
!     "ENB_FUTURE"
    };
  
  /* Function modifiers provide special handling for const, pure, and fpmath
*************** write_decls (void)
*** 2249,2255 ****
    fprintf (header_file, "  ENB_HTM,\n");
    fprintf (header_file, "  ENB_P10,\n");
    fprintf (header_file, "  ENB_P10_64,\n");
!   fprintf (header_file, "  ENB_MMA\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
--- 2252,2259 ----
    fprintf (header_file, "  ENB_HTM,\n");
    fprintf (header_file, "  ENB_P10,\n");
    fprintf (header_file, "  ENB_P10_64,\n");
!   fprintf (header_file, "  ENB_MMA,\n");
!   fprintf (header_file, "  ENB_FUTURE\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-opts.h gcc-17-20260510/gcc/config/rs6000/rs6000-opts.h
*** gcc-17-20260503/gcc/config/rs6000/rs6000-opts.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-opts.h	Sun May 10 22:32:06 2026
*************** enum processor_type
*** 71,76 ****
--- 71,78 ----
     PROCESSOR_TITAN
  };
  
+ /* Make -mtune=future use the same tuning decisions as -mtune=power11.  */
+ #define PROCESSOR_FUTURE	PROCESSOR_POWER11
  
  /* Types of costly dependences.  */
  enum rs6000_dependence_cost
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-overload.def gcc-17-20260510/gcc/config/rs6000/rs6000-overload.def
*** gcc-17-20260503/gcc/config/rs6000/rs6000-overload.def	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-overload.def	Sun May 10 22:32:06 2026
***************
*** 2644,2652 ****
  
  [VEC_NEARBYINT, vec_nearbyint, __builtin_vec_nearbyint]
    vf __builtin_vec_nearbyint (vf);
!     XVRSPI  XVRSPI_NBI
    vd __builtin_vec_nearbyint (vd);
!     XVRDPI  XVRDPI_NBI
  
  [VEC_NEG, vec_neg, __builtin_vec_neg]
    vsc __builtin_vec_neg (vsc);
--- 2644,2652 ----
  
  [VEC_NEARBYINT, vec_nearbyint, __builtin_vec_nearbyint]
    vf __builtin_vec_nearbyint (vf);
!     XVRSPIC XVRSPIC_NBI
    vd __builtin_vec_nearbyint (vd);
!     XVRDPIC XVRDPIC_NBI
  
  [VEC_NEG, vec_neg, __builtin_vec_neg]
    vsc __builtin_vec_neg (vsc);
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000-tables.opt gcc-17-20260510/gcc/config/rs6000/rs6000-tables.opt
*** gcc-17-20260503/gcc/config/rs6000/rs6000-tables.opt	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000-tables.opt	Sun May 10 22:32:06 2026
*************** EnumValue
*** 189,202 ****
  Enum(rs6000_cpu_opt_value) String(power11) Value(53)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
  
--- 189,205 ----
  Enum(rs6000_cpu_opt_value) String(power11) Value(53)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(future) Value(54)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(powerpc) Value(55)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56)
  
  EnumValue
! Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57)
! 
! EnumValue
! Enum(rs6000_cpu_opt_value) String(rs64) Value(58)
  
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000.cc gcc-17-20260510/gcc/config/rs6000/rs6000.cc
*** gcc-17-20260503/gcc/config/rs6000/rs6000.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000.cc	Sun May 10 22:32:06 2026
*************** rs6000_builtin_vectorized_function (unsi
*** 5696,5707 ****
  	  && flag_unsafe_math_optimizations
  	  && out_mode == DFmode && out_n == 2
  	  && in_mode == DFmode && in_n == 2)
! 	return rs6000_builtin_decls[RS6000_BIF_XVRDPI];
        if (VECTOR_UNIT_VSX_P (V4SFmode)
  	  && flag_unsafe_math_optimizations
  	  && out_mode == SFmode && out_n == 4
  	  && in_mode == SFmode && in_n == 4)
! 	return rs6000_builtin_decls[RS6000_BIF_XVRSPI];
        break;
      CASE_CFN_RINT:
        if (VECTOR_UNIT_VSX_P (V2DFmode)
--- 5696,5707 ----
  	  && flag_unsafe_math_optimizations
  	  && out_mode == DFmode && out_n == 2
  	  && in_mode == DFmode && in_n == 2)
! 	return rs6000_builtin_decls[RS6000_BIF_XVRDPIC];
        if (VECTOR_UNIT_VSX_P (V4SFmode)
  	  && flag_unsafe_math_optimizations
  	  && out_mode == SFmode && out_n == 4
  	  && in_mode == SFmode && in_n == 4)
! 	return rs6000_builtin_decls[RS6000_BIF_XVRSPIC];
        break;
      CASE_CFN_RINT:
        if (VECTOR_UNIT_VSX_P (V2DFmode)
*************** rs6000_machine_from_flags (void)
*** 5913,5918 ****
--- 5913,5920 ----
    flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
  	     | OPTION_MASK_ALTIVEC);
  
+   if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)
+     return "future";
    if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
      return "power11";
    if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
*************** static struct rs6000_opt_mask const rs60
*** 24465,24470 ****
--- 24467,24473 ----
    { "fprnd",			OPTION_MASK_FPRND,		false, true  },
    { "power10",			OPTION_MASK_POWER10,		false, true  },
    { "power11",			OPTION_MASK_POWER11,		false, false },
+   { "future",			OPTION_MASK_FUTURE,		false, false },
    { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
    { "htm",			OPTION_MASK_HTM,		false, true  },
    { "isel",			OPTION_MASK_ISEL,		false, true  },
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000.h gcc-17-20260510/gcc/config/rs6000/rs6000.h
*** gcc-17-20260503/gcc/config/rs6000/rs6000.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000.h	Sun May 10 22:32:06 2026
***************
*** 101,106 ****
--- 101,107 ----
     you make changes here, make them also there.  */
  #define ASM_CPU_SPEC \
  "%{mcpu=native: %(asm_cpu_native); \
+   mcpu=future: -mfuture; \
    mcpu=power11: -mpower11; \
    mcpu=power10: -mpower10; \
    mcpu=power9: -mpower9; \
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/rs6000.opt gcc-17-20260510/gcc/config/rs6000/rs6000.opt
*** gcc-17-20260503/gcc/config/rs6000/rs6000.opt	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/rs6000.opt	Sun May 10 22:32:06 2026
*************** Target Undocumented Mask(POWER10) Var(rs
*** 595,600 ****
--- 595,604 ----
  mpower11
  Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
  
+ ;; Potential future machine
+ mfuture
+ Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>)
+ 
  mprefixed
  Target Mask(PREFIXED) Var(rs6000_isa_flags)
  Generate (do not generate) prefixed memory instructions.
diff -Nrcpad gcc-17-20260503/gcc/config/rs6000/sysv4.opt.urls gcc-17-20260510/gcc/config/rs6000/sysv4.opt.urls
*** gcc-17-20260503/gcc/config/rs6000/sysv4.opt.urls	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rs6000/sysv4.opt.urls	Sun May 10 22:32:06 2026
*************** msdata
*** 48,54 ****
  UrlSuffix(gcc/RS_002f6000-and-PowerPC-Options.html#index-msdata-3)
  
  msim
! UrlSuffix(gcc/RS_002f6000-and-PowerPC-Options.html#index-msim-7)
  
  mads
  UrlSuffix(gcc/RS_002f6000-and-PowerPC-Options.html#index-mads)
--- 48,54 ----
  UrlSuffix(gcc/RS_002f6000-and-PowerPC-Options.html#index-msdata-3)
  
  msim
! UrlSuffix(gcc/RS_002f6000-and-PowerPC-Options.html#index-msim-6)
  
  mads
  UrlSuffix(gcc/RS_002f6000-and-PowerPC-Options.html#index-mads)
diff -Nrcpad gcc-17-20260503/gcc/config/rx/elf.opt.urls gcc-17-20260510/gcc/config/rx/elf.opt.urls
*** gcc-17-20260503/gcc/config/rx/elf.opt.urls	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rx/elf.opt.urls	Sun May 10 22:32:06 2026
***************
*** 1,7 ****
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/rx/elf.opt and generated HTML
  
  msim
! UrlSuffix(gcc/RX-Options.html#index-msim-8)
  
  mas100-syntax
  UrlSuffix(gcc/RX-Options.html#index-mas100-syntax)
--- 1,7 ----
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/rx/elf.opt and generated HTML
  
  msim
! UrlSuffix(gcc/RX-Options.html#index-msim-7)
  
  mas100-syntax
  UrlSuffix(gcc/RX-Options.html#index-mas100-syntax)
diff -Nrcpad gcc-17-20260503/gcc/config/rx/rx.md gcc-17-20260510/gcc/config/rx/rx.md
*** gcc-17-20260503/gcc/config/rx/rx.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/rx/rx.md	Sun May 10 22:32:06 2026
***************
*** 191,197 ****
    [(set (reg:CC CC_REG)
  	(compare:CC (match_operand:SI 0 "register_operand"  "r,r,r,r,r,r,r")
  		    (match_operand:SI 1 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")))]
!   "reload_completed"
    "cmp\t%Q1, %0"
    [(set_attr "timings" "11,11,11,11,11,11,33")
     (set_attr "length"  "2,2,3,4,5,6,5")]
--- 191,197 ----
    [(set (reg:CC CC_REG)
  	(compare:CC (match_operand:SI 0 "register_operand"  "r,r,r,r,r,r,r")
  		    (match_operand:SI 1 "rx_source_operand" "r,Uint04,Int08,Sint16,Sint24,i,Q")))]
!   "post_ra_split_completed"
    "cmp\t%Q1, %0"
    [(set_attr "timings" "11,11,11,11,11,11,33")
     (set_attr "length"  "2,2,3,4,5,6,5")]
***************
*** 255,261 ****
  	  (and:SI (match_operand:SI 0 "register_operand"  "r,r,r")
  		  (match_operand:SI 1 "rx_source_operand" "r,i,Q"))
  	  (const_int 0)))]
!   "reload_completed"
    "tst\t%Q1, %0"
    [(set_attr "timings" "11,11,33")
     (set_attr "length"  "3,7,6")]
--- 255,261 ----
  	  (and:SI (match_operand:SI 0 "register_operand"  "r,r,r")
  		  (match_operand:SI 1 "rx_source_operand" "r,i,Q"))
  	  (const_int 0)))]
!   "post_ra_split_completed"
    "tst\t%Q1, %0"
    [(set_attr "timings" "11,11,33")
     (set_attr "length"  "3,7,6")]
***************
*** 295,301 ****
  	(compare:CC_F
  	  (match_operand:SF 0 "register_operand"  "r,r,r")
  	  (match_operand:SF 1 "rx_source_operand" "r,F,Q")))]
!   "ALLOW_RX_FPU_INSNS && reload_completed"
    "fcmp\t%1, %0"
    [(set_attr "timings" "11,11,33")
     (set_attr "length" "3,7,5")]
--- 295,301 ----
  	(compare:CC_F
  	  (match_operand:SF 0 "register_operand"  "r,r,r")
  	  (match_operand:SF 1 "rx_source_operand" "r,F,Q")))]
!   "ALLOW_RX_FPU_INSNS && post_ra_split_completed"
    "fcmp\t%1, %0"
    [(set_attr "timings" "11,11,33")
     (set_attr "length" "3,7,5")]
***************
*** 310,316 ****
  	    [(reg CC_REG) (const_int 0)])
  	  (label_ref (match_operand 0 "" ""))
  	  (pc)))]
!   "reload_completed"
    "b%B1\t%0"
    [(set_attr "length" "8")    ;; This length is wrong, but it is
                                ;; too hard to compute statically.
--- 310,316 ----
  	    [(reg CC_REG) (const_int 0)])
  	  (label_ref (match_operand 0 "" ""))
  	  (pc)))]
!   "post_ra_split_completed"
    "b%B1\t%0"
    [(set_attr "length" "8")    ;; This length is wrong, but it is
                                ;; too hard to compute statically.
***************
*** 702,708 ****
    [(set (match_operand:SI 0 "register_operand" "=r")
  	(match_operator:SI 1 "comparison_operator"
  	  [(reg CC_REG) (const_int 0)]))]
!   "reload_completed"
    "sc%B1.L\t%0"
    [(set_attr "length" "3")]
  )
--- 702,708 ----
    [(set (match_operand:SI 0 "register_operand" "=r")
  	(match_operator:SI 1 "comparison_operator"
  	  [(reg CC_REG) (const_int 0)]))]
!   "post_ra_split_completed"
    "sc%B1.L\t%0"
    [(set_attr "length" "3")]
  )
***************
*** 807,813 ****
  	    [(reg CC_REG) (const_int 0)])
  	  (match_operand:SI 1 "immediate_operand" "Sint08,Sint16,Sint24,i")
  	  (match_dup 0)))]
!   "reload_completed
     && ((GET_CODE (operands[2]) == EQ) || (GET_CODE (operands[2]) == NE))"
    {
      if (GET_CODE (operands[2]) == EQ)
--- 807,813 ----
  	    [(reg CC_REG) (const_int 0)])
  	  (match_operand:SI 1 "immediate_operand" "Sint08,Sint16,Sint24,i")
  	  (match_dup 0)))]
!   "post_ra_split_completed
     && ((GET_CODE (operands[2]) == EQ) || (GET_CODE (operands[2]) == NE))"
    {
      if (GET_CODE (operands[2]) == EQ)
***************
*** 826,832 ****
  	  (match_operand:SI 1 "nonmemory_operand"
  		              "r,Uint04,Sint08,Sint16,Sint24,i")
  	  (match_dup 0)))]
!   "reload_completed"
    {
      PUT_CODE (operands[2], reverse_condition (GET_CODE (operands[2])));
      return "b%B2 1f\n\tmov %1, %0\n1:";
--- 826,832 ----
  	  (match_operand:SI 1 "nonmemory_operand"
  		              "r,Uint04,Sint08,Sint16,Sint24,i")
  	  (match_dup 0)))]
!   "post_ra_split_completed"
    {
      PUT_CODE (operands[2], reverse_condition (GET_CODE (operands[2])));
      return "b%B2 1f\n\tmov %1, %0\n1:";
***************
*** 856,862 ****
    ;; Note - although the ABS instruction does set the O bit in the processor
    ;; status word, it does not do so in a way that is comparable with the CMP
    ;; instruction.  Hence we use CC_ZSmode rather than CC_ZSOmode.
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    abs\t%0
    abs\t%1, %0"
--- 856,862 ----
    ;; Note - although the ABS instruction does set the O bit in the processor
    ;; status word, it does not do so in a way that is comparable with the CMP
    ;; instruction.  Hence we use CC_ZSmode rather than CC_ZSOmode.
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    abs\t%0
    abs\t%1, %0"
***************
*** 908,914 ****
  		 (const_int 0)))
     (set (match_operand:SI		    0 "register_operand"  "=r,r,r,r,r,r,r,r,r,r,r,r,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSCmode)"
    "@
    add\t%2, %0
    add\t%2, %0
--- 908,914 ----
  		 (const_int 0)))
     (set (match_operand:SI		    0 "register_operand"  "=r,r,r,r,r,r,r,r,r,r,r,r,r,r")
  	(plus:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSCmode)"
    "@
    add\t%2, %0
    add\t%2, %0
***************
*** 937,942 ****
--- 937,943 ----
  		     (const_int 0)))
  	      (set (match_operand:SI 0 "register_operand")
  		   (plus:SI (match_dup 1) (match_dup 2)))])]
+   "post_ra_split_completed"
  )
  
  (define_insn "adc_internal"
***************
*** 947,953 ****
  	    (match_operand:SI 1 "register_operand"  "%0,0,0,0,0,0"))
  	  (match_operand:SI   2 "rx_source_operand" "r,Sint08,Sint16,Sint24,i,Q")))
      (clobber (reg:CC CC_REG))]
!   "reload_completed"
    "adc\t%2, %0"
    [(set_attr "timings" "11,11,11,11,11,33")
     (set_attr "length"   "3,4,5,6,7,6")]
--- 948,954 ----
  	    (match_operand:SI 1 "register_operand"  "%0,0,0,0,0,0"))
  	  (match_operand:SI   2 "rx_source_operand" "r,Sint08,Sint16,Sint24,i,Q")))
      (clobber (reg:CC CC_REG))]
!   "post_ra_split_completed"
    "adc\t%2, %0"
    [(set_attr "timings" "11,11,11,11,11,33")
     (set_attr "length"   "3,4,5,6,7,6")]
***************
*** 968,974 ****
  	    (ltu:SI (reg:CC CC_REG) (const_int 0))
  	    (match_dup 1))
  	  (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSCmode)"
    "adc\t%2, %0"
    [(set_attr "timings" "11,11,11,11,11,33")
     (set_attr "length"   "3,4,5,6,7,6")]
--- 969,975 ----
  	    (ltu:SI (reg:CC CC_REG) (const_int 0))
  	    (match_dup 1))
  	  (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSCmode)"
    "adc\t%2, %0"
    [(set_attr "timings" "11,11,11,11,11,33")
     (set_attr "length"   "3,4,5,6,7,6")]
***************
*** 1136,1142 ****
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand"  "=r,r,r,r,r,r,r,r,r")
  	(and:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    and\t%2, %0
    and\t%2, %0
--- 1137,1143 ----
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand"  "=r,r,r,r,r,r,r,r,r")
  	(and:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    and\t%2, %0
    and\t%2, %0
***************
*** 1367,1373 ****
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r")
  	(neg:SI (match_dup 1)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    neg\t%0
    neg\t%1, %0"
--- 1368,1374 ----
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r")
  	(neg:SI (match_dup 1)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    neg\t%0
    neg\t%1, %0"
***************
*** 1391,1397 ****
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r")
  	(not:SI (match_dup 1)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    not\t%0
    not\t%1, %0"
--- 1392,1398 ----
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r")
  	(not:SI (match_dup 1)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    not\t%0
    not\t%1, %0"
***************
*** 1440,1446 ****
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r,r,r,r,r,r,r,r")
  	(ior:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    or\t%2, %0
    or\t%2, %0
--- 1441,1447 ----
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r,r,r,r,r,r,r,r")
  	(ior:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    or\t%2, %0
    or\t%2, %0
***************
*** 1472,1478 ****
  		 (const_int 0)))
     (set (match_operand:SI		      0 "register_operand" "=r")
  	(rotate:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "rotl\t%2, %0"
    [(set_attr "length" "3")]
  )
--- 1473,1479 ----
  		 (const_int 0)))
     (set (match_operand:SI		      0 "register_operand" "=r")
  	(rotate:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "rotl\t%2, %0"
    [(set_attr "length" "3")]
  )
***************
*** 1494,1500 ****
  		 (const_int 0)))
     (set (match_operand:SI			0 "register_operand" "=r")
  	(rotatert:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "rotr\t%2, %0"
    [(set_attr "length" "3")]
  )
--- 1495,1501 ----
  		 (const_int 0)))
     (set (match_operand:SI			0 "register_operand" "=r")
  	(rotatert:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "rotr\t%2, %0"
    [(set_attr "length" "3")]
  )
***************
*** 1519,1525 ****
  		 (const_int 0)))
     (set (match_operand:SI              0 "register_operand" "=r,r,r")
  	(ashiftrt:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    shar\t%2, %0
    shar\t%2, %0
--- 1520,1526 ----
  		 (const_int 0)))
     (set (match_operand:SI              0 "register_operand" "=r,r,r")
  	(ashiftrt:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    shar\t%2, %0
    shar\t%2, %0
***************
*** 1547,1553 ****
  		 (const_int 0)))
     (set (match_operand:SI			0 "register_operand" "=r,r,r")
  	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    shlr\t%2, %0
    shlr\t%2, %0
--- 1548,1554 ----
  		 (const_int 0)))
     (set (match_operand:SI			0 "register_operand" "=r,r,r")
  	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    shlr\t%2, %0
    shlr\t%2, %0
***************
*** 1575,1581 ****
  		 (const_int 0)))
     (set (match_operand:SI		      0 "register_operand" "=r,r,r")
  	(ashift:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    shll\t%2, %0
    shll\t%2, %0
--- 1576,1582 ----
  		 (const_int 0)))
     (set (match_operand:SI		      0 "register_operand" "=r,r,r")
  	(ashift:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "@
    shll\t%2, %0
    shll\t%2, %0
***************
*** 1609,1615 ****
  	(unspec:SI [(match_operand:SI 1 "register_operand"  "0")
  		    (reg:CC CC_REG)]
  		   UNSPEC_BUILTIN_SAT))]
!   "reload_completed"
    "sat\t%0"
    [(set_attr "length" "2")]
  )
--- 1610,1616 ----
  	(unspec:SI [(match_operand:SI 1 "register_operand"  "0")
  		    (reg:CC CC_REG)]
  		   UNSPEC_BUILTIN_SAT))]
!   "post_ra_split_completed"
    "sat\t%0"
    [(set_attr "length" "2")]
  )
***************
*** 1639,1645 ****
  		 (const_int 0)))
     (set (match_operand:SI		     0 "register_operand" "=r,r,r,r,r")
  	(minus:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSCmode)"
    "@
    sub\t%2, %0
    sub\t%2, %0
--- 1640,1646 ----
  		 (const_int 0)))
     (set (match_operand:SI		     0 "register_operand" "=r,r,r,r,r")
  	(minus:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSCmode)"
    "@
    sub\t%2, %0
    sub\t%2, %0
***************
*** 1659,1664 ****
--- 1660,1666 ----
  		     (const_int 0)))
  	      (set (match_operand:SI 0 "register_operand")
  		   (minus:SI (match_dup 1) (match_dup 2)))])]
+   "post_ra_split_completed"
  )
  
  (define_insn "sbb_internal"
***************
*** 1669,1675 ****
  	    (match_operand:SI 2 "rx_compare_operand" " r,Q"))
  	  (geu:SI (reg:CC CC_REG) (const_int 0))))
      (clobber (reg:CC CC_REG))]
!   "reload_completed"
    "sbb\t%2, %0"
    [(set_attr "timings" "11,33")
     (set_attr "length"  "3,6")]
--- 1671,1677 ----
  	    (match_operand:SI 2 "rx_compare_operand" " r,Q"))
  	  (geu:SI (reg:CC CC_REG) (const_int 0))))
      (clobber (reg:CC CC_REG))]
!   "post_ra_split_completed"
    "sbb\t%2, %0"
    [(set_attr "timings" "11,33")
     (set_attr "length"  "3,6")]
***************
*** 1688,1694 ****
  	(minus:SI
  	  (minus:SI (match_dup 1) (match_dup 2))
  	  (geu:SI (reg:CC CC_REG) (const_int 0))))]
!   "reload_completed"
    "sbb\t%2, %0"
    [(set_attr "timings" "11,33")
     (set_attr "length"  "3,6")]
--- 1690,1696 ----
  	(minus:SI
  	  (minus:SI (match_dup 1) (match_dup 2))
  	  (geu:SI (reg:CC CC_REG) (const_int 0))))]
!   "post_ra_split_completed"
    "sbb\t%2, %0"
    [(set_attr "timings" "11,33")
     (set_attr "length"  "3,6")]
***************
*** 1769,1775 ****
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r,r,r,r,r")
  	(xor:SI (match_dup 1) (match_dup 2)))]
!   "reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "xor\t%Q2, %0"
    [(set_attr "timings" "11,11,11,11,11,33")
     (set_attr "length" "3,4,5,6,7,6")]
--- 1771,1777 ----
  		 (const_int 0)))
     (set (match_operand:SI		   0 "register_operand" "=r,r,r,r,r,r")
  	(xor:SI (match_dup 1) (match_dup 2)))]
!   "post_ra_split_completed && rx_match_ccmode (insn, CC_ZSmode)"
    "xor\t%Q2, %0"
    [(set_attr "timings" "11,11,11,11,11,33")
     (set_attr "length" "3,4,5,6,7,6")]
***************
*** 1931,1937 ****
    [(set (reg:CC CC_REG)
  	(compare:CC (match_operand:SI                               0 "register_operand" "r")
  		    (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand" "Q"))))]
!   "(optimize < 3 || optimize_size)"
    "cmp\t%<extend_types:letter>1, %0"
    [(set_attr "timings" "33")
     (set_attr "length"  "5")] ;; This length is corrected in rx_adjust_insn_length
--- 1933,1939 ----
    [(set (reg:CC CC_REG)
  	(compare:CC (match_operand:SI                               0 "register_operand" "r")
  		    (extend_types:SI (match_operand:small_int_modes 1 "rx_restricted_mem_operand" "Q"))))]
!   "post_ra_split_completed && (optimize < 3 || optimize_size)"
    "cmp\t%<extend_types:letter>1, %0"
    [(set_attr "timings" "33")
     (set_attr "length"  "5")] ;; This length is corrected in rx_adjust_insn_length
***************
*** 2180,2186 ****
  	  (match_operand:SI 1 "const_int_operand" ""))
  	(match_operator:SI 2 "comparison_operator"
  	  [(reg CC_REG) (const_int 0)]))]
!   "reload_completed"
    "bm%B2\t%1, %0"
    [(set_attr "length" "3")]
  )
--- 2182,2188 ----
  	  (match_operand:SI 1 "const_int_operand" ""))
  	(match_operator:SI 2 "comparison_operator"
  	  [(reg CC_REG) (const_int 0)]))]
!   "post_ra_split_completed"
    "bm%B2\t%1, %0"
    [(set_attr "length" "3")]
  )
diff -Nrcpad gcc-17-20260503/gcc/config/stormy16/stormy16.opt.urls gcc-17-20260510/gcc/config/stormy16/stormy16.opt.urls
*** gcc-17-20260503/gcc/config/stormy16/stormy16.opt.urls	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/stormy16/stormy16.opt.urls	Sun May 10 22:32:06 2026
***************
*** 1,5 ****
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/stormy16/stormy16.opt and generated HTML
  
  msim
! UrlSuffix(gcc/Xstormy16-Options.html#index-msim-10)
  
--- 1,5 ----
  ; Autogenerated by regenerate-opt-urls.py from gcc/config/stormy16/stormy16.opt and generated HTML
  
  msim
! UrlSuffix(gcc/Xstormy16-Options.html#index-msim-9)
  
diff -Nrcpad gcc-17-20260503/gcc/config/visium/visium.opt.urls gcc-17-20260510/gcc/config/visium/visium.opt.urls
*** gcc-17-20260503/gcc/config/visium/visium.opt.urls	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/visium/visium.opt.urls	Sun May 10 22:32:06 2026
*************** mdebug
*** 4,10 ****
  UrlSuffix(gcc/Visium-Options.html#index-mdebug-2)
  
  msim
! UrlSuffix(gcc/Visium-Options.html#index-msim-9)
  
  mfpu
  UrlSuffix(gcc/Visium-Options.html#index-mfpu-5)
--- 4,10 ----
  UrlSuffix(gcc/Visium-Options.html#index-mdebug-2)
  
  msim
! UrlSuffix(gcc/Visium-Options.html#index-msim-8)
  
  mfpu
  UrlSuffix(gcc/Visium-Options.html#index-mfpu-5)
diff -Nrcpad gcc-17-20260503/gcc/config/xtensa/xtensa-protos.h gcc-17-20260510/gcc/config/xtensa/xtensa-protos.h
*** gcc-17-20260503/gcc/config/xtensa/xtensa-protos.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/xtensa/xtensa-protos.h	Sun May 10 22:32:06 2026
*************** extern bool xtensa_tls_referenced_p (rtx
*** 60,65 ****
--- 60,67 ----
  extern enum rtx_code xtensa_shlrd_which_direction (rtx, rtx);
  extern bool xtensa_postreload_completed_p (void);
  extern char *xtensa_bswapsi2_output (rtx_insn *, const char *);
+ extern bool xtensa_expand_load_force_l32 (rtx *, machine_mode, machine_mode,
+ 					  int);
  
  #ifdef TREE_CODE
  extern void init_cumulative_args (CUMULATIVE_ARGS *, int);
diff -Nrcpad gcc-17-20260503/gcc/config/xtensa/xtensa.cc gcc-17-20260510/gcc/config/xtensa/xtensa.cc
*** gcc-17-20260503/gcc/config/xtensa/xtensa.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/xtensa/xtensa.cc	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 48,53 ****
--- 48,54 ----
  #include "varasm.h"
  #include "alias.h"
  #include "explow.h"
+ #include "expmed.h"
  #include "expr.h"
  #include "langhooks.h"
  #include "gimplify.h"
*************** static rtx_insn *xtensa_md_asm_adjust (v
*** 201,206 ****
--- 202,212 ----
  				       vec<machine_mode> &, vec<const char *> &,
  				       vec<rtx> &, vec<rtx> &, HARD_REG_SET &,
  				       location_t);
+ static bool xtensa_addr_space_subset_p (addr_space_t, addr_space_t);
+ static rtx xtensa_addr_space_convert (rtx, tree, tree);
+ static bool xtensa_addr_space_legitimate_address_p (machine_mode, rtx, bool,
+ 						    addr_space_t, code_helper);
+ static tree xtensa_handle_force_l32_attribute (tree *, tree, tree, int, bool *);
  
  
  
*************** static rtx_insn *xtensa_md_asm_adjust (v
*** 292,298 ****
  #define TARGET_CANNOT_FORCE_CONST_MEM xtensa_cannot_force_const_mem
  
  #undef TARGET_LEGITIMATE_ADDRESS_P
! #define TARGET_LEGITIMATE_ADDRESS_P	xtensa_legitimate_address_p
  
  #undef TARGET_FRAME_POINTER_REQUIRED
  #define TARGET_FRAME_POINTER_REQUIRED xtensa_frame_pointer_required
--- 298,304 ----
  #define TARGET_CANNOT_FORCE_CONST_MEM xtensa_cannot_force_const_mem
  
  #undef TARGET_LEGITIMATE_ADDRESS_P
! #define TARGET_LEGITIMATE_ADDRESS_P xtensa_legitimate_address_p
  
  #undef TARGET_FRAME_POINTER_REQUIRED
  #define TARGET_FRAME_POINTER_REQUIRED xtensa_frame_pointer_required
*************** static rtx_insn *xtensa_md_asm_adjust (v
*** 375,380 ****
--- 381,407 ----
  #undef TARGET_MD_ASM_ADJUST
  #define TARGET_MD_ASM_ADJUST xtensa_md_asm_adjust
  
+ #undef TARGET_ADDR_SPACE_SUBSET_P
+ #define TARGET_ADDR_SPACE_SUBSET_P xtensa_addr_space_subset_p
+ 
+ #undef TARGET_ADDR_SPACE_CONVERT
+ #define TARGET_ADDR_SPACE_CONVERT xtensa_addr_space_convert
+ 
+ #undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
+ #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P	\
+ 	xtensa_addr_space_legitimate_address_p
+ 
+ TARGET_GNU_ATTRIBUTES (xtensa_attribute_table,
+ {
+  /* { name, min_len, max_len, decl_req, type_req, fn_type_req,
+       affects_type_identity, handler, exclude } */
+   { "force_l32", 0, 0, true, false, false,
+     false, xtensa_handle_force_l32_attribute, NULL }
+ });
+ 
+ #undef TARGET_ATTRIBUTE_TABLE
+ #define TARGET_ATTRIBUTE_TABLE xtensa_attribute_table
+ 
  struct gcc_target targetm = TARGET_INITIALIZER;
  
  
*************** xtensa_legitimize_address (rtx x,
*** 2313,2320 ****
  			   rtx oldx ATTRIBUTE_UNUSED,
  			   machine_mode mode)
  {
!   rtx plus0, plus1, temp;
!   HOST_WIDE_INT offset, mem_offset, addmi_offset;
  
    if (xtensa_tls_symbol_p (x))
      return xtensa_legitimize_tls_address (x);
--- 2340,2348 ----
  			   rtx oldx ATTRIBUTE_UNUSED,
  			   machine_mode mode)
  {
!   rtx plus0, plus1, temp0, temp1;
!   HOST_WIDE_INT offset, mem_disp, delta, offset2;
!   int mode_size;
  
    if (xtensa_tls_symbol_p (x))
      return xtensa_legitimize_tls_address (x);
*************** xtensa_legitimize_address (rtx x,
*** 2326,2358 ****
    if (! REG_P (plus0) && REG_P (plus1))
      std::swap (plus0, plus1);
  
!   /* Try to split up the offset to use up to two ADDMI instructions.  */
!   if (REG_P (plus0) && CONST_INT_P (plus1)
!       && ! xtensa_mem_offset (offset = INTVAL (plus1), mode)
!       && ! xtensa_simm8 (offset)
!       && xtensa_mem_offset (mem_offset = offset & 0xff, mode))
      {
!       /* The two ADDMIs are slightly more efficient than
! 	 "L32R w/litpool + ADD" or "CONST16 pair + ADD", if applicable.  */
!       addmi_offset = offset & ~0xff;
!       if (addmi_offset > 32512)
! 	offset = 32512, addmi_offset -= 32512;
!       else if (addmi_offset < -32768)
! 	offset = -32768, addmi_offset += 32768;
!       else
! 	offset = 0;
  
!       if (xtensa_simm8x256 (addmi_offset))
! 	{
! 	  emit_insn (gen_addsi3 (temp = gen_reg_rtx (Pmode),
! 				 plus0, GEN_INT (addmi_offset)));
! 	  if (offset)
! 	    emit_insn (gen_addsi3 (temp, temp, GEN_INT (offset)));
! 	  return gen_rtx_PLUS (Pmode, temp, GEN_INT (mem_offset));
! 	}
      }
  
!   return x;
  }
  
  /* Worker function for TARGET_MODE_DEPENDENT_ADDRESS_P.
--- 2354,2410 ----
    if (! REG_P (plus0) && REG_P (plus1))
      std::swap (plus0, plus1);
  
!   /* Try to split up the offset to use up to two ADDMI instructions;
!      The two ADDMIs are slightly more efficient than "L32R w/litpool + ADD"
!      or "CONST16 pair + ADD", if applicable.  */
!   if (! REG_P (plus0) || ! CONST_INT_P (plus1)
!       || xtensa_mem_offset (offset = INTVAL (plus1), mode)
!       || xtensa_simm8 (offset)
!       || ! xtensa_mem_offset (mem_disp = offset & 0xff, mode))
!     return x;
! 
!   /* The above assumes that the displacement within the load/store instruc-
!      tion is unsigned 8 bits, regardless of the load/store width.  However,
!      in actual 2- or 4-byte width load/store instructions, a displacement
!      shifted by 1 or 2 bits, respectively, is added to the base register.
!      Here, determine the amount of displacement delta that these instructions
!      can cover extra range.  */
!   delta = (mode_size = GET_MODE_SIZE (mode)) >= 4 ? 768 :
! 	  mode_size == 2 ? 256 : 0;
! 
!   /* The upper limit of the ADDMI instruction's addition is allowed to be
!      widened by the delta amount calculated above, and the excess is later
!      renormalized to the displacement of the load/store instrution.  */
!   offset2 = offset & ~0xff, offset = 0;
!   if (! IN_RANGE (offset2, -32768, 32512 + delta))
      {
!       if (offset2 > 32512)
! 	offset = 32512, offset2 -= 32512;
!       else if (offset2 < -32768)
! 	offset = -32768, offset2 += 32768;
  
!       /* If two ADDMIs are not enough, the process will be canceled.  */
!       if (! IN_RANGE (offset2, -32768, 32512 + delta))
! 	return x;
      }
+   if (offset2 > 32512)
+     mem_disp += offset2 - 32512, offset2 = 32512;
  
!   /* Emit one or two ADDMI instructions, and then return an address RTX
!      with the remaining offset.
!      By adding the offset with the largest absolute value first via
!      temporary pseudos, the likelihood of those pseudos being consolidated
!      by the CSE increases.  */
!   temp0 = gen_reg_rtx (Pmode);
!   if (offset)
!     {
!       emit_insn (gen_addsi3 (temp1 = gen_reg_rtx (Pmode),
! 			     plus0, GEN_INT (offset)));
!       emit_insn (gen_addsi3 (temp0, temp1, GEN_INT (offset2)));
!     }
!   else
!     emit_insn (gen_addsi3 (temp0, plus0, GEN_INT (offset2)));
!   return gen_rtx_PLUS (Pmode, temp0, GEN_INT (mem_disp));
  }
  
  /* Worker function for TARGET_MODE_DEPENDENT_ADDRESS_P.
*************** xtensa_emit_add_imm (rtx dst, rtx src, H
*** 2597,2602 ****
--- 2649,2783 ----
  }
  
  
+ /* Expand a 1- or 2-byte width memory load into an aligned 4-byte width
+    load with bit-extraction of the required bytes.  */
+ 
+ static bool
+ xtensa_expand_load_force_l32_1 (const_rtx mem)
+ {
+   tree expr = MEM_EXPR (mem), type;
+ 
+   /* If the "force_l32" attribute is found in the tree associated with
+      mem RTX, return true.  */
+   return expr && (type = TREE_TYPE (expr))
+ 	 && TREE_CODE (type) == INTEGER_TYPE
+ 	 && lookup_attribute ("force_l32", TYPE_ATTRIBUTES (type));
+ }
+ 
+ static bool
+ xtensa_expand_load_force_l32_2 (const_rtx reg)
+ {
+   unsigned int regno;
+ 
+   /* These pseudos are unlikely to be passed during the RTL generation,
+      but just in case. */
+   switch (regno = REGNO (reg))
+     {
+     case STACK_POINTER_REGNUM:
+     case FRAME_POINTER_REGNUM:
+     case ARG_POINTER_REGNUM:
+       return true;
+     }
+ 
+   /* gccint explicitly states that these pseudos indicate the location of
+      the stack frame.  In addition, the static chain pointers also clearly
+      refer to the stack frame.  */
+   return IN_RANGE (regno, FIRST_VIRTUAL_REGISTER, LAST_VIRTUAL_REGISTER)
+ 	 || (cfun && cfun->static_chain_decl
+ 	     && cfun->static_chain_decl == REG_EXPR (regno_reg_rtx[regno]));
+ }
+ 
+ bool
+ xtensa_expand_load_force_l32 (rtx *operands, machine_mode dest_mode,
+ 			      machine_mode src_mode, int unsignedp)
+ {
+   rtx dest, src, addr, temp, x;
+ 
+   gcc_assert (src_mode == QImode || src_mode == HImode);
+ 
+   /* Reject sub-word store to memory with "force_l32".  */
+   if (mem_operand (dest = operands[0], dest_mode))
+     {
+       if (MEM_ADDR_SPACE (dest) == ADDR_SPACE_FORCE_L32)
+ 	{
+ 	  error ("Storing 1- and 2-byte quantities to memory within the "
+ 		 "%<__force_l32%> address space is not supported");
+ 	  return false;
+ 	}
+       if (xtensa_expand_load_force_l32_1 (dest))
+ 	warning (OPT_Wattributes,
+ 		 "Storing 1- and 2-byte quantities to memory with the "
+ 		 "%<force_l32%> attribute is not supported and the attribute "
+ 		 "ignored");
+     }
+ 
+   /* Exclude insns that do not load memory.  */
+   if (! register_operand (dest, dest_mode)
+       || ! mem_operand (src = operands[1], src_mode))
+     return false;
+ 
+   /* Exclude insns that do not perform memory loading with "force_l32".  */
+   if (MEM_ADDR_SPACE (src) != ADDR_SPACE_FORCE_L32
+       && ! xtensa_expand_load_force_l32_1 (src)
+       && (!TARGET_FORCE_L32 || MEM_ADDR_SPACE (src) != ADDR_SPACE_GENERIC))
+     return false;
+ 
+   /* As a preprocessing, handle cases where addr is (PLUS (REG, OFFSET))
+      form.  */
+   if (REG_P (addr = XEXP (src, 0)))
+     {
+       if (xtensa_expand_load_force_l32_2 (addr))
+ 	return false;
+     }
+   else if (GET_CODE (addr) == PLUS)
+     {
+       rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
+       HOST_WIDE_INT v;
+ 
+       if (! CONST_INT_P (op1))
+ 	std::swap (op0, op1);
+       if (! REG_P (op0) || ! CONST_INT_P (op1)
+ 	  || xtensa_expand_load_force_l32_2 (op0))
+ 	return false;
+       if ((v = INTVAL (op1)) == 0)
+ 	addr = op0;
+       else
+ 	xtensa_emit_add_imm (addr = gen_reg_rtx (Pmode),
+ 			     op0, v, NULL_RTX, false);
+     }
+   else
+     return false;
+ 
+   /* First, Load the aligned SImode memory containing the desired [HQ]Imode
+      value.  */
+   emit_insn (gen_andsi3 (temp = gen_reg_rtx (Pmode),
+ 			 addr, force_reg (SImode, GEN_INT (-4))));
+   x = gen_rtx_MEM (SImode, temp);
+   MEM_VOLATILE_P (x) = MEM_VOLATILE_P (src);
+   emit_insn (gen_rtx_SET (temp, x));
+ 
+   /* Then, shift the bit-image of the desired [HQ]Imode value to bit-
+      position 0, ie., the least significant side for little-endian, the
+      most significant side for big-endian.
+      This process requires a shift of 8-times the amount, ie., a per-byte
+      shift instruction.  Therefore, with the implementation of this, the
+      instruction is modified to be usable regardless of whether optimization
+      and/or debugging is enabled or disabled (see "*shift_per_byte" insn
+      pattern in xtensa.md).  */
+   x = gen_rtx_ASHIFT (SImode, addr, GEN_INT (3));
+   x = BITS_BIG_ENDIAN ? gen_rtx_ASHIFT (SImode, temp, x)
+ 		      : gen_rtx_LSHIFTRT (SImode, temp, x);
+   emit_insn (gen_rtx_SET (temp, x));
+ 
+   /* Finally, extract the necessary part from the shifted result.  */
+   x = extract_bit_field (temp, GET_MODE_BITSIZE (src_mode), 0, unsignedp,
+ 			 NULL_RTX, dest_mode, dest_mode, false, NULL);
+   emit_insn (gen_rtx_SET (dest, x));
+ 
+   return true;
+ }
+ 
+ 
  /* Implement TARGET_CANNOT_FORCE_CONST_MEM.  */
  
  static bool
*************** xtensa_md_asm_adjust (vec<rtx> &outputs
*** 5479,5484 ****
--- 5660,5797 ----
    return NULL;
  }
  
+ /* Implement TARGET_ADDR_SPACE_SUBSET_P.  */
+ 
+ static bool
+ xtensa_addr_space_subset_p (addr_space_t subset, addr_space_t superset)
+ {
+   /* Just obvious.  */
+   if (subset == superset)
+      return true;
+ 
+   /* A __force_l32 pointer can point to any location in the generic
+      address space, though its efficiency is another matter.  */
+   if (superset == ADDR_SPACE_FORCE_L32 && subset == ADDR_SPACE_GENERIC)
+     return true;
+ 
+   return false;
+ }
+ 
+ /* Implement TARGET_ADDR_SPACE_CONVERT.  */
+ 
+ static rtx
+ xtensa_addr_space_convert (rtx op, tree from_type, tree to_type)
+ {
+   addr_space_t from_as = TYPE_ADDR_SPACE (TREE_TYPE (from_type));
+   addr_space_t to_as = TYPE_ADDR_SPACE (TREE_TYPE (to_type));
+ 
+   /* A __force_l32 pointer can point to any location in the generic
+      address space, though its efficiency is another matter.  */
+   if (to_as == ADDR_SPACE_FORCE_L32 && from_as == ADDR_SPACE_GENERIC)
+     ;
+   /* However, the reverse conversion carries risks.  */
+   else if (to_as == ADDR_SPACE_GENERIC && from_as == ADDR_SPACE_FORCE_L32)
+     warning (0, "converting from the %<__force_l32%> address space to the "
+ 		"generic one is generally not safe");
+   /* Unimplemented conversions are of course not supported.  */
+   else
+     error ("conversion between those address spaces is not supported");
+ 
+   return op;
+ }
+ 
+ /* Implement TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P.  */
+ 
+ static bool
+ xtensa_addr_space_legitimate_address_p (machine_mode mode, rtx addr,
+ 					bool strict, addr_space_t as,
+ 					code_helper ch)
+ {
+   switch (as)
+     {
+     case ADDR_SPACE_FORCE_L32:
+       /* The __force_l32 address space.  */
+ 
+       while (SUBREG_P (addr))
+ 	addr = SUBREG_REG (addr);
+ 
+       /* Only valid with a base register without offset.  */
+       return REG_P (addr) && BASE_REG_P (addr, strict);
+     }
+ 
+   return xtensa_legitimate_address_p (mode, addr, strict, ch);
+ }
+ 
+ /* Implement machine-specific attribute "force_l32" handler.  */
+ 
+ static bool
+ xtensa_handle_force_l32_attribute_1 (tree *type)
+ {
+   /* If the type has definitions for fields, then recursively process each
+      of those types, and return true if any of the processes return true.  */
+   if (RECORD_OR_UNION_TYPE_P (*type))
+     {
+       bool f = false;
+ 
+       for (tree field = TYPE_FIELDS (*type);
+ 	   field; field = DECL_CHAIN (field))
+ 	f |= xtensa_handle_force_l32_attribute_1 (&TREE_TYPE (field));
+ 
+       return f;
+     }
+ 
+   /* If the type has an underlying type, it recursively processes that type
+      and returns the result.  */
+   if (TREE_TYPE (*type))
+     return xtensa_handle_force_l32_attribute_1 (&TREE_TYPE (*type));
+ 
+   /* If the type is INTEGER and its machine mode is [HQ]I, add the
+      "force_l32" attribute to that type and return true.  */
+   if (TREE_CODE (*type) == INTEGER_TYPE
+ 	   && (TYPE_MODE_RAW (*type) == QImode
+ 	       || TYPE_MODE_RAW (*type) == HImode))
+     {
+       tree attrs = tree_cons (get_identifier ("force_l32"),
+ 			      NULL, TYPE_ATTRIBUTES (*type));
+ 
+       *type = build_type_attribute_variant (*type, attrs);
+ 
+       return true;
+     }
+ 
+   /* If none of the above apply, simply return false.  */
+   return false;
+ }
+ 
+ static tree
+ xtensa_handle_force_l32_attribute (tree *node, tree name,
+ 				   tree args ATTRIBUTE_UNUSED,
+ 				   int flags ATTRIBUTE_UNUSED,
+ 				   bool *no_add_attrs)
+ {
+   if (DECL_P (*node))
+     {
+       if (TREE_CODE (*node) != TYPE_DECL && TREE_CODE (*node) != VAR_DECL
+ 	  && TREE_CODE (*node) != PARM_DECL)
+ 	{
+ 	  warning (OPT_Wattributes,
+ 		   "%qE attribute only applies to declarations of variables, "
+ 		   "function parameters, or types", name);
+ 	  *no_add_attrs = true;
+ 	}
+       /* Traverse all [HQ]Imode INTEGER types nested within the underlying
+ 	 type of that declaration and attempt to apply the "force_l32"
+ 	 attribute to them.  */
+       else if (! xtensa_handle_force_l32_attribute_1 (&TREE_TYPE (*node)))
+ 	{
+ 	  warning (OPT_Wattributes, "%qE attribute ignored", name);
+ 	  *no_add_attrs = true;
+ 	}
+     }
+ 
+   return NULL_TREE;
+ }
+ 
  /* Machine-specific pass in order to replace all assignments of large
     integer constants (i.e., that do not fit into the immediate field which
     can hold signed 12 bits) with other legitimate forms, specifically,
diff -Nrcpad gcc-17-20260503/gcc/config/xtensa/xtensa.h gcc-17-20260510/gcc/config/xtensa/xtensa.h
*** gcc-17-20260503/gcc/config/xtensa/xtensa.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/xtensa/xtensa.h	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 317,322 ****
--- 317,329 ----
     call an address kept in a register.  */
  #define NO_FUNCTION_CSE 1
  
+ /* Named address spaces.  */
+ #define ADDR_SPACE_FORCE_L32 1
+ #define REGISTER_TARGET_PRAGMAS()					\
+   do {									\
+     c_register_addr_space ("__force_l32", ADDR_SPACE_FORCE_L32);	\
+   } while (0)
+ 
  /* Xtensa processors have "register windows".  GCC does not currently
     take advantage of the possibility for variable-sized windows; instead,
     we use a fixed window size of 8.  */
diff -Nrcpad gcc-17-20260503/gcc/config/xtensa/xtensa.md gcc-17-20260510/gcc/config/xtensa/xtensa.md
*** gcc-17-20260503/gcc/config/xtensa/xtensa.md	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/xtensa/xtensa.md	Sun May 10 22:32:06 2026
***************
*** 919,925 ****
  
  ;; Zero-extend instructions.
  
! (define_insn "zero_extend<mode>si2"
    [(set (match_operand:SI 0 "register_operand")
  	(zero_extend:SI (match_operand:HQI 1 "nonimmed_operand")))]
    ""
--- 919,937 ----
  
  ;; Zero-extend instructions.
  
! (define_expand "zero_extend<mode>si2"
!   [(set (match_operand:SI 0 "register_operand")
! 	(zero_extend:SI (match_operand:HQI 1 "nonimmed_operand")))]
!   ""
! {
!   if (xtensa_expand_load_force_l32 (operands, SImode, <MODE>mode, true))
!     ;
!   else
!     emit_insn (gen_zero_extend<mode>si2_internal (operands[0], operands[1]));
!   DONE;
! })
! 
! (define_insn "zero_extend<mode>si2_internal"
    [(set (match_operand:SI 0 "register_operand")
  	(zero_extend:SI (match_operand:HQI 1 "nonimmed_operand")))]
    ""
***************
*** 937,943 ****
  	(sign_extend:SI (match_operand:HI 1 "register_operand" "")))]
    ""
  {
!   if (sext_operand (operands[1], HImode))
      emit_insn (gen_extendhisi2_internal (operands[0], operands[1]));
    else
      xtensa_extend_reg (operands[0], operands[1]);
--- 949,957 ----
  	(sign_extend:SI (match_operand:HI 1 "register_operand" "")))]
    ""
  {
!   if (xtensa_expand_load_force_l32 (operands, SImode, HImode, false))
!     ;
!   else if (sext_operand (operands[1], HImode))
      emit_insn (gen_extendhisi2_internal (operands[0], operands[1]));
    else
      xtensa_extend_reg (operands[0], operands[1]);
***************
*** 959,965 ****
  	(sign_extend:SI (match_operand:QI 1 "register_operand" "")))]
    ""
  {
!   if (TARGET_SEXT)
      emit_insn (gen_extendqisi2_internal (operands[0], operands[1]));
    else
      xtensa_extend_reg (operands[0], operands[1]);
--- 973,981 ----
  	(sign_extend:SI (match_operand:QI 1 "register_operand" "")))]
    ""
  {
!   if (xtensa_expand_load_force_l32 (operands, SImode, QImode, false))
!     ;
!   else if (TARGET_SEXT)
      emit_insn (gen_extendqisi2_internal (operands[0], operands[1]));
    else
      xtensa_extend_reg (operands[0], operands[1]);
***************
*** 1302,1307 ****
--- 1318,1325 ----
  	(match_operand:HI 1 "general_operand" ""))]
    ""
  {
+   if (xtensa_expand_load_force_l32 (operands, HImode, HImode, true))
+     DONE;
    if (xtensa_emit_move_sequence (operands, HImode))
      DONE;
  })
***************
*** 1331,1336 ****
--- 1349,1356 ----
  	(match_operand:QI 1 "general_operand" ""))]
    ""
  {
+   if (xtensa_expand_load_force_l32 (operands, QImode, QImode, true))
+     DONE;
    if (xtensa_emit_move_sequence (operands, QImode))
      DONE;
  })
***************
*** 1621,1627 ****
  		[(match_operand:SI 1 "register_operand" "r")
  		 (ashift:SI (match_operand:SI 2 "register_operand" "r")
  			    (const_int 3))]))]
!   "!optimize_debug && optimize"
  {
    switch (GET_CODE (operands[3]))
      {
--- 1641,1647 ----
  		[(match_operand:SI 1 "register_operand" "r")
  		 (ashift:SI (match_operand:SI 2 "register_operand" "r")
  			    (const_int 3))]))]
!   ""
  {
    switch (GET_CODE (operands[3]))
      {
diff -Nrcpad gcc-17-20260503/gcc/config/xtensa/xtensa.opt gcc-17-20260510/gcc/config/xtensa/xtensa.opt
*** gcc-17-20260503/gcc/config/xtensa/xtensa.opt	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/xtensa/xtensa.opt	Sun May 10 22:32:06 2026
*************** Use windowed registers ABI.
*** 71,73 ****
--- 71,77 ----
  mstrict-align
  Target Var(xtensa_strict_alignment) Init(XTENSA_STRICT_ALIGNMENT_UNDEFINED)
  Do not use unaligned memory references.
+ 
+ mforce-l32
+ Target Mask(FORCE_L32)
+ Use L32I instruction to access 1- and 2-byte quantities in memory instead of L8UI/L16UI/L16SI.
diff -Nrcpad gcc-17-20260503/gcc/config/xtensa/xtensa.opt.urls gcc-17-20260510/gcc/config/xtensa/xtensa.opt.urls
*** gcc-17-20260503/gcc/config/xtensa/xtensa.opt.urls	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/config/xtensa/xtensa.opt.urls	Sun May 10 22:32:06 2026
*************** UrlSuffix(gcc/Xtensa-Options.html#index-
*** 35,37 ****
--- 35,40 ----
  mstrict-align
  UrlSuffix(gcc/Xtensa-Options.html#index-mstrict-align-6)
  
+ mforce-l32
+ UrlSuffix(gcc/Xtensa-Options.html#index-mforce-l32)
+ 
diff -Nrcpad gcc-17-20260503/gcc/config.gcc gcc-17-20260510/gcc/config.gcc
*** gcc-17-20260503/gcc/config.gcc	Sun May  3 22:32:05 2026
--- gcc-17-20260510/gcc/config.gcc	Sun May 10 22:32:06 2026
*************** esac
*** 283,289 ****
  # Obsolete configurations.
  case ${target} in
       ia64*-*-hpux* | ia64*-*-*vms* | ia64*-*-elf*	\
!    | m32c*-*-* | epiphany*-*-* | rl78*-*-*		\
   )
      if test "x$enable_obsolete" != xyes; then
        echo "*** Configuration ${target} is obsolete." >&2
--- 283,289 ----
  # Obsolete configurations.
  case ${target} in
       ia64*-*-hpux* | ia64*-*-*vms* | ia64*-*-elf*	\
!    | epiphany*-*-* | rl78*-*-*		\
   )
      if test "x$enable_obsolete" != xyes; then
        echo "*** Configuration ${target} is obsolete." >&2
*************** tm_p_file=
*** 359,369 ****
  cpu_type=`echo ${target} | sed 's/-.*$//'`
  cpu_is_64bit=
  case ${target} in
- m32c*-*-*)
-         cpu_type=m32c
- 	tmake_file=m32c/t-m32c
- 	target_has_targetm_common=no
-         ;;
  aarch64*-*-*)
  	cpu_type=aarch64
  	extra_headers="arm_fp16.h arm_neon.h arm_bf16.h arm_acle.h arm_sve.h arm_sme.h arm_neon_sve_bridge.h arm_private_fp8.h arm_private_neon_types.h"
--- 359,364 ----
*************** powerpc*-*-*)
*** 555,561 ****
  	extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
  	extra_headers="${extra_headers} amo.h"
  	case x$with_cpu in
! 	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
  		cpu_is_64bit=yes
  		;;
  	esac
--- 550,556 ----
  	extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
  	extra_headers="${extra_headers} amo.h"
  	case x$with_cpu in
! 	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xfuture|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
  		cpu_is_64bit=yes
  		;;
  	esac
*************** am33_2.0-*-linux*)
*** 3704,3714 ****
  	gas=yes gnu_ld=yes
  	use_collect2=no
  	;;
- m32c-*-elf*)
- 	tm_file="elfos.h newlib-stdint.h ${tm_file}"
- 	c_target_objs="m32c-pragma.o"
- 	cxx_target_objs="m32c-pragma.o"
-  	;;
  *)
  	echo "*** Configuration ${target} not supported" 1>&2
  	exit 1
--- 3699,3704 ----
*************** case "${target}" in
*** 5870,5876 ****
  				eval "with_$which=405"
  				;;
  			"" | common | native \
! 			| power[3456789] | power1[01] | power5+ | power6x \
  			| powerpc | powerpc64 | powerpc64le \
  			| rs64 \
  			| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
--- 5860,5866 ----
  				eval "with_$which=405"
  				;;
  			"" | common | native \
! 			| power[3456789] | power1[01] | future | power5+ | power6x \
  			| powerpc | powerpc64 | powerpc64le \
  			| rs64 \
  			| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
diff -Nrcpad gcc-17-20260503/gcc/configure gcc-17-20260510/gcc/configure
*** gcc-17-20260503/gcc/configure	Sun May  3 22:32:17 2026
--- gcc-17-20260510/gcc/configure	Sun May 10 22:32:19 2026
*************** esac
*** 31839,31845 ****
  # ??? Once 2.11 is released, probably need to add first known working
  # version to the per-target configury.
  case "$cpu_type" in
!   aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch | m32c \
    | m68k | microblaze | mips | nds32 | pa | riscv | rs6000 | score | sparc \
    | visium | xstormy16 | xtensa | ft32)
      insn="nop"
--- 31839,31845 ----
  # ??? Once 2.11 is released, probably need to add first known working
  # version to the per-target configury.
  case "$cpu_type" in
!   aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch \
    | m68k | microblaze | mips | nds32 | pa | riscv | rs6000 | score | sparc \
    | visium | xstormy16 | xtensa | ft32)
      insn="nop"
diff -Nrcpad gcc-17-20260503/gcc/configure.ac gcc-17-20260510/gcc/configure.ac
*** gcc-17-20260503/gcc/configure.ac	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/configure.ac	Sun May 10 22:32:06 2026
*************** esac
*** 5619,5625 ****
  # ??? Once 2.11 is released, probably need to add first known working
  # version to the per-target configury.
  case "$cpu_type" in
!   aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch | m32c \
    | m68k | microblaze | mips | nds32 | pa | riscv | rs6000 | score | sparc \
    | visium | xstormy16 | xtensa | ft32)
      insn="nop"
--- 5619,5625 ----
  # ??? Once 2.11 is released, probably need to add first known working
  # version to the per-target configury.
  case "$cpu_type" in
!   aarch64 | alpha | arc | arm | avr | bfin | cris | csky | i386 | loongarch \
    | m68k | microblaze | mips | nds32 | pa | riscv | rs6000 | score | sparc \
    | visium | xstormy16 | xtensa | ft32)
      insn="nop"
diff -Nrcpad gcc-17-20260503/gcc/cp/ChangeLog gcc-17-20260510/gcc/cp/ChangeLog
*** gcc-17-20260503/gcc/cp/ChangeLog	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/ChangeLog	Sun May 10 22:32:06 2026
***************
*** 1,3 ****
--- 1,134 ----
+ 2026-05-09  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/121500
+ 	* cp-gimplify.cc (cp_genericize_r): Unconditionally walk
+ 	DECL_VALUE_EXPR.
+ 
+ 2026-05-08  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/115181
+ 	PR c++/125043
+ 	PR c++/124979
+ 	* pt.cc (invalid_tparm_referent_p): Allow DECL_IGNORED_P in an
+ 	assert.
+ 
+ 2026-05-07  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/124770
+ 	* decl.cc (wrapup_namespace_globals): Give the odr-used
+ 	inline variable error only when !DECL_INITIAL.
+ 
+ 2026-05-07  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/125206
+ 	* tree.cc (strip_typedefs_expr) <case REFLECT_EXPR>: Always
+ 	return instead of recursing.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125007
+ 	* cp-tree.h (maybe_update_function_parm): Declare.
+ 	* reflect.cc (maybe_update_function_parm): No longer static.
+ 	* error.cc (dump_expr) <case REFLECT_EXPR>: Improve printing
+ 	of various reflections.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125184
+ 	* reflect.cc (check_out_of_consteval_use_r): Don't walk children of
+ 	USING_STMTs.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/124347
+ 	* constexpr.cc (cxx_eval_builtin_function_call): For
+ 	mce_true strip nops in first argument of BUILT_IN*_OBJECT_SIZE
+ 	if the inner expression is ADDR_EXPR.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125111
+ 	* reflect.cc (extract_ref): Throw instead of trying to build
+ 	arrays of functions, methods or arrays with NULL TYPE_DOMAIN.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/124991
+ 	* cp-tree.h (struct lang_type): Document typeinfo_var member.
+ 	(get_classtype_typeinfo_var): New inline function.
+ 	(CLASSTYPE_TYPEINFO_VAR): Use it.
+ 	(set_classtype_typeinfo_var): New inline function.
+ 	(SET_CLASSTYPE_TYPEINFO_VAR): Define.
+ 	(get_anon_aggr_type_field): New inline function.
+ 	(ANON_AGGR_TYPE_FIELD): Use it.
+ 	(set_anon_aggr_type_field): New inline function.
+ 	(SET_ANON_AGGR_TYPE_FIELD): Define.
+ 	* decl.cc (fixup_anonymous_aggr): Use SET_ANON_AGGR_TYPE_FIELD
+ 	instead of ANON_AGGR_TYPE_FIELD.
+ 	* module.cc (trees_in::read_class_def): Use
+ 	SET_CLASSTYPE_TYPEINFO_VAR instead of setting
+ 	CLASSTYPE_TYPEINFO_VAR and do it even for ANON_AGGR_TYPE_P
+ 	types.  Use SET_ANON_AGGR_TYPE_FIELD instead of setting
+ 	ANON_AGGR_TYPE_FIELD.
+ 	* rtti.cc (get_tinfo_decl_direct): Use SET_CLASSTYPE_TYPEINFO_VAR
+ 	instead of setting CLASSTYPE_TYPEINFO_VAR.
+ 	* semantics.cc (finish_member_declaration): Use
+ 	SET_ANON_AGGR_TYPE_FIELD instead of setting ANON_AGGR_TYPE_FIELD.
+ 
+ 2026-05-06  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/125179
+ 	* reflect.cc: (consteval_only_type_r): Remove this cp_walk_tree
+ 	callback and replace with ...
+ 	(consteval_only_walker): ... this recursive memoized
+ 	implementation.
+ 	(consteval_only_p): Define in terms of consteval_only_walker.
+ 
+ 2026-05-05  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/124957
+ 	* class.cc (check_tag): Set ABI_TAG_INHERITED on the TREE_LIST
+ 	of an inherited tag.  Adjust after ABI_TAG_IMPLICIT renaming.
+ 	* cp-tree.h (ABI_TAG_IMPLICIT): Rename to ...
+ 	(ABI_TAG_NOT_MANGLED): ... this.
+ 	(equal_abi_tags): Adjust forward declaration.
+ 	* mangle.cc (write_unqualified_name): Adjust equal_abi_tags call.
+ 	(sorted_abi_tags): New ignore_inherited_p parameter, for ignoring
+ 	ABI_TAG_INHERITED tags.  Adjust after ABI_TAG_INHERITED renaming.
+ 	(write_abi_tags): Adjust sorted_abi_tags call.
+ 	(equal_abi_tags): New ignore_inherited_p parameter.  Pass it to
+ 	sorted_abi_tags.
+ 	* module.cc (trees_in::check_abi_tags): Pass
+ 	ignore_inherited_p=true to equal_abi_tags iff there's a
+ 	mangled-ness mismatch.
+ 
+ 2026-05-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* module.cc (elf_out::create_mapping) [MAPPED_WRITING]
+ 	(elf_out::create_mapping) [HAVE_POSIX_FALLOCATE]: Allow for
+ 	ENOTSUP return from posix_fallocate.
+ 
+ 2026-05-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR c++/65271
+ 	* parser.cc (cp_parser_class_specifier): Accept &&.
+ 
+ 2026-05-04  yxj-github-437  <2457369732@qq.com>
+ 
+ 	* constexpr.cc (cxx_eval_constant_expression): Do not cache
+ 	result with contract violation.
+ 
+ 2026-05-04  chzn@mail.ustc.edu.cn  <chzn@mail.ustc.edu.cn>
+ 
+ 	PR c++/124241
+ 	* search.cc (accessible_p): Call type_context_for_name_lookup
+ 	for otype if it's anonymous union.
+ 
+ 2026-05-03  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR c++/119567
+ 	* error.cc (dump_expr): Treat EXACT_DIV_EXPR the same as FLOOR_DIV_EXPR.
+ 
  2026-05-01  Patrick Palka  <ppalka@redhat.com>
  
  	PR c++/125115
diff -Nrcpad gcc-17-20260503/gcc/cp/class.cc gcc-17-20260510/gcc/cp/class.cc
*** gcc-17-20260503/gcc/cp/class.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/class.cc	Sun May 10 22:32:06 2026
*************** check_tag (tree tag, tree id, tree *tp,
*** 1711,1721 ****
  	  /* Don't inherit this tag multiple times.  */
  	  IDENTIFIER_MARKED (id) = true;
  
  	  if (TYPE_P (p->t))
  	    {
  	      /* Tags inherited from type template arguments are only used
  		 to avoid warnings.  */
! 	      ABI_TAG_IMPLICIT (p->tags) = true;
  	      return;
  	    }
  	  /* For functions and variables we want to warn, too.  */
--- 1711,1722 ----
  	  /* Don't inherit this tag multiple times.  */
  	  IDENTIFIER_MARKED (id) = true;
  
+ 	  ABI_TAG_INHERITED (p->tags) = true;
  	  if (TYPE_P (p->t))
  	    {
  	      /* Tags inherited from type template arguments are only used
  		 to avoid warnings.  */
! 	      ABI_TAG_NOT_MANGLED (p->tags) = true;
  	      return;
  	    }
  	  /* For functions and variables we want to warn, too.  */
diff -Nrcpad gcc-17-20260503/gcc/cp/constexpr.cc gcc-17-20260510/gcc/cp/constexpr.cc
*** gcc-17-20260503/gcc/cp/constexpr.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/constexpr.cc	Sun May 10 22:32:06 2026
*************** cxx_eval_builtin_function_call (const co
*** 2535,2540 ****
--- 2535,2541 ----
  
    int strops = 0;
    int strret = 0;
+   bool bos = false;
    if (fndecl_built_in_p (fun, BUILT_IN_NORMAL))
      switch (DECL_FUNCTION_CODE (fun))
        {
*************** cxx_eval_builtin_function_call (const co
*** 2576,2581 ****
--- 2577,2586 ----
  	  }
  	*non_constant_p = true;
  	return t;
+       case BUILT_IN_OBJECT_SIZE:
+       case BUILT_IN_DYNAMIC_OBJECT_SIZE:
+ 	bos = ctx->manifestly_const_eval == mce_true;
+ 	break;
        default:
  	break;
        }
*************** cxx_eval_builtin_function_call (const co
*** 2634,2639 ****
--- 2639,2651 ----
  
        args[i] = arg;
      }
+   if (bos)
+     {
+       tree arg = args[0];
+       STRIP_NOPS (arg);
+       if (TREE_CODE (arg) == ADDR_EXPR)
+ 	args[0] = arg;
+     }
  
    bool save_ffbcp = force_folding_builtin_constant_p;
    force_folding_builtin_constant_p |= ctx->manifestly_const_eval == mce_true;
*************** cxx_eval_call_expression (const constexp
*** 4639,4644 ****
--- 4651,4660 ----
  	  /* Only cache a permitted result of a constant expression.  */
  	  if (cacheable && !reduced_constant_expression_p (result))
  	    cacheable = false;
+ 
+ 	  /* Only cache a result without contract violations.  */
+ 	  if (cacheable && ctx->global->contract_statement)
+ 	    cacheable = false;
  	}
        else
  	/* Couldn't get a function copy to evaluate.  */
diff -Nrcpad gcc-17-20260503/gcc/cp/cp-gimplify.cc gcc-17-20260510/gcc/cp/cp-gimplify.cc
*** gcc-17-20260503/gcc/cp/cp-gimplify.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/cp-gimplify.cc	Sun May 10 22:32:06 2026
*************** cp_genericize_r (tree *stmt_p, int *walk
*** 1955,1967 ****
    if ((TREE_CODE (stmt) == VAR_DECL
         || TREE_CODE (stmt) == PARM_DECL
         || TREE_CODE (stmt) == RESULT_DECL)
!       && DECL_HAS_VALUE_EXPR_P (stmt)
!       /* Walk DECL_VALUE_EXPR mainly for benefit of xobj lambdas so that we
! 	 adjust any invisiref object parm uses within the capture proxies.
! 	 TODO: For GCC 17 do this walking unconditionally.  */
!       && current_function_decl
!       && DECL_XOBJ_MEMBER_FUNCTION_P (current_function_decl)
!       && LAMBDA_FUNCTION_P (current_function_decl))
      {
        tree ve = DECL_VALUE_EXPR (stmt);
        cp_walk_tree (&ve, cp_genericize_r, data, NULL);
--- 1955,1961 ----
    if ((TREE_CODE (stmt) == VAR_DECL
         || TREE_CODE (stmt) == PARM_DECL
         || TREE_CODE (stmt) == RESULT_DECL)
!       && DECL_HAS_VALUE_EXPR_P (stmt))
      {
        tree ve = DECL_VALUE_EXPR (stmt);
        cp_walk_tree (&ve, cp_genericize_r, data, NULL);
diff -Nrcpad gcc-17-20260503/gcc/cp/cp-tree.h gcc-17-20260510/gcc/cp/cp-tree.h
*** gcc-17-20260503/gcc/cp/cp-tree.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/cp-tree.h	Sun May 10 22:32:06 2026
*************** extern GTY(()) tree cp_global_trees[CPTI
*** 429,435 ****
        TARGET_EXPR_IMPLICIT_P (in TARGET_EXPR)
        TEMPLATE_PARM_PARAMETER_PACK (in TEMPLATE_PARM_INDEX)
        ATTR_IS_DEPENDENT (in the TREE_LIST for an attribute)
!       ABI_TAG_IMPLICIT (in the TREE_LIST for the argument of abi_tag)
        LAMBDA_CAPTURE_EXPLICIT_P (in a TREE_LIST in LAMBDA_EXPR_CAPTURE_LIST)
        PARENTHESIZED_LIST_P (in the TREE_LIST for a parameter-declaration-list)
        CONSTRUCTOR_IS_DIRECT_INIT (in CONSTRUCTOR)
--- 429,435 ----
        TARGET_EXPR_IMPLICIT_P (in TARGET_EXPR)
        TEMPLATE_PARM_PARAMETER_PACK (in TEMPLATE_PARM_INDEX)
        ATTR_IS_DEPENDENT (in the TREE_LIST for an attribute)
!       ABI_TAG_NOT_MANGLED (in the TREE_LIST for the argument of abi_tag)
        LAMBDA_CAPTURE_EXPLICIT_P (in a TREE_LIST in LAMBDA_EXPR_CAPTURE_LIST)
        PARENTHESIZED_LIST_P (in the TREE_LIST for a parameter-declaration-list)
        CONSTRUCTOR_IS_DIRECT_INIT (in CONSTRUCTOR)
*************** extern GTY(()) tree cp_global_trees[CPTI
*** 480,485 ****
--- 480,486 ----
        BASELINK_FUNCTIONS_MAYBE_INCOMPLETE_P (in BASELINK)
        BIND_EXPR_VEC_DTOR (in BIND_EXPR)
        ATOMIC_CONSTR_EXPR_FROM_CONCEPT_P (in ATOMIC_CONSTR)
+       ABI_TAG_INHERITED (in the TREE_LIST for the argument of abi_tag)
        STATIC_INIT_DECOMP_BASE_P (in the TREE_LIST for {static,tls}_aggregates)
        MUST_NOT_THROW_THROW_P (in MUST_NOT_THROW_EXPR)
        LAMBDA_EXPR_CONST_QUAL_P (in LAMBDA_EXPR)
*************** struct GTY(()) lang_type {
*** 2682,2687 ****
--- 2683,2691 ----
    tree primary_base;
    vec<tree_pair_s, va_gc> *vcall_indices;
    tree vtables;
+   /* CLASSTYPE_TYPEINFO_VAR and/or ANON_AGGR_TYPE_FIELD.  If both,
+      this is a TREE_LIST with the former as TREE_VALUE and the latter
+      as TREE_PURPOSE.  */
    tree typeinfo_var;
    vec<tree, va_gc> *vbases;
    tree as_base;
*************** struct GTY(()) lang_type {
*** 3075,3085 ****
  #define CLASSTYPE_VTABLES(NODE) \
    (LANG_TYPE_CLASS_CHECK (NODE)->vtables)
  
  /* The std::type_info variable representing this class, or NULL if no
     such variable has been created.  This field is only set for the
     TYPE_MAIN_VARIANT of the class.  */
  #define CLASSTYPE_TYPEINFO_VAR(NODE) \
!   (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var)
  
  /* Accessor macros for the BINFO_VIRTUALS list.  */
  
--- 3079,3122 ----
  #define CLASSTYPE_VTABLES(NODE) \
    (LANG_TYPE_CLASS_CHECK (NODE)->vtables)
  
+ /* Helper for CLASSTYPE_TYPEINFO_VAR.  */
+ 
+ inline tree
+ get_classtype_typeinfo_var (tree typeinfo_var)
+ {
+   if (typeinfo_var == NULL_TREE)
+     return NULL_TREE;
+   if (TREE_CODE (typeinfo_var) == TREE_LIST)
+     return TREE_VALUE (typeinfo_var);
+   if (VAR_P (typeinfo_var))
+     return typeinfo_var;
+   return NULL_TREE;
+ }
+ 
  /* The std::type_info variable representing this class, or NULL if no
     such variable has been created.  This field is only set for the
     TYPE_MAIN_VARIANT of the class.  */
  #define CLASSTYPE_TYPEINFO_VAR(NODE) \
!   get_classtype_typeinfo_var (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var)
! 
! /* Helper for SET_CLASSTYPE_TYPEINFO_VAR.  */
! 
! inline tree &
! set_classtype_typeinfo_var (tree &typeinfo_var)
! {
!   if (typeinfo_var == NULL_TREE)
!     return typeinfo_var;
!   if (TREE_CODE (typeinfo_var) == FIELD_DECL)
!     typeinfo_var = build_tree_list (typeinfo_var, NULL_TREE);
!   if (TREE_CODE (typeinfo_var) == TREE_LIST)
!     return TREE_VALUE (typeinfo_var);
!   return typeinfo_var;
! }
! 
! /* Setter for that.  */
! #define SET_CLASSTYPE_TYPEINFO_VAR(NODE, VAR) \
!   (set_classtype_typeinfo_var (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var) \
!    = (VAR))
  
  /* Accessor macros for the BINFO_VIRTUALS list.  */
  
*************** struct GTY(()) lang_decl {
*** 3962,3969 ****
  #define ATTR_IS_DEPENDENT(NODE) TREE_LANG_FLAG_0 (TREE_LIST_CHECK (NODE))
  
  /* In a TREE_LIST in the argument of attribute abi_tag, indicates that the tag
!    was inherited from a template parameter, not explicitly indicated.  */
! #define ABI_TAG_IMPLICIT(NODE) TREE_LANG_FLAG_0 (TREE_LIST_CHECK (NODE))
  
  /* In a TREE_LIST for a parameter-declaration-list, indicates that all the
     parameters in the list have declarators enclosed in ().  */
--- 3999,4012 ----
  #define ATTR_IS_DEPENDENT(NODE) TREE_LANG_FLAG_0 (TREE_LIST_CHECK (NODE))
  
  /* In a TREE_LIST in the argument of attribute abi_tag, indicates that the tag
!    was inherited from a template parameter, not explicitly indicated.
!    These are not mangled because they're already represented in the mangling
!    of the template argument.  */
! #define ABI_TAG_NOT_MANGLED(NODE) TREE_LANG_FLAG_0 (TREE_LIST_CHECK (NODE))
! 
! /* In a TREE_LIST in the argument of attribute abi_tag, indicates that the tag
!  * was added by check_abi_tags, not explicitly specified.  */
! #define ABI_TAG_INHERITED(NODE) TREE_LANG_FLAG_1 (TREE_LIST_CHECK (NODE))
  
  /* In a TREE_LIST for a parameter-declaration-list, indicates that all the
     parameters in the list have declarators enclosed in ().  */
*************** get_vec_init_expr (tree t)
*** 5407,5415 ****
  #define ANON_UNION_TYPE_P(NODE) \
    (TREE_CODE (NODE) == UNION_TYPE && ANON_AGGR_TYPE_P (NODE))
  
  /* For an ANON_AGGR_TYPE_P the single FIELD_DECL it is used with.  */
  #define ANON_AGGR_TYPE_FIELD(NODE) \
!   (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var)
  
  /* Define fields and accessors for nodes representing declared names.  */
  
--- 5450,5491 ----
  #define ANON_UNION_TYPE_P(NODE) \
    (TREE_CODE (NODE) == UNION_TYPE && ANON_AGGR_TYPE_P (NODE))
  
+ /* Helper for ANON_AGGR_TYPE_FIELD.  */
+ 
+ inline tree
+ get_anon_aggr_type_field (tree typeinfo_var)
+ {
+   if (typeinfo_var == NULL_TREE)
+     return NULL_TREE;
+   if (TREE_CODE (typeinfo_var) == TREE_LIST)
+     return TREE_PURPOSE (typeinfo_var);
+   if (TREE_CODE (typeinfo_var) == FIELD_DECL)
+     return typeinfo_var;
+   return NULL_TREE;
+ }
+ 
  /* For an ANON_AGGR_TYPE_P the single FIELD_DECL it is used with.  */
  #define ANON_AGGR_TYPE_FIELD(NODE) \
!   get_anon_aggr_type_field (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var)
! 
! /* Helper for SET_ANON_AGGR_TYPE_FIELD.  */
! 
! inline tree &
! set_anon_aggr_type_field (tree &typeinfo_var)
! {
!   if (typeinfo_var == NULL_TREE)
!     return typeinfo_var;
!   if (VAR_P (typeinfo_var))
!     typeinfo_var = build_tree_list (NULL_TREE, typeinfo_var);
!   if (TREE_CODE (typeinfo_var) == TREE_LIST)
!     return TREE_PURPOSE (typeinfo_var);
!   return typeinfo_var;
! }
! 
! /* Setter for that.  */
! #define SET_ANON_AGGR_TYPE_FIELD(NODE, FIELD) \
!   (set_anon_aggr_type_field (LANG_TYPE_CLASS_CHECK (NODE)->typeinfo_var) \
!    = (FIELD))
  
  /* Define fields and accessors for nodes representing declared names.  */
  
*************** extern void mangle_module_substitution
*** 9123,9129 ****
  extern int mangle_module_component		(tree id, bool partition);
  extern tree mangle_module_global_init		(int);
  extern unsigned HOST_WIDE_INT range_expr_nelts	(tree);
! extern bool equal_abi_tags			(tree, tree);
  
  /* in dump.cc */
  extern bool cp_dump_tree			(void *, tree);
--- 9199,9205 ----
  extern int mangle_module_component		(tree id, bool partition);
  extern tree mangle_module_global_init		(int);
  extern unsigned HOST_WIDE_INT range_expr_nelts	(tree);
! extern bool equal_abi_tags			(tree, tree, bool);
  
  /* in dump.cc */
  extern bool cp_dump_tree			(void *, tree);
*************** extern void coro_set_ramp_function		(tre
*** 9441,9446 ****
--- 9517,9523 ----
  
  /* In reflect.cc */
  extern void init_reflection ();
+ extern tree maybe_update_function_parm (tree);
  extern bool metafunction_p (tree) ATTRIBUTE_PURE;
  extern tree direct_base_derived (tree) ATTRIBUTE_PURE;
  extern tree process_metafunction (const constexpr_ctx *, tree, tree,
diff -Nrcpad gcc-17-20260503/gcc/cp/decl.cc gcc-17-20260510/gcc/cp/decl.cc
*** gcc-17-20260503/gcc/cp/decl.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/decl.cc	Sun May 10 22:32:06 2026
*************** wrapup_namespace_globals ()
*** 1023,1028 ****
--- 1023,1032 ----
  
  	  if (VAR_P (decl)
  	      && DECL_EXTERNAL (decl)
+ 	      /* We mark consteval-only variables DECL_EXTERNAL, but
+ 		  extern constexpr inline std::meta::info i{};
+ 		 is a definition (the extern is redundant).  */
+ 	      && !DECL_INITIAL (decl)
  	      && DECL_INLINE_VAR_P (decl)
  	      && DECL_ODR_USED (decl))
  	    error_at (DECL_SOURCE_LOCATION (decl),
*************** fixup_anonymous_aggr (tree t)
*** 6200,6206 ****
    vec_safe_truncate (vec, store);
  
    /* Wipe RTTI info.  */
!   CLASSTYPE_TYPEINFO_VAR (t) = NULL_TREE;
  
    /* Anonymous aggregates cannot have fields with ctors, dtors or complex
       assignment operators (because they cannot have these methods themselves).
--- 6204,6210 ----
    vec_safe_truncate (vec, store);
  
    /* Wipe RTTI info.  */
!   SET_CLASSTYPE_TYPEINFO_VAR (t, NULL_TREE);
  
    /* Anonymous aggregates cannot have fields with ctors, dtors or complex
       assignment operators (because they cannot have these methods themselves).
diff -Nrcpad gcc-17-20260503/gcc/cp/error.cc gcc-17-20260510/gcc/cp/error.cc
*** gcc-17-20260503/gcc/cp/error.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/error.cc	Sun May 10 22:32:06 2026
*************** dump_expr (cxx_pretty_printer *pp, tree
*** 3331,3351 ****
  
      case REFLECT_EXPR:
        {
- 	pp_string (pp, "^^");
  	tree h = REFLECT_EXPR_HANDLE (t);
! 	if (DECL_P (h))
! 	  dump_decl (pp, h, flags);
! 	else if (TYPE_P (h))
! 	  dump_type (pp, h, flags);
! 	else if (TREE_CODE (h) == TREE_VEC)
  	  {
! 	    pp_format_decoder (pp) = cp_printer;
! 	    pp->set_format_postprocessor
! 	      (std::make_unique<cxx_format_postprocessor> ());
! 	    dump_data_member_spec (pp, h);
  	  }
- 	else
- 	  dump_expr (pp, h, flags);
  	break;
        }
  
--- 3331,3486 ----
  
      case REFLECT_EXPR:
        {
  	tree h = REFLECT_EXPR_HANDLE (t);
! 	bool any;
! 	switch (REFLECT_EXPR_KIND (t))
  	  {
! 	  case REFLECT_ANNOTATION:
! 	    pp_string (pp, "^^[[=");
! 	    pp->set_padding (pp_none);
! 	    dump_expr (pp, TREE_VALUE (TREE_VALUE (h)), flags);
! 	    pp_string (pp, "]]");
! 	    break;
! 	  case REFLECT_DATA_MEMBER_SPEC:
! 	    pp_cxx_ws_string (pp, "data_member_spec");
! 	    pp_string (pp, "(^^");
! 	    pp->set_padding (pp_none);
! 	    dump_type (pp, TREE_VEC_ELT (h, 0), flags);
! 	    pp_string (pp, ",{");
! 	    any = false;
! 	    if (TREE_VEC_ELT (h, 1))
! 	      {
! 		pp_string (pp, ".name=");
! 		pp_doublequote (pp);
! 		pp->set_padding (pp_none);
! 		dump_decl (pp, TREE_VEC_ELT (h, 1), flags);
! 		pp_doublequote (pp);
! 		any = true;
! 	      }
! 	    if (TREE_VEC_ELT (h, 2))
! 	      {
! 		if (any)
! 		  pp_comma (pp);
! 		pp_string (pp, ".alignment=");
! 		pp->set_padding (pp_none);
! 		dump_expr (pp, TREE_VEC_ELT (h, 2), flags);
! 		any = true;
! 	      }
! 	    if (TREE_VEC_ELT (h, 3))
! 	      {
! 		if (any)
! 		  pp_comma (pp);
! 		pp_string (pp, ".bit_width=");
! 		pp->set_padding (pp_none);
! 		dump_expr (pp, TREE_VEC_ELT (h, 3), flags);
! 		any = true;
! 	      }
! 	    if (TREE_VEC_ELT (h, 4) && !integer_zerop (TREE_VEC_ELT (h, 4)))
! 	      {
! 		if (any)
! 		  pp_comma (pp);
! 		pp_string (pp, ".no_unique_address=");
! 		pp->set_padding (pp_none);
! 		dump_expr (pp, TREE_VEC_ELT (h, 4), flags);
! 		any = true;
! 	      }
! 	    if (TREE_VEC_LENGTH (h) > 5)
! 	      {
! 		if (any)
! 		  pp_comma (pp);
! 		pp_string (pp, ".annotations={");
! 		pp->set_padding (pp_none);
! 		for (int i = 5; i < TREE_VEC_LENGTH (h); ++i)
! 		  {
! 		    dump_expr (pp, TREE_VEC_ELT (h, i), flags);
! 		    if (i != TREE_VEC_LENGTH (h) - 1)
! 		      pp_comma (pp);
! 		    pp->set_padding (pp_none);
! 		  }
! 		pp_right_brace (pp);
! 	      }
! 	    pp_string (pp, "})");
! 	    break;
! 	  case REFLECT_BASE:
! 	    {
! 	      pp_cxx_ws_string (pp, "bases_of");
! 	      pp_string (pp, "(^^");
! 	      pp->set_padding (pp_none);
! 	      tree d = direct_base_derived (h);
! 	      dump_type (pp, d, flags);
! 	      pp_string (pp, ",std::meta::access_context::unchecked())[");
! 	      pp->set_padding (pp_none);
! 	      tree binfo = TYPE_BINFO (d), base_binfo;
! 	      for (unsigned i = 0; BINFO_BASE_ITERATE (binfo, i, base_binfo);
! 		   i++)
! 		if (base_binfo == h)
! 		  {
! 		    pp_wide_integer (pp, i);
! 		    break;
! 		  }
! 	      pp_string (pp, "] {aka ");
! 	      pp->set_padding (pp_none);
! 	      dump_type (pp, BINFO_TYPE (h), flags);
! 	      pp_right_brace (pp);
! 	      break;
! 	    }
! 	  case REFLECT_PARM:
! 	    {
! 	      pp_cxx_ws_string (pp, "parameters_of");
! 	      pp_string (pp, "(^^");
! 	      pp->set_padding (pp_none);
! 	      h = maybe_update_function_parm (h);
! 	      dump_decl (pp, DECL_CONTEXT (h), flags);
! 	      pp_string (pp, ")[");
! 	      pp->set_padding (pp_none);
! 	      unsigned int i = 0;
! 	      for (tree arg = FUNCTION_FIRST_USER_PARM (DECL_CONTEXT (h));
! 		   arg; arg = DECL_CHAIN (arg), ++i)
! 		if (arg == h)
! 		  {
! 		    pp_wide_integer (pp, i);
! 		    break;
! 		  }
! 	      pp_right_bracket (pp);
! 	      if (MULTIPLE_NAMES_PARM_P (h))
! 		break;
! 	      if (DECL_NAME (h))
! 		h = DECL_NAME (h);
! 	      else if (tree opn = lookup_attribute ("old parm name",
! 						    DECL_ATTRIBUTES (h)))
! 		h = TREE_VALUE (TREE_VALUE (opn));
! 	      else
! 		break;
! 	      pp_string (pp, " {aka ");
! 	      dump_decl (pp, h, flags);
! 	      pp_right_brace (pp);
! 	      break;
! 	    }
! 	  case REFLECT_OBJECT:
! 	    pp_cxx_ws_string (pp, "std::meta::reflect_object");
! 	    pp_left_paren (pp);
! 	    pp->set_padding (pp_none);
! 	    dump_expr (pp, h, flags);
! 	    pp_right_paren (pp);
! 	    break;
! 	  case REFLECT_VALUE:
! 	    pp_cxx_ws_string (pp, "std::meta::reflect_constant");
! 	    pp_left_paren (pp);
! 	    pp->set_padding (pp_none);
! 	    dump_expr (pp, h, flags);
! 	    pp_right_paren (pp);
! 	    break;
! 	  default:
! 	    pp_string (pp, "^^");
! 	    pp->set_padding (pp_none);
! 	    if (DECL_P (h))
! 	      dump_decl (pp, h, flags);
! 	    else if (TYPE_P (h))
! 	      dump_type (pp, h, flags);
! 	    else
! 	      dump_expr (pp, h, flags);
! 	    break;
  	  }
  	break;
        }
  
diff -Nrcpad gcc-17-20260503/gcc/cp/mangle.cc gcc-17-20260510/gcc/cp/mangle.cc
*** gcc-17-20260503/gcc/cp/mangle.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/mangle.cc	Sun May 10 22:32:06 2026
*************** write_unqualified_name (tree decl)
*** 1645,1651 ****
  
  	  if (!G.need_abi_warning
  	      && abi_warn_or_compat_version_crosses (11)
! 	      && !equal_abi_tags (dtags, mtags))
  	    G.need_abi_warning = 1;
  
  	  if (!abi_version_at_least (10))
--- 1645,1651 ----
  
  	  if (!G.need_abi_warning
  	      && abi_warn_or_compat_version_crosses (11)
! 	      && !equal_abi_tags (dtags, mtags, /*ignore_inherited_p=*/false))
  	    G.need_abi_warning = 1;
  
  	  if (!abi_version_at_least (10))
*************** tree_string_cmp (const void *p1, const v
*** 1709,1721 ****
  /* Return the TREE_LIST of TAGS as a sorted VEC.  */
  
  static vec<tree, va_gc> *
! sorted_abi_tags (tree tags)
  {
    vec<tree, va_gc> * vec = make_tree_vector();
  
    for (tree t = tags; t; t = TREE_CHAIN (t))
      {
!       if (ABI_TAG_IMPLICIT (t))
  	continue;
        tree str = TREE_VALUE (t);
        vec_safe_push (vec, str);
--- 1709,1722 ----
  /* Return the TREE_LIST of TAGS as a sorted VEC.  */
  
  static vec<tree, va_gc> *
! sorted_abi_tags (tree tags, bool ignore_inherited_p)
  {
    vec<tree, va_gc> * vec = make_tree_vector();
  
    for (tree t = tags; t; t = TREE_CHAIN (t))
      {
!       if (ABI_TAG_NOT_MANGLED (t)
! 	  || (ignore_inherited_p && ABI_TAG_INHERITED (t)))
  	continue;
        tree str = TREE_VALUE (t);
        vec_safe_push (vec, str);
*************** write_abi_tags (tree tags)
*** 1735,1741 ****
    if (tags == NULL_TREE)
      return;
  
!   vec<tree, va_gc> * vec = sorted_abi_tags (tags);
  
    unsigned i; tree str;
    FOR_EACH_VEC_ELT (*vec, i, str)
--- 1736,1742 ----
    if (tags == NULL_TREE)
      return;
  
!   vec<tree, va_gc> * vec = sorted_abi_tags (tags, /*ignore_inherited_p=*/false);
  
    unsigned i; tree str;
    FOR_EACH_VEC_ELT (*vec, i, str)
*************** write_abi_tags (tree tags)
*** 1751,1760 ****
  /* True iff the TREE_LISTS T1 and T2 of ABI tags are equivalent.  */
  
  bool
! equal_abi_tags (tree t1, tree t2)
  {
!   releasing_vec v1 = sorted_abi_tags (t1);
!   releasing_vec v2 = sorted_abi_tags (t2);
  
    unsigned len1 = v1->length();
    if (len1 != v2->length())
--- 1752,1761 ----
  /* True iff the TREE_LISTS T1 and T2 of ABI tags are equivalent.  */
  
  bool
! equal_abi_tags (tree t1, tree t2, bool ignore_inherited_p)
  {
!   releasing_vec v1 = sorted_abi_tags (t1, ignore_inherited_p);
!   releasing_vec v2 = sorted_abi_tags (t2, ignore_inherited_p);
  
    unsigned len1 = v1->length();
    if (len1 != v2->length())
diff -Nrcpad gcc-17-20260503/gcc/cp/module.cc gcc-17-20260510/gcc/cp/module.cc
*** gcc-17-20260503/gcc/cp/module.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/module.cc	Sun May 10 22:32:06 2026
*************** elf_out::create_mapping (unsigned ext, b
*** 1912,1918 ****
      {
  #ifdef HAVE_POSIX_FALLOCATE
        int result = posix_fallocate (fd, offset, length);
!       if (result != EINVAL)
  	return result == 0;
        /* Not supported by the underlying filesystem, fallback to ftruncate.  */
  #endif
--- 1912,1918 ----
      {
  #ifdef HAVE_POSIX_FALLOCATE
        int result = posix_fallocate (fd, offset, length);
!       if (result != EINVAL && result != ENOTSUP)
  	return result == 0;
        /* Not supported by the underlying filesystem, fallback to ftruncate.  */
  #endif
*************** trees_in::check_abi_tags (tree existing,
*** 12542,12549 ****
        if (dtags)
  	dtags = TREE_VALUE (dtags);
  
!       /* We only error if mangling wouldn't consider the tags equivalent.  */
!       if (!equal_abi_tags (etags, dtags))
  	{
  	  auto_diagnostic_group d;
  	  if (dtags)
--- 12542,12554 ----
        if (dtags)
  	dtags = TREE_VALUE (dtags);
  
!       /* We only error if mangling wouldn't consider the tags equivalent.
! 	 Since tags might have been inherited during mangling, ignore
! 	 inherited tags if there's a mangled-ness mismatch.  */
!       bool ignore_inherited_p
! 	= (DECL_ASSEMBLER_NAME_SET_P (STRIP_TEMPLATE (existing))
! 	   != DECL_ASSEMBLER_NAME_SET_P (STRIP_TEMPLATE (decl)));
!       if (!equal_abi_tags (etags, dtags, ignore_inherited_p))
  	{
  	  auto_diagnostic_group d;
  	  if (dtags)
*************** trees_in::read_class_def (tree defn, tre
*** 13730,13738 ****
  		{
  		  CLASSTYPE_BEFRIENDING_CLASSES (type_dup)
  		    = CLASSTYPE_BEFRIENDING_CLASSES (type);
! 		  if (!ANON_AGGR_TYPE_P (type))
! 		    CLASSTYPE_TYPEINFO_VAR (type_dup)
! 		      = CLASSTYPE_TYPEINFO_VAR (type);
  		}
  	      for (tree v = type; v; v = TYPE_NEXT_VARIANT (v))
  		TYPE_LANG_SPECIFIC (v) = ls;
--- 13735,13742 ----
  		{
  		  CLASSTYPE_BEFRIENDING_CLASSES (type_dup)
  		    = CLASSTYPE_BEFRIENDING_CLASSES (type);
! 		  SET_CLASSTYPE_TYPEINFO_VAR (type_dup,
! 					      CLASSTYPE_TYPEINFO_VAR (type));
  		}
  	      for (tree v = type; v; v = TYPE_NEXT_VARIANT (v))
  		TYPE_LANG_SPECIFIC (v) = ls;
*************** trees_in::read_class_def (tree defn, tre
*** 13773,13779 ****
  		       to the as-base FIELD_DECL copy.  */
  		    gcc_checking_assert (ANON_AGGR_TYPE_FIELD (anon_type));
  		  else
! 		    ANON_AGGR_TYPE_FIELD (anon_type) = decl;
  		}
  
  	      if (TREE_CODE (decl) == USING_DECL
--- 13777,13783 ----
  		       to the as-base FIELD_DECL copy.  */
  		    gcc_checking_assert (ANON_AGGR_TYPE_FIELD (anon_type));
  		  else
! 		    SET_ANON_AGGR_TYPE_FIELD (anon_type, decl);
  		}
  
  	      if (TREE_CODE (decl) == USING_DECL
diff -Nrcpad gcc-17-20260503/gcc/cp/parser.cc gcc-17-20260510/gcc/cp/parser.cc
*** gcc-17-20260503/gcc/cp/parser.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/parser.cc	Sun May 10 22:32:06 2026
*************** cp_parser_class_specifier (cp_parser* pa
*** 29827,29832 ****
--- 29827,29833 ----
        case CPP_SEMICOLON:
        case CPP_MULT:
        case CPP_AND:
+       case CPP_AND_AND:
        case CPP_OPEN_PAREN:
        case CPP_CLOSE_PAREN:
        case CPP_COMMA:
diff -Nrcpad gcc-17-20260503/gcc/cp/pt.cc gcc-17-20260510/gcc/cp/pt.cc
*** gcc-17-20260503/gcc/cp/pt.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/pt.cc	Sun May 10 22:32:06 2026
*************** invalid_tparm_referent_p (tree type, tre
*** 7439,7456 ****
  			"because %qD has no linkage", expr, type, decl);
  	    return true;
  	  }
! 	/* C++17: For a non-type template-parameter of reference or pointer
! 	   type, the value of the constant expression shall not refer to (or
! 	   for a pointer type, shall not be the address of):
! 	   * a subobject (4.5),
! 	   * a temporary object (15.2),
! 	   * a string literal (5.13.5),
! 	   * the result of a typeid expression (8.2.8), or
! 	   * a predefined __func__ variable (11.4.1).  */
  	else if (VAR_P (decl) && DECL_ARTIFICIAL (decl)
  		 && !DECL_NTTP_OBJECT_P (decl))
  	  {
! 	    gcc_checking_assert (DECL_TINFO_P (decl) || DECL_FNAME_P (decl));
  	    if (complain & tf_error)
  	      error ("the address of %qD is not a valid template argument",
  		     decl);
--- 7439,7460 ----
  			"because %qD has no linkage", expr, type, decl);
  	    return true;
  	  }
! 	/* For a constant template parameter of reference or pointer type,
! 	   or for each non-static data member of reference or pointer type
! 	   in a constant template parameter of class type or subobject thereof,
! 	   the reference or pointer value shall not refer or point to
! 	   (respectively):
! 	   -- a temporary object,
! 	   -- a string literal object,
! 	   -- the result of a typeid expression,
! 	   -- a predefined __func__ variable, or
! 	   -- a subobject of one of the above.  */
  	else if (VAR_P (decl) && DECL_ARTIFICIAL (decl)
  		 && !DECL_NTTP_OBJECT_P (decl))
  	  {
! 	    gcc_checking_assert (DECL_TINFO_P (decl)
! 				 || DECL_FNAME_P (decl)
! 				 || DECL_IGNORED_P (decl));
  	    if (complain & tf_error)
  	      error ("the address of %qD is not a valid template argument",
  		     decl);
diff -Nrcpad gcc-17-20260503/gcc/cp/reflect.cc gcc-17-20260510/gcc/cp/reflect.cc
*** gcc-17-20260503/gcc/cp/reflect.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/reflect.cc	Sun May 10 22:32:06 2026
*************** maybe_strip_typedefs (tree t)
*** 283,289 ****
     DECL_ARGUMENTS (DECL_CONTEXT (parm)) chain.  Return corresponding
     PARM_DECL which is in the chain.  */
  
! static tree
  maybe_update_function_parm (tree parm)
  {
    if (!OLD_PARM_DECL_P (parm))
--- 283,289 ----
     DECL_ARGUMENTS (DECL_CONTEXT (parm)) chain.  Return corresponding
     PARM_DECL which is in the chain.  */
  
! tree
  maybe_update_function_parm (tree parm)
  {
    if (!OLD_PARM_DECL_P (parm))
*************** extract_ref (location_t loc, const const
*** 7453,7458 ****
--- 7453,7462 ----
      {
        if (TYPE_REF_P (type))
  	type = TREE_TYPE (type);
+       if (FUNC_OR_METHOD_TYPE_P (type)
+ 	  || (TREE_CODE (type) == ARRAY_TYPE
+ 	      && TYPE_DOMAIN (type) == NULL_TREE))
+ 	return error_mark_node;
        type = build_cplus_array_type (type, NULL_TREE);
        return build_pointer_type (type);
      };
*************** extract_ref (location_t loc, const const
*** 7462,7468 ****
      {
        /* The wording is saying that U is the type of r.  */
        tree U = TREE_TYPE (r);
!       if (is_convertible (adjust_type (U), adjust_type (T))
  	  && (!var_p || is_constant_expression (r)))
  	{
  	  if (TYPE_REF_P (TREE_TYPE (r)))
--- 7466,7476 ----
      {
        /* The wording is saying that U is the type of r.  */
        tree U = TREE_TYPE (r);
!       tree adju = adjust_type (U);
!       tree adjt = adjust_type (T);
!       if (adju != error_mark_node
! 	  && adjt != error_mark_node
! 	  && is_convertible (adju, adjt)
  	  && (!var_p || is_constant_expression (r)))
  	{
  	  if (TYPE_REF_P (TREE_TYPE (r)))
*************** splice (tree refl)
*** 8561,8607 ****
    return refl;
  }
  
! /* A walker for consteval_only_p.  It cannot be a lambda, because we
!    have to call this recursively, sigh.  */
! 
! static tree
! consteval_only_type_r (tree *tp, int *walk_subtrees, void *data)
! {
!   tree t = *tp;
!   /* Types can contain themselves recursively, hence this.  */
!   auto visited = static_cast<hash_set<tree> *>(data);
! 
!   if (!TYPE_P (t))
!     return NULL_TREE;
! 
!   if (REFLECTION_TYPE_P (t))
!     return t;
  
!   if (typedef_variant_p (t))
!     /* Tell cp_walk_subtrees to look through typedefs.  */
!     *walk_subtrees = 2;
  
!   if (RECORD_OR_UNION_TYPE_P (t))
!     {
!       /* Don't walk template arguments; A<info>::type isn't a consteval-only
! 	 type.  */
!       *walk_subtrees = 0;
!       /* So we have to walk the fields manually.  */
!       for (tree member = TYPE_FIELDS (t);
! 	   member; member = DECL_CHAIN (member))
! 	if (TREE_CODE (member) == FIELD_DECL)
! 	  if (tree r = cp_walk_tree (&TREE_TYPE (member),
! 				     consteval_only_type_r, visited, visited))
! 	    return r;
!     }
  
!   return NULL_TREE;
! }
  
! /* True if T is a consteval-only type as per [basic.types.general]:
!    "A type is consteval-only if it is either std::meta::info or a type
!    compounded from a consteval-only type", or something that has
!    a consteval-only type.  */
  
  bool
  consteval_only_p (tree t)
--- 8569,8594 ----
    return refl;
  }
  
! /* A cache of the known boolean result of consteval_only_p_walker::walk
!    for class types.  */
  
! static GTY((cache)) type_tree_cache_map *consteval_only_class_cache;
  
! struct consteval_only_p_walker
! {
!   /* The set of class types we've seen.  */
!   hash_set<tree> class_seen;
!   /* The number of class types we're recursively inside.  */
!   int class_depth = 0;
!   /* True if we've optimistically assumed an already-seen
!      consteval-unknown class type is not consteval.  */
!   bool optimistic_p = false;
  
!   tristate walk (tree);
! };
  
! /* True if T is a consteval-only type as per [basic.types.general]/12,
!    or is a declaration with such a type, or a TREE_VEC thereof.  */
  
  bool
  consteval_only_p (tree t)
*************** consteval_only_p (tree t)
*** 8612,8618 ****
    if (!TYPE_P (t))
      t = TREE_TYPE (t);
  
!   if (!t)
      return false;
  
    if (TREE_CODE (t) == TREE_VEC)
--- 8599,8605 ----
    if (!TYPE_P (t))
      t = TREE_TYPE (t);
  
!   if (!t || t == error_mark_node)
      return false;
  
    if (TREE_CODE (t) == TREE_VEC)
*************** consteval_only_p (tree t)
*** 8634,8642 ****
       which could be consteval-only, depending on T.  */
    t = complete_type (t);
  
!   /* Classes with std::meta::info members are also consteval-only.  */
!   hash_set<tree> visited;
!   return !!cp_walk_tree (&t, consteval_only_type_r, &visited, &visited);
  }
  
  /* A walker for check_out_of_consteval_use_r.  It cannot be a lambda, because
--- 8621,8703 ----
       which could be consteval-only, depending on T.  */
    t = complete_type (t);
  
!   consteval_only_p_walker walker;
!   return walker.walk (t).is_true ();
! }
! 
! /* Recursive workhorse of consteval_only_p.  Returns true if T is definitely
!    consteval-only, false if it's definitely not, and unknown if we saw an
!    incomplete type and therefore don't know.  */
! 
! tristate
! consteval_only_p_walker::walk (tree t)
! {
!   t = TYPE_MAIN_VARIANT (t);
! 
!   if (REFLECTION_TYPE_P (t))
!     return true;
!   else if (INDIRECT_TYPE_P (t))
!     return walk (TREE_TYPE (t));
!   else if (TREE_CODE (t) == ARRAY_TYPE)
!     return walk (TREE_TYPE (t));
!   else if (FUNC_OR_METHOD_TYPE_P (t))
!     {
!       tristate r = walk (TREE_TYPE (t));
!       for (tree parm = TYPE_ARG_TYPES (t);
! 	   parm != NULL_TREE && parm != void_list_node;
! 	   parm = TREE_CHAIN (parm))
! 	{
! 	  if (r.is_true ())
! 	    break;
! 	  r = r || walk (TREE_VALUE (parm));
! 	}
!       return r;
!     }
!   else if (RECORD_OR_UNION_TYPE_P (t))
!     {
!       if (tree *slot = hash_map_safe_get (consteval_only_class_cache, t))
! 	return *slot == boolean_true_node;
! 
!       if (!COMPLETE_TYPE_P (t) && LAMBDA_TYPE_P (t))
! 	/* Defer until we've definitely gone through prune_lambda_captures.  */
! 	return tristate::unknown ();
! 
!       if (class_seen.add (t))
! 	{
! 	  /* Optimistically assume this already seen consteval-unknown class is
! 	     not consteval-only, for sake of mutually recursive classes.  */
! 	  optimistic_p = true;
! 	  return false;
! 	}
!       ++class_depth;
! 
!       tristate r = COMPLETE_TYPE_P (t) ? false : tristate::unknown ();
!       for (tree member = TYPE_FIELDS (t); member; member = DECL_CHAIN (member))
! 	if (TREE_CODE (member) == FIELD_DECL)
! 	  {
! 	    r = r || walk (TREE_TYPE (member));
! 	    if (r.is_true ())
! 	      break;
! 	  }
! 
!       if (r.is_true ())
! 	hash_map_safe_put<hm_ggc> (consteval_only_class_cache,
! 				   t, boolean_true_node);
!       else if (r.is_false ()
! 	       /* The optimistic assumption above is at odds with caching
! 		  'false' results for a nested class type.  */
! 	       && (class_depth == 1 || !optimistic_p))
! 	hash_map_safe_put<hm_ggc> (consteval_only_class_cache,
! 				   t, boolean_false_node);
! 
!       --class_depth;
!       return r;
!     }
!   else if (TYPE_PTRMEM_P (t))
!     return (walk (TYPE_PTRMEM_CLASS_TYPE (t))
! 	    || walk (TYPE_PTRMEM_POINTED_TO_TYPE (t)));
!   else
!     return false;
  }
  
  /* A walker for check_out_of_consteval_use_r.  It cannot be a lambda, because
*************** check_out_of_consteval_use_r (tree *tp,
*** 8655,8660 ****
--- 8716,8723 ----
        || TREE_CODE (t) == INIT_EXPR
        /* And don't recurse on DECL_EXPRs.  */
        || TREE_CODE (t) == DECL_EXPR
+       /* Neither into USING_STMT.  */
+       || TREE_CODE (t) == USING_STMT
        /* Blocks can appear in the TREE_VEC operand of OpenMP
  	 depend/affinity/map/to/from OMP_CLAUSEs when using iterators.  */
        || TREE_CODE (t) == BLOCK)
diff -Nrcpad gcc-17-20260503/gcc/cp/rtti.cc gcc-17-20260510/gcc/cp/rtti.cc
*** gcc-17-20260503/gcc/cp/rtti.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/rtti.cc	Sun May 10 22:32:06 2026
*************** get_tinfo_decl_direct (tree type, tree n
*** 490,496 ****
  
        d = pushdecl_top_level_and_finish (d, NULL_TREE);
        if (CLASS_TYPE_P (type))
! 	CLASSTYPE_TYPEINFO_VAR (TYPE_MAIN_VARIANT (type)) = d;
  
        /* Add decl to the global array of tinfo decls.  */
        vec_safe_push (unemitted_tinfo_decls, d);
--- 490,496 ----
  
        d = pushdecl_top_level_and_finish (d, NULL_TREE);
        if (CLASS_TYPE_P (type))
! 	SET_CLASSTYPE_TYPEINFO_VAR (TYPE_MAIN_VARIANT (type), d);
  
        /* Add decl to the global array of tinfo decls.  */
        vec_safe_push (unemitted_tinfo_decls, d);
diff -Nrcpad gcc-17-20260503/gcc/cp/search.cc gcc-17-20260510/gcc/cp/search.cc
*** gcc-17-20260503/gcc/cp/search.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/search.cc	Sun May 10 22:32:06 2026
*************** accessible_p (tree type, tree decl, bool
*** 936,941 ****
--- 936,943 ----
    /* Anonymous unions don't have their own access.  */
    if (ANON_AGGR_TYPE_P (type))
      type = type_context_for_name_lookup (type);
+   if (ANON_AGGR_TYPE_P (otype))
+     otype = type_context_for_name_lookup (otype);
  
    /* [class.access.base]
  
diff -Nrcpad gcc-17-20260503/gcc/cp/semantics.cc gcc-17-20260510/gcc/cp/semantics.cc
*** gcc-17-20260503/gcc/cp/semantics.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/semantics.cc	Sun May 10 22:32:06 2026
*************** finish_member_declaration (tree decl)
*** 4284,4290 ****
        && ANON_AGGR_TYPE_P (TREE_TYPE (decl)))
      {
        gcc_assert (!ANON_AGGR_TYPE_FIELD (TYPE_MAIN_VARIANT (TREE_TYPE (decl))));
!       ANON_AGGR_TYPE_FIELD (TYPE_MAIN_VARIANT (TREE_TYPE (decl))) = decl;
      }
  
    if (TREE_CODE (decl) == USING_DECL)
--- 4284,4290 ----
        && ANON_AGGR_TYPE_P (TREE_TYPE (decl)))
      {
        gcc_assert (!ANON_AGGR_TYPE_FIELD (TYPE_MAIN_VARIANT (TREE_TYPE (decl))));
!       SET_ANON_AGGR_TYPE_FIELD (TYPE_MAIN_VARIANT (TREE_TYPE (decl)), decl);
      }
  
    if (TREE_CODE (decl) == USING_DECL)
diff -Nrcpad gcc-17-20260503/gcc/cp/tree.cc gcc-17-20260510/gcc/cp/tree.cc
*** gcc-17-20260503/gcc/cp/tree.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/cp/tree.cc	Sun May 10 22:32:06 2026
*************** strip_typedefs_expr (tree t, bool *remov
*** 2155,2166 ****
  
      case LAMBDA_EXPR:
      case STMT_EXPR:
!       return t;
! 
      case REFLECT_EXPR:
!       /* ^^alias represents the alias itself, not the underlying type.  */
!       if (TYPE_P (REFLECT_EXPR_HANDLE (t)))
! 	return t;
  
      default:
        break;
--- 2155,2163 ----
  
      case LAMBDA_EXPR:
      case STMT_EXPR:
!     /* ^^alias represents the alias itself, not the underlying type.  */
      case REFLECT_EXPR:
!       return t;
  
      default:
        break;
diff -Nrcpad gcc-17-20260503/gcc/d/ChangeLog gcc-17-20260510/gcc/d/ChangeLog
*** gcc-17-20260503/gcc/d/ChangeLog	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/d/ChangeLog	Sun May 10 22:32:06 2026
***************
*** 1,3 ****
--- 1,12 ----
+ 2026-05-05  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/125089
+ 	* types.cc (finish_aggregate_mode): Explicitly set TYPE_MODE of
+ 	non-POD types here.
+ 	(finish_aggregate_type): Propagate TREE_ADDRESSABLE to all variants.
+ 	(TypeVisitor::visit (TypeStruct *)): Set TREE_ADDRESSABLE before
+ 	visiting struct members.
+ 
  2026-04-21  Iain Buclaw  <ibuclaw@gdcproject.org>
  
  	* dmd/MERGE: Merge upstream dmd d1fbbb1a2f.
diff -Nrcpad gcc-17-20260503/gcc/d/types.cc gcc-17-20260510/gcc/d/types.cc
*** gcc-17-20260503/gcc/d/types.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/d/types.cc	Sun May 10 22:32:06 2026
*************** finish_aggregate_mode (tree type)
*** 593,599 ****
  	return;
      }
  
!   compute_record_mode (type);
  
    /* Propagate computed mode to all variants of this aggregate type.  */
    for (tree t = TYPE_MAIN_VARIANT (type); t; t = TYPE_NEXT_VARIANT (t))
--- 593,604 ----
  	return;
      }
  
!   /* Force mode of non-trivially copyable structs to be BLKmode, preventing it
!      from being returned in a register.  */
!   if (TREE_ADDRESSABLE (type))
!     SET_TYPE_MODE (type, BLKmode);
!   else
!     compute_record_mode (type);
  
    /* Propagate computed mode to all variants of this aggregate type.  */
    for (tree t = TYPE_MAIN_VARIANT (type); t; t = TYPE_NEXT_VARIANT (t))
*************** finish_aggregate_type (unsigned structsi
*** 715,720 ****
--- 720,726 ----
        TYPE_PACKED (t) = TYPE_PACKED (type);
        SET_TYPE_ALIGN (t, TYPE_ALIGN (type));
        TYPE_USER_ALIGN (t) = TYPE_USER_ALIGN (type);
+       TREE_ADDRESSABLE (t) = TREE_ADDRESSABLE (type);
      }
  
    /* Complete any other forward-referenced fields of this aggregate type.  */
*************** public:
*** 1236,1241 ****
--- 1242,1253 ----
      TYPE_LANG_SPECIFIC (t->ctype) = build_lang_type (t);
      TYPE_CXX_ODR_P (t->ctype) = 1;
  
+     /* For structs with a user defined postblit, copy constructor, or a
+        destructor, also set TREE_ADDRESSABLE on the type and all variants.
+        This will make the struct be passed around by reference.  */
+     if (!dmd::isPOD (t->sym))
+       TREE_ADDRESSABLE (t->ctype) = 1;
+ 
      if (t->sym->members)
        {
  	/* Must set up the overall size and alignment before determining
*************** public:
*** 1257,1274 ****
  	build_type_decl (t->ctype, t->sym);
  	apply_user_attributes (t->sym, t->ctype);
        }
- 
-     /* For structs with a user defined postblit, copy constructor, or a
-        destructor, also set TREE_ADDRESSABLE on the type and all variants.
-        This will make the struct be passed around by reference.  */
-     if (!dmd::isPOD (t->sym))
-       {
- 	for (tree tv = t->ctype; tv != NULL_TREE; tv = TYPE_NEXT_VARIANT (tv))
- 	  {
- 	    TREE_ADDRESSABLE (tv) = 1;
- 	    SET_TYPE_MODE (tv, BLKmode);
- 	  }
-       }
    }
  
    /* Build a class type.  Whereas structs are value types, classes are
--- 1269,1274 ----
diff -Nrcpad gcc-17-20260503/gcc/data-streamer-in.cc gcc-17-20260510/gcc/data-streamer-in.cc
*** gcc-17-20260503/gcc/data-streamer-in.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/data-streamer-in.cc	Sun May 10 22:32:06 2026
*************** streamer_read_value_range (class lto_inp
*** 223,229 ****
    tree type = stream_read_tree (ib, data_in);
  
    // Initialize the value_range to the correct type.
!   vr.set_type (type);
  
    if (is_a <irange> (vr))
      {
--- 223,229 ----
    tree type = stream_read_tree (ib, data_in);
  
    // Initialize the value_range to the correct type.
!   vr.set_range_class (type);
  
    if (is_a <irange> (vr))
      {
diff -Nrcpad gcc-17-20260503/gcc/digraph.cc gcc-17-20260510/gcc/digraph.cc
*** gcc-17-20260503/gcc/digraph.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/digraph.cc	Sun May 10 22:32:06 2026
*************** struct test_cluster : public cluster<tes
*** 96,101 ****
--- 96,104 ----
  
  struct test_path
  {
+   void append_edge (const test_edge *edge) { m_edges.safe_push (edge); }
+   void reverse () { m_edges.reverse (); }
+ 
    auto_vec<const test_edge *> m_edges;
  };
  
diff -Nrcpad gcc-17-20260503/gcc/doc/extend.texi gcc-17-20260510/gcc/doc/extend.texi
*** gcc-17-20260503/gcc/doc/extend.texi	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/extend.texi	Sun May 10 22:32:06 2026
*************** As an extension, GNU C supports named ad
*** 1379,1385 ****
  defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
  address spaces in GCC will evolve as the draft technical report
  changes.  Calling conventions for any target might also change.  At
! present, only the AVR, M32C, PRU, RL78, and x86 targets support
  address spaces other than the generic address space.
  
  Address space identifiers may be used exactly like any other C type
--- 1379,1385 ----
  defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
  address spaces in GCC will evolve as the draft technical report
  changes.  Calling conventions for any target might also change.  At
! present, only the AVR, PRU, RL78, x86 and Xtensa targets support
  address spaces other than the generic address space.
  
  Address space identifiers may be used exactly like any other C type
*************** Attribute @code{progmem} is supported bu
*** 1558,1572 ****
  
  @end itemize
  
- @subsection M32C Named Address Spaces
- @cindex @code{__far} M32C Named Address Spaces
- 
- On the M32C target, with the R8C and M16C CPU variants, variables
- qualified with @code{__far} are accessed using 32-bit addresses in
- order to access memory beyond the first 64@tie{}Ki bytes.  If
- @code{__far} is used with the M32CM or M32C CPU variants, it has no
- effect.
- 
  @subsection PRU Named Address Spaces
  @cindex @code{__regio_symbol} PRU Named Address Spaces
  
--- 1558,1563 ----
*************** The preprocessor symbols @code{__SEG_FS}
*** 1618,1623 ****
--- 1609,1663 ----
  defined when these address spaces are supported.
  @end table
  
+ @anchor{Xtensa Named Address Spaces}
+ @subsection Xtensa Named Address Spaces
+ @cindex @code{__force_l32} Xtensa Named Address Spaces
+ 
+ On the Xtensa target, when a variable qualified with @code{__force_l32}
+ is loaded from memory, it is always read aligned to a 4-byte width
+ regardless of whether its width is 1 or 2 bytes, and a bit-extraction
+ instruction is applied to the read to obtain the desired result; writing
+ with a width of 1 or 2 bytes is not supported (see also @code{force_l32}
+ attribute described in @ref{Xtensa Attributes}, and command-line option
+ @option{-mforce-l32} described in @ref{Xtensa Options}).
+ 
+ @smallexample
+ char *strcpy_irom (char *dst, __force_l32 const char *src)
+ @{
+   char *p = dst;
+   /* "*src" is always read as an aligned 4-byte width, and then
+      the desired one byte is extracted using bitwise operations.  */
+   while (*p = *src)
+     ++p, ++src;
+   return dst;
+ @}
+ @end smallexample
+ 
+ Qualifying a variable with @code{__force_l32} affects how that variable
+ is read as mentioned above, but it does not affect the memory section in
+ which the variable is placed (this can be specified separately using the
+ @code{section} attribute).
+ 
+ @smallexample
+ /* Instruction ROM reading requires aligned 4-byte width access.  */
+ __force_l32 const char IROM_message[] __attribute__((section(".irom.text")))
+     = "placed within the instruction ROM area.";
+ @end smallexample
+ 
+ A pointer qualified with @code{__force_l32} can read memory regions in
+ the generic address space (though not very efficiently), but not vice
+ versa.  Therefore, the conversion from a pointer for the generic address
+ space to a pointer qualified with @code{__force_l32} is implicit, but not
+ the other way around.
+ 
+ @smallexample
+ extern char *strcpy_irom (char *, __force_l32 const char *);
+ char buf[80], alt_buf[80];
+ 
+ strcpy_irom (buf, IROM_message);
+ strcpy_irom (alt_buf, "placed within read-only RAM area.");
+ @end smallexample
+ 
  @anchor{Function Attributes}
  @anchor{Variable Attributes}
  @anchor{Type Attributes}
*************** The default for the attribute is control
*** 5709,5715 ****
  * H8/300 Attributes::
  * IA-64 Attributes::
  * LoongArch Attributes::
- * M32C Attributes::
  * M32R/D Attributes::
  * m68k Attributes::
  * MicroBlaze Attributes::
--- 5749,5754 ----
*************** The default for the attribute is control
*** 5729,5734 ****
--- 5768,5774 ----
  * Visium Attributes::
  * x86 Attributes::
  * Xstormy16 Attributes::
+ * Xtensa Attributes::
  @end menu
  
  @anchor{AArch64 Function Attributes}
*************** specially.  Currently the only supported
*** 7383,7460 ****
  @code{normal} and @code{extreme}.
  @end table
  
- @anchor{M32C Function Attributes}
- @node M32C Attributes
- @subsubsection M32C Attributes
- 
- These attributes are supported by the M32C back end:
- 
- @table @code
- @atindex @code{bank_switch}, M32C
- @item bank_switch
- This attribute applies to functions.
- 
- When added to an interrupt handler with the M32C port, causes the
- prologue and epilogue to use bank switching to preserve the registers
- rather than saving them on the stack.
- 
- @atindex @code{fast_interrupt}, M32C
- @item fast_interrupt
- This attribute applies to functions.
- 
- Use this attribute on the M32C port to indicate that the specified
- function is a fast interrupt handler.  This is just like the
- @code{interrupt} attribute, except that @code{freit} is used to return
- instead of @code{reit}.
- 
- @atindex @code{function_vector}, M16C/M32C
- @item function_vector
- This attribute applies to functions.
- 
- On M16C/M32C targets, the @code{function_vector} attribute declares a
- special page subroutine call function. Use of this attribute reduces
- the code size by 2 bytes for each call generated to the
- subroutine. The argument to the attribute is the vector number entry
- from the special page vector table which contains the 16 low-order
- bits of the subroutine's entry address. Each vector table has special
- page number (18 to 255) that is used in @code{jsrs} instructions.
- Jump addresses of the routines are generated by adding 0x0F0000 (in
- case of M16C targets) or 0xFF0000 (in case of M32C targets), to the
- 2-byte addresses set in the vector table. Therefore you need to ensure
- that all the special page vector routines should get mapped within the
- address range 0x0F0000 to 0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF
- (for M32C).
- 
- In the following example 2 bytes are saved for each call to
- function @code{foo}.
- 
- @smallexample
- void foo (void) __attribute__((function_vector(0x18)));
- void foo (void)
- @{
- @}
- 
- void bar (void)
- @{
-     foo();
- @}
- @end smallexample
- 
- If functions are defined in one file and are called in another file,
- then be sure to write this declaration in both files.
- 
- This attribute is ignored for R8C target.
- 
- @atindex @code{interrupt}, M32C
- @item interrupt
- This attribute applies to functions.
- 
- It indicates
- that the specified function is an interrupt handler.  The compiler generates
- function entry and exit sequences suitable for use in an interrupt handler
- when this attribute is present.
- @end table
- 
  @anchor{M32R/D Function Attributes}
  @anchor{M32R/D Variable Attributes}
  @node M32R/D Attributes
--- 7423,7428 ----
*************** placed in either the @code{.bss_below100
*** 9810,9815 ****
--- 9778,9804 ----
  @code{.data_below100} section.
  @end table
  
+ @node Xtensa Attributes
+ @subsubsection Xtensa Attributes
+ 
+ These attributes are supported by the Xtensa back end:
+ 
+ @table @code
+ @atindex @code{force_l32}, Xtensa
+ @item force_l32
+ This attribute can be applied to variables, function parameters and
+ types.
+ 
+ When this attribute is specified in a declaration, any memory loads of 1-
+ or 2-byte width objects for the type (in the declaration) itself and all
+ the underlying types contained within it are performed by a combination
+ of aligned 4-byte load and bit-extraction instructions, rather than by
+ instructions dedicated to those objects; storing memory with a width of 1
+ or 2 bytes is not supported (see also @code{__force_l32} address spaces
+ described in @ref{Xtensa Named Address Spaces}, and command-line option
+ @option{-mforce-l32} described in @ref{Xtensa Options}).
+ 
+ @end table
  
  @node Attribute Syntax
  @subsection GNU Attribute Syntax
*************** option is specified.  @xref{OpenMP}, and
*** 10094,10100 ****
  * AArch64 Pragmas::
  * ARM Pragmas::
  * LoongArch Pragmas::
- * M32C Pragmas::
  * PRU Pragmas::
  * RS/6000 and PowerPC Pragmas::
  * S/390 Pragmas::
--- 10083,10088 ----
*************** Example:
*** 10158,10193 ****
  #pragma GCC target("strict-align")
  @end smallexample
  
- @node M32C Pragmas
- @subsection M32C Pragmas
- 
- @table @code
- @cindex pragma, memregs
- @item GCC memregs @var{number}
- Overrides the command-line option @code{-memregs=} for the current
- file.  Use with care!  This pragma must be before any function in the
- file, and mixing different memregs values in different objects may
- make them incompatible.  This pragma is useful when a
- performance-critical function uses a memreg for temporary values,
- as it may allow you to reduce the number of memregs used.
- 
- @cindex pragma, address
- @item ADDRESS @var{name} @var{address}
- For any declared symbols matching @var{name}, this does three things
- to that symbol: it forces the symbol to be located at the given
- address (a number), it forces the symbol to be volatile, and it
- changes the symbol's scope to be static.  This pragma exists for
- compatibility with other compilers, but note that the common
- @code{1234H} numeric syntax is not supported (use @code{0x1234}
- instead).  Example:
- 
- @smallexample
- #pragma ADDRESS port3 0x103
- char port3;
- @end smallexample
- 
- @end table
- 
  @node PRU Pragmas
  @subsection PRU Pragmas
  
--- 10146,10151 ----
*************** The PVIPR documents the following overlo
*** 24696,24701 ****
--- 24654,24660 ----
  * PowerPC AltiVec Built-in Functions Available on ISA 2.07::
  * PowerPC AltiVec Built-in Functions Available on ISA 3.0::
  * PowerPC AltiVec Built-in Functions Available on ISA 3.1::
+ * PowerPC AltiVec/VSX Built-in Functions Available on Future ISA::
  @end menu
  
  @node PowerPC AltiVec Built-in Functions on ISA 2.05
*************** vector unsigned char);
*** 26729,26734 ****
--- 26688,26743 ----
  vector unsigned char);
  @end smallexample
  
+ @node PowerPC AltiVec/VSX Built-in Functions Available on Future ISA
+ @subsubsection PowerPC AltiVec/VSX Built-in Functions Available on Future ISA
+ 
+ The following additional built-in functions are available for the
+ PowerPC family of processors, starting with Future ISA.
+ 
+ Future ISA of the PowerPC may add new instructions for accelerating AES
+ algorithm. GCC provides support for these new instructions through the
+ following built-in functions. The third argument to
+ @var{__builtin_aes_encrypt_paired} and @var{__builtin_aes_decrypt_paired} must
+ be a constant integer that is 0, 1 or 2. The values correspond to 128, 192 and
+ 256 bit AES encryption/decryption respectively. The third argument to
+ @var{__builtin_galois_field_mult} must be a constant integer that is 0 or 1.
+ The values correspond to gcm and xts variant respectively.
+ 
+ @smallexample
+ __vector_pair  __builtin_aes_encrypt_paired (__vector_pair, __vector_pair,
+                                              int);
+ 
+ __vector_pair  __builtin_aes128_encrypt_paired (__vector_pair, __vector_pair);
+ 
+ __vector_pair  __builtin_aes192_encrypt_paired (__vector_pair, __vector_pair);
+ 
+ __vector_pair  __builtin_aes256_encrypt_paired (__vector_pair, __vector_pair);
+ 
+ __vector_pair  __builtin_aes_decrypt_paired (__vector_pair, __vector_pair,
+                                              int);
+ 
+ __vector_pair  __builtin_aes128_decrypt_paired (__vector_pair, __vector_pair);
+ 
+ __vector_pair  __builtin_aes192_decrypt_paired (__vector_pair, __vector_pair);
+ 
+ __vector_pair  __builtin_aes256_decrypt_paired (__vector_pair, __vector_pair);
+ 
+ __vector_pair  __builtin_aes_genlastkey_paired (__vector_pair, int);
+ 
+ __vector_pair  __builtin_aes128_genlastkey_paired (__vector_pair);
+ 
+ __vector_pair  __builtin_aes192_genlastkey_paired (__vector_pair);
+ 
+ __vector_pair  __builtin_aes256_genlastkey_paired (__vector_pair);
+ 
+ vec_t __builtin_galois_field_mult (vec_t, vec_t, int);
+ 
+ vec_t __builtin_galois_field_mult_gcm (vec_t, vec_t);
+ 
+ vec_t __builtin_galois_field_mult_xts (vec_t, vec_t);
+ @end smallexample
+ 
+ 
  @node PowerPC Hardware Transactional Memory Built-in Functions
  @subsection PowerPC Hardware Transactional Memory Built-in Functions
  GCC provides two interfaces for accessing the Hardware Transactional
diff -Nrcpad gcc-17-20260503/gcc/doc/gm2.texi gcc-17-20260510/gcc/doc/gm2.texi
*** gcc-17-20260503/gcc/doc/gm2.texi	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/gm2.texi	Sun May 10 22:32:06 2026
*************** intersect.
*** 2303,2312 ****
  @section Building a shared library
  
  This section describes building a tiny shared library implemented in
! Modula-2 and built with @file{libtool}.  Suppose a project consists of
! three definition modules and three implementation modules
! @file{a.def}, @file{a.mod}, @file{b.def}, @file{b.mod} and
! @file{c.mod}.  The first step is to compile the modules using position
  independent code.  This can be achieved by the following three
  commands:
  
--- 2303,2376 ----
  @section Building a shared library
  
  This section describes building a tiny shared library implemented in
! Modula-2 and built with @file{libtool}.  Consider a project consisting
! of three definition modules and three implementation modules
! @file{a.def}, @file{a.mod}, @file{b.def}, @file{b.mod}, @file{c.def}
! and @file{c.mod}.
! 
! @example
! DEFINITION MODULE a ;
! 
! END a.
! @end example
! 
! @example
! IMPLEMENTATION MODULE a ;
! 
! FROM libc IMPORT printf ;
! 
! BEGIN
!    printf ("init: module a\n")
! FINALLY
!    printf ("finish: module a\n")
! END a.
! @end example
! 
! Module @code{b} is almost identical, but it imports module @code{a}.
! 
! @example
! DEFINITION MODULE b ;
! 
! END b.
! @end example
! 
! @example
! IMPLEMENTATION MODULE b ;
! 
! IMPORT a ;
! FROM libc IMPORT printf ;
! 
! 
! BEGIN
!    printf ("init: module b\n")
! FINALLY
!    printf ("finish: module b\n")
! END b.
! @end example
! 
! Likewise Module @code{c} is almost identical, but it imports from
! module @code{b}.
! 
! @example
! DEFINITION MODULE c ;
! 
! END c.
! @end example
! 
! @example
! IMPLEMENTATION MODULE c ;
! 
! IMPORT b ;
! FROM libc IMPORT printf ;
! 
! BEGIN
!    printf ("init: module c\n")
! FINALLY
!    printf ("finish: module c\n")
! END c.
! @end example
! 
! The first step is to compile the modules using position
  independent code.  This can be achieved by the following three
  commands:
  
diff -Nrcpad gcc-17-20260503/gcc/doc/install.texi gcc-17-20260510/gcc/doc/install.texi
*** gcc-17-20260503/gcc/doc/install.texi	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/install.texi	Sun May 10 22:32:06 2026
*************** Here are the possible CPU types:
*** 872,878 ****
  @quotation
  aarch64, aarch64_be, alpha, alpha64, amdgcn, arc, arceb, arm, armeb, avr, bfin,
  bpf, cris, csky, epiphany, fido, fr30, frv, ft32, h8300, hppa, hppa2.0,
! hppa64, i486, i686, ia64, iq2000, lm32, loongarch64, m32c, m32r, m32rle, m68k,
  mcore, microblaze, microblazeel, mips, mips64, mips64el, mips64octeon,
  mips64orion, mips64vr, mipsel, mipsisa32, mipsisa32r2, mipsisa64, mipsisa64r2,
  mipsisa64r2el, mipsisa64sb1, mipsisa64sr71k, mipstx39, mmix, mn10300, moxie,
--- 872,878 ----
  @quotation
  aarch64, aarch64_be, alpha, alpha64, amdgcn, arc, arceb, arm, armeb, avr, bfin,
  bpf, cris, csky, epiphany, fido, fr30, frv, ft32, h8300, hppa, hppa2.0,
! hppa64, i486, i686, ia64, iq2000, lm32, loongarch64, m32r, m32rle, m68k,
  mcore, microblaze, microblazeel, mips, mips64, mips64el, mips64octeon,
  mips64orion, mips64vr, mipsel, mipsisa32, mipsisa32r2, mipsisa64, mipsisa64r2,
  mipsisa64r2el, mipsisa64sb1, mipsisa64sr71k, mipstx39, mmix, mn10300, moxie,
*************** information have to.
*** 3999,4006 ****
  @item
  @uref{#lm32-x-uclinux,,lm32-*-uclinux}
  @item
- @uref{#m32c-x-elf,,m32c-*-elf}
- @item
  @uref{#m32r-x-elf,,m32r-*-elf}
  @item
  @uref{#m68k-x-x,,m68k-*-*}
--- 3999,4004 ----
*************** More information about LoongArch can be
*** 4617,4630 ****
  
  @html
  <hr />
- @end html
- @anchor{m32c-x-elf}
- @heading m32c-*-elf
- Renesas M32C processor.
- This configuration is intended for embedded systems.
- 
- @html
- <hr />
  @end html
  @anchor{m32r-x-elf}
  @heading m32r-*-elf
--- 4615,4620 ----
diff -Nrcpad gcc-17-20260503/gcc/doc/invoke.texi gcc-17-20260510/gcc/doc/invoke.texi
*** gcc-17-20260503/gcc/doc/invoke.texi	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/invoke.texi	Sun May 10 22:32:06 2026
*************** Objective-C and Objective-C++ Dialects}.
*** 1177,1185 ****
  @emph{LynxOS Options} (@ref{LynxOS Options})
  @gccoptlist{-mshared  -mthreads  -mlegacy-threads}
  
- @emph{M32C Options} (@ref{M32C Options})
- @gccoptlist{-mcpu=@var{cpu}  -msim  -memregs=@var{number}}
- 
  @emph{M32R/D Options} (@ref{M32R/D Options})
  @gccoptlist{-m32r2  -m32rx  -m32r
  -mdebug
--- 1177,1182 ----
*************** See Cygwin and MinGW Options.
*** 1593,1599 ****
  @gccoptlist{-mconst16  -mforce-no-pic  -mno-serialize-volatile
  -mtext-section-literals  -mauto-litpools  -mno-target-align
  -mlongcalls  -mabi=@var{abi-type}
! -mextra-l32r-costs=@var{cycles}  -mstrict-align}
  
  @emph{zSeries Options}
  See S/390 and zSeries Options.
--- 1590,1596 ----
  @gccoptlist{-mconst16  -mforce-no-pic  -mno-serialize-volatile
  -mtext-section-literals  -mauto-litpools  -mno-target-align
  -mlongcalls  -mabi=@var{abi-type}
! -mextra-l32r-costs=@var{cycles}  -mstrict-align  -mforce-l32}
  
  @emph{zSeries Options}
  See S/390 and zSeries Options.
*************** void foo (void)
*** 8322,8331 ****
    int f = 0; // No warning, f used
    int g = f = 5;
    (void) g;
!   int h = 0; // No warning, preincrement used
    int i = ++h;
    (void) i;
!   int j = 0; // No warning, postdecrement used
    int k = j--;
    (void) k;
    int l = 0; // No warning, l used
--- 8319,8328 ----
    int f = 0; // No warning, f used
    int g = f = 5;
    (void) g;
!   int h = 0; // No warning, preincrement result used
    int i = ++h;
    (void) i;
!   int j = 0; // No warning, postdecrement result used
    int k = j--;
    (void) k;
    int l = 0; // No warning, l used
*************** other compilers on the same platform.
*** 21248,21254 ****
  * LM32 Options::
  * LoongArch Options::
  * LynxOS Options::
- * M32C Options::
  * M32R/D Options::
  * M680x0 Options::
  * MCore Options::
--- 21245,21250 ----
*************** Support legacy multi-threading.
*** 28025,28063 ****
  This option is incompatible with @option{-mthreads}.
  @end table
  
- @node M32C Options
- @subsection M32C Options
- @cindex M32C options
- 
- @table @gcctabopt
- @opindex mcpu=
- @item -mcpu=@var{name}
- Select the CPU for which code is generated.  @var{name} may be one of
- @samp{r8c} for the R8C/Tiny series, @samp{m16c} for the M16C (up to
- /60) series, @samp{m32cm} for the M16C/80 series, or @samp{m32c} for
- the M32C/80 series.
- 
- @opindex msim
- @opindex mno-sim
- @item -msim
- Specifies that the program will be run on the simulator.  This causes
- an alternate runtime library to be linked in which supports, for
- example, file I/O@.  You must not use this option when generating
- programs that will run on real hardware; you must provide your own
- runtime library for whatever I/O functions are needed.
- 
- @opindex memregs=
- @item -memregs=@var{number}
- Specifies the number of memory-based pseudo-registers GCC uses
- during code generation.  These pseudo-registers are used like real
- registers, so there is a tradeoff between GCC's ability to fit the
- code into available registers, and the performance penalty of using
- memory instead of registers.  Note that all modules in a program must
- be compiled with the same value for this option.  Because of that, you
- must not use this option with GCC's default runtime libraries.
- 
- @end table
- 
  @node M32R/D Options
  @subsection M32R/D Options
  @cindex M32R/D options
--- 28021,28026 ----
*************** Supported values for @var{cpu_type} are
*** 31647,31654 ****
  @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
  @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
  @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
! @samp{power9}, @samp{power10}, @samp{power11}, @samp{powerpc}, @samp{powerpc64},
! @samp{powerpc64le}, @samp{rs64}, and @samp{native}.
  
  @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
  @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
--- 31610,31617 ----
  @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
  @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
  @samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8},
! @samp{power9}, @samp{power10}, @samp{power11}, @samp{future}, @samp{powerpc},
! @samp{powerpc64}, @samp{powerpc64le}, @samp{rs64}, and @samp{native}.
  
  @option{-mcpu=powerpc}, @option{-mcpu=powerpc64}, and
  @option{-mcpu=powerpc64le} specify pure 32-bit PowerPC (either
*************** The default is @option{-mno-strict-align
*** 37518,37523 ****
--- 37481,37499 ----
  unaligned loads and stores in hardware and @option{-mstrict-align} for all
  other cores.
  
+ @opindex mforce-l32
+ @opindex mno-force-l32
+ @item -mforce-l32
+ @itemx -mno-force-l32
+ When this option is enabled, GCC performs 1- or 2-byte loads in the generic
+ address space (ie., default memory references) by bit-extracting the desired
+ portion from the result of an aligned 4-byte load, instead of the instructions
+ originally provided for those purposes.  This option does not affect memory
+ stores of such byte width, or the placement of those memory sections (see
+ also @code{__force_l32} address spaces described in
+ @ref{Xtensa Named Address Spaces}, and @code{force_l32} attribute described
+ in @ref{Xtensa Attributes}).  The default is @option{-mno-force-l32}.
+ 
  @end table
  
  @node zSeries Options
diff -Nrcpad gcc-17-20260503/gcc/doc/md.texi gcc-17-20260510/gcc/doc/md.texi
*** gcc-17-20260503/gcc/doc/md.texi	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/md.texi	Sun May 10 22:32:06 2026
*************** now roughly the same as @samp{m} when no
*** 2782,2916 ****
  or @samp{>}.
  @end table
  
- @item M32C---@file{config/m32c/m32c.cc}
- @table @code
- @item Rsp
- @itemx Rfb
- @itemx Rsb
- @samp{$sp}, @samp{$fb}, @samp{$sb}.
- 
- @item Rcr
- Any control register, when they're 16 bits wide (nothing if control
- registers are 24 bits wide)
- 
- @item Rcl
- Any control register, when they're 24 bits wide.
- 
- @item R0w
- @itemx R1w
- @itemx R2w
- @itemx R3w
- $r0, $r1, $r2, $r3.
- 
- @item R02
- $r0 or $r2, or $r2r0 for 32 bit values.
- 
- @item R13
- $r1 or $r3, or $r3r1 for 32 bit values.
- 
- @item Rdi
- A register that can hold a 64 bit value.
- 
- @item Rhl
- $r0 or $r1 (registers with addressable high/low bytes)
- 
- @item R23
- $r2 or $r3
- 
- @item Raa
- Address registers
- 
- @item Raw
- Address registers when they're 16 bits wide.
- 
- @item Ral
- Address registers when they're 24 bits wide.
- 
- @item Rqi
- Registers that can hold QI values.
- 
- @item Rad
- Registers that can be used with displacements ($a0, $a1, $sb).
- 
- @item Rsi
- Registers that can hold 32 bit values.
- 
- @item Rhi
- Registers that can hold 16 bit values.
- 
- @item Rhc
- Registers chat can hold 16 bit values, including all control
- registers.
- 
- @item Rra
- $r0 through R1, plus $a0 and $a1.
- 
- @item Rfl
- The flags register.
- 
- @item Rmm
- The memory-based pseudo-registers $mem0 through $mem15.
- 
- @item Rpi
- Registers that can hold pointers (16 bit registers for r8c, m16c; 24
- bit registers for m32cm, m32c).
- 
- @item Rpa
- Matches multiple registers in a PARALLEL to form a larger register.
- Used to match function return values.
- 
- @item Is3
- @minus{}8 @dots{} 7
- 
- @item IS1
- @minus{}128 @dots{} 127
- 
- @item IS2
- @minus{}32768 @dots{} 32767
- 
- @item IU2
- 0 @dots{} 65535
- 
- @item In4
- @minus{}8 @dots{} @minus{}1 or 1 @dots{} 8
- 
- @item In5
- @minus{}16 @dots{} @minus{}1 or 1 @dots{} 16
- 
- @item In6
- @minus{}32 @dots{} @minus{}1 or 1 @dots{} 32
- 
- @item IM2
- @minus{}65536 @dots{} @minus{}1
- 
- @item Ilb
- An 8 bit value with exactly one bit set.
- 
- @item Ilw
- A 16 bit value with exactly one bit set.
- 
- @item Sd
- The common src/dest memory addressing modes.
- 
- @item Sa
- Memory addressed using $a0 or $a1.
- 
- @item Si
- Memory addressed with immediate addresses.
- 
- @item Ss
- Memory addressed using the stack pointer ($sp).
- 
- @item Sf
- Memory addressed using the frame base register ($fb).
- 
- @item Ss
- Memory addressed using the small base register ($sb).
- 
- @item S1
- $r1h
- @end table
- 
  @item LoongArch---@file{config/loongarch/constraints.md}
  @table @code
  @item f
--- 2782,2787 ----
diff -Nrcpad gcc-17-20260503/gcc/doc/tm.texi gcc-17-20260510/gcc/doc/tm.texi
*** gcc-17-20260503/gcc/doc/tm.texi	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/tm.texi	Sun May 10 22:32:06 2026
*************** The default version of this hook creates
*** 5426,5431 ****
--- 5426,5438 ----
  @samp{__stack_chk_guard}, which is normally defined in @file{libgcc2.c}.
  @end deftypefn
  
+ @deftypefn {Target Hook} bool TARGET_STACK_PROTECT_GUARD_SYMBOL_P (void)
+ Usually, the compiler uses an external variable @samp{__stack_chk_guard}
+ defined in @file{libgcc2.c} as the stack protection guard symbol.  Define
+ this hook to return true if a user provided definition of
+ @samp{__stack_chk_guard} with the @code{uintptr_t} type is used.
+ @end deftypefn
+ 
  @deftypefn {Target Hook} tree TARGET_STACK_PROTECT_FAIL (void)
  This hook returns a @code{CALL_EXPR} that alerts the runtime that the
  stack protect guard variable has been modified.  This expression should
diff -Nrcpad gcc-17-20260503/gcc/doc/tm.texi.in gcc-17-20260510/gcc/doc/tm.texi.in
*** gcc-17-20260503/gcc/doc/tm.texi.in	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/doc/tm.texi.in	Sun May 10 22:32:06 2026
*************** generic code.
*** 3825,3830 ****
--- 3825,3832 ----
  
  @hook TARGET_STACK_PROTECT_GUARD
  
+ @hook TARGET_STACK_PROTECT_GUARD_SYMBOL_P
+ 
  @hook TARGET_STACK_PROTECT_FAIL
  
  @hook TARGET_STACK_PROTECT_RUNTIME_ENABLED_P
diff -Nrcpad gcc-17-20260503/gcc/explow.cc gcc-17-20260510/gcc/explow.cc
*** gcc-17-20260503/gcc/explow.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/explow.cc	Sun May 10 22:32:06 2026
*************** promote_mode (const_tree type ATTRIBUTE_
*** 898,904 ****
  
    /* FIXME: this is the same logic that was there until GCC 4.4, but we
       probably want to test POINTERS_EXTEND_UNSIGNED even if PROMOTE_MODE
!      is not defined.  The affected targets are M32C, S390, SPARC.  */
  #ifdef PROMOTE_MODE
    code = TREE_CODE (type);
    unsignedp = *punsignedp;
--- 898,904 ----
  
    /* FIXME: this is the same logic that was there until GCC 4.4, but we
       probably want to test POINTERS_EXTEND_UNSIGNED even if PROMOTE_MODE
!      is not defined.  The affected targets are S390, SPARC.  */
  #ifdef PROMOTE_MODE
    code = TREE_CODE (type);
    unsignedp = *punsignedp;
diff -Nrcpad gcc-17-20260503/gcc/expmed.cc gcc-17-20260510/gcc/expmed.cc
*** gcc-17-20260503/gcc/expmed.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/expmed.cc	Sun May 10 22:32:06 2026
*************** synth_mult (struct algorithm *alg_out, u
*** 2962,2967 ****
--- 2962,2991 ----
  		}
  	    }
  	}
+       else if (2 * BITS_PER_WORD <= HOST_BITS_PER_WIDE_INT
+ 	       && GET_MODE_BITSIZE (imode) == 2 * BITS_PER_WORD
+ 	       && m >= BITS_PER_WORD
+ 	       && imode == mode)
+ 	{
+ 	  q = t >> m;
+ 	  int op1_cost = shift_cost (speed, mode, m - BITS_PER_WORD);
+ 	  int op2_cost = zero_cost (speed);
+ 	  op_latency = MAX (op1_cost, op2_cost);
+ 	  op_cost = op1_cost + op2_cost;
+ 
+ 	  new_limit.cost = best_cost.cost - op_cost;
+ 	  new_limit.latency = best_cost.latency - op_latency;
+ 	  synth_mult (alg_in, q, &new_limit, mode);
+ 	  alg_in->cost.cost += op_cost;
+ 	  alg_in->cost.latency += op_latency;
+ 	  if (CHEAPER_MULT_COST (&alg_in->cost, &best_cost))
+ 	    {
+ 	      best_cost = alg_in->cost;
+ 	      std::swap (alg_in, best_alg);
+ 	      best_alg->log[best_alg->ops] = m;
+ 	      best_alg->op[best_alg->ops] = alg_shift;
+ 	    }
+ 	}
        if (cache_hit)
  	goto done;
      }
diff -Nrcpad gcc-17-20260503/gcc/final.cc gcc-17-20260510/gcc/final.cc
*** gcc-17-20260503/gcc/final.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/final.cc	Sun May 10 22:32:06 2026
*************** rest_of_clean_state (void)
*** 4498,4503 ****
--- 4498,4504 ----
  
    flag_rerun_cse_after_global_opts = 0;
    reload_completed = 0;
+   post_ra_split_completed = false;
    epilogue_completed = 0;
  #ifdef STACK_REGS
    regstack_completed = 0;
diff -Nrcpad gcc-17-20260503/gcc/fortran/ChangeLog gcc-17-20260510/gcc/fortran/ChangeLog
*** gcc-17-20260503/gcc/fortran/ChangeLog	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/ChangeLog	Sun May 10 22:32:06 2026
***************
*** 1,3 ****
--- 1,39 ----
+ 2026-05-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/111952
+ 	PR fortran/125059
+ 	* trans-decl.cc (gfc_finish_var_decl): Remove bogus code forcing
+ 	a DT variable with DTIO as static.
+ 	* trans-io.cc (gfc_build_io_library_fndecls): Fix fnspec attribute.
+ 
+ 2026-05-07  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/125192
+ 	PR fortran/125198
+ 	* trans-array.cc (gfc_conv_expr_descriptor): Add bounds checking
+ 	code to the outermost loop's preliminary block.
+ 
+ 2026-05-07  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	* trans-array.cc (trans_array_bound_check): Replace references
+ 	to SE->PRE with references to the new argument BLOCK.  Remove
+ 	argument SE.
+ 	(array_bound_check_elemental): Likewise.  Update caller.
+ 	(conv_array_index_offset): Update caller.
+ 	(gfc_conv_expr_descriptor): Update caller.
+ 
+ 2026-05-07  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/125172
+ 	* resolve.cc (gfc_fixup_inferred_type_refs): Update kind for
+ 	INQUIRY_RE and INQUIRY_IM references on inferred complex
+ 	associate-name.
+ 	(resolve_variable): For an inferred-type associate-name with
+ 	no subobject ref, refresh e->ts from sym->ts.
+ 	(resolve_assoc_var): For an inferred-type complex/character
+ 	associate-name, refresh sym->ts from the resolved target when
+ 	only the kind differs.
+ 
  2026-05-02  Tobias Burnus  <tburnus@baylibre.com>
  	    Julian Brown  <julian@codesourcery.com>
  
diff -Nrcpad gcc-17-20260503/gcc/fortran/resolve.cc gcc-17-20260510/gcc/fortran/resolve.cc
*** gcc-17-20260503/gcc/fortran/resolve.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/resolve.cc	Sun May 10 22:32:06 2026
*************** resolve_variable (gfc_expr *e)
*** 6578,6583 ****
--- 6578,6590 ----
        if (e->expr_type == EXPR_CONSTANT)
  	return true;
      }
+   else if (IS_INFERRED_TYPE (e)
+ 	   && sym->ts.type != BT_UNKNOWN
+ 	   && (sym->ts.type != e->ts.type || sym->ts.kind != e->ts.kind))
+     /* No subobject ref, but the expression's typespec was set at parse
+        time before the target's actual type/kind was known.  Refresh from
+        the now-resolved associate-name symbol.  */
+     e->ts = sym->ts;
    else if (sym->attr.select_type_temporary
  	   && sym->ns->assoc_name_inferred)
      gfc_fixup_inferred_type_refs (e);
*************** gfc_fixup_inferred_type_refs (gfc_expr *
*** 6962,6967 ****
--- 6969,6983 ----
  					   sym->assoc->target->ts.kind);
  	  gfc_replace_expr (e, ne);
  	}
+       else if (ref && ref->type == REF_INQUIRY
+ 	       && (ref->u.i == INQUIRY_RE || ref->u.i == INQUIRY_IM)
+ 	       && sym->ts.type == BT_COMPLEX
+ 	       && e->ts.type == BT_REAL
+ 	       && e->ts.kind != sym->ts.kind)
+ 	/* primary.cc set the inquiry-result kind to the default real kind
+ 	   when the associate-name's type was inferred from %re/%im before
+ 	   the target was resolved.  Now use the (resolved) selector kind.  */
+ 	e->ts.kind = sym->ts.kind;
  
        /* Now that the references are all sorted out, set the expression rank
  	 and return.  */
*************** resolve_assoc_var (gfc_symbol* sym, bool
*** 10680,10685 ****
--- 10696,10711 ----
  	/* Confirmed to be either a derived type or misidentified to be a
  	   scalar class object, when the selector is a class array.  */
  	sym->ts = target->ts;
+       else if (sym->assoc->inferred_type
+ 	       && (sym->ts.type == BT_COMPLEX
+ 		   || sym->ts.type == BT_CHARACTER)
+ 	       && target->ts.type == sym->ts.type
+ 	       && sym->ts.kind != target->ts.kind)
+ 	/* The inferred type was set from a %re, %im or %len inquiry on
+ 	   the associate name with the default kind, before the target's
+ 	   actual type was known.  Now that the target has been resolved,
+ 	   update the kind to match.  */
+ 	sym->ts = target->ts;
      }
  
  
diff -Nrcpad gcc-17-20260503/gcc/fortran/trans-array.cc gcc-17-20260510/gcc/fortran/trans-array.cc
*** gcc-17-20260503/gcc/fortran/trans-array.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/trans-array.cc	Sun May 10 22:32:06 2026
*************** abridged_ref_name (gfc_expr * expr, gfc_
*** 3910,3916 ****
  /* Generate code to perform an array index bound check.  */
  
  static tree
! trans_array_bound_check (gfc_se * se, gfc_ss *ss, tree index, int n,
  			 locus * where, bool check_upper,
  			 const char *compname = NULL)
  {
--- 3910,3916 ----
  /* Generate code to perform an array index bound check.  */
  
  static tree
! trans_array_bound_check (stmtblock_t *block, gfc_ss *ss, tree index, int n,
  			 locus * where, bool check_upper,
  			 const char *compname = NULL)
  {
*************** trans_array_bound_check (gfc_se * se, gf
*** 3927,3933 ****
  
    descriptor = ss->info->data.array.descriptor;
  
!   index = gfc_evaluate_now (index, &se->pre);
  
    /* We find a name for the error message.  */
    name = ss->info->expr->symtree->n.sym->name;
--- 3927,3933 ----
  
    descriptor = ss->info->data.array.descriptor;
  
!   index = gfc_evaluate_now (index, block);
  
    /* We find a name for the error message.  */
    name = ss->info->expr->symtree->n.sym->name;
*************** trans_array_bound_check (gfc_se * se, gf
*** 3961,3973 ****
  
        fault = fold_build2_loc (input_location, LT_EXPR, logical_type_node,
  			       index, tmp_lo);
!       gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg,
  			       fold_convert (long_integer_type_node, index),
  			       fold_convert (long_integer_type_node, tmp_lo),
  			       fold_convert (long_integer_type_node, tmp_up));
        fault = fold_build2_loc (input_location, GT_EXPR, logical_type_node,
  			       index, tmp_up);
!       gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg,
  			       fold_convert (long_integer_type_node, index),
  			       fold_convert (long_integer_type_node, tmp_lo),
  			       fold_convert (long_integer_type_node, tmp_up));
--- 3961,3973 ----
  
        fault = fold_build2_loc (input_location, LT_EXPR, logical_type_node,
  			       index, tmp_lo);
!       gfc_trans_runtime_check (true, false, fault, block, where, msg,
  			       fold_convert (long_integer_type_node, index),
  			       fold_convert (long_integer_type_node, tmp_lo),
  			       fold_convert (long_integer_type_node, tmp_up));
        fault = fold_build2_loc (input_location, GT_EXPR, logical_type_node,
  			       index, tmp_up);
!       gfc_trans_runtime_check (true, false, fault, block, where, msg,
  			       fold_convert (long_integer_type_node, index),
  			       fold_convert (long_integer_type_node, tmp_lo),
  			       fold_convert (long_integer_type_node, tmp_up));
*************** trans_array_bound_check (gfc_se * se, gf
*** 3986,3992 ****
  
        fault = fold_build2_loc (input_location, LT_EXPR, logical_type_node,
  			       index, tmp_lo);
!       gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg,
  			       fold_convert (long_integer_type_node, index),
  			       fold_convert (long_integer_type_node, tmp_lo));
        free (msg);
--- 3986,3992 ----
  
        fault = fold_build2_loc (input_location, LT_EXPR, logical_type_node,
  			       index, tmp_lo);
!       gfc_trans_runtime_check (true, false, fault, block, where, msg,
  			       fold_convert (long_integer_type_node, index),
  			       fold_convert (long_integer_type_node, tmp_lo));
        free (msg);
*************** gfc_expr_contains_impure_fcn (gfc_expr *
*** 4023,4029 ****
  /* Generate code for bounds checking for elemental dimensions.  */
  
  static void
! array_bound_check_elemental (gfc_se * se, gfc_ss * ss, gfc_expr * expr)
  {
    gfc_array_ref *ar;
    gfc_ref *ref;
--- 4023,4029 ----
  /* Generate code for bounds checking for elemental dimensions.  */
  
  static void
! array_bound_check_elemental (stmtblock_t *block, gfc_ss * ss, gfc_expr * expr)
  {
    gfc_array_ref *ar;
    gfc_ref *ref;
*************** array_bound_check_elemental (gfc_se * se
*** 4052,4059 ****
  		      gfc_init_se (&indexse, NULL);
  		      gfc_conv_expr_type (&indexse, ar->start[dim],
  					  gfc_array_index_type);
! 		      gfc_add_block_to_block (&se->pre, &indexse.pre);
! 		      trans_array_bound_check (se, ss, indexse.expr, dim,
  					       &ar->where,
  					       ar->as->type != AS_ASSUMED_SIZE
  					       || dim < ar->dimen - 1,
--- 4052,4059 ----
  		      gfc_init_se (&indexse, NULL);
  		      gfc_conv_expr_type (&indexse, ar->start[dim],
  					  gfc_array_index_type);
! 		      gfc_add_block_to_block (block, &indexse.pre);
! 		      trans_array_bound_check (block, ss, indexse.expr, dim,
  					       &ar->where,
  					       ar->as->type != AS_ASSUMED_SIZE
  					       || dim < ar->dimen - 1,
*************** conv_array_index_offset (gfc_se * se, gf
*** 4098,4104 ****
  	  /* We've already translated this value outside the loop.  */
  	  index = info->subscript[dim]->info->data.scalar.value;
  
! 	  index = trans_array_bound_check (se, ss, index, dim, &ar->where,
  					   ar->as->type != AS_ASSUMED_SIZE
  					   || dim < ar->dimen - 1);
  	  break;
--- 4098,4104 ----
  	  /* We've already translated this value outside the loop.  */
  	  index = info->subscript[dim]->info->data.scalar.value;
  
! 	  index = trans_array_bound_check (&se->pre, ss, index, dim, &ar->where,
  					   ar->as->type != AS_ASSUMED_SIZE
  					   || dim < ar->dimen - 1);
  	  break;
*************** conv_array_index_offset (gfc_se * se, gf
*** 4127,4133 ****
  	  index = fold_convert (gfc_array_index_type, index);
  
  	  /* Do any bounds checking on the final info->descriptor index.  */
! 	  index = trans_array_bound_check (se, ss, index, dim, &ar->where,
  					   ar->as->type != AS_ASSUMED_SIZE
  					   || dim < ar->dimen - 1);
  	  break;
--- 4127,4133 ----
  	  index = fold_convert (gfc_array_index_type, index);
  
  	  /* Do any bounds checking on the final info->descriptor index.  */
! 	  index = trans_array_bound_check (&se->pre, ss, index, dim, &ar->where,
  					   ar->as->type != AS_ASSUMED_SIZE
  					   || dim < ar->dimen - 1);
  	  break;
*************** gfc_conv_expr_descriptor (gfc_se *se, gf
*** 8652,8658 ****
  
    /* Add bounds-checking for elemental dimensions.  */
    if ((gfc_option.rtcheck & GFC_RTCHECK_BOUNDS) && !expr->no_bounds_check)
!     array_bound_check_elemental (se, ss, expr);
  
    if (need_tmp)
      {
--- 8652,8658 ----
  
    /* Add bounds-checking for elemental dimensions.  */
    if ((gfc_option.rtcheck & GFC_RTCHECK_BOUNDS) && !expr->no_bounds_check)
!     array_bound_check_elemental (&outermost_loop (&loop)->pre, ss, expr);
  
    if (need_tmp)
      {
diff -Nrcpad gcc-17-20260503/gcc/fortran/trans-decl.cc gcc-17-20260510/gcc/fortran/trans-decl.cc
*** gcc-17-20260503/gcc/fortran/trans-decl.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/trans-decl.cc	Sun May 10 22:32:06 2026
*************** gfc_finish_var_decl (tree decl, gfc_symb
*** 756,771 ****
  		&& sym->attr.codimension && !sym->attr.allocatable)))
      TREE_STATIC (decl) = 1;
  
-   /* If derived-type variables with DTIO procedures are not made static
-      some bits of code referencing them get optimized away.
-      TODO Understand why this is so and fix it.  */
-   if (!sym->attr.use_assoc
-       && ((sym->ts.type == BT_DERIVED
-            && sym->ts.u.derived->attr.has_dtio_procs)
- 	  || (sym->ts.type == BT_CLASS
- 	      && CLASS_DATA (sym)->ts.u.derived->attr.has_dtio_procs)))
-     TREE_STATIC (decl) = 1;
- 
    /* Treat asynchronous variables the same as volatile, for now.  */
    if (sym->attr.volatile_ || sym->attr.asynchronous)
      {
--- 756,761 ----
*************** gfc_get_symbol_decl (gfc_symbol * sym)
*** 1717,1730 ****
        && (gfc_current_ns == sym->ns
  	  || (gfc_current_ns == sym->ns->parent
  	      && gfc_current_ns->proc_name->attr.flavor != FL_MODULE))
!       && !(sym->attr.use_assoc || sym->attr.dummy))
      gfc_defer_symbol_init (sym);
  
    if ((sym->ts.type == BT_DERIVED && sym->ts.u.derived->attr.pdt_comp)
        && (gfc_current_ns == sym->ns
  	  || (gfc_current_ns == sym->ns->parent
  	      && gfc_current_ns->proc_name->attr.flavor != FL_MODULE))
!       && !(sym->attr.use_assoc || sym->attr.dummy))
      gfc_defer_symbol_init (sym);
  
    /* Dummy PDT 'len' parameters should be checked when they are explicit.  */
--- 1707,1720 ----
        && (gfc_current_ns == sym->ns
  	  || (gfc_current_ns == sym->ns->parent
  	      && gfc_current_ns->proc_name->attr.flavor != FL_MODULE))
!       && !(sym->attr.use_assoc || sym->attr.dummy || sym->attr.result))
      gfc_defer_symbol_init (sym);
  
    if ((sym->ts.type == BT_DERIVED && sym->ts.u.derived->attr.pdt_comp)
        && (gfc_current_ns == sym->ns
  	  || (gfc_current_ns == sym->ns->parent
  	      && gfc_current_ns->proc_name->attr.flavor != FL_MODULE))
!       && !(sym->attr.use_assoc || sym->attr.dummy || sym->attr.result))
      gfc_defer_symbol_init (sym);
  
    /* Dummy PDT 'len' parameters should be checked when they are explicit.  */
*************** gfc_generate_function_code (gfc_namespac
*** 8300,8306 ****
  
    finish_oacc_declare (ns, sym, false);
  
!   tmp = gfc_trans_code (ns->code);
    gfc_add_expr_to_block (&body, tmp);
  
    /* This permits the return value to be correctly initialized, even when the
--- 8290,8305 ----
  
    finish_oacc_declare (ns, sym, false);
  
!   if (gfc_current_ns != ns)
!     {
!       gfc_namespace *old_current_ns = gfc_current_ns;
!       gfc_current_ns = ns;
!       tmp = gfc_trans_code (ns->code);
!       gfc_current_ns = old_current_ns;
!     }
!   else
!     tmp = gfc_trans_code (ns->code);
! 
    gfc_add_expr_to_block (&body, tmp);
  
    /* This permits the return value to be correctly initialized, even when the
diff -Nrcpad gcc-17-20260503/gcc/fortran/trans-intrinsic.cc gcc-17-20260510/gcc/fortran/trans-intrinsic.cc
*** gcc-17-20260503/gcc/fortran/trans-intrinsic.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/trans-intrinsic.cc	Sun May 10 22:32:06 2026
*************** gfc_conv_intrinsic_caf_get (gfc_se *se,
*** 1238,1243 ****
--- 1238,1244 ----
    array_expr = expr->value.function.actual->expr;
    ns = array_expr->expr_type == EXPR_VARIABLE
  	   && !array_expr->symtree->n.sym->attr.associate_var
+ 	   && !array_expr->symtree->n.sym->module
  	 ? array_expr->symtree->n.sym->ns
  	 : gfc_current_ns;
    type = gfc_typenode_for_spec (&array_expr->ts);
diff -Nrcpad gcc-17-20260503/gcc/fortran/trans-io.cc gcc-17-20260510/gcc/fortran/trans-io.cc
*** gcc-17-20260503/gcc/fortran/trans-io.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/trans-io.cc	Sun May 10 22:32:06 2026
*************** gfc_build_io_library_fndecls (void)
*** 416,422 ****
  	integer_type_node, gfc_charlen_type_node);
  
    iocall[IOCALL_X_DERIVED] = gfc_build_library_function_decl_with_spec (
! 	get_identifier (PREFIX("transfer_derived")), ". w r ",
  	void_type_node, 2, dt_parm_type, pvoid_type_node);
  
    /* Library entry points */
--- 416,422 ----
  	integer_type_node, gfc_charlen_type_node);
  
    iocall[IOCALL_X_DERIVED] = gfc_build_library_function_decl_with_spec (
! 	get_identifier (PREFIX("transfer_derived")), ". w w ",
  	void_type_node, 2, dt_parm_type, pvoid_type_node);
  
    /* Library entry points */
diff -Nrcpad gcc-17-20260503/gcc/fortran/trans-openmp.cc gcc-17-20260510/gcc/fortran/trans-openmp.cc
*** gcc-17-20260503/gcc/fortran/trans-openmp.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/fortran/trans-openmp.cc	Sun May 10 22:32:06 2026
*************** gfc_trans_omp_array_reduction_or_udr (tr
*** 2917,2922 ****
--- 2917,2927 ----
    const char *iname;
    bool t;
    gfc_omp_udr *udr = n->u2.udr ? n->u2.udr->udr : NULL;
+   gfc_namespace *old_ns = gfc_current_ns;
+ 
+   if (gfc_current_ns->proc_name
+       && gfc_current_ns->proc_name->ns != gfc_current_ns)
+     gfc_current_ns = gfc_current_ns->proc_name->ns;
  
    decl = OMP_CLAUSE_DECL (c);
    gfc_current_locus = where;
*************** gfc_trans_omp_array_reduction_or_udr (tr
*** 3199,3204 ****
--- 3204,3211 ----
  	  *udr->omp_orig = omp_var_copy[3];
  	}
      }
+ 
+   gfc_current_ns = old_ns;
  }
  
  static tree
diff -Nrcpad gcc-17-20260503/gcc/gcov.cc gcc-17-20260510/gcc/gcov.cc
*** gcc-17-20260503/gcc/gcov.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gcov.cc	Sun May 10 22:32:06 2026
*************** json_set_prime_path_coverage (json::obje
*** 1545,1551 ****
  	  if (i + 1 != path.size ())
  	    {
  	      const arc_info &arc = find_arc (block, path[i+1]);
! 	      if (arc.false_value)
  		edge_kind = "true";
  	      else if (arc.false_value)
  		edge_kind = "false";
--- 1545,1551 ----
  	  if (i + 1 != path.size ())
  	    {
  	      const arc_info &arc = find_arc (block, path[i+1]);
! 	      if (arc.true_value)
  		edge_kind = "true";
  	      else if (arc.false_value)
  		edge_kind = "false";
diff -Nrcpad gcc-17-20260503/gcc/gimple-fold.cc gcc-17-20260510/gcc/gimple-fold.cc
*** gcc-17-20260503/gcc/gimple-fold.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-fold.cc	Sun May 10 22:32:06 2026
*************** get_maxval_strlen (tree arg, strlen_rang
*** 2012,2017 ****
--- 2012,2022 ----
    /* A non-null NONSTR is meaningless when determining the maximum
       value of an integer ARG.  */
    gcc_assert (rkind != SRK_INT_VALUE || nonstr == NULL);
+ 
+   // If arg is already a constant, simply return it.
+   if (TREE_CODE (arg) == INTEGER_CST && rkind == SRK_INT_VALUE)
+     return arg;
+ 
    /* ARG must have an integral type when RKIND says so.  */
    gcc_assert (rkind != SRK_INT_VALUE || INTEGRAL_TYPE_P (TREE_TYPE (arg)));
  
*************** fold_stmt_1 (gimple_stmt_iterator *gsi,
*** 6880,6893 ****
        gimple_seq seq = NULL;
        gimple_match_op res_op;
        if (gimple_simplify (stmt, &res_op, inplace ? NULL : &seq,
! 			   valueize, valueize))
! 	{
! 	  if (replace_stmt_with_simplification (gsi, &res_op, &seq, inplace,
! 						dce_worklist))
! 	    changed = true;
! 	  else
! 	    gimple_seq_discard (seq);
! 	}
      }
  
    stmt = gsi_stmt (*gsi);
--- 6885,6896 ----
        gimple_seq seq = NULL;
        gimple_match_op res_op;
        if (gimple_simplify (stmt, &res_op, inplace ? NULL : &seq,
! 			   valueize, valueize)
! 	  && replace_stmt_with_simplification (gsi, &res_op, &seq, inplace,
! 					       dce_worklist))
! 	changed = true;
!       else
! 	gimple_seq_discard (seq);
      }
  
    stmt = gsi_stmt (*gsi);
diff -Nrcpad gcc-17-20260503/gcc/gimple-range-cache.cc gcc-17-20260510/gcc/gimple-range-cache.cc
*** gcc-17-20260503/gcc/gimple-range-cache.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-range-cache.cc	Sun May 10 22:32:06 2026
*************** ranger_cache::ranger_cache (int not_exec
*** 1019,1028 ****
--- 1019,1030 ----
  	gori_ssa ()->exports (bb);
      }
    m_update = new update_list ();
+   m_stale = BITMAP_ALLOC (NULL);
  }
  
  ranger_cache::~ranger_cache ()
  {
+   BITMAP_FREE (m_stale);
    delete m_update;
    destroy_infer_oracle ();
    destroy_relation_oracle ();
*************** ranger_cache::get_global_range (vrange &
*** 1064,1069 ****
--- 1066,1082 ----
    return false;
  }
  
+ // Mark NAME as stale.  The next query of NAME forces a recalculation.
+ 
+ void
+ ranger_cache::mark_stale (tree name)
+ {
+   // Only mark it as stale if it has been processed. If it has no range
+   // it will be calculated at the next request anyway.
+   if (m_globals.has_range (name))
+     bitmap_set_bit (m_stale, SSA_NAME_VERSION (name));
+ }
+ 
  // Get the global range for NAME, and return in R.  Return false if the
  // global range is not set, and R will contain the legacy global value.
  // CURRENT_P is set to true if the value was in cache and not stale.
*************** ranger_cache::get_global_range (vrange &
*** 1102,1107 ****
--- 1115,1127 ----
        m_globals.set_range (name, r);
      }
  
+   // If NAME is out of date, clear the bit and mark as not current.
+   if (bitmap_bit_p (m_stale, SSA_NAME_VERSION (name)))
+     {
+       bitmap_clear_bit (m_stale, SSA_NAME_VERSION (name));
+       current_p = false;
+     }
+ 
    // If the existing value was not current, mark it as always current.
    if (!current_p)
      m_temporal->set_always_current (name, true);
*************** bool
*** 1254,1272 ****
  ranger_cache::range_of_expr (vrange &r, tree name, gimple *stmt)
  {
    if (!gimple_range_ssa_p (name))
      {
!       get_tree_range (r, name, stmt);
!       return true;
!     }
! 
!   basic_block bb = gimple_bb (stmt);
!   gimple *def_stmt = SSA_NAME_DEF_STMT (name);
!   basic_block def_bb = gimple_bb (def_stmt);
  
!   if (bb == def_bb)
!     range_of_def (r, name, bb);
!   else
!     entry_range (r, name, bb, RFD_NONE);
    return true;
  }
  
--- 1274,1294 ----
  ranger_cache::range_of_expr (vrange &r, tree name, gimple *stmt)
  {
    if (!gimple_range_ssa_p (name))
+     get_tree_range (r, name, stmt);
+   /* If no context is provided, pick up the global value.  */
+   else if (!stmt)
+     get_global_range (r, name);
+   else
      {
!       basic_block bb = gimple_bb (stmt);
!       gimple *def_stmt = SSA_NAME_DEF_STMT (name);
!       basic_block def_bb = gimple_bb (def_stmt);
  
!       if (bb == def_bb)
! 	range_of_def (r, name, bb);
!       else
! 	entry_range (r, name, bb, RFD_NONE);
!     }
    return true;
  }
  
diff -Nrcpad gcc-17-20260503/gcc/gimple-range-cache.h gcc-17-20260510/gcc/gimple-range-cache.h
*** gcc-17-20260503/gcc/gimple-range-cache.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-range-cache.h	Sun May 10 22:32:06 2026
*************** public:
*** 111,116 ****
--- 111,117 ----
    bool get_global_range (vrange &r, tree name) const;
    bool get_global_range (vrange &r, tree name, bool &current_p);
    void set_global_range (tree name, const vrange &r, bool changed = true);
+   void mark_stale (tree name);
    void update_consumers (tree name);
    range_query &const_query () { return m_globals; }
  
*************** private:
*** 143,148 ****
--- 144,150 ----
  
    vec<basic_block> m_workback;
    class update_list *m_update;
+   bitmap m_stale;
  };
  
  #endif // GCC_SSA_RANGE_CACHE_H
diff -Nrcpad gcc-17-20260503/gcc/gimple-range-fold.cc gcc-17-20260510/gcc/gimple-range-fold.cc
*** gcc-17-20260503/gcc/gimple-range-fold.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-range-fold.cc	Sun May 10 22:32:06 2026
*************** fold_using_range::fold_stmt (vrange &r,
*** 668,683 ****
      name = gimple_get_lhs (s);
  
    // Process addresses and loads from static constructors.
!   if (gimple_code (s) == GIMPLE_ASSIGN)
!     {
!       if (gimple_assign_rhs_code (s) == ADDR_EXPR)
! 	return range_of_address (as_a <prange> (r), s, src);
!       if (range_from_readonly_var (r, s))
! 	return true;
!     }
  
    gimple_range_op_handler handler (s);
!   if (handler)
      res = range_of_range_op (r, handler, src);
    else if (is_a<gphi *>(s))
      res = range_of_phi (r, as_a<gphi *> (s), src);
--- 668,681 ----
      name = gimple_get_lhs (s);
  
    // Process addresses and loads from static constructors.
!   if (gimple_code (s) == GIMPLE_ASSIGN && range_from_readonly_var (r, s))
!     return true;
  
    gimple_range_op_handler handler (s);
!   if (gimple_code (s) == GIMPLE_ASSIGN
!       && gimple_assign_rhs_code (s) == ADDR_EXPR)
!     res = range_of_address (as_a <prange> (r), s, src);
!   else if (handler)
      res = range_of_range_op (r, handler, src);
    else if (is_a<gphi *>(s))
      res = range_of_phi (r, as_a<gphi *> (s), src);
diff -Nrcpad gcc-17-20260503/gcc/gimple-range-gori.cc gcc-17-20260510/gcc/gimple-range-gori.cc
*** gcc-17-20260503/gcc/gimple-range-gori.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-range-gori.cc	Sun May 10 22:32:06 2026
*************** gori_compute::compute_operand_range (vra
*** 772,778 ****
    gimple *src_stmt;
    if (op1_in_chain)
      {
!       vr.set_type (TREE_TYPE (op1));
        if (!compute_operand1_range (vr, handler, lhs, src, vrel_ptr))
  	return false;
        src_stmt = SSA_NAME_DEF_STMT (op1);
--- 772,778 ----
    gimple *src_stmt;
    if (op1_in_chain)
      {
!       vr.set_range_class (TREE_TYPE (op1));
        if (!compute_operand1_range (vr, handler, lhs, src, vrel_ptr))
  	return false;
        src_stmt = SSA_NAME_DEF_STMT (op1);
*************** gori_compute::compute_operand_range (vra
*** 780,786 ****
    else
      {
        gcc_checking_assert (op2_in_chain);
!       vr.set_type (TREE_TYPE (op2));
        if (!compute_operand2_range (vr, handler, lhs, src, vrel_ptr))
  	return false;
        src_stmt = SSA_NAME_DEF_STMT (op2);
--- 780,786 ----
    else
      {
        gcc_checking_assert (op2_in_chain);
!       vr.set_range_class (TREE_TYPE (op2));
        if (!compute_operand2_range (vr, handler, lhs, src, vrel_ptr))
  	return false;
        src_stmt = SSA_NAME_DEF_STMT (op2);
*************** gori_compute::compute_operand1_and_opera
*** 1318,1324 ****
      return false;
  
    // Now get the range thru op1.
!   vr.set_type (TREE_TYPE (handler.operand1 ()));
    if (!compute_operand1_range (vr, handler, lhs, src, rel))
      return false;
    src_stmt = SSA_NAME_DEF_STMT (handler.operand1 ());
--- 1318,1324 ----
      return false;
  
    // Now get the range thru op1.
!   vr.set_range_class (TREE_TYPE (handler.operand1 ()));
    if (!compute_operand1_range (vr, handler, lhs, src, rel))
      return false;
    src_stmt = SSA_NAME_DEF_STMT (handler.operand1 ());
*************** gori_stmt_info::gori_stmt_info (vrange &
*** 1592,1605 ****
    fur_stmt src (stmt, q);
    if (op1)
      {
!       op1_range.set_type (TREE_TYPE (op1));
        src.get_operand (op1_range, op1);
      }
  
    // And satisfy the second operand for single op satements.
    if (op2)
      {
!       op2_range.set_type (TREE_TYPE (op2));
        src.get_operand (op2_range, op2);
      }
    else if (op1)
--- 1592,1605 ----
    fur_stmt src (stmt, q);
    if (op1)
      {
!       op1_range.set_range_class (TREE_TYPE (op1));
        src.get_operand (op1_range, op1);
      }
  
    // And satisfy the second operand for single op satements.
    if (op2)
      {
!       op2_range.set_range_class (TREE_TYPE (op2));
        src.get_operand (op2_range, op2);
      }
    else if (op1)
*************** gori_calc_operands (vrange &lhs, gimple
*** 1625,1631 ****
    // If there was already a range, leave it and do no further evaluation.
    if (si.ssa1 && !r.has_range (si.ssa1))
      {
!       tmp.set_type (TREE_TYPE (si.ssa1));
        if (si.calc_op1 (tmp, lhs, si.op2_range))
  	si.op1_range.intersect (tmp);
        if (!si.op1_range.varying_p ())
--- 1625,1631 ----
    // If there was already a range, leave it and do no further evaluation.
    if (si.ssa1 && !r.has_range (si.ssa1))
      {
!       tmp.set_range_class (TREE_TYPE (si.ssa1));
        if (si.calc_op1 (tmp, lhs, si.op2_range))
  	si.op1_range.intersect (tmp);
        if (!si.op1_range.varying_p ())
*************** gori_calc_operands (vrange &lhs, gimple
*** 1640,1646 ****
  
    if (si.ssa2 && !r.has_range (si.ssa2))
      {
!       tmp.set_type (TREE_TYPE (si.ssa2));
        if (si.calc_op2 (tmp, lhs, si.op1_range))
  	si.op2_range.intersect (tmp);
        if (!si.op2_range.varying_p ())
--- 1640,1646 ----
  
    if (si.ssa2 && !r.has_range (si.ssa2))
      {
!       tmp.set_range_class (TREE_TYPE (si.ssa2));
        if (si.calc_op2 (tmp, lhs, si.op1_range))
  	si.op2_range.intersect (tmp);
        if (!si.op2_range.varying_p ())
*************** gori_name_helper (vrange &r, tree name,
*** 1697,1703 ****
    // If there was already a range, leave it and do no further evaluation.
    if (si.ssa1)
      {
!       tmp.set_type (TREE_TYPE (si.ssa1));
        if (si.calc_op1 (tmp, lhs, si.op2_range))
  	si.op1_range.intersect (tmp);
        gimple *src = SSA_NAME_DEF_STMT (si.ssa1);
--- 1697,1703 ----
    // If there was already a range, leave it and do no further evaluation.
    if (si.ssa1)
      {
!       tmp.set_range_class (TREE_TYPE (si.ssa1));
        if (si.calc_op1 (tmp, lhs, si.op2_range))
  	si.op1_range.intersect (tmp);
        gimple *src = SSA_NAME_DEF_STMT (si.ssa1);
*************** gori_name_helper (vrange &r, tree name,
*** 1709,1715 ****
  
    if (si.ssa2)
      {
!       tmp.set_type (TREE_TYPE (si.ssa2));
        if (si.calc_op2 (tmp, lhs, si.op1_range))
  	si.op2_range.intersect (tmp);
        gimple *src = SSA_NAME_DEF_STMT (si.ssa2);
--- 1709,1715 ----
  
    if (si.ssa2)
      {
!       tmp.set_range_class (TREE_TYPE (si.ssa2));
        if (si.calc_op2 (tmp, lhs, si.op1_range))
  	si.op2_range.intersect (tmp);
        gimple *src = SSA_NAME_DEF_STMT (si.ssa2);
diff -Nrcpad gcc-17-20260503/gcc/gimple-range.cc gcc-17-20260510/gcc/gimple-range.cc
*** gcc-17-20260503/gcc/gimple-range.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-range.cc	Sun May 10 22:32:06 2026
*************** gimple_ranger::register_transitive_infer
*** 556,561 ****
--- 556,569 ----
      }
  }
  
+ // Indicate NAME should have its range recalculated next time it is used.
+ 
+ void
+ gimple_ranger::update_range_info (tree name)
+ {
+   m_cache.mark_stale (name);
+ }
+ 
  // This is called to update ranger's concept of a global value for NAME
  // with range R by an outside entity.
  
*************** gimple_ranger::update_range_info (tree n
*** 565,571 ****
    value_range current (TREE_TYPE (name));
    m_cache.get_global_range (current, name);
    if (current.intersect (r))
!     m_cache.set_global_range (name, current, true);
  }
  
  // This routine will export whatever global ranges are known to GCC
--- 573,582 ----
    value_range current (TREE_TYPE (name));
    m_cache.get_global_range (current, name);
    if (current.intersect (r))
!     {
!       m_cache.set_global_range (name, current, true);
!       m_cache.mark_stale (name);
!     }
  }
  
  // This routine will export whatever global ranges are known to GCC
diff -Nrcpad gcc-17-20260503/gcc/gimple-range.h gcc-17-20260510/gcc/gimple-range.h
*** gcc-17-20260503/gcc/gimple-range.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple-range.h	Sun May 10 22:32:06 2026
*************** public:
*** 54,59 ****
--- 54,60 ----
    virtual bool range_on_edge (vrange &r, edge e, tree name) override;
    virtual bool range_on_entry (vrange &r, basic_block bb, tree name) override;
    virtual bool range_on_exit (vrange &r, basic_block bb, tree name) override;
+   virtual void update_range_info (tree) override;
    virtual void update_range_info (tree, const vrange &) override;
    void export_global_ranges ();
    virtual void dump (FILE *f) override;
diff -Nrcpad gcc-17-20260503/gcc/gimple.h gcc-17-20260510/gcc/gimple.h
*** gcc-17-20260503/gcc/gimple.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/gimple.h	Sun May 10 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 24,29 ****
--- 24,32 ----
  
  #include "tree-ssa-alias.h"
  #include "gimple-expr.h"
+ #include "bitmap.h"
+ #include "value-range.h"
+ #include "value-query.h"
  
  typedef gimple *gimple_seq_node;
  
*************** inline void
*** 2309,2315 ****
  gimple_set_modified (gimple *s, bool modifiedp)
  {
    if (gimple_has_ops (s))
!     s->modified = (unsigned) modifiedp;
  }
  
  
--- 2312,2327 ----
  gimple_set_modified (gimple *s, bool modifiedp)
  {
    if (gimple_has_ops (s))
!     {
!       s->modified = (unsigned) modifiedp;
!       // Mark the LHS as out of date with the current range query.
!       if (modifiedp)
! 	{
! 	  tree def = gimple_get_lhs (s);
! 	  if (def && TREE_CODE (def) == SSA_NAME)
! 	    get_range_query (cfun)->update_range_info (def);
! 	}
!     }
  }
  
  
diff -Nrcpad gcc-17-20260503/gcc/ipa-cp.cc gcc-17-20260510/gcc/ipa-cp.cc
*** gcc-17-20260503/gcc/ipa-cp.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/ipa-cp.cc	Sun May 10 22:32:06 2026
*************** ipcp_vr_lattice::set_to_bottom ()
*** 891,897 ****
       but nothing else (union, intersect, etc).  This allows us to set
       bottoms on any ranges, and is safe as all users of the lattice
       check for bottom first.  */
!   m_vr.set_type (void_type_node);
    m_vr.set_varying (void_type_node);
  
    return true;
--- 891,897 ----
       but nothing else (union, intersect, etc).  This allows us to set
       bottoms on any ranges, and is safe as all users of the lattice
       check for bottom first.  */
!   m_vr.set_range_class (void_type_node);
    m_vr.set_varying (void_type_node);
  
    return true;
diff -Nrcpad gcc-17-20260503/gcc/ipa-cp.h gcc-17-20260510/gcc/ipa-cp.h
*** gcc-17-20260503/gcc/ipa-cp.h	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/ipa-cp.h	Sun May 10 22:32:06 2026
*************** inline void
*** 261,267 ****
  ipcp_vr_lattice::init (tree type)
  {
    if (type)
!     m_vr.set_type (type);
  
    // Otherwise m_vr will default to unsupported_range.
    m_recipient_only = false;
--- 261,267 ----
  ipcp_vr_lattice::init (tree type)
  {
    if (type)
!     m_vr.set_range_class (type);
  
    // Otherwise m_vr will default to unsupported_range.
    m_recipient_only = false;
diff -Nrcpad gcc-17-20260503/gcc/ipa-fnsummary.cc gcc-17-20260510/gcc/ipa-fnsummary.cc
*** gcc-17-20260503/gcc/ipa-fnsummary.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/ipa-fnsummary.cc	Sun May 10 22:32:06 2026
*************** evaluate_properties_for_edge (struct cgr
*** 693,699 ****
  			    avals->m_known_value_ranges.safe_grow_cleared (count,
  									   true);
  			    for (int i = 0; i < count; ++i)
! 			      avals->m_known_value_ranges[i].set_type (void_type_node);
  			  }
  			avals->m_known_value_ranges[i] = vr;
  		      }
--- 693,700 ----
  			    avals->m_known_value_ranges.safe_grow_cleared (count,
  									   true);
  			    for (int i = 0; i < count; ++i)
! 			      avals->m_known_value_ranges[i].set_range_class
! 				(void_type_node);
  			  }
  			avals->m_known_value_ranges[i] = vr;
  		      }
diff -Nrcpad gcc-17-20260503/gcc/ipa-prop.cc gcc-17-20260510/gcc/ipa-prop.cc
*** gcc-17-20260503/gcc/ipa-prop.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/ipa-prop.cc	Sun May 10 22:32:06 2026
*************** ipa_vr::equal_p (const ipa_vr &o) const
*** 177,183 ****
  void
  ipa_vr::get_vrange (value_range &r) const
  {
!   r.set_type (m_type);
    m_storage->get_vrange (r, m_type);
  }
  
--- 177,183 ----
  void
  ipa_vr::get_vrange (value_range &r) const
  {
!   r.set_range_class (m_type);
    m_storage->get_vrange (r, m_type);
  }
  
diff -Nrcpad gcc-17-20260503/gcc/match.pd gcc-17-20260510/gcc/match.pd
*** gcc-17-20260503/gcc/match.pd	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/match.pd	Sun May 10 22:32:07 2026
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 230,235 ****
--- 230,243 ----
    (abs @0)))
  #endif
  
+ /* (X - (X < 0)) ^ -(X < 0) -> abs (X) */
+ (simplify
+  (bit_xor:c (minus @0 (convert@1 (lt @0 integer_zerop)))
+ 	    (negate @1))
+  (if (INTEGRAL_TYPE_P (TREE_TYPE (@0))
+       && !TYPE_UNSIGNED (TREE_TYPE (@0)))
+   (abs @0)))
+ 
  /* Simplifications of operations with one constant operand and
     simplifications to constants or single values.  */
  
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 5006,5011 ****
--- 5014,5037 ----
         && operand_equal_p (@1, TYPE_MIN_VALUE (type), OEP_ONLY_CONST))
     @0)))
  
+ /* minmax (a + c, b + c) -> minmax (a, b) + c */
+ (for minmax (min max)
+  (simplify
+   (minmax:c (plus:cs @0 @2) (plus:s @1 @2))
+    (if (INTEGRAL_TYPE_P (type)
+ 	&& TYPE_OVERFLOW_UNDEFINED (type)
+ 	&& !TYPE_OVERFLOW_SANITIZED (type))
+     (plus (minmax @0 @1) @2))))
+ 
+ /* minmax (a - c, b - c) -> minmax (a, b) - c */
+ (for minmax (min max)
+  (simplify
+   (minmax:c (minus:s @0 @2) (minus:s @1 @2))
+    (if (INTEGRAL_TYPE_P (type)
+ 	&& TYPE_OVERFLOW_UNDEFINED (type)
+ 	&& !TYPE_OVERFLOW_SANITIZED (type))
+     (minus (minmax @0 @1) @2))))
+ 
  /* max (a, a + CST) -> a + CST where CST is positive.  */
  /* max (a, a + CST) -> a where CST is negative.  */
  (simplify
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 5052,5057 ****
--- 5078,5109 ----
    (if (!HONOR_NANS (@0))
     (neeq @0 @1))))
  
+ /* min (a & CST0, a & CST1) -> a & CST0 IFF CST0 & CST1 == CST0 */
+ /* max (a & CST0, a & CST1) -> a & CST0 IFF CST0 & CST1 == CST1 */
+ /* If signed a, then both the constants should have same sign. */
+ (for minmax (min max)
+  (simplify
+   (minmax (bit_and@3 @0 INTEGER_CST@1) (bit_and@4 @0 INTEGER_CST@2))
+    (if (TYPE_UNSIGNED (type)
+         || (tree_int_cst_sgn (@1) == tree_int_cst_sgn (@2)))
+     (with { auto andvalue = wi::to_wide (@1) & wi::to_wide (@2); }
+      (if (andvalue == ((minmax == MIN_EXPR)
+ 		        ? wi::to_wide (@1) : wi::to_wide (@2)))
+       @3
+       (if (andvalue == ((minmax != MIN_EXPR)
+ 			 ? wi::to_wide (@1) : wi::to_wide (@2)))
+        @4))))))
+ 
+ /* min (a, a & CST) --> a & CST */
+ /* max (a, a & CST) --> a */
+ (for minmax (min max)
+  (simplify
+   (minmax @0 (bit_and@1 @0 INTEGER_CST@2))
+    (if (TYPE_UNSIGNED(type))
+     (if (minmax == MIN_EXPR)
+      @1
+      @0))))
+ 
  /* Simplify min (&var[off0], &var[off1]) etc. depending on whether
     the addresses are known to be less, equal or greater.  */
  (for minmax (min max)
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 5452,5457 ****
--- 5504,5519 ----
      (icmp (convert:utype @0) (convert:utype @1))))))
  #endif
  
+ /* PR119422:
+   (bool >= A) >= A -> bool >= A
+   (bool >= A) <  A -> bool <  A.  */
+ (for cmp (ge lt)
+  (simplify
+   (cmp (convert? (ge zero_one_valued_p@0 @1)) @1)
+   (if (INTEGRAL_TYPE_P (TREE_TYPE (@1))
+        && TYPE_UNSIGNED (TREE_TYPE (@1)))
+    (cmp @0 @1))))
+ 
  /* Rewrite an LROTATE_EXPR by a constant into an
     RROTATE_EXPR by a new constant.  */
  (simplify
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 7135,7141 ****
       neeqr (eq      ne)
   (simplify
    (bitop (neeql @0 @1) (neeqr (bit_ior @0 @1) integer_zerop))
!   { constant_boolean_node (bitop==BIT_AND_EXPR, type); }))
  #endif
  
  /* These was part of minmax phiopt.  */
--- 7197,7203 ----
       neeqr (eq      ne)
   (simplify
    (bitop (neeql @0 @1) (neeqr (bit_ior @0 @1) integer_zerop))
!   { constant_boolean_node (bitop == BIT_IOR_EXPR, type); }))
  #endif
  
  /* These was part of minmax phiopt.  */
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 7276,7281 ****
--- 7338,7352 ----
   (if (INTEGRAL_TYPE_P (type))
    @3))
  
+ /* A > B ? ABS(A) : B -> MAX(A, B) when B is non-negative.
+    When A > B >= 0, A is positive so ABS(A) = A = MAX(A, B).
+    When A <= B, the result is B = MAX(A, B).  */
+ (for cmp (gt ge)
+  (simplify
+   (cond (cmp:c @0 tree_expr_nonnegative_p@1) (abs @0) @1)
+   (if (INTEGRAL_TYPE_P (type))
+    (max @0 @1))))
+ 
  /* (X + 1) > Y ? -X : 1 simplifies to X >= Y ? -X : 1 when
     X is unsigned, as when X + 1 overflows, X is -1, so -X == 1.  */
  (simplify
diff -Nrcpad gcc-17-20260503/gcc/optabs.cc gcc-17-20260510/gcc/optabs.cc
*** gcc-17-20260503/gcc/optabs.cc	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/optabs.cc	Sun May 10 22:32:07 2026
*************** expand_doubleword_mult (machine_mode mod
*** 907,914 ****
  	return NULL_RTX;
      }
  
!   adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
! 			 NULL_RTX, 0, OPTAB_DIRECT);
    if (!adjust)
      return NULL_RTX;
  
--- 907,922 ----
  	return NULL_RTX;
      }
  
!   if (op1_low == const1_rtx)
!     adjust = op0_high;
!   else if (op1_low == const0_rtx)
!     adjust = const0_rtx;
!   else if (op1_low == const2_rtx)
!     adjust = expand_binop (word_mode, add_optab, op0_high, op0_high,
! 			   NULL_RTX, 0, OPTAB_DIRECT);
!   else
!     adjust = expand_binop (word_mode, smul_optab, op0_high, op1_low,
! 			   NULL_RTX, 0, OPTAB_DIRECT);
    if (!adjust)
      return NULL_RTX;
  
*************** expand_doubleword_mult (machine_mode mod
*** 936,943 ****
  	return NULL_RTX;
      }
  
!   temp = expand_binop (word_mode, smul_optab, op1_high, op0_low,
! 		       NULL_RTX, 0, OPTAB_DIRECT);
    if (!temp)
      return NULL_RTX;
  
--- 944,959 ----
  	return NULL_RTX;
      }
  
!   if (op1_high == const1_rtx)
!     temp = op0_low;
!   else if (op1_high == const0_rtx)
!     temp = const0_rtx;
!   else if (op1_high == const2_rtx)
!     temp = expand_binop (word_mode, add_optab, op0_low, op0_low,
! 			 NULL_RTX, 0, OPTAB_DIRECT);
!   else
!     temp = expand_binop (word_mode, smul_optab, op0_low, op1_high,
! 			 NULL_RTX, 0, OPTAB_DIRECT);
    if (!temp)
      return NULL_RTX;
  
*************** expand_doubleword_mult (machine_mode mod
*** 954,960 ****
    if (GET_MODE (op0_low) == VOIDmode && GET_MODE (op1_low) == VOIDmode)
      op0_low = force_reg (word_mode, op0_low);
  
!   if (umulp)
      product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
  			    target, 1, OPTAB_DIRECT);
    else
--- 970,978 ----
    if (GET_MODE (op0_low) == VOIDmode && GET_MODE (op1_low) == VOIDmode)
      op0_low = force_reg (word_mode, op0_low);
  
!   if (op1_low == const1_rtx)
!     product = convert_modes (mode, word_mode, op0_low, umulp);
!   else if (umulp)
      product = expand_binop (mode, umul_widen_optab, op0_low, op1_low,
  			    target, 1, OPTAB_DIRECT);
    else
diff -Nrcpad gcc-17-20260503/gcc/po/ChangeLog gcc-17-20260510/gcc/po/ChangeLog
*** gcc-17-20260503/gcc/po/ChangeLog	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/po/ChangeLog	Sun May 10 22:32:07 2026
***************
*** 1,3 ****
--- 1,7 ----
+ 2026-05-05  Joseph Myers  <josmyers@redhat.com>
+ 
+ 	* de.po: Update.
+ 
  2026-05-01  Joseph Myers  <josmyers@redhat.com>
  
  	* be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po,
diff -Nrcpad gcc-17-20260503/gcc/po/de.po gcc-17-20260510/gcc/po/de.po
*** gcc-17-20260503/gcc/po/de.po	Sun May  3 22:32:06 2026
--- gcc-17-20260510/gcc/po/de.po	Sun May 10 22:32:07 2026
***************
*** 8,17 ****
  # Roland Illig <roland.illig@gmx.de>, 2015, 2017-2026.
  msgid ""
  msgstr ""
! "Project-Id-Version: gcc 16.1-b20260329\n"
  "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n"
  "POT-Creation-Date: 2026-04-22 17:18+0000\n"
! "PO-Revision-Date: 2026-03-30 21:36+0200\n"
  "Last-Translator: Roland Illig <roland.illig@gmx.de>\n"
  "Language-Team: German <translation-team-de@lists.sourceforge.net>\n"
  "Language: de\n"
--- 8,17 ----
  # Roland Illig <roland.illig@gmx.de>, 2015, 2017-2026.
  msgid ""
  msgstr ""
! "Project-Id-Version: gcc 16.1.0\n"
  "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n"
  "POT-Creation-Date: 2026-04-22 17:18+0000\n"
! "PO-Revision-Date: 2026-05-03 23:11+0200\n"
  "Last-Translator: Roland Illig <roland.illig@gmx.de>\n"
  "Language-Team: German <translation-team-de@lists.sourceforge.net>\n"
  "Language: de\n"
*************** msgstr "Umgehung von Erratum 843419 für
*** 5728,5734 ****
  #: config/aarch64/aarch64.opt:108
  #, no-c-format
  msgid "Enable narrowing of 64-bit general purpose register writes to 32-bit when upper 32 bits of the register are unused."
! msgstr ""
  
  #: config/aarch64/aarch64.opt:121
  #, no-c-format
--- 5728,5734 ----
  #: config/aarch64/aarch64.opt:108
  #, no-c-format
  msgid "Enable narrowing of 64-bit general purpose register writes to 32-bit when upper 32 bits of the register are unused."
! msgstr "Einschalten, dass bei Schreibzugriffen auf 64-Bit-Allzweck-Register nur die unteren 32 Bit geschrieben werden, soweit die oberen 32 Bit ungenutzt sind."
  
  #: config/aarch64/aarch64.opt:121
  #, no-c-format
*************** msgstr "Schleifenvektorisierung von Glei
*** 11259,11265 ****
  #: params.opt:1300
  #, no-c-format
  msgid "Enable vectorization of loops that may not be profitable according to the cost model but still perform costing between vector modes."
! msgstr ""
  
  #: params.opt:1304
  #, no-c-format
--- 11259,11265 ----
  #: params.opt:1300
  #, no-c-format
  msgid "Enable vectorization of loops that may not be profitable according to the cost model but still perform costing between vector modes."
! msgstr "Einschalten der Vektorisierung von Schleifen, die nach dem Kostenmodell möglicherweise nicht rentabel sind, aber dennoch eine Kostenberechnung zwischen den Vektormodi durchführen."
  
  #: params.opt:1304
  #, no-c-format
*************** msgid "At global scope:"
*** 22282,22291 ****
  msgstr "Im globalen Gültigkeitsbereich:"
  
  #: cp/reflect.cc:408
- #, fuzzy
- #| msgid "reflect_constant failed"
  msgid "reflect_constant_array failed"
! msgstr "reflect_constant fehlgeschlagen"
  
  #: cp/reflect.cc:424 cp/reflect.cc:659 cp/reflect.cc:4039
  msgid "reflect_constant failed"
--- 22282,22289 ----
  msgstr "Im globalen Gültigkeitsbereich:"
  
  #: cp/reflect.cc:408
  msgid "reflect_constant_array failed"
! msgstr "reflect_constant_array fehlgeschlagen"
  
  #: cp/reflect.cc:424 cp/reflect.cc:659 cp/reflect.cc:4039
  msgid "reflect_constant failed"
*************** msgid "u8identifier_of not representable
*** 22392,22413 ****
  msgstr "u8identifier_of ist nicht in UTF-8 darstellbar"
  
  #: cp/reflect.cc:3777
- #, fuzzy
- #| msgid "identifier_of not representable in ordinary literal encoding"
  msgid "display_string_of not representable in ordinary literal encoding"
! msgstr "identifier_of ist im gewöhnlichen Encoding für Literale nicht darstellbar"
  
  #: cp/reflect.cc:3782
- #, fuzzy
- #| msgid "u8identifier_of not representable in UTF-8"
  msgid "u8display_string_of not representable in UTF-8"
! msgstr "u8identifier_of ist nicht in UTF-8 darstellbar"
  
  #: cp/reflect.cc:3922
- #, fuzzy
- #| msgid "reflection does not represent a type, type alias, variable, function, namespace, enumerator, direct base class relationship, or non-static data member"
  msgid "reflection does not represent a type, type alias, variable, function, function parameter, namespace, enumerator, direct base class relationship, or non-static data member"
! msgstr "Reflexion stellt weder Typ noch Typalias, Variable, Funktion, Namespace, Enumerator, direkte Basisklassenbeziehung oder nicht statisches Datenelement dar"
  
  #: cp/reflect.cc:3935
  msgid "reflection does not represent a complete type or type alias"
--- 22390,22405 ----
  msgstr "u8identifier_of ist nicht in UTF-8 darstellbar"
  
  #: cp/reflect.cc:3777
  msgid "display_string_of not representable in ordinary literal encoding"
! msgstr "display_string_of ist im gewöhnlichen Encoding für Literale nicht darstellbar"
  
  #: cp/reflect.cc:3782
  msgid "u8display_string_of not representable in UTF-8"
! msgstr "u8display_string_of ist nicht in UTF-8 darstellbar"
  
  #: cp/reflect.cc:3922
  msgid "reflection does not represent a type, type alias, variable, function, function parameter, namespace, enumerator, direct base class relationship, or non-static data member"
! msgstr "Reflektion stellt weder Typ noch Typalias, Variable, Funktion, Funktionsparameter, Namespace, Enumerator, direkte Basisklassenbeziehung oder nicht statisches Datenelement dar"
  
  #: cp/reflect.cc:3935
  msgid "reflection does not represent a complete type or type alias"
*************** msgstr "weder Name noch bit_width angege
*** 22487,22493 ****
  
  #: cp/reflect.cc:5997
  msgid "no name and non-empty annotations specified"
! msgstr ""
  
  #: cp/reflect.cc:6003
  msgid "bit_width specified with non-integral and non-enumeration type"
--- 22479,22485 ----
  
  #: cp/reflect.cc:5997
  msgid "no name and non-empty annotations specified"
! msgstr "weder Name noch nichtleere Annotationen angegeben"
  
  #: cp/reflect.cc:6003
  msgid "bit_width specified with non-integral and non-enumeration type"
*************** msgid "bit_width is negative"
*** 22510,22525 ****
  msgstr "bit_width ist negativ"
  
  #: cp/reflect.cc:6026
- #, fuzzy
- #| msgid "alignment specified for type name in cast"
  msgid "name unspecified and type is const"
! msgstr "Ausrichtung für Typnamen in Cast angegeben"
  
  #: cp/reflect.cc:6030
- #, fuzzy
- #| msgid "alignment specified for type name in cast"
  msgid "name unspecified and type is volatile"
! msgstr "Ausrichtung für Typnamen in Cast angegeben"
  
  #: cp/reflect.cc:6038
  msgid "alignment is not power of two"
--- 22502,22513 ----
  msgstr "bit_width ist negativ"
  
  #: cp/reflect.cc:6026
  msgid "name unspecified and type is const"
! msgstr "Name nicht angegeben und Typ ist konstant"
  
  #: cp/reflect.cc:6030
  msgid "name unspecified and type is volatile"
! msgstr "Name nicht angegeben und Typ ist volatil"
  
  #: cp/reflect.cc:6038
  msgid "alignment is not power of two"
*************** msgid "alignment is smaller than alignme
*** 22534,22555 ****
  msgstr "Alignment ist kleiner als alignment_of"
  
  #: cp/reflect.cc:6062
- #, fuzzy
- #| msgid "reflection does not have a type"
  msgid "reflection does not have non-array object type"
! msgstr "Reflektion hat keinen Typen"
  
  #: cp/reflect.cc:6506
- #, fuzzy
- #| msgid "reflection does not represent a type"
  msgid "current scope does not represent a function"
! msgstr "Reflektion repräsentiert keinen Typen"
  
  #: cp/reflect.cc:6526
- #, fuzzy
- #| msgid "reflection does not represent parameter of current function"
  msgid "current scope does not represent a class nor a member function"
! msgstr "Reflektion repräsentiert keinen Parameter der aktuellen Funktion"
  
  #: cp/reflect.cc:6685
  msgid "incomplete parent class"
--- 22522,22537 ----
  msgstr "Alignment ist kleiner als alignment_of"
  
  #: cp/reflect.cc:6062
  msgid "reflection does not have non-array object type"
! msgstr "Reflektion muss einen Objekttypen außer Array haben"
  
  #: cp/reflect.cc:6506
  msgid "current scope does not represent a function"
! msgstr "aktueller Gültigkeitsbereich repräsentiert keine Funktion"
  
  #: cp/reflect.cc:6526
  msgid "current scope does not represent a class nor a member function"
! msgstr "aktueller Gültigkeitsbereich repräsentiert weder eine Klassen- noch eine Memberfunktion"
  
  #: cp/reflect.cc:6685
  msgid "incomplete parent class"
*************** msgid "Somebody asked for the field %s.%
*** 55030,55044 ****
  msgstr "Interner Fehler: Somebody asked for the field %s.%s, which does not exist"
  
  #: cobol/gengen.cc:1276
! #, fuzzy, gcc-internal-format, gfc-internal-format
! #| msgid "%qs is not supported with %qs"
  msgid "%s:%d: Must not call here with %s"
! msgstr "%qs wird mit %qs nicht unterstützt"
  
  #: cobol/gengen.cc:1294
  #, gcc-internal-format, gfc-internal-format
  msgid "%s:%d: Must not call here with non-%s"
! msgstr ""
  
  #: cobol/gengen.cc:2017 cobol/gengen.cc:2070 cobol/gengen.cc:2897
  #: cobol/gengen.cc:2952
--- 55012,55025 ----
  msgstr "Interner Fehler: Somebody asked for the field %s.%s, which does not exist"
  
  #: cobol/gengen.cc:1276
! #, gcc-internal-format, gfc-internal-format
  msgid "%s:%d: Must not call here with %s"
! msgstr "%s:%d: Darf nicht mit %s aufgerufen werden"
  
  #: cobol/gengen.cc:1294
  #, gcc-internal-format, gfc-internal-format
  msgid "%s:%d: Must not call here with non-%s"
! msgstr "%s:%d: Darf nicht mit nicht-%s aufgerufen werden"
  
  #: cobol/gengen.cc:2017 cobol/gengen.cc:2070 cobol/gengen.cc:2897
  #: cobol/gengen.cc:2952
*************** msgid "%qT is not a volatile type"
*** 58018,58027 ****
  msgstr "%qT ist kein %<volatile%>-Typ"
  
  #: cp/constraint.cc:3363
! #, fuzzy, gcc-internal-format
! #| msgid "%qT is not a literal type"
  msgid "%qT is not a structural type"
! msgstr "%qT ist kein literaler Typ"
  
  #: cp/constraint.cc:3367
  #, gcc-internal-format
--- 57999,58007 ----
  msgstr "%qT ist kein %<volatile%>-Typ"
  
  #: cp/constraint.cc:3363
! #, gcc-internal-format
  msgid "%qT is not a structural type"
! msgstr "%qT ist kein struktureller Typ"
  
  #: cp/constraint.cc:3367
  #, gcc-internal-format
*************** msgid "%qs used outside of constant expr
*** 58387,58396 ****
  msgstr "%qs wird außerhalb von konstanten Ausdrücken verwendet"
  
  #: cp/cp-gimplify.cc:999
! #, fuzzy, gcc-internal-format
! #| msgid "expected declaration"
  msgid "unexpected %<std::%s%> declaration"
! msgstr "Deklaration erwartet"
  
  #: cp/cp-gimplify.cc:1317
  #, gcc-internal-format
--- 58367,58375 ----
  msgstr "%qs wird außerhalb von konstanten Ausdrücken verwendet"
  
  #: cp/cp-gimplify.cc:999
! #, gcc-internal-format
  msgid "unexpected %<std::%s%> declaration"
! msgstr "unerwartete Deklaration von %<std::%s%>"
  
  #: cp/cp-gimplify.cc:1317
  #, gcc-internal-format
*************** msgid "unnamed field is neither function
*** 61445,61460 ****
  msgstr "unbenanntes Feld ist weder eine Funktion noch Elementfunktion; kann nicht als %<friend%> deklariert werden"
  
  #: cp/decl.cc:16674
! #, fuzzy, gcc-internal-format
! #| msgid "%qE attribute applied to extern \"C\" declaration %qD"
  msgid "annotation applied to non-defining friend declaration %qD"
! msgstr "Attribut %qE wird auf »extern \"C\"«-Deklaration %qD angewendet"
  
  #: cp/decl.cc:16682
! #, fuzzy, gcc-internal-format
! #| msgid "defining explicit specialization %qD in friend declaration"
  msgid "annotation applied to parameter %qD of non-defining friend declaration"
! msgstr "Definition der expliziten Spezialisierung %qD in friend-Deklaration"
  
  #: cp/decl.cc:16694 cp/parser.cc:23742 cp/parser.cc:31131
  #, gcc-internal-format
--- 61424,61437 ----
  msgstr "unbenanntes Feld ist weder eine Funktion noch Elementfunktion; kann nicht als %<friend%> deklariert werden"
  
  #: cp/decl.cc:16674
! #, gcc-internal-format
  msgid "annotation applied to non-defining friend declaration %qD"
! msgstr "Annotation wird auf nicht-definierende Freund-Deklaration %qD angewendet"
  
  #: cp/decl.cc:16682
! #, gcc-internal-format
  msgid "annotation applied to parameter %qD of non-defining friend declaration"
! msgstr "Annotation wird auf Parameter %qD einer nicht-definierenden Freund-Deklaration angewendet"
  
  #: cp/decl.cc:16694 cp/parser.cc:23742 cp/parser.cc:31131
  #, gcc-internal-format
*************** msgid "using %qs"
*** 61977,61986 ****
  msgstr "%qs wird verwendet"
  
  #: cp/decl.cc:21329
! #, fuzzy, gcc-internal-format
! #| msgid "%qs used with %<auto%>"
  msgid "%qs used without %qs declaration"
! msgstr "%qs mit %<auto%> verwendet"
  
  #: cp/decl.cc:21341
  #, gcc-internal-format
--- 61954,61962 ----
  msgstr "%qs wird verwendet"
  
  #: cp/decl.cc:21329
! #, gcc-internal-format
  msgid "%qs used without %qs declaration"
! msgstr "%qs ohne %qs-Deklaration verwendet"
  
  #: cp/decl.cc:21341
  #, gcc-internal-format
*************** msgid "declaration of %qD shadows a memb
*** 64473,64488 ****
  msgstr "Deklaration von %qD überdeckt ein Element von %qT"
  
  #: cp/name-lookup.cc:3698
! #, fuzzy, gcc-internal-format
! #| msgid "annotation applied to a label"
  msgid "annotation applied to block scope extern %qD"
! msgstr "Annotation bezieht sich auf eine Sprungmarke"
  
  #: cp/name-lookup.cc:3705
! #, fuzzy, gcc-internal-format
! #| msgid "declaration for parameter %qD but no such parameter"
  msgid "annotation applied to parameter %qD of block scope extern"
! msgstr "Deklaration für nicht vorhandenen Parameter %qD"
  
  #: cp/name-lookup.cc:4170
  #, gcc-internal-format
--- 64449,64462 ----
  msgstr "Deklaration von %qD überdeckt ein Element von %qT"
  
  #: cp/name-lookup.cc:3698
! #, gcc-internal-format
  msgid "annotation applied to block scope extern %qD"
! msgstr "Annotation bezieht sich auf eine block-externe Deklaration von %qD"
  
  #: cp/name-lookup.cc:3705
! #, gcc-internal-format
  msgid "annotation applied to parameter %qD of block scope extern"
! msgstr "Annotation bezieht sich auf Parameter %qD einer block-externen Deklaration"
  
  #: cp/name-lookup.cc:4170
  #, gcc-internal-format
*************** msgstr "%<constexpr%>-Lambda ist nur mit
*** 65715,65727 ****
  #: cp/parser.cc:13752
  #, gcc-internal-format
  msgid "%qE is not implicitly captured by a contract assertion"
! msgstr ""
  
  #: cp/parser.cc:13754
! #, fuzzy, gcc-internal-format
! #| msgid "%qE declared here"
  msgid "%q#E declared here"
! msgstr "%qE ist hier deklariert"
  
  #: cp/parser.cc:14379
  #, gcc-internal-format
--- 65689,65700 ----
  #: cp/parser.cc:13752
  #, gcc-internal-format
  msgid "%qE is not implicitly captured by a contract assertion"
! msgstr "%qE wird nicht implizit von einer Vertragszusicherung erfasst"
  
  #: cp/parser.cc:13754
! #, gcc-internal-format
  msgid "%q#E declared here"
! msgstr "%q#E ist hier deklariert"
  
  #: cp/parser.cc:14379
  #, gcc-internal-format
*************** msgid "redeclaration of %qD with differe
*** 68525,68534 ****
  msgstr "Redeklaration von %qD mit unterschiedlichen Einschränkungen"
  
  #: cp/pt.cc:6386
! #, fuzzy, gcc-internal-format
! #| msgid "lambda-expression in template parameter type"
  msgid "local class in lambda in template parameter list"
! msgstr "Lambda-Ausdruck in Template-Parameter-Typ"
  
  #: cp/pt.cc:6461
  #, gcc-internal-format
--- 68498,68506 ----
  msgstr "Redeklaration von %qD mit unterschiedlichen Einschränkungen"
  
  #: cp/pt.cc:6386
! #, gcc-internal-format
  msgid "local class in lambda in template parameter list"
! msgstr "lokale Klasse in Lambda-Ausdruck in Template-Parameter-Liste"
  
  #: cp/pt.cc:6461
  #, gcc-internal-format
*************** msgid "cannot take the reflection of an
*** 69566,69575 ****
  msgstr "die Reflexion einer Überlagerungsmenge ist nicht übernehmbar"
  
  #: cp/reflect.cc:363 cp/reflect.cc:7729
! #, fuzzy, gcc-internal-format
! #| msgid "passing %qT to argument %d of %qE, which expects %qT"
  msgid "incorrect %qT type of argument %d, expected %qT"
! msgstr "Übergabe von %qT an Argument %d von %qE, das jedoch %qT erwartet"
  
  #: cp/reflect.cc:476
  #, gcc-internal-format
--- 69538,69546 ----
  msgstr "die Reflexion einer Überlagerungsmenge ist nicht übernehmbar"
  
  #: cp/reflect.cc:363 cp/reflect.cc:7729
! #, gcc-internal-format
  msgid "incorrect %qT type of argument %d, expected %qT"
! msgstr "fehlerhafter Typ %qT an Argument %d, stattdessen %qT erwartet"
  
  #: cp/reflect.cc:476
  #, gcc-internal-format
*************** msgid "%<reflect_constant_array%> argume
*** 69592,69601 ****
  msgstr "%<reflect_constant_array%>-Argument mit %qT, aber das ist nicht kopiererzeugbar"
  
  #: cp/reflect.cc:595
! #, fuzzy, gcc-internal-format
! #| msgid "%<reflect_constant_array%> argument with %qT which is not constructible from %qT %<std::ranges::range_reference_t%>"
  msgid "%<reflect_constant_array%> argument with %qT which is not compatible with %qT %<std::ranges::range_reference_t%>"
! msgstr "%<reflect_constant_array%>-Argument mit %qT, aber das ist nicht von %qT %<std::ranges::range_reference_t%> erzeugbar"
  
  #: cp/reflect.cc:606
  #, gcc-internal-format
--- 69563,69571 ----
  msgstr "%<reflect_constant_array%>-Argument mit %qT, aber das ist nicht kopiererzeugbar"
  
  #: cp/reflect.cc:595
! #, gcc-internal-format
  msgid "%<reflect_constant_array%> argument with %qT which is not compatible with %qT %<std::ranges::range_reference_t%>"
! msgstr "%<reflect_constant_array%>-Argument mit %qT, aber das ist nicht kompatibel mit %qT %<std::ranges::range_reference_t%>"
  
  #: cp/reflect.cc:606
  #, gcc-internal-format
*************** msgid "%<define_aggregate%> evaluated fr
*** 69784,69793 ****
  msgstr "das %<define_aggregate%>, das aus dem %<consteval%>-Block heraus ausgewertet wird und von %qT umschlossen ist, während Typ %qT gerade definiert wird, ist von %qT umschlossen"
  
  #: cp/reflect.cc:6472
! #, fuzzy, gcc-internal-format
! #| msgid "%<access_context::current%> used outside of manifestly constant-evaluation"
  msgid "%qs used outside of manifestly constant-evaluation"
! msgstr "%<access_context::current%> wird außerhalb der manifesten Konstantenauswertung verwendet"
  
  #: cp/reflect.cc:6585
  #, gcc-internal-format
--- 69754,69762 ----
  msgstr "das %<define_aggregate%>, das aus dem %<consteval%>-Block heraus ausgewertet wird und von %qT umschlossen ist, während Typ %qT gerade definiert wird, ist von %qT umschlossen"
  
  #: cp/reflect.cc:6472
! #, gcc-internal-format
  msgid "%qs used outside of manifestly constant-evaluation"
! msgstr "%qs wird außerhalb der manifesten Konstantenauswertung verwendet"
  
  #: cp/reflect.cc:6585
  #, gcc-internal-format
*************** msgid "unexpected argument to %qs"
*** 69810,69831 ****
  msgstr "unerwartetes Argument für %qs"
  
  #: cp/reflect.cc:7726
! #, fuzzy, gcc-internal-format
! #| msgid "passing %qT to argument %d of %qE, which expects %qs"
  msgid "incorrect %qT type of argument %d, expected %qs"
! msgstr "Übergabe von %qT an das Argument %d von %qE, das jedoch %qs erwartet"
  
  #: cp/reflect.cc:7799
! #, fuzzy, gcc-internal-format
! #| msgid "vector type expected in %qs"
  msgid "incorrect %qT return type, expected %qs"
! msgstr "Vektortypen erwartet in %qs"
  
  #: cp/reflect.cc:7802
! #, fuzzy, gcc-internal-format
! #| msgid "vector type expected in %qs"
  msgid "incorrect %qT return type, expected %qT"
! msgstr "Vektortypen erwartet in %qs"
  
  #: cp/reflect.cc:7826
  #, gcc-internal-format
--- 69779,69797 ----
  msgstr "unerwartetes Argument für %qs"
  
  #: cp/reflect.cc:7726
! #, gcc-internal-format
  msgid "incorrect %qT type of argument %d, expected %qs"
! msgstr "fehlerhafter Typ %qT an Argument %d, stattdessen %qs erwartet"
  
  #: cp/reflect.cc:7799
! #, gcc-internal-format
  msgid "incorrect %qT return type, expected %qs"
! msgstr "fehlerhafter Rückgabetyp %qT, stattdessen %qs erwartet"
  
  #: cp/reflect.cc:7802
! #, gcc-internal-format
  msgid "incorrect %qT return type, expected %qT"
! msgstr "fehlerhafter Rückgabetyp %qT, stattdessen %qT erwartet"
  
  #: cp/reflect.cc:7826
  #, gcc-internal-format
*************** msgid "splice argument must be an expres
*** 69838,69858 ****
  msgstr "das %<splice%>-Argument muss ein Ausdruck vom Typ %qs sein"
  
  #: cp/reflect.cc:8530
! #, fuzzy, gcc-internal-format
! #| msgid "cannot call a concept as a function"
  msgid "cannot splice a null reflection"
! msgstr "ein Konzept kann nicht wie eine Funktion aufgerufen werden"
  
  #: cp/reflect.cc:8540
! #, fuzzy, gcc-internal-format
! #| msgid "cannot use a data member specification in a splice expression"
  msgid "cannot use %qD function parameter reflection in a splice expression"
! msgstr "eine Datenelementangabe kann nicht in einem Spleißausdruck verwendet werden"
  
  #: cp/reflect.cc:8544
  #, gcc-internal-format
  msgid "apply %<std::meta::variable_of%> on it before splicing"
! msgstr ""
  
  #: cp/reflect.cc:8803
  #, gcc-internal-format
--- 69804,69822 ----
  msgstr "das %<splice%>-Argument muss ein Ausdruck vom Typ %qs sein"
  
  #: cp/reflect.cc:8530
! #, gcc-internal-format
  msgid "cannot splice a null reflection"
! msgstr "eine Nullreflexion kann nicht gespleißt werden"
  
  #: cp/reflect.cc:8540
! #, gcc-internal-format
  msgid "cannot use %qD function parameter reflection in a splice expression"
! msgstr "eine Reflektion des Funktionsparameters %qD kann nicht in einem Spleißausdruck verwendet werden"
  
  #: cp/reflect.cc:8544
  #, gcc-internal-format
  msgid "apply %<std::meta::variable_of%> on it before splicing"
! msgstr "wenden Sie %<std::meta::variable_of%> darauf an, vor dem Spleißen"
  
  #: cp/reflect.cc:8803
  #, gcc-internal-format
*************** msgid "cannot implicitly reference a cla
*** 69900,69915 ****
  msgstr "das Klassenelement %qD kann nicht implizit aus einem Spleißausdruck heraus referenziert werden"
  
  #: cp/reflect.cc:9034
! #, fuzzy, gcc-internal-format
! #| msgid "invalid cast to abstract class type %qT"
  msgid "invalid class member access of type template %qE"
! msgstr "ungültige Umwandlung in abstrakte Klasse %qT"
  
  #: cp/reflect.cc:9042
! #, fuzzy, gcc-internal-format
! #| msgid "cannot use %qs as a call-used register"
  msgid "cannot use %qE to access a class member"
! msgstr "%qs kann nicht als ein rufverwendetes Register verwendet werden"
  
  #: cp/reflect.cc:9056
  #, gcc-internal-format
--- 69864,69877 ----
  msgstr "das Klassenelement %qD kann nicht implizit aus einem Spleißausdruck heraus referenziert werden"
  
  #: cp/reflect.cc:9034
! #, gcc-internal-format
  msgid "invalid class member access of type template %qE"
! msgstr "ungültiger Zugriff auf Klassenmember vom Typ Template %qE"
  
  #: cp/reflect.cc:9042
! #, gcc-internal-format
  msgid "cannot use %qE to access a class member"
! msgstr "%qE kann nicht verwendet werden, um auf ein Klassenmember zuzugreifen"
  
  #: cp/reflect.cc:9056
  #, gcc-internal-format
*************** msgid "expected a reflection of a functi
*** 69937,69946 ****
  msgstr "Reflexion eines Funktionstemplates erwartet"
  
  #: cp/reflect.cc:9130
! #, fuzzy, gcc-internal-format
! #| msgid "expected a reflection of a function template"
  msgid "expected a reflection of a function or variable template"
! msgstr "Reflexion eines Funktionstemplates erwartet"
  
  #: cp/rtti.cc:308
  #, gcc-internal-format
--- 69899,69907 ----
  msgstr "Reflexion eines Funktionstemplates erwartet"
  
  #: cp/reflect.cc:9130
! #, gcc-internal-format
  msgid "expected a reflection of a function or variable template"
! msgstr "Reflektion eines Templates für eine Funktion oder eine Variable erwartet"
  
  #: cp/rtti.cc:308
  #, gcc-internal-format
*************** msgid "%<%D::%D%> is not a member of %qT
*** 71398,71407 ****
  msgstr "%<%D::%D%> ist kein Element von %qT"
  
  #: cp/typeck.cc:3605
! #, fuzzy, gcc-internal-format
! #| msgid "%qD is not a member of %qT"
  msgid "%q#D is not a member of %qT"
! msgstr "%qD ist kein Element von %qT"
  
  #: cp/typeck.cc:3781
  #, gcc-internal-format
--- 71359,71367 ----
  msgstr "%<%D::%D%> ist kein Element von %qT"
  
  #: cp/typeck.cc:3605
! #, gcc-internal-format
  msgid "%q#D is not a member of %qT"
! msgstr "%q#D ist kein Element von %qT"
  
  #: cp/typeck.cc:3781
  #, gcc-internal-format
*************** msgid "Pointer-array actual argument at
*** 78443,78452 ****
  msgstr "Zeigerfeld als effektives Argument bei %L erfordert wegen VOLATILE-Attribut ein Scheinargument %qs mit vermuteter Form oder als Zeigerfeld"
  
  #: fortran/interface.cc:4153
! #, fuzzy, gcc-internal-format
! #| msgid "Assumed-type actual argument at %L requires that dummy argument %qs is of assumed type"
  msgid "ISO_C_BINDING function actual argument at %L requires dummy argument %qs to have a matching type from ISO_C_BINDING"
! msgstr "Feld mit vermutetem Rang bei %L erfordert Scheinargument %qs mit vermutetem Rang"
  
  #: fortran/interface.cc:4181
  #, gcc-internal-format, gfc-internal-format
--- 78403,78411 ----
  msgstr "Zeigerfeld als effektives Argument bei %L erfordert wegen VOLATILE-Attribut ein Scheinargument %qs mit vermuteter Form oder als Zeigerfeld"
  
  #: fortran/interface.cc:4153
! #, gcc-internal-format
  msgid "ISO_C_BINDING function actual argument at %L requires dummy argument %qs to have a matching type from ISO_C_BINDING"
! msgstr "Das tatsächliche Argument der ISO_C_BINDING-Funktion an Position %L erfordert, dass das Dummy-Argument %qs einen passenden Typ gemäß ISO_C_BINDING hat"
  
  #: fortran/interface.cc:4181
  #, gcc-internal-format, gfc-internal-format
*************** msgstr "!$OMP DECLARE REDUCTION »%s« f
*** 82903,82914 ****
  #: fortran/openmp.cc:10507
  #, gcc-internal-format
  msgid "Sorry, ALLOCATABLE object %qs in LINEAR clause on worksharing-loop construct at %L is not yet supported"
! msgstr ""
  
  #: fortran/openmp.cc:10512
  #, gcc-internal-format
  msgid "Sorry, array %qs in LINEAR clause on worksharing-loop construct at %L is not yet supported"
! msgstr ""
  
  #: fortran/openmp.cc:10526
  #, gcc-internal-format, gfc-internal-format
--- 82862,82873 ----
  #: fortran/openmp.cc:10507
  #, gcc-internal-format
  msgid "Sorry, ALLOCATABLE object %qs in LINEAR clause on worksharing-loop construct at %L is not yet supported"
! msgstr "Sorry, das ALLOCATABLE-Objekt %qs in der LINEAR-Klausel des Worksharing-Loop-Konstrukts bei %L wird noch nicht unterstützt"
  
  #: fortran/openmp.cc:10512
  #, gcc-internal-format
  msgid "Sorry, array %qs in LINEAR clause on worksharing-loop construct at %L is not yet supported"
! msgstr "Sorry, das Feld %qs in der LINEAR-Klausel im Worksharing-Loop-Konstrukt bei %L wird noch nicht unterstützt"
  
  #: fortran/openmp.cc:10526
  #, gcc-internal-format, gfc-internal-format
*************** msgstr "Prozedur %s bei %L ist bereits a
*** 88511,88517 ****
  #: fortran/symbol.cc:1898
  #, gcc-internal-format
  msgid "F2008: A pointer function assignment is ambiguous if it is the first executable statement after the specification block.  Please add any other kind of executable statement before it"
! msgstr "F2008: Eine Zuweisung an eine Zeigerfunktion ist mehrdeutig, wenn dies die erste Anweisung nach dem Spezifikationsblock ist. Bitte fügen Sie davor irgend eine andere ausführbare Anweisung ein."
  
  #: fortran/symbol.cc:1935
  #, gcc-internal-format, gfc-internal-format
--- 88470,88476 ----
  #: fortran/symbol.cc:1898
  #, gcc-internal-format
  msgid "F2008: A pointer function assignment is ambiguous if it is the first executable statement after the specification block.  Please add any other kind of executable statement before it"
! msgstr "F2008: Eine Zuweisung an eine Zeigerfunktion ist mehrdeutig, wenn dies die erste Anweisung nach dem Spezifikationsblock ist. Bitte fügen Sie davor irgend eine andere ausführbare Anweisung ein"
  
  #: fortran/symbol.cc:1935
  #, gcc-internal-format, gfc-internal-format
*************** msgid "Bounds checking of the elemental
*** 88752,88761 ****
  msgstr "Die Überprüfung der Grenzen des Elementindexes bei %L führt zu zwei Aufrufen von %qs, das weder als PURE deklariert ist noch implizit rein ist."
  
  #: fortran/trans-array.cc:7109
! #, fuzzy, gcc-internal-format, gfc-internal-format
! #| msgid "Array %qs at %L is a variable, which does not reduce to a constant expression"
  msgid "Array initializer at %L does not reduce to a constant expression"
! msgstr "Feld %qs bei %L ist eine Variable, die nicht zu konstantem Ausdruck reduziert"
  
  #. Problems occur when we get something like
  #. integer :: a(lots) = (/(i, i=1, lots)/)
--- 88711,88719 ----
  msgstr "Die Überprüfung der Grenzen des Elementindexes bei %L führt zu zwei Aufrufen von %qs, das weder als PURE deklariert ist noch implizit rein ist."
  
  #: fortran/trans-array.cc:7109
! #, gcc-internal-format, gfc-internal-format
  msgid "Array initializer at %L does not reduce to a constant expression"
! msgstr "Der Feldinitialisierer bei %L ist nicht zu einem konstanten Ausdruck reduzierbar"
  
  #. Problems occur when we get something like
  #. integer :: a(lots) = (/(i, i=1, lots)/)
diff -Nrcpad gcc-17-20260503/gcc/range-op-float.cc gcc-17-20260510/gcc/range-op-float.cc
*** gcc-17-20260503/gcc/range-op-float.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/range-op-float.cc	Sun May 10 22:32:07 2026
*************** public:
*** 1356,1362 ****
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! } fop_unordered;
  
  bool
  foperator_unordered::fold_range (irange &r, tree type,
--- 1356,1363 ----
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! };
! static const foperator_unordered fop_unordered;
  
  bool
  foperator_unordered::fold_range (irange &r, tree type,
*************** public:
*** 1430,1436 ****
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! } fop_ordered;
  
  bool
  foperator_ordered::fold_range (irange &r, tree type,
--- 1431,1438 ----
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! };
! static const foperator_ordered fop_ordered;
  
  bool
  foperator_ordered::fold_range (irange &r, tree type,
*************** public:
*** 1652,1658 ****
  		  const irange &lhs,
  		  const frange &op1,
  		  relation_trio trio) const final override;
! } fop_unordered_lt;
  
  bool
  foperator_unordered_lt::op1_range (frange &r, tree type,
--- 1654,1661 ----
  		  const irange &lhs,
  		  const frange &op1,
  		  relation_trio trio) const final override;
! };
! static const foperator_unordered_lt fop_unordered_lt;
  
  bool
  foperator_unordered_lt::op1_range (frange &r, tree type,
*************** public:
*** 1762,1768 ****
    bool op2_range (frange &r, tree type,
  		  const irange &lhs, const frange &op1,
  		  relation_trio = TRIO_VARYING) const final override;
! } fop_unordered_le;
  
  bool
  foperator_unordered_le::op1_range (frange &r, tree type,
--- 1765,1772 ----
    bool op2_range (frange &r, tree type,
  		  const irange &lhs, const frange &op1,
  		  relation_trio = TRIO_VARYING) const final override;
! };
! static const foperator_unordered_le fop_unordered_le;
  
  bool
  foperator_unordered_le::op1_range (frange &r, tree type,
*************** public:
*** 1870,1876 ****
    bool op2_range (frange &r, tree type,
  		  const irange &lhs, const frange &op1,
  		  relation_trio = TRIO_VARYING) const final override;
! } fop_unordered_gt;
  
  bool
  foperator_unordered_gt::op1_range (frange &r,
--- 1874,1881 ----
    bool op2_range (frange &r, tree type,
  		  const irange &lhs, const frange &op1,
  		  relation_trio = TRIO_VARYING) const final override;
! };
! static const foperator_unordered_gt fop_unordered_gt;
  
  bool
  foperator_unordered_gt::op1_range (frange &r,
*************** public:
*** 1982,1988 ****
    bool op2_range (frange &r, tree type,
  		  const irange &lhs, const frange &op1,
  		  relation_trio = TRIO_VARYING) const final override;
! } fop_unordered_ge;
  
  bool
  foperator_unordered_ge::op1_range (frange &r,
--- 1987,1994 ----
    bool op2_range (frange &r, tree type,
  		  const irange &lhs, const frange &op1,
  		  relation_trio = TRIO_VARYING) const final override;
! };
! static const foperator_unordered_ge fop_unordered_ge;
  
  bool
  foperator_unordered_ge::op1_range (frange &r,
*************** public:
*** 2096,2102 ****
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! } fop_unordered_equal;
  
  bool
  foperator_unordered_equal::op1_range (frange &r, tree type,
--- 2102,2109 ----
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! };
! static const foperator_unordered_equal fop_unordered_equal;
  
  bool
  foperator_unordered_equal::op1_range (frange &r, tree type,
*************** public:
*** 2178,2184 ****
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! } fop_ltgt;
  
  bool
  foperator_ltgt::op1_range (frange &r, tree type,
--- 2185,2192 ----
    {
      return op1_range (r, type, lhs, op1, rel.swap_op1_op2 ());
    }
! };
! static const foperator_ltgt fop_ltgt;
  
  bool
  foperator_ltgt::op1_range (frange &r, tree type,
*************** private:
*** 2900,2906 ****
      gcc_checking_assert (!real_isnan (&ub));
      r.set (type, lb, ub, nan_state (maybe_nan));
    }
! } fop_div;
  
  bool
  operator_cast::fold_range (frange &r, tree type, const frange &op1,
--- 2908,2915 ----
      gcc_checking_assert (!real_isnan (&ub));
      r.set (type, lb, ub, nan_state (maybe_nan));
    }
! };
! static const foperator_div fop_div;
  
  bool
  operator_cast::fold_range (frange &r, tree type, const frange &op1,
diff -Nrcpad gcc-17-20260503/gcc/range-op-ptr.cc gcc-17-20260510/gcc/range-op-ptr.cc
*** gcc-17-20260503/gcc/range-op-ptr.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/range-op-ptr.cc	Sun May 10 22:32:07 2026
*************** public:
*** 318,324 ****
  					  relation_kind) const final override;
    void update_bitmask (prange &r, const prange &lh, const irange &rh) const
      { update_known_bitmask (r, POINTER_PLUS_EXPR, lh, rh); }
! } op_pointer_plus;
  
  bool
  pointer_plus_operator::fold_range (prange &r, tree type,
--- 318,325 ----
  					  relation_kind) const final override;
    void update_bitmask (prange &r, const prange &lh, const irange &rh) const
      { update_known_bitmask (r, POINTER_PLUS_EXPR, lh, rh); }
! };
! static const pointer_plus_operator op_pointer_plus;
  
  bool
  pointer_plus_operator::fold_range (prange &r, tree type,
*************** class operator_pointer_diff : public ran
*** 475,481 ****
    void update_bitmask (irange &r,
  		       const prange &lh, const prange &rh) const final override
    { update_known_bitmask (r, POINTER_DIFF_EXPR, lh, rh); }
! } op_pointer_diff;
  
  bool
  operator_pointer_diff::fold_range (irange &r, tree type,
--- 476,483 ----
    void update_bitmask (irange &r,
  		       const prange &lh, const prange &rh) const final override
    { update_known_bitmask (r, POINTER_DIFF_EXPR, lh, rh); }
! };
! static const operator_pointer_diff op_pointer_diff;
  
  bool
  operator_pointer_diff::fold_range (irange &r, tree type,
diff -Nrcpad gcc-17-20260503/gcc/range-op.cc gcc-17-20260510/gcc/range-op.cc
*** gcc-17-20260503/gcc/range-op.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/range-op.cc	Sun May 10 22:32:07 2026
*************** along with GCC; see the file COPYING3.
*** 51,81 ****
  
  // Instantiate the operators which apply to multiple types here.
  
! operator_equal op_equal;
! operator_not_equal op_not_equal;
! operator_lt op_lt;
! operator_le op_le;
! operator_gt op_gt;
! operator_ge op_ge;
! operator_identity op_ident;
! operator_cst op_cst;
! operator_cast op_cast;
! operator_view op_view;
! operator_plus op_plus;
! operator_abs op_abs;
! operator_minus op_minus;
! operator_negate op_negate;
! operator_mult op_mult;
! operator_addr_expr op_addr;
! operator_bitwise_not op_bitwise_not;
! operator_bitwise_xor op_bitwise_xor;
! operator_bitwise_and op_bitwise_and;
! operator_bitwise_or op_bitwise_or;
! operator_min op_min;
! operator_max op_max;
  
! // Instantaite a range operator table.
! range_op_table operator_table;
  
  // Invoke the initialization routines for each class of range.
  
--- 51,81 ----
  
  // Instantiate the operators which apply to multiple types here.
  
! static const operator_equal op_equal;
! static const operator_not_equal op_not_equal;
! static const operator_lt op_lt;
! static const operator_le op_le;
! static const operator_gt op_gt;
! static const operator_ge op_ge;
! static const operator_identity op_ident;
! static const operator_cst op_cst;
! static const operator_cast op_cast;
! static const operator_view op_view;
! static const operator_plus op_plus;
! static const operator_abs op_abs;
! static const operator_minus op_minus;
! static const operator_negate op_negate;
! static const operator_mult op_mult;
! static const operator_addr_expr op_addr;
! static const operator_bitwise_not op_bitwise_not;
! static const operator_bitwise_xor op_bitwise_xor;
! static const operator_bitwise_and op_bitwise_and;
! static const operator_bitwise_or op_bitwise_or;
! static const operator_min op_min;
! static const operator_max op_max;
  
! // Instantiate a range operator table.
! static range_op_table operator_table;
  
  // Invoke the initialization routines for each class of range.
  
*************** range_op_handler::range_op_handler ()
*** 126,132 ****
    m_operator = &default_operator;
  }
  
! // Create a range_op_handler for CODE.  Use a default operatoer if CODE
  // does not have an entry.
  
  range_op_handler::range_op_handler (unsigned code)
--- 126,132 ----
    m_operator = &default_operator;
  }
  
! // Create a range_op_handler for CODE.  Use a default operator if CODE
  // does not have an entry.
  
  range_op_handler::range_op_handler (unsigned code)
*************** range_op_handler::operator bool () const
*** 144,158 ****
  }
  
  // Return a pointer to the range operator assocaited with this handler.
! // If it is a default operator, return NULL.
  // This is the equivalent of indexing the range table.
  
! range_operator *
  range_op_handler::range_op () const
  {
    if (m_operator != &default_operator)
      return m_operator;
!   return NULL;
  }
  
  // Create a dispatch pattern for value range discriminators LHS, OP1, and OP2.
--- 144,158 ----
  }
  
  // Return a pointer to the range operator assocaited with this handler.
! // If it is a default operator, return nullptr.
  // This is the equivalent of indexing the range table.
  
! const range_operator *
  range_op_handler::range_op () const
  {
    if (m_operator != &default_operator)
      return m_operator;
!   return nullptr;
  }
  
  // Create a dispatch pattern for value range discriminators LHS, OP1, and OP2.
*************** dispatch_trio (unsigned lhs, unsigned op
*** 171,188 ****
  // Reminder, single operand instructions use the LHS type for op2, even if
  // unused.  So FLOAT = INT would be RO_FIF.
  
! const unsigned RO_III =	dispatch_trio (VR_IRANGE, VR_IRANGE, VR_IRANGE);
! const unsigned RO_IFI = dispatch_trio (VR_IRANGE, VR_FRANGE, VR_IRANGE);
! const unsigned RO_IFF = dispatch_trio (VR_IRANGE, VR_FRANGE, VR_FRANGE);
! const unsigned RO_FFF = dispatch_trio (VR_FRANGE, VR_FRANGE, VR_FRANGE);
! const unsigned RO_FIF = dispatch_trio (VR_FRANGE, VR_IRANGE, VR_FRANGE);
! const unsigned RO_FII = dispatch_trio (VR_FRANGE, VR_IRANGE, VR_IRANGE);
! const unsigned RO_PPP = dispatch_trio (VR_PRANGE, VR_PRANGE, VR_PRANGE);
! const unsigned RO_PPI = dispatch_trio (VR_PRANGE, VR_PRANGE, VR_IRANGE);
! const unsigned RO_IPP = dispatch_trio (VR_IRANGE, VR_PRANGE, VR_PRANGE);
! const unsigned RO_IPI = dispatch_trio (VR_IRANGE, VR_PRANGE, VR_IRANGE);
! const unsigned RO_PIP = dispatch_trio (VR_PRANGE, VR_IRANGE, VR_PRANGE);
! const unsigned RO_PII = dispatch_trio (VR_PRANGE, VR_IRANGE, VR_IRANGE);
  
  // Return a dispatch value for parameter types LHS, OP1 and OP2.
  
--- 171,188 ----
  // Reminder, single operand instructions use the LHS type for op2, even if
  // unused.  So FLOAT = INT would be RO_FIF.
  
! static const unsigned RO_III = dispatch_trio (VR_IRANGE, VR_IRANGE, VR_IRANGE);
! static const unsigned RO_IFI = dispatch_trio (VR_IRANGE, VR_FRANGE, VR_IRANGE);
! static const unsigned RO_IFF = dispatch_trio (VR_IRANGE, VR_FRANGE, VR_FRANGE);
! static const unsigned RO_FFF = dispatch_trio (VR_FRANGE, VR_FRANGE, VR_FRANGE);
! static const unsigned RO_FIF = dispatch_trio (VR_FRANGE, VR_IRANGE, VR_FRANGE);
! static const unsigned RO_FII = dispatch_trio (VR_FRANGE, VR_IRANGE, VR_IRANGE);
! static const unsigned RO_PPP = dispatch_trio (VR_PRANGE, VR_PRANGE, VR_PRANGE);
! static const unsigned RO_PPI = dispatch_trio (VR_PRANGE, VR_PRANGE, VR_IRANGE);
! static const unsigned RO_IPP = dispatch_trio (VR_IRANGE, VR_PRANGE, VR_PRANGE);
! static const unsigned RO_IPI = dispatch_trio (VR_IRANGE, VR_PRANGE, VR_IRANGE);
! static const unsigned RO_PIP = dispatch_trio (VR_PRANGE, VR_IRANGE, VR_PRANGE);
! static const unsigned RO_PII = dispatch_trio (VR_PRANGE, VR_IRANGE, VR_IRANGE);
  
  // Return a dispatch value for parameter types LHS, OP1 and OP2.
  
*************** protected:
*** 2497,2506 ****
    tree_code m_code;
  };
  
! static operator_div op_trunc_div (TRUNC_DIV_EXPR);
! static operator_div op_floor_div (FLOOR_DIV_EXPR);
! static operator_div op_round_div (ROUND_DIV_EXPR);
! static operator_div op_ceil_div (CEIL_DIV_EXPR);
  
  // Set OP2 to non-zero if the LHS isn't UNDEFINED.
  bool
--- 2497,2506 ----
    tree_code m_code;
  };
  
! static const operator_div op_trunc_div (TRUNC_DIV_EXPR);
! static const operator_div op_floor_div (FLOOR_DIV_EXPR);
! static const operator_div op_round_div (ROUND_DIV_EXPR);
! static const operator_div op_ceil_div (CEIL_DIV_EXPR);
  
  // Set OP2 to non-zero if the LHS isn't UNDEFINED.
  bool
diff -Nrcpad gcc-17-20260503/gcc/range-op.h gcc-17-20260510/gcc/range-op.h
*** gcc-17-20260503/gcc/range-op.h	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/range-op.h	Sun May 10 22:32:07 2026
*************** public:
*** 304,310 ****
    range_op_handler ();
    range_op_handler (unsigned);
    operator bool () const;
!   range_operator *range_op () const;
  
    bool fold_range (vrange &r, tree type,
  		   const vrange &lh,
--- 304,310 ----
    range_op_handler ();
    range_op_handler (unsigned);
    operator bool () const;
!   const range_operator *range_op () const;
  
    bool fold_range (vrange &r, tree type,
  		   const vrange &lh,
*************** protected:
*** 338,344 ****
    void discriminator_fail (const vrange &,
  			   const vrange &,
  			   const vrange &) const;
!   range_operator *m_operator;
  };
  
  // Cast the range in R to TYPE if R supports TYPE.
--- 338,344 ----
    void discriminator_fail (const vrange &,
  			   const vrange &,
  			   const vrange &) const;
!   const range_operator *m_operator;
  };
  
  // Cast the range in R to TYPE if R supports TYPE.
*************** range_cast (value_range &r, tree type)
*** 370,376 ****
    varying.set_varying (type);
  
    // Ensure we are in the correct mode for the call to fold.
!   r.set_type (type);
  
    // Call op_convert, if it fails, the result is varying.
    if (!range_op_handler (CONVERT_EXPR).fold_range (r, type, tmp, varying))
--- 370,376 ----
    varying.set_varying (type);
  
    // Ensure we are in the correct mode for the call to fold.
!   r.set_range_class (type);
  
    // Call op_convert, if it fails, the result is varying.
    if (!range_op_handler (CONVERT_EXPR).fold_range (r, type, tmp, varying))
*************** class range_op_table
*** 404,422 ****
  {
  public:
    range_op_table ();
!   inline range_operator *operator[] (unsigned code)
      {
        gcc_checking_assert (code < RANGE_OP_TABLE_SIZE);
        return m_range_tree[code];
      }
  protected:
!   inline void set (unsigned code, range_operator &op)
      {
        gcc_checking_assert (code < RANGE_OP_TABLE_SIZE);
        gcc_checking_assert (m_range_tree[code] == NULL);
        m_range_tree[code] = &op;
      }
!   range_operator *m_range_tree[RANGE_OP_TABLE_SIZE];
    void initialize_integral_ops ();
    void initialize_pointer_ops ();
    void initialize_float_ops ();
--- 404,422 ----
  {
  public:
    range_op_table ();
!   inline const range_operator *operator[] (unsigned code) const
      {
        gcc_checking_assert (code < RANGE_OP_TABLE_SIZE);
        return m_range_tree[code];
      }
  protected:
!   inline void set (unsigned code, const range_operator &op)
      {
        gcc_checking_assert (code < RANGE_OP_TABLE_SIZE);
        gcc_checking_assert (m_range_tree[code] == NULL);
        m_range_tree[code] = &op;
      }
!   const range_operator *m_range_tree[RANGE_OP_TABLE_SIZE];
    void initialize_integral_ops ();
    void initialize_pointer_ops ();
    void initialize_float_ops ();
diff -Nrcpad gcc-17-20260503/gcc/recog.cc gcc-17-20260510/gcc/recog.cc
*** gcc-17-20260503/gcc/recog.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/recog.cc	Sun May 10 22:32:07 2026
*************** bool raw_constraint_p;
*** 96,101 ****
--- 96,103 ----
  
  int reload_completed;
  
+ bool post_ra_split_completed;
+ 
  /* Nonzero after thread_prologue_and_epilogue_insns has run.  */
  int epilogue_completed;
  
*************** split_insn (rtx_insn *insn)
*** 3525,3530 ****
--- 3527,3534 ----
       splitters instead of computing the proper hard register.  */
    if (reload_completed && first != last)
      {
+       auto old_post_ra_split_completed = post_ra_split_completed;
+       post_ra_split_completed = true;
        first = NEXT_INSN (first);
        for (;;)
  	{
*************** split_insn (rtx_insn *insn)
*** 3534,3539 ****
--- 3538,3544 ----
  	    break;
  	  first = NEXT_INSN (first);
  	}
+       post_ra_split_completed = old_post_ra_split_completed;
      }
  
    return last;
*************** split_all_insns (void)
*** 3609,3614 ****
--- 3614,3622 ----
  	}
      }
  
+   if (reload_completed)
+     post_ra_split_completed = true;
+ 
    default_rtl_profile ();
    if (changed)
      {
*************** split_all_insns_noflow (void)
*** 3658,3663 ****
--- 3666,3674 ----
  	    split_insn (insn);
  	}
      }
+ 
+   if (reload_completed)
+     post_ra_split_completed = true;
  }
  
  struct peep2_insn_data
diff -Nrcpad gcc-17-20260503/gcc/regenerate-opt-urls.py gcc-17-20260510/gcc/regenerate-opt-urls.py
*** gcc-17-20260503/gcc/regenerate-opt-urls.py	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/regenerate-opt-urls.py	Sun May 10 22:32:07 2026
*************** TARGET_SPECIFIC_PAGES = {
*** 245,251 ****
      'gcc/HPPA-Options.html' : 'gcc/config/pa/',
      'gcc/IA-64-Options.html' : 'gcc/config/ia64/',
      'gcc/LoongArch-Options.html' : 'gcc/config/loongarch/',
-     'gcc/M32C-Options.html' : 'gcc/config/m32c/',
      'gcc/M32R_002fD-Options.html' : 'gcc/config/m32r/',
      'gcc/M680x0-Options.html' : 'gcc/config/m68k/',
      'gcc/MCore-Options.html' : 'gcc/config/mcore/',
--- 245,250 ----
diff -Nrcpad gcc-17-20260503/gcc/rtl.h gcc-17-20260510/gcc/rtl.h
*** gcc-17-20260503/gcc/rtl.h	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/rtl.h	Sun May 10 22:32:07 2026
*************** extern int reload_completed;
*** 4170,4175 ****
--- 4170,4234 ----
  /* Nonzero after thread_prologue_and_epilogue_insns has run.  */
  extern int epilogue_completed;
  
+ /* Set to true once the first split pass after register allocation has
+    been run.  Ports can treat that split pass as a "lowering" pass,
+    with some instructions only being valid before the lowering
+    and others only being valid after the lowering.
+ 
+    One use of this variable is to cope with address calculations during
+    register allocation.  The register allocator needs to be able to perform
+    address arithmetic (such as addition) at arbitrary points in the program,
+    regardless of whether the condition-code flags are live at that point.
+    If a target cannot add without clobbering the condition-code flags,
+    it must either (1) hide the condition-code flags entirely from RTL
+    or (2) ensure that the condition-code flags are never live before
+    or during register allocation.
+ 
+    (2) requires a boundary between "the condition-code flags are never live"
+    and "the condition-code flags might be live".  reload_completed can be
+    used for this purpose, provided that all clobbers of the CC register
+    are explicit before and during register allocation.
+ 
+    However, if the condition-code flags are never live before or during
+    register allocation, there is no real need for patterns to have an explicit
+    clobber of the flags at that point.  Not having a clobber would allow more
+    recog attempts to succeed, both before and during register allocation.
+ 
+    post_ra_split_completed is an alternative boundary to reload_completed.
+    It allows sets and uses of the condition-code flags, such as individual
+    comparison and jump instructions, to be introduced in the first split pass
+    after register allocation, while also allowing new implicit clobbers of
+    the condition-code flags to be introduced at any time before that point.
+ 
+    Ports that use post_ra_split_completed for this purpose would have an
+    "unlowered" form with the following properties:
+ 
+    (a) The condition-code flags are never live between instructions.
+        (That is, they are never defined by one instruction and used
+        by another instruction.)
+ 
+    (b) As a consequence, new clobbers of the condition-code flags
+        can be introduced at any time.
+ 
+    (c) RTL instruction patterns (such as addition) can omit clobbers of the
+        condition-code flags even if the flags are in fact clobbered.
+ 
+    In contrast, the "lowered" form would have these properties:
+ 
+    (d) The condition-code flags can be live between instructions.
+        That is, RTL instruction patterns can set the condition-code flags
+        or use the condition-code flags.
+ 
+    (e) All clobbers of the condition-code flags must be explicit in the RTL
+        instruction patterns.
+ 
+    Instructions covered by (c) would require !post_ra_split_completed
+    and would need to be split into instructions that satisfy (d) or (e).
+    Instructions covered by (d) would require post_ra_split_completed,
+    so that they are not accidentally matched before lowering has taken
+    place.  */
+ extern bool post_ra_split_completed;
+ 
  /* Set to 1 while reload_as_needed is operating.
     Required by some machines to handle any generated moves differently.  */
  
diff -Nrcpad gcc-17-20260503/gcc/rtlanal.cc gcc-17-20260510/gcc/rtlanal.cc
*** gcc-17-20260503/gcc/rtlanal.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/rtlanal.cc	Sun May 10 22:32:07 2026
*************** commutative_operand_precedence (rtx op)
*** 3829,3834 ****
--- 3829,3841 ----
        /* If only one operand is a binary expression, it will be the first
           operand.  In particular,  (plus (minus (reg) (reg)) (neg (reg)))
           is canonical, although it will usually be further simplified.  */
+       return 3;
+ 
+     case RTX_COMM_COMPARE:
+     case RTX_COMPARE:
+       /* Give comparisons a cost between the unary expressions below
+ 	 and the other binary expressions above, so that we don't have
+ 	 a situation where the canonical order is binary, unary, binary.  */
        return 2;
  
      case RTX_UNARY:
diff -Nrcpad gcc-17-20260503/gcc/sel-sched-ir.cc gcc-17-20260510/gcc/sel-sched-ir.cc
*** gcc-17-20260503/gcc/sel-sched-ir.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/sel-sched-ir.cc	Sun May 10 22:32:07 2026
*************** static vec<loop_p> loop_nests;
*** 70,76 ****
  static sbitmap bbs_in_loop_rgns = NULL;
  
  /* CFG hooks that are saved before changing create_basic_block hook.  */
! static struct cfg_hooks orig_cfg_hooks;
  
  
  /* Array containing reverse topological index of function basic blocks,
--- 70,76 ----
  static sbitmap bbs_in_loop_rgns = NULL;
  
  /* CFG hooks that are saved before changing create_basic_block hook.  */
! static const struct cfg_hooks *orig_cfg_hooks;
  
  
  /* Array containing reverse topological index of function basic blocks,
*************** sel_create_basic_block (void *headp, voi
*** 5359,5365 ****
    new_bb_note = get_bb_note_from_pool ();
  
    if (new_bb_note == NULL_RTX)
!     new_bb = orig_cfg_hooks.create_basic_block (headp, endp, after);
    else
      {
        new_bb = create_basic_block_structure ((rtx_insn *) headp,
--- 5359,5365 ----
    new_bb_note = get_bb_note_from_pool ();
  
    if (new_bb_note == NULL_RTX)
!     new_bb = orig_cfg_hooks->create_basic_block (headp, endp, after);
    else
      {
        new_bb = create_basic_block_structure ((rtx_insn *) headp,
*************** sel_register_cfg_hooks (void)
*** 5709,5719 ****
    sched_split_block = sel_split_block;
  
    orig_cfg_hooks = get_cfg_hooks ();
!   sel_cfg_hooks = orig_cfg_hooks;
  
    sel_cfg_hooks.create_basic_block = sel_create_basic_block;
  
!   set_cfg_hooks (sel_cfg_hooks);
  
    sched_init_only_bb = sel_init_only_bb;
    sched_split_block = sel_split_block;
--- 5709,5719 ----
    sched_split_block = sel_split_block;
  
    orig_cfg_hooks = get_cfg_hooks ();
!   sel_cfg_hooks = *orig_cfg_hooks;
  
    sel_cfg_hooks.create_basic_block = sel_create_basic_block;
  
!   set_cfg_hooks (&sel_cfg_hooks);
  
    sched_init_only_bb = sel_init_only_bb;
    sched_split_block = sel_split_block;
diff -Nrcpad gcc-17-20260503/gcc/shortest-paths.h gcc-17-20260510/gcc/shortest-paths.h
*** gcc-17-20260503/gcc/shortest-paths.h	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/shortest-paths.h	Sun May 10 22:32:07 2026
*************** get_shortest_path (const node_t *other_n
*** 187,193 ****
  
    while (m_best_edge[other_node->m_index])
      {
!       result.m_edges.safe_push (m_best_edge[other_node->m_index]);
        if (m_sense == SPS_FROM_GIVEN_ORIGIN)
  	other_node = m_best_edge[other_node->m_index]->m_src;
        else
--- 187,193 ----
  
    while (m_best_edge[other_node->m_index])
      {
!       result.append_edge (m_best_edge[other_node->m_index]);
        if (m_sense == SPS_FROM_GIVEN_ORIGIN)
  	other_node = m_best_edge[other_node->m_index]->m_src;
        else
*************** get_shortest_path (const node_t *other_n
*** 195,201 ****
      }
  
    if (m_sense == SPS_FROM_GIVEN_ORIGIN)
!     result.m_edges.reverse ();
  
    return result;
  }
--- 195,201 ----
      }
  
    if (m_sense == SPS_FROM_GIVEN_ORIGIN)
!     result.reverse ();
  
    return result;
  }
diff -Nrcpad gcc-17-20260503/gcc/simplify-rtx.cc gcc-17-20260510/gcc/simplify-rtx.cc
*** gcc-17-20260503/gcc/simplify-rtx.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/simplify-rtx.cc	Sun May 10 22:32:07 2026
*************** simplify_context::simplify_binary_operat
*** 3854,3868 ****
  	  && (INTVAL (XEXP (op0, 1))
  	      == ~INTVAL (XEXP (op1, 1))))
  	{
! 	  /* The IOR may be on both sides.  */
  	  rtx top0 = NULL_RTX, top1 = NULL_RTX;
! 	  if (GET_CODE (XEXP (op1, 0)) == IOR)
  	    top0 = op0, top1 = op1;
! 	  else if (GET_CODE (XEXP (op0, 0)) == IOR)
  	    top0 = op1, top1 = op0;
  	  if (top0 && top1)
  	    {
! 	      /* X may be on either side of the inner IOR.  */
  	      rtx tem = NULL_RTX;
  	      if (rtx_equal_p (XEXP (top0, 0),
  			       XEXP (XEXP (top1, 0), 0)))
--- 3854,3870 ----
  	  && (INTVAL (XEXP (op0, 1))
  	      == ~INTVAL (XEXP (op1, 1))))
  	{
! 	  /* The IOR/XOR may be on both sides.  */
  	  rtx top0 = NULL_RTX, top1 = NULL_RTX;
! 	  if (GET_CODE (XEXP (op1, 0)) == IOR
! 	      || GET_CODE (XEXP (op1, 0)) == XOR)
  	    top0 = op0, top1 = op1;
! 	  else if (GET_CODE (XEXP (op0, 0)) == IOR
! 		   || GET_CODE (XEXP (op0, 0)) == XOR)
  	    top0 = op1, top1 = op0;
  	  if (top0 && top1)
  	    {
! 	      /* X may be on either side of the inner IOR/XOR.  */
  	      rtx tem = NULL_RTX;
  	      if (rtx_equal_p (XEXP (top0, 0),
  			       XEXP (XEXP (top1, 0), 0)))
*************** simplify_context::simplify_binary_operat
*** 3871,3877 ****
  				    XEXP (XEXP (top1, 0), 1)))
  		tem = XEXP (XEXP (top1, 0), 0);
  	      if (tem)
! 		return simplify_gen_binary (IOR, mode, XEXP (top0, 0),
  					    simplify_gen_binary
  					      (AND, mode, tem, XEXP (top1, 1)));
  	    }
--- 3873,3880 ----
  				    XEXP (XEXP (top1, 0), 1)))
  		tem = XEXP (XEXP (top1, 0), 0);
  	      if (tem)
! 		return simplify_gen_binary (GET_CODE (XEXP (top1, 0)),
! 					    mode, XEXP (top0, 0),
  					    simplify_gen_binary
  					      (AND, mode, tem, XEXP (top1, 1)));
  	    }
*************** simplify_context::simplify_relational_op
*** 6665,6670 ****
--- 6668,6682 ----
        return simplify_gen_relational (code, mode, cmp_mode, x, tem);
      }
  
+   /* (eq/ne (plus (x) (y)) y) simplifies to (eq/ne x 0).  */
+   if ((code == EQ || code == NE)
+       && op0code == PLUS
+       && rtx_equal_p (XEXP (op0, 1), op1)
+       && !side_effects_p (op1)
+       && (INTEGRAL_MODE_P (cmp_mode) || flag_unsafe_math_optimizations))
+     return simplify_gen_relational (code, mode, cmp_mode,
+ 				    XEXP (op0, 0), CONST0_RTX (cmp_mode));
+ 
    /* (ne:SI (zero_extract:SI FOO (const_int 1) BAR) (const_int 0))) is
       the same as (zero_extract:SI FOO (const_int 1) BAR).  */
    scalar_int_mode int_mode, int_cmp_mode;
diff -Nrcpad gcc-17-20260503/gcc/target.def gcc-17-20260510/gcc/target.def
*** gcc-17-20260503/gcc/target.def	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/target.def	Sun May 10 22:32:07 2026
*************** The default version of this hook creates
*** 4654,4659 ****
--- 4654,4670 ----
   tree, (void),
   default_stack_protect_guard)
  
+ /* Return true if the user provided stack protection guard definition of
+    __stack_chk_guard is used.  */
+ DEFHOOK
+ (stack_protect_guard_symbol_p,
+  "Usually, the compiler uses an external variable @samp{__stack_chk_guard}\n\
+ defined in @file{libgcc2.c} as the stack protection guard symbol.  Define\n\
+ this hook to return true if a user provided definition of\n\
+ @samp{__stack_chk_guard} with the @code{uintptr_t} type is used.",
+  bool, (void),
+  hook_bool_void_false)
+ 
  /* This target hook allows the operating system to override the CALL_EXPR
     that is invoked when a check vs the guard variable fails.  */
  DEFHOOK
diff -Nrcpad gcc-17-20260503/gcc/targhooks.cc gcc-17-20260510/gcc/targhooks.cc
*** gcc-17-20260503/gcc/targhooks.cc	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/targhooks.cc	Sun May 10 22:32:07 2026
*************** default_stack_protect_guard (void)
*** 941,949 ****
      {
        rtx x;
  
        t = build_decl (UNKNOWN_LOCATION,
! 		      VAR_DECL, get_identifier ("__stack_chk_guard"),
! 		      ptr_type_node);
        TREE_STATIC (t) = 1;
        TREE_PUBLIC (t) = 1;
        DECL_EXTERNAL (t) = 1;
--- 941,952 ----
      {
        rtx x;
  
+       if (targetm.stack_protect_guard_symbol_p ())
+ 	t = lang_hooks.types.type_for_mode (ptr_mode, 1);
+       else
+ 	t = ptr_type_node;
        t = build_decl (UNKNOWN_LOCATION,
! 		      VAR_DECL, get_identifier ("__stack_chk_guard"), t);
        TREE_STATIC (t) = 1;
        TREE_PUBLIC (t) = 1;
        DECL_EXTERNAL (t) = 1;
*************** default_stack_protect_guard (void)
*** 954,961 ****
  
        /* Do not share RTL as the declaration is visible outside of
  	 current function.  */
!       x = DECL_RTL (t);
!       RTX_FLAG (x, used) = 1;
  
        stack_chk_guard_decl = t;
      }
--- 957,970 ----
  
        /* Do not share RTL as the declaration is visible outside of
  	 current function.  */
!       if (mode_mem_attrs[(int) DECL_MODE (t)])
! 	{
! 	  /* NB: Don't call make_decl_rtl when mode_mem_attrs isn't
! 	     initialized.  -save-temps won't initialize mode_mem_attrs
! 	     and make_decl_rtl will fail.  */
! 	  x = DECL_RTL (t);
! 	  RTX_FLAG (x, used) = 1;
! 	}
  
        stack_chk_guard_decl = t;
      }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/ChangeLog gcc-17-20260510/gcc/testsuite/ChangeLog
*** gcc-17-20260503/gcc/testsuite/ChangeLog	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/testsuite/ChangeLog	Sun May 10 22:32:07 2026
***************
*** 1,3 ****
--- 1,502 ----
+ 2026-05-09  Michiel Derhaeg  <Michiel.Derhaeg@synopsys.com>
+ 
+ 	PR target/125217
+ 	* gcc.target/riscv/ssp-zcmp.c: New test.
+ 
+ 2026-05-09  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/125245
+ 	* gcc.target/i386/pr125245.c: New test.
+ 
+ 2026-05-09  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/125239
+ 	* gcc.target/i386/pr124407-1.c: Adjusted.
+ 	* gcc.target/i386/pr125239.c: New test.
+ 
+ 2026-05-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/125234
+ 	* gcc.dg/torture/pr125234-1.c: New test.
+ 
+ 2026-05-08  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/115181
+ 	PR c++/125043
+ 	PR c++/124979
+ 	* g++.dg/cpp1z/nontype-auto27.C: New test.
+ 	* g++.dg/cpp1z/nontype-auto28.C: New test.
+ 	* g++.dg/cpp2a/nontype-class75.C: New test.
+ 
+ 2026-05-08  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	PR middle-end/124637
+ 	* gcc.target/powerpc/pr124637.c: New test case.
+ 
+ 2026-05-08  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/119422
+ 	* gcc.dg/tree-ssa/pr119422.c: New test.
+ 	* gcc.dg/tree-ssa/pr119422-2.c: New test.
+ 
+ 2026-05-08  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR target/124955
+ 	* gcc.target/riscv/pr124955.c: New test
+ 
+ 2026-05-08  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/93504
+ 	* gcc.target/riscv/pr93504.c: New test.
+ 
+ 2026-05-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/111952
+ 	PR fortran/125059
+ 	* gfortran.dg/dtio_37.f90: New test.
+ 
+ 2026-05-08  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	* lib/lto.exp: Make file listing case sensitive by doing case
+ 	sensitive filter after directory listing.
+ 
+ 2026-05-08  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	* g++.dg/modules/modules.exp: Replace colon with dash on
+ 	Windows.
+ 
+ 2026-05-08  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	PR target/125049
+ 	* gcc.target/loongarch/pr125049.c: New test.
+ 
+ 2026-05-08  Xi Ruoyao  <xry111@xry111.site>
+ 
+ 	* gcc.dg/pr90838.c: Adjust expectation for LoongArch.
+ 
+ 2026-05-08  Vijay Shankar  <vijay@linux.ibm.com>
+ 
+ 	PR target/113353
+ 	* gcc.target/powerpc/vsx-vector-1.c: Fix testcase.
+ 	* gcc.target/powerpc/vsx-vector-2.c: Fix testcase.
+ 	* gcc.target/powerpc/vsx-vector-6-func-1op.c: Fix testcase.
+ 
+ 2026-05-08  Bohan Lei  <garthlei@linux.alibaba.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c:
+ 	Match vnsrl patterns.
+ 
+ 2026-05-08  Thomas Schwinge  <tschwinge@baylibre.com>
+ 
+ 	* gcc.dg/plugin/diagnostic-test-paths-4.py: Adjust.
+ 
+ 2026-05-08  Soumya AR  <soumyaa@nvidia.com>
+ 
+ 	PR target/124895
+ 	* gcc.target/aarch64/narrow-gp-writes-8.c: New test.
+ 
+ 2026-05-08  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/125100
+ 	* gcc.target/i386/pr125100-1.c: New test.
+ 	* gcc.target/i386/pr125100-2.c: Likewise.
+ 	* gcc.target/i386/pr125100-3.c: Likewise.
+ 	* gcc.target/i386/pr125100-4.c: Likewise.
+ 
+ 2026-05-07  Eikansh Gupta  <eikansh.gupta@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/109878
+ 	* gcc.dg/tree-ssa/pr109878-1.c: New test.
+ 	* gcc.dg/tree-ssa/pr109878-2.c: New test.
+ 	* gcc.dg/tree-ssa/pr109878-3.c: New test.
+ 	* gcc.dg/tree-ssa/pr109878.c: New test.
+ 
+ 2026-05-07  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/106244
+ 	* gcc.target/riscv/pr106244.c: New test.
+ 
+ 2026-05-07  Eikansh Gupta  <eikansh.gupta@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/123514
+ 	* gcc.dg/tree-ssa/pr123514.c: New test.
+ 
+ 2026-05-07  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/124770
+ 	* g++.dg/reflect/init18.C: New test.
+ 
+ 2026-05-07  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/125206
+ 	* g++.dg/reflect/bases_of4.C: New test.
+ 
+ 2026-05-07  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/125192
+ 	PR fortran/125198
+ 	* gfortran.dg/bounds_check_29.f90: New test.
+ 
+ 2026-05-07  Pengxuan Zheng  <pengxuan.zheng@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/125214
+ 	* gcc.dg/tree-ssa/pr125214.c: New test.
+ 
+ 2026-05-07  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	PR middle-end/122871
+ 	* gcc.target/arm/muldi-1.c: New test case.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125007
+ 	* g++.dg/reflect/pr125007.C: New test.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gcc.dg/analyzer/divide-by-zero-6.c (init_foo): Use sizeof (*f)
+ 	rather than sizeof (f).
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125184
+ 	* g++.dg/reflect/using3.C: New test.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/124347
+ 	* g++.dg/ext/builtin-object-size4.C: New test.
+ 	* g++.dg/ext/builtin-object-size5.C: New test.
+ 	* g++.dg/ext/builtin-object-size6.C: New test.
+ 
+ 2026-05-07  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/aes-builtin-1.c: New test.
+ 	* gcc.target/powerpc/aes-builtin-2.c: New test.
+ 	* gcc.target/powerpc/aes-builtin-3.c: New test.
+ 
+ 2026-05-07  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/125172
+ 	* gfortran.dg/associate_79.f90: New test.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125111
+ 	* g++.dg/reflect/extract12.C: New test.
+ 
+ 2026-05-07  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/124991
+ 	* g++.dg/reflect/anon5.C: New test.
+ 
+ 2026-05-07  Pan Li  <pan2.li@intel.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
+ 	for vmsgt.vx.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
+ 	helper macros.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
+ 	data for run test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i16.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i32.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i64.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i8.c: New test.
+ 
+ 2026-05-07  Pengxuan Zheng  <pengxuan.zheng@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/116008
+ 	PR tree-optimization/124560
+ 	* gcc.dg/tree-ssa/pr124560.c: New test.
+ 
+ 2026-05-06  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR libfortran/125095
+ 	* gfortran.dg/namelist_102.f90: New test.
+ 
+ 2026-05-06  Martin Uecker  <uecker@tugraz.at>
+ 
+ 	PR c/124985
+ 	* gcc.dg/Wreturn-nested-3.c: New test.
+ 	* gcc.dg/pr124985.c: New test.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* gcc.dg/analyzer/divide-by-zero-4.c: Drop option.
+ 	-fno-analyzer-state-merge.
+ 	* gcc.dg/analyzer/divide-by-zero-5.c: Likewise.
+ 	* gcc.dg/analyzer/divide-by-zero-6.c: Likewise.
+ 
+ 2026-05-06  David Malcolm  <dmalcolm@redhat.com>
+ 
+ 	* c-c++-common/analyzer/divide-by-zero-1.c: Add expected message
+ 	for origin of zero value.
+ 	* c-c++-common/analyzer/divide-by-zero-2.c: New test.
+ 	* c-c++-common/analyzer/divide-by-zero-3.c: New test.
+ 	* c-c++-common/analyzer/invalid-shift-1.c: Add expected messages
+ 	about call to op3 and about pertinent param of op3.
+ 	* c-c++-common/analyzer/invalid-shift-2.c: New test.
+ 	* c-c++-common/analyzer/invalid-shift-3.c: New test.
+ 	* c-c++-common/analyzer/invalid-shift-4.c: New test.
+ 	* g++.dg/analyzer/divide-by-zero-7.C: New test.
+ 	* gcc.dg/analyzer/divide-by-zero-4.c: New test.
+ 	* gcc.dg/analyzer/divide-by-zero-5.c: New test.
+ 	* gcc.dg/analyzer/divide-by-zero-6.c: New test.
+ 	* gcc.dg/analyzer/divide-by-zero-float.c: Add expected message
+ 	for origin of zero value.
+ 
+ 2026-05-06  Zhongyao Chen  <chenzhongyao.hit@gmail.com>
+ 
+ 	PR target/122558
+ 	* gcc.target/riscv/rvv/autovec/pr122558.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c: Update expected
+ 	dump counts after VLA LMUL cost scaling.
+ 	* gcc.target/riscv/rvv/autovec/dyn-lmul-conv-2.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/partial/slp-16.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/partial/slp-5.c: Likewise.
+ 	* gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c: Likewise.
+ 
+ 2026-05-06  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	PR target/125057
+ 	* gcc.target/loongarch/vector/lasx/pr125057.c: New test.
+ 	* gcc.target/loongarch/vector/lsx/lsx-mov-2.c: New test.
+ 
+ 2026-05-06  Robin Dapp  <rdapp@oss.qualcomm.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c: Disable
+ 	instruction scheduling.
+ 	* gcc.target/riscv/rvv/base/vle-vl1r.c: New test.
+ 
+ 2026-05-05  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/125089
+ 	* gdc.dg/pr125089.d: New test.
+ 
+ 2026-05-05  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR target/120587
+ 	PR target/125155
+ 	* gcc.target/or1k/pr125155.c: New test.
+ 
+ 2026-05-05  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	* gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Update expected output.
+ 
+ 2026-05-05  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/124957
+ 	* g++.dg/modules/attrib-6_a.C: New test.
+ 	* g++.dg/modules/attrib-6_b.C: New test.
+ 	* g++.dg/modules/attrib-6_c.C: New test.
+ 
+ 2026-05-05  wangzicong  <wangzicong@masscore.cn>
+ 
+ 	* gcc.target/riscv/rvv/autovec/pr124448.c: New test.
+ 
+ 2026-05-05  Gaius Mulley  <gaiusmod2@gmail.com>
+ 
+ 	PR modula2/120189
+ 	* gm2/examples/cppcallingm2/run/pass/README: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/a.def: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/a.mod: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/b.def: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/b.mod: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/c.def: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/c.mod: New test.
+ 	* gm2/examples/cppcallingm2/run/pass/test.cc: New test.
+ 
+ 2026-05-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/125185
+ 	* gcc.dg/torture/pr125185.c: New testcase.
+ 
+ 2026-05-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/122569
+ 	* gcc.dg/tree-ssa/pr122569-1.c: Only require __builtin_ctz/.CTZ
+ 	on ctzll 64-bit targets.
+ 	* gcc.dg/tree-ssa/pr122569-2.c: Only require __builtin_clz/.CLZ
+ 	on clzll 64-bit targets.
+ 
+ 2026-05-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/125180
+ 	* gcc.target/i386/pr125180.c: New test.
+ 
+ 2026-05-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/125124
+ 	* gcc.dg/torture/pr125124.c: New testcase.
+ 
+ 2026-05-05  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	* gcc.target/i386/shift-gf2p8affine-2.c (do_test): New function.
+ 	Extracted from main.
+ 	(main): Drop __builtin_cpu_init.  Call do_test only if
+ 	__builtin_cpu_supports ("gfni") returns true.
+ 
+ 2026-05-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR c++/65271
+ 	* g++.dg/cpp0x/rv-decl1.C: New test.
+ 
+ 2026-05-04  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR c/121911
+ 	* g++.target/i386/ssp-global-1.C: New test.
+ 	* g++.target/i386/ssp-global-2.C: Likewise.
+ 	* g++.target/i386/ssp-global-3.C: Likewise.
+ 	* g++.target/i386/ssp-global-hidden-1.C: Likewise.
+ 	* g++.target/i386/ssp-global-hidden-2.C: Likewise.
+ 	* g++.target/i386/ssp-global-hidden-3.C: Likewise.
+ 	* gcc.target/i386/ssp-global-2.c: Likewise.
+ 	* gcc.target/i386/ssp-global-3.c: Likewise.
+ 	* gcc.target/i386/ssp-global-4.c: Likewise.
+ 	* gcc.target/i386/ssp-global-hidden-1.c: Likewise.
+ 	* gcc.target/i386/ssp-global-hidden-2.c: Likewise.
+ 	* gcc.target/i386/ssp-global-hidden-3.c: Likewise.
+ 	* gcc.target/i386/ssp-global.c: Include <stdint.h>.
+ 	(__stack_chk_guard): Change its type to uintptr_t.
+ 
+ 2026-05-04  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* gcc.c-torture/compile/20000804-1.c: Remove references to m32c.
+ 	* gcc.c-torture/compile/20001226-1.c: Likewise.
+ 	* gcc.c-torture/compile/limits-stringlit.c: Likewise.
+ 	* gcc.c-torture/execute/20020404-1.c: Likewise.
+ 	* gcc.dg/20020312-2.c: Likewise.
+ 	* gcc.dg/max-1.c: Likewise.
+ 	* gcc.dg/torture/pr26565.c: Likewise.
+ 	* gcc.dg/tree-ssa/reassoc-32.c: Likewise.
+ 	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
+ 	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
+ 	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
+ 	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
+ 	* gcc.dg/utf-array-short-wchar.c: Likewise.
+ 	* gcc.dg/utf-array.c: Likewise.
+ 	* lib/target-supports.exp: Likewise.
+ 
+ 2026-05-04  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	* gcc.target/aarch64/sve/vec_perm_2.c: New test.
+ 	* gcc.target/aarch64/sve/vec_perm_3.c: Likewise.
+ 
+ 2026-05-04  yxj-github-437  <2457369732@qq.com>
+ 
+ 	* g++.dg/contracts/cpp26/basic.contract.eval.p8-3.C: New test.
+ 
+ 2026-05-04  chzn@mail.ustc.edu.cn  <chzn@mail.ustc.edu.cn>
+ 
+ 	PR c++/124241
+ 	* g++.dg/reflect/is_accessible2.C: Completed the TODO of the PR.
+ 
+ 2026-05-04  Artemiy Volkov  <artemiy.volkov@arm.com>
+ 
+ 	PR tree-optimization/122679
+ 	* gcc.dg/tree-ssa/forwprop-43.c: Remove the vect_int check.
+ 
+ 2026-05-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/116823
+ 	* g++.dg/tree-ssa/phiprop-2.C: New test.
+ 	* g++.dg/tree-ssa/phiprop-4.C: New test.
+ 	* g++.dg/tree-ssa/phiprop-5.C: New test.
+ 
+ 2026-05-04  Uros Bizjak  <ubizjak@gmail.com>
+ 
+ 	* gcc.target/i386/bt-8.c: New test.
+ 
+ 2026-05-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* gcc.target/i386/builtin-memmove-12.c: Skip for Darwin.
+ 	* gcc.target/i386/memcpy-pr120683-2.c: Likewise.
+ 	* gcc.target/i386/memcpy-pr120683-3.c: Likewise.
+ 	* gcc.target/i386/memcpy-pr120683-4.c: Likewise.
+ 	* gcc.target/i386/memcpy-pr120683-5.c: Likewise.
+ 	* gcc.target/i386/memcpy-pr120683-6.c: Likewise.
+ 	* gcc.target/i386/memcpy-pr120683-7.c: Likewise.
+ 	* gcc.target/i386/memset-pr120683-13.c: Likewise.
+ 	* gcc.target/i386/memset-pr120683-17.c: Likewise.
+ 	* gcc.target/i386/memset-pr120683-18.c: Likewise.
+ 	* gcc.target/i386/memset-pr120683-19.c: Likewise.
+ 	* gcc.target/i386/memset-pr120683-22.c: Likewise.
+ 	* gcc.target/i386/memset-pr120683-23.c: Likewise.
+ 	* gcc.target/i386/memset-pr70308-1b.c: Likewise.
+ 
+ 2026-05-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/123120
+ 	PR tree-optimization/116823
+ 	* gcc.dg/tree-ssa/phiprop-8.c: New test.
+ 	* gcc.dg/tree-ssa/phiprop-9.c: New test.
+ 	* gcc.dg/tree-ssa/phiprop-10.c: New test.
+ 	* gcc.dg/tree-ssa/phiprop-11.c: New test.
+ 	* gcc.dg/tree-ssa/phiprop-12.c: New test.
+ 	* g++.dg/tree-ssa/phiprop-3.C: New test.
+ 
+ 2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/125153
+ 	* gcc.dg/torture/pr125153.c: New testcase.
+ 
+ 2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	Revert:
+ 	2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/120003
+ 	* gcc.dg/tree-ssa/ssa-thread-23.c: New testcase.
+ 	* gcc.dg/tree-ssa/ssa-dom-thread-7.c: Adjust.
+ 
+ 2026-05-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/125156
+ 	* gcc.dg/torture/pr125156.c: New testcase.
+ 
+ 2026-05-04  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/future-1.c: New test.
+ 	* gcc.target/powerpc/future-2.c: Likewise.
+ 
+ 2026-05-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR rtl-optimization/124766
+ 	* gcc.target/riscv/pr124766.c: New test.
+ 
+ 2026-05-04  Avinal Kumar  <avinal.xlvii@gmail.com>
+ 
+ 	PR tree-optimization/116700
+ 	* gcc.dg/pr116700.c: New test.
+ 	* gcc.dg/tree-ssa/phi-opt-48.c: New test.
+ 
+ 2026-05-03  Philipp Tomsich  <philipp.tomsich@vrull.eu>
+ 
+ 	PR tree-optimization/122569
+ 	* gcc.dg/tree-ssa/pr122569-1.c: New test.
+ 	* gcc.dg/tree-ssa/pr122569-2.c: New test.
+ 
+ 2026-05-03  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR target/124009
+ 	* gcc.target/riscv/pr124009.c: New test.
+ 
+ 2026-05-03  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+ 
+ 	PR target/125152
+ 	* gcc.target/riscv/pr125152.c: New test.
+ 
  2026-05-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
  
  	* gcc.dg/tree-ssa/cselim-5.c: New test.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-1.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-1.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-1.c	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-1.c	Sun May 10 22:32:08 2026
***************
*** 3,9 ****
  static int __attribute__((noipa))
  return_zero (void)
  {
!   return 0;
  }
  
  void
--- 3,9 ----
  static int __attribute__((noipa))
  return_zero (void)
  {
!   return 0; /* { dg-message "value originates here" } */
  }
  
  void
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-2.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-2.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-2.c	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-additional-options "-fno-analyzer-state-merge" } */
+ 
+ extern int
+ get_value (void);
+ 
+ int
+ test (int flag)
+ {
+   int x = 42;
+   int y = 0; /* { dg-message "value originates here" } */
+   if (flag)
+     y = get_value ();
+   return x / y; /* { dg-warning "division by zero" } */
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-3.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-3.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/divide-by-zero-3.c	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,19 ----
+ /* { dg-additional-options "-fno-analyzer-state-merge" } */
+ 
+ extern int
+ get_value (void);
+ 
+ int
+ test (int flag, int flag_2, int flag_3)
+ {
+   int x = 42; /* { dg-bogus "value originates here" } */
+   int y = 10; /* { dg-bogus "value originates here" } */
+   int z = 0; /* { dg-message "value originates here" } */
+   if (flag)
+     y = get_value ();
+   if (flag_2)
+     z = get_value ();
+   if (flag_3)
+     y = z;
+   return x / y; /* { dg-warning "division by zero" } */
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-1.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-1.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-1.c	Sun May  3 22:32:07 2026
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-1.c	Sun May 10 22:32:08 2026
*************** f2 (void)
*** 27,34 ****
    f1 (_dl_hwcaps_subdirs_build_bitmask (33, 31));
  }
  
! static int __attribute__((noinline)) op3 (int op, int c) { return op << c; } /* { dg-message "shift by negative count \\('-1'\\)" } */
! int test_3 (void) { return op3 (1, -1); }
  
  static int __attribute__((noinline)) op4 (int op, int c) { return op << c; }
  int test_4 (void) { return op4 (1, 0); }
--- 27,36 ----
    f1 (_dl_hwcaps_subdirs_build_bitmask (33, 31));
  }
  
! static int __attribute__((noinline)) op3 (int op, int c) { return op << c; } /* { dg-message "55: entry to 'op3' with problematic value for 'c'" } */
! /* { dg-message "shift by negative count \\('-1'\\)" "" { target *-*-* } .-1 } */
! 
! int test_3 (void) { return op3 (1, -1); } /* { dg-message "passing problematic value from 'test_3' to 'op3' via parameter 2" } */
  
  static int __attribute__((noinline)) op4 (int op, int c) { return op << c; }
  int test_4 (void) { return op4 (1, 0); }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-2.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-2.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-2.c	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,11 ----
+ unsigned char
+ do_shift (unsigned char val, int bits) /* { dg-message "34: entry to 'do_shift' with problematic value for 'bits'" } */
+ {
+   return val << bits; /* { dg-warning "Wanalyzer-shift-count-overflow" } */
+ }
+ 
+ int
+ test (unsigned char ch)
+ {
+   return do_shift (ch, 1000); /* { dg-message "passing problematic value from 'test' to 'do_shift' via parameter 2" } */
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-3.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-3.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-3.c	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,12 ----
+ unsigned char
+ do_shift (unsigned char val, int bits) /* { dg-message "34: entry to 'do_shift' with problematic value from \\\(2\\\) for 'bits'" } */
+ {
+   return val << bits; /* { dg-warning "Wanalyzer-shift-count-overflow" } */
+ }
+ 
+ int
+ test (unsigned char ch)
+ {
+   int bits = 1000; /* { dg-message "\\\(2\\\) value originates here" } */
+   return do_shift (ch, bits); /* { dg-message "\\\(3\\\) passing problematic value from \\\(2\\\) from 'test' to 'do_shift' via parameter 2" } */
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-4.c gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-4.c
*** gcc-17-20260503/gcc/testsuite/c-c++-common/analyzer/invalid-shift-4.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/c-c++-common/analyzer/invalid-shift-4.c	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,12 ----
+ unsigned char
+ do_shift (unsigned char val, int bits) /* { dg-message "34: entry to 'do_shift' with problematic value from \\\(2\\\) for 'bits'" } */
+ {
+   return val << bits; /* { dg-warning "Wanalyzer-shift-count-negative" } */
+ }
+ 
+ int
+ test (unsigned char ch)
+ {
+   int bits = -1; /* { dg-message "\\\(2\\\) value originates here" } */
+   return do_shift (ch, bits); /* { dg-message "\\\(3\\\) passing problematic value from \\\(2\\\) from 'test' to 'do_shift' via parameter 2" } */
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/analyzer/divide-by-zero-7.C gcc-17-20260510/gcc/testsuite/g++.dg/analyzer/divide-by-zero-7.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/analyzer/divide-by-zero-7.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/analyzer/divide-by-zero-7.C	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-additional-options "-fno-analyzer-state-merge" } */
+ 
+ // TODO: we shouldn't need this:
+ /* { dg-additional-options "-fno-analyzer-state-purge" } */
+ 
+ struct foo
+ {
+   foo (int x_, int y_)
+   : x (x_), y (y_) // TODO: should show event here
+   {
+   }
+ 
+   int divide () const
+   {
+     return x / y; /* { dg-message "using zero value from '\\*this\\.foo::y'" } */
+     /* { dg-warning "division by zero" "" { target *-*-* } .-1 } */
+   }
+ 
+   int x;
+   int y;
+ };
+ 
+ int
+ test ()
+ {
+   foo f (5, 0); // TODO: should show "origin of zero" event here
+   return f.divide ();
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8-3.C gcc-17-20260510/gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8-3.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8-3.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/contracts/cpp26/basic.contract.eval.p8-3.C	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,15 ----
+ // basic.contract.eval/p8
+ // If a contract violation occurs in a context that is manifestly
+ // constant-evaluated ([expr.const]), and the evaluation semantic is a
+ // terminating semantic, the program is ill-formed.
+ // { dg-do compile { target c++23 } }
+ // { dg-additional-options "-fcontracts" }
+ 
+ consteval auto foo( auto x ) pre( false ) { return x; }
+ // { dg-error {contract predicate is false in constant expression} "" { target *-*-* } .-1 }
+ 
+ static_assert(foo( 42 ) == 42, "");
+ 
+ int main() {
+   foo( 42 ); // { dg-error {call to consteval function 'foo<int>\(42\)' is not a constant expression} }
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/cpp0x/rv-decl1.C gcc-17-20260510/gcc/testsuite/g++.dg/cpp0x/rv-decl1.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/cpp0x/rv-decl1.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/cpp0x/rv-decl1.C	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,7 ----
+ // PR c++/65271
+ // { dg-do compile { target c++11 } }
+ 
+ struct {} && m0 = {};
+ union  {} && m1 = {};
+ class  {} && m2 = {};
+ enum   {} && m3 = {};
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/cpp1z/nontype-auto27.C gcc-17-20260510/gcc/testsuite/g++.dg/cpp1z/nontype-auto27.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/cpp1z/nontype-auto27.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/cpp1z/nontype-auto27.C	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,5 ----
+ // PR c++/115181
+ // { dg-do compile { target c++17 } }
+ 
+ template <auto> struct S {};
+ __extension__ S<(int[]){1}> x;  // { dg-error "not a valid template argument" }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/cpp1z/nontype-auto28.C gcc-17-20260510/gcc/testsuite/g++.dg/cpp1z/nontype-auto28.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/cpp1z/nontype-auto28.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/cpp1z/nontype-auto28.C	Sun May 10 22:32:08 2026
***************
*** 0 ****
--- 1,14 ----
+ // PR c++/125043
+ // { dg-do compile { target c++17 } }
+ 
+ template <auto V>
+ struct wrapper {
+     static constexpr const auto& value = V;
+ };
+ 
+ template <int const& I>
+ auto f() -> void;
+ 
+ auto main() -> int {
+     f<wrapper<42>::value>();  // { dg-error "no matching function|not a valid template argument" }
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/cpp2a/nontype-class75.C gcc-17-20260510/gcc/testsuite/g++.dg/cpp2a/nontype-class75.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/cpp2a/nontype-class75.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/cpp2a/nontype-class75.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,34 ----
+ // PR c++/124979
+ // { dg-do compile { target c++20 } }
+ 
+ template<auto X, class = decltype(X)>
+ struct cw;
+ 
+ struct base {
+ 
+     template <class L>
+     friend constexpr auto operator &(L) noexcept
+         -> cw<(&L::value)> {
+         return {};
+     }
+ };
+ 
+ template<auto X, class>
+ struct cw : base {
+     static constexpr const auto& value = X;
+ };
+     template <auto L, auto R>
+     constexpr auto operator ->*(cw<L>, cw<R>) noexcept
+         -> cw<L ->* R> {
+         return {};
+     }
+ 
+ struct Divide { int value; };
+ auto cvalue = cw<&Divide::value>{};
+ constexpr const Divide &t = {42};
+ auto co = cw<Divide{42}>{};
+ auto co1 = cw<&t>{};  // { dg-error "not a valid template argument|is invalid" }
+ 
+ template<class> class TD;
+ template<int t> class TD<cw<t>>{};
+ TD<decltype((co1)->*cvalue)> _;	  // { dg-error "is invalid" }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/ext/builtin-object-size4.C gcc-17-20260510/gcc/testsuite/g++.dg/ext/builtin-object-size4.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/ext/builtin-object-size4.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/ext/builtin-object-size4.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,62 ----
+ // PR c++/124347
+ // { dg-do compile { target c++11 } }
+ 
+ using size_t = decltype (sizeof 0);
+ 
+ constexpr size_t
+ foo (void *p)
+ {
+   return __builtin_object_size (p, 0);
+ }
+ 
+ constexpr size_t
+ bar (void *p)
+ {
+   return __builtin_object_size (p, 1);
+ }
+ 
+ constexpr size_t
+ baz (void *p)
+ {
+   return __builtin_object_size (p, 2);
+ }
+ 
+ constexpr size_t
+ qux (void *p)
+ {
+   return __builtin_object_size (p, 3);
+ }
+ 
+ constexpr size_t
+ fred (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 0);
+ }
+ 
+ constexpr size_t
+ corge (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 1);
+ }
+ 
+ constexpr size_t
+ garply (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 2);
+ }
+ 
+ constexpr size_t
+ xyzzy (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 3);
+ }
+ 
+ struct S { char a; int b; char c[32]; } a[10];
+ static_assert (foo (&a[2].c[5]) == &a[9].a - &a[2].c[5] + sizeof (S), "");
+ static_assert (bar (&a[2].c[5]) == 32 - 5, "");
+ static_assert (baz (&a[2].c[5]) == &a[9].a - &a[2].c[5] + sizeof (S), "");
+ static_assert (qux (&a[2].c[5]) == 32 - 5, "");
+ static_assert (fred (&a[2].c[5]) == &a[9].a - &a[2].c[5] + sizeof (S), "");
+ static_assert (corge (&a[2].c[5]) == 32 - 5, "");
+ static_assert (garply (&a[2].c[5]) == &a[9].a - &a[2].c[5] + sizeof (S), "");
+ static_assert (xyzzy (&a[2].c[5]) == 32 - 5, "");
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/ext/builtin-object-size5.C gcc-17-20260510/gcc/testsuite/g++.dg/ext/builtin-object-size5.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/ext/builtin-object-size5.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/ext/builtin-object-size5.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,83 ----
+ // PR c++/124347
+ // { dg-do compile { target c++20 } }
+ 
+ using size_t = decltype (sizeof 0);
+ 
+ constexpr size_t
+ foo (void *p)
+ {
+   return __builtin_object_size (p, 0);
+ }
+ 
+ constexpr size_t
+ bar (void *p)
+ {
+   return __builtin_object_size (p, 1);
+ }
+ 
+ constexpr size_t
+ baz (void *p)
+ {
+   return __builtin_object_size (p, 2);
+ }
+ 
+ constexpr size_t
+ qux (void *p)
+ {
+   return __builtin_object_size (p, 3);
+ }
+ 
+ constexpr size_t
+ fred (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 0);
+ }
+ 
+ constexpr size_t
+ corge (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 1);
+ }
+ 
+ constexpr size_t
+ garply (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 2);
+ }
+ 
+ constexpr size_t
+ xyzzy (void *p)
+ {
+   return __builtin_dynamic_object_size (p, 3);
+ }
+ 
+ struct S { char a; int b; char c[32]; char d; };
+ 
+ constexpr bool
+ plugh ()
+ {
+   S *a = new S {};
+   if (foo (a) != sizeof (S)
+       || bar (a) != sizeof (S)
+       || baz (a) != sizeof (S)
+       || qux (a) != sizeof (S)
+       || fred (a) != sizeof (S)
+       || corge (a) != sizeof (S)
+       || garply (a) != sizeof (S)
+       || xyzzy (a) != sizeof (S))
+     return false;
+   char *b = &a->c[2];
+   if (foo (b) != sizeof (S) - (&a->c[2]- &a->a)
+       || bar (b) != 32 - 2 
+       || baz (b) != sizeof (S) - (&a->c[2]- &a->a)
+       || qux (b) != 32 - 2 
+       || fred (b) != sizeof (S) - (&a->c[2]- &a->a)
+       || corge (b) != 32 - 2 
+       || garply (b) != sizeof (S) - (&a->c[2]- &a->a)
+       || xyzzy (b) != 32 - 2)
+     return false;
+   delete a;
+   return true;
+ }
+ 
+ static_assert (plugh ());
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/ext/builtin-object-size6.C gcc-17-20260510/gcc/testsuite/g++.dg/ext/builtin-object-size6.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/ext/builtin-object-size6.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/ext/builtin-object-size6.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,40 ----
+ // PR c++/124347
+ // { dg-do compile { target c++20 } }
+ 
+ constexpr int
+ foo (const char *p)
+ {
+   return __builtin_dynamic_object_size (p, 0);
+ }
+ 
+ constexpr int
+ bar (int x)
+ {
+   char *a = new char[x];
+   int b = foo (a);
+   delete [] a;
+   return b;
+ }
+ 
+ constexpr int
+ baz (const char *p)
+ {
+   return __builtin_object_size (p, 1);
+ }
+ 
+ constexpr int
+ qux (int x)
+ {
+   char *a = new char[x];
+   int b = baz (a);
+   delete [] a;
+   return b;
+ }
+ 
+ static_assert (bar (42) == 42);
+ static_assert (qux (142) == 142);
+ constexpr char a[] = "foobar";
+ static_assert (foo (a) == 7);
+ static_assert (baz (a) == 7);
+ static_assert (foo ("foo") == 4);
+ static_assert (baz ("baz") == 4);
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/modules/attrib-6_a.C gcc-17-20260510/gcc/testsuite/g++.dg/modules/attrib-6_a.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/modules/attrib-6_a.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/modules/attrib-6_a.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,10 ----
+ // PR c++/124957
+ // { dg-do compile { target c++17 } }
+ // { dg-additional-options "-fmodules" }
+ 
+ export module mod:partition;
+ 
+ int dummy;
+ struct [[gnu::abi_tag("cxx11")]] A { int m; };
+ export inline int A::*x = &A::m;
+ // x does not get mangled in this TU => cxx11 abi_tag not propagated to x
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/modules/attrib-6_b.C gcc-17-20260510/gcc/testsuite/g++.dg/modules/attrib-6_b.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/modules/attrib-6_b.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/modules/attrib-6_b.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/124957
+ // { dg-do compile { target c++17 } }
+ // { dg-additional-options "-fmodules" }
+ 
+ export module mod; // { dg-module-cmi "mod" }
+ export import :partition;
+ 
+ // x gets mangled in this TU => cxx11 abi_tag propagated to x
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/modules/attrib-6_c.C gcc-17-20260510/gcc/testsuite/g++.dg/modules/attrib-6_c.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/modules/attrib-6_c.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/modules/attrib-6_c.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/124957
+ // { dg-do compile { target c++17 } }
+ // { dg-additional-options "-fmodules -fno-module-lazy" }
+ 
+ module mod;
+ import :partition;
+ 
+ // OK, no bogus abi_tag mismatch error for the imported x's
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/modules/modules.exp gcc-17-20260510/gcc/testsuite/g++.dg/modules/modules.exp
*** gcc-17-20260503/gcc/testsuite/g++.dg/modules/modules.exp	Sun May  3 22:32:08 2026
--- gcc-17-20260510/gcc/testsuite/g++.dg/modules/modules.exp	Sun May 10 22:32:09 2026
*************** proc host_header_path {hname} {
*** 83,89 ****
  
  # Return the pathname CMI munged like the compiler.
  proc munge_cmi {cmi} {
!     if { [string index $cmi 0] == "/" } {
  	set cmi [string range $cmi 1 end]
      } else {
  	set cmi ",/$cmi"
--- 83,92 ----
  
  # Return the pathname CMI munged like the compiler.
  proc munge_cmi {cmi} {
!     if { [string index $cmi 1] == ":" && [info exists ::env(OS)] && [string match "Windows*" $::env(OS)] } {
! 	# Windows paths like C:/some/path should be munged to C-/some/path
! 	set cmi [string replace $cmi 1 1 "-"]
!     } elseif { [string index $cmi 0] == "/" } {
  	set cmi [string range $cmi 1 end]
      } else {
  	set cmi ",/$cmi"
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/anon5.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/anon5.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/anon5.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/anon5.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/124991
+ // { dg-do run { target c++26 } }
+ // { dg-additional-options "-freflection" }
+ 
+ #include <meta>
+ 
+ struct X { union { char b; float c; }; };
+ constexpr auto ctx = std::meta::access_context::unchecked ();
+ 
+ int
+ main ()
+ {
+   if (typeid (typename [: parent_of (^^X::b) :])
+       != typeid (typename [: members_of (^^X, ctx)[0] :]))
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/bases_of4.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/bases_of4.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/bases_of4.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/bases_of4.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,45 ----
+ // PR c++/125206
+ // { dg-do compile { target c++26 } }
+ // { dg-additional-options "-freflection" }
+ 
+ #include <meta>
+ #include <type_traits>
+ 
+ template<auto...> struct mp_list_v
+ {
+ };
+ 
+ template<class...> struct mp_list
+ {
+ };
+ 
+ template<auto V> using mp_value = std::integral_constant<decltype(V), V>;
+ 
+ template<class L, template<class...> class B> struct mp_rename_impl;
+ 
+ template<template<class...> class L, class... T, template<class...> class B> struct mp_rename_impl<L<T...>, B>
+ {
+     using type = B<T...>;
+ };
+ 
+ template<template<auto...> class L, auto... A, template<class...> class B> struct mp_rename_impl<L<A...>, B>
+ {
+     using type = B<mp_value<A>...>;
+ };
+ 
+ template<class L, template<class...> class B> using mp_rename = typename mp_rename_impl<L, B>::type;
+ 
+ class X1
+ {
+ };
+ 
+ class Z: public X1
+ {
+ };
+ 
+ int main()
+ {
+     constexpr auto all = std::meta::access_context::unchecked();
+     constexpr auto L1 = ^^mp_list_v< bases_of(^^Z, all)[0] >;
+     using L2 = mp_rename<typename [: L1 :], mp_list>;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/extract12.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/extract12.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/extract12.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/extract12.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,14 ----
+ // PR c++/125111
+ // { dg-do compile { target c++26 } }
+ // { dg-additional-options "-freflection" }
+ 
+ #include <meta>
+ 
+ using A = void ();
+ extern A &a;
+ constexpr auto b = ^^a;
+ constexpr auto c = std::meta::extract <A &> (b);	// { dg-error "uncaught exception of type 'std::meta::exception'; 'what\\\(\\\)': 'value cannot be extracted'" }
+ using B = int [];
+ extern B &d;
+ constexpr auto e = ^^d;
+ constexpr auto f = std::meta::extract <B &> (e);	// { dg-error "uncaught exception of type 'std::meta::exception'; 'what\\\(\\\)': 'value cannot be extracted'" }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/init18.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/init18.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/init18.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/init18.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,14 ----
+ // PR c++/124770
+ // { dg-do compile { target c++26 } }
+ // { dg-additional-options "-freflection" }
+ 
+ using info = decltype(^^::);
+ 
+ constexpr inline info v{};
+ static_assert(v == info{});
+ extern constexpr inline info v2{};
+ static_assert(v2 == info{});
+ constexpr inline info v3;
+ static_assert(v3 == info{});
+ 
+ extern constexpr inline info v4; // { dg-error "not a definition|consteval-only" }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/is_accessible2.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/is_accessible2.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/is_accessible2.C	Sun May  3 22:32:08 2026
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/is_accessible2.C	Sun May 10 22:32:09 2026
*************** static_assert (is_accessible (N::ra, gct
*** 454,461 ****
  static_assert (!is_accessible (N::rb, gctx));
  static_assert (!is_accessible (N::rc, gctx));
  static_assert (is_accessible (N::ra, N::ctx));
! // TODO: This case ICEs.
! //static_assert (is_accessible (N::rb, N::ctx));
  static_assert (is_accessible (N::rc, N::ctx));
  static_assert (is_accessible (N::ra, N::ctx.via (^^N)));
  static_assert (is_accessible (N::rb, N::ctx.via (^^N)));
--- 454,460 ----
  static_assert (!is_accessible (N::rb, gctx));
  static_assert (!is_accessible (N::rc, gctx));
  static_assert (is_accessible (N::ra, N::ctx));
! static_assert (is_accessible (N::rb, N::ctx));
  static_assert (is_accessible (N::rc, N::ctx));
  static_assert (is_accessible (N::ra, N::ctx.via (^^N)));
  static_assert (is_accessible (N::rb, N::ctx.via (^^N)));
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/pr125007.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/pr125007.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/pr125007.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/pr125007.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,46 ----
+ // PR c++/125007
+ // { dg-do compile { target c++26 } }
+ // { dg-additional-options "-freflection" }
+ 
+ #include <meta>
+ 
+ [[=1]] void foo (int x, int y);
+ [[=2]] void foo (int x, int z);
+ 
+ struct A { int a; };
+ struct B { int b; };
+ struct C : public A, B {};
+ struct D : public A, B {};
+ 
+ constexpr auto ctx = std::meta::access_context::unchecked ();
+ static_assert (annotations_of (^^foo)[0] == annotations_of (^^foo)[1]);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(\\\^\\\^\\\[\\\[=1\\\]\\\] == \\\^\\\^\\\[\\\[=2\\\]\\\]\\\)'" "" { target *-*-* } .-1 }
+ static_assert (parameters_of (^^foo)[0] == parameters_of (^^foo)[1]);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(parameters_of\\\(\\\^\\\^foo\\\(int, int\\\)\\\)\\\[0\\\] \\\{aka x\\\} == parameters_of\\\(\\\^\\\^foo\\\(int, int\\\)\\\)\\\[1\\\]\\\)'" "" { target *-*-* } .-1 }
+ static_assert (bases_of (^^C, ctx)[0] == bases_of (^^C, ctx)[1]);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(bases_of\\\(\\\^\\\^C,std::meta::access_context::unchecked\\\(\\\)\\\)\\\[0\\\] \\\{aka A\\\} == bases_of\\\(\\\^\\\^C,std::meta::access_context::unchecked\\\(\\\)\\\)\\\[1\\\] \\\{aka B\\\}\\\)'" "" { target *-*-* } .-1 }
+ static_assert (bases_of (^^C, ctx)[1] == bases_of (^^D, ctx)[1]);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(bases_of\\\(\\\^\\\^C,std::meta::access_context::unchecked\\\(\\\)\\\)\\\[1\\\] \\\{aka B\\\} == bases_of\\\(\\\^\\\^D,std::meta::access_context::unchecked\\\(\\\)\\\)\\\[1\\\] \\\{aka B\\\}\\\)'" "" { target *-*-* } .-1 }
+ constexpr auto an1 = annotations_of (^^foo)[0];
+ constexpr auto an2 = annotations_of (^^foo)[1];
+ constexpr auto an3 = std::meta::reflect_constant (3);
+ static_assert (data_member_spec (^^int, { .name = "foo", .alignment = 64, .no_unique_address = true, .annotations = { an1, an2, an3 } }) == ^^::);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(data_member_spec\\\(\\\^\\\^int,\\\{.name=\\\"foo\\\",.alignment=64,.no_unique_address=true,.annotations=\\\{std::meta::reflect_constant\\\(1\\\),std::meta::reflect_constant\\\(2\\\),std::meta::reflect_constant\\\(3\\\)\\\}\\\}\\\) == \\\^\\\^::\\\)'" "" { target *-*-* } .-1 }
+ static_assert (data_member_spec (^^int, { .bit_width = 5 }) == ^^::);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(data_member_spec\\\(\\\^\\\^int,\\\{.bit_width=5\\\}\\\) == \\\^\\\^::\\\)'" "" { target *-*-* } .-1 }
+ static_assert (std::meta::reflect_constant (42) == std::meta::reflect_constant (A { 42 })); // { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(std::meta::reflect_constant\\\(42\\\) == std::meta::reflect_object\\\(A\\\{42\\\}\\\)\\\)'" "" { target *-*-* } .-1 }
+ int v[42];
+ static_assert (std::meta::reflect_object (v[4]) == std::meta::reflect_object (v[5])); // { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(std::meta::reflect_object\\\(v\\\[4\\\]\\\) == std::meta::reflect_object\\\(v\\\[5\\\]\\\)\\\)'" "" { target *-*-* } .-1 }
+ 
+ void
+ qux (int, int)
+ {
+ }
+ 
+ void qux (int x, int y);
+ void qux (int x, int y);
+ 
+ static_assert (parameters_of (^^qux)[0] == parameters_of (^^qux)[1]);	// { dg-error "static assertion failed" }
+ // { dg-message "note: the comparison reduces to '\\\(parameters_of\\\(\\\^\\\^qux\\\(int, int\\\)\\\)\\\[0\\\] \\\{aka x\\\} == parameters_of\\\(\\\^\\\^qux\\\(int, int\\\)\\\)\\\[1\\\] \\\{aka y\\\}\\\)'" "" { target *-*-* } .-1 }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/reflect/using3.C gcc-17-20260510/gcc/testsuite/g++.dg/reflect/using3.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/reflect/using3.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/reflect/using3.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,11 ----
+ // PR c++/125184
+ // { dg-do compile { target c++26 } }
+ // { dg-additional-options "-freflection" }
+ 
+ #include <meta>
+ 
+ void
+ foo ()
+ {
+   using std::meta::info;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-2.C gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-2.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-2.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-2.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-phiprop1-details -fdump-tree-release_ssa" } */
+ 
+ /* PR tree-optimization/116823 */
+ /* The clobber on a should not get in the way of phiprop here even if
+    this is undefined code. */
+ /* We should have MIN_EXPR early on then too. */
+ 
+ static inline
+ const int &c(const int &d, const int &e) {
+   if (d < e)
+     return d;
+   return e;
+ }
+ 
+ int g(int i, struct f *ff)
+ {
+   const int &a = c(i, 10);
+   return a;
+ }
+ /* { dg-final { scan-tree-dump-times "Inserting PHI for result of load" 1 "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-times "MIN_EXPR" 1 "release_ssa"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-3.C gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-3.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-3.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-3.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-phiprop1-details -fdump-tree-release_ssa" } */
+ 
+ /* PR tree-optimization/123120 */
+ /* The order of min/max arguments should not cause any issues with phiprop,
+    the stores to the temps should not interfere with the loads from the temp.  */
+ 
+ #include <algorithm>
+ 
+ long f0(short c, short d, long long a)
+ {
+    return std::max(std::min((long long)3, a), (long long)d);
+ }
+ 
+ long f1(short c, short d, long long a)
+ {
+    return std::max((long long)d, std::min((long long)3, a));
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Inserting PHI for result of load" 4 "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-times "MIN_EXPR" 2 "release_ssa"} } */
+ /* { dg-final { scan-tree-dump-times "MAX_EXPR" 2 "release_ssa"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-4.C gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-4.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-4.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-4.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-tree-sra -fdump-tree-phiprop-details" } */
+ /* PR tree-optimization/123120 */
+ /* Make sure the store to *e conflicts with the store to *d */
+ 
+ 
+ struct s1
+ {
+   int a;
+ };
+ 
+ void f(int *);
+ 
+ void g(struct s1 i, struct s1 *d, struct s1 *e)
+ {
+   const struct s1 t = {10};
+   const struct s1 *a;
+   struct s1 t1 = {2};
+   if (t.a < i.a)
+     a = &t;
+   else
+     a = &i;
+   *e = t1;
+   t1 = *a;
+   *d = t1;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop2"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-5.C gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-5.C
*** gcc-17-20260503/gcc/testsuite/g++.dg/tree-ssa/phiprop-5.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.dg/tree-ssa/phiprop-5.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-phiprop-details" } */
+ /* PR tree-optimization/116823 */
+ /* Make sure the store to *d conflicts with the load from d->a; */
+ 
+ 
+ struct s1
+ {
+   int a;
+ };
+ 
+ void f(int *);
+ 
+ int g(struct s1 i, struct s1 *d, struct s1 *e)
+ {
+   int t3;
+   struct s1 t1 = {2};
+   const struct s1 t = {10};
+   const struct s1 *a;
+   {
+     int t67;
+     f(&t67);
+     if (t.a < i.a)
+       a = &t;
+     else
+       a = &i;
+   }
+   t3 = d->a;
+   *d = *a;
+   return t3;
+ }
+ 
+ 
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop2"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-1.C gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-1.C
*** gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-1.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-1.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run { target fstack_protector } } */
+ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
+ #ifdef __LP64__
+ uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
+ #else
+ uintptr_t __stack_chk_guard = 0xdd2cc927UL;
+ #endif
+ 
+ extern "C" void
+ __stack_chk_fail (void)
+ {
+   exit (0); /* pass */
+ }
+ 
+ __attribute__ ((noipa))
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ int
+ main (void)
+ {
+   char foo[255];
+ 
+    /* smash stack */
+   for (int i = 0; i <= 400; i++)
+     smash (foo, i);
+ 
+   return 1;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-2.C gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-2.C
*** gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-2.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-2.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-do compile { target fstack_protector } } */
+ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ extern char *__stack_chk_guard; /* { dg-error "conflicting declaration 'char. __stack_chk_guard'" } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-3.C gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-3.C
*** gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-3.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-3.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-do compile { target fstack_protector } } */
+ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ extern char __stack_chk_guard; /* { dg-error "conflicting declaration 'char __stack_chk_guard'" } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-hidden-1.C gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-hidden-1.C
*** gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-hidden-1.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-hidden-1.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,45 ----
+ /* { dg-do run { target { fstack_protector && fpic } } } */
+ /* { dg-options "-O2 -fPIC -fstack-protector-all -mstack-protector-guard=global -save-temps" } */
+ 
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
+ __attribute__ ((visibility ("hidden")))
+ #ifdef __LP64__
+ uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
+ #else
+ uintptr_t __stack_chk_guard = 0xdd2cc927UL;
+ #endif
+ 
+ extern "C" void
+ __stack_chk_fail (void)
+ {
+   exit (0); /* pass */
+ }
+ 
+ __attribute__ ((noipa))
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ int
+ main (void)
+ {
+   char foo[255];
+ 
+    /* smash stack */
+   for (int i = 0; i <= 400; i++)
+     smash (foo, i);
+ 
+   return 1;
+ }
+ 
+ /* { dg-final { scan-hidden "__stack_chk_guard" } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard\\(%rip\\)" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOTPCREL" { target { ! ia32 } } } } */
+   /* { dg-final { scan-assembler ".quad	3280087301477736604" { target { lp64 } } } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard@GOTOFF" { target ia32 } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOT\\(" { target ia32 } } } */
+   /* { dg-final { scan-assembler ".long	-584267481" { target { ! lp64 } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-hidden-2.C gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-hidden-2.C
*** gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-hidden-2.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-hidden-2.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile { target { fstack_protector && fpic } } } */
+ /* { dg-options "-O2 -fPIC -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ #include <stdint.h>
+ 
+ extern uintptr_t __stack_chk_guard;
+ __attribute__ ((visibility ("hidden")))
+ extern uintptr_t __stack_chk_guard;
+ 
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ /* { dg-final { scan-hidden "__stack_chk_guard" } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard\\(%rip\\)" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOTPCREL" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard@GOTOFF" { target ia32 } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOT\\(" { target ia32 } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-hidden-3.C gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-hidden-3.C
*** gcc-17-20260503/gcc/testsuite/g++.target/i386/ssp-global-hidden-3.C	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/g++.target/i386/ssp-global-hidden-3.C	Sun May 10 22:32:09 2026
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do run { target { fstack_protector && fpic } } } */
+ /* { dg-options "-O2 -fPIC -mstack-protector-guard=global -save-temps" } */
+ 
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
+ __attribute__ ((visibility ("hidden")))
+ #ifdef __LP64__
+ uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
+ #else
+ uintptr_t __stack_chk_guard = 0xdd2cc927UL;
+ #endif
+ 
+ extern "C" void
+ __stack_chk_fail (void)
+ {
+   exit (0); /* pass */
+ }
+ 
+ __attribute__ ((noipa))
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ __attribute__ ((optimize ("stack-protector-all")))
+ int
+ main (void)
+ {
+   char foo[255];
+ 
+    /* smash stack */
+   for (int i = 0; i <= 400; i++)
+     smash (foo, i);
+ 
+   return 1;
+ }
+ 
+ /* { dg-final { scan-hidden "__stack_chk_guard" } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard\\(%rip\\)" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOTPCREL" { target { ! ia32 } } } } */
+   /* { dg-final { scan-assembler ".quad	3280087301477736604" { target { lp64 } } } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard@GOTOFF" { target ia32 } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOT\\(" { target ia32 } } } */
+   /* { dg-final { scan-assembler ".long	-584267481" { target { ! lp64 } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.c-torture/compile/20000804-1.c gcc-17-20260510/gcc/testsuite/gcc.c-torture/compile/20000804-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.c-torture/compile/20000804-1.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.c-torture/compile/20000804-1.c	Sun May 10 22:32:09 2026
***************
*** 2,8 ****
     statement to force a 'long long' (64-bits) to go in a register.  */
  /* { dg-do assemble } */
  /* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */
- /* { dg-skip-if "No 64-bit registers" { m32c-*-* } } */
  /* { dg-skip-if "Not enough 64-bit registers" { pdp11-*-* } { "-O0" } { "" } } */
  /* { dg-xfail-if "Inconsistent constraint on asm" { csky-*-* } { "-O0" } { "" } } */
  /* { dg-xfail-if "Inconsistent constraint on asm" { bpf-*-* } { "-O0" } { "" } } */
--- 2,7 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.c-torture/compile/20001226-1.c gcc-17-20260510/gcc/testsuite/gcc.c-torture/compile/20001226-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.c-torture/compile/20001226-1.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.c-torture/compile/20001226-1.c	Sun May 10 22:32:09 2026
***************
*** 1,7 ****
  /* { dg-do assemble } */
  /* { dg-skip-if "too much code for avr" { "avr-*-*" } } */
  /* { dg-skip-if "too much code for pdp11" { "pdp11-*-*" } } */
- /* { dg-skip-if "" { m32c-*-* } } */
  /* { dg-skip-if "jumps too far for eBPF" { bpf-*-* } } */
  /* { dg-timeout-factor 4.0 } */
  
--- 1,6 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c gcc-17-20260510/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c
*** gcc-17-20260503/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c	Sun May 10 22:32:09 2026
***************
*** 1,4 ****
! /* { dg-skip-if "Array too big" { avr-*-* m32c-*-* pdp11-*-* msp430-*-* } } */ 
  
  #define STR2 "012345678901234567890123456789012345678901234567890123456789\
  0123456789012345678901234567890123456789"
--- 1,4 ----
! /* { dg-skip-if "Array too big" { avr-*-* pdp11-*-* msp430-*-* } } */ 
  
  #define STR2 "012345678901234567890123456789012345678901234567890123456789\
  0123456789012345678901234567890123456789"
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.c-torture/execute/20020404-1.c gcc-17-20260510/gcc/testsuite/gcc.c-torture/execute/20020404-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.c-torture/execute/20020404-1.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.c-torture/execute/20020404-1.c	Sun May 10 22:32:10 2026
***************
*** 1,6 ****
  /* { dg-require-effective-target int32plus } */
  /* { dg-additional-options "-std=gnu17" } */
- /* { dg-skip-if "pointers can be truncated" { m32c-*-* } } */
  /* Extracted from GDB sources. */
  
  void abort (void);
--- 1,5 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/20020312-2.c gcc-17-20260510/gcc/testsuite/gcc.dg/20020312-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/20020312-2.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/20020312-2.c	Sun May 10 22:32:10 2026
*************** extern void abort (void);
*** 95,102 ****
  # define PIC_REG  "r12"
  #elif defined(__x86_64__)
  /* No pic register.  */
- #elif defined(__m32c__)
- /* No pic register.  */
  #elif defined (__frv__)
  # ifdef __FRV_FDPIC__
  #  define PIC_REG "gr15"
--- 95,100 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/Wreturn-nested-3.c gcc-17-20260510/gcc/testsuite/gcc.dg/Wreturn-nested-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/Wreturn-nested-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/Wreturn-nested-3.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target trampolines } */
+ /* { dg-options "" } */
+ 
+ 
+ void *a0() {
+   int b = 1;
+   struct bar { char c[b]; };
+   struct bar e() { struct bar f; return f; }
+   return &e;	/* { dg-warning "referencing local context" } */
+ }
+ 
+ void *a1() {
+   int b = 1;
+   struct bar { char c[b]; };
+   struct bar e() { }
+   return &e;
+ }
+ 
+ void *a2() {
+   int b = 1;
+   struct bar { char c[b]; };
+   struct bar e() { typeof(struct bar) f; return f; }
+   return &e;	/* { dg-warning "referencing local context" } */
+ }
+ 
+ void *a3() {
+   int b = 1;
+   struct bar { char c[b]; };
+   struct bar (*d)();
+   struct bar e() { typeof((*d)()) f; return f; }
+   return &e;	/* { dg-warning "referencing local context" } */
+ }
+ 
+ void *a4() {
+   int b = 1;
+   struct bar { char c[b]; };
+   struct bar e() { struct bar f; return f; }
+   return &e;	/* { dg-warning "referencing local context" } */
+ }
+ 
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-4.c gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-4.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-4.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-4.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-additional-options "-fno-analyzer-state-merge" } */
+ 
+ int
+ get_zero (void)
+ {
+   return 0; /* { dg-message "\\\(6\\\) zero value originates here" } */
+ }
+ 
+ struct foo { int x; int y; };
+ 
+ void
+ init_foo (struct foo *f, int x, int y) /* { dg-message "\\\(9\\\) entry to 'init_foo' with zero from \\\(7\\\) for 'y'" } */
+ {
+   f->x = x;
+   f->y = y; /* { dg-message "\\\(10\\\) copying zero value from \\\(9\\\) from 'y' to '\\*f\\.y'" } */
+ }
+ 
+ int
+ do_divide (struct foo *f)
+ {
+   return f->x / f->y; /* { dg-message "using zero value from \\\(10\\\) from '\\*f\\.y'" } */
+   /* { dg-warning "division by zero" "" { target *-*-* } .-1 } */
+ }
+ 
+ int
+ test (int flag, int flag_2, int flag_3)
+ {
+   struct foo f;
+   int a = 42;
+   int b = 10;
+   if (flag)
+     b = get_zero ();
+     /* { dg-message "\\\(7\\\) returning zero from \\\(6\\\) from 'get_zero' here" "" { target *-*-* } .-1 } */
+   init_foo (&f, a, b); /* { dg-message "passing zero from \\\(7\\\) from 'test' to 'init_foo' via parameter 3" } */
+   return do_divide (&f);
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-5.c gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-5.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-5.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-5.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-additional-options "-fno-analyzer-state-merge" } */
+ 
+ int
+ maybe_get_zero (int flag)
+ {
+   if (flag)
+     return 0; /* { dg-message "zero value originates here" } */
+   else
+     return 42;
+ }
+ 
+ struct foo { int x; int y; };
+ 
+ void
+ init_foo (struct foo *f, int x, int y) /* { dg-message "\\\(11\\\) entry to 'init_foo' with zero from \\\(9\\\) for 'y'" } */
+ {
+   f->x = x;
+   f->y = y; /* { dg-message "\\\(12\\\) copying zero value from \\\(11\\\) from 'y' to '\\*f\\.y'" } */
+ }
+ 
+ int
+ do_divide (struct foo *f)
+ {
+   return f->x / f->y; /* { dg-message "using zero value from \\\(12\\\) from '\\*f\\.y'" } */
+   /* { dg-warning "division by zero" "" { target *-*-* } .-1 } */
+ }
+ 
+ int
+ test (int flag, int flag_2, int flag_3)
+ {
+   struct foo f;
+   int a = 42;
+   int b = 10;
+   if (flag)
+     b = maybe_get_zero (flag_2); /* { dg-bogus "value of 'b' unchanged here" } */
+     /* { dg-message "returning zero from \\\(8\\\) from 'maybe_get_zero' here" "" { target *-*-* } .-1 } */
+   init_foo (&f, a, b); /* { dg-message "passing zero from \\\(9\\\) from 'test' to 'init_foo' via parameter 3" } */
+   return do_divide (&f);
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-6.c gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-6.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-6.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-6.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-additional-options "-fno-analyzer-state-merge" } */
+ 
+ struct foo { int x; int y; };
+ 
+ void
+ init_foo (struct foo *f)
+ {
+   __builtin_memset (f, 0, sizeof (*f));
+ }
+ 
+ int
+ do_divide (struct foo *f)
+ {
+   return f->x / f->y; /* { dg-message "using zero value from '\\*f\\.y'" } */
+   /* { dg-warning "division by zero" "" { target *-*-* } .-1 } */
+ }
+ 
+ int
+ test (int flag, int flag_2, int flag_3)
+ {
+   struct foo f;
+   init_foo (&f);
+   return do_divide (&f);
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-float.c gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-float.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-float.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/analyzer/divide-by-zero-float.c	Sun May 10 22:32:10 2026
*************** test_1 ()
*** 7,13 ****
  static float __attribute__((noinline))
  get_zero ()
  {
!   return 0.f;
  }
  
  float
--- 7,13 ----
  static float __attribute__((noinline))
  get_zero ()
  {
!   return 0.f; /* { dg-message "value originates here" } */
  }
  
  float
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/max-1.c gcc-17-20260510/gcc/testsuite/gcc.dg/max-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/max-1.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/max-1.c	Sun May 10 22:32:10 2026
***************
*** 4,11 ****
  /* { dg-options "-O1 " } */
  /* Option -fno-tree-lrs removed By Andrew MacLeod since it is no longer 
     supported in the compiler beginning with GCC 4.3.  */
- /* m32c has varying sized pointers */
- /* { dg-skip-if "" { "m32c-*-*" } { "*" } { "-mcpu=m32c" "-mcpu=m32cm" } } */
  
  __extension__ typedef __INTPTR_TYPE__ intptr_t;
  
--- 4,9 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/plugin/diagnostic-test-paths-4.py gcc-17-20260510/gcc/testsuite/gcc.dg/plugin/diagnostic-test-paths-4.py
*** gcc-17-20260503/gcc/testsuite/gcc.dg/plugin/diagnostic-test-paths-4.py	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/plugin/diagnostic-test-paths-4.py	Sun May 10 22:32:10 2026
*************** def test_paths(html_tree):
*** 19,25 ****
  
      quoted_src_tr = rows[0]
      assert_quoted_line(quoted_src_tr,
!                        '   13', '  fprintf(stderr, "LOG: %s", msg); /* { dg-warning "call to \'fprintf\' from within signal handler" } */')
      
      annotation_tr = rows[1]
      assert_annotation_line(annotation_tr,
--- 19,25 ----
  
      quoted_src_tr = rows[0]
      assert_quoted_line(quoted_src_tr,
!                        '   14', '  fprintf(stderr, "LOG: %s", msg); /* { dg-warning "call to \'fprintf\' from within signal handler" } */')
      
      annotation_tr = rows[1]
      assert_annotation_line(annotation_tr,
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/pr116700.c gcc-17-20260510/gcc/testsuite/gcc.dg/pr116700.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/pr116700.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/pr116700.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,13 ----
+ /* PR tree-optimization/116700 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-phiopt1" } */
+ 
+ int f(unsigned char a, int b, int c)
+ {
+   int t = a;
+   if (c > t) t = (c > 0 ? c : -c);
+   return t;
+ }
+ 
+ /* { dg-final { scan-tree-dump "MAX_EXPR" "phiopt1" } } */
+ /* { dg-final { scan-tree-dump-not "ABS_EXPR" "phiopt1" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/pr124985.c gcc-17-20260510/gcc/testsuite/gcc.dg/pr124985.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/pr124985.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/pr124985.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target trampolines } */
+ /* { dg-options "-O1 -fno-tree-dse" } */
+ 
+ void a() {
+   int b = 0;
+   struct bar { char c[b]; };
+   struct bar (*d)();
+   struct bar e() { struct bar f; return f; }
+   d = e;
+   d();
+ }
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/pr90838.c gcc-17-20260510/gcc/testsuite/gcc.dg/pr90838.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/pr90838.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/pr90838.c	Sun May 10 22:32:10 2026
*************** int ctz4 (unsigned long x)
*** 87,90 ****
  /* { dg-final { scan-tree-dump-times {= \.CTZ} 4 "forwprop2" { target { loongarch64*-*-* } } } } */
  /* { dg-final { scan-assembler-times "ctz.d\t" 1 { target { loongarch64*-*-* } } } } */
  /* { dg-final { scan-assembler-times "ctz.w\t" 3 { target { loongarch64*-*-* } } } } */
! /* { dg-final { scan-assembler-times "\(andi|slli.w\)\t" 4 { target { loongarch64*-*-* } } } } */
--- 87,90 ----
  /* { dg-final { scan-tree-dump-times {= \.CTZ} 4 "forwprop2" { target { loongarch64*-*-* } } } } */
  /* { dg-final { scan-assembler-times "ctz.d\t" 1 { target { loongarch64*-*-* } } } } */
  /* { dg-final { scan-assembler-times "ctz.w\t" 3 { target { loongarch64*-*-* } } } } */
! /* { dg-final { scan-assembler-times "andi\t" 2 { target { loongarch64*-*-* } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125124.c gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125124.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125124.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125124.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-ftree-vectorize" } */
+ 
+ char ff_rv60_idct16x16_add_dst_1, ff_rv60_idct16x16_add___trans_tmp_1;
+ short ff_rv60_idct16x16_add_tmp[56];
+ void ff_rv60_idct16x16_add() {
+   for (int y; y; y++) {
+     int tmp00 = 31 * ff_rv60_idct16x16_add_tmp[y * 16] -
+                 7 * ff_rv60_idct16x16_add_tmp[y * 16 + 1] -
+                 6 * ff_rv60_idct16x16_add_tmp[y * 16 + 10] -
+                 20 * ff_rv60_idct16x16_add_tmp[y * 16 + 4],
+         tmp02 = 20 * ff_rv60_idct16x16_add_tmp[y * 16] -
+                 6 * ff_rv60_idct16x16_add_tmp[y * 16 + 1] +
+                 7 * ff_rv60_idct16x16_add_tmp[y * 16 + 10] +
+                 31 * ff_rv60_idct16x16_add_tmp[y * 16 + 4];
+     ff_rv60_idct16x16_add_dst_1 = (tmp00 >> 7) + (tmp02 >> 7);
+     {
+       if (ff_rv60_idct16x16_add_dst_1)
+         ff_rv60_idct16x16_add___trans_tmp_1 = ff_rv60_idct16x16_add_dst_1;
+     }
+     ff_rv60_idct16x16_add_dst_1 = ff_rv60_idct16x16_add___trans_tmp_1;
+   }
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125153.c gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125153.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125153.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125153.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,25 ----
+ /* { dg-do run } */
+ 
+ int a, b, c;
+ _Bool d, e;
+ 
+ void
+ foo (void)
+ {
+   if (d)
+     {
+     l: b = -1;
+     }
+   e = c <= b;
+   a = a - 7;
+   if (e)
+     goto l;
+ }
+ 
+ int
+ main ()
+ {
+   foo ();
+   if (a != -14)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125156.c gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125156.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125156.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125156.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ 
+ #include <stdint.h>
+ 
+ int64_t g1, g8;
+ 
+ void g14()
+ {
+   int16_t v5;
+   goto lbl_cont30;
+ lbl_bf2:
+   g8 = 0;
+ lbl_b5:
+   g1 = g1 - 8366249724514421075;
+   switch (v5)
+ case 5:
+ case 2:
+     goto lbl_b5;
+     goto lbl_bf2;
+ lbl_cont30:
+     switch (v5)
+       {
+       case 0: goto lbl_bf2;
+       case 5: goto lbl_b5;
+       }
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125185.c gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125185.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125185.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125185.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-ftree-vectorize" } */
+ /* { dg-additional-options "-mxop" { target { x86_64-*-* || i?86-*-* } } } */
+ 
+ long sum;
+ int *coef1;
+ 
+ void ac3_sum_square_butterfly_int32_c(int i, int cap) {
+   for (; i < cap; i++) {
+     int md = i + coef1[i];
+     sum += (long)md * md;
+   }
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125234-1.c gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125234-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr125234-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr125234-1.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,49 ----
+ /* PR tree-optimization/125234 */
+ /* { dg-do run } */
+ 
+ __attribute__((noinline))
+ int f0(int a, int b)
+ {
+   return (a != b) & ((a | b) == 0);
+ }
+ 
+ __attribute__((noinline))
+ int f1(int a, int b)
+ {
+   return (a == b) | ((a | b) != 0);
+ }
+ 
+ 
+ __attribute__((noinline))
+ int f0_(int a, int b)
+ {
+   if (a != b)
+     if ((a | b) == 0)
+       return 1;
+   return 0;
+ }
+ 
+ __attribute__((noinline))
+ int f1_(int a, int b)
+ {
+   if (a == b)
+     return 1;
+   if ((a | b) != 0)
+     return 1;
+   return 0;
+ }
+ 
+ 
+ int
+ main()
+ {
+   if (f0(0, 0))
+     __builtin_abort ();
+   if (!f1(0, 0))
+     __builtin_abort ();
+   if (f0_(0, 0))
+     __builtin_abort ();
+   if (!f1_(0, 0))
+     __builtin_abort ();
+ }
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr26565.c gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr26565.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/torture/pr26565.c	Sun May  3 22:32:09 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/torture/pr26565.c	Sun May 10 22:32:10 2026
***************
*** 1,6 ****
  /* { dg-do run } */
- /* m32c is already packed.  */
- /* { dg-skip-if "" { "m32c-*-*" } } */
  
  void *memcpy(void *dest, const void *src, __SIZE_TYPE__ n);
  
--- 1,4 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/forwprop-43.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/forwprop-43.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/forwprop-43.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/forwprop-43.c	Sun May 10 22:32:10 2026
***************
*** 1,7 ****
  /* { dg-do compile } */
  /* { dg-options "-O2 -fdump-tree-forwprop1 -Wno-psabi" } */
  /* { dg-require-effective-target stdint_types } */
- /* { dg-require-effective-target vect_int } */
  /* { dg-additional-options "-fgimple" } */
  /* { dg-additional-options "-msse2" { target ia32 } } */
  
--- 1,6 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-48.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-48.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-48.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-48.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,25 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-phiopt1" } */
+ 
+ /* Test that (A > B) ? ABS(A) : B is simplified to MAX(A, B)
+    when B is known to be non-negative. */
+ 
+ int f(unsigned char a, int b, int c)
+ {
+   int t = a;
+   if (c > t)
+     t = (c > 0 ? c : -c);
+   return t;
+ }
+ 
+ int f1(unsigned char a, int b, int c)
+ {
+   int t = a;
+   if (c > t) return (c > 0 ? c : -c);
+   return t;
+ }
+ 
+ /* Both functions should be converted to MAX_EXPR by phiopt1.  */
+ /* { dg-final { scan-tree-dump-times "MAX_EXPR" 2 "phiopt1" } } */
+ /* { dg-final { scan-tree-dump-not "ABS_EXPR" "phiopt1" } } */
+ /* { dg-final { scan-tree-dump-not "if " "phiopt1" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-10.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-10.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-10.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-10.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-tree-sra -fdump-tree-phiprop-details" } */
+ /* PR tree-optimization/123120 */
+ /* Make sure the store to *e conflicts with the store to *d */
+ 
+ 
+ struct s1
+ {
+   int a;
+ };
+ 
+ void f(int *);
+ 
+ void g(struct s1 i, struct s1 *d, struct s1 *e)
+ {
+   const struct s1 t = {10};
+   const struct s1 *a;
+   struct s1 t1 = {2};
+   if (t.a < i.a)
+     a = &t;
+   else
+     a = &i;
+   *e = t1;
+   t1 = *a;
+   *d = t1;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop2"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-11.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-11.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-11.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-11.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-tree-sra -fdump-tree-phiprop-details" } */
+ /* PR tree-optimization/123120 */
+ /* Make sure the load *d conflicts with the store to *d so that phiprop
+    does not move the store into conditionals. */
+ 
+ struct s1
+ {
+   int a;
+ };
+ 
+ void f(int *);
+ 
+ int g(struct s1 i, struct s1 *d, struct s1 *e)
+ {
+   const struct s1 t = {10};
+   const struct s1 *a;
+   struct s1 t1 = {2};
+   if (t.a < i.a)
+     a = &t;
+   else
+     a = &i;
+   t1 = *d;
+   *d = *a;
+   return t1.a;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop2"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-12.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-12.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-12.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-12.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-phiprop-details" } */
+ /* PR tree-optimization/123120 */
+ /* Make sure the load *d conflicts with the store to *d so that phiprop
+    does not move the store into conditionals. */
+ 
+ struct s1
+ {
+   int a;
+ };
+ 
+ void f(int *);
+ 
+ int g(struct s1 i, struct s1 *d, struct s1 *e)
+ {
+   const struct s1 t = {10};
+   const struct s1 *a;
+   struct s1 t1 = {2};
+   if (t.a < i.a)
+     a = &t;
+   else
+     a = &i;
+   int t2 = d->a;
+   *d = *a;
+   return t2;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-not "Inserting PHI for result of load" "phiprop2"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-8.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-8.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-8.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-8.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,27 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-phiprop1-details -fdump-tree-release_ssa" } */
+ 
+ /* PR tree-optimization/116823 */
+ /* The clobber on b should not get in the way of phiprop here. */
+ /* We should have MIN_EXPR early on. */
+ 
+ void f(int *);
+ 
+ int g(int i)
+ {
+   const int t = 10;
+   const int *a;
+   {
+     int b;
+     f(&b);
+     if (t < i)
+       a = &t;
+     else
+       a = &i;
+   }
+   return *a;
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Inserting PHI for result of load" 1 "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-times "MIN_EXPR" 1 "release_ssa"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-9.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-9.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/phiprop-9.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/phiprop-9.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-phiprop1-details -fdump-tree-release_ssa" } */
+ 
+ /* PR tree-optimization/123120 */
+ /* The store to *d should not get in the way of phiprop here. */
+ /* We should have MIN_EXPR early on. */
+ 
+ void f(int *);
+ 
+ int g(int i, int *d)
+ {
+   const int t = 10;
+   const int *a;
+   if (t < i)
+     a = &t;
+   else
+     a = &i;
+   *d = 1;
+   return *a;
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Inserting PHI for result of load" 1 "phiprop1"} } */
+ /* { dg-final { scan-tree-dump-times "MIN_EXPR" 1 "release_ssa"} } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878-1.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878-1.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,64 ----
+ /* PR tree-optimization/109878 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-optimized" } */
+ 
+ /* All the constant pair <cst0, cst1> used here satisfy the condition:
+    (cst0 & cst1 == cst0) || (cst0 & cst1 == cst1).
+    If the above condition is true, then MIN_EXPR is not needed. */
+ int min_and(int a, int b) {
+   b = a & 3;
+   a = a & 1;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ int min_and1(int a, int b) {
+   b = a & 3;
+   a = a & 15;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ int min_and2(int a, int b) {
+   b = a & -7;
+   a = a & -3;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ int min_and3(int a, int b) {
+   b = a & -5;
+   a = a & -13;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* When constants are of opposite signs, the simplification will only
+    work for unsigned types. */
+ unsigned int min_and4(unsigned int a, unsigned int b) {
+   b = a & 3;
+   a = a & -5;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ unsigned int min_and5(unsigned int a, unsigned int b) {
+   b = a & -3;
+   a = a & 5;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not " MIN_EXPR " "optimized" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878-2.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878-2.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,31 ----
+ /* PR tree-optimization/109878 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-optimized" } */
+ 
+ /* The testcases here should not get optimized with the patch.
+    For constant pair <cst0, cst1>, the condition:
+    (cst0 & cst1 == cst0) || (cst0 & cst1 == cst1)
+    is false for the constants used here. */
+ int max_and(int a, int b) {
+ 
+   b = a & 3;
+   a = a & 5;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* The constants in this function satisfy the condition but a is signed.
+    For signed types both the constants should have same sign. */
+ int min_and(int a, int b) {
+   b = a & 1;
+   a = a & -3;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* { dg-final { scan-tree-dump " MIN_EXPR " "optimized" } } */
+ /* { dg-final { scan-tree-dump " MAX_EXPR " "optimized" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878-3.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878-3.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,42 ----
+ /* PR tree-optimization/109878 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-optimized" } */
+ 
+ /* For unsigned types, min(a, a&CST) should be simplified to a&CST and
+    should not generate MIN_EXPR. */
+ unsigned int min_1(unsigned int a, unsigned int b) {
+   b = a & 1;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ unsigned int min_2(unsigned int a, unsigned int b) {
+   b = a & 3;
+   if (b < a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* For unsigned types, max(a, a&CST) should be simplified to a and
+    should not generate MAX_EXPR. */
+ unsigned int max_1(unsigned int a, unsigned int b) {
+   b = a & 1;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ unsigned int max_2(unsigned int a, unsigned int b) {
+   b = a & 3;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not " MIN_EXPR " "optimized" } } */
+ /* { dg-final { scan-tree-dump-not " MAX_EXPR " "optimized" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr109878.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr109878.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,64 ----
+ /* PR tree-optimization/109878 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-optimized" } */
+ 
+ /* All the constant pair <cst0, cst1> used here satisfy the condition:
+    (cst0 & cst1 == cst0) || (cst0 & cst1 == cst1).
+    If the above condition is true, then MAX_EXPR is not needed. */
+ int max_and(int a, int b) {
+   b = a & 3;
+   a = a & 1;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ int max_and1(int a, int b) {
+   b = a & 3;
+   a = a & 15;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ int max_and2(int a, int b) {
+   b = a & -7;
+   a = a & -3;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ int max_and3(int a, int b) {
+   b = a & -5;
+   a = a & -13;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* When constants are of opposite signs, the simplification will only
+    work for unsigned types. */
+ unsigned int max_and4(unsigned int a, unsigned int b) {
+   b = a & 3;
+   a = a & -5;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ unsigned int max_and5(unsigned int a, unsigned int b) {
+   b = a & -3;
+   a = a & 5;
+   if (b > a)
+     return b;
+   else
+     return a;
+ }
+ 
+ /* { dg-final { scan-tree-dump-not " MAX_EXPR " "optimized" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr119422-2.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr119422-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr119422-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr119422-2.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do run } */
+ /* { dg-options "-O1" } */
+ 
+ /* Macro adapted from builtin-object-size-common.h  */
+ #define FAIL() \
+   do { \
+     __builtin_printf ("Failure at line: %d\n", __LINE__);     \
+     abort();						      \
+   } while (0)
+ 
+ void abort(void);
+ 
+ int gg (_Bool b, unsigned a)
+ {
+   return ((unsigned)b >= a) >= a;
+ }
+ int gg2 (_Bool b, unsigned a)
+ {
+   return ((unsigned)b >= a) < a;
+ }
+ 
+ int main (void) {
+   if (gg (0, 0) != 1)
+     FAIL ();
+   if (gg (1, 0) != 1)
+     FAIL ();
+   if (gg (1, 1) != 1)
+     FAIL ();
+   if (gg (0, 1) != 0)
+     FAIL ();
+ 
+   if (gg2 (0, 0) != 0)
+     FAIL ();
+   if (gg2 (1, 0) != 0)
+     FAIL ();
+   if (gg2 (1, 1) != 0)
+     FAIL ();
+   if (gg2 (0, 1) != 1)
+     FAIL ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr119422.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr119422.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr119422.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr119422.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-options "-O1 -fdump-tree-original" } */
+ 
+ int gg (unsigned u, _Bool b)
+ {
+   return u <= (u <= (unsigned)b);
+ }
+ 
+ int gg2 (unsigned u, _Bool b)
+ {
+   return ((unsigned)b >= u) >= u;
+ }
+ 
+ int gg3 (unsigned u, _Bool b)
+ {
+   return u > (u <= (unsigned)b);
+ }
+ 
+ int gg4 (unsigned u, _Bool b)
+ {
+   return ((unsigned)b >= u) < u;
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " >= " 2 "original" } } */
+ /* { dg-final { scan-tree-dump-times " < " 2 "original" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr122569-1.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr122569-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr122569-1.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr122569-1.c	Sun May 10 22:32:10 2026
*************** stockfish_lsb (uint64_t b)
*** 27,30 ****
    return magictable[((b & -b) * magic) >> 58];
  }
  
! /* { dg-final { scan-tree-dump "__builtin_ctz|\\.CTZ" "forwprop1" } } */
--- 27,30 ----
    return magictable[((b & -b) * magic) >> 58];
  }
  
! /* { dg-final { scan-tree-dump "__builtin_ctz|\\.CTZ" "forwprop1" { target { ctzll && { lp64 || llp64 } } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr122569-2.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr122569-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr122569-2.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr122569-2.c	Sun May 10 22:32:10 2026
*************** stockfish_msb (uint64_t b)
*** 40,43 ****
    return magictable[(b * magic) >> 58];
  }
  
! /* { dg-final { scan-tree-dump "__builtin_clz|\\.CLZ" "forwprop1" } } */
--- 40,43 ----
    return magictable[(b * magic) >> 58];
  }
  
! /* { dg-final { scan-tree-dump "__builtin_clz|\\.CLZ" "forwprop1" { target { clzll && { lp64 || llp64 } } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr123514.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr123514.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr123514.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr123514.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-optimized" } */
+ 
+ int
+ bit_trick (int x)
+ {
+   int mask = -(x < 0);
+   return ((x + mask) ^ mask);
+ }
+ 
+ /* { dg-final { scan-tree-dump "ABS_EXPR" "optimized" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr124560.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr124560.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr124560.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr124560.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,43 ----
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-forwprop1-folding-raw" } */
+ 
+ static inline int
+ min (int a, int b)
+ {
+   return a < b ? a : b;
+ }
+ 
+ static inline int
+ max (int a, int b)
+ {
+   return a > b ? a : b;
+ }
+ 
+ int
+ f1 (int x, int y, int z)
+ {
+   return min (z + y, x + y);
+ }
+ 
+ int
+ f2 (int x, int y, int z)
+ {
+   return min (z - y, x - y);
+ }
+ 
+ int
+ f3 (int x, int y, int z)
+ {
+   return max (z + y, x + y);
+ }
+ 
+ int
+ f4 (int x, int y, int z)
+ {
+   return max (z - y, x - y);
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Applying pattern" 4 "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-times "plus_expr" 2 "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-times "minus_expr" 2 "forwprop1" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr125214.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr125214.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/pr125214.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/pr125214.c	Sun May 10 22:32:10 2026
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-Ofast -fdump-tree-forwprop1-raw" } */
+ 
+ /* "min|max(a+|-c,b+|-c) -> min|max(a,b)+|-c" folding should NOT happen for
+    non-integral types.  */
+ 
+ double
+ f (double a, double b, double c)
+ {
+   return __builtin_fmax (a + c, b + c);
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "plus_expr" 2 "forwprop1" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c	Sun May 10 22:32:11 2026
***************
*** 1,4 ****
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1 -fno-bit-tests" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
--- 1,4 ----
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1 -fno-bit-tests" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c	Sun May 10 22:32:11 2026
***************
*** 1,4 ****
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k-*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
--- 1,4 ----
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k-*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c	Sun May 10 22:32:11 2026
***************
*** 1,4 ****
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
--- 1,4 ----
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c	Sun May 10 22:32:11 2026
***************
*** 1,4 ****
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
--- 1,4 ----
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c	Sun May 10 22:32:11 2026
***************
*** 1,4 ****
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
--- 1,4 ----
! /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* or1k*-*-* pru*-*-*"} } } */
  
  /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details --param logical-op-non-short-circuit=1" } */
  /* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-23.c gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-23.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-23.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/tree-ssa/ssa-thread-23.c	Thu Jan  1 00:00:00 1970
***************
*** 1,19 ****
- /* PR120003 */
- /* { dg-do compile } */
- /* { dg-options "-O2 -fdump-tree-cddce3-details" } */
- 
- extern _Bool g(int);
- 
- _Bool f()
- {
-   _Bool retval = 0;
-   for(int i=0; i<1000000; ++i)
-     retval = retval || g(i);
-   return retval;
- }
- 
- /* Jump threading after loop optimization should get the counting loop
-    separated from the loop until retval is true and CD-DCE elide it.
-    It's difficult to check for the fact that a true retval terminates
-    the loop so check CD-DCE eliminates one loop instead.  */
- /* { dg-final { scan-tree-dump "fix_loop_structure: removing loop" "cddce3" } } */
--- 0 ----
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/utf-array-short-wchar.c gcc-17-20260510/gcc/testsuite/gcc.dg/utf-array-short-wchar.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/utf-array-short-wchar.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/utf-array-short-wchar.c	Sun May 10 22:32:11 2026
*************** const char32_t	s32_4[]	= u8"ab";	/* { dg
*** 35,43 ****
  
  const char32_t	s32_5[0] = U"ab";	/* { dg-warning " is too long" } */
  const char32_t	s32_6[1] = U"ab";	/* { dg-warning " is too long" } */
! const char32_t	s32_7[2] = U"ab";	/* { dg-warning " is too long" "" { target "m32c-*-*" } } */
! const char32_t	s32_8[3] = U"ab";	/* { dg-warning " is too long" "" { target "m32c-*-*" } } */
! const char32_t	s32_9[4] = U"ab";	/* { dg-warning " is too long" "" { target "m32c-*-*" } } */
  
  const wchar_t	sw_0[]	= "ab";		/* { dg-error "from a string literal with type array of .char." } */
  const wchar_t	sw_1[]	= u"ab";
--- 35,43 ----
  
  const char32_t	s32_5[0] = U"ab";	/* { dg-warning " is too long" } */
  const char32_t	s32_6[1] = U"ab";	/* { dg-warning " is too long" } */
! const char32_t	s32_7[2] = U"ab";
! const char32_t	s32_8[3] = U"ab";
! const char32_t	s32_9[4] = U"ab";
  
  const wchar_t	sw_0[]	= "ab";		/* { dg-error "from a string literal with type array of .char." } */
  const wchar_t	sw_1[]	= u"ab";
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/utf-array.c gcc-17-20260510/gcc/testsuite/gcc.dg/utf-array.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/utf-array.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/utf-array.c	Sun May 10 22:32:11 2026
*************** const char32_t	s32_4[]	= u8"ab";	/* { dg
*** 35,43 ****
  
  const char32_t	s32_5[0] = U"ab";	/* { dg-warning " is too long" } */
  const char32_t	s32_6[1] = U"ab";	/* { dg-warning " is too long" } */
! const char32_t	s32_7[2] = U"ab";	/* { dg-warning " is too long" "" { target "m32c-*-*" } } */
! const char32_t	s32_8[3] = U"ab";	/* { dg-warning " is too long" "" { target "m32c-*-*" } } */
! const char32_t	s32_9[4] = U"ab";	/* { dg-warning " is too long" "" { target "m32c-*-*" } } */
  
  const wchar_t	sw_0[]	= "ab";		/* { dg-error "from a string literal with type array of .char." } */
  const wchar_t	sw_1[]	= u"ab";	/* { dg-error "from a string literal with type array of" "" { target { ! wchar_t_char16_t_compatible } } } */
--- 35,43 ----
  
  const char32_t	s32_5[0] = U"ab";	/* { dg-warning " is too long" } */
  const char32_t	s32_6[1] = U"ab";	/* { dg-warning " is too long" } */
! const char32_t	s32_7[2] = U"ab";
! const char32_t	s32_8[3] = U"ab";
! const char32_t	s32_9[4] = U"ab";
  
  const wchar_t	sw_0[]	= "ab";		/* { dg-error "from a string literal with type array of .char." } */
  const wchar_t	sw_1[]	= u"ab";	/* { dg-error "from a string literal with type array of" "" { target { ! wchar_t_char16_t_compatible } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c gcc-17-20260510/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c
*** gcc-17-20260503/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c	Sun May  3 22:32:10 2026
--- gcc-17-20260510/gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/pr113112-4.c	Sun May 10 22:32:11 2026
*************** void move_replacements (rtx *x, rtx *y,
*** 21,28 ****
        }
  }
  
! /* { dg-final { scan-assembler-not {e64,m2} { xfail *-*-* } } } */
! /* { dg-final { scan-assembler {e64,m4} { xfail *-*-* } } } */
  /* { dg-final { scan-assembler-not {jr} } } */
  /* { dg-final { scan-assembler {ret} } } */
  /* { dg-final { scan-assembler-not {sp} } } */
--- 21,29 ----
        }
  }
  
! /* { dg-final { scan-assembler {e64,m1} } } */
! /* { dg-final { scan-assembler-not {e64,m2} } } */
! /* { dg-final { scan-assembler-not {e64,m4} } } */
  /* { dg-final { scan-assembler-not {jr} } } */
  /* { dg-final { scan-assembler {ret} } } */
  /* { dg-final { scan-assembler-not {sp} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/aarch64/narrow-gp-writes-8.c gcc-17-20260510/gcc/testsuite/gcc.target/aarch64/narrow-gp-writes-8.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/aarch64/narrow-gp-writes-8.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/aarch64/narrow-gp-writes-8.c	Sun May 10 22:32:11 2026
***************
*** 0 ****
--- 1,10 ----
+ /* PR target/124895 */
+ /* { dg-do compile } */
+ /* { dg-options "-Os -fpath-coverage -fno-tree-ccp -fprofile-generate -mnarrow-gp-writes" } */
+ 
+ void
+ foo (unsigned u)
+ {
+   while (u)
+     ;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_2.c gcc-17-20260510/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_2.c	Sun May 10 22:32:11 2026
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-options "-O2 -msve-vector-bits=2048" } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ 
+ #include <arm_sve.h>
+ 
+ /*
+ ** test8:
+ **	tbl	z0\.b, {z0\.b}, z2\.b
+ **	ret
+ */
+ svint8_t
+ test8 (svint8_t x, svint8_t y, svint8_t z)
+ {
+   return __builtin_shuffle (x, y, z);
+ }
+ 
+ svint16_t
+ test16 (svint16_t x, svint16_t y, svint16_t z)
+ {
+   return __builtin_shuffle (x, y, z);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\tand\t} 1 } } */
+ /* { dg-final { scan-assembler-times {\tsub\t} 1 } } */
+ /* { dg-final { scan-assembler-times {\ttbl\t} 3 } } */
+ /* { dg-final { scan-assembler-times {\torr\t} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_3.c gcc-17-20260510/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_3.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/aarch64/sve/vec_perm_3.c	Sun May 10 22:32:11 2026
***************
*** 0 ****
--- 1,22 ----
+ /* { dg-options "-O2 -msve-vector-bits=1024" } */
+ 
+ #include <arm_sve.h>
+ 
+ svint8_t
+ test8 (svint8_t x, svint8_t y, svint8_t z)
+ {
+   return __builtin_shuffle (x, y, z);
+ }
+ 
+ svint16_t
+ test16 (svint16_t x, svint16_t y, svint16_t z)
+ {
+   return __builtin_shuffle (x, y, z);
+ }
+ 
+ /* test8 does not need an AND.  In principle, its subtraction of 128
+    from the selector can be rendered as a SUB, an ADD, or an EOR.  */
+ /* { dg-final { scan-assembler-times {\tand\t} 1 } } */
+ /* { dg-final { scan-assembler-times {\t(?:sub|add|eor)\t} 2 } } */
+ /* { dg-final { scan-assembler-times {\ttbl\t} 4 } } */
+ /* { dg-final { scan-assembler-times {\torr\t} 2 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/arm/muldi-1.c gcc-17-20260510/gcc/testsuite/gcc.target/arm/muldi-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/arm/muldi-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/arm/muldi-1.c	Sun May 10 22:32:11 2026
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ long long ashll_fn (long long a)
+ {
+   long long c;
+ 
+   c = a << 33;
+   c += a;
+   return c;
+ }
+ 
+ /* { dg-final { scan-assembler "add\tr1, r1, r0, lsl #1" } } */
+ /* { dg-final { scan-assembler-not "adc" } } */
+ /* { dg-final { scan-assembler-not "adds" } } */
+ /* { dg-final { scan-assembler-not "lsr" } } */
+ /* { dg-final { scan-assembler-not "orr" } } */
+ /* { dg-final { scan-assembler-not "sbc" } } */
+ /* { dg-final { scan-assembler-not "subs" } } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/bt-8.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/bt-8.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/bt-8.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/bt-8.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mtune=core2" } */
+ 
+ _Bool mask_get_flag(long mask, int offset)
+ {
+   return mask & 1ul << (offset % (__SIZEOF_LONG__ * __CHAR_BIT__));
+ }
+ 
+ /* { dg-final { scan-assembler "bt\[lq\]\[ \t\]" } } */
+ /* { dg-final { scan-assembler-not "sal\[lq\]\[ \t\]" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/builtin-memmove-12.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/builtin-memmove-12.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/builtin-memmove-12.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/builtin-memmove-12.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -mno-avx -msse2 -mtune=generic" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-2.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-2.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-2.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemcpy-strategy=vector_loop:2048:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-3.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-3.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-3.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemcpy-strategy=vector_loop:2048:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-4.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-4.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-4.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-4.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64-v3 -mmemcpy-strategy=vector_loop:2048:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-5.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-5.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-5.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-5.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64-v3 -mmemcpy-strategy=vector_loop:2048:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-6.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-6.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-6.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-6.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64-v4 -mmemcpy-strategy=vector_loop:2048:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-7.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-7.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memcpy-pr120683-7.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memcpy-pr120683-7.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64-v4 -mmemcpy-strategy=vector_loop:2048:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-13.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-13.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-13.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-13.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemset-strategy=vector_loop:256:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-17.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-17.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-17.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-17.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemset-strategy=vector_loop:256:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-18.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-18.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-18.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-18.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemset-strategy=vector_loop:256:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-19.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-19.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-19.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-19.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemset-strategy=vector_loop:256:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-22.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-22.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-22.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-22.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile { target { ! ia32 } } } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -mmemset-strategy=rep_8byte:8192:align,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-23.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-23.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr120683-23.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr120683-23.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -minline-all-stringops -mmemset-strategy=vector_loop:256:noalign,libcall:-1:noalign -fno-pie" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr70308-1b.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr70308-1b.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/memset-pr70308-1b.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/memset-pr70308-1b.c	Sun May 10 22:32:12 2026
***************
*** 1,4 ****
--- 1,5 ----
  /* { dg-do compile } */
+ /* { dg-skip-if "64b Darwin does not support non-PIC" *-*-darwin* } */
  /* { dg-options "-O2 -march=x86-64 -fomit-frame-pointer -DUSE_SCANF -fno-stack-protector" } */
  /* { dg-add-options check_function_bodies } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr124407-1.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr124407-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr124407-1.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr124407-1.c	Sun May 10 22:32:12 2026
*************** foo()
*** 14,17 ****
    v /= f;
  }
  
! /* { dg-final { scan-rtl-dump {\(const_double:SF 0.0 \[0x0.0p\+0\]\)} "x86_cse" { target { ! ia32 } } } } */
--- 14,18 ----
    v /= f;
  }
  
! /* { dg-final { scan-rtl-dump {\(set \(reg:V16QI 125\)} "x86_cse" { target { ! ia32 } } } } */
! /* { dg-final { scan-rtl-dump {\(const_int 0 \[0\]\) repeated x16} "x86_cse" { target { ! ia32 } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-1.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-1.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile { target fpic } } */
+ /* { dg-options "-mtune=generic -O2 -fPIC" } */
+ /* { dg-additional-options "-march=pentiumpro" { target ia32 } } */
+ 
+ struct desc {
+   char c1;
+   char c2;
+ };
+ void
+ foo (struct desc *list, int n, int l)
+ {
+   int j;
+   for (j = 0; j < l; j++)
+     list[j].c1 = list[j].c2 = -1;
+   for (;j < n; j++)
+     list[j].c1 = list[j].c2 = -1;
+ }
+ 
+ /* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$-1, %\[a-z0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-not "__x86.get_pc_thunk" { target ia32 } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-2.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-2.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile { target fpic } } */
+ /* { dg-options "-mtune=generic -O2 -fPIC" } */
+ /* { dg-additional-options "-march=pentiumpro" { target ia32 } } */
+ 
+ struct desc {
+   char c1;
+   char c2;
+ };
+ void
+ foo (struct desc *list, int n, int l)
+ {
+   int j;
+   for (j = 0; j < l; j++)
+     list[j].c1 = list[j].c2 = -1;
+ }
+ 
+ /* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$-1, %\[a-z0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-not "__x86.get_pc_thunk" { target ia32 } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-3.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-3.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile { target fpic } } */
+ /* { dg-options "-mtune=generic -O2 -fPIC" } */
+ /* { dg-additional-options "-march=pentiumpro" { target ia32 } } */
+ 
+ struct desc {
+   char c1;
+   char c2;
+ };
+ void
+ foo (struct desc *list, int n, int l)
+ {
+   int j;
+   for (j = 0; j < l; j++)
+     list[j].c1 = list[j].c2 = 1;
+ }
+ 
+ /* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$257, %\[a-z0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-not "__x86.get_pc_thunk" { target ia32 } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-4.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-4.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125100-4.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125100-4.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile { target { { ! ia32 } && fpic } } } */
+ /* { dg-options "-O2" } */
+ /* { dg-add-options check_function_bodies } */
+ /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+ /* { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {^\t?\.} } } */
+ 
+ /*
+ **foo:
+ **.LFB[0-9]+:
+ **	.cfi_startproc
+ **	movabsq	\$4758053007424749568, %rax
+ **	movq	%rax, \(%rdi\)
+ **	ret
+ **	.cfi_endproc
+ **...
+ */
+ 
+ typedef float v2sf __attribute__((vector_size(8)));
+ 
+ void
+ foo (v2sf *c)
+ {
+   *c =  __extension__(v2sf){34, 34};
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125180.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125180.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125180.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125180.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,14 ----
+ /* PR target/125180 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -masm=att" } */
+ /* { dg-final { scan-assembler "\ttestl\t\\\$1, \\\(" } } */
+ /* { dg-final { scan-assembler-not "\ttestb\t\\\$1, \\\(" } } */
+ 
+ void foo (void);
+ 
+ void
+ bar (unsigned volatile *x)
+ {
+   if (*x & 1)
+     foo ();
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125238.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125238.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125238.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125238.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3 -march=x86-64" } */
+ 
+ extern void bar (const char *, int); 
+ extern char a, b, d, e, k;
+ extern int c, f, g, h, i, j;
+ void
+ foo (void)
+ {
+   while (a) {
+     int *n = &h, *o = &g;
+     bar ("%d", f);
+     for (; c; c++) {
+       int *p = &j;
+       for (b = 0; b < 8; b++) {
+         e = a > 0 ? a : a << 1;
+         k = -e;
+         *n &= (k != *p);
+       }
+       for (; d; d++)
+         i || (*o = *p = 2);
+     }
+   }
+ }
+ 
+ /* { dg-final { scan-assembler "movabsq\[ \\t\]+\\\$8589934594, %r\[a-z0-9\]+" { target { ! ia32 } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125239.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125239.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125239.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125239.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=x86-64 -fno-tree-dse -fno-tree-dce" } */
+ 
+ extern void a (void);
+ void
+ b (void)
+ {
+   int *c, *d, *e[2][20] = {{c}, {c, d, d, d, c, c, d, c}};
+   a ();
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125245.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125245.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/pr125245.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/pr125245.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -march=x86-64" } */
+ 
+ #include <stdint.h>
+ 
+ typedef int16_t v2i16 __attribute__((vector_size(4)));
+ int16_t g5;
+ _Bool g26;
+ void f15(v2i16, int16_t, void *);
+ void
+ f3(void)
+ {
+   v2i16 vec6;
+   goto lbl_br7;
+ lbl_br6:
+   f15(vec6, 0, 0);
+ lbl_br7:
+   vec6[0] = 0;
+ lbl_br10:
+   g5 = vec6[0];
+   vec6[1] = g5;
+   if (g26) goto lbl_br6;
+   g26 = 7;
+   vec6[0] = 0;
+   goto lbl_br10;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c	Sun May 10 22:32:12 2026
*************** FUNC (N5)
*** 151,162 ****
    func##N##ref (array2, len);				\
    if (memcmp (array, array2, len)) __builtin_abort ()
  
! int main ()
  {
-   __builtin_cpu_init ();
-   if (!__builtin_cpu_supports ("gfni"))
-     return 0;
- 
    const unsigned long len = 256;
    char array[len], array2[len];
    unsigned char filler = FILLER;
--- 151,160 ----
    func##N##ref (array2, len);				\
    if (memcmp (array, array2, len)) __builtin_abort ()
  
! __attribute__ ((noipa))
! void
! do_test (void)
  {
    const unsigned long len = 256;
    char array[len], array2[len];
    unsigned char filler = FILLER;
*************** int main ()
*** 195,200 ****
--- 193,203 ----
    TEST (N5, sbyteshiftr);
    TEST (N5, ubyteror);
    TEST (N5, ubyterol);
+ }
  
+ int main ()
+ {
+   if (__builtin_cpu_supports ("gfni"))
+     do_test ();
    return 0;
  }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-2.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-2.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run { target fstack_protector } } */
+ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
+ #ifdef __LP64__
+ uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
+ #else
+ uintptr_t __stack_chk_guard = 0xdd2cc927UL;
+ #endif
+ 
+ void
+ __stack_chk_fail (void)
+ {
+   exit (0); /* pass */
+ }
+ 
+ __attribute__ ((noipa))
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ int
+ main (void)
+ {
+   char foo[255];
+ 
+    /* smash stack */
+   for (int i = 0; i <= 400; i++)
+     smash (foo, i);
+ 
+   return 1;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-3.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-3.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile { target fstack_protector } } */
+ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ extern char *__stack_chk_guard; /* { dg-error "conflicting types for '__stack_chk_guard';" } */
+ 
+ char
+ foo (void)
+ {
+   return *__stack_chk_guard;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-4.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-4.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-4.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-4.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile { target fstack_protector } } */
+ /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ extern char __stack_chk_guard; /* { dg-error "conflicting types for '__stack_chk_guard';" } */
+ 
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-hidden-1.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-hidden-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-hidden-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-hidden-1.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,45 ----
+ /* { dg-do run { target { fstack_protector && fpic } } } */
+ /* { dg-options "-O2 -fPIC -fstack-protector-all -mstack-protector-guard=global -save-temps" } */
+ 
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
+ __attribute__ ((visibility ("hidden")))
+ #ifdef __LP64__
+ uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
+ #else
+ uintptr_t __stack_chk_guard = 0xdd2cc927UL;
+ #endif
+ 
+ void
+ __stack_chk_fail (void)
+ {
+   exit (0); /* pass */
+ }
+ 
+ __attribute__ ((noipa))
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ int
+ main (void)
+ {
+   char foo[255];
+ 
+    /* smash stack */
+   for (int i = 0; i <= 400; i++)
+     smash (foo, i);
+ 
+   return 1;
+ }
+ 
+ /* { dg-final { scan-hidden "__stack_chk_guard" } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard\\(%rip\\)" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOTPCREL" { target { ! ia32 } } } } */
+   /* { dg-final { scan-assembler ".quad	3280087301477736604" { target { lp64 } } } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard@GOTOFF" { target ia32 } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOT\\(" { target ia32 } } } */
+   /* { dg-final { scan-assembler ".long	-584267481" { target { ! lp64 } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-hidden-2.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-hidden-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-hidden-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-hidden-2.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile { target { fstack_protector && fpic } } } */
+ /* { dg-options "-O2 -fPIC -fstack-protector-all -mstack-protector-guard=global" } */
+ 
+ #include <stdint.h>
+ 
+ extern uintptr_t __stack_chk_guard;
+ __attribute__ ((visibility ("hidden")))
+ extern uintptr_t __stack_chk_guard;
+ 
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ /* { dg-final { scan-hidden "__stack_chk_guard" } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard\\(%rip\\)" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOTPCREL" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard@GOTOFF" { target ia32 } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOT\\(" { target ia32 } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-hidden-3.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-hidden-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global-hidden-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global-hidden-3.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do run { target { fstack_protector && fpic } } } */
+ /* { dg-options "-O2 -fPIC -mstack-protector-guard=global -save-temps" } */
+ 
+ #include <stdint.h>
+ #include <stdlib.h>
+ 
+ __attribute__ ((visibility ("hidden")))
+ #ifdef __LP64__
+ uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
+ #else
+ uintptr_t __stack_chk_guard = 0xdd2cc927UL;
+ #endif
+ 
+ void
+ __stack_chk_fail (void)
+ {
+   exit (0); /* pass */
+ }
+ 
+ __attribute__ ((noipa))
+ void
+ smash (char *p, int i)
+ {
+   p[i] = 42;
+ }
+ 
+ __attribute__ ((optimize ("stack-protector-all")))
+ int
+ main (void)
+ {
+   char foo[255];
+ 
+    /* smash stack */
+   for (int i = 0; i <= 400; i++)
+     smash (foo, i);
+ 
+   return 1;
+ }
+ 
+ /* { dg-final { scan-hidden "__stack_chk_guard" } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard\\(%rip\\)" { target { ! ia32 } } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOTPCREL" { target { ! ia32 } } } } */
+   /* { dg-final { scan-assembler ".quad	3280087301477736604" { target { lp64 } } } } */
+ /* { dg-final { scan-assembler "__stack_chk_guard@GOTOFF" { target ia32 } } } */
+ /* { dg-final { scan-assembler-not "__stack_chk_guard@GOT\\(" { target ia32 } } } */
+   /* { dg-final { scan-assembler ".long	-584267481" { target { ! lp64 } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global.c gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/i386/ssp-global.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/i386/ssp-global.c	Sun May 10 22:32:12 2026
***************
*** 1,12 ****
  /* { dg-do run { target fstack_protector } } */
  /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
  
  #include <stdlib.h>
  
  #ifdef __LP64__
! const unsigned long int __stack_chk_guard = 0x2d853605a4d9a09cUL;
  #else
! const unsigned long int __stack_chk_guard = 0xdd2cc927UL;
  #endif
  
  void
--- 1,13 ----
  /* { dg-do run { target fstack_protector } } */
  /* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
  
+ #include <stdint.h>
  #include <stdlib.h>
  
  #ifdef __LP64__
! uintptr_t __stack_chk_guard = 0x2d853605a4d9a09cUL;
  #else
! uintptr_t __stack_chk_guard = 0xdd2cc927UL;
  #endif
  
  void
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/loongarch/pr125049.c gcc-17-20260510/gcc/testsuite/gcc.target/loongarch/pr125049.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/loongarch/pr125049.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/loongarch/pr125049.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,50 ----
+ /* PR 125049: ensure stack canary and its address are not leaked.  */
+ /* { dg-options "-O2 -fstack-protector-strong -ffixed-r30 -ffixed-r31" } */
+ /* { dg-do run } */
+ /* { dg-require-effective-target fstack_protector } */
+ 
+ extern long __stack_chk_guard;
+ register long s7 asm ("s7"), *s8 asm ("s8");
+ 
+ [[gnu::zero_call_used_regs ("all"), gnu::noipa]] void
+ init_test (void)
+ {
+   s7 = __stack_chk_guard;
+   s8 = &__stack_chk_guard;
+ }
+ 
+ [[gnu::always_inline]] static inline void
+ check_reg (void)
+ {
+ #pragma GCC unroll 30
+   for (int i = 4; i < 30; i++)
+     asm goto (
+       "beq $r%0,$s7,%l[error]\n\t"
+       "beq $r%0,$s8,%l[error]\n\t"
+       :
+       : "i" (i)
+       :
+       : error
+     );
+   return;
+ error:
+   __builtin_trap ();
+ }
+ 
+ [[gnu::noipa]] void
+ test (void)
+ {
+   char buf[256];
+   asm ("":"+m"(buf));
+ 
+   check_reg ();
+ }
+ 
+ int
+ main (void)
+ {
+   init_test ();
+   test ();
+ 
+   check_reg ();
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/loongarch/vector/lasx/pr125057.c gcc-17-20260510/gcc/testsuite/gcc.target/loongarch/vector/lasx/pr125057.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/loongarch/vector/lasx/pr125057.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/loongarch/vector/lasx/pr125057.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,25 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mlasx -O2" } */
+ 
+ #include <lasxintrin.h>
+ #include <lsxintrin.h>
+ 
+ #define TEST(to, from)								\
+ __m256i										\
+ vext2xv_##to##_##from (const short *p)						\
+ {										\
+   return __lasx_vext2xv_##to##_##from (__lasx_cast_128 (__lsx_vld (p, 0)));	\
+ }
+ 
+ TEST (h, b)
+ TEST (w, b)
+ TEST (d, b)
+ TEST (w, h)
+ TEST (d, h)
+ TEST (d, w)
+ TEST (hu, bu)
+ TEST (wu, bu)
+ TEST (du, bu)
+ TEST (wu, hu)
+ TEST (du, hu)
+ TEST (du, wu)
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-2.c gcc-17-20260510/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-2.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mlsx -O2" } */
+ 
+ #include <lsxintrin.h>
+ 
+ extern __m128i bar (void);
+ extern int *p;
+ 
+ void
+ foo ()
+ {
+   __lsx_vst (bar(), (void *)p, 0);
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/or1k/pr125155.c gcc-17-20260510/gcc/testsuite/gcc.target/or1k/pr125155.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/or1k/pr125155.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/or1k/pr125155.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ int __pthread_keys_0_0;
+ int
+ ___pthread_key_delete (void)
+ {
+   int result = 22;
+   int __atg3_old = 0;
+   if (__atomic_compare_exchange_n (&__pthread_keys_0_0, &__atg3_old,
+ 				   0, 0, 2, 0))
+     result = 0;
+   return result;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/aes-builtin-1.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/aes-builtin-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/aes-builtin-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/aes-builtin-1.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,155 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ void
+ aes_enc_pair_0 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_encrypt_paired (t, k, 0);
+   *res = c;
+ }
+ void
+ aes_enc_pair_1 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_encrypt_paired (t, k, 1);
+   *res = c;
+ }
+ void
+ aes_enc_pair_2 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_encrypt_paired (t, k, 2);
+   *res = c;
+ }
+ void
+ aes_enc_pair_128 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes128_encrypt_paired (t, k);
+   *res = c;
+ }
+ void
+ aes_enc_pair_192 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes192_encrypt_paired (t, k);
+   *res = c;
+ }
+ void
+ aes_enc_pair_256 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes256_encrypt_paired (t, k);
+   *res = c;
+ }
+ void
+ aes_dec_pair_0 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_decrypt_paired (t, k, 0);
+   *res = c;
+ }
+ void
+ aes_dec_pair_1 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_decrypt_paired (t, k, 1);
+   *res = c;
+ }
+ void
+ aes_dec_pair_2 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_decrypt_paired (t, k, 2);
+   *res = c;
+ }
+ void
+ aes_dec_pair_128 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes128_decrypt_paired (t, k);
+   *res = c;
+ }
+ void
+ aes_dec_pair_192 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes192_decrypt_paired (t, k);
+   *res = c;
+ }
+ void
+ aes_dec_pair_256 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes256_decrypt_paired (t, k);
+   *res = c;
+ }
+ void
+ aes_genlastkey_paired_0 (__vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_genlastkey_paired (k, 0);
+   *res = c;
+ }
+ void
+ aes_genlastkey_paired_1 (__vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_genlastkey_paired (k, 1);
+   *res = c;
+ }
+ void
+ aes_genlastkey_paired_2 (__vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes_genlastkey_paired (k, 2);
+   *res = c;
+ }
+ void
+ aes_genlastkey_paired_128 (__vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes128_genlastkey_paired (k);
+   *res = c;
+ }
+ void
+ aes_genlastkey_paired_192 (__vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes192_genlastkey_paired (k);
+   *res = c;
+ }
+ void
+ aes_genlastkey_paired_256 (__vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair k = *key;
+   __vector_pair c = __builtin_aes256_genlastkey_paired (k);
+   *res = c;
+ }
+ 
+ 
+ /* { dg-final { scan-assembler-times {\mxxaesencp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes128encp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes192encp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes256encp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaesdecp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes128decp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes192decp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes256decp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaesgenlkp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes128genlkp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes192genlkp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes256genlkp\M} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/aes-builtin-2.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/aes-builtin-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/aes-builtin-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/aes-builtin-2.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,34 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ gfmul (vec_t *a, vec_t *b, vec_t *res)
+ {
+   vec_t A = *a;
+   vec_t B = *b;
+   vec_t R = __builtin_galois_field_mult (A, B, 0);
+   R = __builtin_galois_field_mult (R, B, 1);
+   *res = R;
+ }
+ void
+ gfmul_gcm (vec_t *a, vec_t *b, vec_t *res)
+ {
+   vec_t A = *a;
+   vec_t B = *b;
+   vec_t R = __builtin_galois_field_mult_gcm (A, B);
+   *res = R;
+ }
+ void
+ gfmul_xts (vec_t *a, vec_t *b, vec_t *res)
+ {
+   vec_t A = *a;
+   vec_t B = *b;
+   vec_t R = __builtin_galois_field_mult_xts (A, B);
+   *res = R;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mxxgfmul128\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mxxgfmul128gcm\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxgfmul128xts\M} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/aes-builtin-3.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/aes-builtin-3.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/aes-builtin-3.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/aes-builtin-3.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,52 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ void
+ aes_dec_pair (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair lk = __builtin_aes_genlastkey_paired (k, 0);
+   __vector_pair c = __builtin_aes_decrypt_paired (t, lk, 0);
+   lk = __builtin_aes_genlastkey_paired (k, 1);
+   c = __builtin_aes_decrypt_paired (c, lk, 1);
+   lk = __builtin_aes_genlastkey_paired (k, 2);
+   c = __builtin_aes_decrypt_paired (c, lk, 2);
+   *res = c;
+ }
+ void
+ aes_dec_pair_128 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair lk = __builtin_aes128_genlastkey_paired (k);
+   __vector_pair c = __builtin_aes128_decrypt_paired (t, lk);
+   *res = c;
+ }
+ void
+ aes_dec_pair_192 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair lk = __builtin_aes192_genlastkey_paired (k);
+   __vector_pair c = __builtin_aes192_decrypt_paired (t, lk);
+   *res = c;
+ }
+ void
+ aes_dec_pair_256 (__vector_pair *text, __vector_pair *key, __vector_pair *res)
+ {
+   __vector_pair t = *text;
+   __vector_pair k = *key;
+   __vector_pair lk = __builtin_aes256_genlastkey_paired (k);
+   __vector_pair c = __builtin_aes256_decrypt_paired (t, lk);
+   *res = c;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mxxaesdecp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes128decp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes192decp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes256decp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaesgenlkp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes128genlkp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes192genlkp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxaes256genlkp\M} 1 } } */
\ No newline at end of file
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/future-1.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/future-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/future-1.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/future-1.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ /* Basic check to see if the compiler supports -mcpu=future and if it defines
+    _ARCH_FUTURE.  */
+ 
+ #ifndef _ARCH_FUTURE
+ #error "-mcpu=future is not supported"
+ #endif
+ 
+ void foo (void)
+ {
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/future-2.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/future-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/future-2.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/future-2.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ /* Check if we can set the future target via a target attribute.  */
+ 
+ __attribute__((__target__("cpu=power9")))
+ void foo_p9 (void)
+ {
+ }
+ 
+ __attribute__((__target__("cpu=power10")))
+ void foo_p10 (void)
+ {
+ }
+ 
+ __attribute__((__target__("cpu=power11")))
+ void foo_p11 (void)
+ {
+ }
+ 
+ __attribute__((__target__("cpu=future")))
+ void foo_future (void)
+ {
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/pr124637.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/pr124637.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/pr124637.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/pr124637.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile { target { powerpc64-*-* } } } */
+ /* { dg-options "-O2 -m64 -mbig-endian" } */
+ 
+ typedef struct {
+     unsigned short a;
+     unsigned short b;
+     unsigned short c;
+ } S_t;
+ 
+ static const S_t m1 = { 0x20, 1, 1 };
+ 
+ void ext(S_t r);
+ void foo() { ext(m1); }
+ 
+ /* Apologies in advance that these may be a little fragile.  */
+ 
+ /* { dg-final { scan-assembler "lis 3,0x20" } } */
+ /* { dg-final { scan-assembler "ori 3,3,0x1" } } */
+ /* { dg-final { scan-assembler "sldi 3,3,16" } } */
+ /* { dg-final { scan-assembler "ori 3,3,0x1" } } */
+ 
+ /* { dg-final { scan-assembler-not "lis 9,0x20" } } */
+ /* { dg-final { scan-assembler-not "ori 9,9,0x1" } } */
+ /* { dg-final { scan-assembler-not "lis 3,0x1" } } */
+ /* { dg-final { scan-assembler-not "rldimi 3,9,32,0" } } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c	Sun May 10 22:32:12 2026
***************
*** 14,20 ****
  /* { dg-final { scan-assembler "xvrdpip" } } */
  /* { dg-final { scan-assembler "xvrdpiz" } } */
  /* { dg-final { scan-assembler "xvrdpic" } } */
! /* { dg-final { scan-assembler "xvrdpi " } } */
  
  #ifndef SIZE
  #define SIZE 1024
--- 14,20 ----
  /* { dg-final { scan-assembler "xvrdpip" } } */
  /* { dg-final { scan-assembler "xvrdpiz" } } */
  /* { dg-final { scan-assembler "xvrdpic" } } */
! /* { dg-final { scan-assembler-not {\mxvrdpi\M} } } */
  
  #ifndef SIZE
  #define SIZE 1024
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c	Sun May 10 22:32:12 2026
***************
*** 14,20 ****
  /* { dg-final { scan-assembler "xvrspip" } } */
  /* { dg-final { scan-assembler "xvrspiz" } } */
  /* { dg-final { scan-assembler "xvrspic" } } */
! /* { dg-final { scan-assembler "xvrspi " } } */
  
  #ifndef SIZE
  #define SIZE 1024
--- 14,20 ----
  /* { dg-final { scan-assembler "xvrspip" } } */
  /* { dg-final { scan-assembler "xvrspiz" } } */
  /* { dg-final { scan-assembler "xvrspic" } } */
! /* { dg-final { scan-assembler-not {\mxvrspi\M} } } */
  
  #ifndef SIZE
  #define SIZE 1024
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-func-1op.c gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-func-1op.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-func-1op.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-func-1op.c	Sun May 10 22:32:12 2026
***************
*** 10,22 ****
  /* { dg-final { scan-assembler-times {\mxvabssp\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrspip\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrspim\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mxvrspi\M} 1 } } */ 
! /* { dg-final { scan-assembler-times {\mxvrspic\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrspiz\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mxvrdpic\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
--- 10,20 ----
  /* { dg-final { scan-assembler-times {\mxvabssp\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrspip\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrspim\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mxvrspic\M} 2 } } */
  /* { dg-final { scan-assembler-times {\mxvrspiz\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvabsdp\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrdpip\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvrdpim\M} 1 } } */
! /* { dg-final { scan-assembler-times {\mxvrdpic\M} 2 } } */
  /* { dg-final { scan-assembler-times {\mxvrdpiz\M} 1 } } */
  /* { dg-final { scan-assembler-times {\mxvsqrtdp\M} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr106244.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr106244.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr106244.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr106244.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile { target rv64 } } */
+ /* { dg-additional-options "-march=rv64gc_zicond -mabi=lp64d" } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og"} } */
+ 
+ typedef signed char int8_t;
+ int8_t f(int8_t x)
+ {
+     int8_t sh = 1 << x;
+     return sh & 1;
+ }
+ 
+ /* { dg-final { scan-assembler-not "li\t" } } */
+ /* { dg-final { scan-assembler-not "sllw\t" } } */
+ /* { dg-final { scan-assembler-times "andi\t" 1 } } */
+ /* { dg-final { scan-assembler-times "seqz\t" 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr124766.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr124766.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr124766.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr124766.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gcbv_zicond -mabi=lp64d" { target rv64 } } */
+ /* { dg-options "-march=rv32gcbv_zicond -mabi=ilp32" { target rv32 } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ long
+ frob (unsigned short *y, long z)
+ {
+   long ret = (*y << 2) + z;
+   if (ret != z)
+     return 0;
+   return ret;
+ }
+ 
+ /* { dg-final { scan-assembler-not "sh2add" } } */
+ /* { dg-final { scan-assembler-not "sub" } } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr124955.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr124955.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr124955.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr124955.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile { target rv64} } */
+ /* { dg-additional-options "-march=rv64gc_zicond -mabi=lp64d" } */
+ 
+ typedef unsigned int uint32;
+ 
+ uint32 random(uint32 s1) {
+     const uint32 mask = 0xffffffff;
+     s1 = (((s1 & 0xFFFFFFFEU) << 12) & mask);
+     return s1;
+ }
+ 
+ /* { dg-final { scan-assembler-not "slli\t" } } */
+ /* { dg-final { scan-assembler-not "srai\t" } } */
+ /* { dg-final { scan-assembler-times "slliw\t" 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr93504.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr93504.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/pr93504.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/pr93504.c	Sun May 10 22:32:12 2026
***************
*** 0 ****
--- 1,19 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-march=rv64gc_zicond -mabi=lp64d" { target rv64 } } */
+ /* { dg-additional-options "-march=rv32gc_zicond -mabi=ilp32" { target rv32 } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-Og" } } */
+ 
+ #define N 0x202
+ #define OP ^
+ 
+ unsigned f(unsigned a, unsigned b)
+ {
+   unsigned t = a OP b;
+   unsigned t1 = t&N;
+   unsigned t2 = a&~N;
+   return t1 | t2;
+ }
+ 
+ /* { dg-final { scan-assembler-times "andi\t" 1 } } */
+ /* { dg-final { scan-assembler-times "xor\t" 1 } } */
+ /* { dg-final { scan-assembler-not "\tor\t" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-1.c	Sun May 10 22:32:13 2026
*************** void foo8x (long *restrict a, char *rest
*** 37,42 ****
      a[i] = b[i];
  }
  
  /* { dg-final { scan-assembler-times ",m2," 3 } } */
! /* { dg-final { scan-assembler-times ",m4," 2 } } */
! /* { dg-final { scan-assembler-times ",m8," 1 } } */
--- 37,43 ----
      a[i] = b[i];
  }
  
+ /* { dg-final { scan-assembler-times ",m1," 3 } } */
  /* { dg-final { scan-assembler-times ",m2," 3 } } */
! /* { dg-final { scan-assembler-times ",m4," 4 } } */
! /* { dg-final { scan-assembler-times ",m8," 2 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-2.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-2.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-2.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/dyn-lmul-conv-2.c	Sun May 10 22:32:13 2026
*************** void foo8x (unsigned char *restrict a, u
*** 37,43 ****
      a[i] = b[i];
  }
  
! /* { dg-final { scan-assembler-times ",m1," 6 } } */
  /* { dg-final { scan-assembler-times ",m2," 3 } } */
  /* { dg-final { scan-assembler-times ",m4," 1 } } */
  /* { dg-final { scan-assembler-not ",mf2," } } */
--- 37,44 ----
      a[i] = b[i];
  }
  
! /* { dg-final { scan-assembler-times ",m1," 7 } } */
  /* { dg-final { scan-assembler-times ",m2," 3 } } */
  /* { dg-final { scan-assembler-times ",m4," 1 } } */
+ /* { dg-final { scan-assembler-times ",m8," 1 } } */
  /* { dg-final { scan-assembler-not ",mf2," } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-16.c	Sun May 10 22:32:13 2026
*************** f (uint8_t *restrict a, uint8_t *restric
*** 19,26 ****
      }
  }
  
! /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
!    instead of SLP when rvv-autotec-max-lmul=m1.  */
! /* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
! /* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1"} } } } */
  /* { dg-final { scan-assembler-not {\tvmul} } } */
--- 19,25 ----
      }
  }
  
! /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen instead of SLP.  */
! /* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" "-mrvv-max-lmul=m4" "-mrvv-max-lmul=m8" } } } } */
! /* { dg-final { scan-assembler {\tvid\.v} { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" "-mrvv-max-lmul=m4" "-mrvv-max-lmul=m8" } } } } */
  /* { dg-final { scan-assembler-not {\tvmul} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/partial/slp-5.c	Sun May 10 22:32:13 2026
*************** f (int8_t *restrict a, int8_t *restrict
*** 20,24 ****
  }
  
  /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
!    instead of SLP when rvv-autotec-max-lmul=m1.  */
! /* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" } } } } */
--- 20,24 ----
  }
  
  /* FIXME: Since we don't have VECT cost model yet, LOAD_LANES/STORE_LANES are chosen
!    instead of SLP.  */
! /* { dg-final { scan-tree-dump-times "\.VEC_PERM" 1 "optimized" { xfail { any-opts "-mrvv-max-lmul=m1" "-mrvv-max-lmul=m2" } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr122558.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr122558.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr122558.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr122558.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,37 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3 -ftree-vectorize -mabi=lp64d -march=rv64gcv -mrvv-max-lmul=dynamic -fdump-tree-vect-all" } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-O1" "-O2" "-Os" "-Og" "-Oz" } } */
+ 
+ #include <stdint-gcc.h>
+ 
+ void dct( int16_t d[16], int16_t dct[16] )
+ {
+     int16_t tmp[16];
+     for( int i = 0; i < 4; i++ )
+     {
+         int s03 = d[i*4+0] + d[i*4+3];
+         int s12 = d[i*4+1] + d[i*4+2];
+         int d03 = d[i*4+0] - d[i*4+3];
+         int d12 = d[i*4+1] - d[i*4+2];
+         tmp[0*4+i] =   s03 +   s12;
+         tmp[1*4+i] = 2*d03 +   d12;
+         tmp[2*4+i] =   s03 -   s12;
+         tmp[3*4+i] =   d03 - 2*d12;
+     }
+     for( int i = 0; i < 4; i++ )
+     {
+         int s03 = tmp[i*4+0] + tmp[i*4+3];
+         int s12 = tmp[i*4+1] + tmp[i*4+2];
+         int d03 = tmp[i*4+0] - tmp[i*4+3];
+         int d12 = tmp[i*4+1] - tmp[i*4+2];
+ 
+         dct[i*4+0] =   s03 +   s12;
+         dct[i*4+1] = 2*d03 +   d12;
+         dct[i*4+2] =   s03 -   s12;
+         dct[i*4+3] =   d03 - 2*d12;
+     }
+ }
+ 
+ /* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */
+ /* { dg-final { scan-tree-dump "Choosing vector mode RVVMF2QI" "vect" } } */
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr124448.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr124448.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr124448.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr124448.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gcv_zvl128b -mabi=lp64d -O3 -mrvv-vector-bits=zvl  -fdump-rtl-vregs" } */
+ 
+ typedef short int16_t;
+ 
+ void dct( int16_t d[16], int16_t dct[16] )
+ {
+     int16_t tmp[16];
+     for( int i = 0; i < 4; i++ )
+     {
+         int s03 = d[i*4+0] + d[i*4+3];
+         int s12 = d[i*4+1] + d[i*4+2];
+         int d03 = d[i*4+0] - d[i*4+3];
+         int d12 = d[i*4+1] - d[i*4+2];
+         tmp[0*4+i] =   s03 +   s12;
+         tmp[1*4+i] = 2*d03 +   d12;
+         tmp[2*4+i] =   s03 -   s12;
+         tmp[3*4+i] =   d03 - 2*d12;
+     }
+     for( int i = 0; i < 4; i++ )
+     {
+         int s03 = tmp[i*4+0] + tmp[i*4+3];
+         int s12 = tmp[i*4+1] + tmp[i*4+2];
+         int d03 = tmp[i*4+0] - tmp[i*4+3];
+         int d12 = tmp[i*4+1] - tmp[i*4+2];
+ 
+         dct[i*4+0] =   s03 +   s12;
+         dct[i*4+1] = 2*d03 +   d12;
+         dct[i*4+2] =   s03 -   s12;
+         dct[i*4+3] =   d03 - 2*d12;
+     }
+ }
+ 
+ /* { dg-final { scan-assembler-times {vsetivli} 1 } } */
+ /* { dg-final { scan-assembler-not {vslidedown\.vi} } } */
+ /* { dg-final { scan-rtl-dump-not "\(subreg:RVVM2DI \(reg:RVVMF2x4HI.*\).*\)" "vregs" } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc_call-4.c	Sun May 10 22:32:13 2026
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -mrvv-vector-bits=zvl -fno-vect-cost-model -ffast-math" } */
  
  #include "reduc_call-1.c"
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-additional-options "-march=rv32gcv_zvfh -mabi=ilp32d -mrvv-vector-bits=zvl -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */
  
  #include "reduc_call-1.c"
  
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c	Sun May 10 22:32:13 2026
*************** TEST_ALL (PERMUTE1)
*** 65,68 ****
  TEST_ALL (PERMUTE2)
  
  /* { dg-final { scan-assembler-times "vslideup" 48 } } */
! /* { dg-final { scan-assembler-times "vcompress" 96 } } */
--- 65,69 ----
  TEST_ALL (PERMUTE2)
  
  /* { dg-final { scan-assembler-times "vslideup" 48 } } */
! /* { dg-final { scan-assembler-times "vcompress" 84 } } */
! /* { dg-final { scan-assembler-times "vnsrl" 12 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-times {vmsne.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmslt.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmsle.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmsgt.vx} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-times {vmsne.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmslt.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmsle.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmsgt.vx} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 34,36 ****
--- 34,37 ----
  /* { dg-final { scan-assembler-times {vmsne.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmslt.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmsle.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmsgt.vx} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-times {vmsne.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmslt.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmsle.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmsgt.vx} 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c	Sun May 10 22:32:13 2026
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 31,33 ****
--- 31,34 ----
  /* { dg-final { scan-assembler-not {vmsne.vx} } } */
  /* { dg-final { scan-assembler-not {vmslt.vx} } } */
  /* { dg-final { scan-assembler-not {vmsle.vx} } } */
+ /* { dg-final { scan-assembler-not {vmsgt.vx} } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h	Sun May 10 22:32:13 2026
*************** DEF_AVG_CEIL(int32_t, int64_t)
*** 406,411 ****
--- 406,412 ----
    DEF_VX_BINARY_CASE_0_WRAP(T, !=, ne)                            \
    DEF_VX_BINARY_CASE_0_WRAP(T, <, lt)                             \
    DEF_VX_BINARY_CASE_0_WRAP(T, <=, le)                            \
+   DEF_VX_BINARY_CASE_0_WRAP(T, >, gt)                             \
    DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)           \
    DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)           \
    DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min)           \
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h	Sun May  3 22:32:11 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h	Sun May 10 22:32:13 2026
*************** uint64_t TEST_BINARY_DATA(uint64_t, gtu)
*** 7110,7113 ****
--- 7110,7249 ----
    },
  };
  
+ int8_t TEST_BINARY_DATA(int8_t, gt)[][3][N] =
+ {
+   {
+     { 127 },
+     {
+          0,    0,    0,    0,
+         -1,   -1,   -1,   -1,
+        127,  127,  127,  127,
+       -128, -128, -128, -128,
+     },
+     {
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+     },
+   },
+   {
+     { -1 },
+     {
+          0,    0,    0,    0,
+          1,    1,    1,    1,
+         -2,   -2,   -2,   -2,
+       -128, -128, -128, -128,
+     },
+     {
+          1,   1,   1,   1,
+          1,   1,   1,   1,
+          0,   0,   0,   0,
+          0,   0,   0,   0,
+     },
+   },
+ };
+ 
+ int16_t TEST_BINARY_DATA(int16_t, gt)[][3][N] =
+ {
+   {
+     { 32767 },
+     {
+            0,      0,      0,      0,
+           -1,     -1,     -1,     -1,
+        32767,  32767,  32767,  32767,
+       -32768, -32768, -32768, -32768,
+     },
+     {
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+     },
+   },
+   {
+     { -1 },
+     {
+            0,      0,      0,      0,
+            1,      1,      1,      1,
+           -2,     -2,     -2,     -2,
+       -32768, -32768, -32768, -32768,
+     },
+     {
+          1,   1,   1,   1,
+          1,   1,   1,   1,
+          0,   0,   0,   0,
+          0,   0,   0,   0,
+     },
+   },
+ };
+ 
+ int32_t TEST_BINARY_DATA(int32_t, gt)[][3][N] =
+ {
+   {
+     { 2147483647 },
+     {
+                 0,           0,           0,           0,
+                -1,          -1,          -1,          -1,
+        2147483647,  2147483647,  2147483647,  2147483647,
+       -2147483648, -2147483648, -2147483648, -2147483648,
+     },
+     {
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+     },
+   },
+   {
+     { -1 },
+     {
+                 0,           0,           0,           0,
+                 1,           1,           1,           1,
+                -2,          -2,          -2,          -2,
+       -2147483648, -2147483648, -2147483648, -2147483648,
+     },
+     {
+         1,   1,   1,   1,
+         1,   1,   1,   1,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+     },
+   },
+ };
+ 
+ int64_t TEST_BINARY_DATA(int64_t, gt)[][3][N] =
+ {
+   {
+     { 9223372036854775807ll },
+     {
+                             0,                       0,                       0,                       0,
+                            -1,                      -1,                      -1,                      -1,
+         9223372036854775807ll,   9223372036854775807ll,   9223372036854775807ll,   9223372036854775807ll,
+       -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+     },
+     {
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+         0,   0,   0,   0,
+     },
+   },
+   {
+     { -1 },
+     {
+                             0,                       0,                       0,                       0,
+                             1,                       1,                       1,                       1,
+                            -2,                      -2,                      -2,                      -2,
+       -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+     },
+     {
+          1,   1,   1,   1,
+          1,   1,   1,   1,
+          0,   0,   0,   0,
+          0,   0,   0,   0,
+     },
+   },
+ };
+ 
  #endif
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i16.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i16.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i16.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i16.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_binary.h"
+ #include "vx_binary_data.h"
+ 
+ #define T    int16_t
+ #define NAME gt
+ 
+ DEF_VX_BINARY_CASE_0_WRAP(T, >, NAME)
+ 
+ #define TEST_DATA                        TEST_BINARY_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+ 
+ #include "vx_binary_run.h"
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i32.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i32.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i32.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i32.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_binary.h"
+ #include "vx_binary_data.h"
+ 
+ #define T    int32_t
+ #define NAME gt
+ 
+ DEF_VX_BINARY_CASE_0_WRAP(T, >, NAME)
+ 
+ #define TEST_DATA                        TEST_BINARY_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+ 
+ #include "vx_binary_run.h"
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i64.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i64.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i64.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i64.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_binary.h"
+ #include "vx_binary_data.h"
+ 
+ #define T    int64_t
+ #define NAME gt
+ 
+ DEF_VX_BINARY_CASE_0_WRAP(T, >, NAME)
+ 
+ #define TEST_DATA                        TEST_BINARY_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+ 
+ #include "vx_binary_run.h"
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i8.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i8.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i8.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsgt-run-1-i8.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_binary.h"
+ #include "vx_binary_data.h"
+ 
+ #define T    int8_t
+ #define NAME gt
+ 
+ DEF_VX_BINARY_CASE_0_WRAP(T, >, NAME)
+ 
+ #define TEST_DATA                        TEST_BINARY_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(T, NAME, out, in, x, n)
+ 
+ #include "vx_binary_run.h"
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/base/vle-vl1r.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/base/vle-vl1r.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/base/vle-vl1r.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/base/vle-vl1r.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl" } */
+ 
+ #include <riscv_vector.h>
+ 
+ vfloat32m1_t
+ foo (float *a)
+ {
+     vfloat32m1_t a0 = __riscv_vle32_v_f32m1 (a, 4);
+     return a0;
+ }
+ 
+ /* { dg-final { scan-assembler-not "vle32" } } */
+ /* { dg-final { scan-assembler-times "vl1re32.v" 1 } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c	Sun May  3 22:32:12 2026
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c	Sun May 10 22:32:13 2026
*************** void f (int8_t * restrict in, int8_t * r
*** 32,35 ****
  }
  
  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
! /* { dg-final { scan-assembler-times {vsetvli} 3 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" no-opts "-Oz" } } } } */
--- 32,35 ----
  }
  
  /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e32,\s*mf2,\s*tu,\s*mu} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
! /* { dg-final { scan-assembler-times {vsetvli} 2 { target { no-opts "-O0" no-opts "-O1" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" no-opts "-Oz" } } } } */
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gcc.target/riscv/ssp-zcmp.c gcc-17-20260510/gcc/testsuite/gcc.target/riscv/ssp-zcmp.c
*** gcc-17-20260503/gcc/testsuite/gcc.target/riscv/ssp-zcmp.c	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gcc.target/riscv/ssp-zcmp.c	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,42 ----
+ /* { dg-do compile } */
+ /* { dg-options "-Os -march=rv32g_zcmp_zcmop_zicfiss -mabi=ilp32d -fcf-protection=return" } */
+ /* { dg-skip-if "needs -Os" { *-*-* } { "-O0" "-O1" "-O2" "-O3" "-Og" "-Oz" } { "" } } */
+ /* { dg-final { check-function-bodies "**" "" } } */
+ /* { dg-final { scan-assembler-not {cm\.popret} } } */
+ 
+ int printf (const char *, ...);
+ 
+ /*
+ ** printSomething:
+ **	sspush	ra
+ **	...
+ **	cm\.push	\{ra, s0-s2\}, -32
+ **	...
+ **	cm\.pop	\{ra, s0-s2\}, 32
+ **	sspopchk	ra
+ **	jr	ra
+ **  ...
+ */
+ int printSomething (int arr[], int len) {
+   for (int i = 0; i < len; i++)
+     printf ("Val[%d]: %d\n", i, arr[i]);
+   return len;
+ }
+ 
+ extern int sibcallee (int);
+ extern void other (void);
+ 
+ /*
+ ** sibcaller:
+ **	sspush	ra
+ **	cm\.push	\{ra\}, -32
+ **	...
+ **	cm\.pop	\{ra\}, 32
+ **	...
+ **	sspopchk	ra
+ **	tail	sibcallee
+ */
+ int sibcaller (int x) {
+   other ();
+   return sibcallee (x + 1);
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gdc.dg/pr125089.d gcc-17-20260510/gcc/testsuite/gdc.dg/pr125089.d
*** gcc-17-20260503/gcc/testsuite/gdc.dg/pr125089.d	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gdc.dg/pr125089.d	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,20 ----
+ // { dg-do compile }
+ struct R125089
+ {
+     S125089.T st;
+ }
+ 
+ struct S125089
+ {
+     struct T
+     {
+         void* v;
+         ~this() {}
+     }
+ 
+     T t;
+     this(R125089 r)
+     {
+         this.t = r.st;
+     }
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gfortran.dg/associate_79.f90 gcc-17-20260510/gcc/testsuite/gfortran.dg/associate_79.f90
*** gcc-17-20260503/gcc/testsuite/gfortran.dg/associate_79.f90	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gfortran.dg/associate_79.f90	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,34 ----
+ ! { dg-do run }
+ !
+ ! Verify that an associate-name whose target is a call to an internal
+ ! procedure (CONTAINS in a program) gets the correct declared kind from
+ ! the function's return type, instead of falling back to default kind.
+ !
+ program demo
+   use, intrinsic :: iso_fortran_env, only: wp => real64
+   implicit none
+   complex(wp) :: z
+   real(wp) :: re_ref, im_ref
+ 
+   z = (1.0_wp, 2.0_wp)
+   re_ref = real (sin (z), wp)
+   im_ref = aimag (sin (z))
+ 
+   associate (k => myfunc (z))
+     if (kind (k%re) /= kind (1.0_wp)) stop 1
+     if (kind (k%im) /= kind (1.0_wp)) stop 2
+     if (kind (aimag (k)) /= kind (1.0_wp)) stop 3
+     if (abs (k%re - re_ref) > 1.0e-12_wp) stop 4
+     if (abs (k%im - im_ref) > 1.0e-12_wp) stop 5
+     if (abs (aimag (k) - im_ref) > 1.0e-12_wp) stop 6
+   end associate
+ 
+ contains
+ 
+   complex(wp) function myfunc (x)
+     complex(wp), intent(in) :: x
+     myfunc = sin (x)
+   end function myfunc
+ 
+ end program demo
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gfortran.dg/bounds_check_29.f90 gcc-17-20260510/gcc/testsuite/gfortran.dg/bounds_check_29.f90
*** gcc-17-20260503/gcc/testsuite/gfortran.dg/bounds_check_29.f90	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gfortran.dg/bounds_check_29.f90	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,62 ----
+ ! { dg-do run }
+ ! { dg-additional-options "-fcheck=bounds" }
+ !
+ ! Check that if an array descriptor reference uses variables, they are
+ ! not used uninitialized by the bounds-checking code.
+ 
+ 
+ ! PR fortran/125192
+ ! Original example from Philippe Wautelet <philippe.wautelet at cnrs dot fr>
+ 
+ subroutine boundcheck_bug
+   implicit none
+ 
+   type isba_pe_t
+     real, pointer, dimension(:,:) :: xwg
+   end type isba_pe_t
+   type isba_npe_t
+     type(isba_pe_t), dimension(:), pointer :: al=>null()
+   end type isba_npe_t
+   type(isba_npe_t) :: npe
+ 
+   allocate(npe%al(10))
+   allocate(npe%al(1)%xwg(3,4))
+ 
+   call random_number( npe%al(1)%xwg(:,3) )
+ end subroutine boundcheck_bug
+ 
+ 
+ ! PR fortran/125198
+ ! Original example from Neil Carlson <neil.n.carlson at gmail dot com>
+ 
+ module unstr_mesh_type
+   type unstr_mesh
+     real, allocatable :: normal(:,:)
+   contains
+     procedure :: compute_geometry
+   end type
+ contains
+   subroutine compute_geometry(this)
+     class(unstr_mesh), intent(inout) :: this
+     character(64) :: buf
+     !print *, this%normal(1,1) ! THIS IS OKAY
+     write(buf,*) this%normal(1,1)
+     if (trim(buf) /= '   0.00000000') error stop 1
+     !print *, this%normal(:,1) ! SPURIOUS BOUNDS ERROR HERE
+     write(buf,*) this%normal(:,1)
+     if (trim(buf) /= '   0.00000000       0.00000000       0.00000000') error stop 2
+     !if (any(this%normal(:,1) /= 0.0)) error stop 2
+   end subroutine
+ end module
+ 
+ subroutine test_pr125198
+ use unstr_mesh_type
+ type(unstr_mesh) :: mesh
+ allocate(mesh%normal(3,10), source=0.0)
+ call mesh%compute_geometry
+ end subroutine
+ 
+ 
+ call boundcheck_bug
+ call test_pr125198
+ end
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gfortran.dg/coarray/pr125051.f90 gcc-17-20260510/gcc/testsuite/gfortran.dg/coarray/pr125051.f90
*** gcc-17-20260503/gcc/testsuite/gfortran.dg/coarray/pr125051.f90	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gfortran.dg/coarray/pr125051.f90	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,34 ----
+ !{ dg-do link }
+ 
+ ! Contributed by Paul Thomas  <pault@gcc.gnu.org>
+ ! Check PR fortran/125051 is fixed.
+ 
+ module m
+   integer, parameter :: ncells = 8, nsize = ncells+2
+   integer, parameter :: head =2, tail = ncells + 1
+   real :: second_derivative(ncells+2, ncells+2)
+   type :: density_t
+     real :: density(nsize)
+     real:: derivative(nsize)
+   end type
+   type (density_t) :: n[*]
+   real :: n_tail[*] = 0.0
+   real :: n_head[*] = 0.0
+ contains
+   subroutine sub
+     integer :: image_no
+     image_no = this_image()
+     sync all
+     if (image_no > 1) n_head = n[image_no -1]%density(tail)
+     if (image_no < num_images()) n_tail = n[image_no +1]%density(head)
+     sync all
+   end
+ end module
+ 
+ program main
+   use m
+   implicit none
+   call sub
+ contains
+ end program
+ 
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gfortran.dg/dtio_37.f90 gcc-17-20260510/gcc/testsuite/gfortran.dg/dtio_37.f90
*** gcc-17-20260503/gcc/testsuite/gfortran.dg/dtio_37.f90	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gfortran.dg/dtio_37.f90	Sun May 10 22:32:13 2026
***************
*** 0 ****
--- 1,36 ----
+ ! { dg-do run }
+ ! { dg-additional-options "-O2" }
+ !
+ ! PR fortran/125059 - derived type IO and automatic deallocation
+ ! PR fortran/111952
+ 
+ module m
+   type t
+      integer :: i = 42
+    contains
+      procedure :: w
+      generic :: write(formatted) => w
+   end type t
+ contains
+   subroutine w(dtv,unit,iotype,v_list,iostat,iomsg)
+     class(t),        intent(in)    :: dtv
+     integer,         intent(in)    :: unit
+     character(len=*),intent(in)    :: iotype
+     integer,         intent(in)    :: v_list(:)
+     integer,         intent(out)   :: iostat
+     character(len=*),intent(inout) :: iomsg
+     write(unit,*,iostat=iostat,iomsg=iomsg) dtv%i
+   end subroutine w
+ end
+ 
+ program p
+   use m
+   call f()
+   call f()
+ contains
+   subroutine f()
+     type(t), allocatable :: a(:)
+     allocate (a(1))
+     print *, a(1)
+   end subroutine f
+ end
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gfortran.dg/namelist_102.f90 gcc-17-20260510/gcc/testsuite/gfortran.dg/namelist_102.f90
*** gcc-17-20260503/gcc/testsuite/gfortran.dg/namelist_102.f90	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gfortran.dg/namelist_102.f90	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,248 ----
+ ! { dg-do run }
+ ! { dg-additional-options "-O2" }
+ !
+ ! PR fortran/125095 - test namelist read with comments
+ !
+ ! Based on testcases by Andy Nelson and Steven G. Kargl
+ 
+ program nmlbug
+   implicit none
+   call test_int
+   call test_real
+   call test_complex
+   call test_logical
+   call test_char
+ 
+ contains
+ 
+   subroutine test_int
+ 
+     integer :: array(4), barray(4), carray(4), darray(4)
+ 
+     namelist/nml1/  array
+     namelist/nml2/ barray
+     namelist/nml3/ carray
+     namelist/nml4/ darray
+ 
+     open(10,status='scratch')
+     write(10,'(A)') '&nml1'
+     write(10,'(A)') '  array = 1, 2, 3, 4,'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml2'
+     write(10,'(A)') '  barray = 5,    ! comment'
+     write(10,'(A)') '           6,'
+     write(10,'(A)') '           7     ! another comment'
+     write(10,'(A)') '           8,'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml3'
+     write(10,'(A)') '  carray =  9     ! New comment'
+     write(10,'(A)') '           10'
+     write(10,'(A)') '           11     ! another new comment'
+     write(10,'(A)') '           12'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml4'
+     write(10,'(A)') '  darray = 13, 14, 15, 16,'
+     write(10,'(A)') '/'
+     flush(10)
+     rewind(10)
+ 
+     read(10,nml1)
+     if (any( array /= [ 1,  2,  3,  4])) stop 1
+     read(10,nml2)
+     if (any(barray /= [ 5,  6,  7,  8])) stop 2
+     read(10,nml3)
+     if (any(carray /= [ 9, 10, 11, 12])) stop 3
+     read(10,nml4)
+     if (any(darray /= [13, 14, 15, 16])) stop 4
+     close(10)
+ 
+   end subroutine test_int
+ 
+   subroutine test_real
+ 
+     real :: array(4), barray(4), carray(4), darray(4)
+ 
+     namelist/nml1/  array
+     namelist/nml2/ barray
+     namelist/nml3/ carray
+     namelist/nml4/ darray
+ 
+     open(10,status='scratch')
+     write(10,'(A)') '&nml1'
+     write(10,'(A)') '  array = 1, 2, 3, 4,'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml2'
+     write(10,'(A)') '  barray = 5,    ! comment'
+     write(10,'(A)') '           6,'
+     write(10,'(A)') '           7     ! another comment'
+     write(10,'(A)') '           8,'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml3'
+     write(10,'(A)') '  carray =  9     ! New comment'
+     write(10,'(A)') '           10'
+     write(10,'(A)') '           11     ! another new comment'
+     write(10,'(A)') '           12'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml4'
+     write(10,'(A)') '  darray = 13, 14, 15, 16,'
+     write(10,'(A)') '/'
+     flush(10)
+     rewind(10)
+ 
+     read(10,nml1)
+     if (any( array /= [ 1,  2,  3,  4])) stop 1
+     read(10,nml2)
+     if (any(barray /= [ 5,  6,  7,  8])) stop 2
+     read(10,nml3)
+     if (any(carray /= [ 9, 10, 11, 12])) stop 3
+     read(10,nml4)
+     if (any(darray /= [13, 14, 15, 16])) stop 4
+     close(10)
+ 
+   end subroutine test_real
+ 
+   subroutine test_complex
+ 
+     complex :: array(4), barray(4), carray(4), darray(4)
+ 
+     namelist/nml1/  array
+     namelist/nml2/ barray
+     namelist/nml3/ carray
+     namelist/nml4/ darray
+ 
+     open(10,status='scratch')
+     write(10,'(A)') '&nml1'
+     write(10,'(A)') '  array = (1,0), (2,0), (3,0), (4,0),'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml2'
+     write(10,'(A)') '  barray = (5,0),    ! comment'
+     write(10,'(A)') '           (6,0),'
+     write(10,'(A)') '           (7,0)     ! another comment'
+     write(10,'(A)') '           (8,0),'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml3'
+     write(10,'(A)') '  carray =  (9,0)     ! New comment'
+     write(10,'(A)') '           (10,0)'
+     write(10,'(A)') '           (11,0)     ! another new comment'
+     write(10,'(A)') '           (12,0)'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml4'
+     write(10,'(A)') '  darray = (13,0), (14,0), (15,0), (16,0),'
+     write(10,'(A)') '/'
+     flush(10)
+     rewind(10)
+ 
+     read(10,nml1)
+     if (any( array /= [ 1,  2,  3,  4])) stop 1
+     read(10,nml2)
+     if (any(barray /= [ 5,  6,  7,  8])) stop 2
+     read(10,nml3)
+     if (any(carray /= [ 9, 10, 11, 12])) stop 3
+     read(10,nml4)
+     if (any(darray /= [13, 14, 15, 16])) stop 4
+     close(10)
+ 
+   end subroutine test_complex
+ 
+   subroutine test_logical
+ 
+     logical :: array(4), barray(4), carray(4), darray(4)
+ 
+     namelist/nml1/  array
+     namelist/nml2/ barray
+     namelist/nml3/ carray
+     namelist/nml4/ darray
+ 
+     open(10,status='scratch')
+     write(10,'(A)') '&nml1'
+     write(10,'(A)') '  array = T,F,F,T'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml2'
+     write(10,'(A)') '  barray = T,    ! comment'
+     write(10,'(A)') '           F,'
+     write(10,'(A)') '           F     ! another comment'
+     write(10,'(A)') '           T,'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml3'
+     write(10,'(A)') '  carray =  T     ! New comment'
+     write(10,'(A)') '            F'
+     write(10,'(A)') '            F     ! another new comment'
+     write(10,'(A)') '            T'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml4'
+     write(10,'(A)') '  darray =  T,F,F,T'
+     write(10,'(A)') '/'
+     flush(10)
+     rewind(10)
+ 
+     read(10,nml1)
+     if (any( array .neqv. [ .true.,.false.,.false.,.true. ])) stop 1
+     read(10,nml2)
+     if (any(barray .neqv. [ .true.,.false.,.false.,.true. ])) stop 2
+     read(10,nml3)
+     if (any(carray .neqv. [ .true.,.false.,.false.,.true. ])) stop 3
+     read(10,nml4)
+     if (any(darray .neqv. [ .true.,.false.,.false.,.true. ])) stop 4
+     close(10)
+ 
+   end subroutine test_logical
+ 
+   subroutine test_char
+ 
+     character(8) :: array(4), barray(4), carray(4), darray(4)
+ 
+     namelist/nml1/  array
+     namelist/nml2/ barray
+     namelist/nml3/ carray
+     namelist/nml4/ darray
+ 
+     open(10,status='scratch')
+     write(10,'(A)') '&nml1'
+     write(10,'(A)') '  array = "a", "b", "c", "d",'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml2'
+     write(10,'(A)') '  barray = "a",    ! comment'
+     write(10,'(A)') '           "b",'
+     write(10,'(A)') '           "c"     ! another comment'
+     write(10,'(A)') '           "d",'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml3'
+     write(10,'(A)') '  carray = "a"     ! New comment'
+     write(10,'(A)') '           "b"'
+     write(10,'(A)') '           "c"     ! another new comment'
+     write(10,'(A)') '           "d"'
+     write(10,'(A)') '/'
+     write(10,*)
+     write(10,'(A)') '&nml4'
+     write(10,'(A)') '  darray = "a", "b", "c", "d",'
+     write(10,'(A)') '/'
+     flush(10)
+     rewind(10)
+ 
+     read(10,nml1)
+     if (any( array /= [ "a", "b", "c", "d" ])) stop 1
+     read(10,nml2)
+     if (any(barray /= [ "a", "b", "c", "d" ])) stop 2
+     read(10,nml3)
+     if (any(carray /= [ "a", "b", "c", "d" ])) stop 3
+     read(10,nml4)
+     if (any(darray /= [ "a", "b", "c", "d" ])) stop 4
+     close(10)
+ 
+   end subroutine test_char
+ 
+ end program nmlbug
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/README gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/README
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/README	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/README	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1 ----
+ This source code appears in the documentation section Building a shared library.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.def gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.def
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.def	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.def	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,3 ----
+ DEFINITION MODULE a ;
+ 
+ END a.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.mod gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.mod
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.mod	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/a.mod	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,9 ----
+ IMPLEMENTATION MODULE a ;
+ 
+ FROM libc IMPORT printf ;
+ 
+ BEGIN
+    printf ("init: module a\n")
+ FINALLY
+    printf ("finish: module a\n")
+ END a.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.def gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.def
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.def	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.def	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,3 ----
+ DEFINITION MODULE b ;
+ 
+ END b.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.mod gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.mod
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.mod	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/b.mod	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,11 ----
+ IMPLEMENTATION MODULE b ;
+ 
+ IMPORT a ;
+ FROM libc IMPORT printf ;
+ 
+ 
+ BEGIN
+    printf ("init: module b\n")
+ FINALLY
+    printf ("finish: module b\n")
+ END b.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.def gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.def
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.def	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.def	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,3 ----
+ DEFINITION MODULE c ;
+ 
+ END c.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.mod gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.mod
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.mod	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/c.mod	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,10 ----
+ IMPLEMENTATION MODULE c ;
+ 
+ IMPORT b ;
+ FROM libc IMPORT printf ;
+ 
+ BEGIN
+    printf ("init: module c\n")
+ FINALLY
+    printf ("finish: module c\n")
+ END c.
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/test.cc gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/test.cc
*** gcc-17-20260503/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/test.cc	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gm2/examples/cppcallingm2/run/pass/test.cc	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,54 ----
+ #include <stdio.h>
+ #include <m2/m2iso/m2rts.h>
+ 
+ #define USER_LIB NULL
+ 
+ /* Add the runtime dependency for this file on modules a, b and c.  */
+ 
+ void
+ dep (void)
+ {
+   m2iso_M2RTS_RequestDependant (__FILE__, USER_LIB, "c", USER_LIB);
+   m2iso_M2RTS_RequestDependant (__FILE__, USER_LIB, "b", USER_LIB);
+   m2iso_M2RTS_RequestDependant (__FILE__, USER_LIB, "a", USER_LIB);
+ }
+ 
+ void
+ init (int, char *[], char *[])
+ {
+   printf ("test.c:init\n");
+ }
+ 
+ void
+ fini (int, char *[], char *[])
+ {
+   printf ("test.c:fini\n");
+ }
+ 
+ void
+ construct_scaffold (int argc, char *argv[], char *envp[])
+ {
+   m2iso_M2RTS_RegisterModule (__FILE__, USER_LIB,
+                               init, fini, dep);
+   m2iso_M2RTS_ConstructModules (__FILE__, USER_LIB,
+                                 DEFAULT_RUNTIME_MODULE_OVERRIDE,
+                                 argc, argv, envp);
+ }
+ 
+ void
+ deconstruct_scaffold (int argc, char *argv[], char *envp[])
+ {
+   m2iso_M2RTS_DeconstructModules (__FILE__, USER_LIB,
+                                   argc, argv, envp);
+ }
+ 
+ int
+ main (int argc, char *argv[], char *envp[])
+ {
+   printf ("main starts\n");
+   construct_scaffold (argc, argv, envp);
+   printf ("main application goes here\n");
+   deconstruct_scaffold (argc, argv, envp);
+   printf ("main tidying up\n");
+   return 0;
+ }
diff -Nrcpad gcc-17-20260503/gcc/testsuite/gnat.dg/enum6.adb gcc-17-20260510/gcc/testsuite/gnat.dg/enum6.adb
*** gcc-17-20260503/gcc/testsuite/gnat.dg/enum6.adb	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/gcc/testsuite/gnat.dg/enum6.adb	Sun May 10 22:32:14 2026
***************
*** 0 ****
--- 1,43 ----
+ --  { dg-do run }
+ 
+ procedure Enum6 is
+ 
+   type Base_Enum is (Ten, Twenty);
+ 
+   type Derived_Enum is new Base_Enum;
+   for Derived_Enum use (Ten => 10, Twenty => 20);
+ 
+   type Rep_Enum is (Ten, Twenty);
+   for Rep_Enum use (Ten => 10, Twenty => 20);
+ 
+   OK : Boolean := True;
+ 
+ begin
+   for E in Base_Enum loop
+     if (E = Ten and then Base_Enum'Image(E) /= "TEN")
+       or else (E = Twenty and then Base_Enum'Image(E) /= "TWENTY")
+     then
+       OK := False;
+     end if;
+   end loop;
+ 
+   for E in Derived_Enum loop
+     if (E = Ten and then Derived_Enum'Image(E) /= "TEN")
+        or else (E = Twenty and then Derived_Enum'Image(E) /= "TWENTY")
+     then
+       OK := False;
+     end if;
+   end loop;
+ 
+   for E in Rep_Enum loop
+     if (E = Ten and then Rep_Enum'Image(E) /= "TEN")
+       or else (E = Twenty and then Rep_Enum'Image(E) /= "TWENTY")
+     then
+       OK := False;
+     end if;
+   end loop;
+ 
+   if not OK then
+     raise Program_Error;
+   end if;
+ end;
diff -Nrcpad gcc-17-20260503/gcc/testsuite/lib/lto.exp gcc-17-20260510/gcc/testsuite/lib/lto.exp
*** gcc-17-20260503/gcc/testsuite/lib/lto.exp	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/testsuite/lib/lto.exp	Sun May 10 22:32:14 2026
*************** proc lto-execute-1 { src1 sid } {
*** 711,719 ****
      set i 1
      set done 0
      while { !$done } {
! 	set names [glob -nocomplain -types f -- "${dir}/${base}_${i}.{c,C,ii,\[fF\]{,90,95,03,08},d,m,mm}"]
  	if { [llength ${names}] > 1 } {
! 	    warning "lto-execute: more than one file matched ${dir}/${base}_${i}.{c,C,ii,\[fF\]{,90,95,03,08},d,m,mm}"
  	}
  	if { [llength ${names}] == 1 } {
  	    lappend src_list [lindex ${names} 0]
--- 711,729 ----
      set i 1
      set done 0
      while { !$done } {
! 	set prefix "${dir}/${base}_${i}"
! 
! 	# glob returns a case insensitive list if filesystem is case
! 	# insensitive.  To have a case sensitive list, fetch the extended list
! 	# and then filter it to avoid duplicates.
! 	regsub -all {([.^$*+?()$${}|])} $prefix {\\\1} pattern
! 	set pattern [format {^%s.(c|C|ii|[fF](|90|95|03|08)|d|m|mm)$} $pattern]
! 	set names [lsearch -inline -all -regexp \
! 	  [glob -nocomplain -types f -- "${prefix}.*"] $pattern]
! 
  	if { [llength ${names}] > 1 } {
! 	    warning "lto-execute: more than one file matched $pattern"
! 	    verbose "matching files: $names"
  	}
  	if { [llength ${names}] == 1 } {
  	    lappend src_list [lindex ${names} 0]
diff -Nrcpad gcc-17-20260503/gcc/testsuite/lib/target-supports.exp gcc-17-20260510/gcc/testsuite/lib/target-supports.exp
*** gcc-17-20260503/gcc/testsuite/lib/target-supports.exp	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/testsuite/lib/target-supports.exp	Sun May 10 22:32:14 2026
*************** proc check_effective_target_variadic_mi_
*** 670,676 ****
  	 || [istarget h8300-*-*]
  	 || [istarget iq2000-*-*]
  	 || [istarget lm32-*-*]
- 	 || [istarget m32c-*-*]
  	 || [istarget m32r-*-*]
  	 || [istarget mcore-*-*]
  	 || [istarget moxie-*-*]
--- 670,675 ----
*************** proc check_profiling_available { test_wh
*** 860,866 ****
  	     || [istarget fido-*-elf]
  	     || [istarget h8300-*-*]
  	     || [istarget lm32-*-*]
- 	     || [istarget m32c-*-elf]
  	     || [istarget m68k-*-elf]
  	     || [istarget m68k-*-uclinux*]
  	     || [istarget mips*-*-elf*]
--- 859,864 ----
*************** proc check_effective_target_natural_alig
*** 9236,9242 ****
  	   || [istarget rl78-*-*]
  	   || [istarget pdp11-*-*]
  	   || [istarget msp430-*-*]
- 	   || [istarget m32c-*-*]
  	   || [istarget cris-*-*] } {
  	   return 0
  	 } else {
--- 9234,9239 ----
diff -Nrcpad gcc-17-20260503/gcc/tree-cfg.cc gcc-17-20260510/gcc/tree-cfg.cc
*** gcc-17-20260503/gcc/tree-cfg.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-cfg.cc	Sun May 10 22:32:14 2026
*************** gimple_account_profile_record (basic_blo
*** 9359,9366 ****
      }
  }
  
! struct cfg_hooks gimple_cfg_hooks = {
!   "gimple",
    gimple_verify_flow_info,
    gimple_dump_bb,		/* dump_bb  */
    gimple_dump_bb_for_graph,	/* dump_bb_for_graph  */
--- 9359,9366 ----
      }
  }
  
! const struct cfg_hooks gimple_cfg_hooks = {
!   IR_GIMPLE,
    gimple_verify_flow_info,
    gimple_dump_bb,		/* dump_bb  */
    gimple_dump_bb_for_graph,	/* dump_bb_for_graph  */
diff -Nrcpad gcc-17-20260503/gcc/tree-cfgcleanup.cc gcc-17-20260510/gcc/tree-cfgcleanup.cc
*** gcc-17-20260503/gcc/tree-cfgcleanup.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-cfgcleanup.cc	Sun May 10 22:32:14 2026
*************** cleanup_control_expr_graph (basic_block
*** 240,246 ****
  
    bitmap_set_bit (cfgcleanup_altered_bbs, bb->index);
    gsi_remove (&gsi, true);
!   taken_edge->flags = EDGE_FALLTHRU;
  
    return retval;
  }
--- 240,247 ----
  
    bitmap_set_bit (cfgcleanup_altered_bbs, bb->index);
    gsi_remove (&gsi, true);
!   taken_edge->flags &= ~(EDGE_TRUE_VALUE|EDGE_FALSE_VALUE);
!   taken_edge->flags |= EDGE_FALLTHRU;
  
    return retval;
  }
diff -Nrcpad gcc-17-20260503/gcc/tree-chrec.cc gcc-17-20260510/gcc/tree-chrec.cc
*** gcc-17-20260503/gcc/tree-chrec.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-chrec.cc	Sun May 10 22:32:14 2026
*************** chrec_fold_plus_poly_poly (enum tree_cod
*** 53,59 ****
    tree left, right;
    class loop *loop0 = get_chrec_loop (poly0);
    class loop *loop1 = get_chrec_loop (poly1);
-   tree rtype = code == POINTER_PLUS_EXPR ? chrec_type (poly1) : type;
  
    gcc_assert (poly0);
    gcc_assert (poly1);
--- 53,58 ----
*************** chrec_fold_plus_poly_poly (enum tree_cod
*** 112,117 ****
--- 111,117 ----
  
    if (code == PLUS_EXPR || code == POINTER_PLUS_EXPR)
      {
+       tree rtype = code == POINTER_PLUS_EXPR ? chrec_type (poly1) : type;
        left = chrec_fold_plus
  	(type, CHREC_LEFT (poly0), CHREC_LEFT (poly1));
        right = chrec_fold_plus
diff -Nrcpad gcc-17-20260503/gcc/tree-diagnostic.h gcc-17-20260510/gcc/tree-diagnostic.h
*** gcc-17-20260503/gcc/tree-diagnostic.h	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-diagnostic.h	Sun May 10 22:32:14 2026
*************** public:
*** 71,77 ****
    }
    ~tree_dump_pretty_printer ()
    {
!     pp_flush (this);
    }
  };
  
--- 71,78 ----
    }
    ~tree_dump_pretty_printer ()
    {
!     if (pp_buffer (this)->m_stream)
!       pp_flush (this);
    }
  };
  
diff -Nrcpad gcc-17-20260503/gcc/tree-ssa-forwprop.cc gcc-17-20260510/gcc/tree-ssa-forwprop.cc
*** gcc-17-20260503/gcc/tree-ssa-forwprop.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-ssa-forwprop.cc	Sun May 10 22:32:14 2026
*************** simplify_vector_constructor (gimple_stmt
*** 4258,4264 ****
  			   ? 0 : refnelts) + i);
        vec_perm_indices indices (sel, orig[1] ? 2 : 1, refnelts);
        machine_mode vmode = TYPE_MODE (perm_type);
!       if (!can_vec_perm_const_p (vmode, vmode, indices))
  	return false;
        mask_type = build_vector_type (ssizetype, refnelts);
        tree op2 = vec_perm_indices_to_tree (mask_type, indices);
--- 4258,4265 ----
  			   ? 0 : refnelts) + i);
        vec_perm_indices indices (sel, orig[1] ? 2 : 1, refnelts);
        machine_mode vmode = TYPE_MODE (perm_type);
!       if ((cfun->curr_properties & PROP_gimple_lvec)
! 	  && !can_vec_perm_const_p (vmode, vmode, indices))
  	return false;
        mask_type = build_vector_type (ssizetype, refnelts);
        tree op2 = vec_perm_indices_to_tree (mask_type, indices);
*************** simplify_vector_constructor (gimple_stmt
*** 4323,4329 ****
  			    ? elts[i].second + nelts : i);
  	  vec_perm_indices indices (sel, 2, nelts);
  	  machine_mode vmode = TYPE_MODE (type);
! 	  if (!can_vec_perm_const_p (vmode, vmode, indices))
  	    return false;
  	  mask_type = build_vector_type (ssizetype, nelts);
  	  blend_op2 = vec_perm_indices_to_tree (mask_type, indices);
--- 4324,4331 ----
  			    ? elts[i].second + nelts : i);
  	  vec_perm_indices indices (sel, 2, nelts);
  	  machine_mode vmode = TYPE_MODE (type);
! 	  if ((cfun->curr_properties & PROP_gimple_lvec)
! 	      && !can_vec_perm_const_p (vmode, vmode, indices))
  	    return false;
  	  mask_type = build_vector_type (ssizetype, nelts);
  	  blend_op2 = vec_perm_indices_to_tree (mask_type, indices);
diff -Nrcpad gcc-17-20260503/gcc/tree-ssa-phiprop.cc gcc-17-20260510/gcc/tree-ssa-phiprop.cc
*** gcc-17-20260503/gcc/tree-ssa-phiprop.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-ssa-phiprop.cc	Sun May 10 22:32:14 2026
*************** struct phiprop_d
*** 101,112 ****
  };
  
  /* Insert a new phi node for the dereference of PHI at basic_block
!    BB with the virtual operands from USE_STMT.  */
  
  static tree
  phiprop_insert_phi (basic_block bb, gphi *phi, gimple *use_stmt,
  		    struct phiprop_d *phivn, size_t n,
! 		    bitmap dce_ssa_names)
  {
    tree res;
    gphi *new_phi = NULL;
--- 101,114 ----
  };
  
  /* Insert a new phi node for the dereference of PHI at basic_block
!    BB with the virtual operands from USE_STMT. The vuse for
!    the load will be set to OTHER_VUSE unless there is virtual op
!    phi for BB.  */
  
  static tree
  phiprop_insert_phi (basic_block bb, gphi *phi, gimple *use_stmt,
  		    struct phiprop_d *phivn, size_t n,
! 		    bitmap dce_ssa_names, tree other_vuse)
  {
    tree res;
    gphi *new_phi = NULL;
*************** phiprop_insert_phi (basic_block bb, gphi
*** 176,182 ****
  	      if (vphi)
  		vuse = PHI_ARG_DEF_FROM_EDGE (vphi, e);
  	      else
! 		vuse = gimple_vuse (use_stmt);
  	    }
  	  else
  	    /* For the aggregate copy case updating virtual operands
--- 178,184 ----
  	      if (vphi)
  		vuse = PHI_ARG_DEF_FROM_EDGE (vphi, e);
  	      else
! 		vuse = other_vuse;
  	    }
  	  else
  	    /* For the aggregate copy case updating virtual operands
*************** chk_uses (tree, tree *idx, void *data)
*** 243,268 ****
     incoming VUSE (up_vuse).  If neither is present
     make sure the def stmt of the virtual use is in a
     different basic block dominating BB.  When the def
!    is an edge-inserted one we know it dominates us.  */
! static bool
! can_handle_load (gimple *load_stmt, basic_block bb,
! 		 gphi *vphi, tree up_vuse)
  {
    tree vuse = gimple_vuse (load_stmt);
    if (vphi)
!     return vuse == gimple_phi_result (vphi);
!   if (up_vuse)
!     return vuse == up_vuse;
!   gimple *def_stmt = SSA_NAME_DEF_STMT (vuse);
    /* If the load does not have a store beforehand,
       then we can do the load in conditional. */
    if (SSA_NAME_IS_DEFAULT_DEF (vuse))
!     return true;
!   if (gimple_bb (def_stmt) != bb
        && dominated_by_p (CDI_DOMINATORS,
! 			 bb, gimple_bb (def_stmt)))
!     return true;
!   return false;
  }
  
  /* Propagate between the phi node arguments of PHI in BB and phi result
--- 245,364 ----
     incoming VUSE (up_vuse).  If neither is present
     make sure the def stmt of the virtual use is in a
     different basic block dominating BB.  When the def
!    is an edge-inserted one we know it dominates us.
!    Returns the vuse to use for the inserting.  NULL_TREE
!    is returned when we can't do the insert.  */
! 
! static tree
! can_handle_load (gimple *load_stmt,
! 		 basic_block bb,
! 		 gphi *vphi, tree up_vuse, bool aggregate)
  {
    tree vuse = gimple_vuse (load_stmt);
+   /* If the load does not have a store beforehand,
+      then we can do the load in conditional. */
+   if (SSA_NAME_IS_DEFAULT_DEF (vuse))
+     {
+       /* For loads that have no stores before, there should be no
+ 	 vphi.  */
+       gcc_checking_assert (!vphi);
+       /* The common vuse is the same as the default or there is none. */
+       gcc_checking_assert (!up_vuse || up_vuse == vuse);
+       return vuse;
+     }
+ 
+   /* If we have a vphi, then that needs to be end point.
+      If we have a common incoming vuse, that needs to be the end point.  */
+   tree expected_vuse = NULL_TREE;
    if (vphi)
!     expected_vuse = gimple_phi_result (vphi);
!   else if (up_vuse)
!     expected_vuse = up_vuse;
!   /* Try to see if the store does not effect the load.  */
!   gimple *other_store = SSA_NAME_DEF_STMT (vuse);
!   /* For aggregates, skipping the store is too
!      hard to handle as you need to check for loads
!      and it is not worth the extra checks so just handle expected vuse
!      and the dominated by case.   */
!   if (aggregate)
!     {
!       /* If the vuse on the load is the same as the expected vuse,
! 	 there are no stores inbetween.  */
!       if (vuse == expected_vuse)
! 	return vuse;
!       if (expected_vuse)
! 	return NULL_TREE;
!       if (gimple_bb (other_store) != bb
! 	  && dominated_by_p (CDI_DOMINATORS,
! 			     bb, gimple_bb (other_store)))
! 	return vuse;
!       return NULL_TREE;
!     }
! 
!   /* Skip over clobbers in the same bb as the use
!      as they don't interfere with loads.  */
!   while (!SSA_NAME_IS_DEFAULT_DEF (vuse)
! 	 && gimple_clobber_p (other_store)
! 	 && gimple_bb (other_store) == bb)
!     {
!       vuse = gimple_vuse (other_store);
!       other_store = SSA_NAME_DEF_STMT (vuse);
!     }
    /* If the load does not have a store beforehand,
       then we can do the load in conditional. */
    if (SSA_NAME_IS_DEFAULT_DEF (vuse))
!     {
!       /* For loads that have no stores before, there should be no
! 	 vphi.  */
!       gcc_checking_assert (!vphi);
!       /* The common vuse is the same as the default or there is none. */
!       gcc_checking_assert (!up_vuse || up_vuse == vuse);
!       return vuse;
!     }
! 
!   /* If the vuse on the load is the same as the expected vuse,
!      there are no stores inbetween.  */
!   if (vuse == expected_vuse)
!     return vuse;
! 
!   /* Only handling the case where the store is in the same
!      bb as the phi.  */
!   if (gimple_bb (other_store) == bb)
!     {
!       tree src = gimple_assign_rhs1 (load_stmt);
!       ao_ref read;
!       ao_ref_init (&read, src);
!       if (stmt_may_clobber_ref_p_1 (other_store, &read, false))
! 	return NULL_TREE;
!       vuse = gimple_vuse (other_store);
!       /* If that skipped store was the first store in program,
! 	 then we can do the load conditional.  */
!       if (SSA_NAME_IS_DEFAULT_DEF (vuse))
! 	{
! 	  /* For loads that have no stores before, there should be no
! 	     vphi.  */
! 	  gcc_checking_assert (!vphi);
! 	  /* The common vuse is the same as the default or there is none. */
! 	  gcc_checking_assert (!up_vuse || up_vuse == vuse);
! 	  return vuse;
! 	}
!       other_store = SSA_NAME_DEF_STMT (vuse);
!       /* If the new vuse (after skipping) is the same as expected
! 	 then that is the vuse to return.  */
!       if (vuse == expected_vuse)
! 	return vuse;
!       if (gimple_bb (other_store) == bb)
! 	return NULL_TREE;
!     }
! 
!   /* If there was no an expected vuse then see if the vuse dominates the phi of
!       the address.  */
!   if (!expected_vuse
        && dominated_by_p (CDI_DOMINATORS,
! 			 bb, gimple_bb (other_store)))
!     return vuse;
! 
!   return NULL_TREE;
  }
  
  /* Propagate between the phi node arguments of PHI in BB and phi result
*************** propagate_with_phi (basic_block bb, gphi
*** 385,397 ****
  	    && !gimple_has_volatile_ops (use_stmt)))
  	continue;
  
-       if (!can_handle_load (use_stmt, bb, vphi, up_vuse))
- 	continue;
- 
        bool aggregate = false;
        if (!is_gimple_reg_type (TREE_TYPE (gimple_assign_lhs (use_stmt))))
  	aggregate = true;
  
        if ((canpossible_trap || aggregate)
  	  && !dom_info_available_p (cfun, CDI_POST_DOMINATORS))
  	calculate_dominance_info (CDI_POST_DOMINATORS);
--- 481,495 ----
  	    && !gimple_has_volatile_ops (use_stmt)))
  	continue;
  
        bool aggregate = false;
        if (!is_gimple_reg_type (TREE_TYPE (gimple_assign_lhs (use_stmt))))
  	aggregate = true;
  
+       tree other_vuse;
+       other_vuse = can_handle_load (use_stmt, bb, vphi, up_vuse, aggregate);
+       if (!other_vuse)
+ 	continue;
+ 
        if ((canpossible_trap || aggregate)
  	  && !dom_info_available_p (cfun, CDI_POST_DOMINATORS))
  	calculate_dominance_info (CDI_POST_DOMINATORS);
*************** propagate_with_phi (basic_block bb, gphi
*** 459,465 ****
  		goto next;
  	    }
  
! 	  phiprop_insert_phi (bb, phi, use_stmt, phivn, n, dce_ssa_names);
  
  	  /* Remove old stmt. The phi and all of maybe its depedencies
  	     will be removed later via simple_dce_from_worklist. */
--- 557,564 ----
  		goto next;
  	    }
  
! 	  phiprop_insert_phi (bb, phi, use_stmt, phivn, n,
! 			      dce_ssa_names, other_vuse);
  
  	  /* Remove old stmt. The phi and all of maybe its depedencies
  	     will be removed later via simple_dce_from_worklist. */
*************** propagate_with_phi (basic_block bb, gphi
*** 492,498 ****
        else
  	{
  	  tree vuse = gimple_vuse (use_stmt);
! 	  res = phiprop_insert_phi (bb, phi, use_stmt, phivn, n, dce_ssa_names);
  	  type = TREE_TYPE (res);
  
  	  /* Remember the value we created for *ptr.  */
--- 591,598 ----
        else
  	{
  	  tree vuse = gimple_vuse (use_stmt);
! 	  res = phiprop_insert_phi (bb, phi, use_stmt, phivn, n,
! 				    dce_ssa_names, other_vuse);
  	  type = TREE_TYPE (res);
  
  	  /* Remember the value we created for *ptr.  */
diff -Nrcpad gcc-17-20260503/gcc/tree-ssa-threadbackward.cc gcc-17-20260510/gcc/tree-ssa-threadbackward.cc
*** gcc-17-20260503/gcc/tree-ssa-threadbackward.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-ssa-threadbackward.cc	Sun May 10 22:32:14 2026
*************** back_threader::find_paths_to_names (basi
*** 349,354 ****
--- 349,357 ----
  				    unsigned overall_paths,
  				    back_threader_profitability &profit)
  {
+   if (m_visited_bbs.add (bb))
+     return;
+ 
    m_path.safe_push (bb);
  
    // Try to resolve the path without looking back.  Avoid resolving paths
*************** back_threader::find_paths_to_names (basi
*** 374,381 ****
    // Continue looking for ways to extend the path but limit the
    // search space along a branch
    else if ((overall_paths = overall_paths * EDGE_COUNT (bb->preds))
! 	   <= (unsigned)param_max_jump_thread_paths
! 	   && !m_visited_bbs.add (bb))
      {
        // For further greedy searching we want to remove interesting
        // names defined in BB but add ones on the PHI edges for the
--- 377,383 ----
    // Continue looking for ways to extend the path but limit the
    // search space along a branch
    else if ((overall_paths = overall_paths * EDGE_COUNT (bb->preds))
! 	   <= (unsigned)param_max_jump_thread_paths)
      {
        // For further greedy searching we want to remove interesting
        // names defined in BB but add ones on the PHI edges for the
*************** back_threader::find_paths_to_names (basi
*** 487,493 ****
  	 backtracking we have to restore it.  */
        for (int j : new_imports)
  	bitmap_clear_bit (m_imports, j);
-       m_visited_bbs.remove (bb);
      }
    else if (dump_file && (dump_flags & TDF_DETAILS))
      fprintf (dump_file, "  FAIL: Search space limit %d reached.\n",
--- 489,494 ----
*************** back_threader::find_paths_to_names (basi
*** 495,500 ****
--- 496,502 ----
  
    // Reset things to their original state.
    m_path.pop ();
+   m_visited_bbs.remove (bb);
  }
  
  // Search backwards from BB looking for paths where the final
diff -Nrcpad gcc-17-20260503/gcc/tree-vect-slp.cc gcc-17-20260510/gcc/tree-vect-slp.cc
*** gcc-17-20260503/gcc/tree-vect-slp.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-vect-slp.cc	Sun May 10 22:32:14 2026
*************** vect_analyze_slp_reduc_chain (loop_vec_i
*** 4356,4387 ****
        auto_vec<chain_op_t> chain;
        auto_vec<std::pair<tree_code, gimple *> > worklist;
        gimple *op_stmt = NULL, *other_op_stmt = NULL;
!       vect_slp_linearize_chain (vinfo, worklist, chain, (tree_code)code,
! 				scalar_stmts[0]->stmt, op_stmt, other_op_stmt,
! 				NULL);
! 
!       scalar_stmts.truncate (0);
!       stmt_vec_info tail = NULL;
!       for (auto el : chain)
  	{
! 	  if (el.dt == vect_external_def
! 	      || el.dt == vect_constant_def
! 	      || el.code != (tree_code) code)
! 	    {
! 	      scalar_stmts.release ();
! 	      return false;
! 	    }
! 	  stmt_vec_info stmt = vinfo->lookup_def (el.op);
! 	  if (STMT_VINFO_REDUC_IDX (stmt) != -1
! 	      || STMT_VINFO_REDUC_DEF (stmt))
  	    {
! 	      gcc_assert (tail == NULL);
! 	      tail = stmt;
! 	      continue;
  	    }
! 	  scalar_stmts.safe_push (stmt);
  	}
-       gcc_assert (tail);
  
        /* When this linearization didn't produce a chain see if stripping
  	 a wrapping sign conversion produces one.  */
--- 4356,4394 ----
        auto_vec<chain_op_t> chain;
        auto_vec<std::pair<tree_code, gimple *> > worklist;
        gimple *op_stmt = NULL, *other_op_stmt = NULL;
!       if (is_a <gassign *> (scalar_stmts[0]->stmt)
! 	  /* We cannot linearize an operation that vect_slp_linearize_chain
! 	     would not put on its worklist.  */
! 	  && gimple_assign_rhs_code (scalar_stmts[0]->stmt) == (tree_code)code)
  	{
! 	  vect_slp_linearize_chain (vinfo, worklist, chain, (tree_code)code,
! 				    scalar_stmts[0]->stmt, op_stmt,
! 				    other_op_stmt,
! 				    NULL);
! 
! 	  scalar_stmts.truncate (0);
! 	  stmt_vec_info tail = NULL;
! 	  for (auto el : chain)
  	    {
! 	      if (el.dt == vect_external_def
! 		  || el.dt == vect_constant_def
! 		  || el.code != (tree_code) code)
! 		{
! 		  scalar_stmts.release ();
! 		  return false;
! 		}
! 	      stmt_vec_info stmt = vinfo->lookup_def (el.op);
! 	      if (STMT_VINFO_REDUC_IDX (stmt) != -1
! 		  || STMT_VINFO_REDUC_DEF (stmt))
! 		{
! 		  gcc_assert (tail == NULL);
! 		  tail = stmt;
! 		  continue;
! 		}
! 	      scalar_stmts.safe_push (stmt);
  	    }
! 	  gcc_assert (tail);
  	}
  
        /* When this linearization didn't produce a chain see if stripping
  	 a wrapping sign conversion produces one.  */
*************** vect_analyze_slp_reduc_chain (loop_vec_i
*** 4411,4417 ****
  				    stmt, op_stmt, other_op_stmt, NULL);
  
  	  scalar_stmts.truncate (0);
! 	  tail = NULL;
  	  for (auto el : chain)
  	    {
  	      if (el.dt == vect_external_def
--- 4418,4424 ----
  				    stmt, op_stmt, other_op_stmt, NULL);
  
  	  scalar_stmts.truncate (0);
! 	  stmt_vec_info tail = NULL;
  	  for (auto el : chain)
  	    {
  	      if (el.dt == vect_external_def
*************** vect_bb_slp_scalar_cost (bb_vec_info vin
*** 9452,9458 ****
  	    continue;
  	}
  
!       gcc_assert (!gimple_visited_p (stmt->stmt));
  
        if (vect_nop_conversion_p (stmt))
  	;
--- 9459,9472 ----
  	    continue;
  	}
  
!       /* The following assert verifies that vect_bb_partition_graph
! 	 partitions the SLP graph in a way that each scalar stmt of
! 	 the coverage of the SLP graph belongs to exactly one subgraph.
! 	 ???  This is currently not guaranteed since the function
! 	 works purely on SLP_TREE_SCALAR_STMTS, resulting in the assert
! 	 tripping or scalar stmts costed multiple times, making vectorization
! 	 more profitable than it really is.  */
!       /* gcc_checking_assert (!gimple_visited_p (stmt->stmt)); */
  
        if (vect_nop_conversion_p (stmt))
  	;
diff -Nrcpad gcc-17-20260503/gcc/tree-vect-stmts.cc gcc-17-20260510/gcc/tree-vect-stmts.cc
*** gcc-17-20260503/gcc/tree-vect-stmts.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/tree-vect-stmts.cc	Sun May 10 22:32:14 2026
*************** vectorizable_simd_clone_call (vec_info *
*** 4542,4548 ****
        SLP_TREE_TYPE (slp_node) = call_simd_clone_vec_info_type;
        slp_node->data = new vect_simd_clone_data (std::move (_data));
        DUMP_VECT_SCOPE ("vectorizable_simd_clone_call");
! /*      vect_model_simple_cost (vinfo, 1, slp_node, cost_vec); */
        return true;
      }
  
--- 4542,4550 ----
        SLP_TREE_TYPE (slp_node) = call_simd_clone_vec_info_type;
        slp_node->data = new vect_simd_clone_data (std::move (_data));
        DUMP_VECT_SCOPE ("vectorizable_simd_clone_call");
!       /* ???  We're confused by calls w/o LHS.  */
!       if (SLP_TREE_VECTYPE (slp_node))
! 	vect_model_simple_cost (vinfo, ncopies, slp_node, cost_vec);
        return true;
      }
  
diff -Nrcpad gcc-17-20260503/gcc/value-query.cc gcc-17-20260510/gcc/value-query.cc
*** gcc-17-20260503/gcc/value-query.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/value-query.cc	Sun May 10 22:32:14 2026
*************** range_query::range_of_stmt (vrange &r, g
*** 68,73 ****
--- 68,79 ----
  
  // Default for updating range info is to do nothing.
  void
+ range_query::update_range_info (tree)
+ {
+ }
+ 
+ // Default for updating range info is to do nothing.
+ void
  range_query::update_range_info (tree, const vrange &)
  {
  }
*************** range_query::get_tree_range (vrange &r,
*** 336,342 ****
    else
      type = TREE_TYPE (expr);
  
!   if (!value_range::supports_type_p (type))
      {
        r.set_undefined ();
        return false;
--- 342,348 ----
    else
      type = TREE_TYPE (expr);
  
!   if (!r.supports_type_p (type))
      {
        r.set_undefined ();
        return false;
diff -Nrcpad gcc-17-20260503/gcc/value-query.h gcc-17-20260510/gcc/value-query.h
*** gcc-17-20260503/gcc/value-query.h	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/value-query.h	Sun May 10 22:32:14 2026
*************** public:
*** 75,80 ****
--- 75,83 ----
    virtual bool range_on_entry (vrange &r, basic_block bb, tree expr);
    virtual bool range_on_exit (vrange &r, basic_block bb, tree expr);
  
+   // Indicate that NAME should be considered for a range update.
+   virtual void update_range_info (tree name);
+   // Provide a specific range update to NAME.
    virtual void update_range_info (tree name, const vrange &r);
  
    inline class relation_oracle &relation () const  { return *m_relation; }
diff -Nrcpad gcc-17-20260503/gcc/value-range-storage.cc gcc-17-20260510/gcc/value-range-storage.cc
*** gcc-17-20260503/gcc/value-range-storage.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/value-range-storage.cc	Sun May 10 22:32:14 2026
*************** frange_storage::fits_p (const frange &)
*** 593,604 ****
  prange_storage *
  prange_storage::alloc (vrange_internal_alloc &allocator, const prange &r)
  {
!   size_t size = sizeof (prange_storage);
!   if (!r.undefined_p ())
!     {
!       unsigned prec = TYPE_PRECISION (r.type ());
!       size += trailing_wide_ints<NINTS>::extra_size (prec);
!     }
    prange_storage *p = static_cast <prange_storage *> (allocator.alloc (size));
    new (p) prange_storage (r);
    return p;
--- 593,600 ----
  prange_storage *
  prange_storage::alloc (vrange_internal_alloc &allocator, const prange &r)
  {
!   prange_format format (r);
!   size_t size = sizeof (prange_storage) + format.extra_size;
    prange_storage *p = static_cast <prange_storage *> (allocator.alloc (size));
    new (p) prange_storage (r);
    return p;
*************** prange_storage::alloc (vrange_internal_a
*** 608,671 ****
  
  prange_storage::prange_storage (const prange &r)
  {
!   // It is the caller's responsibility to allocate enough space such
!   // that the precision fits.
    if (r.undefined_p ())
!     // Undefined ranges do not require any extra space for trailing
!     // wide ints.
!     m_trailing_ints.set_precision (0);
    else
!     m_trailing_ints.set_precision (TYPE_PRECISION (r.type ()));
  
!   set_prange (r);
  }
  
  void
  prange_storage::set_prange (const prange &r)
  {
!   if (r.undefined_p ())
!     m_kind = VR_UNDEFINED;
!   else if (r.varying_p ())
!     m_kind = VR_VARYING;
!   else
      {
-       m_kind = VR_RANGE;
-       set_low (r.lower_bound ());
-       set_high (r.upper_bound ());
        irange_bitmask bm = r.m_bitmask;
!       set_value (bm.value ());
!       set_mask (bm.mask ());
      }
  }
  
  void
  prange_storage::get_prange (prange &r, tree type) const
  {
    gcc_checking_assert (r.supports_type_p (type));
  
!   if (m_kind == VR_UNDEFINED)
!     r.set_undefined ();
!   else if (m_kind == VR_VARYING)
!     r.set_varying (type);
!   else
      {
!       gcc_checking_assert (m_kind == VR_RANGE);
!       gcc_checking_assert (TYPE_PRECISION (type) == m_trailing_ints.get_precision ());
!       r.m_kind = VR_RANGE;
!       r.m_type = type;
!       r.m_min = get_low ();
!       r.m_max = get_high ();
!       r.m_bitmask = irange_bitmask (get_value (), get_mask ());
!       if (flag_checking)
! 	r.verify_range ();
      }
  }
  
  bool
  prange_storage::equal_p (const prange &r) const
  {
    if (r.undefined_p ())
!     return m_kind == VR_UNDEFINED;
  
    prange tmp;
    get_prange (tmp, r.type ());
--- 604,766 ----
  
  prange_storage::prange_storage (const prange &r)
  {
!   prange_format format (r);
!   m_trailing_ints.set_precision (format.precision, format.num_words);
!   set_prange (r);
! }
! 
! // FIll the format structure for range R.
! 
! prange_storage::prange_format::prange_format (const prange &r)
! {
!   kind = PR_UNDEFINED;
!   has_bitmask = 0;
!   extra_size = 0;
!   precision = 0;
!   num_words = 0;
! 
    if (r.undefined_p ())
!     return;
! 
!   if (r.varying_p ())
!     {
!       kind = PR_VARYING;
!       return;
!     }
! 
!   if (r.zero_p ())
!     {
!       kind = PR_ZERO;
!       return;
!     }
! 
!   if (r.nonzero_p ())
!     kind = PR_NONZERO;
    else
!     {
!       prange tmp (r.type ());
!       if (r.lower_bound () == tmp.lower_bound ()
! 	  && r.upper_bound () == tmp.upper_bound ())
! 	kind = PR_FULL;
!       else
! 	{
! 	  // PR_OTHER requires words of storage for the end points.
! 	  kind = PR_OTHER;
! 	  num_words += 2;
! 	}
!     }
!   precision = TYPE_PRECISION (r.type ());
!   has_bitmask = !r.get_bitmask ().unknown_p ();
  
!   // Bitmasks require 2 words of storage.
!   if (has_bitmask)
!     num_words += 2;
! 
!   if (num_words != 0)
!     extra_size = trailing_wide_ints<NINTS>::extra_size (precision, num_words);
! 
!   // PR_FULL must have a bitmask, or it should be PR_VARYING.
!   gcc_checking_assert (kind != PR_FULL || has_bitmask);
  }
  
  void
  prange_storage::set_prange (const prange &r)
  {
!   prange_format format (r);
!   m_kind = format.kind;
!   m_has_bitmask = format.has_bitmask;
!   unsigned index = 0;
! 
!   switch (m_kind)
!     {
!       case PR_UNDEFINED:
!       case PR_VARYING:
!       case PR_ZERO:
! 	return;
!       case PR_NONZERO:
!       case PR_FULL:
! 	break;
!       case PR_OTHER:
! 	set_word (index++, r.lower_bound (), r.type ());
! 	set_word (index++, r.upper_bound (), r.type ());
! 	break;
!       default:
! 	gcc_unreachable ();
!     }
! 
!   if (m_has_bitmask)
      {
        irange_bitmask bm = r.m_bitmask;
!       set_word (index++, r.m_bitmask.value (), r.type ());
!       set_word (index++, r.m_bitmask.mask (), r.type ());
      }
+    gcc_checking_assert (index == format.num_words);
  }
  
  void
  prange_storage::get_prange (prange &r, tree type) const
  {
    gcc_checking_assert (r.supports_type_p (type));
+   unsigned index = 0;
+   switch (m_kind)
+     {
+       case PR_UNDEFINED:
+ 	r.set_undefined ();
+ 	return;
  
!       case PR_VARYING:
! 	r.set_varying (type);
! 	return;
! 
!       case PR_ZERO:
! 	r.set_zero (type);
! 	return;
! 
!       case PR_NONZERO:
! 	r.set_nonzero (type);
! 	break;
! 
!       case PR_FULL:
! 	{
! 	  r.m_kind = VR_RANGE;
! 	  r.m_type = type;
! 	  prange tmp (type);
! 	  r.m_min = tmp.lower_bound ();
! 	  r.m_max = tmp.upper_bound ();
! 	  break;
! 	}
! 
!       case PR_OTHER:
! 	{
! 	  gcc_checking_assert (m_kind == PR_OTHER);
! 	  r.m_kind = VR_RANGE;
! 	  r.m_type = type;
! 	  r.m_min = get_word (index++, type);
! 	  r.m_max = get_word (index++, type);
! 	  break;
! 	}
!       default:
! 	gcc_unreachable ();
!     }
! 
!   if (m_has_bitmask)
      {
!       wide_int value = get_word (index++, type);
!       wide_int mask = get_word (index++, type);
!       r.m_bitmask = irange_bitmask (value, mask);
      }
+   else
+     r.m_bitmask.set_unknown (TYPE_PRECISION (type));
+ 
+   if (flag_checking)
+     r.verify_range ();
  }
  
  bool
  prange_storage::equal_p (const prange &r) const
  {
    if (r.undefined_p ())
!     return m_kind == PR_UNDEFINED;
  
    prange tmp;
    get_prange (tmp, r.type ());
*************** prange_storage::fits_p (const prange &r)
*** 680,686 ****
    if (r.undefined_p ())
      return true;
  
!   return TYPE_PRECISION (r.type ()) <= m_trailing_ints.get_precision ();
  }
  
  
--- 775,785 ----
    if (r.undefined_p ())
      return true;
  
!   prange_format f (r);
!   unsigned prec = m_trailing_ints.get_precision ();
!   unsigned num = m_trailing_ints.num_elements ();
!   size_t curr = num ? trailing_wide_ints<NINTS>::extra_size (prec, num) : 0;
!   return f.extra_size <= curr;
  }
  
  
diff -Nrcpad gcc-17-20260503/gcc/value-range-storage.h gcc-17-20260510/gcc/value-range-storage.h
*** gcc-17-20260503/gcc/value-range-storage.h	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/value-range-storage.h	Sun May 10 22:32:14 2026
*************** private:
*** 113,131 ****
    DISABLE_COPY_AND_ASSIGN (prange_storage);
    prange_storage (const prange &r);
  
!   enum value_range_kind m_kind : 3;
  
    // We don't use TRAILING_WIDE_INT_ACCESSOR because the getters here
    // must be const.  Perhaps TRAILING_WIDE_INT_ACCESSOR could be made
    // const and return wide_int instead of trailing_wide_int.
!   wide_int get_low () const { return m_trailing_ints[0]; }
!   wide_int get_high () const { return m_trailing_ints[1]; }
!   wide_int get_value () const { return m_trailing_ints[2]; }
!   wide_int get_mask () const { return m_trailing_ints[3]; }
!   template <typename T> void set_low (const T &x) { m_trailing_ints[0] = x; }
!   template <typename T> void set_high (const T &x) { m_trailing_ints[1] = x; }
!   template <typename T> void set_value (const T &x) { m_trailing_ints[2] = x; }
!   template <typename T> void set_mask (const T &x) { m_trailing_ints[3] = x; }
  
    static const unsigned int NINTS = 4;
    trailing_wide_ints<NINTS> m_trailing_ints;
--- 113,147 ----
    DISABLE_COPY_AND_ASSIGN (prange_storage);
    prange_storage (const prange &r);
  
!   // A prange_format class summarizes the storage requirements for a prange
!   // which are then used to initialize the prange_storage fields.
!   enum prange_kind { PR_UNDEFINED,	// VR_UNDEFINED
! 		     PR_VARYING,	// VR_VARYING
! 		     PR_ZERO,		// [0, 0]
! 		     PR_NONZERO,	// [1, +INF]
! 		     PR_FULL,		// [0, +INF] (Must have bitmask)
! 		     PR_OTHER };	// [x, y]
!   class prange_format
!   {
!   public:
!     prange_format (const prange &r);
!     enum prange_kind kind;
!     bool has_bitmask;
!     size_t extra_size;
!     unsigned short precision;
!     unsigned num_words;
!   };
! 
!   enum prange_kind m_kind;
!   bool m_has_bitmask;
  
    // We don't use TRAILING_WIDE_INT_ACCESSOR because the getters here
    // must be const.  Perhaps TRAILING_WIDE_INT_ACCESSOR could be made
    // const and return wide_int instead of trailing_wide_int.
!   wide_int get_word (unsigned i, tree) const
!     { return m_trailing_ints[i]; }
!   template <typename T> void set_word (unsigned i, const T &x, tree)
!     { m_trailing_ints[i] = x; }
  
    static const unsigned int NINTS = 4;
    trailing_wide_ints<NINTS> m_trailing_ints;
diff -Nrcpad gcc-17-20260503/gcc/value-range.cc gcc-17-20260510/gcc/value-range.cc
*** gcc-17-20260503/gcc/value-range.cc	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/value-range.cc	Sun May 10 22:32:14 2026
*************** value_range::dump (FILE *out) const
*** 157,162 ****
--- 157,174 ----
      fprintf (out, "NULL");
  }
  
+ void
+ value_range::print (pretty_printer *pp) const
+ {
+   if (m_vrange)
+     {
+       vrange_printer vrange_pp (pp);
+       m_vrange->accept (vrange_pp);
+     }
+   else
+     pp_string (pp, "NULL");
+ }
+ 
  DEBUG_FUNCTION void
  debug (const value_range &r)
  {
*************** irange::intersect (const vrange &v)
*** 2095,2100 ****
--- 2107,2113 ----
    int_range_max r2 (*this);
    unsigned r2_lim = r2.num_pairs ();
    unsigned i2 = 0;
+   bool need_snapping = !m_bitmask.unknown_p ();
    for (unsigned i = 0; i < r.num_pairs (); )
      {
        // If r1's upper is < r2's lower, we can skip r1's pair.
*************** irange::intersect (const vrange &v)
*** 2128,2156 ****
  	    m_base[bld_pair * 2] = r2l;
  	}
        else
! 	// Decrease and set a new upper.
  	bld_pair--;
  
        // ...and choose the lower of the upper bounds.
        if (wi::le_p (ru, r2u, sign))
  	{
  	  m_base[bld_pair * 2 + 1] = ru;
- 	  bld_pair++;
  	  // Move past the r1 pair and keep trying.
  	  i++;
- 	  continue;
  	}
        else
  	{
  	  m_base[bld_pair * 2 + 1] = r2u;
- 	  bld_pair++;
  	  i2++;
! 	  if (i2 < r2_lim)
! 	    continue;
! 	  // No more r2, break.
! 	  break;
  	}
!       // r2 has the higher lower bound.
      }
  
    // At the exit of this loop, it is one of 2 things:
--- 2141,2191 ----
  	    m_base[bld_pair * 2] = r2l;
  	}
        else
! 	// Decrease the index to use the existing lower bound, and
! 	// set a new upper for this pair.
  	bld_pair--;
  
+       // Changes to false if the last value in i2's range is consumed.
+       bool more = true;
        // ...and choose the lower of the upper bounds.
        if (wi::le_p (ru, r2u, sign))
  	{
  	  m_base[bld_pair * 2 + 1] = ru;
  	  // Move past the r1 pair and keep trying.
  	  i++;
  	}
        else
  	{
  	  m_base[bld_pair * 2 + 1] = r2u;
  	  i2++;
! 	  // No more r2, break the loop when done.
! 	  if (i2 >= r2_lim)
! 	    more = false;
  	}
!       // Now snap these ranges to the bitmask, if there is one.
!       if (need_snapping)
! 	{
! 	  bool ovf;
! 	  wide_int lb, ub;
! 	  if (snap (m_base[bld_pair * 2], m_base[bld_pair * 2 + 1],
! 		    lb, ub, ovf))
! 	    {
! 	      // If the new subrange does not fit the mask, skip it.
! 	      if (ovf)
! 		{
! 		  if (!more)
! 		    break;
! 		  continue;
! 		}
! 	      // Otherwise adjust the pair.
! 	      m_base[bld_pair * 2] = lb;
! 	      m_base[bld_pair * 2 + 1] = ub;
! 	    }
! 	}
!       // Current pair now satisfies any mask, ready for another pair.
!       bld_pair++;
!       if (!more)
! 	break;
      }
  
    // At the exit of this loop, it is one of 2 things:
*************** irange::intersect (const vrange &v)
*** 2163,2175 ****
      }
  
    m_kind = VR_RANGE;
-   // Snap subranges if there is a bitmask.  See PR 123319.
-   if (!m_bitmask.unknown_p ())
-     {
-       snap_subranges ();
-       if (undefined_p ())
- 	return true;
-     }
    // The range has been altered, so normalize it even if nothing
    // changed in the mask.
    if (!intersect_bitmask (r))
--- 2198,2203 ----
diff -Nrcpad gcc-17-20260503/gcc/value-range.h gcc-17-20260510/gcc/value-range.h
*** gcc-17-20260503/gcc/value-range.h	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gcc/value-range.h	Sun May 10 22:32:14 2026
*************** public:
*** 767,779 ****
  //
  // Using any of the various constructors initializes the object
  // appropriately, but the default constructor is uninitialized and
! // must be initialized either with set_type() or by assigning into it.
  //
  // Assigning between incompatible types is allowed.  For example if a
  // temporary holds an irange, you can assign an frange into it, and
  // all the right things will happen.  However, before passing this
  // object to a function accepting a vrange, the correct type must be
! // set.  If it isn't, you can do so with set_type().
  
  class value_range
  {
--- 767,779 ----
  //
  // Using any of the various constructors initializes the object
  // appropriately, but the default constructor is uninitialized and
! // must be initialized either with set_range_class() or by assigning into it.
  //
  // Assigning between incompatible types is allowed.  For example if a
  // temporary holds an irange, you can assign an frange into it, and
  // all the right things will happen.  However, before passing this
  // object to a function accepting a vrange, the correct type must be
! // set.  If it isn't, you can do so with set_range_class().
  
  class value_range
  {
*************** public:
*** 784,790 ****
    value_range (tree, tree, value_range_kind kind = VR_RANGE);
    value_range (const value_range &);
    ~value_range ();
!   void set_type (tree type);
    vrange& operator= (const vrange &);
    value_range& operator= (const value_range &);
    bool operator== (const value_range &r) const;
--- 784,790 ----
    value_range (tree, tree, value_range_kind kind = VR_RANGE);
    value_range (const value_range &);
    ~value_range ();
!   void set_range_class (tree type);
    vrange& operator= (const vrange &);
    value_range& operator= (const value_range &);
    bool operator== (const value_range &r) const;
*************** public:
*** 792,797 ****
--- 792,798 ----
    operator vrange &();
    operator const vrange &() const;
    void dump (FILE *) const;
+   void print (pretty_printer *) const;
    static bool supports_type_p (const_tree type);
  
    tree type () { return m_vrange->type (); }
*************** private:
*** 832,838 ****
  };
  
  // The default constructor is uninitialized and must be initialized
! // with either set_type() or with an assignment into it.
  
  inline
  value_range::value_range ()
--- 833,839 ----
  };
  
  // The default constructor is uninitialized and must be initialized
! // with either set_range_class() or with an assignment into it.
  
  inline
  value_range::value_range ()
*************** value_range::~value_range ()
*** 885,893 ****
  
  // Initialize object to an UNDEFINED range that can hold ranges of
  // TYPE.  Clean-up memory if there was a previous object.
  
  inline void
! value_range::set_type (tree type)
  {
    if (m_vrange)
      m_vrange->~vrange ();
--- 886,895 ----
  
  // Initialize object to an UNDEFINED range that can hold ranges of
  // TYPE.  Clean-up memory if there was a previous object.
+ // Note that this does *not* set the type of the underlying vrange.
  
  inline void
! value_range::set_range_class (tree type)
  {
    if (m_vrange)
      m_vrange->~vrange ();
*************** value_range::set_type (tree type)
*** 896,901 ****
--- 898,904 ----
  
  // Initialize object to an UNDEFINED range that can hold ranges of
  // TYPE.
+ // Note that this does *not* set the type of the underlying vrange.
  
  inline void
  value_range::init (tree type)
diff -Nrcpad gcc-17-20260503/gnattools/Makefile.in gcc-17-20260510/gnattools/Makefile.in
*** gcc-17-20260503/gnattools/Makefile.in	Sun May  3 22:32:13 2026
--- gcc-17-20260510/gnattools/Makefile.in	Sun May 10 22:32:14 2026
*************** GNATBIND=@GNATBIND@
*** 40,48 ****
  exeext = @EXEEXT@
  objext=.o
  TRACE=no
! ADA_FOR_BUILD=
! ADA_FOR_TARGET=
! LDFLAGS=
  PWD_COMMAND = $${PWDCMD-pwd}
  
  # The tedious process of getting CFLAGS right.
--- 40,46 ----
  exeext = @EXEEXT@
  objext=.o
  TRACE=no
! LDFLAGS= @LDFLAGS@
  PWD_COMMAND = $${PWDCMD-pwd}
  
  # The tedious process of getting CFLAGS right.
diff -Nrcpad gcc-17-20260503/libatomic/ChangeLog gcc-17-20260510/libatomic/ChangeLog
*** gcc-17-20260503/libatomic/ChangeLog	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libatomic/ChangeLog	Sun May 10 22:32:14 2026
***************
*** 1,3 ****
--- 1,13 ----
+ 2026-05-05  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* Makefile.in: Regenerate.
+ 	* acinclude.m4: Delete LIBAT_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* aclocal.m4: Regenerate.
+ 	* configure: Likewise.
+ 	* configure.ac: Use GCC_CHECK_ATTRIBUTE_VISIBILITY instead of
+ 	LIBAT_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* testsuite/Makefile.in: Regenerate.
+ 
  2026-02-21  Jakub Jelinek  <jakub@redhat.com>
  
  	* Makefile.am (all-local): Depend on stmp-libatomic and otherwise
diff -Nrcpad gcc-17-20260503/libatomic/Makefile.in gcc-17-20260510/libatomic/Makefile.in
*** gcc-17-20260503/libatomic/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libatomic/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 115,120 ****
--- 115,121 ----
  	$(top_srcdir)/../config/override.m4 \
  	$(top_srcdir)/../config/stdint.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../config/warnings.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
diff -Nrcpad gcc-17-20260503/libatomic/acinclude.m4 gcc-17-20260510/libatomic/acinclude.m4
*** gcc-17-20260503/libatomic/acinclude.m4	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libatomic/acinclude.m4	Sun May 10 22:32:14 2026
*************** AC_DEFUN([LIBAT_CHECK_IFUNC], [
*** 206,226 ****
  dnl ----------------------------------------------------------------------
  dnl This whole bit snagged from libitm.
  
- dnl Check whether the target supports hidden visibility.
- AC_DEFUN([LIBAT_CHECK_ATTRIBUTE_VISIBILITY], [
-   AC_CACHE_CHECK([whether the target supports hidden visibility],
- 		 libat_cv_have_attribute_visibility, [
-   save_CFLAGS="$CFLAGS"
-   CFLAGS="$CFLAGS -Werror"
-   AC_TRY_COMPILE([void __attribute__((visibility("hidden"))) foo(void) { }],
- 		 [], libat_cv_have_attribute_visibility=yes,
- 		 libat_cv_have_attribute_visibility=no)
-   CFLAGS="$save_CFLAGS"])
-   if test $libat_cv_have_attribute_visibility = yes; then
-     AC_DEFINE(HAVE_ATTRIBUTE_VISIBILITY, 1,
-       [Define to 1 if the target supports __attribute__((visibility(...))).])
-   fi])
- 
  dnl Check whether the target supports dllexport
  AC_DEFUN([LIBAT_CHECK_ATTRIBUTE_DLLEXPORT], [
    AC_CACHE_CHECK([whether the target supports dllexport],
--- 206,211 ----
diff -Nrcpad gcc-17-20260503/libatomic/aclocal.m4 gcc-17-20260510/libatomic/aclocal.m4
*** gcc-17-20260503/libatomic/aclocal.m4	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libatomic/aclocal.m4	Sun May 10 22:32:19 2026
*************** m4_include([../config/multi.m4])
*** 1198,1203 ****
--- 1198,1204 ----
  m4_include([../config/override.m4])
  m4_include([../config/stdint.m4])
  m4_include([../config/toolexeclibdir.m4])
+ m4_include([../config/visibility.m4])
  m4_include([../config/warnings.m4])
  m4_include([../ltoptions.m4])
  m4_include([../ltsugar.m4])
diff -Nrcpad gcc-17-20260503/libatomic/configure gcc-17-20260510/libatomic/configure
*** gcc-17-20260503/libatomic/configure	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libatomic/configure	Sun May 10 22:32:19 2026
*************** esac
*** 15435,15441 ****
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${libat_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
--- 15435,15441 ----
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${gcc_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
*************** main ()
*** 15453,15468 ****
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   libat_cv_have_attribute_visibility=yes
  else
!   libat_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libat_cv_have_attribute_visibility" >&5
! $as_echo "$libat_cv_have_attribute_visibility" >&6; }
!   if test $libat_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
--- 15453,15468 ----
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   gcc_cv_have_attribute_visibility=yes
  else
!   gcc_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_have_attribute_visibility" >&5
! $as_echo "$gcc_cv_have_attribute_visibility" >&6; }
!   if test $gcc_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
diff -Nrcpad gcc-17-20260503/libatomic/configure.ac gcc-17-20260510/libatomic/configure.ac
*** gcc-17-20260503/libatomic/configure.ac	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libatomic/configure.ac	Sun May 10 22:32:14 2026
*************** case " $config_path " in
*** 256,262 ****
  esac
  
  # See what sort of export controls are available.
! LIBAT_CHECK_ATTRIBUTE_VISIBILITY
  LIBAT_CHECK_ATTRIBUTE_DLLEXPORT
  LIBAT_CHECK_ATTRIBUTE_ALIAS
  if test x$try_ifunc = xyes; then
--- 256,262 ----
  esac
  
  # See what sort of export controls are available.
! GCC_CHECK_ATTRIBUTE_VISIBILITY
  LIBAT_CHECK_ATTRIBUTE_DLLEXPORT
  LIBAT_CHECK_ATTRIBUTE_ALIAS
  if test x$try_ifunc = xyes; then
diff -Nrcpad gcc-17-20260503/libatomic/testsuite/Makefile.in gcc-17-20260510/libatomic/testsuite/Makefile.in
*** gcc-17-20260503/libatomic/testsuite/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libatomic/testsuite/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 101,106 ****
--- 101,107 ----
  	$(top_srcdir)/../config/override.m4 \
  	$(top_srcdir)/../config/stdint.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../config/warnings.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
diff -Nrcpad gcc-17-20260503/libbacktrace/ChangeLog gcc-17-20260510/libbacktrace/ChangeLog
*** gcc-17-20260503/libbacktrace/ChangeLog	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libbacktrace/ChangeLog	Sun May 10 22:32:14 2026
***************
*** 1,3 ****
--- 1,10 ----
+ 2026-05-04  Ian Lance Taylor  <iant@golang.org>
+ 
+ 	* elf.c (elf_zstd_decompress_frame): New static function,
+ 	broken out of elf_zstd_decompress.
+ 	(elf_zstd_decompress): Call elf_zstd_decompress_frame in a loop.
+ 	* zstdtest.c (test_large): Compress the file in chunks.
+ 
  2025-12-29  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
  	* configure: Regenerate.
diff -Nrcpad gcc-17-20260503/libbacktrace/elf.c gcc-17-20260510/libbacktrace/elf.c
*** gcc-17-20260503/libbacktrace/elf.c	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libbacktrace/elf.c	Sun May 10 22:32:14 2026
*************** elf_zstd_unpack_seq_decode (int mode,
*** 4338,4352 ****
    return 1;
  }
  
! /* Decompress a zstd stream from PIN/SIN to POUT/SOUT.  Code based on RFC 8878.
     Return 1 on success, 0 on error.  */
  
  static int
! elf_zstd_decompress (const unsigned char *pin, size_t sin,
! 		     unsigned char *zdebug_table, unsigned char *pout,
! 		     size_t sout)
  {
!   const unsigned char *pinend;
    unsigned char *poutstart;
    unsigned char *poutend;
    struct elf_zstd_seq_decode literal_decode;
--- 4338,4354 ----
    return 1;
  }
  
! /* Decompress a single zstd frame from *PPIN, ending at PINEND, to *PPOUT/SOUT.
     Return 1 on success, 0 on error.  */
  
  static int
! elf_zstd_decompress_frame (const unsigned char **ppin,
! 			   const unsigned char *pinend,
! 			   unsigned char *zdebug_table, unsigned char **ppout,
! 			   size_t sout)
  {
!   const unsigned char *pin;
!   unsigned char *pout;
    unsigned char *poutstart;
    unsigned char *poutend;
    struct elf_zstd_seq_decode literal_decode;
*************** elf_zstd_decompress (const unsigned char
*** 4366,4374 ****
    uint64_t content_size;
    int last_block;
  
!   pinend = pin + sin;
    poutstart = pout;
-   poutend = pout + sout;
  
    literal_decode.table = NULL;
    literal_decode.table_bits = -1;
--- 4368,4376 ----
    uint64_t content_size;
    int last_block;
  
!   pin = *ppin;
!   pout = *ppout;
    poutstart = pout;
  
    literal_decode.table = NULL;
    literal_decode.table_bits = -1;
*************** elf_zstd_decompress (const unsigned char
*** 4394,4400 ****
    repeated_offset2 = 4;
    repeated_offset3 = 8;
  
!   if (unlikely (sin < 4))
      {
        elf_uncompress_failed ();
        return 0;
--- 4396,4402 ----
    repeated_offset2 = 4;
    repeated_offset3 = 8;
  
!   if (unlikely (pinend - pin < 4))
      {
        elf_uncompress_failed ();
        return 0;
*************** elf_zstd_decompress (const unsigned char
*** 4492,4503 ****
      }
  
    if (unlikely (content_size != (size_t) content_size
! 		|| (size_t) content_size != sout))
      {
        elf_uncompress_failed ();
        return 0;
      }
  
    last_block = 0;
    while (!last_block)
      {
--- 4494,4507 ----
      }
  
    if (unlikely (content_size != (size_t) content_size
! 		|| (size_t) content_size > sout))
      {
        elf_uncompress_failed ();
        return 0;
      }
  
+   poutend = pout + content_size;
+ 
    last_block = 0;
    while (!last_block)
      {
*************** elf_zstd_decompress (const unsigned char
*** 4996,5002 ****
        pin += 4;
      }
  
!   if (pin != pinend)
      {
        elf_uncompress_failed ();
        return 0;
--- 5000,5041 ----
        pin += 4;
      }
  
!   *ppin = pin;
!   *ppout = pout;
! 
!   return 1;
! }
! 
! /* Decompress a zstd stream from PIN/SIN to POUT/SOUT.  Code based on RFC 8878.
!    Return 1 on success, 0 on error.  */
! 
! static int
! elf_zstd_decompress (const unsigned char *pin, size_t sin,
! 		     unsigned char *zdebug_table, unsigned char *pout,
! 		     size_t sout)
! {
!   const unsigned char *pinend;
! 
!   pinend = pin + sin;
! 
!   while (sin > 0)
!     {
!       const unsigned char *pin_frame;
!       unsigned char *pout_frame;
! 
!       pin_frame = pin;
!       pout_frame = pout;
!       if (!elf_zstd_decompress_frame (&pin_frame, pinend, zdebug_table,
! 				      &pout_frame, sout))
! 	return 0;
! 
!       sin -= pin_frame - pin;
!       pin = pin_frame;
!       sout -= pout_frame - pout;
!       pout = pout_frame;
!     }
! 
!   if (sout > 0)
      {
        elf_uncompress_failed ();
        return 0;
diff -Nrcpad gcc-17-20260503/libbacktrace/zstdtest.c gcc-17-20260510/libbacktrace/zstdtest.c
*** gcc-17-20260503/libbacktrace/zstdtest.c	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libbacktrace/zstdtest.c	Sun May 10 22:32:14 2026
*************** test_large (struct backtrace_state *stat
*** 297,304 ****
    size_t orig_bufsize;
    size_t i;
    char *compressed_buf;
-   size_t compressed_bufsize;
    size_t compressed_size;
    unsigned char *uncompressed_buf;
    size_t r;
    clockid_t cid;
--- 297,304 ----
    size_t orig_bufsize;
    size_t i;
    char *compressed_buf;
    size_t compressed_size;
+   size_t chunk_size;
    unsigned char *uncompressed_buf;
    size_t r;
    clockid_t cid;
*************** test_large (struct backtrace_state *stat
*** 370,391 ****
        return;
      }
  
!   compressed_bufsize = ZSTD_compressBound (orig_bufsize);
!   compressed_buf = malloc (compressed_bufsize);
!   if (compressed_buf == NULL)
!     {
!       perror ("malloc");
!       goto fail;
!     }
  
!   r = ZSTD_compress (compressed_buf, compressed_bufsize,
! 		     orig_buf, orig_bufsize, 3);
!   if (ZSTD_isError (r))
      {
!       fprintf (stderr, "zstd compress failed: %s\n", ZSTD_getErrorName (r));
!       goto fail;
      }
-   compressed_size = r;
  
    uncompressed_buf = malloc (orig_bufsize);
    if (uncompressed_buf == NULL)
--- 370,408 ----
        return;
      }
  
!   /* Split the input into 100K chunks. This is to approximate the fact that lld
!      splits the input into 1M shards. */
  
!   compressed_size = 0;
!   compressed_buf = NULL;
!   chunk_size = 100 << 10;
!   for (i = 0; i < orig_bufsize; i += chunk_size)
      {
!       size_t chunk_input_size;
!       size_t chunk_compressed_size;
! 
!       chunk_input_size = orig_bufsize - i;
!       if (chunk_input_size > chunk_size)
! 	chunk_input_size = chunk_size;
! 
!       chunk_compressed_size = ZSTD_compressBound (chunk_input_size);
!       compressed_buf = realloc (compressed_buf, compressed_size + chunk_compressed_size);
!       if (compressed_buf == NULL)
! 	{
! 	  perror ("realloc");
! 	  goto fail;
! 	}
! 
!       r = ZSTD_compress (compressed_buf + compressed_size,
! 			 chunk_compressed_size,
! 			 orig_buf + i, chunk_input_size, 3);
!       if (ZSTD_isError (r))
! 	{
! 	  fprintf (stderr, "zstd compress failed: %s\n", ZSTD_getErrorName (r));
! 	  goto fail;
! 	}
!       compressed_size += r;
      }
  
    uncompressed_buf = malloc (orig_bufsize);
    if (uncompressed_buf == NULL)
diff -Nrcpad gcc-17-20260503/libga68/ChangeLog gcc-17-20260510/libga68/ChangeLog
*** gcc-17-20260503/libga68/ChangeLog	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libga68/ChangeLog	Sun May 10 22:32:15 2026
***************
*** 1,3 ****
--- 1,12 ----
+ 2026-05-08  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* Makefile.in: Regenerate.
+ 	* acinclude.m4: Delete LIBGA68_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* aclocal.m4: Regenerate.
+ 	* configure: Regenerate.
+ 	* configure.ac: Use GCC_CHECK_ATTRIBUTE_VISIBILITY instead of
+ 	LIBGA68_CHECK_ATTRIBUTE_VISIBILITY.
+ 
  2026-03-21  Jose E. Marchesi  <jemarch@gnu.org>
  
  	* ga68-math.c: New file.
diff -Nrcpad gcc-17-20260503/libga68/Makefile.in gcc-17-20260510/libga68/Makefile.in
*** gcc-17-20260503/libga68/Makefile.in	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libga68/Makefile.in	Sun May 10 22:32:15 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 125,130 ****
--- 125,131 ----
  	$(top_srcdir)/../config/multi.m4 \
  	$(top_srcdir)/../config/no-executables.m4 \
  	$(top_srcdir)/../config/override.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../libtool.m4 $(top_srcdir)/../ltoptions.m4 \
  	$(top_srcdir)/../ltsugar.m4 $(top_srcdir)/../ltversion.m4 \
  	$(top_srcdir)/../lt~obsolete.m4 $(top_srcdir)/acinclude.m4 \
diff -Nrcpad gcc-17-20260503/libga68/acinclude.m4 gcc-17-20260510/libga68/acinclude.m4
*** gcc-17-20260503/libga68/acinclude.m4	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libga68/acinclude.m4	Sun May 10 22:32:15 2026
*************** dnl even the implied warranty of MERCHAN
*** 9,26 ****
  dnl PARTICULAR PURPOSE.
  
  m4_include([m4/autoconf.m4])
- 
- dnl Check whether the target supports hidden visibility.
- AC_DEFUN([LIBGA68_CHECK_ATTRIBUTE_VISIBILITY], [
-   AC_CACHE_CHECK([whether the target supports hidden visibility],
- 		 libga68_cv_have_attribute_visibility, [
-   save_CFLAGS="$CFLAGS"
-   CFLAGS="$CFLAGS -Werror"
-   AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[void __attribute__((visibility("hidden"))) foo(void) { }]], [])],
- 		    [libga68_cv_have_attribute_visibility=yes],
- 		    [libga68_cv_have_attribute_visibility=no])
-   CFLAGS="$save_CFLAGS"])
-   if test $libga68_cv_have_attribute_visibility = yes; then
-     AC_DEFINE(HAVE_ATTRIBUTE_VISIBILITY, 1,
-       [Define to 1 if the target supports __attribute__((visibility(...))).])
-   fi])
--- 9,11 ----
diff -Nrcpad gcc-17-20260503/libga68/aclocal.m4 gcc-17-20260510/libga68/aclocal.m4
*** gcc-17-20260503/libga68/aclocal.m4	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libga68/aclocal.m4	Sun May 10 22:32:15 2026
*************** m4_include([../config/lthostflags.m4])
*** 1196,1201 ****
--- 1196,1202 ----
  m4_include([../config/multi.m4])
  m4_include([../config/no-executables.m4])
  m4_include([../config/override.m4])
+ m4_include([../config/visibility.m4])
  m4_include([../libtool.m4])
  m4_include([../ltoptions.m4])
  m4_include([../ltsugar.m4])
diff -Nrcpad gcc-17-20260503/libga68/configure gcc-17-20260510/libga68/configure
*** gcc-17-20260503/libga68/configure	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libga68/configure	Sun May 10 22:32:15 2026
*************** CC_FOR_BUILD=${CC_FOR_BUILD:-gcc}
*** 13227,13233 ****
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${libga68_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
--- 13227,13233 ----
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${gcc_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
*************** main ()
*** 13245,13260 ****
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   libga68_cv_have_attribute_visibility=yes
  else
!   libga68_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libga68_cv_have_attribute_visibility" >&5
! $as_echo "$libga68_cv_have_attribute_visibility" >&6; }
!   if test $libga68_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
--- 13245,13260 ----
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   gcc_cv_have_attribute_visibility=yes
  else
!   gcc_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_have_attribute_visibility" >&5
! $as_echo "$gcc_cv_have_attribute_visibility" >&6; }
!   if test $gcc_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
diff -Nrcpad gcc-17-20260503/libga68/configure.ac gcc-17-20260510/libga68/configure.ac
*** gcc-17-20260503/libga68/configure.ac	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libga68/configure.ac	Sun May 10 22:32:15 2026
*************** CC_FOR_BUILD=${CC_FOR_BUILD:-gcc}
*** 171,177 ****
  AC_SUBST(CC_FOR_BUILD)
  
  # Check whether the target supports hidden visibility.
! LIBGA68_CHECK_ATTRIBUTE_VISIBILITY
  
  # Search for needed functions in host libraries.
  AC_SEARCH_LIBS([malloc], [c])
--- 171,177 ----
  AC_SUBST(CC_FOR_BUILD)
  
  # Check whether the target supports hidden visibility.
! GCC_CHECK_ATTRIBUTE_VISIBILITY
  
  # Search for needed functions in host libraries.
  AC_SEARCH_LIBS([malloc], [c])
diff -Nrcpad gcc-17-20260503/libgcc/ChangeLog gcc-17-20260510/libgcc/ChangeLog
*** gcc-17-20260503/libgcc/ChangeLog	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libgcc/ChangeLog	Sun May 10 22:32:15 2026
***************
*** 1,3 ****
--- 1,9 ----
+ 2026-05-04  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	* config/m32c/*: Delete entire directory.
+ 	* config.host: Remove references to m32c.
+ 	* config/rl78/lib2div.c (C3): Likewise.
+ 
  2026-04-23  Eric Botcazou  <ebotcazou@adacore.com>
  
  	* config/i386/t-slibgcc-cygming (SHLIB_LINK): Add $(LDFLAGS).
diff -Nrcpad gcc-17-20260503/libgcc/config/m32c/lib1funcs.S gcc-17-20260510/libgcc/config/m32c/lib1funcs.S
*** gcc-17-20260503/libgcc/config/m32c/lib1funcs.S	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libgcc/config/m32c/lib1funcs.S	Thu Jan  1 00:00:00 1970
***************
*** 1,230 ****
- /* libgcc routines for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    Under Section 7 of GPL version 3, you are granted additional
-    permissions described in the GCC Runtime Library Exception, version
-    3.1, as published by the Free Software Foundation.
- 
-    You should have received a copy of the GNU General Public License and
-    a copy of the GCC Runtime Library Exception along with this program;
-    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-    <http://www.gnu.org/licenses/>.  */
- 
- #if defined(__r8c_cpu__) || defined(__m16c_cpu__)
- #define A16
- #define A(n,w) n
- #define W w
- #else
- #define A24
- #define A(n,w) w
- #define W l
- #endif
- 
- 
- #ifdef L__m32c_memregs
- 
- /* Warning: these memory locations are used as a register bank.  They
-    *must* end up consecutive in any final executable, so you may *not*
-    use the otherwise obvious ".comm" directive to allocate space for
-    them. */
- 
- 	.bss
- 	.global	mem0
- mem0:	.space	1
- 	.global	mem1
- mem1:	.space	1
- 	.global	mem2
- mem2:	.space	1
- 	.global	mem3
- mem3:	.space	1
- 	.global	mem4
- mem4:	.space	1
- 	.global	mem5
- mem5:	.space	1
- 	.global	mem6
- mem6:	.space	1
- 	.global	mem7
- mem7:	.space	1
- 	.global	mem8
- mem8:	.space	1
- 	.global	mem9
- mem9:	.space	1
- 	.global	mem10
- mem10:	.space	1
- 	.global	mem11
- mem11:	.space	1
- 	.global	mem12
- mem12:	.space	1
- 	.global	mem13
- mem13:	.space	1
- 	.global	mem14
- mem14:	.space	1
- 	.global	mem15
- mem15:	.space	1
- 
- #endif
- 
- #ifdef L__m32c_eh_return
- 	.text
- 	.global __m32c_eh_return
- __m32c_eh_return:	
- 
- 	/* At this point, r0 has the stack adjustment, r1r3 has the
- 	   address to return to.  The stack looks like this:
- 
- 	   old_ra
- 	   old_fp
- 	   <- unwound sp
- 	   ...
- 	   fb
- 	   through
- 	   r0
- 	   <- sp
- 
- 	   What we need to do is restore all the registers, update the
- 	   stack, and return to the right place.
- 	*/
- 
- 	stc	sp,a0
- 	
- 	add.W	A(#16,#24),a0
- 	/* a0 points to the current stack, just above the register
- 	   save areas */
- 
- 	mov.w	a0,a1
- 	exts.w	r0
- 	sub.W	A(r0,r2r0),a1
- 	sub.W	A(#3,#4),a1
- 	/* a1 points to the new stack.  */
- 
- 	/* This is for the "rts" below.  */
- 	mov.w	r1,[a1]
- #ifdef A16
- 	mov.w	r2,r1
- 	mov.b	r1l,2[a1]
- #else
- 	mov.w	r2,2[a1]
- #endif
- 
- 	/* This is for the "popc sp" below.  */
- 	mov.W	a1,[a0]	
- 
- 	popm    r0,r1,r2,r3,a0,a1,sb,fb
- 	popc	sp
- 	rts
- #endif
- 
- /* SImode arguments for SI foo(SI,SI) functions.  */
- #ifdef A16
- #define SAL  5[fb]
- #define SAH  7[fb]
- #define SBL  9[fb]
- #define SBH 11[fb]
- #else
- #define SAL  8[fb]
- #define SAH 10[fb]
- #define SBL 12[fb]
- #define SBH 14[fb]
- #endif
- 
- #ifdef L__m32c_mulsi3
- 	.text
- 	.global ___mulsi3
- ___mulsi3:
- 	enter	#0
- 	push.w	r2
- 	mov.w	SAL,r0
- 	mulu.w	SBL,r0		/* writes to r2r0 */
- 	mov.w	r0,mem0
- 	mov.w	r2,mem2
- 	mov.w	SAL,r0
- 	mulu.w	SBH,r0		/* writes to r2r0 */
- 	add.w	r0,mem2
- 	mov.w	SAH,r0
- 	mulu.w	SBL,r0		/* writes to r2r0 */
- 	add.w	r0,mem2
- 	pop.w	r2
- 	exitd
- #endif
- 
- #ifdef L__m32c_cmpsi2
- 	.text
- 	.global ___cmpsi2
- ___cmpsi2:
- 	enter	#0
- 	cmp.w	SBH,SAH
- 	jgt	cmpsi_gt
- 	jlt	cmpsi_lt
- 	cmp.w	SBL,SAL
- 	jgt	cmpsi_gt
- 	jlt	cmpsi_lt
- 	mov.w	#1,r0
- 	exitd
- cmpsi_gt:
- 	mov.w	#2,r0
- 	exitd
- cmpsi_lt:
- 	mov.w	#0,r0
- 	exitd
- #endif
- 
- #ifdef L__m32c_ucmpsi2
- 	.text
- 	.global ___ucmpsi2
- ___ucmpsi2:
- 	enter	#0
- 	cmp.w	SBH,SAH
- 	jgtu	cmpsi_gt
- 	jltu	cmpsi_lt
- 	cmp.w	SBL,SAL
- 	jgtu	cmpsi_gt
- 	jltu	cmpsi_lt
- 	mov.w	#1,r0
- 	exitd
- cmpsi_gt:
- 	mov.w	#2,r0
- 	exitd
- cmpsi_lt:
- 	mov.w	#0,r0
- 	exitd
- #endif
- 
- #ifdef L__m32c_jsri16
- 	.text
- #ifdef A16
- 	.global	m32c_jsri16
- m32c_jsri16:
- 	add.w	#-1, sp
- 
- 	/* Read the address (16 bits) and return address (24 bits) off
- 	the stack.  */
- 	mov.w	4[sp], r0
- 	mov.w	1[sp], r3
- 	mov.b	3[sp], a0 /* This zero-extends, so the high byte has
- 			     zero in it.  */
- 
- 	/* Write the return address, then new address, to the stack.  */
- 	mov.w	a0, 1[sp] /* Just to get the zero in 2[sp].  */
- 	mov.w	r0, 0[sp]
- 	mov.w	r3, 3[sp]
- 	mov.b	a0, 5[sp]
- 
- 	/* This "returns" to the target address, leaving the pending
- 	return address on the stack.  */
- 	rts
- #endif
- 
- #endif
--- 0 ----
diff -Nrcpad gcc-17-20260503/libgcc/config/m32c/lib2funcs.c gcc-17-20260510/libgcc/config/m32c/lib2funcs.c
*** gcc-17-20260503/libgcc/config/m32c/lib2funcs.c	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libgcc/config/m32c/lib2funcs.c	Thu Jan  1 00:00:00 1970
***************
*** 1,147 ****
- /* libgcc routines for R8C/M16C/M32C
-    Copyright (C) 2005-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    Under Section 7 of GPL version 3, you are granted additional
-    permissions described in the GCC Runtime Library Exception, version
-    3.1, as published by the Free Software Foundation.
- 
-    You should have received a copy of the GNU General Public License and
-    a copy of the GCC Runtime Library Exception along with this program;
-    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-    <http://www.gnu.org/licenses/>.  */
- 
- typedef          int  sint32_type   __attribute__ ((mode (SI)));
- typedef unsigned int  uint32_type   __attribute__ ((mode (SI)));
- typedef int           word_type     __attribute__ ((mode (__word__)));
- 
- uint32_type udivmodsi4 (uint32_type, uint32_type, word_type);
- sint32_type __divsi3   (sint32_type, sint32_type);
- sint32_type __modsi3   (sint32_type, sint32_type);
- 
- uint32_type
- udivmodsi4 (uint32_type num, uint32_type den, word_type modwanted)
- {
-   uint32_type bit = 1;
-   uint32_type res = 0;
- 
-   while (den < num && bit && !(den & (1L << 31)))
-     {
-       den <<= 1;
-       bit <<= 1;
-     }
-   while (bit)
-     {
-       if (num >= den)
- 	{
- 	  num -= den;
- 	  res |= bit;
- 	}
-       bit >>= 1;
-       den >>= 1;
-     }
-   if (modwanted)
-     return num;
-   return res;
- }
- 
- sint32_type
- __divsi3 (sint32_type a, sint32_type b)
- {
-   word_type neg = 0;
-   sint32_type res;
- 
-   if (a < 0)
-     {
-       a = -a;
-       neg = !neg;
-     }
- 
-   if (b < 0)
-     {
-       b = -b;
-       neg = !neg;
-     }
- 
-   res = udivmodsi4 (a, b, 0);
- 
-   if (neg)
-     res = -res;
- 
-   return res;
- }
- 
- sint32_type
- __modsi3 (sint32_type a, sint32_type b)
- {
-   word_type neg = 0;
-   sint32_type res;
- 
-   if (a < 0)
-     {
-       a = -a;
-       neg = 1;
-     }
- 
-   if (b < 0)
-     b = -b;
- 
-   res = udivmodsi4 (a, b, 1);
- 
-   if (neg)
-     res = -res;
- 
-   return res;
- }
- 
- /* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
-    m32c.h for why we are creating extra versions of some of the
-    functions defined in libgcc2.c.  */
- 
- #define LIBGCC2_UNITS_PER_WORD 2
- 
- #define L_clzsi2
- #define L_ctzsi2
- #define L_ffssi2
- #define L_paritysi2
- #define L_popcountsi2
- 
- #include "libgcc2.c"
- 
- uint32_type
- __udivsi3 (uint32_type a, uint32_type b)
- {
-   return udivmodsi4 (a, b, 0);
- }
- 
- uint32_type
- __umoddi3 (uint32_type a, uint32_type b)
- {
-   return udivmodsi4 (a, b, 1);
- }
- 
- /* Returns the number of leading redundant sign bits in X.
-    I.e. the number of bits following the most significant bit which are
-    identical to it.  There are no special cases for 0 or other values.  */
- 
- int
- __clrsbhi2 (word_type x)
- {
-   if (x < 0)
-     x = ~x;
-   if (x == 0)
-     return 15;
-   return __builtin_clz (x) - 1;
- }
--- 0 ----
diff -Nrcpad gcc-17-20260503/libgcc/config/m32c/t-m32c gcc-17-20260510/libgcc/config/m32c/t-m32c
*** gcc-17-20260503/libgcc/config/m32c/t-m32c	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libgcc/config/m32c/t-m32c	Thu Jan  1 00:00:00 1970
***************
*** 1,13 ****
- LIB1ASMSRC = m32c/lib1funcs.S
- 
- LIB1ASMFUNCS = \
- 	__m32c_memregs \
- 	__m32c_eh_return \
- 	__m32c_mulsi3 \
- 	__m32c_cmpsi2 \
- 	__m32c_ucmpsi2 \
- 	__m32c_jsri16
- 
- LIB2ADD = $(srcdir)/config/m32c/lib2funcs.c \
- 	  $(srcdir)/config/m32c/trapv.c
- 
--- 0 ----
diff -Nrcpad gcc-17-20260503/libgcc/config/m32c/trapv.c gcc-17-20260510/libgcc/config/m32c/trapv.c
*** gcc-17-20260503/libgcc/config/m32c/trapv.c	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libgcc/config/m32c/trapv.c	Thu Jan  1 00:00:00 1970
***************
*** 1,42 ****
- /* 16-bit trapping arithmetic routines for R8C/M16C/M32C
-    Copyright (C) 2009-2026 Free Software Foundation, Inc.
-    Contributed by Red Hat.
- 
-    This file is part of GCC.
- 
-    GCC is free software; you can redistribute it and/or modify it
-    under the terms of the GNU General Public License as published
-    by the Free Software Foundation; either version 3, or (at your
-    option) any later version.
- 
-    GCC is distributed in the hope that it will be useful, but WITHOUT
-    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
-    License for more details.
- 
-    Under Section 7 of GPL version 3, you are granted additional
-    permissions described in the GCC Runtime Library Exception, version
-    3.1, as published by the Free Software Foundation.
- 
-    You should have received a copy of the GNU General Public License and
-    a copy of the GCC Runtime Library Exception along with this program;
-    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
-    <http://www.gnu.org/licenses/>.  */
- 
- /* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
-    m32c.h for why we are creating extra versions of some of the
-    functions defined in libgcc2.c.
- 
-    Note - this file is separate from lib2funcs.c so that the following
-    functions will appear in the their object file.  This is necessary
-    because they call abort() which is defined in the C library whereas
-    the functions in lib2funcs.c are completely self sufficient.  */
- 
- #define LIBGCC2_UNITS_PER_WORD 2
- 
- #define L_mulvsi3
- #define L_negvsi2
- #define L_addvsi3
- #define L_subvsi3
- 
- #include "libgcc2.c"
--- 0 ----
diff -Nrcpad gcc-17-20260503/libgcc/config/rl78/lib2div.c gcc-17-20260510/libgcc/config/rl78/lib2div.c
*** gcc-17-20260503/libgcc/config/rl78/lib2div.c	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgcc/config/rl78/lib2div.c	Sun May 10 22:32:15 2026
*************** typedef int           word_type     __at
*** 35,41 ****
  #define C3(a,b,c) C3B(a,b,c)
  
  /* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
!    m32c.h for why we are creating extra versions of some of the
     functions defined in libgcc2.c.  */
  
  #define LIBGCC2_UNITS_PER_WORD 2
--- 35,41 ----
  #define C3(a,b,c) C3B(a,b,c)
  
  /* See the comment by the definition of LIBGCC2_UNITS_PER_WORD in
!    msp430.h for why we are creating extra versions of some of the
     functions defined in libgcc2.c.  */
  
  #define LIBGCC2_UNITS_PER_WORD 2
diff -Nrcpad gcc-17-20260503/libgcc/config.host gcc-17-20260510/libgcc/config.host
*** gcc-17-20260503/libgcc/config.host	Sun May  3 22:32:13 2026
--- gcc-17-20260510/libgcc/config.host	Sun May 10 22:32:15 2026
*************** unwind_header=unwind-generic.h
*** 81,90 ****
  # Set default cpu_type so it can be updated in each machine entry.
  cpu_type=`echo ${host} | sed 's/-.*$//'`
  case ${host} in
- m32c*-*-*)
-         cpu_type=m32c
- 	tmake_file=t-fdpbit
-         ;;
  aarch64*-*-*)
  	cpu_type=aarch64
  	;;
--- 81,86 ----
*************** am33_2.0-*-linux*)
*** 1567,1575 ****
  	extra_parts="crtbegin.o crtend.o crtbeginS.o crtendS.o"
  	tmake_file="$tmake_file t-fdpbit"
  	;;
- m32c-*-elf*)
- 	tmake_file="$tmake_file m32c/t-m32c"
-  	;;
  nvptx-*)
  	tmake_file="$tmake_file nvptx/t-nvptx"
  	extra_parts="crt0.o"
--- 1563,1568 ----
diff -Nrcpad gcc-17-20260503/libgfortran/ChangeLog gcc-17-20260510/libgfortran/ChangeLog
*** gcc-17-20260503/libgfortran/ChangeLog	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/ChangeLog	Sun May 10 22:32:15 2026
***************
*** 1,3 ****
--- 1,34 ----
+ 2026-05-08  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR libfortran/125087
+ 	* io/format.c (free_format_data): Change argument from pointer to
+ 	format_data to pointer to pointer of object.
+ 	(free_format_hash_table): Adjust argument passed to
+ 	free_format_data.
+ 	(save_parsed_format): Likewise.
+ 	* io/format.h (free_format_data): Adjust prototype.
+ 	* io/transfer.c (st_read_done_worker): Adjust argument passed to
+ 	free_format_data.
+ 	(st_write_done_worker): Likewise.
+ 
+ 2026-05-06  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR libfortran/125095
+ 	* io/list_read.c (read_logical): Eat comments in namelist read mode.
+ 	(read_integer): Likewise.
+ 	(read_character): Likewise.
+ 	(read_complex): Likewise.
+ 	(read_real): Likewise.
+ 
+ 2026-05-05  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* Makefile.in: Regenerate.
+ 	* acinclude.m4: Delete LIBGFOR_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* aclocal.m4: Regenerate.
+ 	* configure: Likewise.
+ 	* configure.ac: Use GCC_CHECK_ATTRIBUTE_VISIBILITY istead of
+ 	LIBGFOR_CHECK_ATTRIBUTE_VISIBILITY.
+ 
  2026-04-17  Steven G. Kargl  <kargl@gcc.gnu.org>
  
  	PR libfortran/120431
diff -Nrcpad gcc-17-20260503/libgfortran/Makefile.in gcc-17-20260510/libgfortran/Makefile.in
*** gcc-17-20260503/libgfortran/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgfortran/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 171,176 ****
--- 171,177 ----
  	$(top_srcdir)/../config/override.m4 \
  	$(top_srcdir)/../config/stdint.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
  	$(top_srcdir)/acinclude.m4 $(top_srcdir)/../config/acx.m4 \
diff -Nrcpad gcc-17-20260503/libgfortran/acinclude.m4 gcc-17-20260510/libgfortran/acinclude.m4
*** gcc-17-20260503/libgfortran/acinclude.m4	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/acinclude.m4	Sun May 10 22:32:15 2026
*************** AC_DEFUN([AC_LIBTOOL_DLOPEN])
*** 31,51 ****
  AC_DEFUN([AC_PROG_LD])
  ])
  
- dnl Check whether the target supports hidden visibility.
- AC_DEFUN([LIBGFOR_CHECK_ATTRIBUTE_VISIBILITY], [
-   AC_CACHE_CHECK([whether the target supports hidden visibility],
- 		 libgfor_cv_have_attribute_visibility, [
-   save_CFLAGS="$CFLAGS"
-   CFLAGS="$CFLAGS -Werror"
-   AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[void __attribute__((visibility("hidden"))) foo(void) { }]], [])],
- 		    libgfor_cv_have_attribute_visibility=yes,
- 		    libgfor_cv_have_attribute_visibility=no)
-   CFLAGS="$save_CFLAGS"])
-   if test $libgfor_cv_have_attribute_visibility = yes; then
-     AC_DEFINE(HAVE_ATTRIBUTE_VISIBILITY, 1,
-       [Define to 1 if the target supports __attribute__((visibility(...))).])
-   fi])
- 
  dnl Check whether the target supports symbol aliases.
  AC_DEFUN([LIBGFOR_CHECK_ATTRIBUTE_ALIAS], [
    AC_CACHE_CHECK([whether the target supports symbol aliases],
--- 31,36 ----
diff -Nrcpad gcc-17-20260503/libgfortran/aclocal.m4 gcc-17-20260510/libgfortran/aclocal.m4
*** gcc-17-20260503/libgfortran/aclocal.m4	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgfortran/aclocal.m4	Sun May 10 22:32:19 2026
*************** m4_include([../config/multi.m4])
*** 1178,1183 ****
--- 1178,1184 ----
  m4_include([../config/override.m4])
  m4_include([../config/stdint.m4])
  m4_include([../config/toolexeclibdir.m4])
+ m4_include([../config/visibility.m4])
  m4_include([../ltoptions.m4])
  m4_include([../ltsugar.m4])
  m4_include([../ltversion.m4])
diff -Nrcpad gcc-17-20260503/libgfortran/configure gcc-17-20260510/libgfortran/configure
*** gcc-17-20260503/libgfortran/configure	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgfortran/configure	Sun May 10 22:32:19 2026
*************** fi
*** 32021,32027 ****
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${libgfor_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
--- 32021,32027 ----
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${gcc_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
*************** main ()
*** 32039,32054 ****
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   libgfor_cv_have_attribute_visibility=yes
  else
!   libgfor_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libgfor_cv_have_attribute_visibility" >&5
! $as_echo "$libgfor_cv_have_attribute_visibility" >&6; }
!   if test $libgfor_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
--- 32039,32054 ----
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   gcc_cv_have_attribute_visibility=yes
  else
!   gcc_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_have_attribute_visibility" >&5
! $as_echo "$gcc_cv_have_attribute_visibility" >&6; }
!   if test $gcc_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
diff -Nrcpad gcc-17-20260503/libgfortran/configure.ac gcc-17-20260510/libgfortran/configure.ac
*** gcc-17-20260503/libgfortran/configure.ac	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/configure.ac	Sun May 10 22:32:15 2026
*************** fi
*** 787,793 ****
  
  
  # Check out attribute support.
! LIBGFOR_CHECK_ATTRIBUTE_VISIBILITY
  LIBGFOR_CHECK_ATTRIBUTE_ALIAS
  
  # Check out atomic builtins support.
--- 787,793 ----
  
  
  # Check out attribute support.
! GCC_CHECK_ATTRIBUTE_VISIBILITY
  LIBGFOR_CHECK_ATTRIBUTE_ALIAS
  
  # Check out atomic builtins support.
diff -Nrcpad gcc-17-20260503/libgfortran/io/format.c gcc-17-20260510/libgfortran/io/format.c
*** gcc-17-20260503/libgfortran/io/format.c	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/io/format.c	Sun May 10 22:32:15 2026
*************** free_format_hash_table (gfc_unit *u)
*** 65,71 ****
      {
        if (u->format_hash_table[i].hashed_fmt != NULL)
  	{
! 	  free_format_data (u->format_hash_table[i].hashed_fmt);
  	  free (u->format_hash_table[i].key);
  	}
        u->format_hash_table[i].key = NULL;
--- 65,71 ----
      {
        if (u->format_hash_table[i].hashed_fmt != NULL)
  	{
! 	  free_format_data (&u->format_hash_table[i].hashed_fmt);
  	  free (u->format_hash_table[i].key);
  	}
        u->format_hash_table[i].key = NULL;
*************** save_parsed_format (st_parameter_dt *dtp
*** 143,149 ****
    /* Index into the hash table.  We are simply replacing whatever is there
       relying on probability.  */
    if (u->format_hash_table[hash].hashed_fmt != NULL)
!     free_format_data (u->format_hash_table[hash].hashed_fmt);
    u->format_hash_table[hash].hashed_fmt = NULL;
  
    free (u->format_hash_table[hash].key);
--- 143,149 ----
    /* Index into the hash table.  We are simply replacing whatever is there
       relying on probability.  */
    if (u->format_hash_table[hash].hashed_fmt != NULL)
!     free_format_data (&u->format_hash_table[hash].hashed_fmt);
    u->format_hash_table[hash].hashed_fmt = NULL;
  
    free (u->format_hash_table[hash].key);
*************** free_format (st_parameter_dt *dtp)
*** 258,273 ****
  /* free_format_data()-- Free all allocated format data.  */
  
  void
! free_format_data (format_data *fmt)
  {
    fnode_array *fa, *fa_next;
    fnode *fnp;
  
!   if (fmt == NULL)
      return;
  
    /* Free vlist descriptors in the fnode_array if one was allocated.  */
!   for (fnp = fmt->array.array; fnp < &fmt->array.array[FARRAY_SIZE] &&
         fnp->format != FMT_NONE; fnp++)
      if (fnp->format == FMT_DT)
  	{
--- 258,273 ----
  /* free_format_data()-- Free all allocated format data.  */
  
  void
! free_format_data (format_data **fmt)
  {
    fnode_array *fa, *fa_next;
    fnode *fnp;
  
!   if (fmt == NULL || *fmt == NULL)
      return;
  
    /* Free vlist descriptors in the fnode_array if one was allocated.  */
!   for (fnp = (*fmt)->array.array; fnp < &(*fmt)->array.array[FARRAY_SIZE] &&
         fnp->format != FMT_NONE; fnp++)
      if (fnp->format == FMT_DT)
  	{
*************** free_format_data (format_data *fmt)
*** 275,288 ****
  	  free (fnp->u.udf.vlist);
  	}
  
!   for (fa = fmt->array.next; fa; fa = fa_next)
      {
        fa_next = fa->next;
        free (fa);
      }
  
!   free (fmt);
!   fmt = NULL;
  }
  
  
--- 275,288 ----
  	  free (fnp->u.udf.vlist);
  	}
  
!   for (fa = (*fmt)->array.next; fa; fa = fa_next)
      {
        fa_next = fa->next;
        free (fa);
      }
  
!   free (*fmt);
!   *fmt = NULL;
  }
  
  
diff -Nrcpad gcc-17-20260503/libgfortran/io/format.h gcc-17-20260510/libgfortran/io/format.h
*** gcc-17-20260503/libgfortran/io/format.h	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/io/format.h	Sun May 10 22:32:15 2026
*************** internal_proto(unget_format);
*** 122,128 ****
  extern void format_error (st_parameter_dt *, const fnode *, const char *);
  internal_proto(format_error);
  
! extern void free_format_data (struct format_data *);
  internal_proto(free_format_data);
  
  extern void free_format (st_parameter_dt *);
--- 122,128 ----
  extern void format_error (st_parameter_dt *, const fnode *, const char *);
  internal_proto(format_error);
  
! extern void free_format_data (struct format_data **);
  internal_proto(free_format_data);
  
  extern void free_format (st_parameter_dt *);
diff -Nrcpad gcc-17-20260503/libgfortran/io/list_read.c gcc-17-20260510/libgfortran/io/list_read.c
*** gcc-17-20260503/libgfortran/io/list_read.c	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/io/list_read.c	Sun May 10 22:32:15 2026
*************** read_logical (st_parameter_dt *dtp, int
*** 917,922 ****
--- 917,923 ----
    if (parse_repeat (dtp))
      return;
  
+ next:
    c = safe_tolower (next_char (dtp));
    l_push_char (dtp, c);
    switch (c)
*************** read_logical (st_parameter_dt *dtp, int
*** 961,966 ****
--- 962,970 ----
      case '!':
        if (!dtp->u.p.namelist_mode)
          goto bad_logical;
+       eat_line (dtp);
+       eat_spaces (dtp);
+       goto next;
  
      CASE_SEPARATORS:
      case EOF:
*************** read_integer (st_parameter_dt *dtp, int
*** 1076,1081 ****
--- 1080,1086 ----
    int c, negative;
    negative = 0;
  
+ next:
    c = next_char (dtp);
    switch (c)
      {
*************** read_integer (st_parameter_dt *dtp, int
*** 1091,1096 ****
--- 1096,1104 ----
      case '!':
        if (!dtp->u.p.namelist_mode)
          goto bad_integer;
+       eat_line (dtp);
+       eat_spaces (dtp);
+       goto next;
  
      CASE_SEPARATORS:		/* Single null.  */
        unget_char (dtp, c);
*************** read_character (st_parameter_dt *dtp, in
*** 1260,1265 ****
--- 1268,1274 ----
  
    quote = ' ';			/* Space means no quote character.  */
  
+ next:
    if ((c = next_char (dtp)) == EOF)
      goto eof;
    if (c == ';')
*************** read_character (st_parameter_dt *dtp, in
*** 1284,1289 ****
--- 1293,1307 ----
        quote = c;
        goto get_string;
  
+     case '!':
+       if (dtp->u.p.namelist_mode)
+ 	{
+ 	  eat_line (dtp);
+ 	  eat_spaces (dtp);
+ 	  goto next;
+ 	}
+       /* Fall through...  */
+ 
      default:
        if (dtp->u.p.namelist_mode)
  	{
*************** read_complex (st_parameter_dt *dtp, void
*** 1703,1708 ****
--- 1721,1727 ----
    if (parse_repeat (dtp))
      return;
  
+ next:
    c = next_char (dtp);
    switch (c)
      {
*************** read_complex (st_parameter_dt *dtp, void
*** 1712,1717 ****
--- 1731,1739 ----
      case '!':
        if (!dtp->u.p.namelist_mode)
  	goto bad_complex;
+       eat_line (dtp);
+       eat_spaces (dtp);
+       goto next;
  
      CASE_SEPARATORS:
      case EOF:
*************** read_real (st_parameter_dt *dtp, void *d
*** 1813,1818 ****
--- 1835,1841 ----
  
    seen_dp = 0;
  
+ next:
    c = next_char (dtp);
    if (dtp->u.p.current_unit->decimal_status == DECIMAL_COMMA)
      {
*************** read_real (st_parameter_dt *dtp, void *d
*** 1844,1849 ****
--- 1867,1875 ----
      case '!':
        if (!dtp->u.p.namelist_mode)
  	goto bad_real;
+       eat_line (dtp);
+       eat_spaces (dtp);
+       goto next;
  
      CASE_SEPARATORS:
        unget_char (dtp, c);		/* Single null.  */
diff -Nrcpad gcc-17-20260503/libgfortran/io/transfer.c gcc-17-20260510/libgfortran/io/transfer.c
*** gcc-17-20260503/libgfortran/io/transfer.c	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgfortran/io/transfer.c	Sun May 10 22:32:15 2026
*************** st_read_done_worker (st_parameter_dt *dt
*** 4668,4674 ****
  	}
        if (dtp->u.p.unit_is_internal || dtp->u.p.format_not_saved)
  	{
! 	  free_format_data (dtp->u.p.fmt);
  	  free_format (dtp);
  	}
      }
--- 4668,4674 ----
  	}
        if (dtp->u.p.unit_is_internal || dtp->u.p.format_not_saved)
  	{
! 	  free_format_data (&dtp->u.p.fmt);
  	  free_format (dtp);
  	}
      }
*************** st_write_done_worker (st_parameter_dt *d
*** 4764,4770 ****
  	}
        if (dtp->u.p.unit_is_internal || dtp->u.p.format_not_saved)
  	{
! 	  free_format_data (dtp->u.p.fmt);
  	  free_format (dtp);
  	}
      }
--- 4764,4770 ----
  	}
        if (dtp->u.p.unit_is_internal || dtp->u.p.format_not_saved)
  	{
! 	  free_format_data (&dtp->u.p.fmt);
  	  free_format (dtp);
  	}
      }
diff -Nrcpad gcc-17-20260503/libgomp/ChangeLog gcc-17-20260510/libgomp/ChangeLog
*** gcc-17-20260503/libgomp/ChangeLog	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgomp/ChangeLog	Sun May 10 22:32:16 2026
***************
*** 1,3 ****
--- 1,13 ----
+ 2026-05-05  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* Makefile.in: Regenerate.
+ 	* acinclude.m4: Delete LIGOMP_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* aclocal.m4: Regenerate.
+ 	* configure: Likewise.
+ 	* configure.ac: Use GCC_CHECK_ATTRIBUTE_VISIBILITY instead of
+ 	LIGOMP_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* testsuite/Makefile.in: Regenerate.
+ 
  2026-04-28  Tobias Burnus  <tburnus@baylibre.com>
  
  	* testsuite/libgomp.fortran/map-subarray-6.f90: Fix, extend, and
diff -Nrcpad gcc-17-20260503/libgomp/Makefile.in gcc-17-20260510/libgomp/Makefile.in
*** gcc-17-20260503/libgomp/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgomp/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 136,141 ****
--- 136,142 ----
  	$(top_srcdir)/../config/override.m4 \
  	$(top_srcdir)/../config/tls.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
  	$(top_srcdir)/acinclude.m4 $(top_srcdir)/../libtool.m4 \
diff -Nrcpad gcc-17-20260503/libgomp/acinclude.m4 gcc-17-20260510/libgomp/acinclude.m4
*** gcc-17-20260503/libgomp/acinclude.m4	Sun May  3 22:32:14 2026
--- gcc-17-20260510/libgomp/acinclude.m4	Sun May 10 22:32:16 2026
*************** AC_DEFUN([LIBGOMP_CHECK_SYNC_BUILTINS],
*** 12,32 ****
  	      [Define to 1 if the target supports __sync_*_compare_and_swap])
    fi])
  
- dnl Check whether the target supports hidden visibility.
- AC_DEFUN([LIBGOMP_CHECK_ATTRIBUTE_VISIBILITY], [
-   AC_CACHE_CHECK([whether the target supports hidden visibility],
- 		 libgomp_cv_have_attribute_visibility, [
-   save_CFLAGS="$CFLAGS"
-   CFLAGS="$CFLAGS -Werror"
-   AC_TRY_COMPILE([void __attribute__((visibility("hidden"))) foo(void) { }],
- 		 [], libgomp_cv_have_attribute_visibility=yes,
- 		 libgomp_cv_have_attribute_visibility=no)
-   CFLAGS="$save_CFLAGS"])
-   if test $libgomp_cv_have_attribute_visibility = yes; then
-     AC_DEFINE(HAVE_ATTRIBUTE_VISIBILITY, 1,
-       [Define to 1 if the target supports __attribute__((visibility(...))).])
-   fi])
- 
  dnl Check whether the target supports dllexport
  AC_DEFUN([LIBGOMP_CHECK_ATTRIBUTE_DLLEXPORT], [
    AC_CACHE_CHECK([whether the target supports dllexport],
--- 12,17 ----
diff -Nrcpad gcc-17-20260503/libgomp/aclocal.m4 gcc-17-20260510/libgomp/aclocal.m4
*** gcc-17-20260503/libgomp/aclocal.m4	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgomp/aclocal.m4	Sun May 10 22:32:19 2026
*************** m4_include([../config/multi.m4])
*** 1180,1185 ****
--- 1180,1186 ----
  m4_include([../config/override.m4])
  m4_include([../config/tls.m4])
  m4_include([../config/toolexeclibdir.m4])
+ m4_include([../config/visibility.m4])
  m4_include([../ltoptions.m4])
  m4_include([../ltsugar.m4])
  m4_include([../ltversion.m4])
diff -Nrcpad gcc-17-20260503/libgomp/configure gcc-17-20260510/libgomp/configure
*** gcc-17-20260503/libgomp/configure	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgomp/configure	Sun May 10 22:32:19 2026
*************** $as_echo "#define USE_EMUTLS 1" >>confde
*** 16319,16325 ****
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${libgomp_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
--- 16319,16325 ----
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${gcc_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
*************** main ()
*** 16337,16352 ****
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   libgomp_cv_have_attribute_visibility=yes
  else
!   libgomp_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libgomp_cv_have_attribute_visibility" >&5
! $as_echo "$libgomp_cv_have_attribute_visibility" >&6; }
!   if test $libgomp_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
--- 16337,16352 ----
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   gcc_cv_have_attribute_visibility=yes
  else
!   gcc_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_have_attribute_visibility" >&5
! $as_echo "$gcc_cv_have_attribute_visibility" >&6; }
!   if test $gcc_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
diff -Nrcpad gcc-17-20260503/libgomp/configure.ac gcc-17-20260510/libgomp/configure.ac
*** gcc-17-20260503/libgomp/configure.ac	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgomp/configure.ac	Sun May 10 22:32:19 2026
*************** GCC_CHECK_TLS
*** 325,331 ****
  GCC_CHECK_EMUTLS
  
  # See what sort of export controls are available.
! LIBGOMP_CHECK_ATTRIBUTE_VISIBILITY
  LIBGOMP_CHECK_ATTRIBUTE_DLLEXPORT
  LIBGOMP_CHECK_ATTRIBUTE_ALIAS
  LIBGOMP_ENABLE_SYMVERS
--- 325,331 ----
  GCC_CHECK_EMUTLS
  
  # See what sort of export controls are available.
! GCC_CHECK_ATTRIBUTE_VISIBILITY
  LIBGOMP_CHECK_ATTRIBUTE_DLLEXPORT
  LIBGOMP_CHECK_ATTRIBUTE_ALIAS
  LIBGOMP_ENABLE_SYMVERS
diff -Nrcpad gcc-17-20260503/libgomp/testsuite/Makefile.in gcc-17-20260510/libgomp/testsuite/Makefile.in
*** gcc-17-20260503/libgomp/testsuite/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libgomp/testsuite/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 103,108 ****
--- 103,109 ----
  	$(top_srcdir)/../config/override.m4 \
  	$(top_srcdir)/../config/tls.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
  	$(top_srcdir)/acinclude.m4 $(top_srcdir)/../libtool.m4 \
diff -Nrcpad gcc-17-20260503/libitm/ChangeLog gcc-17-20260510/libitm/ChangeLog
*** gcc-17-20260503/libitm/ChangeLog	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libitm/ChangeLog	Sun May 10 22:32:16 2026
***************
*** 1,3 ****
--- 1,13 ----
+ 2026-05-05  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* Makefile.in: Regenerate.
+ 	* acinclude.m4: Delete LIBITM_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* aclocal.m4: Regenerate.
+ 	* configure: Likewise.
+ 	* configure.ac: Use GCC_CHECK_ATTRIBUTE_VISIBILITY instead of
+ 	LIBITM_CHECK_ATTRIBUTE_VISIBILITY.
+ 	* testsuite/Makefile.in: Regenerate.
+ 
  2026-02-12  Pietro Monteiro  <pietro@sociotechnical.xyz>
  	    Jakub Jelinek   <jakub@redhat.com>
  
diff -Nrcpad gcc-17-20260503/libitm/Makefile.in gcc-17-20260510/libitm/Makefile.in
*** gcc-17-20260503/libitm/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libitm/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 110,115 ****
--- 110,116 ----
  	$(top_srcdir)/../config/stdint.m4 \
  	$(top_srcdir)/../config/tls.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../config/weakref.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
diff -Nrcpad gcc-17-20260503/libitm/acinclude.m4 gcc-17-20260510/libitm/acinclude.m4
*** gcc-17-20260503/libitm/acinclude.m4	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libitm/acinclude.m4	Sun May 10 22:32:16 2026
*************** AC_DEFUN([LIBITM_CHECK_64BIT_SYNC_BUILTI
*** 26,46 ****
  	        [Define to 1 if the target supports 64-bit __sync_*_compare_and_swap])
    fi])
  
- dnl Check whether the target supports hidden visibility.
- AC_DEFUN([LIBITM_CHECK_ATTRIBUTE_VISIBILITY], [
-   AC_CACHE_CHECK([whether the target supports hidden visibility],
- 		 libitm_cv_have_attribute_visibility, [
-   save_CFLAGS="$CFLAGS"
-   CFLAGS="$CFLAGS -Werror"
-   AC_TRY_COMPILE([void __attribute__((visibility("hidden"))) foo(void) { }],
- 		 [], libitm_cv_have_attribute_visibility=yes,
- 		 libitm_cv_have_attribute_visibility=no)
-   CFLAGS="$save_CFLAGS"])
-   if test $libitm_cv_have_attribute_visibility = yes; then
-     AC_DEFINE(HAVE_ATTRIBUTE_VISIBILITY, 1,
-       [Define to 1 if the target supports __attribute__((visibility(...))).])
-   fi])
- 
  dnl Check whether the target supports dllexport
  AC_DEFUN([LIBITM_CHECK_ATTRIBUTE_DLLEXPORT], [
    AC_CACHE_CHECK([whether the target supports dllexport],
--- 26,31 ----
diff -Nrcpad gcc-17-20260503/libitm/aclocal.m4 gcc-17-20260510/libitm/aclocal.m4
*** gcc-17-20260503/libitm/aclocal.m4	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libitm/aclocal.m4	Sun May 10 22:32:19 2026
*************** m4_include([../config/override.m4])
*** 1202,1207 ****
--- 1202,1208 ----
  m4_include([../config/stdint.m4])
  m4_include([../config/tls.m4])
  m4_include([../config/toolexeclibdir.m4])
+ m4_include([../config/visibility.m4])
  m4_include([../config/weakref.m4])
  m4_include([../ltoptions.m4])
  m4_include([../ltsugar.m4])
diff -Nrcpad gcc-17-20260503/libitm/configure gcc-17-20260510/libitm/configure
*** gcc-17-20260503/libitm/configure	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libitm/configure	Sun May 10 22:32:19 2026
*************** $as_echo "#define HAVE_TLS 1" >>confdefs
*** 17324,17330 ****
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${libitm_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
--- 17324,17330 ----
  
    { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the target supports hidden visibility" >&5
  $as_echo_n "checking whether the target supports hidden visibility... " >&6; }
! if ${gcc_cv_have_attribute_visibility+:} false; then :
    $as_echo_n "(cached) " >&6
  else
  
*************** main ()
*** 17342,17357 ****
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   libitm_cv_have_attribute_visibility=yes
  else
!   libitm_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libitm_cv_have_attribute_visibility" >&5
! $as_echo "$libitm_cv_have_attribute_visibility" >&6; }
!   if test $libitm_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
--- 17342,17357 ----
  }
  _ACEOF
  if ac_fn_c_try_compile "$LINENO"; then :
!   gcc_cv_have_attribute_visibility=yes
  else
!   gcc_cv_have_attribute_visibility=no
  fi
  rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
    CFLAGS="$save_CFLAGS"
  fi
! { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_have_attribute_visibility" >&5
! $as_echo "$gcc_cv_have_attribute_visibility" >&6; }
!   if test $gcc_cv_have_attribute_visibility = yes; then
  
  $as_echo "#define HAVE_ATTRIBUTE_VISIBILITY 1" >>confdefs.h
  
diff -Nrcpad gcc-17-20260503/libitm/configure.ac gcc-17-20260510/libitm/configure.ac
*** gcc-17-20260503/libitm/configure.ac	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libitm/configure.ac	Sun May 10 22:32:16 2026
*************** GCC_LINUX_FUTEX(:)
*** 218,224 ****
  GCC_CHECK_TLS
  
  # See what sort of export controls are available.
! LIBITM_CHECK_ATTRIBUTE_VISIBILITY
  LIBITM_CHECK_ATTRIBUTE_DLLEXPORT
  LIBITM_CHECK_ATTRIBUTE_ALIAS
  
--- 218,224 ----
  GCC_CHECK_TLS
  
  # See what sort of export controls are available.
! GCC_CHECK_ATTRIBUTE_VISIBILITY
  LIBITM_CHECK_ATTRIBUTE_DLLEXPORT
  LIBITM_CHECK_ATTRIBUTE_ALIAS
  
diff -Nrcpad gcc-17-20260503/libitm/testsuite/Makefile.in gcc-17-20260510/libitm/testsuite/Makefile.in
*** gcc-17-20260503/libitm/testsuite/Makefile.in	Sun May  3 22:32:18 2026
--- gcc-17-20260510/libitm/testsuite/Makefile.in	Sun May 10 22:32:19 2026
*************** am__aclocal_m4_deps = $(top_srcdir)/../c
*** 105,110 ****
--- 105,111 ----
  	$(top_srcdir)/../config/stdint.m4 \
  	$(top_srcdir)/../config/tls.m4 \
  	$(top_srcdir)/../config/toolexeclibdir.m4 \
+ 	$(top_srcdir)/../config/visibility.m4 \
  	$(top_srcdir)/../config/weakref.m4 \
  	$(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \
  	$(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \
diff -Nrcpad gcc-17-20260503/libssp/ChangeLog gcc-17-20260510/libssp/ChangeLog
*** gcc-17-20260503/libssp/ChangeLog	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libssp/ChangeLog	Sun May 10 22:32:16 2026
***************
*** 1,3 ****
--- 1,9 ----
+ 2026-05-05  H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR c/121911
+ 	* ssp.c: Include <stdint.h>.  Change __stack_chk_guard to
+ 	uintptr_t.
+ 
  2025-12-29  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
  	* configure: Regenerate.
diff -Nrcpad gcc-17-20260503/libssp/ssp.c gcc-17-20260510/libssp/ssp.c
*** gcc-17-20260503/libssp/ssp.c	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libssp/ssp.c	Sun May 10 22:32:16 2026
*************** see the files COPYING3 and COPYING.RUNTI
*** 66,73 ****
  #ifdef HAVE_SYSLOG_H
  # include <syslog.h>
  #endif
  
! void *__stack_chk_guard = 0;
  
  static void __attribute__ ((constructor))
  __guard_setup (void)
--- 66,74 ----
  #ifdef HAVE_SYSLOG_H
  # include <syslog.h>
  #endif
+ #include <stdint.h>
  
! uintptr_t __stack_chk_guard = 0;
  
  static void __attribute__ ((constructor))
  __guard_setup (void)
diff -Nrcpad gcc-17-20260503/libstdc++-v3/ChangeLog gcc-17-20260510/libstdc++-v3/ChangeLog
*** gcc-17-20260503/libstdc++-v3/ChangeLog	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/ChangeLog	Sun May 10 22:32:16 2026
***************
*** 1,3 ****
--- 1,133 ----
+ 2026-05-07  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/78302
+ 	PR libstdc++/71301
+ 	* include/std/tuple [C++20] (tuple(tuple&&)): Add
+ 	requires-clause.
+ 	* testsuite/20_util/tuple/cons/78302.cc: New test.
+ 
+ 2026-05-07  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	PR libstdc++/105580
+ 	* include/bits/streambuf_iterator.h (istreambuf_iterator::_M_sbuf):
+ 	Remove mutable and adjust whitespace.
+ 	(istreambuf_iterator::_M_c): Adjust whitespace.
+ 	(istreambuf_iterator::operator++()): Clear _M_sbuf if next character
+ 	is EoF.
+ 	(istreambuf_iterator::operator++(int)): Use _M_sbuf->sgetc() to
+ 	load current character, and define in terms of ++*this.
+ 	(istreambuf_iterator::_M_get()): Do not clear _M_sbuf in case of EoF.
+ 	* include/std/streambuf (streambuf::gptr, streambuf::egptr)
+ 	(streambuf::gbump): Remove surrounding pragma disabling -Wnull-dereference.
+ 	* testsuite/24_iterators/istreambuf_iterator/2.cc: Test for using
+ 	multiple iterators to same rdbuf.
+ 
+ 2026-05-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/out_ptr.h (out_ptr_t::_Impl::~_Impl): Adjust
+ 	access to shared_ptr internals.
+ 	* include/bits/shared_ptr_base.h (_Sp_counted_deleter): Remove
+ 	_Impl class and replace _M_impl with the data members it
+ 	contained.
+ 	(_Sp_counted_ptr_inplace): Likewise.
+ 
+ 2026-05-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/shared_ptr_base.h (_Sp_ebo_helper): Simplify by
+ 	using [[__no_unique_address__]] instead of EBO. Use the
+ 	attribute unconditionally for the unstable ABI.
+ 	(_Sp_counted_deleter::_Impl): Adjust uses of _Sp_ebo_helper.
+ 	(_Sp_counted_ptr_inplace::_Impl): Likewise.
+ 	* include/std/tuple (_Head_base): Remove implementation for
+ 	compilers that don't support [[__no_unique_address__]]. Use the
+ 	attribute unconditionally for the unstable ABI.
+ 
+ 2026-05-06  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/format (range_formatter::format): Format all
+ 	contiguous ranges as span<__format::__maybe_const<_Tp, _CharT>>.
+ 
+ 2026-05-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/shared_ptr.h (_UnboundedArray, _BoundedArray)
+ 	(_NotUnboundedArray): Remove fallback definition for C++20
+ 	compilers that don't define __cpp_concepts.
+ 	* include/bits/shared_ptr_base.h (_Sp_counted_ptr_inplace):
+ 	Remove fallback declaration of _Sp_overwrite_tag partial
+ 	specialization.
+ 
+ 2026-05-06  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	PR libstdc++/119126
+ 	* include/bits/funcwrap.h : (__polyfunc::__invoker_of):
+ 	Updated to use _Invoker::_Signature and mark as constexpr.
+ 	(__polyfunc::_base_of): Mark as constexpr.
+ 	(__std:::__is_function_ref_v, __polyfunc::_Ref_base)
+ 	(__polyfunc::__is_funcref_assignable): Define.
+ 	* include/bits/funcref_impl.h (std::function_ref): Add base class
+ 	of type__polyfunc::_Ref_base. Befriend __invoker_of, __base_of,
+ 	__is_invoker_convertible, __is_invoker_convertible.
+ 	(function_ref::_Base): Define.
+ 	(function_ref::_M_init, function_ref::_M_ptrs): Move to base class.
+ 	(function_ref::function_ref(_Fn&&), function_ref::operator=): Handle
+ 	specializations of function_ref with compatible signatures.
+ 	(function_ref::function_ref): Init base class before _M_invoke
+ 	consistently, and remove setting of _M_nullptr.
+ 	* include/bits/cpyfunc_impl.h (copyable_function): Udpdated friend
+ 	declarations.
+ 	(copyable_function::_Signature): Remove.
+ 	* include/bits/mofunc_impl.h (move_only_function): Udpdated friend
+ 	declarations.
+ 	(move_only_function::_Signature): Remove.
+ 	* include/bits/version.def (function_ref): Bump to 202604.
+ 	* include/bits/version.h: Regnerate.
+ 	* testsuite/20_util/function_ref/cons.cc: Updated checked FTM value.
+ 	* testsuite/20_util/function_ref/conv.cc: Updated test to illustrate
+ 	that double indirection is avoided.
+ 	* testsuite/20_util/function_ref/dangling.cc: Test for initializing
+ 	from function_ref with compatible signature.
+ 	* testsuite/20_util/function_ref/dangling_neg.cc: Test for
+ 	initializing from function_ref with incompatible signature.
+ 
+ 2026-05-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/c++20/atomic.cc (__waitable_state::_S_align): Remove.
+ 	(__waitable_state::_M_waiters, __waitable_state::_M_ver): Use
+ 	std::hardware_destructive_interference_size for alignment.
+ 
+ 2026-05-06  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/97001
+ 	* include/bits/range_access.h: Improve Doxygen comments.
+ 
+ 2026-05-05  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/124657
+ 	* include/experimental/bits/simd_x86.h (__is_x86_pd): Fix macro
+ 	names and refactor to reduce instantiations.
+ 
+ 2026-05-05  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/109965
+ 	* doc/doxygen/mainpage.html: Link to topics.html instead of
+ 	modules.html
+ 
+ 2026-05-05  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/unique_ptr.h (unique_ptr::_Nothrow_deref): New
+ 	helper for pre-C++20.
+ 	(unique_ptr::operator*): Either constrain or use _Nothrow_deref.
+ 	* testsuite/20_util/unique_ptr/lwg4324.cc: New test.
+ 
+ 2026-05-05  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/mdspan: Replace eight spaces with tabs.
+ 	(__mdspan::__is_constant_wrapper): Remove.
+ 	(__mdspan::__acceptable_slice_type, __mdspan::__static_slice_extent)
+ 	(__mdspan::__is_unit_stride_slice, __mdspan::__canonical_range_slice)
+ 	(__mdspan::__check_inrange_index, __mdspan::__check_valid_index)
+ 	(__mdspan::__check_valid_slice): Use std::__is_constant_wrapper_v.
+ 
  2026-05-02  Alexandre Oliva  <oliva@adacore.com>
  
  	* testsuite/30_threads/semaphore/try_acquire_until.cc
diff -Nrcpad gcc-17-20260503/libstdc++-v3/doc/doxygen/mainpage.html gcc-17-20260510/libstdc++-v3/doc/doxygen/mainpage.html
*** gcc-17-20260503/libstdc++-v3/doc/doxygen/mainpage.html	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/doc/doxygen/mainpage.html	Sun May 10 22:32:16 2026
***************
*** 38,44 ****
  
  <p>Here are entry points to all the pages generated by Doxygen:
     <ul>
!     <li><a href="modules.html">Modules</a></li>
  
      <li>Namespaces
      <ul>
--- 38,44 ----
  
  <p>Here are entry points to all the pages generated by Doxygen:
     <ul>
!     <li><a href="topics.html">Topics</a></li>
  
      <li>Namespaces
      <ul>
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/cpyfunc_impl.h gcc-17-20260510/libstdc++-v3/include/bits/cpyfunc_impl.h
*** gcc-17-20260503/libstdc++-v3/include/bits/cpyfunc_impl.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/cpyfunc_impl.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 70,76 ****
  
        using _Base = __polyfunc::_Cpy_base;
        using _Invoker = __polyfunc::_Invoker<_Noex, _Res, _ArgTypes...>;
-       using _Signature = _Invoker::_Signature;
  
        template<typename _Tp>
  	using __callable
--- 70,75 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 252,265 ****
        typename _Invoker::__storage_func_t _M_invoke = nullptr;
  
        template<typename _Func>
! 	friend auto&
  	__polyfunc::__invoker_of(_Func&) noexcept;
  
        template<typename _Func>
! 	friend auto&
  	__polyfunc::__base_of(_Func&) noexcept;
  
!       template<typename _Dst, typename _Src>
  	friend consteval bool
  	__polyfunc::__is_invoker_convertible() noexcept;
      };
--- 251,264 ----
        typename _Invoker::__storage_func_t _M_invoke = nullptr;
  
        template<typename _Func>
! 	friend constexpr auto&
  	__polyfunc::__invoker_of(_Func&) noexcept;
  
        template<typename _Func>
! 	friend constexpr auto&
  	__polyfunc::__base_of(_Func&) noexcept;
  
!       template<typename _Src, typename _Dst>
  	friend consteval bool
  	__polyfunc::__is_invoker_convertible() noexcept;
      };
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/funcref_impl.h gcc-17-20260510/libstdc++-v3/include/bits/funcref_impl.h
*** gcc-17-20260503/libstdc++-v3/include/bits/funcref_impl.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/funcref_impl.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 67,79 ****
    template<typename _Res, typename... _ArgTypes, bool _Noex>
      class function_ref<_Res(_ArgTypes...) _GLIBCXX_MOF_CV
  		       noexcept(_Noex)>
      {
        static_assert(
  	(std::__is_complete_or_unbounded(__type_identity<_ArgTypes>()) && ...),
  	"each parameter type must be a complete class");
  
        using _Invoker = __polyfunc::_Invoker<_Noex, _Res, _ArgTypes...>;
!       using _Signature = _Invoker::_Signature;
  
        // [func.wrap.ref.ctor]/1 is-invokable-using
        template<typename... _Tps>
--- 67,82 ----
    template<typename _Res, typename... _ArgTypes, bool _Noex>
      class function_ref<_Res(_ArgTypes...) _GLIBCXX_MOF_CV
  		       noexcept(_Noex)>
+     : __polyfunc::_Ref_base
      {
        static_assert(
  	(std::__is_complete_or_unbounded(__type_identity<_ArgTypes>()) && ...),
  	"each parameter type must be a complete class");
  
+       using _Base = __polyfunc::_Ref_base;
        using _Invoker = __polyfunc::_Invoker<_Noex, _Res, _ArgTypes...>;
!       using _ArgsSignature = _Res(_ArgTypes...) noexcept(_Noex);
!       using _TargetQuals = int _GLIBCXX_MOF_CV&;
  
        // [func.wrap.ref.ctor]/1 is-invokable-using
        template<typename... _Tps>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 89,96 ****
  	function_ref(_Fn* __fn) noexcept
  	{
  	  __glibcxx_assert(__fn != nullptr);
- 	  _M_invoke = _Invoker::template _S_ptrs<_Fn*>();
  	  _M_init(__fn);
  	}
  
        /// Target and bound object is object referenced by parameter.
--- 92,99 ----
  	function_ref(_Fn* __fn) noexcept
  	{
  	  __glibcxx_assert(__fn != nullptr);
  	  _M_init(__fn);
+ 	  _M_invoke = _Invoker::template _S_ptrs<_Fn*>();
  	}
  
        /// Target and bound object is object referenced by parameter.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 108,128 ****
  	{
  	  using _Fd = remove_cv_t<_Vt>;
  	  if constexpr (__is_std_op_wrapper<_Fd>)
! 	    {
! 	      _M_invoke = _Invoker::template _S_nttp<_Fd{}>;
! 	      _M_ptrs._M_obj = nullptr;
! 	    }
  	  else if constexpr (requires (_ArgTypes&&... __args) {
  		    _Fd::operator()(std::forward<_ArgTypes>(__args)...);
  		  })
  	    {
! 	      _M_invoke = _Invoker::template _S_static<_Fd>;
! 	      _M_ptrs._M_obj = nullptr;
  	    }
            else
  	    {
- 	      _M_invoke = _Invoker::template _S_ptrs<_Vt _GLIBCXX_MOF_CV&>();
  	      _M_init(std::addressof(__f));
  	    }
  	}
  
--- 111,131 ----
  	{
  	  using _Fd = remove_cv_t<_Vt>;
  	  if constexpr (__is_std_op_wrapper<_Fd>)
! 	    _M_invoke = _Invoker::template _S_nttp<_Fd{}>;
  	  else if constexpr (requires (_ArgTypes&&... __args) {
  		    _Fd::operator()(std::forward<_ArgTypes>(__args)...);
  		  })
+ 	    _M_invoke = _Invoker::template _S_static<_Fd>;
+ 	  else if constexpr (__is_function_ref_v<_Fd>
+ 	       && __polyfunc::__is_invoker_convertible<_Fd, function_ref>())
  	    {
! 	      _Base::operator=(__polyfunc::__base_of(__f));
! 	      _M_invoke = __polyfunc::__invoker_of(__f);
  	    }
            else
  	    {
  	      _M_init(std::addressof(__f));
+ 	      _M_invoke = _Invoker::template _S_ptrs<_Vt _GLIBCXX_MOF_CV&>();
  	    }
  	}
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 146,152 ****
  	    static_assert(__fn != nullptr);
  
  	  _M_invoke = &_Invoker::template _S_nttp<__fn>;
- 	  _M_ptrs._M_obj = nullptr;
  	}
  
        /// Target object is equivalent to std::bind_front<_fn>(std::ref(__ref)).
--- 149,154 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 162,167 ****
--- 164,170 ----
  	  if constexpr (is_pointer_v<_Fn> || is_member_pointer_v<_Fn>)
  	    static_assert(__fn != nullptr);
  
+ 	  _M_init(std::addressof(__ref));
  	  if constexpr (is_member_pointer_v<_Fn>
  			  && same_as<_Td, typename __inv_unwrap<_Td>::type>)
  	    // N.B. invoking member pointer on lvalue produces the same effects,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 169,175 ****
  	    _M_invoke = &_Invoker::template _S_bind_ptr<__fn, _Td _GLIBCXX_MOF_CV>;
  	  else
  	    _M_invoke = &_Invoker::template _S_bind_ref<__fn, _Td _GLIBCXX_MOF_CV&>;
- 	  _M_init(std::addressof(__ref));
  	}
  
        /// Target object is equivalent to std::bind_front<_fn>(__ptr).
--- 172,177 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 185,197 ****
  	  if constexpr (is_member_pointer_v<_Fn>)
  	    __glibcxx_assert(__ptr != nullptr);
  
- 	  _M_invoke = &_Invoker::template _S_bind_ptr<__fn, _Td _GLIBCXX_MOF_CV>;
  	  _M_init(__ptr);
  	}
  
        template<typename _Tp>
! 	requires (!is_same_v<_Tp, function_ref>) && (!is_pointer_v<_Tp>)
  		 && (!__is_constant_wrapper_v<_Tp>)
  	function_ref&
  	operator=(_Tp) = delete;
  
--- 187,201 ----
  	  if constexpr (is_member_pointer_v<_Fn>)
  	    __glibcxx_assert(__ptr != nullptr);
  
  	  _M_init(__ptr);
+ 	  _M_invoke = &_Invoker::template _S_bind_ptr<__fn, _Td _GLIBCXX_MOF_CV>;
  	}
  
        template<typename _Tp>
! 	requires (!is_same_v<_Tp, function_ref>)
! 		 && (!is_pointer_v<_Tp>)
  		 && (!__is_constant_wrapper_v<_Tp>)
+ 		 && (!__polyfunc::__is_funcref_assignable<function_ref, _Tp>())
  	function_ref&
  	operator=(_Tp) = delete;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 206,223 ****
        { return _M_invoke(_M_ptrs, std::forward<_ArgTypes>(__args)...); }
  
      private:
-       template<typename _Tp>
- 	constexpr void
- 	_M_init(_Tp* __ptr) noexcept
- 	{
- 	  if constexpr (is_function_v<_Tp>)
- 	    _M_ptrs._M_func = reinterpret_cast<void(*)()>(__ptr);
- 	  else
- 	    _M_ptrs._M_obj = __ptr;
- 	}
- 
        typename _Invoker::__ptrs_func_t _M_invoke;
!       __polyfunc::_Ptrs _M_ptrs;
      };
  
  #undef _GLIBCXX_MOF_CV
--- 210,232 ----
        { return _M_invoke(_M_ptrs, std::forward<_ArgTypes>(__args)...); }
  
      private:
        typename _Invoker::__ptrs_func_t _M_invoke;
! 
!       template<typename _Func>
! 	friend constexpr auto&
! 	__polyfunc::__invoker_of(_Func&) noexcept;
! 
!       template<typename _Func>
! 	friend constexpr auto&
! 	__polyfunc::__base_of(_Func&) noexcept;
! 
!       template<typename _Src, typename _Dst>
! 	friend consteval bool
! 	__polyfunc::__is_invoker_convertible() noexcept;
! 
!       template<typename _Dst, typename _Src>
!         friend consteval bool
!         __polyfunc::__is_funcref_assignable() noexcept;
      };
  
  #undef _GLIBCXX_MOF_CV
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/funcwrap.h gcc-17-20260510/libstdc++-v3/include/bits/funcwrap.h
*** gcc-17-20260503/libstdc++-v3/include/bits/funcwrap.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/funcwrap.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 231,242 ****
       using _Invoker = _Base_invoker<_Noex, remove_cv_t<_Ret>, __param_t<_Args>...>;
  
     template<typename _Func>
!      auto&
       __invoker_of(_Func& __f) noexcept
       { return __f._M_invoke; }
  
     template<typename _Func>
!      auto&
       __base_of(_Func& __f) noexcept
       { return static_cast<__like_t<_Func&, typename _Func::_Base>>(__f); }
  
--- 231,242 ----
       using _Invoker = _Base_invoker<_Noex, remove_cv_t<_Ret>, __param_t<_Args>...>;
  
     template<typename _Func>
!      constexpr auto&
       __invoker_of(_Func& __f) noexcept
       { return __f._M_invoke; }
  
     template<typename _Func>
!      constexpr auto&
       __base_of(_Func& __f) noexcept
       { return static_cast<__like_t<_Func&, typename _Func::_Base>>(__f); }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 244,252 ****
       consteval bool
       __is_invoker_convertible() noexcept
       {
!        if constexpr (requires { typename _Src::_Signature; })
! 	 return is_convertible_v<typename _Src::_Signature,
! 				 typename _Dst::_Signature>;
         else
  	 return false;
       }
--- 244,252 ----
       consteval bool
       __is_invoker_convertible() noexcept
       {
!        if constexpr (requires { typename _Src::_Invoker::_Signature; })
! 	 return is_convertible_v<typename _Src::_Invoker::_Signature,
! 				 typename _Dst::_Invoker::_Signature>;
         else
  	 return false;
       }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 539,544 ****
--- 539,563 ----
    /// @cond undocumented
    namespace __polyfunc
    {
+     struct _Ref_base
+     {
+       constexpr
+       _Ref_base() noexcept
+       { _M_ptrs._M_obj = nullptr; }
+ 
+       template<typename _Tp>
+ 	constexpr void
+ 	_M_init(_Tp* __ptr) noexcept
+ 	{
+ 	  if constexpr (is_function_v<_Tp>)
+ 	    _M_ptrs._M_func = reinterpret_cast<void(*)()>(__ptr);
+ 	  else
+ 	    _M_ptrs._M_obj = __ptr;
+ 	}
+ 
+       _Ptrs _M_ptrs;
+     };
+ 
      template<typename _Sig>
        struct __skip_first_arg;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 585,590 ****
--- 604,631 ----
      function_ref(constant_wrapper<__cwfn, _Fn>, _Tp&&)
        -> function_ref<remove_pointer_t<_SignaturePtr>>;
  
+   /// @cond undocumented
+   template<typename _Tp>
+     constexpr bool __is_function_ref_v = false;
+   template<typename _Tp>
+     constexpr bool __is_function_ref_v<function_ref<_Tp>> = true;
+ 
+   namespace __polyfunc
+   {
+     template<typename _Dst, typename _Src>
+       consteval bool
+       __is_funcref_assignable() noexcept
+       {
+ 	if constexpr (__is_function_ref_v<_Src>)
+ 	  if constexpr (is_convertible_v<typename _Src::_ArgsSignature*,
+ 					 typename _Dst::_ArgsSignature*>)
+ 	    return is_convertible_v<typename _Dst::_TargetQuals,
+ 				    typename _Src::_TargetQuals>;
+ 	return false;
+       }
+   } // namespace __polyfunc
+   /// @endcond
+ 
  #endif // __glibcxx_function_ref
  
  _GLIBCXX_END_NAMESPACE_VERSION
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/mofunc_impl.h gcc-17-20260510/libstdc++-v3/include/bits/mofunc_impl.h
*** gcc-17-20260503/libstdc++-v3/include/bits/mofunc_impl.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/mofunc_impl.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 70,76 ****
  
        using _Base = __polyfunc::_Mo_base;
        using _Invoker = __polyfunc::_Invoker<_Noex, _Res, _ArgTypes...>;
-       using _Signature = _Invoker::_Signature;
  
        template<typename _Tp>
  	using __callable
--- 70,75 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 236,249 ****
        typename _Invoker::__storage_func_t _M_invoke = nullptr;
  
        template<typename _Func>
! 	friend auto&
  	__polyfunc::__invoker_of(_Func&) noexcept;
  
        template<typename _Func>
! 	friend auto&
  	__polyfunc::__base_of(_Func&) noexcept;
  
!       template<typename _Dst, typename _Src>
  	friend consteval bool
  	__polyfunc::__is_invoker_convertible() noexcept;
      };
--- 235,248 ----
        typename _Invoker::__storage_func_t _M_invoke = nullptr;
  
        template<typename _Func>
! 	friend constexpr auto&
  	__polyfunc::__invoker_of(_Func&) noexcept;
  
        template<typename _Func>
! 	friend constexpr auto&
  	__polyfunc::__base_of(_Func&) noexcept;
  
!       template<typename _Src, typename _Dst>
  	friend consteval bool
  	__polyfunc::__is_invoker_convertible() noexcept;
      };
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/out_ptr.h gcc-17-20260510/libstdc++-v3/include/bits/out_ptr.h
*** gcc-17-20260503/libstdc++-v3/include/bits/out_ptr.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/out_ptr.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 257,263 ****
  	    auto& __pi = _M_smart._M_refcount._M_pi;
  
  	    if (_Sp __ptr = _M_smart.get())
! 	      static_cast<_Scd*>(__pi)->_M_impl._M_ptr = __ptr;
  	    else // Destroy the control block manually without invoking deleter.
  	      std::__exchange(__pi, nullptr)->_M_destroy();
  	  }
--- 257,263 ----
  	    auto& __pi = _M_smart._M_refcount._M_pi;
  
  	    if (_Sp __ptr = _M_smart.get())
! 	      static_cast<_Scd*>(__pi)->_M_ptr = __ptr;
  	    else // Destroy the control block manually without invoking deleter.
  	      std::__exchange(__pi, nullptr)->_M_destroy();
  	  }
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/range_access.h gcc-17-20260510/libstdc++-v3/include/bits/range_access.h
*** gcc-17-20260503/libstdc++-v3/include/bits/range_access.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/range_access.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 47,52 ****
--- 47,53 ----
     *  @brief  Return an iterator pointing to the first element of
     *          the container.
     *  @param  __cont  Container.
+    *  @since  C++11
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 71,76 ****
--- 72,78 ----
     *  @brief  Return an iterator pointing to one past the last element of
     *          the container.
     *  @param  __cont  Container.
+    *  @since  C++11
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 83,88 ****
--- 85,91 ----
     *  @brief  Return an iterator pointing to one past the last element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++11
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 94,99 ****
--- 97,103 ----
    /**
     *  @brief  Return an iterator pointing to the first element of the array.
     *  @param  __arr  Array.
+    *  @since  C++11
     */
    template<typename _Tp, size_t _Nm>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 105,110 ****
--- 109,115 ----
     *  @brief  Return an iterator pointing to one past the last element
     *          of the array.
     *  @param  __arr  Array.
+    *  @since  C++11
     */
    template<typename _Tp, size_t _Nm>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 125,130 ****
--- 130,136 ----
     *  @brief  Return an iterator pointing to the first element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 137,142 ****
--- 143,149 ----
     *  @brief  Return an iterator pointing to one past the last element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 149,154 ****
--- 156,162 ----
     *  @brief  Return a reverse iterator pointing to the last element of
     *          the container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 161,166 ****
--- 169,175 ----
     *  @brief  Return a reverse iterator pointing to the last element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 173,178 ****
--- 182,188 ----
     *  @brief  Return a reverse iterator pointing one past the first element of
     *          the container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 185,190 ****
--- 195,201 ----
     *  @brief  Return a reverse iterator pointing one past the first element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 197,202 ****
--- 208,214 ----
     *  @brief  Return a reverse iterator pointing to the last element of
     *          the array.
     *  @param  __arr  Array.
+    *  @since  C++14
     */
    template<typename _Tp, size_t _Nm>
      [[__nodiscard__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 208,213 ****
--- 220,226 ----
     *  @brief  Return a reverse iterator pointing one past the first element of
     *          the array.
     *  @param  __arr  Array.
+    *  @since  C++14
     */
    template<typename _Tp, size_t _Nm>
      [[__nodiscard__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 219,224 ****
--- 232,238 ----
     *  @brief  Return a reverse iterator pointing to the last element of
     *          the initializer_list.
     *  @param  __il  initializer_list.
+    *  @since  C++14
     */
    template<typename _Tp>
      [[__nodiscard__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 230,235 ****
--- 244,250 ----
     *  @brief  Return a reverse iterator pointing one past the first element of
     *          the initializer_list.
     *  @param  __il  initializer_list.
+    *  @since  C++14
     */
    template<typename _Tp>
      [[__nodiscard__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 241,246 ****
--- 256,262 ----
     *  @brief  Return a reverse iterator pointing to the last element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 253,258 ****
--- 269,275 ----
     *  @brief  Return a reverse iterator pointing one past the first element of
     *          the const container.
     *  @param  __cont  Container.
+    *  @since  C++14
     */
    template<typename _Container>
      [[__nodiscard__, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 267,272 ****
--- 284,290 ----
    /**
     *  @brief  Return the size of a container.
     *  @param  __cont  Container.
+    *  @since  C++17
     */
    template <typename _Container>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 277,282 ****
--- 295,303 ----
  
    /**
     *  @brief  Return the size of an array.
+    *  @param  - An array.
+    *  @return The number of elements in the array.
+    *  @since  C++17
     */
    template <typename _Tp, size_t _Nm>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 287,292 ****
--- 308,314 ----
    /**
     *  @brief  Return whether a container is empty.
     *  @param  __cont  Container.
+    *  @since  C++17
     */
    template <typename _Container>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 297,302 ****
--- 319,326 ----
  
    /**
     *  @brief  Return whether an array is empty (always false).
+    *  @param  - An array.
+    *  @since  C++17
     */
    template <typename _Tp, size_t _Nm>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 307,312 ****
--- 331,337 ----
    /**
     *  @brief  Return whether an initializer_list is empty.
     *  @param  __il  Initializer list.
+    *  @since  C++17
     */
    template <typename _Tp>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 317,322 ****
--- 342,348 ----
    /**
     *  @brief  Return the data pointer of a container.
     *  @param  __cont  Container.
+    *  @since  C++17
     */
    template <typename _Container>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 328,333 ****
--- 354,360 ----
    /**
     *  @brief  Return the data pointer of a const container.
     *  @param  __cont  Container.
+    *  @since  C++17
     */
    template <typename _Container>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 339,344 ****
--- 366,372 ----
    /**
     *  @brief  Return the data pointer of an array.
     *  @param  __array  Array.
+    *  @since  C++17
     */
    template <typename _Tp, size_t _Nm>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 349,354 ****
--- 377,383 ----
    /**
     *  @brief  Return the data pointer of an initializer list.
     *  @param  __il  Initializer list.
+    *  @since  C++17
     */
    template <typename _Tp>
      [[nodiscard, __gnu__::__always_inline__]]
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 358,363 ****
--- 387,397 ----
  #endif // __glibcxx_nonmember_container_access
  
  #ifdef __glibcxx_ssize // C++ >= 20
+   /**
+    *  @brief  Return the size of a container, as a signed integer.
+    *  @param  __cont  Container.
+    *  @since  C++20
+    */
    template<typename _Container>
      [[nodiscard, __gnu__::__always_inline__]]
      constexpr auto
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 368,373 ****
--- 402,411 ----
        return static_cast<common_type_t<ptrdiff_t, type>>(__cont.size());
      }
  
+   /**
+    *  @brief  Return the length of an array, as a signed integer.
+    *  @since  C++20
+    */
    template<typename _Tp, ptrdiff_t _Num>
      [[nodiscard, __gnu__::__always_inline__]]
      constexpr ptrdiff_t
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/shared_ptr.h gcc-17-20260510/libstdc++-v3/include/bits/shared_ptr.h
*** gcc-17-20260503/libstdc++-v3/include/bits/shared_ptr.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/shared_ptr.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 114,151 ****
  
  #if __glibcxx_shared_ptr_arrays >= 201707L
    // Constraint for overloads taking array types with unknown bound, U[].
- #if __cpp_concepts
    template<typename _Tp>
      requires is_array_v<_Tp> && (extent_v<_Tp> == 0)
      using _UnboundedArray = _Tp;
- #else
-   template<typename _Tp>
-     using _UnboundedArray
-       = __enable_if_t<__is_array_unknown_bounds<_Tp>::value, _Tp>;
- #endif
  
    // Constraint for overloads taking array types with known bound, U[N].
- #if __cpp_concepts
    template<typename _Tp>
      requires (extent_v<_Tp> != 0)
      using _BoundedArray = _Tp;
- #else
-   template<typename _Tp>
-     using _BoundedArray
-       = __enable_if_t<__is_array_known_bounds<_Tp>::value, _Tp>;
- #endif
  
  #if __glibcxx_smart_ptr_for_overwrite
    // Constraint for overloads taking either non-array or bounded array, U[N].
- #if __cpp_concepts
    template<typename _Tp>
      requires (!is_array_v<_Tp>) || (extent_v<_Tp> != 0)
      using _NotUnboundedArray = _Tp;
- #else
-   template<typename _Tp>
-     using _NotUnboundedArray
-       = __enable_if_t<!__is_array_unknown_bounds<_Tp>::value, _Tp>;
- #endif
  #endif // smart_ptr_for_overwrite
  #endif // shared_ptr_arrays
  
--- 114,133 ----
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/shared_ptr_base.h gcc-17-20260510/libstdc++-v3/include/bits/shared_ptr_base.h
*** gcc-17-20260503/libstdc++-v3/include/bits/shared_ptr_base.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/shared_ptr_base.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 513,583 ****
      inline void
      _Sp_counted_ptr<nullptr_t, _S_atomic>::_M_dispose() noexcept { }
  
!   // FIXME: once __has_cpp_attribute(__no_unique_address__)) is true for
!   // all supported compilers we can greatly simplify _Sp_ebo_helper.
    // N.B. unconditionally applying the attribute could change layout for
    // final types, which currently cannot use EBO so have a unique address.
! 
!   template<int _Nm, typename _Tp,
! 	   bool __use_ebo = !__is_final(_Tp) && __is_empty(_Tp)>
      struct _Sp_ebo_helper;
  
!   /// Specialization using EBO.
!   template<int _Nm, typename _Tp>
!     struct _Sp_ebo_helper<_Nm, _Tp, true> : private _Tp
      {
!       explicit _Sp_ebo_helper(const _Tp& __tp) : _Tp(__tp) { }
!       explicit _Sp_ebo_helper(_Tp&& __tp) : _Tp(std::move(__tp)) { }
! 
!       static _Tp&
!       _S_get(_Sp_ebo_helper& __eboh) { return static_cast<_Tp&>(__eboh); }
      };
  
!   /// Specialization not using EBO.
!   template<int _Nm, typename _Tp>
!     struct _Sp_ebo_helper<_Nm, _Tp, false>
      {
!       explicit _Sp_ebo_helper(const _Tp& __tp) : _M_tp(__tp) { }
!       explicit _Sp_ebo_helper(_Tp&& __tp) : _M_tp(std::move(__tp)) { }
! 
!       static _Tp&
!       _S_get(_Sp_ebo_helper& __eboh)
!       { return __eboh._M_tp; }
! 
!     private:
!       _Tp _M_tp;
      };
  
    // Support for custom deleter and/or allocator
    template<typename _Ptr, typename _Deleter, typename _Alloc, _Lock_policy _Lp>
      class _Sp_counted_deleter final : public _Sp_counted_base<_Lp>
      {
-       class _Impl : _Sp_ebo_helper<0, _Deleter>, _Sp_ebo_helper<1, _Alloc>
-       {
- 	typedef _Sp_ebo_helper<0, _Deleter>	_Del_base;
- 	typedef _Sp_ebo_helper<1, _Alloc>	_Alloc_base;
- 
-       public:
- 	_Impl(_Ptr __p, _Deleter __d, const _Alloc& __a) noexcept
- 	: _Del_base(std::move(__d)), _Alloc_base(__a), _M_ptr(__p)
- 	{ }
- 
- 	_Deleter& _M_del() noexcept { return _Del_base::_S_get(*this); }
- 	_Alloc& _M_alloc() noexcept { return _Alloc_base::_S_get(*this); }
- 
- 	_Ptr _M_ptr;
-       };
- 
      public:
        using __allocator_type = __alloc_rebind<_Alloc, _Sp_counted_deleter>;
  
        // __d(__p) must not throw.
        _Sp_counted_deleter(_Ptr __p, _Deleter __d) noexcept
!       : _M_impl(__p, std::move(__d), _Alloc()) { }
  
        // __d(__p) must not throw.
        _Sp_counted_deleter(_Ptr __p, _Deleter __d, const _Alloc& __a) noexcept
!       : _M_impl(__p, std::move(__d), __a) { }
  
  #pragma GCC diagnostic push // PR tree-optimization/122197
  #pragma GCC diagnostic ignored "-Wfree-nonheap-object"
--- 513,562 ----
      inline void
      _Sp_counted_ptr<nullptr_t, _S_atomic>::_M_dispose() noexcept { }
  
! #if ! __has_cpp_attribute(__no_unique_address__)
! #error "support for [[__no_unique_address__]] attribute is required"
! #endif
! 
! #if ! _GLIBCXX_INLINE_VERSION
    // N.B. unconditionally applying the attribute could change layout for
    // final types, which currently cannot use EBO so have a unique address.
!   template<typename _Tp, bool = !__is_final(_Tp) && __is_empty(_Tp)>
!     struct _Sp_ebo_helper;
! #else
!   template<typename _Tp, bool = true>
      struct _Sp_ebo_helper;
+ #endif
  
!   /// Specialization using [[no_unique_address]].
!   template<typename _Tp>
!     struct _Sp_ebo_helper<_Tp, true>
      {
!       [[__no_unique_address__]] _Tp _M_obj;
      };
  
! #if ! _GLIBCXX_INLINE_VERSION
!   /// Specialization not using [[no_unique_address]].
!   template<typename _Tp>
!     struct _Sp_ebo_helper<_Tp, false>
      {
!       _Tp _M_obj;
      };
+ #endif
  
    // Support for custom deleter and/or allocator
    template<typename _Ptr, typename _Deleter, typename _Alloc, _Lock_policy _Lp>
      class _Sp_counted_deleter final : public _Sp_counted_base<_Lp>
      {
      public:
        using __allocator_type = __alloc_rebind<_Alloc, _Sp_counted_deleter>;
  
        // __d(__p) must not throw.
        _Sp_counted_deleter(_Ptr __p, _Deleter __d) noexcept
!       : _M_del{std::move(__d)}, _M_alloc{}, _M_ptr(__p) { }
  
        // __d(__p) must not throw.
        _Sp_counted_deleter(_Ptr __p, _Deleter __d, const _Alloc& __a) noexcept
!       : _M_del{std::move(__d)}, _M_alloc{__a}, _M_ptr(__p) { }
  
  #pragma GCC diagnostic push // PR tree-optimization/122197
  #pragma GCC diagnostic ignored "-Wfree-nonheap-object"
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 587,598 ****
  
        virtual void
        _M_dispose() noexcept
!       { _M_impl._M_del()(_M_impl._M_ptr); }
  
        virtual void
        _M_destroy() noexcept
        {
! 	__allocator_type __a(_M_impl._M_alloc());
  	__allocated_ptr<__allocator_type> __guard_ptr{ __a, this };
  	this->~_Sp_counted_deleter();
        }
--- 566,577 ----
  
        virtual void
        _M_dispose() noexcept
!       { _M_del._M_obj(_M_ptr); }
  
        virtual void
        _M_destroy() noexcept
        {
! 	__allocator_type __a(_M_alloc._M_obj);
  	__allocated_ptr<__allocator_type> __guard_ptr{ __a, this };
  	this->~_Sp_counted_deleter();
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 603,621 ****
  #if __cpp_rtti
  	// _GLIBCXX_RESOLVE_LIB_DEFECTS
  	// 2400. shared_ptr's get_deleter() should use addressof()
!         return __ti == typeid(_Deleter)
! 	  ? std::__addressof(_M_impl._M_del())
! 	  : nullptr;
! #else
!         return nullptr;
  #endif
        }
  
      private:
  #ifdef __glibcxx_out_ptr
        template<typename, typename, typename...> friend class out_ptr_t;
  #endif
!       _Impl _M_impl;
      };
  
    // helpers for make_shared / allocate_shared
--- 582,601 ----
  #if __cpp_rtti
  	// _GLIBCXX_RESOLVE_LIB_DEFECTS
  	// 2400. shared_ptr's get_deleter() should use addressof()
! 	if (__ti == typeid(_Deleter))
! 	  return std::__addressof(_M_del._M_obj);
  #endif
+ 	return nullptr;
        }
  
      private:
  #ifdef __glibcxx_out_ptr
        template<typename, typename, typename...> friend class out_ptr_t;
  #endif
! 
!       [[__no_unique_address__]] _Sp_ebo_helper<_Deleter> _M_del;
!       [[__no_unique_address__]] _Sp_ebo_helper<_Alloc>   _M_alloc;
!       _Ptr _M_ptr;
      };
  
    // helpers for make_shared / allocate_shared
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 645,669 ****
    template<typename _Tp, typename _Alloc, _Lock_policy _Lp>
      class _Sp_counted_ptr_inplace final : public _Sp_counted_base<_Lp>
      {
-       class _Impl : _Sp_ebo_helper<0, _Alloc>
-       {
- 	typedef _Sp_ebo_helper<0, _Alloc>	_A_base;
- 
-       public:
- 	explicit _Impl(_Alloc __a) noexcept : _A_base(__a) { }
- 
- 	_Alloc& _M_alloc() noexcept { return _A_base::_S_get(*this); }
- 
- 	__gnu_cxx::__aligned_buffer<__remove_cv_t<_Tp>> _M_storage;
-       };
- 
      public:
        using __allocator_type = __alloc_rebind<_Alloc, _Sp_counted_ptr_inplace>;
  
        // Alloc parameter is not a reference so doesn't alias anything in __args
        template<typename... _Args>
  	_Sp_counted_ptr_inplace(_Alloc __a, _Args&&... __args)
! 	: _M_impl(__a)
  	{
  	  // _GLIBCXX_RESOLVE_LIB_DEFECTS
  	  // 2070.  allocate_shared should use allocator_traits<A>::construct
--- 625,637 ----
    template<typename _Tp, typename _Alloc, _Lock_policy _Lp>
      class _Sp_counted_ptr_inplace final : public _Sp_counted_base<_Lp>
      {
      public:
        using __allocator_type = __alloc_rebind<_Alloc, _Sp_counted_ptr_inplace>;
  
        // Alloc parameter is not a reference so doesn't alias anything in __args
        template<typename... _Args>
  	_Sp_counted_ptr_inplace(_Alloc __a, _Args&&... __args)
! 	: _M_alloc{__a}
  	{
  	  // _GLIBCXX_RESOLVE_LIB_DEFECTS
  	  // 2070.  allocate_shared should use allocator_traits<A>::construct
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 679,692 ****
        virtual void
        _M_dispose() noexcept
        {
! 	allocator_traits<_Alloc>::destroy(_M_impl._M_alloc(), _M_ptr());
        }
  
        // Override because the allocator needs to know the dynamic type
        virtual void
        _M_destroy() noexcept
        {
! 	__allocator_type __a(_M_impl._M_alloc());
  	__allocated_ptr<__allocator_type> __guard_ptr{ __a, this };
  	this->~_Sp_counted_ptr_inplace();
        }
--- 647,660 ----
        virtual void
        _M_dispose() noexcept
        {
! 	allocator_traits<_Alloc>::destroy(_M_alloc._M_obj, _M_ptr());
        }
  
        // Override because the allocator needs to know the dynamic type
        virtual void
        _M_destroy() noexcept
        {
! 	__allocator_type __a(_M_alloc._M_obj);
  	__allocated_ptr<__allocator_type> __guard_ptr{ __a, this };
  	this->~_Sp_counted_ptr_inplace();
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 716,724 ****
        }
  
        __remove_cv_t<_Tp>*
!       _M_ptr() noexcept { return _M_impl._M_storage._M_ptr(); }
  
!       _Impl _M_impl;
      };
  
  #ifdef __glibcxx_smart_ptr_for_overwrite // C++ >= 20 && HOSTED
--- 684,693 ----
        }
  
        __remove_cv_t<_Tp>*
!       _M_ptr() noexcept { return _M_storage._M_ptr(); }
  
!       [[__no_unique_address__]] _Sp_ebo_helper<_Alloc> _M_alloc;
!       __gnu_cxx::__aligned_buffer<__remove_cv_t<_Tp>> _M_storage;
      };
  
  #ifdef __glibcxx_smart_ptr_for_overwrite // C++ >= 20 && HOSTED
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 727,740 ****
    // Partial specialization used for make_shared_for_overwrite<non-array>().
    // This partial specialization is used when the allocator's value type
    // is the special _Sp_overwrite_tag type.
- #if __cpp_concepts
    template<typename _Tp, typename _Alloc, _Lock_policy _Lp>
      requires is_same_v<typename _Alloc::value_type, _Sp_overwrite_tag>
      class _Sp_counted_ptr_inplace<_Tp, _Alloc, _Lp> final
- #else
-   template<typename _Tp, template<typename> class _Alloc, _Lock_policy _Lp>
-     class _Sp_counted_ptr_inplace<_Tp, _Alloc<_Sp_overwrite_tag>, _Lp> final
- #endif
      : public _Sp_counted_base<_Lp>
      {
        [[no_unique_address]] _Alloc _M_alloc;
--- 696,704 ----
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/streambuf_iterator.h gcc-17-20260510/libstdc++-v3/include/bits/streambuf_iterator.h
*** gcc-17-20260503/libstdc++-v3/include/bits/streambuf_iterator.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/streambuf_iterator.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 112,119 ****
        // the "end of stream" iterator value.
        // NB: This implementation assumes the "end of stream" value
        // is EOF, or -1.
!       mutable streambuf_type*	_M_sbuf;
!       int_type			_M_c;
  
      public:
        ///  Construct end of input stream iterator.
--- 112,119 ----
        // the "end of stream" iterator value.
        // NB: This implementation assumes the "end of stream" value
        // is EOF, or -1.
!       streambuf_type* _M_sbuf;
!       int_type        _M_c;
  
      public:
        ///  Construct end of input stream iterator.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 172,178 ****
  				_M_message(__gnu_debug::__msg_inc_istreambuf)
  				._M_iterator(*this));
  
! 	_M_sbuf->sbumpc();
  	_M_c = traits_type::eof();
  	return *this;
        }
--- 172,179 ----
  				_M_message(__gnu_debug::__msg_inc_istreambuf)
  				._M_iterator(*this));
  
! 	if (_S_is_eof(_M_sbuf->snextc()))
! 	  _M_sbuf = 0;
  	_M_c = traits_type::eof();
  	return *this;
        }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 181,194 ****
        istreambuf_iterator
        operator++(int)
        {
- 	__glibcxx_requires_cond(_M_sbuf &&
- 				(!_S_is_eof(_M_c) || !_S_is_eof(_M_sbuf->sgetc())),
- 				_M_message(__gnu_debug::__msg_inc_istreambuf)
- 				._M_iterator(*this));
- 
  	istreambuf_iterator __old = *this;
! 	__old._M_c = _M_sbuf->sbumpc();
! 	_M_c = traits_type::eof();
  	return __old;
        }
  
--- 182,190 ----
        istreambuf_iterator
        operator++(int)
        {
  	istreambuf_iterator __old = *this;
! 	__old._M_c = _M_sbuf->sgetc();
! 	++*this;
  	return __old;
        }
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 206,213 ****
        _M_get() const
        {
  	int_type __ret = _M_c;
! 	if (_M_sbuf && _S_is_eof(__ret) && _S_is_eof(__ret = _M_sbuf->sgetc()))
! 	  _M_sbuf = 0;
  	return __ret;
        }
  
--- 202,209 ----
        _M_get() const
        {
  	int_type __ret = _M_c;
! 	if (_M_sbuf && _S_is_eof(__ret))
! 	  __ret = _M_sbuf->sgetc();
  	return __ret;
        }
  
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/unique_ptr.h gcc-17-20260510/libstdc++-v3/include/bits/unique_ptr.h
*** gcc-17-20260503/libstdc++-v3/include/bits/unique_ptr.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/unique_ptr.h	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 289,294 ****
--- 289,304 ----
  	  __not_<is_array<_Up>>
          >;
  
+ #if ! __cpp_concepts
+       template<typename _Ptr, typename = void>
+ 	struct _Nothrow_deref
+ 	: false_type { };
+ 
+       template<typename _Ptr>
+ 	struct _Nothrow_deref<_Ptr, __void_t<decltype(*std::declval<_Ptr>())>>
+ 	: __bool_constant<noexcept(*std::declval<_Ptr>())> { };
+ #endif
+ 
      public:
        // Constructors.
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 442,448 ****
        /// Dereference the stored pointer.
        _GLIBCXX23_CONSTEXPR
        typename add_lvalue_reference<element_type>::type
!       operator*() const noexcept(noexcept(*std::declval<pointer>()))
        {
  #if _GLIBCXX_USE_BUILTIN_TRAIT(__reference_converts_from_temporary)
  	// _GLIBCXX_RESOLVE_LIB_DEFECTS
--- 452,467 ----
        /// Dereference the stored pointer.
        _GLIBCXX23_CONSTEXPR
        typename add_lvalue_reference<element_type>::type
!       operator*() const
!       // _GLIBCXX_RESOLVE_LIB_DEFECTS
!       // 2762. unique_ptr operator*() should be noexcept
!       // 4324. unique_ptr<void>::operator* is not SFINAE-friendly
! #if __cpp_concepts
!       noexcept(noexcept(*std::declval<pointer>()))
!       requires requires { *std::declval<pointer>(); }
! #else
!       noexcept(_Nothrow_deref<pointer>::value)
! #endif
        {
  #if _GLIBCXX_USE_BUILTIN_TRAIT(__reference_converts_from_temporary)
  	// _GLIBCXX_RESOLVE_LIB_DEFECTS
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/version.def gcc-17-20260510/libstdc++-v3/include/bits/version.def
*** gcc-17-20260503/libstdc++-v3/include/bits/version.def	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/version.def	Sun May 10 22:32:17 2026
*************** ftms = {
*** 1985,1993 ****
    // 202306 P0792R14 function_ref: a non-owning reference to a Callable
    // 202511 P3774R1  Rename std::nontype, and make it broadly useful
    // 202603 P3948R1  constant_wrapper is the only tool needed for passing...
    name = function_ref;
    values = {
!     v = 202603;
      cxxmin = 26;
    };
  };
--- 1985,1994 ----
    // 202306 P0792R14 function_ref: a non-owning reference to a Callable
    // 202511 P3774R1  Rename std::nontype, and make it broadly useful
    // 202603 P3948R1  constant_wrapper is the only tool needed for passing...
+   // 202604 P3961R1  Less double indirection in function_ref (RU-220)
    name = function_ref;
    values = {
!     v = 202604;
      cxxmin = 26;
    };
  };
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/bits/version.h gcc-17-20260510/libstdc++-v3/include/bits/version.h
*** gcc-17-20260503/libstdc++-v3/include/bits/version.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/bits/version.h	Sun May 10 22:32:17 2026
***************
*** 2208,2216 ****
  
  #if !defined(__cpp_lib_function_ref)
  # if (__cplusplus >  202302L)
! #  define __glibcxx_function_ref 202603L
  #  if defined(__glibcxx_want_all) || defined(__glibcxx_want_function_ref)
! #   define __cpp_lib_function_ref 202603L
  #  endif
  # endif
  #endif /* !defined(__cpp_lib_function_ref) */
--- 2208,2216 ----
  
  #if !defined(__cpp_lib_function_ref)
  # if (__cplusplus >  202302L)
! #  define __glibcxx_function_ref 202604L
  #  if defined(__glibcxx_want_all) || defined(__glibcxx_want_function_ref)
! #   define __cpp_lib_function_ref 202604L
  #  endif
  # endif
  #endif /* !defined(__cpp_lib_function_ref) */
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/experimental/bits/simd_x86.h gcc-17-20260510/libstdc++-v3/include/experimental/bits/simd_x86.h
*** gcc-17-20260503/libstdc++-v3/include/experimental/bits/simd_x86.h	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/experimental/bits/simd_x86.h	Sun May 10 22:32:17 2026
*************** template <typename _Tp>
*** 426,436 ****
    constexpr bool
    __is_x86_pd()
    {
! #if __LDBL_MANT_DIG == __DBL_MANT_DIG
!     if constexpr (is_same_v<_Tp, long double>)
        return true;
  #endif
!     return is_same_v<_Tp, double>;
    }
  
  template <typename _Tp, size_t _Np>
--- 426,439 ----
    constexpr bool
    __is_x86_pd()
    {
!     if constexpr (is_same_v<_Tp, double>)
!       return true;
! #if __LDBL_MANT_DIG__ == __DBL_MANT_DIG__
!     else if constexpr (is_same_v<_Tp, long double>)
        return true;
  #endif
!     else
!       return false;
    }
  
  template <typename _Tp, size_t _Np>
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/std/format gcc-17-20260510/libstdc++-v3/include/std/format
*** gcc-17-20260503/libstdc++-v3/include/std/format	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/std/format	Sun May 10 22:32:17 2026
*************** namespace __format
*** 6175,6181 ****
  	format(_Rg&& __rg, basic_format_context<_Out, _CharT>& __fc) const
  	{
  	  using _Range = remove_reference_t<_Rg>;
! 	  if constexpr (__format::__simply_formattable_range<_Range, _CharT>)
  	    return _M_format<const _Range>(__rg, __fc);
  	  else
  	    return _M_format(__rg, __fc);
--- 6175,6187 ----
  	format(_Rg&& __rg, basic_format_context<_Out, _CharT>& __fc) const
  	{
  	  using _Range = remove_reference_t<_Rg>;
! 	  if constexpr (ranges::contiguous_range<_Rg>)
! 	    {
! 	      const span<__format::__maybe_const<_Tp, _CharT>>
! 		__spn(ranges::data(__rg), size_t(ranges::distance(__rg)));
! 	      return _M_format(__spn, __fc);
! 	    }
! 	  else if constexpr (__format::__simply_formattable_range<_Range, _CharT>)
  	    return _M_format<const _Range>(__rg, __fc);
  	  else
  	    return _M_format(__rg, __fc);
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/std/mdspan gcc-17-20260510/libstdc++-v3/include/std/mdspan
*** gcc-17-20260503/libstdc++-v3/include/std/mdspan	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/std/mdspan	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 838,844 ****
  
      template<typename _Mapping>
        constexpr bool __is_padded_mapping = __is_left_padded_mapping<_Mapping>
!         || __is_right_padded_mapping<_Mapping>;
  #endif
  
      template<typename _PaddedMapping>
--- 838,844 ----
  
      template<typename _Mapping>
        constexpr bool __is_padded_mapping = __is_left_padded_mapping<_Mapping>
! 	|| __is_right_padded_mapping<_Mapping>;
  #endif
  
      template<typename _PaddedMapping>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 904,916 ****
  	    && std::cmp_less_equal(__value, __max);
        }
  
-     template<typename _Tp>
-       constexpr bool __is_constant_wrapper = false;
- 
-     template<_CwFixedValue _Xv, typename _Tp>
-       constexpr bool __is_constant_wrapper<constant_wrapper<_Xv, _Tp>>
- 	= true;
- 
      template<size_t _Index, typename _Extents>
        constexpr auto
        __extract_extent(const _Extents& __exts)
--- 904,909 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 922,928 ****
  
      template<typename _Slice, typename _IndexType>
        concept __acceptable_slice_type = same_as<_Slice, full_extent_t>
! 	  || same_as<_Slice, _IndexType> || __is_constant_wrapper<_Slice>
  	  || __is_extent_slice<_Slice>;
  
      template<typename _IndexType, typename... _Slices>
--- 915,921 ----
  
      template<typename _Slice, typename _IndexType>
        concept __acceptable_slice_type = same_as<_Slice, full_extent_t>
! 	  || same_as<_Slice, _IndexType> || __is_constant_wrapper_v<_Slice>
  	  || __is_extent_slice<_Slice>;
  
      template<typename _IndexType, typename... _Slices>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1003,1009 ****
  	  return _Extent;
  	else if constexpr (same_as<_Slice, constant_wrapper<_IndexType(0)>>)
  	  return 0;
! 	else if constexpr (__is_constant_wrapper<typename _Slice::extent_type>)
  	  return _Slice::extent_type::value;
  	else
  	  return dynamic_extent;
--- 996,1002 ----
  	  return _Extent;
  	else if constexpr (same_as<_Slice, constant_wrapper<_IndexType(0)>>)
  	  return 0;
! 	else if constexpr (__is_constant_wrapper_v<typename _Slice::extent_type>)
  	  return _Slice::extent_type::value;
  	else
  	  return dynamic_extent;
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1204,1210 ****
  
      template<typename _Slice>
        concept __is_unit_stride_slice = (__mdspan::__is_extent_slice<_Slice>
! 	  && __mdspan::__is_constant_wrapper<typename _Slice::stride_type>
  	  && _Slice::stride_type::value == 1)
  	|| std::same_as<_Slice, full_extent_t>;
  
--- 1197,1203 ----
  
      template<typename _Slice>
        concept __is_unit_stride_slice = (__mdspan::__is_extent_slice<_Slice>
! 	  && __is_constant_wrapper_v<typename _Slice::stride_type>
  	  && _Slice::stride_type::value == 1)
  	|| std::same_as<_Slice, full_extent_t>;
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1534,1540 ****
        template<typename _OExtents>
  	requires is_constructible_v<extents_type, _OExtents>
  	constexpr explicit(!(extents_type::rank() == 0
! 	                     && is_convertible_v<_OExtents, extents_type>))
  	mapping(const layout_stride::mapping<_OExtents>& __other) noexcept
  	: mapping(__other.extents(), __mdspan::__internal_ctor{})
  	{ __glibcxx_assert(*this == __other); }
--- 1527,1533 ----
        template<typename _OExtents>
  	requires is_constructible_v<extents_type, _OExtents>
  	constexpr explicit(!(extents_type::rank() == 0
! 			     && is_convertible_v<_OExtents, extents_type>))
  	mapping(const layout_stride::mapping<_OExtents>& __other) noexcept
  	: mapping(__other.extents(), __mdspan::__internal_ctor{})
  	{ __glibcxx_assert(*this == __other); }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1710,1716 ****
        template<typename _OExtents>
  	requires is_constructible_v<extents_type, _OExtents>
  	constexpr explicit(!(extents_type::rank() == 0
! 	                     && is_convertible_v<_OExtents, extents_type>))
  	mapping(const layout_stride::mapping<_OExtents>& __other) noexcept
  	: mapping(__other.extents(), __mdspan::__internal_ctor{})
  	{ __glibcxx_assert(*this == __other); }
--- 1703,1709 ----
        template<typename _OExtents>
  	requires is_constructible_v<extents_type, _OExtents>
  	constexpr explicit(!(extents_type::rank() == 0
! 			     && is_convertible_v<_OExtents, extents_type>))
  	mapping(const layout_stride::mapping<_OExtents>& __other) noexcept
  	: mapping(__other.extents(), __mdspan::__internal_ctor{})
  	{ __glibcxx_assert(*this == __other); }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3308,3317 ****
  	  .extent = __span,
  	  .stride = cw<_IndexType(1)>
  	};
!       else if constexpr (__is_constant_wrapper<_StrideType>)
!         {
  	  static_assert(_StrideType::value > 0);
! 	  if constexpr (__is_constant_wrapper<_SpanType>)
  	    return extent_slice{
  	      .offset = __offset,
  	      .extent = cw<_IndexType(1 + (_SpanType::value - 1) / _StrideType::value)>,
--- 3301,3310 ----
  	  .extent = __span,
  	  .stride = cw<_IndexType(1)>
  	};
!       else if constexpr (__is_constant_wrapper_v<_StrideType>)
! 	{
  	  static_assert(_StrideType::value > 0);
! 	  if constexpr (__is_constant_wrapper_v<_SpanType>)
  	    return extent_slice{
  	      .offset = __offset,
  	      .extent = cw<_IndexType(1 + (_SpanType::value - 1) / _StrideType::value)>,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3323,3329 ****
  	      .extent = _IndexType(__span > 0 ? 1 + (__span - 1) / _StrideType::value : 0),
  	      .stride = __stride
  	    };
!         }
        else if (__span == 0 || __stride == 1)
  	return extent_slice{
  	  .offset = __offset,
--- 3316,3322 ----
  	      .extent = _IndexType(__span > 0 ? 1 + (__span - 1) / _StrideType::value : 0),
  	      .stride = __stride
  	    };
! 	}
        else if (__span == 0 || __stride == 1)
  	return extent_slice{
  	  .offset = __offset,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3331,3337 ****
  	  .stride = _IndexType(1)
  	};
        else
!         {
  	  __glibcxx_assert(__stride > 0);
  	  return extent_slice{
  	    .offset = __offset,
--- 3324,3330 ----
  	  .stride = _IndexType(1)
  	};
        else
! 	{
  	  __glibcxx_assert(__stride > 0);
  	  return extent_slice{
  	    .offset = __offset,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3386,3392 ****
        __check_inrange_index(const extents<_IndexType, _Extent>& __ext,
  			   const _OIndexType& __idx)
        {
! 	if constexpr (__is_constant_wrapper<_OIndexType>
  		      && _Extent != dynamic_extent)
  	  {
  	    static_assert(_OIndexType::value >= 0);
--- 3379,3385 ----
        __check_inrange_index(const extents<_IndexType, _Extent>& __ext,
  			   const _OIndexType& __idx)
        {
! 	if constexpr (__is_constant_wrapper_v<_OIndexType>
  		      && _Extent != dynamic_extent)
  	  {
  	    static_assert(_OIndexType::value >= 0);
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3401,3407 ****
        __check_valid_index(const extents<_IndexType, _Extent>& __ext,
  			   const _OIndexType& __idx)
        {
! 	if constexpr (__is_constant_wrapper<_OIndexType>
  		      && _Extent != dynamic_extent)
  	  {
  	    static_assert(_OIndexType::value >= 0);
--- 3394,3400 ----
        __check_valid_index(const extents<_IndexType, _Extent>& __ext,
  			   const _OIndexType& __idx)
        {
! 	if constexpr (__is_constant_wrapper_v<_OIndexType>
  		      && _Extent != dynamic_extent)
  	  {
  	    static_assert(_OIndexType::value >= 0);
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3427,3457 ****
  				    constant_wrapper<_IndexType(0)>>)
  	      __mdspan::__check_valid_index(__ext, __slice.offset);
  	    else if constexpr (is_same_v<typename _Slice::extent_type,
! 				         constant_wrapper<_IndexType(1)>>)
!               __mdspan::__check_inrange_index(__ext, __slice.offset);
! 	    else if constexpr (__is_constant_wrapper<typename _Slice::extent_type>)
  	      { 
!               	__mdspan::__check_inrange_index(__ext, __slice.offset);
! 		if constexpr (__is_constant_wrapper<typename _Slice::stride_type>)
  		  static_assert(_Slice::stride_type::value > 0);
  		else
  		  __glibcxx_assert(__slice.stride > 0);
  
  		if constexpr (_Extent != dynamic_extent
! 		     && __is_constant_wrapper<typename _Slice::offset_type>)
!                   static_assert(std::cmp_greater_equal(
  		    _Extent - _Slice::offset_type::value,
  		    _Slice::extent_type::value));
  		if constexpr (_Extent != dynamic_extent
! 		     && __is_constant_wrapper<typename _Slice::stride_type>)
!                   static_assert(std::cmp_greater(
  		    _Extent,
  		    (_Slice::extent_type::value - 1) * _Slice::stride_type::value));
  
  		if constexpr (_Extent != dynamic_extent
! 		     && __is_constant_wrapper<typename _Slice::offset_type>
! 	             && __is_constant_wrapper<typename _Slice::stride_type>)
!                   static_assert(std::cmp_greater(
  		    _Extent - _Slice::offset_type::value,
  		    (_Slice::extent_type::value - 1) * _Slice::stride_type::value));
  		else
--- 3420,3450 ----
  				    constant_wrapper<_IndexType(0)>>)
  	      __mdspan::__check_valid_index(__ext, __slice.offset);
  	    else if constexpr (is_same_v<typename _Slice::extent_type,
! 					 constant_wrapper<_IndexType(1)>>)
! 	      __mdspan::__check_inrange_index(__ext, __slice.offset);
! 	    else if constexpr (__is_constant_wrapper_v<typename _Slice::extent_type>)
  	      { 
! 	      	__mdspan::__check_inrange_index(__ext, __slice.offset);
! 		if constexpr (__is_constant_wrapper_v<typename _Slice::stride_type>)
  		  static_assert(_Slice::stride_type::value > 0);
  		else
  		  __glibcxx_assert(__slice.stride > 0);
  
  		if constexpr (_Extent != dynamic_extent
! 		     && __is_constant_wrapper_v<typename _Slice::offset_type>)
! 		  static_assert(std::cmp_greater_equal(
  		    _Extent - _Slice::offset_type::value,
  		    _Slice::extent_type::value));
  		if constexpr (_Extent != dynamic_extent
! 		     && __is_constant_wrapper_v<typename _Slice::stride_type>)
! 		  static_assert(std::cmp_greater(
  		    _Extent,
  		    (_Slice::extent_type::value - 1) * _Slice::stride_type::value));
  
  		if constexpr (_Extent != dynamic_extent
! 		     && __is_constant_wrapper_v<typename _Slice::offset_type>
! 		     && __is_constant_wrapper_v<typename _Slice::stride_type>)
! 		  static_assert(std::cmp_greater(
  		    _Extent - _Slice::offset_type::value,
  		    (_Slice::extent_type::value - 1) * _Slice::stride_type::value));
  		else
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3460,3477 ****
  		    (_Slice::extent_type::value - 1) * __slice.stride));
  	      }
  	    else if constexpr (is_same_v<typename _Slice::stride_type,
!                                          constant_wrapper<_IndexType(1)>>)
  	      {
! 	        __mdspan::__check_valid_index(__ext, __slice.offset);
  		__glibcxx_assert(std::cmp_greater_equal(
  		  __ext.extent(0) - __slice.offset,
  		  __slice.extent));
!               }
  	    else if (__slice.extent == 0)
  	      __mdspan::__check_valid_index(__ext, __slice.offset);
  	    else
  	      {
! 	        __glibcxx_assert(__slice.offset < __ext.extent(0));
  		__glibcxx_assert(__slice.extent == 1 || __slice.stride > 0);
  		__glibcxx_assert(__slice.extent == 1 || std::cmp_greater(
  		  __ext.extent(0) - __slice.offset,
--- 3453,3470 ----
  		    (_Slice::extent_type::value - 1) * __slice.stride));
  	      }
  	    else if constexpr (is_same_v<typename _Slice::stride_type,
! 				         constant_wrapper<_IndexType(1)>>)
  	      {
! 		__mdspan::__check_valid_index(__ext, __slice.offset);
  		__glibcxx_assert(std::cmp_greater_equal(
  		  __ext.extent(0) - __slice.offset,
  		  __slice.extent));
! 	      }
  	    else if (__slice.extent == 0)
  	      __mdspan::__check_valid_index(__ext, __slice.offset);
  	    else
  	      {
! 		__glibcxx_assert(__slice.offset < __ext.extent(0));
  		__glibcxx_assert(__slice.extent == 1 || __slice.stride > 0);
  		__glibcxx_assert(__slice.extent == 1 || std::cmp_greater(
  		  __ext.extent(0) - __slice.offset,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3479,3485 ****
  	      }
  	  }
  	else if constexpr (!is_same_v<_Slice, full_extent_t>)
!           __mdspan::__check_inrange_index(__ext, __slice);
        }
  
      template<typename _Extents, typename... _Slices>
--- 3472,3478 ----
  	      }
  	  }
  	else if constexpr (!is_same_v<_Slice, full_extent_t>)
! 	  __mdspan::__check_inrange_index(__ext, __slice);
        }
  
      template<typename _Extents, typename... _Slices>
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3548,3554 ****
  	   typename _Accessor, typename... _RawSlices>
      requires (sizeof...(_RawSlices) == _Extents::rank()
  	&& __mdspan::__sliceable_mapping<typename _Layout::template mapping<_Extents>,
! 	                                 __mdspan::__full_extent_t<_RawSlices>...>)
      constexpr auto
      submdspan(
  	const mdspan<_ElementType, _Extents, _Layout, _Accessor>& __md,
--- 3541,3547 ----
  	   typename _Accessor, typename... _RawSlices>
      requires (sizeof...(_RawSlices) == _Extents::rank()
  	&& __mdspan::__sliceable_mapping<typename _Layout::template mapping<_Extents>,
! 					 __mdspan::__full_extent_t<_RawSlices>...>)
      constexpr auto
      submdspan(
  	const mdspan<_ElementType, _Extents, _Layout, _Accessor>& __md,
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/std/streambuf gcc-17-20260510/libstdc++-v3/include/std/streambuf
*** gcc-17-20260503/libstdc++-v3/include/std/streambuf	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/std/streambuf	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 490,499 ****
        char_type*
        eback() const { return _M_in_beg; }
  
- // Required to silence false-positive warnings originating from istream_iterator::operator++,
- // see PR105580.
- #pragma GCC diagnostic push
- #pragma GCC diagnostic ignored "-Wnull-dereference"
        char_type*
        gptr()  const { return _M_in_cur;  }
  
--- 490,495 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 509,515 ****
        */
        void
        gbump(int __n) { _M_in_cur += __n; }
- #pragma GCC diagnostic pop
  
        /**
         *  @brief  Setting the three read area pointers.
--- 505,510 ----
diff -Nrcpad gcc-17-20260503/libstdc++-v3/include/std/tuple gcc-17-20260510/libstdc++-v3/include/std/tuple
*** gcc-17-20260503/libstdc++-v3/include/std/tuple	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/include/std/tuple	Sun May 10 22:32:17 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 68,82 ****
    template<typename... _Elements>
      class tuple;
  
    /// @cond undocumented
    template<typename _Tp>
      struct __is_empty_non_tuple : is_empty<_Tp> { };
  
    // Using EBO for elements that are tuples causes ambiguous base errors.
    template<typename _El0, typename... _El>
      struct __is_empty_non_tuple<tuple<_El0, _El...>> : false_type { };
  
!   // Use the Empty Base-class Optimization for empty, non-final types.
    template<typename _Tp>
      using __empty_not_final
      = __conditional_t<__is_final(_Tp), false_type,
--- 68,89 ----
    template<typename... _Elements>
      class tuple;
  
+ #if ! __has_cpp_attribute(__no_unique_address__)
+ #error "support for [[__no_unique_address__]] attribute is required"
+ #endif
+ 
    /// @cond undocumented
+ #if ! _GLIBCXX_INLINE_VERSION
    template<typename _Tp>
      struct __is_empty_non_tuple : is_empty<_Tp> { };
  
    // Using EBO for elements that are tuples causes ambiguous base errors.
+   // Although we have replaced EBO with [[no_unique_address]] we have to
+   // preserve the original layout for ABI compatibility.
    template<typename _El0, typename... _El>
      struct __is_empty_non_tuple<tuple<_El0, _El...>> : false_type { };
  
!   // Use [[no_unique_address]] for empty, non-final types that are not tuples.
    template<typename _Tp>
      using __empty_not_final
      = __conditional_t<__is_final(_Tp), false_type,
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 85,94 ****
    template<size_t _Idx, typename _Head,
  	   bool = __empty_not_final<_Head>::value>
      struct _Head_base;
  
! #if __has_cpp_attribute(__no_unique_address__)
!   template<size_t _Idx, typename _Head>
!     struct _Head_base<_Idx, _Head, true>
      {
        constexpr _Head_base()
        : _M_head_impl() { }
--- 92,106 ----
    template<size_t _Idx, typename _Head,
  	   bool = __empty_not_final<_Head>::value>
      struct _Head_base;
+ #else
+   // For the unstable ABI we always use [[no_unique_address]].
+   template<size_t _Idx, typename _Head, bool = true>
+     struct _Head_base;
+ #endif
  
!   // Primary template uses [[no_unique_address]].
!   template<size_t _Idx, typename _Head, bool /* = true */>
!     struct _Head_base
      {
        constexpr _Head_base()
        : _M_head_impl() { }
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 141,201 ****
  
        [[__no_unique_address__]] _Head _M_head_impl;
      };
- #else
-   template<size_t _Idx, typename _Head>
-     struct _Head_base<_Idx, _Head, true>
-     : public _Head
-     {
-       constexpr _Head_base()
-       : _Head() { }
- 
-       constexpr _Head_base(const _Head& __h)
-       : _Head(__h) { }
- 
-       constexpr _Head_base(const _Head_base&) = default;
-       constexpr _Head_base(_Head_base&&) = default;
- 
-       template<typename _UHead>
-         constexpr _Head_base(_UHead&& __h)
- 	: _Head(std::forward<_UHead>(__h)) { }
- 
-       _GLIBCXX20_CONSTEXPR
-       _Head_base(allocator_arg_t, __uses_alloc0)
-       : _Head() { }
- 
-       template<typename _Alloc>
- 	_GLIBCXX20_CONSTEXPR
- 	_Head_base(allocator_arg_t, __uses_alloc1<_Alloc> __a)
- 	: _Head(allocator_arg, *__a._M_a) { }
- 
-       template<typename _Alloc>
- 	_GLIBCXX20_CONSTEXPR
- 	_Head_base(allocator_arg_t, __uses_alloc2<_Alloc> __a)
- 	: _Head(*__a._M_a) { }
- 
-       template<typename _UHead>
- 	_GLIBCXX20_CONSTEXPR
- 	_Head_base(__uses_alloc0, _UHead&& __uhead)
- 	: _Head(std::forward<_UHead>(__uhead)) { }
- 
-       template<typename _Alloc, typename _UHead>
- 	_GLIBCXX20_CONSTEXPR
- 	_Head_base(__uses_alloc1<_Alloc> __a, _UHead&& __uhead)
- 	: _Head(allocator_arg, *__a._M_a, std::forward<_UHead>(__uhead)) { }
- 
-       template<typename _Alloc, typename _UHead>
- 	_GLIBCXX20_CONSTEXPR
- 	_Head_base(__uses_alloc2<_Alloc> __a, _UHead&& __uhead)
- 	: _Head(std::forward<_UHead>(__uhead), *__a._M_a) { }
- 
-       static constexpr _Head&
-       _M_head(_Head_base& __b) noexcept { return __b; }
- 
-       static constexpr const _Head&
-       _M_head(const _Head_base& __b) noexcept { return __b; }
-     };
- #endif
  
    template<size_t _Idx, typename _Head>
      struct _Head_base<_Idx, _Head, false>
      {
--- 153,161 ----
  
        [[__no_unique_address__]] _Head _M_head_impl;
      };
  
+ #if ! _GLIBCXX_INLINE_VERSION
+   // Partial specialization that doesn't use [[no_unique_address]].
    template<size_t _Idx, typename _Head>
      struct _Head_base<_Idx, _Head, false>
      {
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 250,255 ****
--- 210,216 ----
  
        _Head _M_head_impl;
      };
+ #endif
  
  #if __cpp_lib_tuple_like // >= C++23
    struct __tuple_like_tag_t { explicit __tuple_like_tag_t() = default; };
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 993,999 ****
  
        constexpr tuple(const tuple&) = default;
  
!       constexpr tuple(tuple&&) = default;
  
        template<typename... _UTypes>
  	requires (__constructible<const _UTypes&...>())
--- 954,962 ----
  
        constexpr tuple(const tuple&) = default;
  
!       constexpr
!       tuple(tuple&&) requires (is_move_constructible_v<_Elements> && ...)
! 	= default;
  
        template<typename... _UTypes>
  	requires (__constructible<const _UTypes&...>())
diff -Nrcpad gcc-17-20260503/libstdc++-v3/src/c++20/atomic.cc gcc-17-20260510/libstdc++-v3/src/c++20/atomic.cc
*** gcc-17-20260503/libstdc++-v3/src/c++20/atomic.cc	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/src/c++20/atomic.cc	Sun May 10 22:32:17 2026
*************** namespace
*** 289,300 ****
    // The state used by atomic waiting and notifying functions.
    struct __waitable_state
    {
-     // Don't use std::hardware_destructive_interference_size here because we
-     // don't want the layout of library types to depend on compiler options.
-     static constexpr auto _S_align = 64;
- 
      // Count of threads blocked waiting on this state.
!     alignas(_S_align) __platform_wait_t _M_waiters = 0;
  
  #ifndef _GLIBCXX_HAVE_PLATFORM_WAIT
      mutex _M_mtx;
--- 289,297 ----
    // The state used by atomic waiting and notifying functions.
    struct __waitable_state
    {
      // Count of threads blocked waiting on this state.
!     alignas(std::hardware_destructive_interference_size)
!       __platform_wait_t _M_waiters = 0;
  
  #ifndef _GLIBCXX_HAVE_PLATFORM_WAIT
      mutex _M_mtx;
*************** namespace
*** 310,316 ****
      // If we can't do a platform wait on the atomic variable itself,
      // we use this member as a proxy for the atomic variable and we
      // use this for waiting and notifying functions instead.
!     alignas(_S_align) __platform_wait_t _M_ver = 0;
  
  #ifndef _GLIBCXX_HAVE_PLATFORM_WAIT
      __condvar _M_cv;
--- 307,314 ----
      // If we can't do a platform wait on the atomic variable itself,
      // we use this member as a proxy for the atomic variable and we
      // use this for waiting and notifying functions instead.
!     alignas(std::hardware_destructive_interference_size)
!       __platform_wait_t _M_ver = 0;
  
  #ifndef _GLIBCXX_HAVE_PLATFORM_WAIT
      __condvar _M_cv;
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/cons.cc gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/cons.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/cons.cc	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/cons.cc	Sun May 10 22:32:17 2026
***************
*** 5,11 ****
  
  #ifndef __cpp_lib_function_ref
  # error "Feature-test macro for function_ref missing in <functional>"
! #elif __cpp_lib_function_ref != 202603L
  # error "Feature-test macro for function_ref has wrong value in <functional>"
  #endif
  
--- 5,11 ----
  
  #ifndef __cpp_lib_function_ref
  # error "Feature-test macro for function_ref missing in <functional>"
! #elif __cpp_lib_function_ref != 202604L
  # error "Feature-test macro for function_ref has wrong value in <functional>"
  #endif
  
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/conv.cc gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/conv.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/conv.cc	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/conv.cc	Sun May 10 22:32:17 2026
*************** static_assert( std::is_same_v<std::funct
*** 36,43 ****
  static_assert( std::is_same_v<std::function_ref<void(FuncType)>,
  			      std::function_ref<void(FuncType*)>>);
  
! // The C++26 [func.wrap.general] p2 does not currently cover funciton_ref,
! // so we make extra copies of arguments.
  
  void
  test01()
--- 36,68 ----
  static_assert( std::is_same_v<std::function_ref<void(FuncType)>,
  			      std::function_ref<void(FuncType*)>>);
  
! // Compatible signatures per standard, function_ref is assignable
! static_assert( std::is_assignable_v<std::function_ref<int(long) noexcept>&,
! 				    std::function_ref<int(long) const noexcept>> );
! static_assert( std::is_assignable_v<std::function_ref<int(long) const>&,
! 				    std::function_ref<int(long) const noexcept>> );
! static_assert( std::is_assignable_v<std::function_ref<int(long)>&,
! 				    std::function_ref<int(long) const noexcept>> );
! 
! // Incompatible signatures per standard,  not assignable
! static_assert( !std::is_assignable_v<std::function_ref<int(long) const>&,
! 				     std::function_ref<int(long)>> );
! static_assert( !std::is_assignable_v<std::function_ref<int(int)>&,
! 				     std::function_ref<int(long)>> );
! static_assert( !std::is_assignable_v<std::function_ref<long(long)>&,
! 				     std::function_ref<int(long)>> );
! static_assert( !std::is_assignable_v<std::function_ref<long(int)>&,
! 				     std::function_ref<int(long)>> );
! 
! // Implementation-specific compatible signatures, function_ref is not assingable
! static_assert( !std::is_assignable_v<std::function_ref<int(CountedArg)>&,
! 				     std::function_ref<int(CountedArg&&)>> );
! static_assert( !std::is_assignable_v<std::function_ref<CountedArg()>&,
! 				     std::function_ref<const CountedArg(long)>> );
! static_assert( !std::is_assignable_v<std::function_ref<const CountedArg()>&,
! 				     std::function_ref<CountedArg(long)>> );
! static_assert( !std::is_assignable_v<std::function_ref<int(long) const>&,
! 				     std::function_ref<int(long)>> );
  
  void
  test01()
*************** test01()
*** 54,79 ****
    VERIFY( r2c(c) == 2 );
  
    std::function_ref<int(CountedArg) const> r3r(r1);
!   VERIFY( r3r(c) == 2 );
    std::function_ref<int(CountedArg) const> r3m(m1);
    VERIFY( r3m(c) == 2 );
    std::function_ref<int(CountedArg) const> r3c(c1);
    VERIFY( r3c(c) == 2 );
  
!   std::function_ref<int(CountedArg)> r4r(r1);
!   VERIFY( r4r(c) == 2 );
!   std::function_ref<int(CountedArg)> r4m(m1);
    VERIFY( r4m(c) == 2 );
!   std::function_ref<int(CountedArg)> r4c(c1);
    VERIFY( r4c(c) == 2 );
  
    // Incompatible signatures
!   std::function_ref<long(CountedArg) const noexcept> r5r(r1);
!   VERIFY( r5r(c) == 2 );
!   std::function_ref<long(CountedArg) const noexcept> r5m(m1);
!   VERIFY( r5r(c) == 2 );
!   std::function_ref<long(CountedArg) const noexcept> r5c(c1);
!   VERIFY( r5r(c) == 2 );
  }
  
  void
--- 79,118 ----
    VERIFY( r2c(c) == 2 );
  
    std::function_ref<int(CountedArg) const> r3r(r1);
!   VERIFY( r3r(c) == 1 );
    std::function_ref<int(CountedArg) const> r3m(m1);
    VERIFY( r3m(c) == 2 );
    std::function_ref<int(CountedArg) const> r3c(c1);
    VERIFY( r3c(c) == 2 );
  
!   std::function_ref<int(CountedArg) noexcept> r4r(r1);
!   VERIFY( r4r(c) == 1 );
!   std::function_ref<int(CountedArg) noexcept> r4m(m1);
    VERIFY( r4m(c) == 2 );
!   std::function_ref<int(CountedArg) noexcept> r4c(c1);
    VERIFY( r4c(c) == 2 );
  
+   std::function_ref<int(CountedArg)> r5r(r1);
+   VERIFY( r4r(c) == 1 );
+   std::function_ref<int(CountedArg)> r5m(m1);
+   VERIFY( r4m(c) == 2 );
+   std::function_ref<int(CountedArg)> r5c(c1);
+   VERIFY( r4c(c) == 2 );
+ 
+   r3r = r1;
+   VERIFY( r3r(c) == 1 );
+   r4r = r1;
+   VERIFY( r4r(c) == 1 );
+   r5r = r1;
+   VERIFY( r5r(c) == 1 );
+ 
    // Incompatible signatures
!   std::function_ref<long(CountedArg) const noexcept> r6r(r1);
!   VERIFY( r6r(c) == 2 );
!   std::function_ref<long(CountedArg) const noexcept> r6m(m1);
!   VERIFY( r6r(c) == 2 );
!   std::function_ref<long(CountedArg) const noexcept> r6c(c1);
!   VERIFY( r6r(c) == 2 );
  }
  
  void
*************** test03()
*** 110,116 ****
    // Call const overload as std::function_ref<int(CountedArg) const>
    // inside std::function_ref<int(CountedArg)> would do.
    std::function_ref<int(CountedArg)> r2(r1);
!   VERIFY( r2(c) == 1002 );
    std::move_only_function<int(CountedArg)> m2(r1);
    VERIFY( m2(c) == 1002 );
  
--- 149,155 ----
    // Call const overload as std::function_ref<int(CountedArg) const>
    // inside std::function_ref<int(CountedArg)> would do.
    std::function_ref<int(CountedArg)> r2(r1);
!   VERIFY( r2(c) == 1001 );
    std::move_only_function<int(CountedArg)> m2(r1);
    VERIFY( m2(c) == 1002 );
  
*************** test03()
*** 119,125 ****
    std::function_ref<int(CountedArg)> r3(f);
    VERIFY( r3(c) == 1 );
    std::function_ref<int(CountedArg) const> r4(r3);
!   VERIFY( r4(c) == 2 );
    std::move_only_function<int(CountedArg) const> m4(r3);
    VERIFY( m4(c) == 2 );
  }
--- 158,164 ----
    std::function_ref<int(CountedArg)> r3(f);
    VERIFY( r3(c) == 1 );
    std::function_ref<int(CountedArg) const> r4(r3);
!   VERIFY( r4(c) == 1 );
    std::move_only_function<int(CountedArg) const> m4(r3);
    VERIFY( m4(c) == 2 );
  }
*************** test07()
*** 234,240 ****
    std::function_ref<int()> r3r(r1);
    VERIFY( r3r() == 2 );
    r1 = f1;
!   VERIFY( r3r() == 1 ); // converting-constructor
  
    std::function_ref<int()> r3m(m1);
    VERIFY( r3m() == 2 );
--- 273,279 ----
    std::function_ref<int()> r3r(r1);
    VERIFY( r3r() == 2 );
    r1 = f1;
!   VERIFY( r3r() == 2 ); // converting-constructor
  
    std::function_ref<int()> r3m(m1);
    VERIFY( r3m() == 2 );
*************** test08()
*** 263,268 ****
--- 302,320 ----
  void
  test09()
  {
+   auto f = [](CountedArg arg) noexcept { return arg.counter; };
+   // For non-tirival types Param and Param&& are compatible.
+   std::function_ref<int(CountedArg) const noexcept> r1(f);
+   VERIFY( r1({}) == 1 );
+   std::function_ref<int(CountedArg&&) const noexcept> r2(r1);
+   VERIFY( r2({}) == 1 );
+ 
+   auto fs = [](CountedArg const& arg, std::string) noexcept { return arg.counter; };
+   std::function_ref<int(CountedArg, std::string) const noexcept> rs1(fs);
+   VERIFY( rs1(c, "") == 1 );
+   std::function_ref<int(CountedArg, std::string&&) const noexcept> rs2(rs1);
+   VERIFY( rs2(c, "") == 1 );
+ 
    // Scalar types and small trivially move constructible types are passed
    // by value to invoker. So int&& signature is not compatible for such types.
    auto fi = [](CountedArg const& arg, int) noexcept { return arg.counter; };
*************** test09()
*** 271,281 ****
    std::function_ref<int(CountedArg, int&&) const noexcept> ri2(ri1);
    VERIFY( ri2(c, 0) == 2 );
  
!   auto fs = [](CountedArg const& arg, std::string_view) noexcept { return arg.counter; };
!   std::function_ref<int(CountedArg, std::string_view) const noexcept> rs1(fs);
!   VERIFY( rs1(c, "") == 1 );
!   std::function_ref<int(CountedArg, std::string_view&&) const noexcept> rs2(rs1);
!   VERIFY( rs2(c, "") == 2 );
  }
  
  int main()
--- 323,342 ----
    std::function_ref<int(CountedArg, int&&) const noexcept> ri2(ri1);
    VERIFY( ri2(c, 0) == 2 );
  
!   auto fv = [](CountedArg const& arg, std::string_view) noexcept { return arg.counter; };
!   std::function_ref<int(CountedArg, std::string_view) const noexcept> rv1(fv);
!   VERIFY( rv1(c, "") == 1 );
!   std::function_ref<int(CountedArg, std::string_view&&) const noexcept> rv2(rv1);
!   VERIFY( rv2(c, "") == 2 );
! 
!   // CV-qual on by-value return is also ignored
!   auto fr = [](CountedArg const& arg) noexcept { return arg; };
!   std::function_ref<CountedArg(CountedArg) const noexcept> rr1(fr);
!   VERIFY( rr1(c).counter == 2 );
!   std::function_ref<const CountedArg(CountedArg) const noexcept> rr2(rr1);
!   VERIFY( rr2(c).counter == 2 );
!   std::function_ref<CountedArg(CountedArg)> rr3(rr2);
!   VERIFY( rr3(c).counter == 2 );
  }
  
  int main()
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/dangling.cc gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/dangling.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/dangling.cc	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/dangling.cc	Sun May 10 22:32:17 2026
***************
*** 1,12 ****
  // { dg-do compile { target c++26 } }
  
  #include <functional>
  
! template<typename F>
! constexpr std::function_ref<int(int, int) const>
  create(F f)
  {
!   std::function_ref<int(int, int) const> fr(f);
    return fr;
  }
  
--- 1,13 ----
  // { dg-do compile { target c++26 } }
  
  #include <functional>
+ #include <string>
  
! template<typename Signature = int(int, int) const, typename F>
! constexpr std::function_ref<Signature>
  create(F f)
  {
!   std::function_ref<Signature> fr(f);
    return fr;
  }
  
*************** struct StaticWinsET {
*** 72,74 ****
--- 73,85 ----
  
  constexpr auto vStaticWinsET = create(StaticWinsET{});
  
+ auto func = [](std::string s) noexcept -> int
+ { return s.size(); };
+ 
+ constexpr std::function_ref<int(std::string)> stdCompatibleFRef
+   = std::function_ref<int(std::string) const noexcept>(func);
+ constexpr std::function_ref<int(std::string&&)> implCompatible1FRef
+   = std::function_ref<int(std::string)>(func);
+ constexpr std::function_ref<int(std::string) const> implCompatible2FRef
+   = std::function_ref<int(std::string)>(func);
+ 
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/dangling_neg.cc gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/dangling_neg.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/20_util/function_ref/dangling_neg.cc	Sun May  3 22:32:15 2026
--- gcc-17-20260510/libstdc++-v3/testsuite/20_util/function_ref/dangling_neg.cc	Sun May 10 22:32:17 2026
*************** struct InstanceWinsET {
*** 74,76 ****
--- 74,84 ----
  
  constexpr auto vInstanceWinsET = create(InstanceWinsET{}); // { dg-error "is not a constant expression" }
  
+ constexpr auto func = [](std::string s) noexcept -> int
+ { return s.size(); };
+ 
+ constexpr std::function_ref<int(const std::string&)> incompatible1FRef
+   = std::function_ref<int(std::string)>(func); // { dg-error "is not a constant expression" }
+ constexpr std::function_ref<long(std::string)> incompatible2FRef
+   = std::function_ref<int(std::string)>(func); // { dg-error "is not a constant expression" }
+ 
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/20_util/tuple/cons/78302.cc gcc-17-20260510/libstdc++-v3/testsuite/20_util/tuple/cons/78302.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/20_util/tuple/cons/78302.cc	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/libstdc++-v3/testsuite/20_util/tuple/cons/78302.cc	Sun May 10 22:32:17 2026
***************
*** 0 ****
--- 1,17 ----
+ // { dg-do compile { target c++20 } }
+ 
+ // Bug 78302 is_move_constructible_v<tuple<nonmovable>> should be false
+ // LWG 2899. is_(nothrow_)move_constructible and tuple, optional and unique_ptr
+ 
+ #include <tuple>
+ #include <type_traits>
+ 
+ struct NotMovable { NotMovable(NotMovable&&) = delete; };
+ static_assert(!std::is_move_constructible_v<std::tuple<NotMovable>>);
+ static_assert(!std::is_move_constructible_v<std::tuple<int, NotMovable>>);
+ static_assert(!std::is_move_constructible_v<std::tuple<int&, NotMovable>>);
+ static_assert(!std::is_move_constructible_v<std::tuple<int&&, NotMovable>>);
+ static_assert(std::is_nothrow_move_constructible_v<std::tuple<int>>);
+ static_assert(std::is_nothrow_move_constructible_v<std::tuple<int&>>);
+ static_assert(std::is_nothrow_move_constructible_v<std::tuple<int&&>>);
+ static_assert(std::is_nothrow_move_constructible_v<std::tuple<int&&, int&>>);
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/20_util/unique_ptr/lwg4324.cc gcc-17-20260510/libstdc++-v3/testsuite/20_util/unique_ptr/lwg4324.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/20_util/unique_ptr/lwg4324.cc	Thu Jan  1 00:00:00 1970
--- gcc-17-20260510/libstdc++-v3/testsuite/20_util/unique_ptr/lwg4324.cc	Sun May 10 22:32:17 2026
***************
*** 0 ****
--- 1,22 ----
+ // { dg-do compile { target c++11 } }
+ 
+ // LWG 4324. unique_ptr<void>::operator* is not SFINAE-friendly
+ 
+ #include <memory>
+ 
+ template<class T, bool = true>
+ struct nothrow_dereference
+ : std::false_type { };
+ 
+ template<class T>
+ struct nothrow_dereference<T, noexcept(*std::declval<T>())>
+ : std::true_type { };
+ 
+ static_assert( nothrow_dereference<std::unique_ptr<int>>::value, "");
+ static_assert( ! nothrow_dereference<std::unique_ptr<void>>::value, "");
+ 
+ #if __cplusplus >= 202002L // C++20
+ template<class T> concept dereferenceable = requires(T& t) { *t; };
+ static_assert( dereferenceable<std::unique_ptr<int>>);
+ static_assert(!dereferenceable<std::unique_ptr<void>>);
+ #endif
diff -Nrcpad gcc-17-20260503/libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2.cc gcc-17-20260510/libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2.cc
*** gcc-17-20260503/libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2.cc	Sun May  3 22:32:16 2026
--- gcc-17-20260510/libstdc++-v3/testsuite/24_iterators/istreambuf_iterator/2.cc	Sun May 10 22:32:17 2026
*************** void test02(void)
*** 48,54 ****
    cistreambuf_iter istrb_it05(istrs01);
    cistreambuf_iter istrb_it06(istrs01.rdbuf());
    VERIFY( istrb_it05 == istrb_it06 );
!   
    // bool equal(istreambuf_iter& b)
    cistreambuf_iter istrb_it07(0);
    cistreambuf_iter istrb_it08;
--- 48,54 ----
    cistreambuf_iter istrb_it05(istrs01);
    cistreambuf_iter istrb_it06(istrs01.rdbuf());
    VERIFY( istrb_it05 == istrb_it06 );
! 
    // bool equal(istreambuf_iter& b)
    cistreambuf_iter istrb_it07(0);
    cistreambuf_iter istrb_it08;
*************** void test02(void)
*** 109,116 ****
--- 109,177 ----
      }
  }
  
+ void
+ test_empty()
+ {
+   std::istreambuf_iterator<char> null(0), end;
+   VERIFY( null == end );
+ 
+   std::istringstream ess;
+   // The specification seems to indicate that these iterators are not
+   // end-of-stream iterators, as they have non-null rdbuf pointers.
+   // (see LWG 2366: istreambuf_iterator end-of-stream equality).
+   // However we treat them as end-of-stream, as otherwise they would
+   // produce a range containing a single EOF character.
+   std::istreambuf_iterator<char> it1(ess), it2(ess);
+   VERIFY( it1 == end );
+   VERIFY( it2 == end );
+ }
+ 
+ void
+ test_multi()
+ {
+   // C++98 (and later) define operator* in [istreambuf.iterator.ops] as:
+   // Returns: The character obtained via the streambuf member sbuf_->sgetc().
+   // This means the behavior of multiple iterators to the same sequence
+   // is specified by the standard (which is not generally true for
+   // input iterators)
+   std::istringstream iss("abcd");
+   std::istreambuf_iterator<char> it1(iss), it2(iss), end;
+ 
+   VERIFY( it1 != end );
+   VERIFY( it2 != end );
+   VERIFY( *it1 == 'a' );
+   VERIFY( *it2 == 'a' );
+   ++it1;
+ 
+   VERIFY( it1 != end );
+   VERIFY( it2 != end );
+   VERIFY( *it1 == 'b' );
+   VERIFY( *it2 == 'b' );
+   ++it2;
+ 
+   VERIFY( it1 != end );
+   VERIFY( it2 != end );
+   VERIFY( *it1 == 'c' );
+   VERIFY( *it2 == 'c' );
+   ++it2;
+ 
+   VERIFY( it1 != end );
+   VERIFY( it2 != end );
+   VERIFY( *it1 == 'd' );
+   VERIFY( *it2 == 'd' );
+   // second dereference
+   VERIFY( *it1 == 'd' );
+   VERIFY( *it2 == 'd' );
+   ++it1;
+ 
+   VERIFY( it1 == end );
+   VERIFY( it2 == end );
+ }
+ 
  int main()
  {
    test02();
+   test_empty();
+   test_multi();
    return 0;
  }
