diff -Nrcpad gcc-16-20260718/LAST_UPDATED gcc-16-20260725/LAST_UPDATED
*** gcc-16-20260718/LAST_UPDATED	Sat Jul 18 22:32:24 2026
--- gcc-16-20260725/LAST_UPDATED	Sat Jul 25 22:32:23 2026
***************
*** 1 ****
! Obtained from git: releases/gcc-16 revision dff16819605b9b728ecc71a21135efe0d77289aa
--- 1 ----
! Obtained from git: releases/gcc-16 revision b73ad535acaa2381bce1edb6f78b7dc65d0d5d1f
diff -Nrcpad gcc-16-20260718/MD5SUMS gcc-16-20260725/MD5SUMS
*** gcc-16-20260718/MD5SUMS	Sat Jul 18 22:32:29 2026
--- gcc-16-20260725/MD5SUMS	Sat Jul 25 22:32:28 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-16-20260718.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-16-20260725.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
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*** 28,34 ****
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*** 3071,3146 ****
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--- 3071,3146 ----
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*************** ebb1ceb69d6cf8ac2cdc227ae45f0eca  gcc/bi
*** 3286,3292 ****
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--- 3286,3292 ----
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*************** e3a0d862a25764bc4242ad90ba85db86  gcc/c-
*** 3301,3307 ****
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  a93a54bd451fefbd21f9b288d5530d33  gcc/c-family/c-opts.cc
--- 3301,3307 ----
  4179a97862f28535be92ef4cab16246e  gcc/c-family/c-gimplify.cc
  50e638257386d3df7bdf25108fdeb5d1  gcc/c-family/c-indentation.cc
  382fde18b48d137c66c91e21de978037  gcc/c-family/c-indentation.h
! e6af6434da8de908e879655bf7d281b4  gcc/c-family/c-lex.cc
  eb6a10cfada98679dc204a82e929e9e3  gcc/c-family/c-objc.h
  ea297af5bdcb8c784d704a6b99a79c38  gcc/c-family/c-omp.cc
  a93a54bd451fefbd21f9b288d5530d33  gcc/c-family/c-opts.cc
*************** f6b634d7c0204c419cf4fb7b48193fad  gcc/c/
*** 3350,3356 ****
  3ae90e1d8085765b7e7488ac9673a927  gcc/c/gimple-parser.cc
  d5c1cad6808353782d75116a4939d551  gcc/c/gimple-parser.h
  8b7ae733f9c7c1e52dc5db93bec9cc45  gcc/caller-save.cc
! b40f416783095fe53a15120613a517c0  gcc/calls.cc
  ff5a0cd0f881aae35e405e715150405b  gcc/calls.h
  3a4ad3325026c8bc065648c9af3f67fb  gcc/ccmp.cc
  bdba39e87a75c76bfc3ab3bfd08e7f02  gcc/ccmp.h
--- 3350,3356 ----
  3ae90e1d8085765b7e7488ac9673a927  gcc/c/gimple-parser.cc
  d5c1cad6808353782d75116a4939d551  gcc/c/gimple-parser.h
  8b7ae733f9c7c1e52dc5db93bec9cc45  gcc/caller-save.cc
! 056cd50fff877798a6aba03adec3545f  gcc/calls.cc
  ff5a0cd0f881aae35e405e715150405b  gcc/calls.h
  3a4ad3325026c8bc065648c9af3f67fb  gcc/ccmp.cc
  bdba39e87a75c76bfc3ab3bfd08e7f02  gcc/ccmp.h
*************** a56f67bf9504f1f91df64d23b9ce6f3b  gcc/co
*** 3440,3448 ****
  d48c86bc52a7b8ee38281d6069d3eb6a  gcc/collect2.h
  9b54c6ade2ed5ee11859b498e663936e  gcc/color-macros.h
  903401554d90de06743fb9a836e6a45b  gcc/combine-stack-adj.cc
! af093931f440b1ff2d8eaf64045fbf9b  gcc/combine.cc
  9f2835a8fa18cfce2249127014eb7edd  gcc/common.md
! b82c70a691a0ccf137f58b46e3f35b22  gcc/common.opt
  d2e8132b0f749227249e50a041b512b0  gcc/common.opt.urls
  d3b28fb0d49a8d683dde6011400fd7e7  gcc/common/common-target-def.h
  93cf11d6a27d42f73799ae012d2f876e  gcc/common/common-target.def
--- 3440,3448 ----
  d48c86bc52a7b8ee38281d6069d3eb6a  gcc/collect2.h
  9b54c6ade2ed5ee11859b498e663936e  gcc/color-macros.h
  903401554d90de06743fb9a836e6a45b  gcc/combine-stack-adj.cc
! 299c7cde77d5fc3481fd54d7ab150cb0  gcc/combine.cc
  9f2835a8fa18cfce2249127014eb7edd  gcc/common.md
! 551f50a49f263b4b324ec3892715d6d1  gcc/common.opt
  d2e8132b0f749227249e50a041b512b0  gcc/common.opt.urls
  d3b28fb0d49a8d683dde6011400fd7e7  gcc/common/common-target-def.h
  93cf11d6a27d42f73799ae012d2f876e  gcc/common/common-target.def
*************** da15606bcbef7961db958c042bf81c05  gcc/co
*** 3557,3563 ****
  9a92557ac11986ea17d11d6ca82c01e6  gcc/config/aarch64/aarch64-simd-builtins.def
  8f0acfd5455d9572e381b98441bf47a5  gcc/config/aarch64/aarch64-simd-pragma-builtins.def
  de47095986c58e8a296dc72de2121d30  gcc/config/aarch64/aarch64-simd.md
! d2454492e480b042b8b9bdcd7893fbe2  gcc/config/aarch64/aarch64-sme.md
  680d9861c361f5e0db24978600b2a134  gcc/config/aarch64/aarch64-speculation.cc
  fbc55a067066f3a335de10bf7c026566  gcc/config/aarch64/aarch64-sve-builtins-base.cc
  cc3e36cd6335911c4199669958386c9e  gcc/config/aarch64/aarch64-sve-builtins-base.def
--- 3557,3563 ----
  9a92557ac11986ea17d11d6ca82c01e6  gcc/config/aarch64/aarch64-simd-builtins.def
  8f0acfd5455d9572e381b98441bf47a5  gcc/config/aarch64/aarch64-simd-pragma-builtins.def
  de47095986c58e8a296dc72de2121d30  gcc/config/aarch64/aarch64-simd.md
! f27b31555e077ce25b7e0120a532cfdf  gcc/config/aarch64/aarch64-sme.md
  680d9861c361f5e0db24978600b2a134  gcc/config/aarch64/aarch64-speculation.cc
  fbc55a067066f3a335de10bf7c026566  gcc/config/aarch64/aarch64-sve-builtins-base.cc
  cc3e36cd6335911c4199669958386c9e  gcc/config/aarch64/aarch64-sve-builtins-base.def
*************** f8f181c4df2353358a3f66071820430a  gcc/co
*** 3581,3587 ****
  dec4c8fd03ac5636ba08d9523bee06be  gcc/config/aarch64/aarch64-tuning-enums.def
  45c6b1a7ca031f6a0af001317cc5e476  gcc/config/aarch64/aarch64-tuning-flags.def
  b2ed7b4c85a1fa71b919148f60e2984f  gcc/config/aarch64/aarch64-vxworks.h
! dbe7eb151ea2cf911853601e5230c769  gcc/config/aarch64/aarch64.cc
  643919d961f71a1bd5cc1df13bbd79f5  gcc/config/aarch64/aarch64.h
  bd813cb7dfa70cb6c970d78d27ead783  gcc/config/aarch64/aarch64.md
  473ca0d59415b61c8ee8e6c85d2ccb62  gcc/config/aarch64/aarch64.opt
--- 3581,3587 ----
  dec4c8fd03ac5636ba08d9523bee06be  gcc/config/aarch64/aarch64-tuning-enums.def
  45c6b1a7ca031f6a0af001317cc5e476  gcc/config/aarch64/aarch64-tuning-flags.def
  b2ed7b4c85a1fa71b919148f60e2984f  gcc/config/aarch64/aarch64-vxworks.h
! d47426c1d9e5a6f37b2ccfe3d6e11e83  gcc/config/aarch64/aarch64.cc
  643919d961f71a1bd5cc1df13bbd79f5  gcc/config/aarch64/aarch64.h
  bd813cb7dfa70cb6c970d78d27ead783  gcc/config/aarch64/aarch64.md
  473ca0d59415b61c8ee8e6c85d2ccb62  gcc/config/aarch64/aarch64.opt
*************** a3364cc2343afdc4fa084e07d1f457d3  gcc/co
*** 3918,3934 ****
  a2d0f6c9bad8a3879b580272be69f1f2  gcc/config/bpf/bpf-opts.h
  75577eb7c709c0b2fc654b674a23a488  gcc/config/bpf/bpf-passes.def
  492ee8a7f8cc45aed1396e6ae7512e4f  gcc/config/bpf/bpf-protos.h
! 4bda675b20f7054117fb2665f5699949  gcc/config/bpf/bpf.cc
! 67f05cbf853ae3716726b8b8088f7239  gcc/config/bpf/bpf.h
  195151d8b928ce219ee96521ccab1218  gcc/config/bpf/bpf.md
  8cc13feabe144c7b67f08306f49e22bf  gcc/config/bpf/bpf.opt
  3e2cdf3e83af474ef9980280e6ae16a5  gcc/config/bpf/bpf.opt.urls
  69c770efee22658702c18a3fa3e284c5  gcc/config/bpf/btfext-out.cc
  50fcdf526a0a6304507b91f5a086a4fd  gcc/config/bpf/btfext-out.h
  6a2b2e4c63b3a8475b313e2b2f79242b  gcc/config/bpf/constraints.md
! 03f82e469696d935ec02ad9ef77751e6  gcc/config/bpf/core-builtins.cc
  988e922d069a72cea8291afbd9c40fe5  gcc/config/bpf/core-builtins.h
! 64a1d068efe8f1e72d9324e299152bb0  gcc/config/bpf/predicates.md
  3f3bbe48c9291a5679f9d0ecc5c79139  gcc/config/bpf/t-bpf
  edc98debb11a492a6d8e0761aa1bf0f6  gcc/config/c6x/c6x-isas.def
  e28bac512917dbfea50c1a08828106f4  gcc/config/c6x/c6x-modes.def
--- 3918,3934 ----
  a2d0f6c9bad8a3879b580272be69f1f2  gcc/config/bpf/bpf-opts.h
  75577eb7c709c0b2fc654b674a23a488  gcc/config/bpf/bpf-passes.def
  492ee8a7f8cc45aed1396e6ae7512e4f  gcc/config/bpf/bpf-protos.h
! e0a8882e0559f8e53f5daccb155cce02  gcc/config/bpf/bpf.cc
! 1e0144cb5d4795912bdde571329d4c6b  gcc/config/bpf/bpf.h
  195151d8b928ce219ee96521ccab1218  gcc/config/bpf/bpf.md
  8cc13feabe144c7b67f08306f49e22bf  gcc/config/bpf/bpf.opt
  3e2cdf3e83af474ef9980280e6ae16a5  gcc/config/bpf/bpf.opt.urls
  69c770efee22658702c18a3fa3e284c5  gcc/config/bpf/btfext-out.cc
  50fcdf526a0a6304507b91f5a086a4fd  gcc/config/bpf/btfext-out.h
  6a2b2e4c63b3a8475b313e2b2f79242b  gcc/config/bpf/constraints.md
! c82fa8b4ae92eb6119216313104fe8fc  gcc/config/bpf/core-builtins.cc
  988e922d069a72cea8291afbd9c40fe5  gcc/config/bpf/core-builtins.h
! 89f9a18d2c1c7efb3d1efd20088289ee  gcc/config/bpf/predicates.md
  3f3bbe48c9291a5679f9d0ecc5c79139  gcc/config/bpf/t-bpf
  edc98debb11a492a6d8e0761aa1bf0f6  gcc/config/c6x/c6x-isas.def
  e28bac512917dbfea50c1a08828106f4  gcc/config/c6x/c6x-modes.def
*************** c863cc0237ddcf6c52a508cd6525e764  gcc/co
*** 4088,4094 ****
  96050b4b2455697e8f797ff6286b6575  gcc/config/g.opt.urls
  184915dc034cbca23d03a2c9f880624a  gcc/config/gcn/constraints.md
  563118cdacdef2dcad3b0d1a22455d12  gcc/config/gcn/gcn-builtins.def
! 0b844b1643d1ee7c5d801e26069bb7fc  gcc/config/gcn/gcn-devices.def
  e347bc1686ac86f556a527a2705e71a3  gcc/config/gcn/gcn-hsa.h
  bbf853858263e80940ecbbe3f821113c  gcc/config/gcn/gcn-modes.def
  2b6b8f2a6c71f2b7c182e976abf62906  gcc/config/gcn/gcn-opts.h
--- 4088,4094 ----
  96050b4b2455697e8f797ff6286b6575  gcc/config/g.opt.urls
  184915dc034cbca23d03a2c9f880624a  gcc/config/gcn/constraints.md
  563118cdacdef2dcad3b0d1a22455d12  gcc/config/gcn/gcn-builtins.def
! f581f4949ddd9e2845afd5bf54eba91c  gcc/config/gcn/gcn-devices.def
  e347bc1686ac86f556a527a2705e71a3  gcc/config/gcn/gcn-hsa.h
  bbf853858263e80940ecbbe3f821113c  gcc/config/gcn/gcn-modes.def
  2b6b8f2a6c71f2b7c182e976abf62906  gcc/config/gcn/gcn-opts.h
*************** d743703707286fafa2ce425b1d062ee0  gcc/co
*** 4306,4312 ****
  5b778b3296ea91dab0ca82338ca6828d  gcc/config/i386/i386-rust-and-jit.inc
  91b8b50cba997aef17a61929b5b55a87  gcc/config/i386/i386-rust.cc
  25b3947a11eb9ca52892133ddb36f3f2  gcc/config/i386/i386-rust.h
! 4b7f2e6ba75f5b26f3d864561130a6e0  gcc/config/i386/i386.cc
  47906818c05f1b4d2cf82b08c400db14  gcc/config/i386/i386.h
  00ec6ce9c3da79293c699e2e4c7e495a  gcc/config/i386/i386.md
  f431cbff6410e63b4e2de0e11adf19fb  gcc/config/i386/i386.opt
--- 4306,4312 ----
  5b778b3296ea91dab0ca82338ca6828d  gcc/config/i386/i386-rust-and-jit.inc
  91b8b50cba997aef17a61929b5b55a87  gcc/config/i386/i386-rust.cc
  25b3947a11eb9ca52892133ddb36f3f2  gcc/config/i386/i386-rust.h
! 09f1fa5ae81140118395e58eba72cee2  gcc/config/i386/i386.cc
  47906818c05f1b4d2cf82b08c400db14  gcc/config/i386/i386.h
  00ec6ce9c3da79293c699e2e4c7e495a  gcc/config/i386/i386.md
  f431cbff6410e63b4e2de0e11adf19fb  gcc/config/i386/i386.opt
*************** ae4bd752599ffdd2833c6e78d03d39f0  gcc/co
*** 5183,5189 ****
  f83fd3bf0d9fbc30c9401eec549fdc2c  gcc/config/rs6000/bmi2intrin.h
  161814e9f6f10782769302881ac26227  gcc/config/rs6000/bmiintrin.h
  ee17a95e2411ef6ef4f1588d17e2cf66  gcc/config/rs6000/cell.md
! 837f16df42ea04e41a4450e7f9ebe42a  gcc/config/rs6000/constraints.md
  9dfea0dab8f972986488db93eb23fab1  gcc/config/rs6000/crypto.md
  841aa28da573ce031fe43ae0fb24bfd9  gcc/config/rs6000/darwin.h
  8c9c110a4faa8e47a4c4caef834d7c1d  gcc/config/rs6000/darwin.md
--- 5183,5189 ----
  f83fd3bf0d9fbc30c9401eec549fdc2c  gcc/config/rs6000/bmi2intrin.h
  161814e9f6f10782769302881ac26227  gcc/config/rs6000/bmiintrin.h
  ee17a95e2411ef6ef4f1588d17e2cf66  gcc/config/rs6000/cell.md
! f69c992eed87b55ffc58035df814aba1  gcc/config/rs6000/constraints.md
  9dfea0dab8f972986488db93eb23fab1  gcc/config/rs6000/crypto.md
  841aa28da573ce031fe43ae0fb24bfd9  gcc/config/rs6000/darwin.h
  8c9c110a4faa8e47a4c4caef834d7c1d  gcc/config/rs6000/darwin.md
*************** e4b02417cb4df9d5a76c80b1ff2a9f74  gcc/co
*** 5223,5229 ****
  6368ef27960f047d29859f35015459ad  gcc/config/rs6000/lynx.h
  0cc3c5f9101501b8253ce3176c3ffce4  gcc/config/rs6000/milli.exp
  bafcfaea28ea830127780e11ee8484b7  gcc/config/rs6000/mm_malloc.h
! 6e0671bcc17a9ce56b8bf4c08f887b32  gcc/config/rs6000/mma.md
  666740adf812d1114cd095f0155311d5  gcc/config/rs6000/mmintrin.h
  83a4c3ddfdabef774f4ae2987049a6d0  gcc/config/rs6000/mpc.md
  0f91e4ac20f298ae22704f7b3d0560cf  gcc/config/rs6000/netbsd.h
--- 5223,5229 ----
  6368ef27960f047d29859f35015459ad  gcc/config/rs6000/lynx.h
  0cc3c5f9101501b8253ce3176c3ffce4  gcc/config/rs6000/milli.exp
  bafcfaea28ea830127780e11ee8484b7  gcc/config/rs6000/mm_malloc.h
! cc15483e931568cb2caf0e2507e169be  gcc/config/rs6000/mma.md
  666740adf812d1114cd095f0155311d5  gcc/config/rs6000/mmintrin.h
  83a4c3ddfdabef774f4ae2987049a6d0  gcc/config/rs6000/mpc.md
  0f91e4ac20f298ae22704f7b3d0560cf  gcc/config/rs6000/netbsd.h
*************** b534d6922b2ac8fcdec1c19d8a7bdb13  gcc/co
*** 5241,5261 ****
  c79696c3d7958935d4122048b9bb5f92  gcc/config/rs6000/ppc-asm.h
  e97302b0144b183500470a0f7f84ad57  gcc/config/rs6000/ppc-auxv.h
  db237fc1717a4075e7b9480205a32fd5  gcc/config/rs6000/ppu_intrinsics.h
! 848a5a527b1584089ecf12aae20b7ca6  gcc/config/rs6000/predicates.md
  63ccc96ff2cef948c080eac4455d02b1  gcc/config/rs6000/rbtree.cc
  8ece9ca8167f5056fa411488a97c6131  gcc/config/rs6000/rbtree.h
! 5a8a620d69be5ade28e15be87ec36b9a  gcc/config/rs6000/rs6000-builtin.cc
! 54b2f5abbb368e1596fd95a26bf043da  gcc/config/rs6000/rs6000-builtins.def
  bb710aa9f6e98d46357a2a10104dda23  gcc/config/rs6000/rs6000-c.cc
! c97babd518212b16f2837b9b1d5d8359  gcc/config/rs6000/rs6000-call.cc
! 4579aba833c122ad0e6a91b573653e2c  gcc/config/rs6000/rs6000-cpus.def
  7b860836fdc33cdfdd29f6348a553096  gcc/config/rs6000/rs6000-d.cc
  1ac6ae1e7d6d83d76667769f7166b9a7  gcc/config/rs6000/rs6000-d.h
! b1bbe3e57fef362260e8c8ccae80c4ba  gcc/config/rs6000/rs6000-gen-builtins.cc
  c165dfc83b2c9e75d3906f429e76a3fa  gcc/config/rs6000/rs6000-internal.h
  68da03c0d0c1dfafebf4ba706e6d3ff9  gcc/config/rs6000/rs6000-linux.cc
  4768cacdca0b901f6cb649726cca5eeb  gcc/config/rs6000/rs6000-logue.cc
! 108998dcf0201ccd3e147d71251ca9f6  gcc/config/rs6000/rs6000-modes.def
  e6f2820356a7ee18c353376ab3490fb6  gcc/config/rs6000/rs6000-opts.h
  2af0749f721161472c3953c307190333  gcc/config/rs6000/rs6000-overload.def
  dc46fa102175551da2f4ce2ee5c6435c  gcc/config/rs6000/rs6000-p8swap.cc
--- 5241,5261 ----
  c79696c3d7958935d4122048b9bb5f92  gcc/config/rs6000/ppc-asm.h
  e97302b0144b183500470a0f7f84ad57  gcc/config/rs6000/ppc-auxv.h
  db237fc1717a4075e7b9480205a32fd5  gcc/config/rs6000/ppu_intrinsics.h
! 16b3a369f03769ad607ae5158f6b5f90  gcc/config/rs6000/predicates.md
  63ccc96ff2cef948c080eac4455d02b1  gcc/config/rs6000/rbtree.cc
  8ece9ca8167f5056fa411488a97c6131  gcc/config/rs6000/rbtree.h
! 8275080016745dd2af0c33dfabb02c9c  gcc/config/rs6000/rs6000-builtin.cc
! a279505199952377f52557bce5be1325  gcc/config/rs6000/rs6000-builtins.def
  bb710aa9f6e98d46357a2a10104dda23  gcc/config/rs6000/rs6000-c.cc
! 7c9a1176a2e08f0e5427b62d9b9742e8  gcc/config/rs6000/rs6000-call.cc
! 52e2359f2b2a12d4d3f78e6f22da4e2c  gcc/config/rs6000/rs6000-cpus.def
  7b860836fdc33cdfdd29f6348a553096  gcc/config/rs6000/rs6000-d.cc
  1ac6ae1e7d6d83d76667769f7166b9a7  gcc/config/rs6000/rs6000-d.h
! 33aadbc7a022914894554e071177e0ce  gcc/config/rs6000/rs6000-gen-builtins.cc
  c165dfc83b2c9e75d3906f429e76a3fa  gcc/config/rs6000/rs6000-internal.h
  68da03c0d0c1dfafebf4ba706e6d3ff9  gcc/config/rs6000/rs6000-linux.cc
  4768cacdca0b901f6cb649726cca5eeb  gcc/config/rs6000/rs6000-logue.cc
! 695007bb43118f89d9fb34a01a8e3f5a  gcc/config/rs6000/rs6000-modes.def
  e6f2820356a7ee18c353376ab3490fb6  gcc/config/rs6000/rs6000-opts.h
  2af0749f721161472c3953c307190333  gcc/config/rs6000/rs6000-overload.def
  dc46fa102175551da2f4ce2ee5c6435c  gcc/config/rs6000/rs6000-p8swap.cc
*************** da37007432adac35e44d7592e307e64a  gcc/co
*** 5265,5274 ****
  9e39e759376eb97f2a56ebfc28c8d149  gcc/config/rs6000/rs6000-string.cc
  835f22c956cc4deb83970ee9a9b5b79b  gcc/config/rs6000/rs6000-tables.opt
  ce8de9a27f36b759a69194616c02eb38  gcc/config/rs6000/rs6000-tables.opt.urls
! 43c48798ca1e7e10c5d7cef5a074429a  gcc/config/rs6000/rs6000.cc
! 022807cee92311bbde8050337f5e7efb  gcc/config/rs6000/rs6000.h
! 11c245f6d6d6de23948bd798f0994c16  gcc/config/rs6000/rs6000.md
! e407423336f12658b509205c3e8f7130  gcc/config/rs6000/rs6000.opt
  80708ca71755b0d8d354f113f0617617  gcc/config/rs6000/rs6000.opt.urls
  89d4cadf8216efa86b72204e660cc4b0  gcc/config/rs6000/rs64.md
  d57d0eb0a8e2193f5cef2aaf1ad6d722  gcc/config/rs6000/rtems.h
--- 5265,5274 ----
  9e39e759376eb97f2a56ebfc28c8d149  gcc/config/rs6000/rs6000-string.cc
  835f22c956cc4deb83970ee9a9b5b79b  gcc/config/rs6000/rs6000-tables.opt
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! a02adfdff283fa670da666e9c2f3bb86  gcc/config/rs6000/rs6000.cc
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*************** c5ad0142a191862e3e81ecd3573754b3  gcc/co
*** 5646,5652 ****
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--- 5646,5652 ----
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*************** b1ea0d0ed485b0b4279a7cacc155dd5e  gcc/cp
*** 5688,5694 ****
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--- 5688,5694 ----
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*************** f53ddf06036f74142c61f4a8ef1b994d  gcc/cp
*** 5707,5713 ****
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--- 5707,5713 ----
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*************** ee65c9e3e7c3fb1fd0128c23f4130e51  gcc/do
*** 6131,6137 ****
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--- 6131,6137 ----
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*************** cb2462af7cefb9323958455da8bb29f8  gcc/do
*** 6156,6162 ****
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--- 6156,6162 ----
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*************** c2fc9f8e6a1cb39a7237e4ac3d7fcd7f  gcc/do
*** 6194,6200 ****
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--- 6194,6200 ----
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*************** e54937e427a2584ac4045286c725fab1  gcc/do
*** 6208,6217 ****
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--- 6208,6217 ----
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*************** f80b38c70a85f9aeae9688b937b028ba  gcc/fi
*** 6271,6277 ****
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--- 6271,6277 ----
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*************** cbdc87ddd4ad5837f1771e93f704a33e  gcc/fo
*** 6359,6365 ****
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--- 6359,6365 ----
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*************** fe144e1c2a0da30ffc9946e5adab7e6f  gcc/fu
*** 6386,6392 ****
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--- 6386,6392 ----
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*************** d29ad5283ef50f50d10619397e423ecf  gcc/gi
*** 6518,6524 ****
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--- 6518,6524 ----
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*************** d5b393ecc0c0636412e1ac221afb5c69  gcc/in
*** 6679,6685 ****
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--- 6679,6685 ----
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*************** c6ab645f373e1d6e9ddd212bfc3a95ba  gcc/lo
*** 6861,6867 ****
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--- 6861,6867 ----
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! 3c2248ffba95fc5276d8655ba13cb397  gcc/lra-constraints.cc
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*************** f9608e9005487c369e6c38949ab36fa1  gcc/m2
*** 7882,7888 ****
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--- 7882,7888 ----
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! 33af398ea8c4c3fe76968f9f3a77c520  gcc/match.pd
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*************** d294651bcc46af1abb89e48cd851fd40  gcc/ta
*** 8721,8732 ****
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! 133293d8531510e8e983903c3e070b61  gcc/testsuite/ChangeLog
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--- 8721,8732 ----
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*** 18072,18077 ****
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*************** f5a92a0de23b213fa01a61cf7fe1ae34  gcc/te
*** 51073,51079 ****
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--- 51093,51099 ----
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*************** fc7c9c751d59b444d0ab30c4d9029491  gcc/te
*** 56859,56864 ****
--- 56879,56885 ----
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*************** e43dcd43531182c1839bc3842972ef9a  gcc/te
*** 58800,58805 ****
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*** 58819,58830 ****
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*** 62715,62720 ****
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*************** c43846e7d9bad55e57bb6582cda21f23  gcc/te
*** 65705,65711 ****
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*************** fe380a1f1df354382cdc2b0804d55603  gcc/te
*** 65974,65980 ****
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*************** b35c2e9856d8c47fe15c1afbe3df715a  gcc/te
*** 68180,68186 ****
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*************** fcb04e9cbca635f4ef142c6621245943  gcc/te
*** 68241,68247 ****
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*************** edde27caeb90674dfc63f9c173c1b91f  gcc/te
*** 68251,68268 ****
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*** 68287,68298 ****
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*** 68725,68731 ****
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*** 82700,82706 ****
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*** 83632,83637 ****
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*************** c980e9d389b2784b152fb6522586c1e2  gcc/te
*** 96760,96765 ****
--- 96832,96838 ----
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*************** a64bd4e47397af3253bc9e8dc2c56780  gcc/te
*** 96975,96981 ****
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--- 97048,97056 ----
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*************** dd5152504d225107b11fb67b0294b0c1  gcc/te
*** 96985,96991 ****
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--- 97060,97068 ----
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*************** a71d80353dd79a03e464836b916549b6  gcc/te
*** 96995,97013 ****
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--- 97072,97093 ----
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*************** e8cb6db3a80d9f2556315cdb673fb7d8  gcc/te
*** 97028,97042 ****
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--- 97108,97128 ----
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*************** b628655d5e6da478a0338b6a99c2b547  gcc/te
*** 97057,97063 ****
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--- 97143,97151 ----
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*************** f6d2f4364150d4138b35fed2c1ce6f5d  gcc/te
*** 97090,97096 ****
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--- 97178,97186 ----
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*************** deb12224fed195721b2ddc8b70e46a23  gcc/te
*** 97123,97128 ****
--- 97213,97219 ----
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*************** fb757de1cee57f76b9bf05d3fc880778  gcc/te
*** 97420,97434 ****
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--- 97511,97531 ----
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*************** a4b65c03b235e179c2c54ae705ca1314  gcc/te
*** 97440,97446 ****
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--- 97537,97545 ----
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*************** f5e225138df5975ae486ef1582f39e75  gcc/te
*** 97449,97455 ****
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--- 97548,97556 ----
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*************** cb50185eaf87f5357dad5873642eec33  gcc/te
*** 114125,114130 ****
--- 114226,114232 ----
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*************** de9eeadec9703aff96169206e31a3a22  gcc/te
*** 128363,128369 ****
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--- 128465,128471 ----
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*************** b980e97059595b9c229e76799b1309df  gcc/tr
*** 131179,131185 ****
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--- 131281,131287 ----
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*************** a24cff30baef257a999b4fac3ca47d5a  gcc/tr
*** 131191,131197 ****
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--- 131293,131299 ----
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*************** e316eddfbf9a02433a4ee93e648f3aa4  gcc/tr
*** 131275,131281 ****
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--- 131377,131383 ----
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*************** a3eb5dee2788fe0a6c42502ba658eddd  libffi
*** 132145,132151 ****
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*************** cf6be962dfa097e1e50ffbb773452c38  libga6
*** 132156,132166 ****
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--- 132258,132268 ----
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*************** e0b2ba9a0bf41fccbcbd614e5674ef00  libga6
*** 132169,132175 ****
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--- 132271,132277 ----
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*************** a3a7e9ca6057da9ca42e03e41e1c73f7  libgo/
*** 140413,140419 ****
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*************** ee1bca91c6e853556cd65170329412cb  libgom
*** 141645,141651 ****
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*************** a144795bdde388f89eb6222f0c2e4932  libstd
*** 146276,146282 ****
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--- 146378,146384 ----
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*** 147458,147464 ****
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--- 147560,147566 ----
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*** 147472,147478 ****
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--- 147574,147580 ----
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*************** be169e901166777d5be3e557682b7af2  libstd
*** 147490,147496 ****
  2f3eb4865a149d33afc45095dfd51d15  libstdc++-v3/include/std/list
  979d756bd9149a01a697b92c921e75a0  libstdc++-v3/include/std/locale
  b9368104d884bddd988db2b9e69ab485  libstdc++-v3/include/std/map
! 1a1dcf610fe6b8ddf11481fa6138a628  libstdc++-v3/include/std/mdspan
  5439ce157f7c11ab4eddd8c04799fea4  libstdc++-v3/include/std/memory
  ea0d67f29f1a73f1ccdade0115646a1c  libstdc++-v3/include/std/memory_resource
  567571e5d45a92d724eb13976d8d825d  libstdc++-v3/include/std/meta
--- 147592,147598 ----
  2f3eb4865a149d33afc45095dfd51d15  libstdc++-v3/include/std/list
  979d756bd9149a01a697b92c921e75a0  libstdc++-v3/include/std/locale
  b9368104d884bddd988db2b9e69ab485  libstdc++-v3/include/std/map
! eef1550aec0449a7252754780992ef6a  libstdc++-v3/include/std/mdspan
  5439ce157f7c11ab4eddd8c04799fea4  libstdc++-v3/include/std/memory
  ea0d67f29f1a73f1ccdade0115646a1c  libstdc++-v3/include/std/memory_resource
  567571e5d45a92d724eb13976d8d825d  libstdc++-v3/include/std/meta
*************** bcf1c0b79e2efd9cd34763d368f40966  libstd
*** 147502,147508 ****
  e24e6fab84ab94b060b3c31ebc39b264  libstdc++-v3/include/std/print
  879fbfbd4d520dc45943e6e1c095a2e7  libstdc++-v3/include/std/queue
  e21a300c90cd953e16f037708f0e242a  libstdc++-v3/include/std/random
! 55340fcae30b7b54a32cdd42b4679f6c  libstdc++-v3/include/std/ranges
  ee576f89ae347224177df91fe86d905d  libstdc++-v3/include/std/ratio
  a5c4f3df840ba7c3fbc9b7b9d5567ef2  libstdc++-v3/include/std/regex
  8e6ef0834acfc88dd03f5eae2990e41a  libstdc++-v3/include/std/scoped_allocator
--- 147604,147610 ----
  e24e6fab84ab94b060b3c31ebc39b264  libstdc++-v3/include/std/print
  879fbfbd4d520dc45943e6e1c095a2e7  libstdc++-v3/include/std/queue
  e21a300c90cd953e16f037708f0e242a  libstdc++-v3/include/std/random
! 2952199fa4a358dda6de222592bdfafb  libstdc++-v3/include/std/ranges
  ee576f89ae347224177df91fe86d905d  libstdc++-v3/include/std/ratio
  a5c4f3df840ba7c3fbc9b7b9d5567ef2  libstdc++-v3/include/std/regex
  8e6ef0834acfc88dd03f5eae2990e41a  libstdc++-v3/include/std/scoped_allocator
*************** e5a726de140540a59e2007eceae3acd1  libstd
*** 147829,147841 ****
  951f0c490df6a0fb2f9c0fd9ee0eb9e0  libstdc++-v3/src/c++20/atomic.cc
  e017d47cedd4e843177ec9ff2c936541  libstdc++-v3/src/c++20/clock.cc
  beadb627afafbd9d018802046c0b4403  libstdc++-v3/src/c++20/cow-string-inst.cc
! 950ea458edaf556ab767e8e46c180ee3  libstdc++-v3/src/c++20/format-inst.cc
  6f52cb5166806e80230cc27bc6c99101  libstdc++-v3/src/c++20/format.cc
  c2bd27af25e57adce5807e0f01a2d0dc  libstdc++-v3/src/c++20/sstream-inst.cc
  23187a5ee053acd65f32c0dc2ac4bdf7  libstdc++-v3/src/c++20/string-inst.cc
  50ac2e00d5794df965e47509f3c16cb5  libstdc++-v3/src/c++20/syncbuf.cc
  0dfa4a770289b4e926b8281770732d5a  libstdc++-v3/src/c++20/tzdata.zi
! d73167acef44648f9b3bbfe18e4d1b8b  libstdc++-v3/src/c++20/tzdb.cc
  ac7b7a080d5f7aa8fe6a26188631fc18  libstdc++-v3/src/c++20/windows_zones-map.h
  863fc49f52a3a3665416a7c88fc4f3e7  libstdc++-v3/src/c++23/Makefile.am
  0d7332606e5b7973ac0d4398f18cfd17  libstdc++-v3/src/c++23/Makefile.in
--- 147931,147943 ----
  951f0c490df6a0fb2f9c0fd9ee0eb9e0  libstdc++-v3/src/c++20/atomic.cc
  e017d47cedd4e843177ec9ff2c936541  libstdc++-v3/src/c++20/clock.cc
  beadb627afafbd9d018802046c0b4403  libstdc++-v3/src/c++20/cow-string-inst.cc
! 8935ae75c739b4bfd7e44d8d9f686f6e  libstdc++-v3/src/c++20/format-inst.cc
  6f52cb5166806e80230cc27bc6c99101  libstdc++-v3/src/c++20/format.cc
  c2bd27af25e57adce5807e0f01a2d0dc  libstdc++-v3/src/c++20/sstream-inst.cc
  23187a5ee053acd65f32c0dc2ac4bdf7  libstdc++-v3/src/c++20/string-inst.cc
  50ac2e00d5794df965e47509f3c16cb5  libstdc++-v3/src/c++20/syncbuf.cc
  0dfa4a770289b4e926b8281770732d5a  libstdc++-v3/src/c++20/tzdata.zi
! 58e399e6908a5a67c6aaecba4bcc8a6a  libstdc++-v3/src/c++20/tzdb.cc
  ac7b7a080d5f7aa8fe6a26188631fc18  libstdc++-v3/src/c++20/windows_zones-map.h
  863fc49f52a3a3665416a7c88fc4f3e7  libstdc++-v3/src/c++23/Makefile.am
  0d7332606e5b7973ac0d4398f18cfd17  libstdc++-v3/src/c++23/Makefile.in
*************** afe443cccc07fbd59aff2af0edd955ce  libstd
*** 151589,151594 ****
--- 151691,151697 ----
  c70a46b7a870b0d7ac9e94fd9d9077b6  libstdc++-v3/testsuite/23_containers/mdspan/layouts/padded.cc
  490297a4a90a084a51d7dfe6eb3a0f72  libstdc++-v3/testsuite/23_containers/mdspan/layouts/padded_neg.cc
  54d31e86115d0b93699f33eca2e16852  libstdc++-v3/testsuite/23_containers/mdspan/layouts/stride.cc
+ 91c5f0500560d19589fb48c98fe2df8d  libstdc++-v3/testsuite/23_containers/mdspan/layouts/stride_neg.cc
  083b2e8397805cfb105e7a8f99e725ca  libstdc++-v3/testsuite/23_containers/mdspan/mdspan.cc
  4b1a50b4d361b155b60027f1bdc566e7  libstdc++-v3/testsuite/23_containers/mdspan/out_of_bounds_neg.cc
  d0948adb8d08e1ed90f5223c0e45676b  libstdc++-v3/testsuite/23_containers/mdspan/submdspan/canonical_slices.cc
*************** b3cda48993495a5d2ff69f7f1ad2c695  libstd
*** 157520,157525 ****
--- 157623,157629 ----
  a87e1152f6bc2804b93ce070a51eeb54  libstdc++-v3/testsuite/std/time/clock/tai/io.cc
  33b0f61f2113641c61ba5cd53d9a52a3  libstdc++-v3/testsuite/std/time/clock/utc/1.cc
  91c1a13a9f62d24541dc87bd44c15db4  libstdc++-v3/testsuite/std/time/clock/utc/io.cc
+ 8207a230fceb4f378b286a04d4911dde  libstdc++-v3/testsuite/std/time/clock/utc/leap_second_info-2.cc
  01f8f5b7e0644716179c7a0f95af5d9d  libstdc++-v3/testsuite/std/time/clock/utc/leap_second_info.cc
  225275a54c046285affc36a80ea7383b  libstdc++-v3/testsuite/std/time/day/1.cc
  9b5b79c912b11d4f48e1fb35fb111742  libstdc++-v3/testsuite/std/time/day/io.cc
*************** a0be85b8053be995a48a4cfec6a5b675  libstd
*** 157564,157575 ****
  4547b0badce5668333f08490264f6870  libstdc++-v3/testsuite/std/time/parse/125369.cc
  5762399d57d6d0d2d2d8cd51ff3f423d  libstdc++-v3/testsuite/std/time/parse/parse.cc
  f16dd4eb7915f1558b6ae75425ab2987  libstdc++-v3/testsuite/std/time/syn_c++20.cc
! 942f5bb5a199e3f7b0821958da8b265a  libstdc++-v3/testsuite/std/time/time_zone/116110.cc
  e5f71dc7f2292314c0c9b06c3b8acf2e  libstdc++-v3/testsuite/std/time/time_zone/124513.cc
  f9d9d1cb483f1731762a8e5787c8020b  libstdc++-v3/testsuite/std/time/time_zone/get_info_local.cc
  5c55d9e35cb8c9c5e0a207bd53fa37d2  libstdc++-v3/testsuite/std/time/time_zone/get_info_sys.cc
  efdc68d548df15089ce510e6bf1c33c7  libstdc++-v3/testsuite/std/time/time_zone/requirements.cc
  105f0ca3c8074ef3b2c1751d37ec2b96  libstdc++-v3/testsuite/std/time/time_zone/sys_info_abbrev.cc
  62c56a128f0d03b2e348296c7a54ee3f  libstdc++-v3/testsuite/std/time/traits/is_clock.cc
  3c922068cf98b21e732c0de16c319289  libstdc++-v3/testsuite/std/time/tzdb/1.cc
  c142573e06d5c52d53f0f20e1e72e973  libstdc++-v3/testsuite/std/time/tzdb/leap_seconds.cc
--- 157668,157682 ----
  4547b0badce5668333f08490264f6870  libstdc++-v3/testsuite/std/time/parse/125369.cc
  5762399d57d6d0d2d2d8cd51ff3f423d  libstdc++-v3/testsuite/std/time/parse/parse.cc
  f16dd4eb7915f1558b6ae75425ab2987  libstdc++-v3/testsuite/std/time/syn_c++20.cc
! 20a3aeab320cb801731b51309979937b  libstdc++-v3/testsuite/std/time/time_zone/116110.cc
  e5f71dc7f2292314c0c9b06c3b8acf2e  libstdc++-v3/testsuite/std/time/time_zone/124513.cc
  f9d9d1cb483f1731762a8e5787c8020b  libstdc++-v3/testsuite/std/time/time_zone/get_info_local.cc
  5c55d9e35cb8c9c5e0a207bd53fa37d2  libstdc++-v3/testsuite/std/time/time_zone/get_info_sys.cc
+ 1e7ccd27fe0a3cf8d6428f6f2710fcb9  libstdc++-v3/testsuite/std/time/time_zone/numeric_save.cc
  efdc68d548df15089ce510e6bf1c33c7  libstdc++-v3/testsuite/std/time/time_zone/requirements.cc
  105f0ca3c8074ef3b2c1751d37ec2b96  libstdc++-v3/testsuite/std/time/time_zone/sys_info_abbrev.cc
+ 57d3f5cb0b34d16a612546952b82dafa  libstdc++-v3/testsuite/std/time/time_zone/until_day_on.cc
+ 7c1258786879b5e505434232b35c3a56  libstdc++-v3/testsuite/std/time/time_zone/wall_cascade.cc
  62c56a128f0d03b2e348296c7a54ee3f  libstdc++-v3/testsuite/std/time/traits/is_clock.cc
  3c922068cf98b21e732c0de16c319289  libstdc++-v3/testsuite/std/time/tzdb/1.cc
  c142573e06d5c52d53f0f20e1e72e973  libstdc++-v3/testsuite/std/time/tzdb/leap_seconds.cc
*************** f780e2fc46810f6679eec84f2dd1cf9b  libstd
*** 158304,158310 ****
  3a1096531268d7e3514024bb1e260114  libstdc++-v3/testsuite/util/statistic/sample_mean.hpp
  385ba811a55809bf13c1dab8d86fcc56  libstdc++-v3/testsuite/util/statistic/sample_mean_confidence_checker.hpp
  f030a30143a9640ad719d16f68d9bc10  libstdc++-v3/testsuite/util/statistic/sample_variance.hpp
! 8bc980f96fee411fcc6fec306068dc33  libstdc++-v3/testsuite/util/testsuite_abi.cc
  54f2a8dfb9fbcdb569726ffbe6370f23  libstdc++-v3/testsuite/util/testsuite_abi.h
  db5d5717075b7e1c4eb267257b1ee418  libstdc++-v3/testsuite/util/testsuite_abi_check.cc
  aac284c59df58716bba32e67d322c2a8  libstdc++-v3/testsuite/util/testsuite_allocator.cc
--- 158411,158417 ----
  3a1096531268d7e3514024bb1e260114  libstdc++-v3/testsuite/util/statistic/sample_mean.hpp
  385ba811a55809bf13c1dab8d86fcc56  libstdc++-v3/testsuite/util/statistic/sample_mean_confidence_checker.hpp
  f030a30143a9640ad719d16f68d9bc10  libstdc++-v3/testsuite/util/statistic/sample_variance.hpp
! d46265f9ed949404e1c5119354b95ac4  libstdc++-v3/testsuite/util/testsuite_abi.cc
  54f2a8dfb9fbcdb569726ffbe6370f23  libstdc++-v3/testsuite/util/testsuite_abi.h
  db5d5717075b7e1c4eb267257b1ee418  libstdc++-v3/testsuite/util/testsuite_abi_check.cc
  aac284c59df58716bba32e67d322c2a8  libstdc++-v3/testsuite/util/testsuite_allocator.cc
diff -Nrcpad gcc-16-20260718/gcc/ChangeLog gcc-16-20260725/gcc/ChangeLog
*** gcc-16-20260718/gcc/ChangeLog	Sat Jul 18 22:32:05 2026
--- gcc-16-20260725/gcc/ChangeLog	Sat Jul 25 22:32:05 2026
***************
*** 1,3 ****
--- 1,581 ----
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (UNSPEC_DMF_DMXVF16GERX2): New UNSPEC entry.
+ 	(UNSPEC_DMF_DMXVF16GERX2PP): Likewise.
+ 	(UNSPEC_DMF_DMXVF16GERX2PN): Likewise.
+ 	(UNSPEC_DMF_DMXVF16GERX2NP): Likewise.
+ 	(UNSPEC_DMF_DMXVF16GERX2NN): Likewise.
+ 	(UNSPEC_DMF_PMDMXVF16GERX2): Likewise.
+ 	(UNSPEC_DMF_PMDMXVF16GERX2PP): Likewise.
+ 	(UNSPEC_DMF_PMDMXVF16GERX2PN): Likewise.
+ 	(UNSPEC_DMF_PMDMXVF16GERX2NP): Likewise.
+ 	(UNSPEC_DMF_PMDMXVF16GERX2NN): Likewise.
+ 	(DMF_PV): Add UNSPEC_DMF_DMXVF16GERX2.
+ 	(DMF_DPV): Add f16 variants.
+ 	(DMF_PVI8I4I2): Add UNSPEC_DMF_PMDMXVF16GERX2.
+ 	(DMF_DPVI8I4I2): Add f16 prefixed variants.
+ 	(pv): Add dmxvf16gerx2 attribute.
+ 	(dpv): Add f16 attributes.
+ 	(pvi8i4i2): Add pmdmxvf16gerx2 attribute.
+ 	(dpvi8i4i2): Add f16 prefixed attributes.
+ 	* config/rs6000/rs6000-builtins.def (__builtin_mma_dmxvf16gerx2): New
+ 	builtin.
+ 	(__builtin_mma_dmxvf16gerx2pp): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2pn): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2np): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2nn): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2pp): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2pn): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2np): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2nn): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2_internal): New internal builtin.
+ 	(__builtin_mma_dmxvf16gerx2pp_internal): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2pn_internal): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2np_internal): Likewise.
+ 	(__builtin_mma_dmxvf16gerx2nn_internal): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2_internal): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2pp_internal): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2pn_internal): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2np_internal): Likewise.
+ 	(__builtin_mma_pmdmxvf16gerx2nn_internal): Likewise.
+ 	* doc/extend.texi (PowerPC Matrix-Multiply Assist Built-in Functions):
+ 	Document new MMA+ builtins for f16 operations.
+ 
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (UNSPEC_DMF_DMXVI8GERX4SPP): New UNSPEC entry.
+ 	(UNSPEC_DMF_PMDMXVI8GERX4SPP): Likewise.
+ 	(UNSPEC_DMF_DMXVBF16GERX2): Likewise.
+ 	(UNSPEC_DMF_DMXVBF16GERX2PP): Likewise.
+ 	(UNSPEC_DMF_DMXVBF16GERX2PN): Likewise.
+ 	(UNSPEC_DMF_DMXVBF16GERX2NP): Likewise.
+ 	(UNSPEC_DMF_DMXVBF16GERX2NN): Likewise.
+ 	(UNSPEC_DMF_PMDMXVBF16GERX2): Likewise.
+ 	(UNSPEC_DMF_PMDMXVBF16GERX2PP): Likewise.
+ 	(UNSPEC_DMF_PMDMXVBF16GERX2PN): Likewise.
+ 	(UNSPEC_DMF_PMDMXVBF16GERX2NP): Likewise.
+ 	(UNSPEC_DMF_PMDMXVBF16GERX2NN): Likewise.
+ 	(DMF_PV): Add UNSPEC_DMF_DMXVBF16GERX2.
+ 	(DMF_DPV): Add bf16 and int8 signed accumulate variants.
+ 	(DMF_DPVI8I4I4): Add UNSPEC_DMF_PMDMXVI8GERX4SPP.
+ 	(DMF_PVI8I4I2): New int iterator.
+ 	(DMF_DPVI8I4I2): Likewise.
+ 	(pv): Add dmxvbf16gerx2 attribute.
+ 	(apv): Removed dmxvi8gerx4pp attribute.
+ 	(dpv): New attribute.
+ 	(dpvi8i4i4): Add pmdmxvi8gerx4spp attribute.
+ 	(pvi8i4i2): New attribute.
+ 	(dpvi8i4i2): Likewise.
+ 	(dmf_<dpv>): Rename from dmf_<apv> and update to use dpv attribute.
+ 	(dmf_<pvi8i4i2>): New insn pattern.
+ 	(dmf_<dpvi8i4i2>): Likewise.
+ 	* config/rs6000/rs6000-builtins.def (__builtin_mma_dmxvi8gerx4spp): New
+ 	builtin.
+ 	(__builtin_mma_pmdmxvi8gerx4spp): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2pp): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2pn): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2np): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2nn): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2pp): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2pn): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2np): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2nn): Likewise.
+ 	(__builtin_mma_dmxvi8gerx4spp_internal): New internal builtin.
+ 	(__builtin_mma_pmdmxvi8gerx4spp_internal): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2_internal): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2pp_internal): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2pn_internal): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2np_internal): Likewise.
+ 	(__builtin_mma_dmxvbf16gerx2nn_internal): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2_internal): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2pp_internal): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2pn_internal): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2np_internal): Likewise.
+ 	(__builtin_mma_pmdmxvbf16gerx2nn_internal): Likewise.
+ 	* doc/extend.texi (PowerPC Matrix-Multiply Assist Built-in Functions):
+ 	Document new MMA+ builtins for int8 and bf16 operations.
+ 
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-builtins.def (__builtin_dmr_extract512): New
+ 	built-in.
+ 	(__builtin_disassemble_dmr): Likewise.
+ 	(__builtin_dmr_extract512_internal): New internal built-in.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin):
+ 	Exempt RS6000_BIF_DISASSEMBLE_DMR from the early-return guard.
+ 	Generate appropriate gimple code for the extract builtins.
+ 
+ 2026-07-24  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 		    Vijay Shankar  <vijay@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (mma_xxsetaccz): Use wD constraint and
+ 	accumulator operand.
+ 	(mma_<vv>): Likewise.
+ 	(mma_<avv>): Likewise.
+ 	(mma_<pv>): Likewise.
+ 	(mma_<apv>): Likewise.
+ 	(mma_<vvi4i4i8>): Likewise.
+ 	(mma_<avvi4i4i8>): Likewise.
+ 	(mma_<vvi4i4i2>): Likewise.
+ 	(mma_<avvi4i4i2>): Likewise.
+ 	(mma_<vvi4i4>): Likewise.
+ 	(mma_<avvi4i4>): Likewise.
+ 	(mma_<pvi4i2>): Likewise.
+ 	(mma_<apvi4i2>): Likewise.
+ 	(mma_<vvi4i4i4>): Likewise.
+ 	(mma_<avvi4i4i4>): Likewise.
+ 	* config/rs6000/rs6000.cc (print_operand): Print DMR register
+ 	numbers if dense math option enabled.
+ 
+ 2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Peter Bergner  <bergner@linux.ibm.com>
+ 		    Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 		    Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (MAX_MMA_OPERANDS): Increase from 7 to 9.
+ 	(UNSPEC_DMF_DMXOR): New unspec.
+ 	(UNSPEC_DMF_DMXVI8GERX4): Likewise.
+ 	(UNSPEC_DMF_DMXVI8GERX4PP): Likewise.
+ 	(UNSPEC_DMF_PMDMXVI8GERX4): Likewise.
+ 	(UNSPEC_DMF_PMDMXVI8GERX4PP): Likewise.
+ 	(UNSPEC_DMF_DMSETDMRZ): Likewise.
+ 	(DMF_PV): New iterator.
+ 	(DMF_DPV): Likewise.
+ 	(DMF_PVI8I4I4): Likewise.
+ 	(DMF_DPVI8I4I4): Likewise.
+ 	(pv): Add DMF mappings.
+ 	(apv): Likewise.
+ 	(pvi8i4i4): New attribute.
+ 	(dpvi8i4i4): Likewise.
+ 	(dmf_build_dmr): New define_expand.
+ 	(dmf_dmsetdmrz): New insn.
+ 	(dmf_dmxor): Likewise.
+ 	(dmf_<pv>): New insn pattern.
+ 	(dmf_<apv>): Likewise.
+ 	(dmf_<pvi8i4i4>): Likewise.
+ 	(dmf_<dpvi8i4i4>): Likewise.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Add
+ 	DMF builtin support. Handle DMR pass-by-reference semantics.
+ 	Support up to nine builtin operands.
+ 	(mma_expand_builtin): Likewise.
+ 	(rs6000_expand_builtin): Handle DMF builtins.
+ 	* config/rs6000/rs6000-builtins.def: Add DMF and MMA+ builtin
+ 	definitions.
+ 	* doc/extend.texi
+ 	(PowerPC Matrix-Multiply Assist Built-in Functions): Document
+ 	MMA+ builtins.
+ 	(PowerPC Dense Math Facility Built-in Functions): Document DMF builtins.
+ 
+ 2026-07-24  Manjunath S Matti  <mmatti@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Manjunath Matti  <mmatti@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.h (RS6000_BTI_dmr1024): New enumerator.
+ 	(RS6000_BTI_ptr_dmr1024): New enumerator.
+ 	(dmr1024_type_node): New macro.
+ 	(ptr_dmr1024_type_node): New macro.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Handle
+ 	dmr1024_type_node.
+ 	(rs6000_init_builtins): Register the __dmr1024 opaque type and
+ 	its pointer-to-const variant, with 512-bit alignment.
+ 	* config/rs6000/rs6000.cc (rs6000_mangle_type): Handle
+ 	dmr1024_type_node.
+ 	(rs6000_invalid_conversion): Reject conversions to/from TDOmode.
+ 	(rs6000_opaque_type_invalid_use_p): Gate __vector_quad and
+ 	__vector_pair on TARGET_MMA and __dmr1024 on TARGET_DMF
+ 	independently, and require -mdense-math for __dmr1024.
+ 
+ 2026-07-24  Vijay Shankar  <vijay@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Vijay Shankar  <vijay@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (*movxo): renamed to movxo_nodmf
+ 	(*movxo_nodmf): updated contraint to use wD and add !TARGET_DMF
+ 	(*movxo_dmf): New pattern to handle dmf insert/extract from vsx
+ 
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 		    Peter Bergner  <bergner@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (UNSPEC_DMR_RELOAD_FROM_MEMORY): New unspec.
+ 	(UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise.
+ 	(reload_tdo_load): New define_insn_and_split.
+ 	(reload_tdo_store): Likewise.
+ 	* config/rs6000/rs6000.cc (rs6000_init_hard_regno_mode_ok): Set
+ 	reload_load and reload_store for TDOmode when TARGET_DMF.
+ 
+ 2026-07-24  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (UNSPEC_DMF_EXTRACT512): New unspec.
+ 	(dm_extract512): New insn.
+ 	(movtdo): New expander.
+ 	(*movtdo): New insn_and_split to support TDOmode moves between
+ 	memory, VSX registers, and Dense Math Registers.
+ 	* config/rs6000/rs6000.cc (rs6000_emit_move): Diagnose constant
+ 	assignments to TDOmode objects.
+ 	(rs6000_split_multireg_move): Handle TDOmode when splitting
+ 	multi-register moves.
+ 
+ 2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* config/rs6000/mma.md (UNSPEC_DMF_INSERT512): New unspec.
+ 	(UNSPEC_DMF_INSERT1024): Likewise.
+ 	(movoo): Enable for TARGET_DMF.
+ 	(*movoo): Likewise.
+ 	(vsx_assemble_pair): Likewise.
+ 	(*vsx_assemble_pair): Likewise.
+ 	(vsx_disassemble_pair): Likewise.
+ 	(*vsx_disassemble_pair): Likewise.
+ 	(dm_insert512): New insn.
+ 	(dm_insert1024): Likewise.
+ 	(mma_assemble_acc): Use accumulator_operand.
+ 	Build accumulators via DMR insert operations when TARGET_DMF.
+ 	(*mma_assemble_acc): Use accumulator_operand.
+ 	(mma_<acc>): New define_expand treating xxmtacc/xxmfacc as no-ops
+ 	for TARGET_DMF.
+ 	(*mma_<acc>): Restrict to !TARGET_DMF and use accumulator_operand.
+ 	(mma_disassemble_acc): Use accumulator_operand.
+ 	* config/rs6000/predicates.md (dmr_register_operand): New predicate.
+ 	(gpc_reg_operand): Accept DMR registers.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): Do
+ 	not emit xxmfacc for DISASSEMBLE_ACC when TARGET_DMF.
+ 	* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached): Allow
+ 	OOmode in VSX register pairs for TARGET_DMF.
+ 	(rs6000_split_multireg_move): Avoid emitting xxmtacc/xxmfacc when
+ 	TARGET_DMF.
+ 	* config/rs6000/rs6000.md (type): Add dmf type.
+ 	(isa): Add mma and dmf ISA attributes.
+ 	(enabled): Add mma and dmf enable conditions.
+ 
+ 2026-07-24  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	* config/rs6000/constraints.md
+ 	(rs6000_constraints[RS6000_CONSTRAINT_wD]): New wD constraint.
+ 	* config/rs6000/predicates.md (accumulator_operand): New predicate.
+ 	* config/rs6000/rs6000.cc (rs6000_debug_reg_global): Support wD
+ 	register class.
+ 	(rs6000_init_hard_regno_mode_ok): Map wD to FLOAT_REGS.
+ 	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wD constraint.
+ 	* doc/md.texi: Document the new constraint.
+ 
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Surya Kumari jangala  <jskumari@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.cc (enum rs6000_reg_type): Add DMR_REG_TYPE.
+ 	(enum rs6000_reload_reg_type): Add RELOAD_REG_DMR.
+ 	(LAST_RELOAD_REG_CLASS): Update to RELOAD_REG_DMR.
+ 	(reload_reg_map): Add DMR entry.
+ 	(rs6000_reg_names): Add DMR register names.
+ 	(alt_reg_names): Add alternate DMR register names.
+ 	(rs6000_hard_regno_nregs_internal): Handle DMR registers.
+ 	(rs6000_hard_regno_mode_ok_uncached): Add TDOmode and XOmode support for
+ 	DMR registers.
+ 	(rs6000_debug_reg_global): Add TDOmode to debug modes and print DMR
+ 	register range.
+ 	(rs6000_setup_reg_addr_masks): Handle RELOAD_REG_DMR.
+ 	Allow offset loads for TDOmode values.
+ 	(rs6000_init_hard_regno_mode_ok): Add DMR_REGS to reg_class_to_reg_type
+ 	mapping.
+ 	Update precalculation of CLASS_MAX_NREGS.
+ 	(rs6000_secondary_reload_memory): Handle DMR_REGS class.
+ 	(rs6000_secondary_reload_simple_move): Add DMR to VSX moves.
+ 	(rs6000_preferred_reload_class): Handle DMR_REGS.
+ 	(rs6000_modes_tieable_p): Exclude TDOmode from register tying.
+ 	(reg_offset_addressing_ok_p): Allow XOmode with TARGET_DMF.
+ 	Add TDOmode support with TARGET_DMF.
+ 	(rs6000_secondary_reload_class): Handle DMR_REGS reload routing.
+ 	(rs6000_dmr_register_move_cost): New helper.
+ 	(rs6000_register_move_cost): Handle DMR_REGS as source or destination.
+ 	(rs6000_memory_move_cost): Add DMR_REGS case routing cost through VSX.
+ 	(rs6000_compute_pressure_classes): Add DMR_REGS when TARGET_DMF.
+ 	(rs6000_debugger_regno): Add DMR register numbering.
+ 	* config/rs6000/rs6000.h (UNITS_PER_DMR_WORD): Define as 128.
+ 	(FIRST_PSEUDO_REGISTER): Increase from 111 to 119.
+ 	(FIXED_REGISTERS): Add 8 DMR registers as non-fixed.
+ 	(CALL_USED_REGISTERS): Mark all DMR registers as call-used.
+ 	(REG_ALLOC_ORDER): Add DMR registers to allocation order.
+ 	(DMR_REGNO_P): New macro.
+ 	(VECTOR_ALIGNMENT_P): Add TDOmode.
+ 	(enum reg_class): Add DMR_REGS entry.
+ 	(REG_CLASS_CONTENTS): Add DMR_REGS bitmask.
+ 	(REGISTER_NAMES): Add dmr0-dmr7 register names.
+ 	(ADDITIONAL_REGISTER_NAMES): Add dmr0-dmr7 mappings.
+ 	* config/rs6000/rs6000.md (FIRST_DMR_REGNO): Define as 111.
+ 	(LAST_DMR_REGNO): Define as 118.
+ 
+ 2026-07-24  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 		    Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000.cc (print_operand): Add the `%W`
+ 	print modifier to print the VSX register number plus two.
+ 
+ 2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-16  Peter Bergner  <bergner@linux.ibm.com>
+ 		    Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add
+ 	ENB_DM diagnostic.
+ 	(rs6000_builtin_is_supported): Handle ENB_DM.
+ 	* config/rs6000/rs6000-gen-builtins.cc: Update comments for new
+ 	Dense Math builtin attributes.
+ 	(bif_stanza): Add BSTZ_DM.
+ 	(stanza_map): Add "dm" stanza.
+ 	(enable_string): Add ENB_DM.
+ 	(basetype): Add BT_DMR.
+ 	(attrinfo): Add isdm, isdmint and isdmr fields.
+ 	(type_map): Add dmr1024 and ptr_dmr1024 type mappings.
+ 	(match_type): Recognize dmr1024 type.
+ 	(parse_bif_attrs): Parse dm, dmint and dmr attributes.
+ 	(complete_vector_type): Handle BT_DMR.
+ 	(write_decls): Emit ENB_DM and Dense Math builtin attribute bits
+ 	and predicates.
+ 	(write_bif_static_init): Initialize Dense Math builtin attributes
+ 	and associate dmint builtins with their internal variants.
+ 
+ 2026-07-24  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-13  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Handle
+ 	TDOmode and emit "Dense Math" diagnostics.
+ 	(rs6000_function_arg): Reject TDOmode function parameters and
+ 	emit "Dense Math" diagnostics.
+ 	* config/rs6000/rs6000-modes.def: Add TDOmode.
+ 
+ 2026-07-24  jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-11  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): Add OPTION_MASK_DMF.
+ 	(POWERPC_MASKS): Likewise.
+ 	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Enable
+ 	OPTION_MASK_DMF by default when TARGET_FUTURE is set and the
+ 	flag was not explicitly given; emit an error and clear the flag
+ 	when -mdense-math is requested on a non-future target.
+ 	(rs6000_opt_masks): Add "dense-math" entry for OPTION_MASK_DMF.
+ 	* config/rs6000/rs6000.opt (mdense-math): New option backed by Mask(DMF).
+ 	* doc/invoke.texi: Add -mdense-math.
+ 
+ 2026-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR middle-end/126341
+ 	* tree-outof-ssa.cc (split_overlapping_partition_decls): Preserve
+ 	DECL_IGNORED_P.  Check that the replacement uses memory.
+ 
+ 2026-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/123625
+ 	PR target/121957
+ 	* tree-outof-ssa.cc (split_overlapping_partition_decls): New function.
+ 	Use use_register_for_decl to identify memory partitions.
+ 	(remove_ssa_form): Call split_overlapping_partition_decls.
+ 
+ 2026-07-24  Boudewijn van der Heide  <boudewijn@delta-utec.com>
+ 
+ 	Backported from master:
+ 	2026-05-11  Boudewijn van der Heide  <boudewijn@delta-utec.com>
+ 
+ 	PR rtl-optimization/125209
+ 	* combine.cc (make_compound_operation_int): Return NULL_RTX if we got CLOBBER.
+ 
+ 2026-07-24  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	Backported from master:
+ 	2026-05-08  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	PR middle-end/124637
+ 	* calls.cc (load_register_parameters): If using store_constructor
+ 	to place a constant structure in a register, use a right shift to
+ 	align the structure/padding if required on big-endian targets.
+ 
+ 2026-07-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-07-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/126171
+ 	* tree-scalar-evolution.cc (scev_dfs::add_to_evolution):
+ 	Remove code argument.  Remove MINUS_EXPR handling here.
+ 	(scev_dfs::follow_ssa_edge_binary): Likewise.
+ 	(scev_dfs::follow_ssa_edge_expr): Handle MINUS_EXPR
+ 	separately here, promoting the whole operation to unsigned
+ 	instead of just the addend.
+ 
+ 2026-07-24  Cem Akgok  <cemakgok@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Cem Akgok  <cemakgok@gmail.com>
+ 
+ 	PR tree-optimization/126225
+ 	* tree-vect-loop.cc (vect_slp_induction_reuse_p): New function.
+ 	(vectorizable_induction): Validate SLP induction IV reuse.  Reuse
+ 	generated IVs cyclically when filling the SLP group.
+ 
+ 2026-07-24  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR tree-optimization/124663
+ 	* match.pd: Fold constant conditional selects.
+ 
+ 2026-07-23  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	* config/gcn/gcn-devices.def (gfx9-4-generic): Set sram-ecc
+ 	default to HSACO_ATTR_ANY.
+ 
+ 2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	Backported from master:
+ 	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	* config/bpf/bpf.cc (bpf_insn_cost): Return pattern_cost () by default.
+ 
+ 2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	Backported from master:
+ 	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	* config/bpf/bpf.cc (bpf_rtx_costs): set CONST_INT 0 insns.
+ 	* config/bpf/bpf.h (BPF_IMM32_P): New helper macro.
+ 	* config/bpf/predicates.md (imm32_operand): Use new macro.
+ 
+ 2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	Backported from master:
+ 	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	* config/bpf/bpf.cc (bpf_rtx_costs): Assign MPY/DIV/MOD cost 1.
+ 
+ 2026-07-21  Dhruv Chawla  <dhruvc@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-06-01  Dhruv Chawla  <dhruvc@nvidia.com>
+ 
+ 	* config/bpf/bpf.cc (bpf_asm_named_section): Fix typos.
+ 	* config/bpf/core-builtins.cc (remove_parser_plugin): Likewise.
+ 	(make_core_relo): Likewise.
+ 	(bpf_handle_plugin_finish_type): Likewise.
+ 	(bpf_output_core_reloc): Likewise.
+ 	(core_make_builtins): Likewise.
+ 
+ 2026-07-21  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-07-09  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/125207
+ 	* ipa-cp.cc (decide_about_value): Add detailed dumping about skipping
+ 	a value when there are no edges for it.  Make dumping about skipping
+ 	because of growth limit violation consistent with other cases.
+ 	(decide_whether_version_node): Only create all-context nodes for local
+ 	nodes, remove the logic doing it in other cases, allow cloning for
+ 	single constant lattices for non-local nodes.  Adjust dumping.
+ 
+ 2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_start_call_args): Extend
+ 	comment.
+ 
+ 2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_mode_confluence): Fix
+ 	comment typo.
+ 	* target.def (mode_switching): Fix incorrect variable names in
+ 	documentation.
+ 	* doc/tm.texi: Regenerate.
+ 
+ 2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	PR target/119210
+ 	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
+ 	Add PSTATE.ZA enablement, and zero it if already enabled.
+ 
+ 2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* config/aarch64/aarch64-sme.md (aarch64_sme_write_zt): Add
+ 	ZTO_REGNUM use and make unspec non-volatile.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/126261
+ 	* doc/sourcebuild.texi (can_deref_null): Document.
+ 
+ 2026-07-20  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-06-29  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/105116
+ 	* lra-constraints.cc (simplify_operand_subreg): Reload a
+ 	non-representable narrowing subreg of a hard register through
+ 	memory instead of resolving it lossily.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-13  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR driver/124058
+ 	* common.opt (Wuse-after-free): Make an alias for
+ 	-Wuse-after-free=1.
+ 	* doc/invoke.texi: Document alias.
+ 	* gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
+ 	Use OPT_Wuse_after_free_.
+ 	* gcc-diagnostic-spec.cc (nowarn_spec_t::nowarn_spec_t):
+ 	Likewise.
+ 
  2026-07-16  Jakub Jelinek  <jakub@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/gcc/DATESTAMP gcc-16-20260725/gcc/DATESTAMP
*** gcc-16-20260718/gcc/DATESTAMP	Sat Jul 18 22:32:05 2026
--- gcc-16-20260725/gcc/DATESTAMP	Sat Jul 25 22:32:05 2026
***************
*** 1 ****
! 20260718
--- 1 ----
! 20260725
diff -Nrcpad gcc-16-20260718/gcc/algol68/ChangeLog gcc-16-20260725/gcc/algol68/ChangeLog
*** gcc-16-20260718/gcc/algol68/ChangeLog	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/ChangeLog	Sat Jul 25 22:32:06 2026
***************
*** 1,3 ****
--- 1,292 ----
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-20  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	PR algol68/126330
+ 	* a68-low-chars.cc (a68_char_max): abscharmax is an int, not a
+ 	char.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-14  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* ga68-coding-guidelines.texi (Conditional clauses): Fix typo
+ 	if-parts -> else-parts.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-24  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-moids-sorting.cc (packs_ordering): Do not rely on pointer
+ 	comparison when comparing pack element names.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-24  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-imports.cc (complete_encoded_mode): Fix comment on ordering
+ 	of union packs entries.
+ 
+ 2026-07-21  Kanishka Solanki  <kanishkasolanki456s@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-06-22  Kanishka Solanki  <kanishkasolanki456s@gmail.com>
+ 
+ 	* a68-lang.cc (a68_get_alias_set): New function.
+ 	(LANG_HOOKS_GET_ALIAS_SET): Define to a68_get_alias_set.
+ 
+ 2026-07-21  Kanishka Solanki  <kanishkasolanki456s@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-06-19  Kanishka Solanki  <kanishkasolanki456s@gmail.com>
+ 
+ 	* a68-low-clauses.cc (a68_lower_collateral_clause): Do not check
+ 	for rows before calling a68_low_dup.
+ 	* a68-low-units.cc (collect_call_arguments): Likewise.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-16  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-imports.cc (a68_replace_equivalent_mode): Get a moif and
+ 	check extracts.
+ 	(a68_open_packet): Fix deduplication of in-moif modes and move
+ 	extract replacement code to a68_replace_equivalent_mode.
+ 	* a68-low-moids.cc (a68_lower_moids): Check that all known modes
+ 	have an associated ctype as part of the sanity checks.
+ 
+ 2026-07-21  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	Backported from master:
+ 	2026-06-16  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* README: Avoid redirect for web link to Algol 68 Jargon File.
+ 	* ga68-coding-guidelines.texi (Top): Ditto.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-15  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-taxes.cc (attr_descr): New function.
+ 	(already_declared): Use attr_descr for diagnostic.
+ 	(already_declared_hidden): Likewise.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-15  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-imports.cc (INCLUDE_VECTOR): Define.
+ 	(a68_open_packet): Deduplicate within-moif modes while importing.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-15  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-extract.cc (a68_extract_indicants): Set PUBLICIZED in
+ 	the new tags for mode indicants.
+ 	* a68-parser.cc (a68_new_tag): Initialize PUBLICIZED to false.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-14  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-brackets.cc (INCLUDE_STRING): Define.
+ 	Do not include <string.
+ 	* a68-parser-bottom-up.cc (INCLUDE_STRING): Define.
+ 	Do not include <string>.
+ 	* a68-moids-diagnostics.cc (INCLUDE_STRING): Define.
+ 	Do not include <string>.
+ 	* a68-imports.cc (INCLUDE_STRING): Define.
+ 	Do not include <string>.
+ 	* a68-imports-archive.cc (INCLUDE_MAP): Define.
+ 	(INCLUDE_STRING): Likewise.
+ 	Do not include <string> nor <map>.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-14  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-imports.cc (struct encoded_mode): Type of flex.sub_offset
+ 	shall be uint64_t.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-14  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-brackets.cc (bracket_check_error): Escape %< and
+ 	%> in call to printf.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-brackets.cc: Include <string>.
+ 	(bracket_check_error): Get additional argument `item'.
+ 	(bracket_check_diagnose): Likewise.
+ 	(bracket_check_parse): Fix call to a68_error passing the `item'.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-low.cc (a68_demangle_symbol): Fix typo, 'p' is the mangling
+ 	of '%', not of '+'.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-low-generator.cc (a68_low_generator): Wrap the resulting
+ 	stmt_list into a nop_expr.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-low-clauses.cc (a68_lower_collateral_clause): Check that
+ 	a68_lower_tree on the units list return NULL_TREE.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-low-units.cc (a68_lower_formula): Consolidate operands of
+ 	formula before call.
+ 	(a68_lower_monadic_formula): Likewise.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-08  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-pretty-print.h (a68_attr_format_token): Get diagnostic
+ 	string from a68_attribute_name.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-03  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* ga68.texi (Worthy characters): Remove spurious @ entry in the
+ 	list of worthy characters.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-03  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* ga68.vw (Modes and nests): Incorporate syntax from the RR
+ 	chapter 7.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-03  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-bottom-up.cc (recover_from_error): Use the output of
+ 	a68_phrase_to_text as format string so format tags are honored.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-02  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-modes.cc (WELL): Define.
+ 	(NO_YIN): Likewise.
+ 	(NO_YANG): Likewise.
+ 	(UNWELL): Likewise.
+ 	(is_well_formed): Discriminate reason for the given mode to not be
+ 	well formed.
+ 	(a68_make_moid_list): Emit note explaining why a mode is not well
+ 	formed.
+ 
+ 2026-07-21  Dhruv Chawla  <dhruvc@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-05-30  Dhruv Chawla  <dhruvc@nvidia.com>
+ 
+ 	* a68-imports-archive.cc (struct Archive_fl_header): Fix typos.
+ 	* a68-imports.cc (encoded_mode_free): Likewise.
+ 	* a68-low-chars.cc (a68_char_repr): Likewise.
+ 	* a68-low-clauses.cc (a68_lower_label): Likewise.
+ 	(a68_lower_labeled_unit): Likewise.
+ 	(a68_lower_completer): Likewise.
+ 	(a68_lower_initialiser_series): Likewise.
+ 	(a68_lower_case_clause): Likewise.
+ 	* a68-low-decls.cc (a68_lower_variable_declaration): Likewise.
+ 	(a68_lower_procedure_variable_declaration): Likewise.
+ 	* a68-low-ints.cc (a68_get_int_skip_tree): Likewise.
+ 	(a68_int_maxval): Likewise.
+ 	* a68-low-moids.cc (lower_struct_mode): Likewise.
+ 	* a68-low-multiples.cc (a68_multiple_single_bound_check): Likewise.
+ 	* a68-low-prelude.cc (a68_lower_divab3): Likewise.
+ 	(a68_lower_upb3): Likewise.
+ 	(a68_lower_lwb3): Likewise.
+ 	* a68-low-procs.cc (a68_get_proc_skip_tree): Likewise.
+ 	* a68-low-reals.cc (a68_real_maxval): Likewise.
+ 	(a68_real_minval): Likewise.
+ 	* a68-low-units.cc (a68_lower_identifier): Likewise.
+ 	* a68-low.cc (a68_low_assignation): Likewise.
+ 	* a68-moids-misc.cc (a68_is_firm): Likewise.
+ 	(a68_is_coercible_series): Likewise.
+ 	* a68-parser-bottom-up.cc (strange_separator): Likewise.
+ 	(a68_bottom_up_parser): Likewise.
+ 	* a68-parser-prelude.cc (stand_prelude): Likewise.
+ 	* a68-parser-scanner.cc (a68_lexical_analyser): Likewise.
+ 	* a68-parser-scope.cc (a68_scope_checker): Likewise.
+ 	* a68-parser-serial-dsa.cc (serial_dsa_check_serial_clause): Likewise.
+ 	* a68-parser-taxes.cc (test_firmly_related_ops_local): Likewise.
+ 	* a68-parser.cc: Likewise.
+ 	* a68-types.h (struct KEYWORD_T): Likewise.
+ 	(struct OPTIONS_T): Likewise.
+ 	(struct NODE_T): Likewise.
+ 	(struct MODE_CACHE_T): Likewise.
+ 	* ga68-coding-guidelines.texi: Likewise.
+ 	* ga68.texi: Likewise.
+ 
+ 2026-07-21  Peter Damianov  <peter0x44@disroot.org>
+ 
+ 	Backported from master:
+ 	2026-05-24  Peter Damianov  <peter0x44@disroot.org>
+ 
+ 	* a68-lang.cc (a68_handle_option): Open file in binary mode.
+ 	* a68-parser-scanner.cc (read_source_file): Open file in binary mode.
+ 	(include_files): Likewise.
+ 
+ 2026-07-21  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	Backported from master:
+ 	2026-05-20  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* a68-parser-prelude.cc (gnu_prelude): Map FLOOR(L real):L int
+ 	to ENTIER(L real):L int.
+ 	* ga68.texi: Add a section for real operators in the Extended
+ 	prelude chapter and document FLOOR.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-05-10  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* a68-parser-taxes.cc (is_mappable_routine): Remove handling of
+ 	non-implemented math functions.
+ 
  2026-07-16  Pietro Monteiro  <pietro@sociotechnical.xyz>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/gcc/algol68/README gcc-16-20260725/gcc/algol68/README
*** gcc-16-20260718/gcc/algol68/README	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/README	Sat Jul 25 22:32:06 2026
*************** Useful Resources
*** 118,124 ****
    indentation, pretty-printing of bold tags, an auto-stropping minor
    mode and other features.
  
! - The Algol 68 Jargon File at https://jemarch.net/a68-jargon provides
    a comprehensive list of definitions of many of the technical and
    non-technical terms used in the context of Algol 68.
  
--- 118,124 ----
    indentation, pretty-printing of bold tags, an auto-stropping minor
    mode and other features.
  
! - The Algol 68 Jargon File at https://jemarch.net/a68-jargon/ provides
    a comprehensive list of definitions of many of the technical and
    non-technical terms used in the context of Algol 68.
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-imports-archive.cc gcc-16-20260725/gcc/algol68/a68-imports-archive.cc
*** gcc-16-20260718/gcc/algol68/a68-imports-archive.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-imports-archive.cc	Sat Jul 25 22:32:06 2026
***************
*** 19,32 ****
     <http://www.gnu.org/licenses/>.  */
  
  #define INCLUDE_MEMORY
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
  #include "vec.h"
  
- #include <map>
- #include <string>
- 
  #include "a68.h"
  
  
--- 19,31 ----
     <http://www.gnu.org/licenses/>.  */
  
  #define INCLUDE_MEMORY
+ #define INCLUDE_MAP
+ #define INCLUDE_STRING
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
  #include "vec.h"
  
  #include "a68.h"
  
  
*************** struct Archive_fl_header
*** 74,80 ****
  };
  
  // The header of an entry in an archive.  This is all readable text,
! // padded with spaces where necesary.
  
  struct Archive_header
  {
--- 73,79 ----
  };
  
  // The header of an entry in an archive.  This is all readable text,
! // padded with spaces where necessary.
  
  struct Archive_header
  {
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-imports.cc gcc-16-20260725/gcc/algol68/a68-imports.cc
*** gcc-16-20260718/gcc/algol68/a68-imports.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-imports.cc	Sat Jul 25 22:32:06 2026
***************
*** 28,33 ****
--- 28,35 ----
     <http://www.gnu.org/licenses/>.  */
  
  #define INCLUDE_MEMORY
+ #define INCLUDE_STRING
+ #define INCLUDE_VECTOR
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 41,48 ****
  #include "common/common-target.h"
  #include "dwarf2asm.h"
  
- #include <string>
- 
  #include "a68.h"
  
  /* A few macros to aid parsing of module map strings below.  */
--- 43,48 ----
***************
*** 79,85 ****
      } while (0)
  
  /* Parse module map information in MAP and add entries to A68_MODULE_FILES
!    accordingly.  Existing entries in the map are overriden without warning.
  
     If MAP is not a valid module map specification then this function returns
     `false' and sets *ERRMSG to some explanatory message.  Otherwise it returns
--- 79,85 ----
      } while (0)
  
  /* Parse module map information in MAP and add entries to A68_MODULE_FILES
!    accordingly.  Existing entries in the map are overridden without warning.
  
     If MAP is not a valid module map specification then this function returns
     `false' and sets *ERRMSG to some explanatory message.  Otherwise it returns
*************** struct encoded_mode
*** 650,656 ****
  
      struct
      {
!       uint8_t sub_offset;
      } flex;
  
      struct
--- 650,656 ----
  
      struct
      {
!       uint64_t sub_offset;
      } flex;
  
      struct
*************** encoded_mode_free (struct encoded_mode *
*** 694,700 ****
        break;
      case GA68_MODE_STRUCT:
        /* Note that the field names are installed in moids in
! 	 encoded_mode_to_moid, so we shoud not free them.  */
        free (em->data.sct.fields);
        break;
      case GA68_MODE_UNION:
--- 694,700 ----
        break;
      case GA68_MODE_STRUCT:
        /* Note that the field names are installed in moids in
! 	 encoded_mode_to_moid, so we should not free them.  */
        free (em->data.sct.fields);
        break;
      case GA68_MODE_UNION:
*************** complete_encoded_mode (encoded_modes_map
*** 846,853 ****
        pack = NO_PACK;
        for (uint8_t i = 0; i < em->data.union_.nmodes; i++)
  	{
! 	  /* Union alternatives are internally stored in reverse order in the
! 	     pack.  */
  	  uint16_t index = i;
  	  MOID_T *united_moid = complete_encoded_mode (encoded_modes,
  						       em->data.union_.modes[index]);
--- 846,852 ----
        pack = NO_PACK;
        for (uint8_t i = 0; i < em->data.union_.nmodes; i++)
  	{
! 	  /* The order of union alternatives is irrelevant.  */
  	  uint16_t index = i;
  	  MOID_T *united_moid = complete_encoded_mode (encoded_modes,
  						       em->data.union_.modes[index]);
*************** a68_replace_submode (MOID_T *t, MOID_T *
*** 986,994 ****
     The entry for M in MODES_LIST is set to NO_MOID.  */
  
  static void
! a68_replace_equivalent_mode (vec<MOID_T*,va_gc> *mode_list,
  			     MOID_T *m, MOID_T *r)
  {
    for (size_t i = 0; i < mode_list->length (); ++i)
      {
        if ((*mode_list)[i] == m)
--- 985,995 ----
     The entry for M in MODES_LIST is set to NO_MOID.  */
  
  static void
! a68_replace_equivalent_mode (MOIF_T *moif,
  			     MOID_T *m, MOID_T *r)
  {
+   /* Handle the mode to be replaced.  */
+   vec<MOID_T*,va_gc> *mode_list = MODES (moif);
    for (size_t i = 0; i < mode_list->length (); ++i)
      {
        if ((*mode_list)[i] == m)
*************** a68_replace_equivalent_mode (vec<MOID_T*
*** 996,1001 ****
--- 997,1021 ----
        else if ((*mode_list)[i] != NO_MOID)
  	a68_replace_submode ((*mode_list)[i], m, r);
      }
+ 
+   /* Update extracts to reflect the replacement.  */
+   for (EXTRACT_T *e : INDICANTS (moif))
+     {
+       if (EXTRACT_MODE (e) == m)
+ 	EXTRACT_MODE (e) = r;
+     }
+ 
+   for (EXTRACT_T *e : IDENTIFIERS (moif))
+     {
+       if (EXTRACT_MODE (e) == m)
+ 	EXTRACT_MODE (e) = r;
+     }
+ 
+   for (EXTRACT_T *e : OPERATORS (moif))
+     {
+       if (EXTRACT_MODE (e) == m)
+ 	EXTRACT_MODE (e) = r;
+     }
  }
  
  /* Decode a modes table at DATA + POS.  */
*************** a68_open_packet (const char *module, con
*** 1471,1507 ****
      }
  
    /* If we got a moif, we need to make sure that it doesn't introduce new modes
!      that are equivalent to any mode in the compiler's mode list.  If it does,
!      we replace the mode everywhere in the moif.  */
  
    if (moif != NO_MOIF)
      {
        for (MOID_T *m : MODES (moif))
  	{
  	  MOID_T *r = a68_search_equivalent_mode (m);
! 	  if (r != NO_MOID)
  	    {
! 	      a68_replace_equivalent_mode (MODES (moif), m, r);
! 
! 	      /* Update extracts to reflect the replacement.  */
! 	      for (EXTRACT_T *e : INDICANTS (moif))
! 		{
! 		  if (EXTRACT_MODE (e) == m)
! 		    EXTRACT_MODE (e) = r;
! 		}
! 
! 	      for (EXTRACT_T *e : IDENTIFIERS (moif))
! 		{
! 		  if (EXTRACT_MODE (e) == m)
! 		    EXTRACT_MODE (e) = r;
! 		}
! 
! 	      for (EXTRACT_T *e : OPERATORS (moif))
  		{
! 		  if (EXTRACT_MODE (e) == m)
! 		    EXTRACT_MODE (e) = r;
  		}
  	    }
  	}
      }
  
--- 1491,1523 ----
      }
  
    /* If we got a moif, we need to make sure that it doesn't introduce new modes
!      that are equivalent to any mode in the compiler's mode list, nor modes
!      that are equivalent to other modes introduced in this same moif.  If it
!      does, we replace the mode everywhere in the moif. */
  
    if (moif != NO_MOIF)
      {
+       std::vector<MOID_T *> known_moids;
+ 
        for (MOID_T *m : MODES (moif))
  	{
  	  MOID_T *r = a68_search_equivalent_mode (m);
! 	  if (r == NO_MOID)
  	    {
! 	      for (size_t i = 0; i < known_moids.size (); ++i)
  		{
! 		  if (a68_prove_moid_equivalence (m, known_moids[i]))
! 		    {
! 		      r = known_moids[i];
! 		      break;
! 		    }
  		}
  	    }
+ 
+ 	  if (r == NO_MOID)
+ 	    known_moids.push_back (m);
+ 	  else if (r != m)
+ 	    a68_replace_equivalent_mode (moif, m, r);
  	}
      }
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-lang.cc gcc-16-20260725/gcc/algol68/a68-lang.cc
*** gcc-16-20260718/gcc/algol68/a68-lang.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-lang.cc	Sat Jul 25 22:32:06 2026
*************** a68_handle_option (size_t scode,
*** 538,544 ****
      case OPT_fmodules_map_file:
      case OPT_fmodules_map_file_:
        {
! 	FILE *file = fopen (arg, "r");
  	if (file == NULL)
  	  fatal_error (UNKNOWN_LOCATION,
  		       "cannot open modules map file %<%s%>", arg);
--- 538,544 ----
      case OPT_fmodules_map_file:
      case OPT_fmodules_map_file_:
        {
! 	FILE *file = fopen (arg, "rb");
  	if (file == NULL)
  	  fatal_error (UNKNOWN_LOCATION,
  		       "cannot open modules map file %<%s%>", arg);
*************** a68_types_compatible_p (tree x, tree y)
*** 786,791 ****
--- 786,804 ----
  #undef LANG_HOOKS_TYPES_COMPATIBLE_P
  #define LANG_HOOKS_TYPES_COMPATIBLE_P a68_types_compatible_p
  
+ /* Implements the lang_hooks.get_alias_set routine for Algol 68.  */
+ 
+ static alias_set_type
+ a68_get_alias_set (tree)
+ {
+   /* For now in Algol 68, assume everything aliases everything else,
+      until aliasing rules are defined more precisely.  */
+   return 0;
+ }
+ 
+ #undef LANG_HOOKS_GET_ALIAS_SET
+ #define LANG_HOOKS_GET_ALIAS_SET a68_get_alias_set
+ 
  /* Get a value for the SARIF v2.1.0 "artifact.sourceLanguage" property.  Algol
     68 is not yet listed in SARIF v2.1.0 Appendix J, but if/when it does, it
     will likely use this string.  */
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-chars.cc gcc-16-20260725/gcc/algol68/a68-low-chars.cc
*** gcc-16-20260718/gcc/algol68/a68-low-chars.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-chars.cc	Sat Jul 25 22:32:06 2026
*************** tree
*** 55,61 ****
  a68_char_max (void)
  {
    /* 0x10FFFF is the maximum valid code point in Unicode.  */
!   return build_int_cst (a68_char_type, 0x10FFFF);
  }
  
  /* Given an integral value, if it denotes a char code build the corresponding
--- 55,61 ----
  a68_char_max (void)
  {
    /* 0x10FFFF is the maximum valid code point in Unicode.  */
!   return build_int_cst (a68_int_type, 0x10FFFF);
  }
  
  /* Given an integral value, if it denotes a char code build the corresponding
*************** a68_char_repr (NODE_T *p, tree val)
*** 107,113 ****
  		      fold_convert (a68_char_type, c));
  }
  
! /* the ABS of a CHAR is an INT containing an unique value for each permissable
     char value.  */
  
  tree
--- 107,113 ----
  		      fold_convert (a68_char_type, c));
  }
  
! /* the ABS of a CHAR is an INT containing an unique value for each permissible
     char value.  */
  
  tree
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-clauses.cc gcc-16-20260725/gcc/algol68/a68-low-clauses.cc
*** gcc-16-20260718/gcc/algol68/a68-low-clauses.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-clauses.cc	Sat Jul 25 22:32:06 2026
*************** a68_lower_label (NODE_T *p, LOW_CTX_T ct
*** 107,113 ****
  
    a68_add_decl (label_decl);
  
!   /* Return the accummulated LABEL_EXPRs.  */
    tree label_expr = build1 (LABEL_EXPR, void_type_node, label_decl);
    if (expr)
      return fold_build2_loc (a68_get_node_location (p),
--- 107,113 ----
  
    a68_add_decl (label_decl);
  
!   /* Return the accumulated LABEL_EXPRs.  */
    tree label_expr = build1 (LABEL_EXPR, void_type_node, label_decl);
    if (expr)
      return fold_build2_loc (a68_get_node_location (p),
*************** a68_lower_labeled_unit (NODE_T *p, LOW_C
*** 147,153 ****
     that a completer can only appear inside a serial clause.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to travese on these nodes explicitly and ignore the returned
     value.  */
  
  tree
--- 147,153 ----
     that a completer can only appear inside a serial clause.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to traverse on these nodes explicitly and ignore the returned
     value.  */
  
  tree
*************** a68_lower_completer (NODE_T *p ATTRIBUTE
*** 173,179 ****
     BLOCK.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to travese on these nodes explicitly and ignore the returned
     value.  */
  
  tree
--- 173,179 ----
     BLOCK.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to traverse on these nodes explicitly and ignore the returned
     value.  */
  
  tree
*************** a68_lower_initialiser_series (NODE_T *p,
*** 205,211 ****
     See the function body to see the lowering actions.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to travese on these nodes explicitly and ignore the returned
     value.  */
  
  tree
--- 205,211 ----
     See the function body to see the lowering actions.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to traverse on these nodes explicitly and ignore the returned
     value.  */
  
  tree
*************** a68_lower_case_clause (NODE_T *p ATTRIBU
*** 858,864 ****
     clause.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to travese on these nodes explicitly and ignore the returned
     value.  */
  
  tree
--- 858,864 ----
     clause.
  
     This function always returns NULL_TREE, so the traversing code shall always
!    be careful to traverse on these nodes explicitly and ignore the returned
     value.  */
  
  tree
*************** a68_lower_collateral_clause (NODE_T *p A
*** 1072,1078 ****
    /* Lower the constituent units into a statements list.  */
    a68_push_stmt_list (mode);
    if (!clause_is_empty)
!     (void) a68_lower_tree (NEXT (SUB (p)), ctx);
    tree units = a68_pop_stmt_list ();
  
    /* The collateral clause lowers to different constructions depending on its
--- 1072,1083 ----
    /* Lower the constituent units into a statements list.  */
    a68_push_stmt_list (mode);
    if (!clause_is_empty)
!     {
!       if (a68_lower_tree (NEXT (SUB (p)), ctx) != NULL_TREE)
! 	/* unit lists always lower to NULL_TREE and, as a side-effect,
! 	   append the units to the current statements list.  */
! 	gcc_unreachable ();
!     }
    tree units = a68_pop_stmt_list ();
  
    /* The collateral clause lowers to different constructions depending on its
*************** a68_lower_collateral_clause (NODE_T *p A
*** 1132,1139 ****
  	  for (tree_stmt_iterator si = tsi_start (units); !tsi_end_p (si); tsi_next (&si))
  	    {
  	      tree unit = tsi_stmt (si);
! 	      if (A68_TYPE_HAS_ROWS_P (TREE_TYPE (unit)))
! 		unit = a68_low_dup (unit);
  	      CONSTRUCTOR_APPEND_ELT (ve, size_int (num_units), unit);
  	      num_units += 1;
  	    }
--- 1137,1143 ----
  	  for (tree_stmt_iterator si = tsi_start (units); !tsi_end_p (si); tsi_next (&si))
  	    {
  	      tree unit = tsi_stmt (si);
! 	      unit = a68_low_dup (unit);
  	      CONSTRUCTOR_APPEND_ELT (ve, size_int (num_units), unit);
  	      num_units += 1;
  	    }
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-decls.cc gcc-16-20260725/gcc/algol68/a68-low-decls.cc
*** gcc-16-20260718/gcc/algol68/a68-low-decls.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-decls.cc	Sat Jul 25 22:32:06 2026
*************** a68_lower_variable_declaration (NODE_T *
*** 164,170 ****
  	{
  	  /* The qualifier determines what kind of generator is used in the
  	     variable declaration.  This is already annotated in the tax entry
! 	     for the definining identifier.  */
  	  declarer = NEXT (q);
  	  defining_identifier = NEXT (NEXT (q));
  	}
--- 164,170 ----
  	{
  	  /* The qualifier determines what kind of generator is used in the
  	     variable declaration.  This is already annotated in the tax entry
! 	     for the defining identifier.  */
  	  declarer = NEXT (q);
  	  defining_identifier = NEXT (NEXT (q));
  	}
*************** a68_lower_procedure_variable_declaration
*** 576,582 ****
        else if (IS (q, QUALIFIER))
  	/* The qualifier determines what kind of generator is used in the
  	   variable declaration.  This is already annotated in the tax entry
! 	   for the definining identifier.  */
  	defining_identifier = NEXT (NEXT (q));
        else
  	gcc_unreachable ();
--- 576,582 ----
        else if (IS (q, QUALIFIER))
  	/* The qualifier determines what kind of generator is used in the
  	   variable declaration.  This is already annotated in the tax entry
! 	   for the defining identifier.  */
  	defining_identifier = NEXT (NEXT (q));
        else
  	gcc_unreachable ();
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-generator.cc gcc-16-20260725/gcc/algol68/a68-low-generator.cc
*** gcc-16-20260718/gcc/algol68/a68-low-generator.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-generator.cc	Sat Jul 25 22:32:06 2026
*************** a68_low_generator (NODE_T *declarer,
*** 509,514 ****
--- 509,517 ----
        tree_stmt_iterator bounds_iter = tsi_start (bounds);
        tree gen = gen_mode (mode, &bounds_iter,
  			   heap ? a68_lower_malloc : a68_lower_alloca);
+       /* XXX ugly hack to avoid the resulting stmt_list to be coalesced
+ 	 on the current stmt_list in a68_lower_unit_list.  */
+       gen = build1 (NOP_EXPR, TREE_TYPE (gen), gen);
        return gen;
      }
  }
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-ints.cc gcc-16-20260725/gcc/algol68/a68-low-ints.cc
*** gcc-16-20260718/gcc/algol68/a68-low-ints.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-ints.cc	Sat Jul 25 22:32:06 2026
*************** a68_get_int_skip_tree (MOID_T *m)
*** 65,71 ****
    return build_int_cst (type, 0);
  }
  
! /* Given an integral type, build the maximum value expressable in that
     type.  */
  
  tree
--- 65,71 ----
    return build_int_cst (type, 0);
  }
  
! /* Given an integral type, build the maximum value expressible in that
     type.  */
  
  tree
*************** a68_int_maxval (tree type)
*** 74,80 ****
    return fold_convert (type, TYPE_MAX_VALUE (type));
  }
  
! /* Given an integral type, build the minimum value expressable in that
     type.  */
  
  tree
--- 74,80 ----
    return fold_convert (type, TYPE_MAX_VALUE (type));
  }
  
! /* Given an integral type, build the minimum value expressible in that
     type.  */
  
  tree
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-moids.cc gcc-16-20260725/gcc/algol68/a68-low-moids.cc
*** gcc-16-20260718/gcc/algol68/a68-low-moids.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-moids.cc	Sat Jul 25 22:32:06 2026
*************** lower_struct_mode (MOID_T *m)
*** 275,281 ****
    TYPE_FIELDS (struct_type) = NULL_TREE;
    TYPE_CXX_ODR_P (struct_type) = 0;
    CTYPE (m) = struct_type;
!   TYPE_LANG_SPECIFIC (struct_type) = a68_build_lang_type (m); /* XXX this will get overrided. */
  
    /* Add field declarations.  */
    chain_struct_fields (PACK (m), struct_type);
--- 275,281 ----
    TYPE_FIELDS (struct_type) = NULL_TREE;
    TYPE_CXX_ODR_P (struct_type) = 0;
    CTYPE (m) = struct_type;
!   TYPE_LANG_SPECIFIC (struct_type) = a68_build_lang_type (m); /* XXX this will get overridden. */
  
    /* Add field declarations.  */
    chain_struct_fields (PACK (m), struct_type);
*************** a68_lower_moids (MOID_T *mode)
*** 723,728 ****
--- 723,729 ----
    /* Sanity check.  */
    for (MOID_T *m = mode; m != NO_MOID; FORWARD (m))
      {
+       gcc_assert (CTYPE (m) != NULL_TREE);
        gcc_assert (COMPLETE_TYPE_P (CTYPE (m)));
        if (IS_UNION (m))
  	{
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-multiples.cc gcc-16-20260725/gcc/algol68/a68-low-multiples.cc
*** gcc-16-20260718/gcc/algol68/a68-low-multiples.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-multiples.cc	Sat Jul 25 22:32:06 2026
***************
*** 64,70 ****
     There is a triplet per dimension in the multiple.  The number of dimensions
     in a row mode is static and is determined at compile-time.
  
!    The infomation stored for each triplet is:
  
       lb%     is the lower bound of the dimension.
       ub%     is the upper bound of the dimension.
--- 64,70 ----
     There is a triplet per dimension in the multiple.  The number of dimensions
     in a row mode is static and is determined at compile-time.
  
!    The information stored for each triplet is:
  
       lb%     is the lower bound of the dimension.
       ub%     is the upper bound of the dimension.
*************** a68_multiple_single_bound_check (NODE_T
*** 882,888 ****
  
  /* Return a tree that checks whether the given DIM is a valid dimension/rank of
     a boundable object with dimension BOUNDABLE_DIM.  If the provided DIM is not
!    a valid dimention then a call to the run-time function ARRAYDIM is
     performed.
  
     BOUNDABLE_DIM and DIM must be of type sizetype.  They are both one-based.
--- 882,888 ----
  
  /* Return a tree that checks whether the given DIM is a valid dimension/rank of
     a boundable object with dimension BOUNDABLE_DIM.  If the provided DIM is not
!    a valid dimension then a call to the run-time function ARRAYDIM is
     performed.
  
     BOUNDABLE_DIM and DIM must be of type sizetype.  They are both one-based.
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-prelude.cc gcc-16-20260725/gcc/algol68/a68-low-prelude.cc
*** gcc-16-20260718/gcc/algol68/a68-low-prelude.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-prelude.cc	Sat Jul 25 22:32:06 2026
*************** a68_lower_divab3 (NODE_T *p, LOW_CTX_T c
*** 580,586 ****
  /* UPB comes in two flavors.
  
     The unary operator returns the upper bound of the first dimension of the
!    operand multple.
  
     The binary operator returns the upper bound of the given dimension of the
     operand multiple.  The dimension is one-based.  If the specified dimension
--- 580,586 ----
  /* UPB comes in two flavors.
  
     The unary operator returns the upper bound of the first dimension of the
!    operand multiple.
  
     The binary operator returns the upper bound of the given dimension of the
     operand multiple.  The dimension is one-based.  If the specified dimension
*************** a68_lower_upb3 (NODE_T *p, LOW_CTX_T ctx
*** 630,636 ****
  /* LWB comes in two flavors.
  
     The unary operator returns the lower bound of the first dimension of the
!    operand multple.
  
     The binary operator returns the lower bound of the given dimension of the
     operand multiple.  The dimension is one-based.  If the specified dimension
--- 630,636 ----
  /* LWB comes in two flavors.
  
     The unary operator returns the lower bound of the first dimension of the
!    operand multiple.
  
     The binary operator returns the lower bound of the given dimension of the
     operand multiple.  The dimension is one-based.  If the specified dimension
*************** a68_lower_lwb3 (NODE_T *p, LOW_CTX_T ctx
*** 681,687 ****
  /* ELEMS comes in two flavors.
  
     The unary operator returns the number of elements in the first dimension of
!    the operand multple.
  
     DIM must be a size.
  
--- 681,687 ----
  /* ELEMS comes in two flavors.
  
     The unary operator returns the number of elements in the first dimension of
!    the operand multiple.
  
     DIM must be a size.
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-procs.cc gcc-16-20260725/gcc/algol68/a68-low-procs.cc
*** gcc-16-20260718/gcc/algol68/a68-low-procs.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-procs.cc	Sat Jul 25 22:32:06 2026
***************
*** 47,52 ****
  tree
  a68_get_proc_skip_tree (MOID_T *m)
  {
!   /* A SKIP for a procecure mode lowers to a NULL pointer to a function.  */
    return build_int_cst (CTYPE (m), 0);
  }
--- 47,52 ----
  tree
  a68_get_proc_skip_tree (MOID_T *m)
  {
!   /* A SKIP for a procedure mode lowers to a NULL pointer to a function.  */
    return build_int_cst (CTYPE (m), 0);
  }
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-reals.cc gcc-16-20260725/gcc/algol68/a68-low-reals.cc
*** gcc-16-20260718/gcc/algol68/a68-low-reals.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-reals.cc	Sat Jul 25 22:32:06 2026
*************** a68_real_maxval (tree type)
*** 97,103 ****
    return build_real (type, max);
  }
  
! /* Given a real type, build the minimum value expressable with that type.  */
  
  tree
  a68_real_minval (tree type)
--- 97,103 ----
    return build_real (type, max);
  }
  
! /* Given a real type, build the minimum value expressible with that type.  */
  
  tree
  a68_real_minval (tree type)
*************** a68_real_minval (tree type)
*** 108,114 ****
  }
  
  /* Given a real type, build the smallest value which can be meaningfully added
!    to or substracted from 1.  */
  
  tree
  a68_real_smallval (tree type)
--- 108,114 ----
  }
  
  /* Given a real type, build the smallest value which can be meaningfully added
!    to or subtracted from 1.  */
  
  tree
  a68_real_smallval (tree type)
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low-units.cc gcc-16-20260725/gcc/algol68/a68-low-units.cc
*** gcc-16-20260718/gcc/algol68/a68-low-units.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low-units.cc	Sat Jul 25 22:32:06 2026
*************** a68_lower_identifier (NODE_T *p, LOW_CTX
*** 148,154 ****
  	}
  
        /* If the identifier refers to a FUNCTION_DECL, this means the
! 	 declaration was made by a procecure-identity-dclaration or a
  	 proc-identity-declaration of a formal hole.  The applied identifier in
  	 that case refers to the address of the corresponding function.  */
        if (TREE_CODE (id_decl) == FUNCTION_DECL)
--- 148,154 ----
  	}
  
        /* If the identifier refers to a FUNCTION_DECL, this means the
! 	 declaration was made by a procedure-identity-dclaration or a
  	 proc-identity-declaration of a formal hole.  The applied identifier in
  	 that case refers to the address of the corresponding function.  */
        if (TREE_CODE (id_decl) == FUNCTION_DECL)
*************** a68_lower_formula (NODE_T *p, LOW_CTX_T
*** 1017,1022 ****
--- 1017,1025 ----
  	  tree op = a68_lower_tree (NEXT (SUB (p)), ctx);
  	  tree arg2 = a68_lower_tree (NEXT (NEXT (SUB (p))), ctx);
  
+ 	  arg1 = a68_consolidate_ref (MOID (SUB (p)), arg1);
+ 	  arg2 = a68_consolidate_ref (MOID (NEXT (NEXT (SUB (p)))), arg2);
+ 
  	  if (POINTER_TYPE_P (TREE_TYPE (op)))
  	    op = fold_build1 (INDIRECT_REF,
  			      TREE_TYPE (TREE_TYPE (op)),
*************** a68_lower_monadic_formula (NODE_T *p, LO
*** 1049,1054 ****
--- 1052,1058 ----
        tree op = a68_lower_tree (SUB (p), ctx);
        tree secondary = a68_lower_tree (NEXT (SUB (p)), ctx);
  
+       secondary = a68_consolidate_ref (MOID (NEXT (SUB (p))), secondary);
        if (POINTER_TYPE_P (TREE_TYPE (op)))
  	op = fold_build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (op)), op);
        return build_call_expr_loc (a68_get_node_location (p), op, 1, secondary);
*************** collect_call_arguments (NODE_T *p, vec<t
*** 1129,1136 ****
  	  /* In Algol 68 parameters are passed via an identity declaration, so
  	     this must implement same semantics.  */
  	  tree arg = a68_lower_tree (p, ctx);
! 	  if (HAS_ROWS (MOID (p)))
! 	    arg = a68_low_dup (arg);
  	  arg = a68_consolidate_ref (MOID (p), arg);
  	  args->quick_push (arg);
  	}
--- 1133,1139 ----
  	  /* In Algol 68 parameters are passed via an identity declaration, so
  	     this must implement same semantics.  */
  	  tree arg = a68_lower_tree (p, ctx);
! 	  arg = a68_low_dup (arg);
  	  arg = a68_consolidate_ref (MOID (p), arg);
  	  args->quick_push (arg);
  	}
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-low.cc gcc-16-20260725/gcc/algol68/a68-low.cc
*** gcc-16-20260718/gcc/algol68/a68-low.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-low.cc	Sat Jul 25 22:32:06 2026
*************** a68_demangle_symbol (const char *mname,
*** 207,213 ****
  	{
  	  switch (symbol[i])
  	    {
! 	    case 'p': demangled[o++] = '+'; break;
  	    case 'c': demangled[o++] = '^'; break;
  	    case 'a': demangled[o++] = '&'; break;
  	    case 'u': demangled[o++] = '+'; break;
--- 207,213 ----
  	{
  	  switch (symbol[i])
  	    {
! 	    case 'p': demangled[o++] = '%'; break;
  	    case 'c': demangled[o++] = '^'; break;
  	    case 'a': demangled[o++] = '&'; break;
  	    case 'u': demangled[o++] = '+'; break;
*************** a68_low_assignation (NODE_T *p,
*** 1005,1011 ****
      {
        /* Make a deep copy of the rhs.  Note that we have to use the heap
  	 because the scope of the lhs may be older than the scope of the rhs.
! 	 XXX this can be ommitted if a68_multiple_copy_elems below supports
  	 overlapping multiples.  */
        if (HAS_ROWS (mode_rhs))
  	rhs = a68_low_dup (rhs, true /* use_heap */);
--- 1005,1011 ----
      {
        /* Make a deep copy of the rhs.  Note that we have to use the heap
  	 because the scope of the lhs may be older than the scope of the rhs.
! 	 XXX this can be omitted if a68_multiple_copy_elems below supports
  	 overlapping multiples.  */
        if (HAS_ROWS (mode_rhs))
  	rhs = a68_low_dup (rhs, true /* use_heap */);
*************** a68_low_assignation (NODE_T *p,
*** 1016,1022 ****
  	{
  	  /* Assigning to a flexible name updates descriptor with new bounds
  	     and also sets the elements to the dup of the rhs.  No boundscheck
! 	     is peformed.  XXX but bound checking in contained values may be
  	     necessary, ghost elements.  */
  	  if (POINTER_TYPE_P (TREE_TYPE (lhs))
  	      && TREE_TYPE (TREE_TYPE (lhs)) == TREE_TYPE (rhs))
--- 1016,1022 ----
  	{
  	  /* Assigning to a flexible name updates descriptor with new bounds
  	     and also sets the elements to the dup of the rhs.  No boundscheck
! 	     is performed.  XXX but bound checking in contained values may be
  	     necessary, ghost elements.  */
  	  if (POINTER_TYPE_P (TREE_TYPE (lhs))
  	      && TREE_TYPE (TREE_TYPE (lhs)) == TREE_TYPE (rhs))
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-moids-diagnostics.cc gcc-16-20260725/gcc/algol68/a68-moids-diagnostics.cc
*** gcc-16-20260718/gcc/algol68/a68-moids-diagnostics.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-moids-diagnostics.cc	Sat Jul 25 22:32:06 2026
***************
*** 19,24 ****
--- 19,25 ----
     along with GCC; see the file COPYING3.  If not see
     <http://www.gnu.org/licenses/>.  */
  
+ #define INCLUDE_STRING
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 27,34 ****
  #include "a68.h"
  #include "a68-pretty-print.h"
  
- #include <string>
- 
  /* Give accurate error message.  */
  
  const char *
--- 28,33 ----
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-moids-misc.cc gcc-16-20260725/gcc/algol68/a68-moids-misc.cc
*** gcc-16-20260718/gcc/algol68/a68-moids-misc.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-moids-misc.cc	Sat Jul 25 22:32:06 2026
*************** a68_is_firm (MOID_T *p, MOID_T *q)
*** 710,716 ****
     NO_MOID if P cannot be widened to Q.
  
     This means that if P is known to widen to Q (a68_is_widenable (P,Q) return
!    true) this function can be invoked repeteadly and it will eventually return
     Q.  */
  
  MOID_T *
--- 710,716 ----
     NO_MOID if P cannot be widened to Q.
  
     This means that if P is known to widen to Q (a68_is_widenable (P,Q) return
!    true) this function can be invoked repeatedly and it will eventually return
     Q.  */
  
  MOID_T *
*************** a68_is_coercible_series (MOID_T *p, MOID
*** 1012,1018 ****
  
  /* Whether P can be coerced to Q in a C context.
  
!    If P is a STOWED modes serie (A, B, ...) and Q is a routine mode like `proc
     (X, Y, ...)' then this routine determines whether A can be coerced to X, B
     to Y, etc.  */
  
--- 1012,1018 ----
  
  /* Whether P can be coerced to Q in a C context.
  
!    If P is a STOWED modes series (A, B, ...) and Q is a routine mode like `proc
     (X, Y, ...)' then this routine determines whether A can be coerced to X, B
     to Y, etc.  */
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-moids-sorting.cc gcc-16-20260725/gcc/algol68/a68-moids-sorting.cc
*** gcc-16-20260718/gcc/algol68/a68-moids-sorting.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-moids-sorting.cc	Sat Jul 25 22:32:06 2026
*************** packs_ordering (PACK_T *a, PACK_T *b, bo
*** 52,58 ****
  		return 1;
  	      if (TEXT (b) == NO_TEXT)
  		return -1;
! 	      return -strcmp (TEXT (a), TEXT (b));
  	    }
  	}
      }
--- 52,61 ----
  		return 1;
  	      if (TEXT (b) == NO_TEXT)
  		return -1;
! 
! 	      int cmp = strcmp (TEXT (a), TEXT (b));
! 	      if (cmp != 0)
! 		return -cmp;
  	    }
  	}
      }
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-bottom-up.cc gcc-16-20260725/gcc/algol68/a68-parser-bottom-up.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-bottom-up.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-bottom-up.cc	Sat Jul 25 22:32:06 2026
***************
*** 95,100 ****
--- 95,101 ----
       - reduce a sub-phrase starting at a branch, implemented by 'reduce_branch'.
  */
  
+ #define INCLUDE_STRING
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
*************** strange_separator (NODE_T *p)
*** 268,274 ****
       reduce (p, NO_NOTE, NO_TICK, PARTICULAR_PROGRAM, LABEL, ENCLOSED_CLAUSE, STOP);
       reduce (p, NO_NOTE, NO_TICK, PARTICULAR_PROGRAM, ENCLOSED_CLAUSE, STOP);
  
!    We know that at much only one of these reductions will succeed, becuase if
     the first reduction succeeds, then P gets changed to LABEL which cannot
     match ENCLOSED_CLAUSE.
  
--- 269,275 ----
       reduce (p, NO_NOTE, NO_TICK, PARTICULAR_PROGRAM, LABEL, ENCLOSED_CLAUSE, STOP);
       reduce (p, NO_NOTE, NO_TICK, PARTICULAR_PROGRAM, ENCLOSED_CLAUSE, STOP);
  
!    We know that at much only one of these reductions will succeed, because if
     the first reduction succeeds, then P gets changed to LABEL which cannot
     match ENCLOSED_CLAUSE.
  
*************** strange_separator (NODE_T *p)
*** 302,308 ****
  
     Note how, when presented with a sequence of labels like `l1: l2: l3: ...',
     the first call to "reduce" will succeed, turning Q into a LABEL.  Then the
!    second call to "reduce" will also succed, reducing to another LABEL and
     setting SIGA to "true".  In subsequent iterations of the loop the first call
     will always fail, and the second call will keep succeeding as more sequences
     of DEFINING_IDENTIFIER, COLON_SYMBOL get matched.  */
--- 303,309 ----
  
     Note how, when presented with a sequence of labels like `l1: l2: l3: ...',
     the first call to "reduce" will succeed, turning Q into a LABEL.  Then the
!    second call to "reduce" will also succeed, reducing to another LABEL and
     setting SIGA to "true".  In subsequent iterations of the loop the first call
     will always fail, and the second call will keep succeeding as more sequences
     of DEFINING_IDENTIFIER, COLON_SYMBOL get matched.  */
*************** a68_bottom_up_parser (NODE_T *p)
*** 539,545 ****
  
     looking for declarations of indicants, priorities and operators
     (a68_extract_{indicants,priorities,operators}).  Using this information , it
!    determines the nature of bold tags occuring in the branch, by turning
     BOLD_TAG nodes into either INDICANT nodes or OPERATOR nodes
     (a68_elaborate_bold_tags).
  
--- 540,546 ----
  
     looking for declarations of indicants, priorities and operators
     (a68_extract_{indicants,priorities,operators}).  Using this information , it
!    determines the nature of bold tags occurring in the branch, by turning
     BOLD_TAG nodes into either INDICANT nodes or OPERATOR nodes
     (a68_elaborate_bold_tags).
  
*************** recover_from_error (NODE_T * p, enum a68
*** 2836,2843 ****
  	}
        else
  	{
  	  a68_attr_format_token a (expect);
! 	  a68_error (w, "%s is an invalid %e", seq, &a);
  	}
  
      if (ERROR_COUNT (&A68_JOB) >= MAX_ERRORS)
--- 2837,2846 ----
  	}
        else
  	{
+ 	  std::string fmt = seq;
+ 	  fmt += " is an invalid %e";
  	  a68_attr_format_token a (expect);
! 	  a68_error (w, fmt.c_str (), &a);
  	}
  
      if (ERROR_COUNT (&A68_JOB) >= MAX_ERRORS)
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-brackets.cc gcc-16-20260725/gcc/algol68/a68-parser-brackets.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-brackets.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-brackets.cc	Sat Jul 25 22:32:06 2026
***************
*** 20,25 ****
--- 20,26 ----
     <http://www.gnu.org/licenses/>.  */
  
  
+ #define INCLUDE_STRING
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
***************
*** 37,43 ****
  /* Intelligible diagnostics for the bracket checker.  */
  
  static void
! bracket_check_error (char *txt, int n, const char *bra, const char *ket)
  {
    BUFFER buf;
  
--- 38,45 ----
  /* Intelligible diagnostics for the bracket checker.  */
  
  static void
! bracket_check_error (char *txt, int n, const char *bra, const char *ket,
! 		     char **item)
  {
    BUFFER buf;
  
*************** bracket_check_error (char *txt, int n, c
*** 52,57 ****
--- 54,61 ----
  		(n > 0 ? strop_ket : strop_bra)) < 0)
      gcc_unreachable ();
  
+   *item = (n > 0 ? xstrdup (strop_ket) : xstrdup (strop_bra));
+   
    if (strlen (txt) > 0)
      a68_bufcat (txt, " or ", BUFFER_SIZE);
    a68_bufcat (txt, buf, BUFFER_SIZE);
*************** bracket_check_error (char *txt, int n, c
*** 60,66 ****
  /* Diagnose brackets in local branch of the tree.  */
  
  static char *
! bracket_check_diagnose (NODE_T *p)
  {
    int begins = 0, opens = 0, format_delims = 0, format_opens = 0;
    int subs = 0, ifs = 0, cases = 0, dos = 0;
--- 64,70 ----
  /* Diagnose brackets in local branch of the tree.  */
  
  static char *
! bracket_check_diagnose (NODE_T *p, char **item)
  {
    int begins = 0, opens = 0, format_delims = 0, format_opens = 0;
    int subs = 0, ifs = 0, cases = 0, dos = 0;
*************** bracket_check_diagnose (NODE_T *p)
*** 123,136 ****
      }
  
    A68 (edit_line)[0] = '\0';
!   bracket_check_error (A68 (edit_line), begins, "BEGIN", "END");
!   bracket_check_error (A68 (edit_line), opens, "(", ")");
!   bracket_check_error (A68 (edit_line), format_opens, "(", ")");
!   bracket_check_error (A68 (edit_line), format_delims, "$", "$");
!   bracket_check_error (A68 (edit_line), subs, "[", "]");
!   bracket_check_error (A68 (edit_line), ifs, "IF", "FI");
!   bracket_check_error (A68 (edit_line), cases, "CASE", "ESAC");
!   bracket_check_error (A68 (edit_line), dos, "DO", "OD");
    return A68 (edit_line);
  }
  
--- 127,140 ----
      }
  
    A68 (edit_line)[0] = '\0';
!   bracket_check_error (A68 (edit_line), begins, "BEGIN", "END", item);
!   bracket_check_error (A68 (edit_line), opens, "(", ")", item);
!   bracket_check_error (A68 (edit_line), format_opens, "(", ")", item);
!   bracket_check_error (A68 (edit_line), format_delims, "$", "$", item);
!   bracket_check_error (A68 (edit_line), subs, "[", "]", item);
!   bracket_check_error (A68 (edit_line), ifs, "IF", "FI", item);
!   bracket_check_error (A68 (edit_line), cases, "CASE", "ESAC", item);
!   bracket_check_error (A68 (edit_line), dos, "DO", "OD", item);
    return A68 (edit_line);
  }
  
*************** bracket_check_parse (NODE_T *top, NODE_T
*** 193,210 ****
  	p = q;
        else if (q == NO_NODE)
  	{
! 	  char *diag = bracket_check_diagnose (top);
! 	  a68_error (p, "incorrect nesting, check for %s",
! 		     (strlen (diag) > 0 ? diag : "missing or unmatched keyword"));
  	  longjmp (A68_PARSER (top_down_crash_exit), 1);
  	}
        else
  	{
! 	  char *diag = bracket_check_diagnose (top);
  	  a68_attr_format_token a (ATTRIBUTE (q));
  
! 	  a68_error (q, "unexpected %e, check for %s", &a,
! 		     (strlen (diag) > 0 ? diag : "missing or unmatched keyword"));
  	  longjmp (A68_PARSER (top_down_crash_exit), 1);
  	}
      }
--- 197,231 ----
  	p = q;
        else if (q == NO_NODE)
  	{
! 	  char *item = NULL;
! 	  char *diag = bracket_check_diagnose (top, &item);
! 	  if (strlen (diag) == 0)
! 	    a68_error (p, "incorrect nesting, check for missing or unmatched keyword");
! 	  else
! 	    {
! 	      std::string fmt1 = diag;
! 	      std::string fmt2 = "incorrect nesting, check for " + fmt1;
! 	      a68_error (p, fmt2.c_str (), item);
! 	      free (item);
! 	    }
  	  longjmp (A68_PARSER (top_down_crash_exit), 1);
  	}
        else
  	{
! 	  char *item = NULL;
! 	  char *diag = bracket_check_diagnose (top, &item);
  	  a68_attr_format_token a (ATTRIBUTE (q));
  
! 	  if (strlen (diag) == 0)
! 	    a68_error (q, "unexpected %e, check for missing or unmatched keyword",
! 		       &a);
! 	  else
! 	    {
! 	      std::string fmt1 = diag;
! 	      std::string fmt2 = "unexpected %e, check for " + fmt1;
! 	      a68_error (q, fmt2.c_str (), &a, item);
! 	      free (item);
! 	    }
  	  longjmp (A68_PARSER (top_down_crash_exit), 1);
  	}
      }
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-extract.cc gcc-16-20260725/gcc/algol68/a68-parser-extract.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-extract.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-extract.cc	Sat Jul 25 22:32:06 2026
*************** a68_extract_indicants (NODE_T *p)
*** 485,492 ****
  		  /* Store in the symbol table, but also in the moid list.
  		     Position of definition (q) connects to this lexical
  		     level!  */
! 		  if (a68_add_tag (TABLE (p), INDICANT, q, NO_MOID, STOP) == NO_TAG)
  		    gcc_unreachable ();
  		  if (a68_add_mode (&TOP_MOID (&A68_JOB), INDICANT, 0, q, NO_MOID, NO_PACK) == NO_MOID)
  		    gcc_unreachable ();
  		  ATTRIBUTE (q) = DEFINING_INDICANT;
--- 485,494 ----
  		  /* Store in the symbol table, but also in the moid list.
  		     Position of definition (q) connects to this lexical
  		     level!  */
! 		  TAG_T *t = a68_add_tag (TABLE (p), INDICANT, q, NO_MOID, STOP);
! 		  if (t == NO_TAG)
  		    gcc_unreachable ();
+ 		  PUBLICIZED (t) = is_public;
  		  if (a68_add_mode (&TOP_MOID (&A68_JOB), INDICANT, 0, q, NO_MOID, NO_PACK) == NO_MOID)
  		    gcc_unreachable ();
  		  ATTRIBUTE (q) = DEFINING_INDICANT;
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-modes.cc gcc-16-20260725/gcc/algol68/a68-parser-modes.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-modes.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-modes.cc	Sat Jul 25 22:32:06 2026
*************** get_mode_from_proc_var_declarations_tree
*** 801,817 ****
  /* Whether a mode declaration refers to self or relates to void.
     This uses Lindsey's ying-yang algorithm.  */
  
! static bool
! is_well_formed (MOID_T *def, MOID_T *z, bool yin, bool yang, bool video)
  {
    if (z == NO_MOID)
!     return false;
    else if (yin && yang)
!     return z == M_VOID ? video : true;
    else if (z == M_VOID)
      return video;
    else if (IS (z, STANDARD))
!     return true;
    else if (IS (z, INDICANT))
      {
        if (def == NO_MOID)
--- 801,822 ----
  /* Whether a mode declaration refers to self or relates to void.
     This uses Lindsey's ying-yang algorithm.  */
  
! #define WELL 0
! #define NO_YIN 1
! #define NO_YANG 2
! #define UNWELL 3
! 
! static int
! is_well_formed (MOID_T *def, MOID_T *z, bool yin, bool yang, int video)
  {
    if (z == NO_MOID)
!     return UNWELL;
    else if (yin && yang)
!     return z == M_VOID ? video : WELL;
    else if (z == M_VOID)
      return video;
    else if (IS (z, STANDARD))
!     return WELL;
    else if (IS (z, INDICANT))
      {
        if (def == NO_MOID)
*************** is_well_formed (MOID_T *def, MOID_T *z,
*** 822,871 ****
  	  if (z == M_VOID)
  	    return video;
  	  else
! 	    return true;
  	}
        else
  	{
  	  if (z == def || USE (z))
! 	    return yin && yang;
  	  else
  	    {
  	      USE (z) = true;
! 	      bool wwf = is_well_formed (def, EQUIVALENT (z), yin, yang, video);
  	      USE (z) = false;
! 	  return wwf;
  	    }
  	}
      }
    else if (IS_REF (z))
!     return is_well_formed (def, SUB (z), true, yang, false);
    else if (IS (z, PROC_SYMBOL))
!     return PACK (z) != NO_PACK ? true : is_well_formed (def, SUB (z), true, yang, true);
    else if (IS_ROW (z))
!     return is_well_formed (def, SUB (z), yin, yang, false);
    else if (IS_FLEX (z))
!     return is_well_formed (def, SUB (z), yin, yang, false);
    else if (IS (z, STRUCT_SYMBOL))
      {
        for (PACK_T *s = PACK (z); s != NO_PACK; FORWARD (s))
  	{
! 	  if (!is_well_formed (def, MOID (s), yin, true, false))
! 	    return false;
  	}
!       return true;
      }
    else if (IS (z, UNION_SYMBOL))
      {
        for (PACK_T *s = PACK (z); s != NO_PACK; FORWARD (s))
  	{
! 	  if (!is_well_formed (def, MOID (s), yin, yang, true))
! 	    return false;
  	}
!       return true;
      }
    else
      {
!       return false;
      }
  }
  
--- 827,885 ----
  	  if (z == M_VOID)
  	    return video;
  	  else
! 	    return WELL;
  	}
        else
  	{
  	  if (z == def || USE (z))
! 	    {
! 	      if (!yin)
! 		return NO_YIN;
! 	      else if (!yang)
! 		return NO_YANG;
! 	      else
! 		return WELL;
! 	    }
  	  else
  	    {
  	      USE (z) = true;
! 	      int wwf = is_well_formed (def, EQUIVALENT (z), yin, yang, video);
  	      USE (z) = false;
! 	      return wwf;
  	    }
  	}
      }
    else if (IS_REF (z))
!     return is_well_formed (def, SUB (z), true, yang, UNWELL);
    else if (IS (z, PROC_SYMBOL))
!     return PACK (z) != NO_PACK ? WELL : is_well_formed (def, SUB (z), true, yang, WELL);
    else if (IS_ROW (z))
!     return is_well_formed (def, SUB (z), yin, yang, UNWELL);
    else if (IS_FLEX (z))
!     return is_well_formed (def, SUB (z), yin, yang, UNWELL);
    else if (IS (z, STRUCT_SYMBOL))
      {
        for (PACK_T *s = PACK (z); s != NO_PACK; FORWARD (s))
  	{
! 	  int wwf = is_well_formed (def, MOID (s), yin, true, UNWELL);
! 	  if (wwf != WELL)
! 	    return wwf;
  	}
!       return WELL;
      }
    else if (IS (z, UNION_SYMBOL))
      {
        for (PACK_T *s = PACK (z); s != NO_PACK; FORWARD (s))
  	{
! 	  int wwf = is_well_formed (def, MOID (s), yin, yang, WELL);
! 	  if (wwf != WELL)
! 	    return wwf;
  	}
!       return WELL;
      }
    else
      {
!       return UNWELL;
      }
  }
  
*************** a68_make_moid_list (MODULE_T *mod)
*** 1334,1343 ****
      {
        if (IS (z, INDICANT) && EQUIVALENT (z) != NO_MOID)
  	{
! 	  if (!is_well_formed (z, EQUIVALENT (z), false, false, true))
  	    {
  	      a68_moid_format_token m (z);
  	      a68_error (NODE (z), "%e does not specify a well formed mode", &m);
  	      cont = false;
  	    }
  	}
--- 1348,1362 ----
      {
        if (IS (z, INDICANT) && EQUIVALENT (z) != NO_MOID)
  	{
! 	  int wwf = is_well_formed (z, EQUIVALENT (z), false, false, WELL);
! 	  if (wwf != WELL)
  	    {
  	      a68_moid_format_token m (z);
  	      a68_error (NODE (z), "%e does not specify a well formed mode", &m);
+ 	      if (wwf == NO_YIN)
+ 		a68_inform (NODE (z), "mode %e is infinite", &m);
+ 	      else if (wwf == NO_YANG)
+ 		a68_inform (NODE (z), "mode %e is strongly coercible to itself", &m);
  	      cont = false;
  	    }
  	}
*************** a68_make_moid_list (MODULE_T *mod)
*** 1349,1358 ****
  	;
        else if (NODE (z) != NO_NODE)
  	{
! 	  if (!is_well_formed (NO_MOID, z, false, false, true))
  	    {
  	      a68_moid_format_token m (z);
  	      a68_error (NODE (z), "%e does not specify a well formed mode", &m);
  	    }
  	}
      }
--- 1368,1382 ----
  	;
        else if (NODE (z) != NO_NODE)
  	{
! 	  int wwf = is_well_formed (NO_MOID, z, false, false, WELL);
! 	  if (wwf != WELL)
  	    {
  	      a68_moid_format_token m (z);
  	      a68_error (NODE (z), "%e does not specify a well formed mode", &m);
+ 	      if (wwf == NO_YIN)
+ 		a68_inform (NODE (z), "mode %e is infinite", &m);
+ 	      else if (wwf == NO_YANG)
+ 		a68_inform (NODE (z), "mode %e is strongly coercible to itself", &m);
  	    }
  	}
      }
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-prelude.cc gcc-16-20260725/gcc/algol68/a68-parser-prelude.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-prelude.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-prelude.cc	Sat Jul 25 22:32:06 2026
*************** stand_prelude (void)
*** 831,837 ****
    a68_op (A68_STD, "ABS", m, a68_lower_bitabs2);
    m = a68_proc (M_SHORT_BITS, M_SHORT_SHORT_BITS, NO_MOID);
    a68_op (A68_STD, "LENG", m, a68_lower_bitleng2);
!   /* SHORT BITS operatos.  */
    m = a68_proc (M_SHORT_INT, M_SHORT_BITS, NO_MOID);
    a68_op (A68_STD, "ABS", m, a68_lower_bitabs2);
    m = a68_proc (M_SHORT_BITS, M_SHORT_INT, NO_MOID);
--- 831,837 ----
    a68_op (A68_STD, "ABS", m, a68_lower_bitabs2);
    m = a68_proc (M_SHORT_BITS, M_SHORT_SHORT_BITS, NO_MOID);
    a68_op (A68_STD, "LENG", m, a68_lower_bitleng2);
!   /* SHORT BITS operators.  */
    m = a68_proc (M_SHORT_INT, M_SHORT_BITS, NO_MOID);
    a68_op (A68_STD, "ABS", m, a68_lower_bitabs2);
    m = a68_proc (M_SHORT_BITS, M_SHORT_INT, NO_MOID);
*************** stand_prelude (void)
*** 893,899 ****
    a68_op (A68_STD, "LENG", m, a68_lower_bitleng2);
    m = a68_proc (M_SHORT_BITS, M_BITS, NO_MOID);
    a68_op (A68_STD, "SHORTEN", m, a68_lower_bitshorten2);
!   /* LONG BITS operatos.  */
    m = a68_proc (M_LONG_INT, M_LONG_BITS, NO_MOID);
    a68_op (A68_STD, "ABS", m, a68_lower_bitabs2);
    m = a68_proc (M_LONG_BITS, M_LONG_INT, NO_MOID);
--- 893,899 ----
    a68_op (A68_STD, "LENG", m, a68_lower_bitleng2);
    m = a68_proc (M_SHORT_BITS, M_BITS, NO_MOID);
    a68_op (A68_STD, "SHORTEN", m, a68_lower_bitshorten2);
!   /* LONG BITS operators.  */
    m = a68_proc (M_LONG_INT, M_LONG_BITS, NO_MOID);
    a68_op (A68_STD, "ABS", m, a68_lower_bitabs2);
    m = a68_proc (M_LONG_BITS, M_LONG_INT, NO_MOID);
*************** gnu_prelude (void)
*** 1378,1383 ****
--- 1378,1392 ----
    a68_op (A68_EXT, "CLEAR", m, a68_lower_clear3);
    m = a68_proc (M_BOOL, M_LONG_LONG_BITS, M_INT, NO_MOID);
    a68_op (A68_EXT, "TEST", m, a68_lower_test3);
+   /* REAL operators.  */
+   m = a68_proc (M_INT, M_REAL, NO_MOID);
+   a68_op (A68_EXT, "FLOOR", m, a68_lower_entier2);
+   /* LONG REAL operators.  */
+   m = a68_proc (M_LONG_INT, M_LONG_REAL, NO_MOID);
+   a68_op (A68_EXT, "FLOOR", m, a68_lower_entier2);
+   /* LONG REAL operators.  */
+   m = a68_proc (M_LONG_LONG_INT, M_LONG_LONG_REAL, NO_MOID);
+   a68_op (A68_EXT, "FLOOR", m, a68_lower_entier2);
  }
  
  /* POSIX prelude.  */
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-scanner.cc gcc-16-20260725/gcc/algol68/a68-parser-scanner.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-scanner.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-scanner.cc	Sat Jul 25 22:32:06 2026
*************** read_source_file (const char *filename)
*** 334,340 ****
    bool ret = true;
  
    /* First open the given file.  */
!   if (!(FILE_SOURCE_FD (&A68_JOB) = fopen (filename, "r")))
      fatal_error (UNKNOWN_LOCATION, "could not open source file %s",
  		 filename);
    FILE_SOURCE_NAME (&A68_JOB) = ggc_strdup (filename);
--- 334,340 ----
    bool ret = true;
  
    /* First open the given file.  */
!   if (!(FILE_SOURCE_FD (&A68_JOB) = fopen (filename, "rb")))
      fatal_error (UNKNOWN_LOCATION, "could not open source file %s",
  		 filename);
    FILE_SOURCE_NAME (&A68_JOB) = ggc_strdup (filename);
*************** include_files (LINE_T *top)
*** 1076,1082 ****
  	      t = NO_LINE;
  
  	      /* Access the file.  */
! 	      fp = fopen (fn, "r");
  	      SCAN_ERROR (fp == NULL, start_l, start_c,
  			  "error opening included file");
  	      ssize = a68_file_size (fileno (fp));
--- 1076,1082 ----
  	      t = NO_LINE;
  
  	      /* Access the file.  */
! 	      fp = fopen (fn, "rb");
  	      SCAN_ERROR (fp == NULL, start_l, start_c,
  			  "error opening included file");
  	      ssize = a68_file_size (fileno (fp));
*************** a68_lexical_analyser (const char *filena
*** 2331,2337 ****
      s = STRING (l);
    tokenise_source (&root, 0, false, &l, &s, &start_l, &start_c);
  
!   /* Detemine whether the actual file contents resulted in some token.  This is
       used in order to provide better diagnostics for empty source files or
       files containing only comments or pragmats.  These are not valid Algol 68
       packets.  */
--- 2331,2337 ----
      s = STRING (l);
    tokenise_source (&root, 0, false, &l, &s, &start_l, &start_c);
  
!   /* Determine whether the actual file contents resulted in some token.  This is
       used in order to provide better diagnostics for empty source files or
       files containing only comments or pragmats.  These are not valid Algol 68
       packets.  */
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-scope.cc gcc-16-20260725/gcc/algol68/a68-parser-scope.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-scope.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-scope.cc	Sat Jul 25 22:32:06 2026
*************** a68_scope_checker (NODE_T *p)
*** 1048,1054 ****
    /* PROC and FORMAT identities can now be assigned a scope.  */
    bind_scope_to_tags (p);
  
!   /* Now check evertyhing else.  */
    gcc_assert (IS (p, PACKET));
    if (IS (SUB (p), PARTICULAR_PROGRAM))
      scope_particular_program (SUB (p));
--- 1048,1054 ----
    /* PROC and FORMAT identities can now be assigned a scope.  */
    bind_scope_to_tags (p);
  
!   /* Now check everything else.  */
    gcc_assert (IS (p, PACKET));
    if (IS (SUB (p), PARTICULAR_PROGRAM))
      scope_particular_program (SUB (p));
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-serial-dsa.cc gcc-16-20260725/gcc/algol68/a68-parser-serial-dsa.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-serial-dsa.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-serial-dsa.cc	Sat Jul 25 22:32:06 2026
*************** serial_dsa_check_serial_clause (NODE_T *
*** 39,45 ****
      {
        if (IS (p, GENERATOR))
  	{
! 	  /* LOC generators always result in dyamic stack allocation regardless
  	     of the mode of the allocated value.  */
  	  if (IS (SUB (p), LOC_SYMBOL))
  	    {
--- 39,45 ----
      {
        if (IS (p, GENERATOR))
  	{
! 	  /* LOC generators always result in dynamic stack allocation regardless
  	     of the mode of the allocated value.  */
  	  if (IS (SUB (p), LOC_SYMBOL))
  	    {
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser-taxes.cc gcc-16-20260725/gcc/algol68/a68-parser-taxes.cc
*** gcc-16-20260718/gcc/algol68/a68-parser-taxes.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser-taxes.cc	Sat Jul 25 22:32:06 2026
*************** is_mappable_routine (const char *z)
*** 142,182 ****
  
    /* Math routines.  */
    ACCEPT (z, "arccos");
-   ACCEPT (z, "arccosdg");
    ACCEPT (z, "arccot");
-   ACCEPT (z, "arccotdg");
    ACCEPT (z, "arcsin");
-   ACCEPT (z, "arcsindg");
    ACCEPT (z, "arctan");
-   ACCEPT (z, "arctandg");
-   ACCEPT (z, "beta");
-   ACCEPT (z, "betainc");
-   ACCEPT (z, "cbrt");
    ACCEPT (z, "cos");
-   ACCEPT (z, "cosdg");
-   ACCEPT (z, "cospi");
-   ACCEPT (z, "cot");
-   ACCEPT (z, "cot");
-   ACCEPT (z, "cotdg");
-   ACCEPT (z, "cotpi");
-   ACCEPT (z, "curt");
-   ACCEPT (z, "erf");
-   ACCEPT (z, "erfc");
    ACCEPT (z, "exp");
-   ACCEPT (z, "gamma");
-   ACCEPT (z, "gammainc");
-   ACCEPT (z, "gammaincg");
-   ACCEPT (z, "gammaincgf");
    ACCEPT (z, "ln");
    ACCEPT (z, "log");
    ACCEPT (z, "pi");
    ACCEPT (z, "sin");
-   ACCEPT (z, "sindg");
-   ACCEPT (z, "sinpi");
    ACCEPT (z, "sqrt");
    ACCEPT (z, "tan");
-   ACCEPT (z, "tandg");
-   ACCEPT (z, "tanpi");
    /* Random generator.  */
    ACCEPT (z, "nextrandom");
    ACCEPT (z, "random");
--- 142,158 ----
*************** test_firmly_related_ops_local (NODE_T *p
*** 611,617 ****
  			    }
  			}
  
! 		      /* Report only one level of hidding or it gets messy.  */
  		      break;
  		    }
  		}
--- 587,593 ----
  			    }
  			}
  
! 		      /* Report only one level of hiding or it gets messy.  */
  		      break;
  		    }
  		}
*************** a68_collect_taxes (NODE_T *p)
*** 659,671 ****
    test_firmly_related_ops_local (NO_NODE, OPERATORS (A68_STANDENV));
  }
  
  /* Whether tag has already been declared in this range.  */
  
  static void
  already_declared (NODE_T *n, int a)
  {
    if (find_tag_local (TABLE (n), a, NSYMBOL (n)) != NO_TAG)
!     a68_error (n, "multiple declaration of tag %qs", NSYMBOL (n));
  }
  
  /* Whether tag has already been declared in this range.  */
--- 635,663 ----
    test_firmly_related_ops_local (NO_NODE, OPERATORS (A68_STANDENV));
  }
  
+ /* Get a description text for attribute passed as the second argument to
+    already_declared and already-declared_hidden.  To be used in
+    diagnostics.  */
+ 
+ static const char *
+ attr_descr (int a)
+ {
+   return (a == OP_SYMBOL ? "operator"
+ 	  : a == PRIO_SYMBOL ? "priority for operator"
+ 	  : a == INDICANT ? "mode indicant"
+ 	  : a == LABEL ? "label"
+ 	  : a == IDENTIFIER ? "identifier"
+ 	  : "tag");
+ }
+ 
  /* Whether tag has already been declared in this range.  */
  
  static void
  already_declared (NODE_T *n, int a)
  {
    if (find_tag_local (TABLE (n), a, NSYMBOL (n)) != NO_TAG)
!     a68_error (n, "multiple declaration of %s %qs",
! 	       attr_descr (a), NSYMBOL (n));
  }
  
  /* Whether tag has already been declared in this range.  */
*************** static void
*** 674,680 ****
  already_declared_hidden (NODE_T *n, int a)
  {
    if (find_tag_local (TABLE (n), a, NSYMBOL (n)) != NO_TAG)
!     a68_error (n, "multiple declaration of tag %qs", NSYMBOL (n));
  
    TAG_T *s = a68_find_tag_global (PREVIOUS (TABLE (n)), a, NSYMBOL (n));
  
--- 666,673 ----
  already_declared_hidden (NODE_T *n, int a)
  {
    if (find_tag_local (TABLE (n), a, NSYMBOL (n)) != NO_TAG)
!     a68_error (n, "multiple declaration of %s %qs",
! 	       attr_descr (a), NSYMBOL (n));
  
    TAG_T *s = a68_find_tag_global (PREVIOUS (TABLE (n)), a, NSYMBOL (n));
  
*************** tax_variable_dec (NODE_T *p, int *q, MOI
*** 986,992 ****
  	    HEAP (entry) = STATIC_SYMBOL;
  	  else
  	    HEAP (entry) = *q;
! 	  
  	  if (HEAP (entry) == LOC_SYMBOL)
  	    {
  	      TAG_T *z = a68_add_tag (TABLE (p), ANONYMOUS, p, SUB (*m), GENERATOR);
--- 979,985 ----
  	    HEAP (entry) = STATIC_SYMBOL;
  	  else
  	    HEAP (entry) = *q;
! 
  	  if (HEAP (entry) == LOC_SYMBOL)
  	    {
  	      TAG_T *z = a68_add_tag (TABLE (p), ANONYMOUS, p, SUB (*m), GENERATOR);
*************** a68_mark_auxilliary (NODE_T *p)
*** 1722,1728 ****
  
  	  if (TAX (p) != NO_TAG)
  	    USE (TAX (p)) = true;
! 	  
  	  if ((z = a68_find_tag_global (TABLE (p), PRIO_SYMBOL, NSYMBOL (p))) != NO_TAG)
  	    USE (z) = true;
  	}
--- 1715,1721 ----
  
  	  if (TAX (p) != NO_TAG)
  	    USE (TAX (p)) = true;
! 
  	  if ((z = a68_find_tag_global (TABLE (p), PRIO_SYMBOL, NSYMBOL (p))) != NO_TAG)
  	    USE (z) = true;
  	}
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-parser.cc gcc-16-20260725/gcc/algol68/a68-parser.cc
*** gcc-16-20260718/gcc/algol68/a68-parser.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-parser.cc	Sat Jul 25 22:32:06 2026
***************
*** 92,98 ****
         does not check VICTAL correctness of declarers. This is done separately.
  
    The parser sets up symbol tables and populates them as far as needed to parse
!   the source. After the bottom-up parser terminates succesfully, the symbol tables
    are completed.
  
     (4) Next, modes are collected and rules for well-formedness and structural
--- 92,98 ----
         does not check VICTAL correctness of declarers. This is done separately.
  
    The parser sets up symbol tables and populates them as far as needed to parse
!   the source. After the bottom-up parser terminates successfully, the symbol tables
    are completed.
  
     (4) Next, modes are collected and rules for well-formedness and structural
*************** a68_new_tag (void)
*** 788,794 ****
    PORTABLE (z) = true;
    VARIABLE (z) = false;
    IS_RECURSIVE (z) = false;
!   PUBLICIZED (z) = true; /* XXX */
    ASCRIBED_ROUTINE_TEXT (z) = false;
    LOWERER (z) = NO_LOWERER;
    TAX_TREE_DECL (z) = NULL_TREE;
--- 788,794 ----
    PORTABLE (z) = true;
    VARIABLE (z) = false;
    IS_RECURSIVE (z) = false;
!   PUBLICIZED (z) = false;
    ASCRIBED_ROUTINE_TEXT (z) = false;
    LOWERER (z) = NO_LOWERER;
    TAX_TREE_DECL (z) = NULL_TREE;
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-pretty-print.h gcc-16-20260725/gcc/algol68/a68-pretty-print.h
*** gcc-16-20260718/gcc/algol68/a68-pretty-print.h	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-pretty-print.h	Sat Jul 25 22:32:06 2026
*************** struct a68_attr_format_token : public a6
*** 129,139 ****
  public:
    a68_attr_format_token (enum a68_attribute a)
    {
!     KEYWORD_T *nt = a68_find_keyword_from_attribute (A68 (top_keyword), a);
!     if (nt != NO_KEYWORD)
!       m_str = xstrdup (a68_strop_keyword (TEXT (nt)));
!     else
!       m_str = xstrdup ("keyword");
    }
  };
  
--- 129,137 ----
  public:
    a68_attr_format_token (enum a68_attribute a)
    {
!     const char *attr_name = a68_attribute_name (a);
!     gcc_assert (attr_name != NULL);
!     m_str = xstrdup (attr_name);
    }
  };
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/a68-types.h gcc-16-20260725/gcc/algol68/a68-types.h
*** gcc-16-20260718/gcc/algol68/a68-types.h	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/a68-types.h	Sat Jul 25 22:32:06 2026
*************** struct GTY((chain_next ("%h.more"), chai
*** 164,176 ****
  /* A MOID_T represents a mode indicator.
  
     NUMBER is an unique number assigned to the moid when it gets created.  A
!    renumber_moids function exists in a68-parser-modes.cc but it dosn't seem to
     be used at all.
  
     ATTRIBUTE characterizes the kind of mode and is one of the values defined in
     a68-parser-attrs.def.  Valid values are:
  
!      PROC_SYMBOL for procecure modes.
       ROWS_SYMBOL for row modes.
       REF_SYMBOL for reference modes.
       FLEX_SYMBOL for flexible reference modes.
--- 164,176 ----
  /* A MOID_T represents a mode indicator.
  
     NUMBER is an unique number assigned to the moid when it gets created.  A
!    renumber_moids function exists in a68-parser-modes.cc but it doesn't seem to
     be used at all.
  
     ATTRIBUTE characterizes the kind of mode and is one of the values defined in
     a68-parser-attrs.def.  Valid values are:
  
!      PROC_SYMBOL for procedure modes.
       ROWS_SYMBOL for row modes.
       REF_SYMBOL for reference modes.
       FLEX_SYMBOL for flexible reference modes.
*************** struct GTY((chain_next ("%h.more"), chai
*** 200,206 ****
     The interpretation of DIM depends on the kind of mode:
     - In VOID_SYMBOL, STANDARD or INDICANT mode, if DIM is positive it
       specifies the size of the longsety of the mode.  If DIM is negative then
!      abs (DIM) is the size of hte shortsety of the mode.
     - In ROW modes, DIM is the number of dimensions.
     - In STRUCT modes, DIM is the number of fields.
     - In UNION modes, DIM is the number of united modes.
--- 200,206 ----
     The interpretation of DIM depends on the kind of mode:
     - In VOID_SYMBOL, STANDARD or INDICANT mode, if DIM is positive it
       specifies the size of the longsety of the mode.  If DIM is negative then
!      abs (DIM) is the size of the shortsety of the mode.
     - In ROW modes, DIM is the number of dimensions.
     - In STRUCT modes, DIM is the number of fields.
     - In UNION modes, DIM is the number of united modes.
*************** struct GTY(()) OPTIONS_T
*** 343,349 ****
     value of access DIRIDEN.
  
     DIRWOST (direct working stack) is very much like DIRIDEN, except that the
!    value is stored in WOST% rathern than in IDST%.  This access is used for the
     result of an action when this result does not preexist in memory and hence
     has to be constructed in WOST%.
  
--- 343,349 ----
     value of access DIRIDEN.
  
     DIRWOST (direct working stack) is very much like DIRIDEN, except that the
!    value is stored in WOST% rather than in IDST%.  This access is used for the
     result of an action when this result does not preexist in memory and hence
     has to be constructed in WOST%.
  
*************** struct GTY((chain_next ("%h.next"), chai
*** 470,476 ****
     routine texts.  This attribute is set for all the nodes in the syntax tree
     by the taxes collector and originally used by ALGOL 68 Genie's monitor.
     Even if at the moment this is not used by GCC, this field and the
!    correponding machinery is still here in case it is useful in the future.
  
     PRIORITY (accessed as PRIO) is used by operator tree nodes and specifies the
     priority of the operator denoted by the node.  This is set tree wide by the
--- 470,476 ----
     routine texts.  This attribute is set for all the nodes in the syntax tree
     by the taxes collector and originally used by ALGOL 68 Genie's monitor.
     Even if at the moment this is not used by GCC, this field and the
!    corresponding machinery is still here in case it is useful in the future.
  
     PRIORITY (accessed as PRIO) is used by operator tree nodes and specifies the
     priority of the operator denoted by the node.  This is set tree wide by the
*************** struct MODE_CACHE_T
*** 768,774 ****
     buffer is known to be big enough to hold any substring from the source file.
     It is initialized in read_source_file.
  
!    MAX_SCAN_BUF_LENGTH is the useable size of SCAN_BUF.  This is used by the
     scanner to grow SCAN_BUF as it includes other files.
  
     TAG_NUMBER is a global counter used by the parser to assign an unique number
--- 768,774 ----
     buffer is known to be big enough to hold any substring from the source file.
     It is initialized in read_source_file.
  
!    MAX_SCAN_BUF_LENGTH is the usable size of SCAN_BUF.  This is used by the
     scanner to grow SCAN_BUF as it includes other files.
  
     TAG_NUMBER is a global counter used by the parser to assign an unique number
diff -Nrcpad gcc-16-20260718/gcc/algol68/ga68-coding-guidelines.texi gcc-16-20260725/gcc/algol68/ga68-coding-guidelines.texi
*** gcc-16-20260718/gcc/algol68/ga68-coding-guidelines.texi	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/ga68-coding-guidelines.texi	Sat Jul 25 22:32:06 2026
*************** Jargon File provides definitions for man
*** 99,105 ****
  context of the Algol 68 programming language and associated
  technologies.  If you find yourself wondering about "frobyts" or
  "enclosed clauses", please look them up in the jargon
! file@footnote{@url{https://jemarch.net/a68-jargon}}.  The file is
  available online in the www and, in Gentoo, as manpages once you
  install the app-doc/a68-jargon package. Just type @command{man 7algol
  frobyt} in the terminal, for example.
--- 99,105 ----
  context of the Algol 68 programming language and associated
  technologies.  If you find yourself wondering about "frobyts" or
  "enclosed clauses", please look them up in the jargon
! file@footnote{@url{https://jemarch.net/a68-jargon/}}.  The file is
  available online in the www and, in Gentoo, as manpages once you
  install the app-doc/a68-jargon package. Just type @command{man 7algol
  frobyt} in the terminal, for example.
*************** int i = -10;
*** 317,323 ****
  @{ Always a space after bold monadic operator @}
  int i = ABS (base + offset)
  
! @{ Spaces in dyadic opeator @}
  total := a + b;
  index := cnt +:= 1;
  total := (a + b);
--- 317,323 ----
  @{ Always a space after bold monadic operator @}
  int i = ABS (base + offset)
  
! @{ Spaces in dyadic operator @}
  total := a + b;
  index := cnt +:= 1;
  total := (a + b);
*************** mode MyString = [1:10@@]MyChar,
*** 362,368 ****
  While indexing and trimming a multiple, never put a space between the
  indexed tertiary and the SUB symbol.
  
! Do not put spaces direcly within indexers and trimmers, unless for
  indentation purposes.  As an exception to this rule, you can put a
  single space before the "at" operator @code{@@} if desired.
  
--- 362,368 ----
  While indexing and trimming a multiple, never put a space between the
  indexed tertiary and the SUB symbol.
  
! Do not put spaces directly within indexers and trimmers, unless for
  indentation purposes.  As an exception to this rule, you can put a
  single space before the "at" operator @code{@@} if desired.
  
*************** when written on a single line, just do i
*** 557,567 ****
  Start the enquiry clause in the if-part of a conditional clause right
  after the @code{if} symbol, not in the next line.
  
! The serial clauses in the then- and if-parts of the conditional clause
  shall be indented five positions right, which is the length of both
  the @code{then} and @code{else} symbols plus one.
  
! The first declaration or unit in the then- and if-parts shall be
  placed in the same line than the @code{then} and @code{else} symbols,
  respectively.
  
--- 557,567 ----
  Start the enquiry clause in the if-part of a conditional clause right
  after the @code{if} symbol, not in the next line.
  
! The serial clauses in the then- and else-parts of the conditional clause
  shall be indented five positions right, which is the length of both
  the @code{then} and @code{else} symbols plus one.
  
! The first declaration or unit in the then- and else-parts shall be
  placed in the same line than the @code{then} and @code{else} symbols,
  respectively.
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/ga68.texi gcc-16-20260725/gcc/algol68/ga68.texi
*** gcc-16-20260718/gcc/algol68/ga68.texi	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/ga68.texi	Sat Jul 25 22:32:06 2026
*************** a b c d e f g h i j k l m n o p q r s t
*** 1519,1525 ****
  A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
  0 1 2 3 4 5 6 7 8 9
  space tab " # $ % & ' ( ) * + , - . / : ; < = >  @@ [ \ ]
! ^ _ | @ ! ? ~ @{ @}
  @end example
  
  Some of the characters above were considered unworthy by the original
--- 1519,1525 ----
  A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
  0 1 2 3 4 5 6 7 8 9
  space tab " # $ % & ' ( ) * + , - . / : ; < = >  @@ [ \ ]
! ^ _ | ! ? ~ @{ @}
  @end example
  
  Some of the characters above were considered unworthy by the original
*************** values of these enquiries are also deter
*** 2084,2090 ****
  operating system targeted by the compiler.
  
  @deftypevr Constant @B{int} {int lengths}
! 1 plus the number of extra lenghts of integers which are meaningful.
  @end deftypevr
  
  @deftypevr Constant @B{int} {int shorths}
--- 2084,2090 ----
  operating system targeted by the compiler.
  
  @deftypevr Constant @B{int} {int lengths}
! 1 plus the number of extra lengths of integers which are meaningful.
  @end deftypevr
  
  @deftypevr Constant @B{int} {int shorths}
*************** The largest integral value.
*** 2096,2102 ****
  @end deftypevr
  
  @deftypevr Constant @B{int} {real lengths}
! 1 plus the number of extra lenghts of real numbers which are
  meaningful.
  @end deftypevr
  
--- 2096,2102 ----
  @end deftypevr
  
  @deftypevr Constant @B{int} {real lengths}
! 1 plus the number of extra lengths of real numbers which are
  meaningful.
  @end deftypevr
  
*************** to @code{b}.
*** 2631,2639 ****
  Monadic operator that yields the nearest integer to its operand.
  @end deftypefn
  
! @deftypefn Operator {} {@B{entier}} {= (@B{l} @B{real} a) @B{int}}
  Monadic operator that yields the integer equal to @code{a}, or the
  next integer below (more negative than) @code{a}.
  @end deftypefn
  
  @deftypefn Operator {} {@B{shorten}} {= (@B{long} @B{real} a) @B{real}}
--- 2631,2642 ----
  Monadic operator that yields the nearest integer to its operand.
  @end deftypefn
  
! @deftypefn Operator {} {@B{entier}} {= (@B{l} @B{real} a) @B{l} @B{int}}
  Monadic operator that yields the integer equal to @code{a}, or the
  next integer below (more negative than) @code{a}.
+ 
+ Selecting the @option{gnu68} dialect provides the @B{floor}
+ operator as a synonym for @B{entier}.  @xref{Extended real operators}.
  @end deftypefn
  
  @deftypefn Operator {} {@B{shorten}} {= (@B{long} @B{real} a) @B{real}}
*************** to @code{b}.
*** 2692,2698 ****
  @subsection Conversions
  
  @deftypefn Operator {} {@B{ABS}} {= (@B{char} a) @B{int}}
! Monadic operator that yields an unique integer for each permissable
  value of @code{@B{char}}.
  @end deftypefn
  
--- 2695,2701 ----
  @subsection Conversions
  
  @deftypefn Operator {} {@B{ABS}} {= (@B{char} a) @B{int}}
! Monadic operator that yields an unique integer for each permissible
  value of @code{@B{char}}.
  @end deftypefn
  
*************** which is the default.
*** 2970,2975 ****
--- 2973,2979 ----
  * Extended rows operators::            Rows and associated operations.
  * Extended boolean operators::         Operations on boolean operands.
  * Extended bits operators::            Bits and associated operations.
+ * Extended real operators::            Operations on real operands.
  * Extended math procedures::           Mathematical constants and functions.
  @end menu
  
*************** is not in the range @code{0,L_bits_width
*** 3073,3078 ****
--- 3077,3092 ----
  @B{false}.
  @end deftypefn
  
+ @node Extended real operators
+ @section Extended real operators
+ 
+ @deftypefn Operator {} {@B{floor}} {= (@B{l} @B{real} a) @B{l} @B{int}}
+ Monadic operator that yields the integer equal to @code{a} rounded
+ towards negative infinity.
+ 
+ An alias for operator @B{entier}.  @xref{Real operators}.
+ @end deftypefn
+ 
  @node Extended math procedures
  @section Extended math procedures
  
diff -Nrcpad gcc-16-20260718/gcc/algol68/ga68.vw gcc-16-20260725/gcc/algol68/ga68.vw
*** gcc-16-20260718/gcc/algol68/ga68.vw	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/algol68/ga68.vw	Sat Jul 25 22:32:06 2026
*************** b) voided to{61A} void COMORF :
*** 1434,1439 ****
--- 1434,1631 ----
      b) PROC VOID (pp) (in PROC PROC VOID pp = PROC VOID : (print (1);
              VOID : print (2)); PROC VOID (pp);) }
  
+ 7 Modes and nests
+ 
+ { The syntax in this chapter formalizes the notion of indepencence
+   that all properties contained in a given reach must hold in order to
+   avoid ambiguity in applied indicators, the identification process
+   that assures every applied indicator corresponds to an existing
+   property, the structural equivalence of modes, and finally the
+   well-formedness of modes. }
+ 
+ 7.1 Independence of properties
+ 
+ 7.1.1 Syntax
+ 
+ A) PREF :: procedure yielding : REF to.
+ B) NONPREF :: PLAIN ; STOWED ;
+               procedure with PARAMETERS yielding MOID ; UNITD ; void.
+ C) *PREFSETY :: PREF PREFSETY ; EMPTY.
+ 
+ a) WHETHER PROP1 independent PROPS2 PROP2{a,48a,c,72a} :
+      WHETHER PROP1 independent PROPS2{a,c}
+              and PROP1 independent PROP2{c}.
+ b) WHETHER PROP independent EMPTY{48a,c,72a} : WHETHER true.
+ c) WHETHER QUALITY1 TAX1
+            independent QUALITY2 TAX2{a,48a,c,72a} :
+      unless (TAX1) is (TAX2), WHETHER true ;
+      where (TAX1) is (TAX2) and (TAX1) is (TAO),
+        WHETHER QUALITY1 independent QUALITY2{d}.
+ d) WHETHER QUALITY1 independent QUALITY2{c} :
+      where QUALITY1 related QUALITY2{e,f,g,h,i,j,-},
+        WHETHER false ;
+      unless QUALITY1 related QUALITY2{e,f,g,h,i,j,-},
+        WHETHER true.
+ 
+ e) WHETHER MONO related DUO{d} : WHETHER false.
+ f) WHETHER DUO related MONO{d} : WHETHER false.
+ g) WHETHER PRAM related DYADIC{d} : WHETHER false.
+ h) WHETHER DYADIC related PRAM{d} : WHETHER false.
+ i) WHETHER procedure with MODE1 parameter MODE2 parameter
+            yielding MOID1 related
+            procedure with MODE3 parameter MODE4 parameter
+            yielding MOID2{d} :
+      WHETHER MODE1 firmly related MODE3{k}
+              and MODE2 firmly related MODE4{k}.
+ j) WHETHER procedure with MODE1 parameter yielding MOID1
+            related procedure with MODE2 parameter yielding
+            MOID2{d} :
+      WHETHER MOD1 firmly related MODE2{k}.
+ 
+ k) WHETHER MOID1 firmly related MOID2{i,j} :
+      WHETHER MOODS1 is firm MOID2{l,m}
+              or MOODS2 is firm MOID1{l,m},
+        where (MOODS1) is (MOID1)
+              or (union of MOODS1 mode) is (MOID1),
+        where (MOODS2) is (MOID2)
+              or (union of MOODS2 mode) is (MOID2).
+ l) WHETHER MOODS MOOD is firm MOID{k,l} :
+      WHETHER MOODS is firm MOID{l,m}
+              or MOOD is firm MOID{m}.
+ m) WHETHER MOID1 is firm MOID2{k,l,n,47f} :
+      WHETHER MOID1 equivalent MOID2{73a}
+              or MOID1 unites to MOID2{64b}
+              or MOID1 deprefs to firm MOID2{n}.
+ n) WHETHER MOID1 deprefs to firm MOID2{m} :
+      where (MOID1) is (PREF MOID3),
+        WHETHER MOID5 is firm MOID2{m},
+        where MOID3 deflexes to MOID5{47a,b,c} ;
+      where (MOID1) is (NONPREF), WHETHER false.
+ 
+ 7.2 Identification in nests
+ 
+ 7.2.1 Syntax
+ 
+ a) WHETHER PROP identified in NEST new PROPSETY{a,48b,542a} :
+      where PROP resides in PROPSETY{b,c,-}, WHETHER true ;
+      where PROP independent PROPSETY{71a,b,c},
+        WHETHER PROP identified in NEST{a,-}.
+ 
+ b) WHETHER PROP1 resides in PROPS2 PROP2{a,b,48d} :
+      WHETHER PROP1 resides in PROP2{c,-}
+              or PROP1 resides in PROP2{b,c,-}.
+ c) WHETHER QUALITY1 TAX resides in QUALITY2 TAX{a,b,48d} :
+      where (QUALITY1) is (label) or (QUALITY1) is (DYADIC)
+            or (QUALITY1) is (MODE field),
+        WHETHER (QUALITY1) is (QUALITY2) ;
+      where (QUALITY1) is (MOID1 TALLETY)
+            and (QUALITY2) is (MOID2 TALLETY),
+        WHETHER MOID1 equivalent MOID2{73a}.
+ 
+ 7.3 Equivalence of modes
+ 
+ 7.3.1 Syntax
+ 
+ A) SAFE :: safe ; MU has MODE SAFE ; yin SAFE ; yang SAFE ;
+            remember MOID1 MOID2 SAFE.
+ B) HEAD :: PLAIN ; PREF{71A} ; structured with ;
+            FLEXETY ROWS of ; proecedure with ; union of ; void.
+ C) TAILETY :: MOID ; FIELDS mode ; PARAMETERS yielding MOID ;
+               MOODS mode ; EMPTY.
+ D) PARTS :: PART ; PARTS PART.
+ E) PART :: FIELD ; PARAMETER.
+ 
+ a) WHETHER MOID1 equivalent MOID2{64b,71m,72c} :
+      WHETHER safe MOID1 equivalent safe MOID2{b}.
+ b) WHETHER SAFE1 MOID1 equivalent SAFE2 MOID2{a,b,e,i,j,n} :
+      where (SAFE1) contains (remember MOID1 MOID2)
+            or (SAFE2) contains (remember MOID2 MOID1),
+        WHETHER true ;
+      unless (SAFE1) contains (remember MOID1 MOID2)
+             or (SAFE2) contains (remember MOID2 MOID1),
+        WEHTHER (HEAD3) is (HEAD4)
+                and remember MOID1 MOID2 SAFE3 TAILETY3
+                equivalent SAFE4 TAILETY4{b,d,e,k,q,-},
+        where SAFE3 HEAD3 TAILETY3 develops from
+              SAFE1 MOID1{c}
+              and SAFE4 HEAD4 TAILETY4 develops from
+              SAFE2 MOID2{c}.
+ c) WHETHER SAFE2 HEAD TAILETY develops from SAFE1 MOID{b,c} :
+      where (MOID) is (HEAD TAILETY),
+        WHETHER (HEAD) shields SAFE1 to SAFE2{74a,b,c,d,-} ;
+      where (MOID) is (MU definition of MODE),
+        unless (SAFE1) contains (MU has),
+        WHETHER SAFE2 HEAD TAILETY develops from
+                MU has MODE SAFE1 MODE{c} ;
+      where (MOID) is (MU application)
+            and (SAFE1) is (NOTION MU has MODE SAFE3)
+            and (NOTION) contains (yin) and (NOTION) contains (yang),
+        WHETHER SAFE2 HEAD TEILETY develops from
+                SAFE1 MODE{c}.
+ d) WHETHER SAFE1 FIELDS1 mode
+            equivalent SAFE2 FIELDS2 mode{b} :
+      WHETHER SAFE1 FIELDS1 equivalent SAFE2 FIELDS2{f,g,h,i}.
+ e) WHETHER SAFE1 PARAMETERS1 yielding MOID1
+            equivalent SAFE2 PARAMETERS2 yielding MOID2{b} :
+      WHETHER SAFE1 PARAMETERS1
+              equivalent SAFE2 PARAMETERS2{f,g,h,j}
+              and SAFE1 MOID1 equivalent SAFE2 MOID2{b}.
+ f) WHETHER SAFE1 PARTS1 PART1
+            equivalent SAFE2 PARTS2 PART2{d,e,f} :
+      WHETHER SAFE1 PARTS1 equivalent SAFE2 PARTS2{f,g,h,i,j}
+              and SAFE1 PART1 equivalent SAFE2 PART2{i,j}.
+ g) WHETHER SAFE1 PARTS1 PART1 equivalent
+            SAFE2 PART2{d,e,f} :
+      WHETHER false.
+ h) WHETHER SAFE1 PART1 equivalent
+            SAFE2 PARTS2 PART2{d,e,f} :
+      WHETHER false.
+ i) WHETHER SAFE1 MODE1 field TAG1
+            equivalent SAFE2 MODE2 field TAG2{d,f} :
+      WHETHER (TAG1) is (TAG2)
+              and SAFE1 MODE1 equivalent SAFE2 MODE2{b}.
+ j) WHETHER SAFE1 MODE1 parameter
+            equivalent SAFE2 MODE2 parameter{e,f} :
+      WHETHER SAFE1 MODE1 equivalent SAFE2 MODE2{b}.
+ k) WHETHER SAFE1 MOODS1 mode equivalent
+            SAFE2 MOODS2 mode{b} :
+      WHETHER SAFE1 MOODS1 subset of SAFE2 MOODS2{l,m,n}
+              and SAFE2 MOODS2 subset of SAFE1 MOODS1{l,m,n}
+              and MOODS1 number equals MOODS2 number{o,p}.
+ l) WHETHER SAFE1 MOODS1 MOOD1
+            subset of SAFE2 MOODS2{k.l,46s,64b} :
+      WHETHER SAFE1 MOODS1 subset of SAFE2 MOODS2{l,m,n}
+              and SAFE1 MOOD1 subset of SAFE2 MOODS2{m,n}.
+ m) WHETHER SAFE1 MOOD1
+            subset of SAFE2 MOODS2 MOOD2{k.l,m,46s,64b} :
+      WHETHER SAFE1 MOOD1 subset of SAFE2 MOODS2{m,n}
+              or SAFE1 MOOD1 subset of SAFE2 MOOD2{n}.
+ n) WHETHER SAFE1 MOOD1 subset of SAFE2 MOOD2{k,l,m,64b} :
+      WHETHER SAFE1 MOOD1 equivalent SAFE2 MOOD2{b}.
+ o) WHETHER MOODS1 MOOD1 number equals
+            MOODS2 MOOD2 number{k,o} :
+      WHETHER MOODS1 number equals MOODS2 number{o,p,-}.
+ p) WHETHER MOOD1 number equals MOOD2 number{k.o} :
+      WHETHER true.
+ q) WHETHER SAFE1 EMPTY equivalent SAFE2 EMPTY{b} :
+      WHETHER true.
+ 
+ 7.4 Well-formedness
+ 
+ 7.4.1 Syntax
+ 
+ a) WHETHER (NOTION) shields SAFE to SAFE{73c} :
+      where (NOTION) is (PLAIN)
+            or (NOTION) is (FLEXETY ROWS of)
+            or (NOTION) is (union of) or (NOTION) is (void),
+        WHETHER true.
+ b) WHETHER (PREF) shields SAFE to yin SAFE{73c} :
+      WHETHER true.
+ c) WHETHER (structured with) shields SAFE to yang SAFE{73c} :
+      WHETHER true.
+ d) WHETHER (procedure with) shields SAFE to yin yang SAFE{73c} :
+      WHETHER true.
+ 
  8 Denotations
  
  8.1 Plain denotations
diff -Nrcpad gcc-16-20260718/gcc/c-family/ChangeLog gcc-16-20260725/gcc/c-family/ChangeLog
*** gcc-16-20260718/gcc/c-family/ChangeLog	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/c-family/ChangeLog	Sat Jul 25 22:32:06 2026
***************
*** 1,3 ****
--- 1,13 ----
+ 2026-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/126309
+ 	* c-lex.cc: Implement CWG3020 - Missing specification for
+ 	__has_cpp_attribute(indeterminate).
+ 	(c_common_has_attribute): Handle __has_cpp_attribute (indeterminate).
+ 
  2026-07-14  Jakub Jelinek  <jakub@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/gcc/c-family/c-lex.cc gcc-16-20260725/gcc/c-family/c-lex.cc
*** gcc-16-20260718/gcc/c-family/c-lex.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/c-family/c-lex.cc	Sat Jul 25 22:32:06 2026
*************** c_common_has_attribute (cpp_reader *pfil
*** 433,438 ****
--- 433,440 ----
  		result = 201907;
  	      else if (is_attribute_p ("assume", attr_name))
  		result = 202207;
+ 	      else if (is_attribute_p ("indeterminate", attr_name))
+ 		result = 202403;
  	      else if (is_attribute_p ("init_priority", attr_name))
  		{
  		  /* The (non-standard) init_priority attribute is always
diff -Nrcpad gcc-16-20260718/gcc/calls.cc gcc-16-20260725/gcc/calls.cc
*** gcc-16-20260718/gcc/calls.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/calls.cc	Sat Jul 25 22:32:06 2026
*************** load_register_parameters (struct arg_dat
*** 2252,2261 ****
  		   && !TREE_SIDE_EFFECTS (tree_value)
  		   && immediate_const_ctor_p (DECL_INITIAL (tree_value)))
  	    {
  	      rtx target = gen_reg_rtx (word_mode);
  	      store_constructor (DECL_INITIAL (tree_value), target, 0,
! 				 int_expr_size (DECL_INITIAL (tree_value)),
! 				 false);
  	      reg = gen_rtx_REG (word_mode, REGNO (reg));
  	      emit_move_insn (reg, target);
  	    }
--- 2252,2271 ----
  		   && !TREE_SIDE_EFFECTS (tree_value)
  		   && immediate_const_ctor_p (DECL_INITIAL (tree_value)))
  	    {
+ 	      HOST_WIDE_INT size = int_expr_size (DECL_INITIAL (tree_value));
  	      rtx target = gen_reg_rtx (word_mode);
  	      store_constructor (DECL_INITIAL (tree_value), target, 0,
! 				 size, false);
! 	      /* On big-endian targets, store_constructor places fields
! 		 from the MSB, which places any padding bits in the least
! 		 significant bytes.  If required, use a logical right shift
! 		 to place things where expected in a register parameter.  */
! 	      if (BYTES_BIG_ENDIAN
! 		  && size < UNITS_PER_WORD
! 		  && args[i].locate.where_pad == PAD_DOWNWARD)
! 		target = expand_shift (RSHIFT_EXPR, word_mode, target,
! 				       (UNITS_PER_WORD - size) * BITS_PER_UNIT,
! 				       NULL_RTX, 1);
  	      reg = gen_rtx_REG (word_mode, REGNO (reg));
  	      emit_move_insn (reg, target);
  	    }
diff -Nrcpad gcc-16-20260718/gcc/combine.cc gcc-16-20260725/gcc/combine.cc
*** gcc-16-20260718/gcc/combine.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/combine.cc	Sat Jul 25 22:32:06 2026
*************** make_compound_operation_int (scalar_int_
*** 8437,8442 ****
--- 8437,8448 ----
  
  	tem = make_compound_operation (inner, subreg_code);
  
+ 	/* TEM's code might be CLOBBER if combine_simplify_rtx
+ 	   could not transform a subexpression, e.g. a volatile MEM.
+ 	   simplify_subreg cannot be called with clobber, so bail out.  */
+ 	if (GET_CODE (tem) == CLOBBER)
+ 	  return NULL_RTX;
+ 
  	simplified
  	  = simplify_subreg (mode, tem, GET_MODE (inner), SUBREG_BYTE (x));
  	if (simplified)
diff -Nrcpad gcc-16-20260718/gcc/common.opt gcc-16-20260725/gcc/common.opt
*** gcc-16-20260718/gcc/common.opt	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/common.opt	Sat Jul 25 22:32:06 2026
*************** Common Var(warn_auto_profile) Warning
*** 561,568 ****
  Warn about problems with auto-profile data.
  
  Wuse-after-free
! Common Var(warn_use_after_free) Warning
! Warn for uses of pointers to deallocated storage.
  
  Wuse-after-free=
  Common Joined RejectNegative UInteger Var(warn_use_after_free) Warning IntegerRange(0, 3)
--- 561,567 ----
  Warn about problems with auto-profile data.
  
  Wuse-after-free
! Common Alias(Wuse-after-free=, 1, 0) Warning
  
  Wuse-after-free=
  Common Joined RejectNegative UInteger Var(warn_use_after_free) Warning IntegerRange(0, 3)
diff -Nrcpad gcc-16-20260718/gcc/config/aarch64/aarch64-sme.md gcc-16-20260725/gcc/config/aarch64/aarch64-sme.md
*** gcc-16-20260718/gcc/config/aarch64/aarch64-sme.md	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/config/aarch64/aarch64-sme.md	Sat Jul 25 22:32:06 2026
***************
*** 1067,1074 ****
  ;;      __arm_streaming __arm_out ("zt0");
  (define_insn "@aarch64_sme_write_zt<SVE_FULL:mode>"
    [(set (reg:V8DI ZT0_REGNUM)
! 	(unspec_volatile:V8DI
! 	  [(match_operand:SVE_FULL 0 "register_operand" "w")
  	   (match_operand:DI       1 "const_int_operand")]
  	  UNSPEC_SME_WRITE))]
    "TARGET_SME_LUTv2 && TARGET_STREAMING"
--- 1067,1076 ----
  ;;      __arm_streaming __arm_out ("zt0");
  (define_insn "@aarch64_sme_write_zt<SVE_FULL:mode>"
    [(set (reg:V8DI ZT0_REGNUM)
! 	(unspec:V8DI
! 	  [(reg:V8DI ZT0_REGNUM)
! 	   (reg:DI SME_STATE_REGNUM)
! 	   (match_operand:SVE_FULL 0 "register_operand" "w")
  	   (match_operand:DI       1 "const_int_operand")]
  	  UNSPEC_SME_WRITE))]
    "TARGET_SME_LUTv2 && TARGET_STREAMING"
diff -Nrcpad gcc-16-20260718/gcc/config/aarch64/aarch64.cc gcc-16-20260725/gcc/config/aarch64/aarch64.cc
*** gcc-16-20260718/gcc/config/aarch64/aarch64.cc	Sat Jul 18 22:32:06 2026
--- gcc-16-20260725/gcc/config/aarch64/aarch64.cc	Sat Jul 25 22:32:06 2026
*************** aarch64_start_call_args (cumulative_args
*** 12204,12210 ****
      emit_insn (gen_aarch64_start_private_za_call ());
  
    /* If this is a call to a shared-ZA function that doesn't share ZT0,
!      save and restore ZT0 around the call.  */
    if (aarch64_cfun_has_state ("zt0")
        && (ca->isa_mode & AARCH64_ISA_MODE_ZA_ON)
        && ca->shared_zt0_flags == 0)
--- 12204,12211 ----
      emit_insn (gen_aarch64_start_private_za_call ());
  
    /* If this is a call to a shared-ZA function that doesn't share ZT0,
!      save and restore ZT0 around the call.  If ZA is not shared, then the
!      save/restore is instead emitted by aarch64_mode_emit_local_sme_state.  */
    if (aarch64_cfun_has_state ("zt0")
        && (ca->isa_mode & AARCH64_ISA_MODE_ZA_ON)
        && ca->shared_zt0_flags == 0)
*************** aarch64_mode_emit_local_sme_state (aarch
*** 31984,31990 ****
        emit_insn (gen_aarch64_tpidr2_save ());
        emit_insn (gen_aarch64_clear_tpidr2 ());
        if (mode == aarch64_local_sme_state::ACTIVE_LIVE
! 	  || mode == aarch64_local_sme_state::ACTIVE_DEAD)
  	{
  	  if (aarch64_cfun_has_state ("za"))
  	    emit_insn (gen_aarch64_initial_zero_za ());
--- 31985,31992 ----
        emit_insn (gen_aarch64_tpidr2_save ());
        emit_insn (gen_aarch64_clear_tpidr2 ());
        if (mode == aarch64_local_sme_state::ACTIVE_LIVE
! 	  || mode == aarch64_local_sme_state::ACTIVE_DEAD
! 	  || mode == aarch64_local_sme_state::INACTIVE_LOCAL)
  	{
  	  if (aarch64_cfun_has_state ("za"))
  	    emit_insn (gen_aarch64_initial_zero_za ());
*************** aarch64_mode_emit_local_sme_state (aarch
*** 32066,32071 ****
--- 32068,32083 ----
  
    if (mode == aarch64_local_sme_state::INACTIVE_LOCAL)
      {
+       if (prev_mode == aarch64_local_sme_state::INACTIVE_CALLER)
+ 	/* Enable ZA (if it wasn't already enabled on entry).  Enabling ZA has
+ 	   the side-effect of zeroing ZA.
+ 
+ 	   A functionally correct alternative would be to leave TPIDR2_EL0 null
+ 	   and zero the save buffer.  However, zeroing the save buffer would require
+ 	   more code and would optimize for the case in which a callee also
+ 	   initialises private ZA state (which should be a rare event).  */
+ 	emit_insn (gen_aarch64_smstart_za ());
+ 
        if (prev_mode == aarch64_local_sme_state::ACTIVE_LIVE
  	  || prev_mode == aarch64_local_sme_state::ACTIVE_DEAD
  	  || prev_mode == aarch64_local_sme_state::INACTIVE_CALLER)
*************** aarch64_mode_confluence (int entity, int
*** 32395,32401 ****
  }
  
  /* Implement TARGET_MODE_BACKPROP for an entity that either stays
!    NO throughput, or makes one transition from NO to YES.  */
  
  static aarch64_tristate_mode
  aarch64_one_shot_backprop (aarch64_tristate_mode mode1,
--- 32407,32413 ----
  }
  
  /* Implement TARGET_MODE_BACKPROP for an entity that either stays
!    NO throughout, or makes one transition from NO to YES.  */
  
  static aarch64_tristate_mode
  aarch64_one_shot_backprop (aarch64_tristate_mode mode1,
diff -Nrcpad gcc-16-20260718/gcc/config/bpf/bpf.cc gcc-16-20260725/gcc/config/bpf/bpf.cc
*** gcc-16-20260718/gcc/config/bpf/bpf.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/bpf/bpf.cc	Sat Jul 25 22:32:06 2026
*************** bpf_legitimate_address_p (machine_mode m
*** 602,615 ****
     `rtx_cost' should recurse.  */
  
  static bool
! bpf_rtx_costs (rtx x ATTRIBUTE_UNUSED,
  	       enum machine_mode mode ATTRIBUTE_UNUSED,
  	       int outer_code ATTRIBUTE_UNUSED,
  	       int opno ATTRIBUTE_UNUSED,
!                int *total ATTRIBUTE_UNUSED,
  	       bool speed ATTRIBUTE_UNUSED)
  {
!   /* To be written.  */
    return false;
  }
  
--- 602,638 ----
     `rtx_cost' should recurse.  */
  
  static bool
! bpf_rtx_costs (rtx x,
  	       enum machine_mode mode ATTRIBUTE_UNUSED,
  	       int outer_code ATTRIBUTE_UNUSED,
  	       int opno ATTRIBUTE_UNUSED,
! 	       int *total,
  	       bool speed ATTRIBUTE_UNUSED)
  {
!   switch (GET_CODE (x))
!     {
!     case MULT:
!     case DIV:
!     case UDIV:
!     case MOD:
!     case UMOD:
!       /* BPF implements these as a single instruction, so keep the native
! 	 operation cheaper than synthesized sequence.
! 	 Only influences choice between actually available alternatives;
! 	 if the operation has no insn (e.g. a 64-bit signed divide before
! 	 -mcpu=v4) expand_divmod () still falls back to a libcall.
! 	 Return false so caller rtx_cost keeps recursing for operands.  */
!       *total = COSTS_N_INSNS (1);
!       return false;
! 
!     case CONST_INT:
!       /* Signed 32-bit imm is free, wider needs an extra LD_IMM64.  */
!       *total = BPF_IMM32_P (x) ? 0 : COSTS_N_INSNS (1);
!       return true;
! 
!     default:
!       return false;
!     }
    return false;
  }
  
*************** bpf_insn_cost (rtx_insn *insn, bool spee
*** 625,631 ****
       && XINT (XEXP (pat, 1), 1) == UNSPEC_CORE_RELOC)
      return COSTS_N_INSNS (100);
  
!   return COSTS_N_INSNS (1);
  }
  
  #undef TARGET_INSN_COST
--- 648,654 ----
       && XINT (XEXP (pat, 1), 1) == UNSPEC_CORE_RELOC)
      return COSTS_N_INSNS (100);
  
!   return pattern_cost (pat, speed);
  }
  
  #undef TARGET_INSN_COST
*************** bpf_asm_named_section (const char *name,
*** 1245,1251 ****
       characters.  This includes for example names like /foo//bar/baz.
       This makes it necessary to quote section names to make sure the
       assembler doesn't get confused.  For example, the example above
!      would be interpreted unqouted as a section name "/foo" followed
       by a line comment "//bar/baz".
  
       Note that we only quote the section name if it contains any
--- 1268,1274 ----
       characters.  This includes for example names like /foo//bar/baz.
       This makes it necessary to quote section names to make sure the
       assembler doesn't get confused.  For example, the example above
!      would be interpreted unquoted as a section name "/foo" followed
       by a line comment "//bar/baz".
  
       Note that we only quote the section name if it contains any
diff -Nrcpad gcc-16-20260718/gcc/config/bpf/bpf.h gcc-16-20260725/gcc/config/bpf/bpf.h
*** gcc-16-20260718/gcc/config/bpf/bpf.h	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/bpf/bpf.h	Sat Jul 25 22:32:06 2026
*************** enum reg_class
*** 526,529 ****
--- 526,534 ----
  
  #define ASSEMBLER_DIALECT ((int) asm_dialect)
  
+ /*** Utilitiy/helpers.  */
+ 
+ #define BPF_IMM32_P(X)				\
+   (CONST_INT_P (X) && (INTVAL (X) == (HOST_WIDE_INT) (int32_t) INTVAL (X)))
+ 
  #endif /* ! GCC_BPF_H */
diff -Nrcpad gcc-16-20260718/gcc/config/bpf/core-builtins.cc gcc-16-20260725/gcc/config/bpf/core-builtins.cc
*** gcc-16-20260718/gcc/config/bpf/core-builtins.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/bpf/core-builtins.cc	Sat Jul 25 22:32:06 2026
*************** remove_parser_plugin ()
*** 264,270 ****
  
  /* Helper compare functions used to verify if multiple builtin calls contain
     the same argument as input.  In that case the builtin calls can be optimized
!    out by identifying redundat calls.  This happen since the internal
     __core_reloc builtin is marked as PURE.  */
  
  static inline bool
--- 264,270 ----
  
  /* Helper compare functions used to verify if multiple builtin calls contain
     the same argument as input.  In that case the builtin calls can be optimized
!    out by identifying redundant calls.  This happen since the internal
     __core_reloc builtin is marked as PURE.  */
  
  static inline bool
*************** bpf_require_core_support ()
*** 1063,1075 ****
  
  /* BPF Compile Once - Run Everywhere (CO-RE) support.  Construct a CO-RE
     relocation record in DATA to be emitted in the .BTF.ext
!    section.  Does nothing if we are not targetting BPF CO-RE, or if the
     constructed relocation would be a no-op.  */
  
  static void
  make_core_relo (struct cr_final *data, rtx_code_label *label)
  {
!   /* If we are not targetting BPF CO-RE, do not make a relocation.  We
       might not be generating any debug info at all.  */
    if (!bpf_require_core_support ())
      return;
--- 1063,1075 ----
  
  /* BPF Compile Once - Run Everywhere (CO-RE) support.  Construct a CO-RE
     relocation record in DATA to be emitted in the .BTF.ext
!    section.  Does nothing if we are not targeting BPF CO-RE, or if the
     constructed relocation would be a no-op.  */
  
  static void
  make_core_relo (struct cr_final *data, rtx_code_label *label)
  {
!   /* If we are not targeting BPF CO-RE, do not make a relocation.  We
       might not be generating any debug info at all.  */
    if (!bpf_require_core_support ())
      return;
*************** bpf_handle_plugin_finish_type (void *eve
*** 1207,1213 ****
  
  /* Initializes support information to process CO-RE builtins.
     Defines information for the builtin processing, such as helper functions to
!    support the builtin convertion.  */
  
  void
  bpf_init_core_builtins (void)
--- 1207,1213 ----
  
  /* Initializes support information to process CO-RE builtins.
     Defines information for the builtin processing, such as helper functions to
!    support the builtin conversion.  */
  
  void
  bpf_init_core_builtins (void)
*************** void
*** 1660,1666 ****
  bpf_output_core_reloc (rtx *operands, int nr_ops)
  {
    /* Search for an UNSPEC_CORE_RELOC within the operands of the emitting
!      intructions.  */
    rtx unspec_exp = NULL_RTX;
    for (int i = 0; i < nr_ops; i++)
      {
--- 1660,1666 ----
  bpf_output_core_reloc (rtx *operands, int nr_ops)
  {
    /* Search for an UNSPEC_CORE_RELOC within the operands of the emitting
!      instructions.  */
    rtx unspec_exp = NULL_RTX;
    for (int i = 0; i < nr_ops; i++)
      {
*************** core_make_builtins (tree *tp, int *walk_
*** 1910,1916 ****
  
        tree new_expr = core_expr_with_field_expr_plus_base (base, expr, true);
  
!       /* Abort convertion if it is just a pointer or a reference to an
  	 attributed type.  */
        if (new_expr != expr)
  	{
--- 1910,1916 ----
  
        tree new_expr = core_expr_with_field_expr_plus_base (base, expr, true);
  
!       /* Abort conversion if it is just a pointer or a reference to an
  	 attributed type.  */
        if (new_expr != expr)
  	{
diff -Nrcpad gcc-16-20260718/gcc/config/bpf/predicates.md gcc-16-20260725/gcc/config/bpf/predicates.md
*** gcc-16-20260718/gcc/config/bpf/predicates.md	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/bpf/predicates.md	Sat Jul 25 22:32:06 2026
***************
*** 23,30 ****
         (match_operand 0 "register_operand")))
  
  (define_predicate "imm32_operand"
!   (ior (and (match_code "const_int")
!             (match_test "IN_RANGE (INTVAL (op), 0, 0xffffffff)"))
         (match_code "symbol_ref,label_ref,const")))
  
  (define_predicate "core_imm_operand"
--- 23,29 ----
         (match_operand 0 "register_operand")))
  
  (define_predicate "imm32_operand"
!   (ior (match_test "BPF_IMM32_P (op)")
         (match_code "symbol_ref,label_ref,const")))
  
  (define_predicate "core_imm_operand"
diff -Nrcpad gcc-16-20260718/gcc/config/gcn/gcn-devices.def gcc-16-20260725/gcc/config/gcn/gcn-devices.def
*** gcc-16-20260718/gcc/config/gcn/gcn-devices.def	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/gcn/gcn-devices.def	Sat Jul 25 22:32:06 2026
*************** GCN_DEVICE(gfx9-generic, GFX9_GENERIC, 0
*** 206,212 ****
  
  GCN_DEVICE(gfx9-4-generic, GFX9_4_GENERIC, 0x05f, ISA_CDNA3,
  	   /* XNACK default */ HSACO_ATTR_ANY,
! 	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
  	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
  	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
  	   /* Max ISA VGPRs */ 256,
--- 206,212 ----
  
  GCN_DEVICE(gfx9-4-generic, GFX9_4_GENERIC, 0x05f, ISA_CDNA3,
  	   /* XNACK default */ HSACO_ATTR_ANY,
! 	   /* SRAM_ECC default */ HSACO_ATTR_ANY,
  	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
  	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
  	   /* Max ISA VGPRs */ 256,
diff -Nrcpad gcc-16-20260718/gcc/config/i386/i386.cc gcc-16-20260725/gcc/config/i386/i386.cc
*** gcc-16-20260718/gcc/config/i386/i386.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/i386/i386.cc	Sat Jul 25 22:32:06 2026
*************** struct stack_access_data
*** 8625,8642 ****
    unsigned int *stack_alignment;
  };
  
! /* Return true if OP references an argument passed on stack.  */
  
  static bool
! ix86_argument_passed_on_stack_p (const_rtx op)
  {
    tree mem_expr = MEM_EXPR (op);
!   if (mem_expr)
!     {
!       tree var = get_base_address (mem_expr);
!       return TREE_CODE (var) == PARM_DECL;
!     }
!   return false;
  }
  
  /* Update the maximum stack slot alignment from memory alignment in PAT.  */
--- 8625,8677 ----
    unsigned int *stack_alignment;
  };
  
! /* SET stores into OP, a MEM linked to parameter BASE.  Return true if
!    SET stores BASE's argument register into OP.  This is a spill: the
!    callee saves its own register argument to the stack.  It is not a
!    stack argument set up by the caller:
! 
!      (set (mem/c:V2DI (plus:DI (reg/f:DI 7 sp)
! 		(const_int -16 [0xfffffffffffffff0])) [4 a1+0 S16 A128])
! 	  (reg:V2DI 20 xmm0 [ a1 ]))
!  */
  
  static bool
! ix86_spill_register_argument_p (const_rtx set, const_rtx op, tree base)
! {
!   rtx src = SET_SRC (set);
! 
!   /* Not a hard register store, so not a spill.  */
!   if (!REG_P (src) || !HARD_REGISTER_P (src))
!     return false;
! 
!   rtx dest = SET_DEST (set);
!   tree reg_expr = REG_EXPR (src);
! 
!   return dest == op && reg_expr == base;
! }
! 
! /* Return true if OP, found in PAT, is a stack argument set up by the
!    caller.  Return false if OP is a register argument that the callee
!    spilled to its own stack frame.  Both cases share the same MEM_EXPR,
!    so we must check PAT to tell them apart.  */
! 
! static bool
! ix86_argument_passed_on_stack_p (const_rtx op, const_rtx pat)
  {
    tree mem_expr = MEM_EXPR (op);
!   if (!mem_expr)
!     return false;
! 
!   tree var = get_base_address (mem_expr);
!   if (TREE_CODE (var) != PARM_DECL)
!     return false;
! 
!   /* PAT is always a single SET here: note_stores splits PARALLEL
!      patterns into separate SETs before calling this function.  */
!   if (GET_CODE (pat) == SET)
!     return !ix86_spill_register_argument_p (pat, op, var);
! 
!   return true;
  }
  
  /* Update the maximum stack slot alignment from memory alignment in PAT.  */
*************** ix86_update_stack_alignment (rtx, const_
*** 8658,8664 ****
  	     responsible to align the outgoing stack for arguments
  	     passed on stack.  */
  	  if (reg_mentioned_p (p->reg, XEXP (op, 0))
! 	      && !ix86_argument_passed_on_stack_p (op))
  	    {
  	      unsigned int alignment = MEM_ALIGN (op);
  
--- 8693,8699 ----
  	     responsible to align the outgoing stack for arguments
  	     passed on stack.  */
  	  if (reg_mentioned_p (p->reg, XEXP (op, 0))
! 	      && !ix86_argument_passed_on_stack_p (op, pat))
  	    {
  	      unsigned int alignment = MEM_ALIGN (op);
  
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/constraints.md gcc-16-20260725/gcc/config/rs6000/constraints.md
*** gcc-16-20260718/gcc/config/rs6000/constraints.md	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/constraints.md	Sat Jul 25 22:32:06 2026
***************
*** 99,104 ****
--- 99,108 ----
    "@internal Like @code{b}, if @option{-mpowerpc64} is used; otherwise,
     @code{NO_REGS}.")
  
+ (define_register_constraint "wD" "rs6000_constraints[RS6000_CONSTRAINT_wD]"
+   "@internal Floating point register @code{FPR} if TARGET_MMA is enabled.
+   1024 bit Dense math register @code{DMR} if TARGET_DMF is enabled.")
+ 
  ;; wB needs ISA 2.07 VUPKHSW
  (define_constraint "wB"
    "@internal Signed 5-bit constant integer that can be loaded into an
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/mma.md gcc-16-20260725/gcc/config/rs6000/mma.md
*** gcc-16-20260718/gcc/config/rs6000/mma.md	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/mma.md	Sat Jul 25 22:32:06 2026
***************
*** 24,30 ****
  ;; __vector_pair types that the MMA built-in functions reference.  We
  ;; use OPAQUE_MODE to prevent anything from trying to open them up.
  
! (define_constants [(MAX_MMA_OPERANDS 7)])
  
  ;; Constants for creating unspecs
  
--- 24,30 ----
  ;; __vector_pair types that the MMA built-in functions reference.  We
  ;; use OPAQUE_MODE to prevent anything from trying to open them up.
  
! (define_constants [(MAX_MMA_OPERANDS 9)])
  
  ;; Constants for creating unspecs
  
***************
*** 91,96 ****
--- 91,129 ----
     UNSPEC_MMA_XVI8GER4SPP
     UNSPEC_MMA_XXMFACC
     UNSPEC_MMA_XXMTACC
+    UNSPEC_DMF_INSERT512
+    UNSPEC_DMF_EXTRACT512
+    UNSPEC_DMF_INSERT1024
+    UNSPEC_DMF_RELOAD_FROM_MEMORY
+    UNSPEC_DMF_RELOAD_TO_MEMORY
+    UNSPEC_DMF_DMXOR
+    UNSPEC_DMF_DMXVI8GERX4
+    UNSPEC_DMF_DMXVI8GERX4PP
+    UNSPEC_DMF_PMDMXVI8GERX4
+    UNSPEC_DMF_PMDMXVI8GERX4PP
+    UNSPEC_DMF_DMSETDMRZ
+    UNSPEC_DMF_DMXVI8GERX4SPP
+    UNSPEC_DMF_PMDMXVI8GERX4SPP
+    UNSPEC_DMF_DMXVBF16GERX2
+    UNSPEC_DMF_DMXVBF16GERX2PP
+    UNSPEC_DMF_DMXVBF16GERX2PN
+    UNSPEC_DMF_DMXVBF16GERX2NP
+    UNSPEC_DMF_DMXVBF16GERX2NN
+    UNSPEC_DMF_PMDMXVBF16GERX2
+    UNSPEC_DMF_PMDMXVBF16GERX2PP
+    UNSPEC_DMF_PMDMXVBF16GERX2PN
+    UNSPEC_DMF_PMDMXVBF16GERX2NP
+    UNSPEC_DMF_PMDMXVBF16GERX2NN
+    UNSPEC_DMF_DMXVF16GERX2
+    UNSPEC_DMF_DMXVF16GERX2PP
+    UNSPEC_DMF_DMXVF16GERX2PN
+    UNSPEC_DMF_DMXVF16GERX2NP
+    UNSPEC_DMF_DMXVF16GERX2NN
+    UNSPEC_DMF_PMDMXVF16GERX2
+    UNSPEC_DMF_PMDMXVF16GERX2PP
+    UNSPEC_DMF_PMDMXVF16GERX2PN
+    UNSPEC_DMF_PMDMXVF16GERX2NP
+    UNSPEC_DMF_PMDMXVF16GERX2NN
    ])
  
  (define_c_enum "unspecv"
***************
*** 133,144 ****
--- 166,194 ----
  ;; MMA instructions with 1 vector pair and 1 vector arguments
  (define_int_iterator MMA_PV		[UNSPEC_MMA_XVF64GER])
  
+ ; DMF instructions with 1 vector pair and 1 vector arguments
+ (define_int_iterator DMF_PV		[UNSPEC_DMF_DMXVI8GERX4
+ 					 UNSPEC_DMF_DMXVBF16GERX2
+ 					 UNSPEC_DMF_DMXVF16GERX2])
+ 
  ;; MMA instructions with 1 accumulator, 1 vector pair and 1 vector arguments
  (define_int_iterator MMA_APV		[UNSPEC_MMA_XVF64GERPP
  					 UNSPEC_MMA_XVF64GERPN
  					 UNSPEC_MMA_XVF64GERNP
  					 UNSPEC_MMA_XVF64GERNN])
  
+ ;; DMF instructions with 1 dmr, 1 vector pair and 1 vector arguments
+ (define_int_iterator DMF_DPV		[UNSPEC_DMF_DMXVI8GERX4PP
+ 					 UNSPEC_DMF_DMXVI8GERX4SPP
+ 					 UNSPEC_DMF_DMXVBF16GERX2PP
+ 					 UNSPEC_DMF_DMXVBF16GERX2PN
+ 					 UNSPEC_DMF_DMXVBF16GERX2NP
+ 					 UNSPEC_DMF_DMXVBF16GERX2NN
+ 					 UNSPEC_DMF_DMXVF16GERX2PP
+ 					 UNSPEC_DMF_DMXVF16GERX2PN
+ 					 UNSPEC_DMF_DMXVF16GERX2NP
+ 					 UNSPEC_DMF_DMXVF16GERX2NN])
+ 
  ;; MMA instructions with 2 vector, 2 4-bit and 1 8-bit arguments
  (define_int_iterator MMA_VVI4I4I8	[UNSPEC_MMA_PMXVI4GER8])
  
***************
*** 188,193 ****
--- 238,268 ----
  (define_int_iterator MMA_AVVI4I4I4	[UNSPEC_MMA_PMXVI8GER4PP
  					 UNSPEC_MMA_PMXVI8GER4SPP])
  
+ ; DMF instructions with 1 vector pair, 1 vector and 1 8-bit and 2 4-bit
+ ;; arguments
+ (define_int_iterator DMF_PVI8I4I4	[UNSPEC_DMF_PMDMXVI8GERX4])
+ 
+ ;; DMF instructions with 1 dmr, 1 vector pair, 1 vector and 1 8-bit and
+ ;; 2 4-bit arguments
+ (define_int_iterator DMF_DPVI8I4I4	[UNSPEC_DMF_PMDMXVI8GERX4PP
+ 					 UNSPEC_DMF_PMDMXVI8GERX4SPP])
+ 
+ ;; DMF instructions with 1 vector pair, 1 vector, 1 8-bit, 1 4-bit
+ ;; and 1 2-bit arguments
+ (define_int_iterator DMF_PVI8I4I2      [UNSPEC_DMF_PMDMXVBF16GERX2
+ 					 UNSPEC_DMF_PMDMXVF16GERX2])
+ 
+ ;; DMF instructions with 1dmr, 1 vector pair, 1 vector, 1 8-bit,
+ ;; 1 4-bit and 1 2-bit arguments
+ (define_int_iterator DMF_DPVI8I4I2     [UNSPEC_DMF_PMDMXVBF16GERX2PP
+ 					UNSPEC_DMF_PMDMXVBF16GERX2PN
+ 					UNSPEC_DMF_PMDMXVBF16GERX2NP
+ 					UNSPEC_DMF_PMDMXVBF16GERX2NN
+ 					UNSPEC_DMF_PMDMXVF16GERX2PP
+ 					UNSPEC_DMF_PMDMXVF16GERX2PN
+ 					UNSPEC_DMF_PMDMXVF16GERX2NP
+ 					UNSPEC_DMF_PMDMXVF16GERX2NN])
+ 
  (define_int_attr acc		[(UNSPEC_MMA_XXMFACC		"xxmfacc")
  				 (UNSPEC_MMA_XXMTACC		"xxmtacc")])
  
***************
*** 217,229 ****
  				 (UNSPEC_MMA_XVF32GERNP		"xvf32gernp")
  				 (UNSPEC_MMA_XVF32GERNN		"xvf32gernn")])
  
! (define_int_attr pv		[(UNSPEC_MMA_XVF64GER		"xvf64ger")])
  
  (define_int_attr apv		[(UNSPEC_MMA_XVF64GERPP		"xvf64gerpp")
  				 (UNSPEC_MMA_XVF64GERPN		"xvf64gerpn")
  				 (UNSPEC_MMA_XVF64GERNP		"xvf64gernp")
  				 (UNSPEC_MMA_XVF64GERNN		"xvf64gernn")])
  
  (define_int_attr vvi4i4i8	[(UNSPEC_MMA_PMXVI4GER8		"pmxvi4ger8")])
  
  (define_int_attr avvi4i4i8	[(UNSPEC_MMA_PMXVI4GER8PP	"pmxvi4ger8pp")])
--- 292,318 ----
  				 (UNSPEC_MMA_XVF32GERNP		"xvf32gernp")
  				 (UNSPEC_MMA_XVF32GERNN		"xvf32gernn")])
  
! (define_int_attr pv		[(UNSPEC_MMA_XVF64GER		"xvf64ger")
! 				 (UNSPEC_DMF_DMXVI8GERX4        "dmxvi8gerx4")
! 				 (UNSPEC_DMF_DMXVBF16GERX2      "dmxvbf16gerx2")
! 				 (UNSPEC_DMF_DMXVF16GERX2	"dmxvf16gerx2")])
  
  (define_int_attr apv		[(UNSPEC_MMA_XVF64GERPP		"xvf64gerpp")
  				 (UNSPEC_MMA_XVF64GERPN		"xvf64gerpn")
  				 (UNSPEC_MMA_XVF64GERNP		"xvf64gernp")
  				 (UNSPEC_MMA_XVF64GERNN		"xvf64gernn")])
  
+ (define_int_attr dpv		[(UNSPEC_DMF_DMXVI8GERX4PP	"dmxvi8gerx4pp")
+ 				 (UNSPEC_DMF_DMXVI8GERX4SPP	"dmxvi8gerx4spp")
+ 				 (UNSPEC_DMF_DMXVBF16GERX2PP	"dmxvbf16gerx2pp")
+ 				 (UNSPEC_DMF_DMXVBF16GERX2PN	"dmxvbf16gerx2pn")
+ 				 (UNSPEC_DMF_DMXVBF16GERX2NP	"dmxvbf16gerx2np")
+ 				 (UNSPEC_DMF_DMXVBF16GERX2NN	"dmxvbf16gerx2nn")
+ 				 (UNSPEC_DMF_DMXVF16GERX2PP	"dmxvf16gerx2pp")
+ 				 (UNSPEC_DMF_DMXVF16GERX2PN	"dmxvf16gerx2pn")
+ 				 (UNSPEC_DMF_DMXVF16GERX2NP	"dmxvf16gerx2np")
+ 				 (UNSPEC_DMF_DMXVF16GERX2NN	"dmxvf16gerx2nn")])
+ 
  (define_int_attr vvi4i4i8	[(UNSPEC_MMA_PMXVI4GER8		"pmxvi4ger8")])
  
  (define_int_attr avvi4i4i8	[(UNSPEC_MMA_PMXVI4GER8PP	"pmxvi4ger8pp")])
***************
*** 263,268 ****
--- 352,373 ----
  (define_int_attr avvi4i4i4	[(UNSPEC_MMA_PMXVI8GER4PP	"pmxvi8ger4pp")
  				 (UNSPEC_MMA_PMXVI8GER4SPP	"pmxvi8ger4spp")])
  
+ (define_int_attr pvi8i4i4	[(UNSPEC_DMF_PMDMXVI8GERX4      "pmdmxvi8gerx4")])
+ 
+ (define_int_attr dpvi8i4i4	[(UNSPEC_DMF_PMDMXVI8GERX4PP    "pmdmxvi8gerx4pp")
+ 				 (UNSPEC_DMF_PMDMXVI8GERX4SPP   "pmdmxvi8gerx4spp")])
+ 
+ (define_int_attr pvi8i4i2	[(UNSPEC_DMF_PMDMXVBF16GERX2	"pmdmxvbf16gerx2")
+ 				 (UNSPEC_DMF_PMDMXVF16GERX2	"pmdmxvf16gerx2")])
+ 
+ (define_int_attr dpvi8i4i2	[(UNSPEC_DMF_PMDMXVBF16GERX2PP "pmdmxvbf16gerx2pp")
+ 				 (UNSPEC_DMF_PMDMXVBF16GERX2PN  "pmdmxvbf16gerx2pn")
+ 				 (UNSPEC_DMF_PMDMXVBF16GERX2NP  "pmdmxvbf16gerx2np")
+ 				 (UNSPEC_DMF_PMDMXVBF16GERX2NN  "pmdmxvbf16gerx2nn")
+ 				 (UNSPEC_DMF_PMDMXVF16GERX2PP	"pmdmxvf16gerx2pp")
+ 				 (UNSPEC_DMF_PMDMXVF16GERX2PN	"pmdmxvf16gerx2pn")
+ 				 (UNSPEC_DMF_PMDMXVF16GERX2NP	"pmdmxvf16gerx2np")
+ 				 (UNSPEC_DMF_PMDMXVF16GERX2NN	"pmdmxvf16gerx2nn")])
  
  ;; Vector pair support.  OOmode can only live in VSRs.
  (define_expand "movoo"
***************
*** 270,276 ****
  	(match_operand:OO 1 "input_operand"))]
    ""
  {
!   if (TARGET_MMA)
      {
        rs6000_emit_move (operands[0], operands[1], OOmode);
        DONE;
--- 375,381 ----
  	(match_operand:OO 1 "input_operand"))]
    ""
  {
!   if (TARGET_MMA || TARGET_DMF)
      {
        rs6000_emit_move (operands[0], operands[1], OOmode);
        DONE;
***************
*** 295,301 ****
  (define_insn_and_split "*movoo"
    [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa")
  	(match_operand:OO 1 "input_operand" "ZwO,wa,wa"))]
!   "TARGET_MMA
     && (gpc_reg_operand (operands[0], OOmode)
         || gpc_reg_operand (operands[1], OOmode))"
    "@
--- 400,406 ----
  (define_insn_and_split "*movoo"
    [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa")
  	(match_operand:OO 1 "input_operand" "ZwO,wa,wa"))]
!   "(TARGET_MMA || TARGET_DMF)
     && (gpc_reg_operand (operands[0], OOmode)
         || gpc_reg_operand (operands[1], OOmode))"
    "@
***************
*** 339,348 ****
      gcc_assert (false);
  })
  
! (define_insn_and_split "*movxo"
!   [(set (match_operand:XO 0 "nonimmediate_operand" "=d,ZwO,d")
! 	(match_operand:XO 1 "input_operand" "ZwO,d,d"))]
!   "TARGET_MMA
     && (gpc_reg_operand (operands[0], XOmode)
         || gpc_reg_operand (operands[1], XOmode))"
    "@
--- 444,453 ----
      gcc_assert (false);
  })
  
! (define_insn_and_split "*movxo_nodmf"
!   [(set (match_operand:XO 0 "nonimmediate_operand" "=wD,ZwO,wD")
! 	(match_operand:XO 1 "input_operand" "ZwO,wD,wD"))]
!   "TARGET_MMA && !TARGET_DMF
     && (gpc_reg_operand (operands[0], XOmode)
         || gpc_reg_operand (operands[1], XOmode))"
    "@
***************
*** 359,369 ****
     (set_attr "length" "*,*,16")
     (set_attr "max_prefixed_insns" "2,2,*")])
  
  (define_expand "vsx_assemble_pair"
    [(match_operand:OO 0 "vsx_register_operand")
     (match_operand:V16QI 1 "mma_assemble_input_operand")
     (match_operand:V16QI 2 "mma_assemble_input_operand")]
!   "TARGET_MMA"
  {
    rtx src = gen_rtx_UNSPEC (OOmode,
  			    gen_rtvec (2, operands[1], operands[2]),
--- 464,499 ----
     (set_attr "length" "*,*,16")
     (set_attr "max_prefixed_insns" "2,2,*")])
  
+ (define_insn_and_split "*movxo_dmf"
+   [(set (match_operand:XO 0 "nonimmediate_operand" "=wa,ZwO,wa,wD,wD,wa")
+         (match_operand:XO 1 "input_operand"        "ZwO,wa, wa,wa,wD,wD"))]
+   "TARGET_DMF
+    && (gpc_reg_operand (operands[0], XOmode)
+        || gpc_reg_operand (operands[1], XOmode))"
+   "@
+    #
+    #
+    #
+    dmxxinstdmr512 %0,%x1,%W1,0
+    dmmr %0,%1
+    dmxxextfdmr512 %x0,%W0,%1,0"
+   "&& reload_completed
+    && !dmr_register_operand (operands[0], XOmode)
+    && !dmr_register_operand (operands[1], XOmode)"
+   [(const_int 0)]
+ {
+   rs6000_split_multireg_move (operands[0], operands[1]);
+   DONE;
+ }
+   [(set_attr "type" "vecload,vecstore,veclogical,dmf,dmf,dmf")
+    (set_attr "length" "*,*,16,*,*,*")
+    (set_attr "max_prefixed_insns" "2,2,*,*,*,*")])
+ 
  (define_expand "vsx_assemble_pair"
    [(match_operand:OO 0 "vsx_register_operand")
     (match_operand:V16QI 1 "mma_assemble_input_operand")
     (match_operand:V16QI 2 "mma_assemble_input_operand")]
!   "TARGET_MMA || TARGET_DMF"
  {
    rtx src = gen_rtx_UNSPEC (OOmode,
  			    gen_rtvec (2, operands[1], operands[2]),
***************
*** 380,386 ****
  	(unspec:OO [(match_operand:V16QI 1 "mma_assemble_input_operand" "mwa")
  		    (match_operand:V16QI 2 "mma_assemble_input_operand" "mwa")]
  		   UNSPEC_VSX_ASSEMBLE))]
!   "TARGET_MMA"
    "#"
    "&& reload_completed"
    [(const_int 0)]
--- 510,516 ----
  	(unspec:OO [(match_operand:V16QI 1 "mma_assemble_input_operand" "mwa")
  		    (match_operand:V16QI 2 "mma_assemble_input_operand" "mwa")]
  		   UNSPEC_VSX_ASSEMBLE))]
!   "TARGET_MMA || TARGET_DMF"
    "#"
    "&& reload_completed"
    [(const_int 0)]
***************
*** 396,402 ****
    [(match_operand:V16QI 0 "mma_disassemble_output_operand")
     (match_operand:OO 1 "vsx_register_operand")
     (match_operand 2 "const_0_to_1_operand")]
!   "TARGET_MMA"
  {
    rtx src;
    int regoff = INTVAL (operands[2]);
--- 526,532 ----
    [(match_operand:V16QI 0 "mma_disassemble_output_operand")
     (match_operand:OO 1 "vsx_register_operand")
     (match_operand 2 "const_0_to_1_operand")]
!   "TARGET_MMA || TARGET_DMF"
  {
    rtx src;
    int regoff = INTVAL (operands[2]);
***************
*** 412,418 ****
         (unspec:V16QI [(match_operand:OO 1 "vsx_register_operand" "wa")
                        (match_operand 2 "const_0_to_1_operand")]
                        UNSPEC_MMA_EXTRACT))]
!   "TARGET_MMA
     && vsx_register_operand (operands[1], OOmode)"
    "#"
    "&& reload_completed"
--- 542,548 ----
         (unspec:V16QI [(match_operand:OO 1 "vsx_register_operand" "wa")
                        (match_operand 2 "const_0_to_1_operand")]
                        UNSPEC_MMA_EXTRACT))]
!   "(TARGET_MMA || TARGET_DMF)
     && vsx_register_operand (operands[1], OOmode)"
    "#"
    "&& reload_completed"
***************
*** 425,443 ****
    DONE;
  })
  
  (define_expand "mma_assemble_acc"
!   [(match_operand:XO 0 "fpr_reg_operand")
     (match_operand:V16QI 1 "mma_assemble_input_operand")
     (match_operand:V16QI 2 "mma_assemble_input_operand")
     (match_operand:V16QI 3 "mma_assemble_input_operand")
     (match_operand:V16QI 4 "mma_assemble_input_operand")]
!   "TARGET_MMA"
  {
!   rtx src = gen_rtx_UNSPEC_VOLATILE (XOmode,
! 			    	     gen_rtvec (4, operands[1], operands[2],
! 				       		operands[3], operands[4]),
! 			    	     UNSPECV_MMA_ASSEMBLE);
!   emit_move_insn (operands[0], src);
    DONE;
  })
  
--- 555,759 ----
    DONE;
  })
  
+ (define_insn "dm_insert512"
+   [(set (match_operand:XO 0 "dmr_register_operand" "=wD")
+ 	(unspec:XO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		    (match_operand:OO 2 "vsx_register_operand" "wa")
+ 		    (match_operand 3 "const_0_to_1_operand")]
+ 		   UNSPEC_DMF_INSERT512))]
+   "TARGET_DMF"
+   "dmxxinstdmr512 %0,%x1,%x2,%3"
+   [(set_attr "type" "dmf")])
+ 
+ ;; Move from VSX registers to DMR registers via two insert 512 bit
+ ;; instructions.
+ (define_insn "dm_insert1024"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		     (match_operand:OO 2 "vsx_register_operand" "wa")
+ 		     (match_operand:OO 3 "vsx_register_operand" "wa")
+ 		     (match_operand:OO 4 "vsx_register_operand" "wa")]
+ 		    UNSPEC_DMF_INSERT1024))]
+   "TARGET_DMF"
+   "dmxxinstdmr512 %0,%x1,%x2,0\n\tdmxxinstdmr512 %0,%x3,%x4,1"
+   [(set_attr "type" "dmf")])
+ 
+ (define_insn "dm_extract512"
+   [(set (match_operand:XO 0 "vsx_register_operand" "=wa")
+         (unspec:XO [(match_operand:TDO 1 "dmr_register_operand" "wD")
+ 		    (match_operand 2 "const_0_to_1_operand" "n")]
+ 		   UNSPEC_DMF_EXTRACT512))]
+   "TARGET_DMF"
+   "dmxxextfdmr512 %x0,%W0,%1,%2"
+   [(set_attr "type" "dmf")])
+ 
+ ;; TDO (1024-bit dense-math) move expander.
+ (define_expand "movtdo"
+   [(set (match_operand:TDO 0 "nonimmediate_operand")
+         (match_operand:TDO 1 "input_operand"))]
+   "TARGET_DMF"
+ {
+   rs6000_emit_move (operands[0], operands[1], TDOmode);
+   DONE;
+ })
+ 
+ (define_insn_and_split "*movtdo"
+   [(set (match_operand:TDO 0 "nonimmediate_operand" "=wa,m,wa,wD,wa,wD")
+         (match_operand:TDO 1 "input_operand"         "m,wa,wa,wD,wD,wa"))]
+   "TARGET_DMF
+    && (gpc_reg_operand (operands[0], TDOmode)
+        || gpc_reg_operand (operands[1], TDOmode))"
+ {
+   if (which_alternative == 3)
+     return "dmmr %0,%1";
+   else
+     return "#";
+ }
+ "reload_completed
+  && (!dmr_register_operand (operands[0], TDOmode)
+      || !dmr_register_operand (operands[1], TDOmode))"
+   [(const_int 0)]
+ {
+   rtx dst = operands[0];
+   rtx src = operands[1];
+ 
+   /* Memory-involving moves (alt 0/1) and wa<-wa VSX moves (alt 2)
+      both go through the generic multiregister splitter.  */
+   if (!REG_P (dst) || !REG_P (src)
+       || (VSX_REGNO_P (REGNO (dst)) && VSX_REGNO_P (REGNO (src))))
+     {
+       rs6000_split_multireg_move (dst, src);
+       DONE;
+     }
+ 
+   unsigned dst_regno = REGNO (dst);
+   unsigned src_regno = REGNO (src);
+   bool dst_is_dmr = DMR_REGNO_P (dst_regno);
+   bool src_is_dmr = DMR_REGNO_P (src_regno);
+   bool dst_is_vsx = VSX_REGNO_P (dst_regno);
+   bool src_is_vsx = VSX_REGNO_P (src_regno);
+ 
+   /* wD <- wD: already a dmmr move, nothing to split.  */
+   if (dst_is_dmr && src_is_dmr)
+     DONE;
+ 
+   /* wD <- wa  */
+   if (dst_is_dmr && src_is_vsx)
+     {
+       rtx chunk0 = gen_rtx_REG (OOmode, src_regno);
+       rtx chunk1 = gen_rtx_REG (OOmode, src_regno + 2);
+       rtx chunk2 = gen_rtx_REG (OOmode, src_regno + 4);
+       rtx chunk3 = gen_rtx_REG (OOmode, src_regno + 6);
+ 
+       emit_insn (gen_dm_insert1024 (dst, chunk0, chunk1, chunk2, chunk3));
+       DONE;
+     }
+ 
+   /* wa <- wD  */
+   if (dst_is_vsx && src_is_dmr)
+     {
+       rtx chunk0 = gen_rtx_REG (XOmode, dst_regno);
+       rtx chunk1 = gen_rtx_REG (XOmode, dst_regno + 4);
+       emit_insn (gen_dm_extract512 (chunk0, src, const0_rtx));
+       emit_insn (gen_dm_extract512 (chunk1, src, const1_rtx));
+       DONE;
+     }
+ 
+   gcc_unreachable ();
+ })
+ 
+ 
+ (define_insn_and_split "reload_tdo_load"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+         (unspec:TDO [(match_operand:TDO 1 "memory_operand" "m")]
+                     UNSPEC_DMF_RELOAD_FROM_MEMORY))
+    (clobber (match_operand:OO 2 "vsx_register_operand" "=wa"))
+    (clobber (match_operand:OO 3 "vsx_register_operand" "=wa"))
+    (clobber (match_operand:OO 4 "vsx_register_operand" "=wa"))
+    (clobber (match_operand:OO 5 "vsx_register_operand" "=wa"))]
+   "TARGET_DMF"
+   "#"
+   "&& reload_completed"
+   [(const_int 0)]
+ {
+   rtx dest = operands[0];
+   rtx src = operands[1];
+   rtx pair0 = operands[2];
+   rtx pair1 = operands[3];
+   rtx pair2 = operands[4];
+   rtx pair3 = operands[5];
+ 
+   if (BYTES_BIG_ENDIAN)
+     {
+       emit_move_insn (pair0, adjust_address (src, OOmode, 0));
+       emit_move_insn (pair1, adjust_address (src, OOmode, 32));
+       emit_move_insn (pair2, adjust_address (src, OOmode, 64));
+       emit_move_insn (pair3, adjust_address (src, OOmode, 96));
+     }
+   else
+     {
+       emit_move_insn (pair3, adjust_address (src, OOmode, 0));
+       emit_move_insn (pair2, adjust_address (src, OOmode, 32));
+       emit_move_insn (pair1, adjust_address (src, OOmode, 64));
+       emit_move_insn (pair0, adjust_address (src, OOmode, 96));
+     }
+   emit_insn (gen_dm_insert1024 (dest, pair0, pair1, pair2, pair3));
+   DONE;
+ }
+   [(set_attr "max_prefixed_insns" "4")])
+ 
+ 
+ ;; Reload dense math register to memory
+ (define_insn_and_split "reload_tdo_store"
+   [(set (match_operand:TDO 0 "memory_operand" "=m")
+         (unspec:TDO [(match_operand:TDO 1 "dmr_register_operand" "wD")]
+                     UNSPEC_DMF_RELOAD_TO_MEMORY))
+    (clobber (match_operand:XO 2 "vsx_register_operand" "=wa"))]
+   "TARGET_DMF"
+   "#"
+   "&& reload_completed"
+   [(const_int 0)]
+ {
+   rtx dest = operands[0];
+   rtx src = operands[1];
+   rtx tmp_vsx_512 = operands[2];
+   rtx high_mem = adjust_address (dest, XOmode, BYTES_BIG_ENDIAN ? 0 : 64);
+   rtx low_mem = adjust_address (dest, XOmode, BYTES_BIG_ENDIAN ? 64 : 0);
+ 
+   emit_insn (gen_dm_extract512 (tmp_vsx_512, src, const0_rtx));
+   emit_move_insn (high_mem, tmp_vsx_512);
+ 
+   emit_insn (gen_dm_extract512 (tmp_vsx_512, src, const1_rtx));
+   emit_move_insn (low_mem, tmp_vsx_512);
+   DONE;
+ }
+   [(set_attr "max_prefixed_insns" "4")])
+ 
+ 
  (define_expand "mma_assemble_acc"
!   [(match_operand:XO 0 "accumulator_operand")
     (match_operand:V16QI 1 "mma_assemble_input_operand")
     (match_operand:V16QI 2 "mma_assemble_input_operand")
     (match_operand:V16QI 3 "mma_assemble_input_operand")
     (match_operand:V16QI 4 "mma_assemble_input_operand")]
!   "TARGET_MMA || TARGET_DMF"
  {
!   if (TARGET_DMF)
!     {
!       rtx vp0 = gen_reg_rtx (OOmode);
!       rtx vp1 = gen_reg_rtx (OOmode);
!       emit_insn (gen_vsx_assemble_pair (vp0, operands[1], operands[2]));
!       emit_insn (gen_vsx_assemble_pair (vp1, operands[3], operands[4]));
!       emit_insn (gen_dm_insert512 (operands[0], vp0, vp1, const0_rtx));
!     }
!   else
!     {
!       rtx src = gen_rtx_UNSPEC_VOLATILE (XOmode,
! 					 gen_rtvec (4, operands[1], operands[2],
! 						    operands[3], operands[4]),
! 					 UNSPECV_MMA_ASSEMBLE);
!       emit_move_insn (operands[0], src);
!     }
    DONE;
  })
  
***************
*** 445,451 ****
  ;; as an early clobber so we don't accidentally clobber the input operands.  */
  
  (define_insn_and_split "*mma_assemble_acc"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d")
  	(unspec_volatile:XO
  	  [(match_operand:V16QI 1 "mma_assemble_input_operand" "mwa")
  	   (match_operand:V16QI 2 "mma_assemble_input_operand" "mwa")
--- 761,767 ----
  ;; as an early clobber so we don't accidentally clobber the input operands.  */
  
  (define_insn_and_split "*mma_assemble_acc"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD")
  	(unspec_volatile:XO
  	  [(match_operand:V16QI 1 "mma_assemble_input_operand" "mwa")
  	   (match_operand:V16QI 2 "mma_assemble_input_operand" "mwa")
***************
*** 453,459 ****
  	   (match_operand:V16QI 4 "mma_assemble_input_operand" "mwa")]
  	  UNSPECV_MMA_ASSEMBLE))]
    "TARGET_MMA
!    && fpr_reg_operand (operands[0], XOmode)"
    "#"
    "&& reload_completed"
    [(const_int 0)]
--- 769,775 ----
  	   (match_operand:V16QI 4 "mma_assemble_input_operand" "mwa")]
  	  UNSPECV_MMA_ASSEMBLE))]
    "TARGET_MMA
!    && accumulator_operand (operands[0], XOmode)"
    "#"
    "&& reload_completed"
    [(const_int 0)]
***************
*** 466,474 ****
    DONE;
  })
  
  (define_expand "mma_disassemble_acc"
    [(match_operand:V16QI 0 "mma_disassemble_output_operand")
!    (match_operand:XO 1 "fpr_reg_operand")
     (match_operand 2 "const_0_to_3_operand")]
    "TARGET_MMA"
  {
--- 782,814 ----
    DONE;
  })
  
+ (define_expand "dmf_build_dmr"
+   [(match_operand:TDO 0 "dmr_register_operand")
+    (match_operand:V16QI 1 "mma_assemble_input_operand")
+    (match_operand:V16QI 2 "mma_assemble_input_operand")
+    (match_operand:V16QI 3 "mma_assemble_input_operand")
+    (match_operand:V16QI 4 "mma_assemble_input_operand")
+    (match_operand:V16QI 5 "mma_assemble_input_operand")
+    (match_operand:V16QI 6 "mma_assemble_input_operand")
+    (match_operand:V16QI 7 "mma_assemble_input_operand")
+    (match_operand:V16QI 8 "mma_assemble_input_operand")]
+   "TARGET_DMF"
+ {
+   rtx vp0 = gen_reg_rtx (OOmode);
+   rtx vp1 = gen_reg_rtx (OOmode);
+   rtx vp2 = gen_reg_rtx (OOmode);
+   rtx vp3 = gen_reg_rtx (OOmode);
+   emit_insn (gen_vsx_assemble_pair (vp0, operands[2], operands[1]));
+   emit_insn (gen_vsx_assemble_pair (vp1, operands[4], operands[3]));
+   emit_insn (gen_vsx_assemble_pair (vp2, operands[6], operands[5]));
+   emit_insn (gen_vsx_assemble_pair (vp3, operands[8], operands[7]));
+   emit_insn (gen_dm_insert1024 (operands[0], vp0, vp1, vp2, vp3));
+   DONE;
+ })
+ 
  (define_expand "mma_disassemble_acc"
    [(match_operand:V16QI 0 "mma_disassemble_output_operand")
!    (match_operand:XO 1 "accumulator_operand")
     (match_operand 2 "const_0_to_3_operand")]
    "TARGET_MMA"
  {
***************
*** 499,513 ****
    DONE;
  })
  
  ;; MMA instructions that do not use their accumulators as an input, still
  ;; must not allow their vector operands to overlap the registers used by
  ;; the accumulator.  We enforce this by marking the output as early clobber.
  
! (define_insn "mma_<acc>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0")]
  		    MMA_ACC))]
!   "TARGET_MMA"
    "<acc> %A0"
    [(set_attr "type" "mma")])
  
--- 839,874 ----
    DONE;
  })
  
+ ;; xxmtacc/xxmfacc prime/deprime an accumulator that lives in 4 adjacent
+ ;; FPRs -- they reformat that shared FPR/accumulator storage in place.  On
+ ;; TARGET_DMF, DMRs are a register file entirely separate from the FPRs,
+ ;; so there is no such format to convert and these are a nop.  This expand
+ ;; only exists so __builtin_mma_xxmfacc/xxmtacc (which always resolve to
+ ;; this pattern) correctly do nothing on TARGET_DMF instead of failing
+ ;; to match any insn.
+ (define_expand "mma_<acc>"
+   [(set (match_operand:XO 0 "accumulator_operand")
+ 	(unspec:XO [(match_operand:XO 1 "accumulator_operand")]
+ 		   MMA_ACC))]
+   "TARGET_MMA || TARGET_DMF"
+ {
+   if (TARGET_DMF)
+     {
+       emit_move_insn (operands[0], operands[1]);
+       DONE;
+     }
+ })
+ 
+ 
  ;; MMA instructions that do not use their accumulators as an input, still
  ;; must not allow their vector operands to overlap the registers used by
  ;; the accumulator.  We enforce this by marking the output as early clobber.
  
! (define_insn "*mma_<acc>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0")]
  		    MMA_ACC))]
!   "TARGET_MMA && !TARGET_DMF"
    "<acc> %A0"
    [(set_attr "type" "mma")])
  
***************
*** 515,529 ****
  ;; UNSPEC_VOLATILE.
  
  (define_insn "mma_xxsetaccz"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=d")
  	(unspec_volatile:XO [(const_int 0)]
  			    UNSPECV_MMA_XXSETACCZ))]
    "TARGET_MMA"
    "xxsetaccz %A0"
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<vv>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")]
  		    MMA_VV))]
--- 876,897 ----
  ;; UNSPEC_VOLATILE.
  
  (define_insn "mma_xxsetaccz"
!   [(set (match_operand:XO 0 "accumulator_operand" "=wD")
  	(unspec_volatile:XO [(const_int 0)]
  			    UNSPECV_MMA_XXSETACCZ))]
    "TARGET_MMA"
    "xxsetaccz %A0"
    [(set_attr "type" "mma")])
  
+ (define_insn "dmf_dmsetdmrz"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(const_int 0)] UNSPEC_DMF_DMSETDMRZ))]
+   "TARGET_DMF"
+   "dmsetdmrz %0"
+   [(set_attr "type" "dmf")])
+ 
  (define_insn "mma_<vv>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")]
  		    MMA_VV))]
***************
*** 532,539 ****
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<avv>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")]
  		    MMA_AVV))]
--- 900,907 ----
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<avv>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")]
  		    MMA_AVV))]
***************
*** 542,548 ****
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<pv>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")]
  		    MMA_PV))]
--- 910,916 ----
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<pv>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")]
  		    MMA_PV))]
***************
*** 551,558 ****
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<apv>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:OO 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")]
  		    MMA_APV))]
--- 919,926 ----
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<apv>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:OO 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")]
  		    MMA_APV))]
***************
*** 561,567 ****
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<vvi4i4i8>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
--- 929,935 ----
    [(set_attr "type" "mma")])
  
  (define_insn "mma_<vvi4i4i8>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
***************
*** 574,581 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4i8>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
--- 942,949 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4i8>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
***************
*** 588,594 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<vvi4i4i2>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
--- 956,962 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<vvi4i4i2>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
***************
*** 601,608 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4i2>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
--- 969,976 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4i2>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
***************
*** 615,621 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<vvi4i4>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
--- 983,989 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<vvi4i4>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
***************
*** 627,634 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
--- 995,1002 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
***************
*** 640,646 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<pvi4i2>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
--- 1008,1014 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<pvi4i2>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
***************
*** 652,659 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<apvi4i2>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:OO 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
--- 1020,1027 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<apvi4i2>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:OO 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
***************
*** 665,671 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<vvi4i4i4>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
--- 1033,1039 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<vvi4i4i4>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
  	(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 3 "const_0_to_15_operand" "n,n")
***************
*** 678,685 ****
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4i4>"
!   [(set (match_operand:XO 0 "fpr_reg_operand" "=&d,&d")
! 	(unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
--- 1046,1053 ----
     (set_attr "prefixed" "yes")])
  
  (define_insn "mma_<avvi4i4i4>"
!   [(set (match_operand:XO 0 "accumulator_operand" "=&wD,&wD")
! 	(unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
  		    (match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
  		    (match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
  		    (match_operand:SI 4 "const_0_to_15_operand" "n,n")
***************
*** 690,692 ****
--- 1058,1155 ----
    "<avvi4i4i4> %A0,%x2,%x3,%4,%5,%6"
    [(set_attr "type" "mma")
     (set_attr "prefixed" "yes")])
+ 
+ (define_insn "dmf_dmxor"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(match_operand:TDO 1 "dmr_register_operand" "0")
+ 		     (match_operand:TDO 2 "dmr_register_operand" "wD")]
+ 		    UNSPEC_DMF_DMXOR))]
+   "TARGET_DMF"
+   "dmxor %0,%2"
+   [(set_attr "type" "dmf")])
+ 
+ (define_insn "dmf_<pv>"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		     (match_operand:V16QI 2 "vsx_register_operand" "wa")]
+ 		    DMF_PV))]
+   "TARGET_DMF"
+ {
+   return "<pv> %0,%x1,%x2";
+ }
+   [(set_attr "type" "dmf")])
+ 
+ (define_insn "dmf_<dpv>"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(match_operand:TDO 1 "dmr_register_operand" "0")
+ 		     (match_operand:OO 2 "vsx_register_operand" "wa")
+ 		     (match_operand:V16QI 3 "vsx_register_operand" "wa")]
+ 		    DMF_DPV))]
+   "TARGET_DMF"
+ {
+   return "<dpv> %0,%x2,%x3";
+ }
+   [(set_attr "type" "dmf")])
+ 
+ (define_insn "dmf_<pvi8i4i4>"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(match_operand:OO 1 "vsx_register_operand" "wa")
+ 		     (match_operand:V16QI 2 "vsx_register_operand" "wa")
+ 		     (match_operand:SI 3 "u8bit_cint_operand" "n")
+ 		     (match_operand:SI 4 "const_0_to_15_operand" "n")
+ 		     (match_operand:SI 5 "const_0_to_15_operand" "n")]
+ 		    DMF_PVI8I4I4))]
+   "TARGET_DMF"
+ {
+   return "<pvi8i4i4> %0,%x1,%x2,%3,%4,%5";
+ }
+   [(set_attr "type" "dmf")
+    (set_attr "prefixed" "yes")])
+ 
+ (define_insn "dmf_<dpvi8i4i4>"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+ 	(unspec:TDO [(match_operand:TDO 1 "dmr_register_operand" "0")
+ 		     (match_operand:OO 2 "vsx_register_operand" "wa")
+ 		     (match_operand:V16QI 3 "vsx_register_operand" "wa")
+ 		     (match_operand:SI 4 "u8bit_cint_operand" "n")
+ 		     (match_operand:SI 5 "const_0_to_15_operand" "n")
+ 		     (match_operand:SI 6 "const_0_to_15_operand" "n")]
+ 		    DMF_DPVI8I4I4))]
+   "TARGET_DMF"
+ {
+   return "<dpvi8i4i4> %0,%x2,%x3,%4,%5,%6";
+ }
+   [(set_attr "type" "dmf")
+    (set_attr "prefixed" "yes")])
+ 
+ 
+ (define_insn "dmf_<pvi8i4i2>"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+        (unspec:TDO [(match_operand:OO 1 "vsx_register_operand" "wa")
+                     (match_operand:V16QI 2 "vsx_register_operand" "wa")
+                     (match_operand:SI 3 "u8bit_cint_operand" "n")
+                     (match_operand:SI 4 "const_0_to_15_operand" "n")
+                     (match_operand:SI 5 "const_0_to_3_operand" "n")]
+                     DMF_PVI8I4I2))]
+   "TARGET_DMF"
+ {
+   return "<pvi8i4i2> %0,%x1,%x2,%3,%4,%5";
+ }
+   [(set_attr "type" "dmf")
+    (set_attr "prefixed" "yes")])
+ 
+ (define_insn "dmf_<dpvi8i4i2>"
+   [(set (match_operand:TDO 0 "dmr_register_operand" "=wD")
+        (unspec:TDO [(match_operand:TDO 1 "dmr_register_operand" "0")
+                     (match_operand:OO 2 "vsx_register_operand" "wa")
+                     (match_operand:V16QI 3 "vsx_register_operand" "wa")
+                     (match_operand:SI 4 "u8bit_cint_operand" "n")
+                     (match_operand:SI 5 "const_0_to_15_operand" "n")
+                     (match_operand:SI 6 "const_0_to_3_operand" "n")]
+                     DMF_DPVI8I4I2))]
+   "TARGET_DMF"
+ {
+   return "<dpvi8i4i2> %0,%x2,%x3,%4,%5,%6";
+ }
+   [(set_attr "type" "dmf")
+    (set_attr "prefixed" "yes")])
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/predicates.md gcc-16-20260725/gcc/config/rs6000/predicates.md
*** gcc-16-20260718/gcc/config/rs6000/predicates.md	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/predicates.md	Sat Jul 25 22:32:06 2026
***************
*** 163,168 ****
--- 163,202 ----
    return VINT_REGNO_P (REGNO (op));
  })
  
+ ;; Return 1 if op is a dense math register
+ (define_predicate "dmr_register_operand"
+   (match_operand 0 "register_operand")
+ {
+   if (!TARGET_DMF)
+     return 0;
+ 
+   if (!REG_P (op))
+     return 0;
+ 
+   if (!HARD_REGISTER_P (op))
+     return 1;
+ 
+   return DMR_REGNO_P (REGNO (op));
+ })
+ 
+ ;; Return 1 if op is an accumulator.  On power10/11 systems, the accumulators
+ ;; overlap with the FPRs. If TARGET_DMF is true, it will be Dense math register.
+ (define_predicate "accumulator_operand"
+   (match_operand 0 "register_operand")
+ {
+   if (SUBREG_P (op))
+     op = SUBREG_REG (op);
+ 
+   if (!REG_P (op))
+     return 0;
+ 
+   if (!HARD_REGISTER_P (op))
+     return 1;
+ 
+   int r = REGNO (op);
+   return TARGET_DMF ? DMR_REGNO_P (r) : (FP_REGNO_P (r) && (r & 3) == 0);
+ })
+ 
  ;; Return 1 if op is a vector register to do logical operations on (and, or,
  ;; xor, etc.)
  (define_predicate "vlogical_operand"
***************
*** 369,374 ****
--- 403,411 ----
    if (TARGET_VSX && VSX_REGNO_P (REGNO (op)))
      return 1;
  
+   if (TARGET_DMF && DMR_REGNO_P (REGNO (op)))
+     return 1;
+ 
    return INT_REGNO_P (REGNO (op)) || FP_REGNO_P (REGNO (op));
  })
  
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000-builtin.cc gcc-16-20260725/gcc/config/rs6000/rs6000-builtin.cc
*** gcc-16-20260718/gcc/config/rs6000/rs6000-builtin.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000-builtin.cc	Sat Jul 25 22:32:06 2026
*************** rs6000_invalid_builtin (enum rs6000_gen_
*** 150,155 ****
--- 150,158 ----
        error ("%qs requires the %qs and %qs options", name, "-mcpu=future",
  	     "-mvsx");
        break;
+     case ENB_DM:
+       error ("%qs requires the %qs option", name, "-mdense-math");
+       break;
      default:
      case ENB_ALWAYS:
        gcc_unreachable ();
*************** rs6000_builtin_is_supported (enum rs6000
*** 211,216 ****
--- 214,221 ----
        return TARGET_FUTURE && TARGET_ALTIVEC;
      case ENB_FUTURE_VSX:
        return TARGET_FUTURE && TARGET_VSX;
+     case ENB_DM:
+       return TARGET_DMF;
      default:
        gcc_unreachable ();
      }
*************** const char *rs6000_type_string (tree typ
*** 512,517 ****
--- 517,524 ----
      return "__vector_pair";
    else if (type_node == vector_quad_type_node)
      return "__vector_quad";
+   else if (type_node == dmr1024_type_node)
+     return "__dmr1024";
  
    return "unknown";
  }
*************** rs6000_init_builtins (void)
*** 813,818 ****
--- 820,840 ----
    t = build_qualified_type (vector_quad_type_node, TYPE_QUAL_CONST);
    ptr_vector_quad_type_node = build_pointer_type (t);
  
+   /* For TDOmode (1024-bit dense math registers), don't use an alignment
+      of 1024, use 512.  TDOmode loads and stores are always broken up
+      into two vector pair loads or stores.  In addition, we don't have
+      support for aligning the stack to 1024 bits.  */
+   dmr1024_type_node = make_node (OPAQUE_TYPE);
+   SET_TYPE_MODE (dmr1024_type_node, TDOmode);
+   TYPE_SIZE (dmr1024_type_node) = bitsize_int (GET_MODE_BITSIZE (TDOmode));
+   TYPE_PRECISION (dmr1024_type_node) = GET_MODE_BITSIZE (TDOmode);
+   TYPE_SIZE_UNIT (dmr1024_type_node) = size_int (GET_MODE_SIZE (TDOmode));
+   SET_TYPE_ALIGN (dmr1024_type_node, 512);
+   TYPE_USER_ALIGN (dmr1024_type_node) = 0;
+   lang_hooks.types.register_builtin_type (dmr1024_type_node, "__dmr1024");
+   t = build_qualified_type (dmr1024_type_node, TYPE_QUAL_CONST);
+   ptr_dmr1024_type_node = build_pointer_type (t);
+ 
    tdecl = add_builtin_type ("__bool char", bool_char_type_node);
    TYPE_NAME (bool_char_type_node) = tdecl;
  
*************** rs6000_gimple_fold_mma_builtin (gimple_s
*** 1099,1105 ****
    gimple *stmt = gsi_stmt (*gsi);
    size_t fncode = (size_t) fn_code;
  
!   if (!bif_is_mma (rs6000_builtin_info[fncode]))
      return false;
  
    /* Each call that can be gimple-expanded has an associated built-in
--- 1121,1128 ----
    gimple *stmt = gsi_stmt (*gsi);
    size_t fncode = (size_t) fn_code;
  
!   if (!bif_is_mma (rs6000_builtin_info[fncode])
!       && !bif_is_dm (rs6000_builtin_info[fncode]))
      return false;
  
    /* Each call that can be gimple-expanded has an associated built-in
*************** rs6000_gimple_fold_mma_builtin (gimple_s
*** 1107,1121 ****
       already expanded it!  Exceptions: lxvp and stxvp.  */
    if (rs6000_builtin_info[fncode].assoc_bif == RS6000_BIF_NONE
        && fncode != RS6000_BIF_LXVP
!       && fncode != RS6000_BIF_STXVP)
      return false;
  
    bifdata *bd = &rs6000_builtin_info[fncode];
-   unsigned nopnds = bd->nargs;
    gimple_seq new_seq = NULL;
    gimple *new_call;
    tree new_decl;
  
    /* Compatibility built-ins; we used to call these
       __builtin_mma_{dis,}assemble_pair, but now we call them
       __builtin_vsx_{dis,}assemble_pair.  Handle the old versions.  */
--- 1130,1213 ----
       already expanded it!  Exceptions: lxvp and stxvp.  */
    if (rs6000_builtin_info[fncode].assoc_bif == RS6000_BIF_NONE
        && fncode != RS6000_BIF_LXVP
!       && fncode != RS6000_BIF_STXVP
!       && fncode != RS6000_BIF_DMMR
!       && fncode != RS6000_BIF_DISASSEMBLE_DMR)
      return false;
  
    bifdata *bd = &rs6000_builtin_info[fncode];
    gimple_seq new_seq = NULL;
    gimple *new_call;
    tree new_decl;
  
+   if (fncode == RS6000_BIF_DMF_EXTRACT512
+       || fncode == RS6000_BIF_DISASSEMBLE_DMR)
+     {
+       unsigned num_extract512;
+       push_gimplify_context (true);
+       tree dst_ptr = gimple_call_arg (stmt, 0);
+       tree src_ptr = gimple_call_arg (stmt, 1);
+       tree src_type = build_pointer_type (dmr1024_type_node);
+ 
+       if (TREE_TYPE (src_ptr) != src_type)
+        src_ptr = build1 (NOP_EXPR, src_type, src_ptr);
+ 
+       /* The following code will ensure we are sending *src as parameter.  */
+       tree src = make_ssa_name (TREE_TYPE (src_type));
+       gimplify_assign (src, build_simple_mem_ref (src_ptr), &new_seq);
+ 
+       /* Now we should call the internal builtin RS6000_BIF_DMF_EXTRACT512_INTERNAL.  */
+       if (fncode == RS6000_BIF_DISASSEMBLE_DMR)
+        num_extract512 = 2;
+       else
+        num_extract512 = 1;
+ 
+       tree extract_decl = rs6000_builtin_decls[RS6000_BIF_DMF_EXTRACT512_INTERNAL];
+ 
+       for (unsigned i = 0; i < num_extract512; i++)
+ 	{
+ 	  tree const_arg;
+ 	  if (fncode == RS6000_BIF_DISASSEMBLE_DMR)
+ 	    const_arg = build_int_cstu (uint16_type_node, i);
+ 	  else
+ 	    const_arg = gimple_call_arg (stmt, 2);
+ 
+ 	  /* Create call.  */
+ 	  new_call = gimple_build_call (extract_decl, 2, src, const_arg);
+ 	  /* Create a tmp reg to denote lhs of call.  */
+ 	  tree lhs = make_ssa_name (vector_quad_type_node);
+ 
+ 	  /* lhs = new_call  */
+ 	  gimple_call_set_lhs (new_call, lhs);
+ 
+ 	  /* Add gimple stmt to gimple sequence.  */
+ 	  gimple_seq_add_stmt (&new_seq, new_call);
+ 
+ 	  /* Now lhs contains the 512-bit value in vector_quad. We have to now
+ 	     split up the vector_quad into individual vectors.  */
+ 
+ 	  new_decl = rs6000_builtin_decls[RS6000_BIF_DISASSEMBLE_ACC_INTERNAL];
+ 	  tree dst_type = build_pointer_type_for_mode (unsigned_V16QI_type_node,
+ 						       ptr_mode, true);
+ 
+ 	  tree dst_base = build1 (NOP_EXPR, dst_type, dst_ptr);
+ 	  for (unsigned j = 0; j < 4; j++)
+ 	    {
+ 	      tree dst = build2 (MEM_REF, unsigned_V16QI_type_node, dst_base,
+ 				 build_int_cst (dst_type, j * 16 + i * 64));
+ 	      tree dstssa = make_ssa_name (unsigned_V16QI_type_node);
+ 	      new_call = gimple_build_call (new_decl, 2, lhs,
+ 					    build_int_cstu (uint16_type_node, j));
+ 	      gimple_call_set_lhs (new_call, dstssa);
+ 	      gimple_seq_add_stmt (&new_seq, new_call);
+ 	      gimplify_assign (dst, dstssa, &new_seq);
+ 	    }
+ 	}
+       pop_gimplify_context (NULL);
+       gsi_replace_with_seq (gsi, new_seq, true);
+       return true;
+     }
+ 
    /* Compatibility built-ins; we used to call these
       __builtin_mma_{dis,}assemble_pair, but now we call them
       __builtin_vsx_{dis,}assemble_pair.  Handle the old versions.  */
*************** rs6000_gimple_fold_mma_builtin (gimple_s
*** 1158,1164 ****
  
        /* If we're disassembling an accumulator into a different type, we need
  	 to emit a xxmfacc instruction now, since we cannot do it later.  */
!       if (fncode == RS6000_BIF_DISASSEMBLE_ACC)
  	{
  	  new_decl = rs6000_builtin_decls[RS6000_BIF_XXMFACC_INTERNAL];
  	  new_call = gimple_build_call (new_decl, 1, src);
--- 1250,1256 ----
  
        /* If we're disassembling an accumulator into a different type, we need
  	 to emit a xxmfacc instruction now, since we cannot do it later.  */
!       if (fncode == RS6000_BIF_DISASSEMBLE_ACC && !TARGET_DMF)
  	{
  	  new_decl = rs6000_builtin_decls[RS6000_BIF_XXMFACC_INTERNAL];
  	  new_call = gimple_build_call (new_decl, 1, src);
*************** rs6000_gimple_fold_mma_builtin (gimple_s
*** 1227,1253 ****
  
    /* Convert this built-in into an internal version that uses pass-by-value
       arguments.  The internal built-in is found in the assoc_bif field.  */
!   new_decl = rs6000_builtin_decls[rs6000_builtin_info[fncode].assoc_bif];
    tree lhs, op[MAX_MMA_OPERANDS];
    tree acc = gimple_call_arg (stmt, 0);
    push_gimplify_context (true);
  
!   if (bif_is_quad (*bd))
      {
!       /* This built-in has a pass-by-reference accumulator input, so load it
! 	 into a temporary accumulator for use as a pass-by-value input.  */
!       op[0] = make_ssa_name (vector_quad_type_node);
!       for (unsigned i = 1; i < nopnds; i++)
! 	op[i] = gimple_call_arg (stmt, i);
!       gimplify_assign (op[0], build_simple_mem_ref (acc), &new_seq);
      }
!   else
      {
!       /* This built-in does not use its pass-by-reference accumulator argument
! 	 as an input argument, so remove it from the input list.  */
!       nopnds--;
!       for (unsigned i = 0; i < nopnds; i++)
! 	op[i] = gimple_call_arg (stmt, i + 1);
      }
  
    switch (nopnds)
--- 1319,1367 ----
  
    /* Convert this built-in into an internal version that uses pass-by-value
       arguments.  The internal built-in is found in the assoc_bif field.  */
!   size_t new_fncode = rs6000_builtin_info[fncode].assoc_bif;
!   new_decl = rs6000_builtin_decls[new_fncode];
    tree lhs, op[MAX_MMA_OPERANDS];
+   tree lhs_type = NULL_TREE;
    tree acc = gimple_call_arg (stmt, 0);
    push_gimplify_context (true);
  
!   switch (insn_data[rs6000_builtin_info[new_fncode].icode].operand[0].mode)
      {
!     case TDOmode:
!       lhs_type = dmr1024_type_node;
!       break;
!     case XOmode:
!       lhs_type = vector_quad_type_node;
!       break;
!     case OOmode:
!       lhs_type = vector_pair_type_node;
!       break;
!     default:
!       gcc_unreachable ();
      }
! 
!   unsigned nopnds = 0;
!   for (int i = 0; i < bd->nargs; i++)
      {
!       tree arg = gimple_call_arg (stmt, i);
!       if (i == 0 && !bif_is_dmr (*bd) && !bif_is_quad (*bd))
! 	continue;
!       /* If this is another DMR operand, it is passed in by reference.
! 	 The internal built-ins use pass-by-value, so load this operand
! 	 into a variable and pass that in as our operand.  */
!       if (POINTER_TYPE_P (TREE_TYPE (arg))
! 	  && types_compatible_p (TREE_TYPE (TREE_TYPE (arg)), lhs_type))
!        {
! 	 tree op_mem = build_simple_mem_ref (build1 (NOP_EXPR,
! 					     TREE_TYPE (arg),
! 					     arg));
! 	 op[nopnds] = make_ssa_name (lhs_type);
! 	 gimplify_assign (op[nopnds], op_mem, &new_seq);
!        }
!       else
! 	op[nopnds] = arg;
!       nopnds++;
      }
  
    switch (nopnds)
*************** rs6000_gimple_fold_mma_builtin (gimple_s
*** 1279,1292 ****
        new_call = gimple_build_call (new_decl, 7, op[0], op[1], op[2], op[3],
  				    op[4], op[5], op[6]);
        break;
      default:
        gcc_unreachable ();
      }
  
!   if (fncode == RS6000_BIF_BUILD_PAIR || fncode == RS6000_BIF_ASSEMBLE_PAIR_V)
!     lhs = make_ssa_name (vector_pair_type_node);
!   else
!     lhs = make_ssa_name (vector_quad_type_node);
    gimple_call_set_lhs (new_call, lhs);
    gimple_seq_add_stmt (&new_seq, new_call);
    gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq);
--- 1393,1411 ----
        new_call = gimple_build_call (new_decl, 7, op[0], op[1], op[2], op[3],
  				    op[4], op[5], op[6]);
        break;
+     case 8:
+       new_call = gimple_build_call (new_decl, 8, op[0], op[1], op[2], op[3],
+ 				    op[4], op[5], op[6], op[7]);
+       break;
+     case 9:
+       new_call = gimple_build_call (new_decl, 9, op[0], op[1], op[2], op[3],
+ 				    op[4], op[5], op[6], op[7], op[8]);
+       break;
      default:
        gcc_unreachable ();
      }
  
!   lhs = make_ssa_name (lhs_type);
    gimple_call_set_lhs (new_call, lhs);
    gimple_seq_add_stmt (&new_seq, new_call);
    gimplify_assign (build_simple_mem_ref (acc), lhs, &new_seq);
*************** mma_expand_builtin (tree exp, rtx target
*** 3003,3008 ****
--- 3122,3135 ----
      case 7:
        pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6]);
        break;
+     case 8:
+       pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6],
+ 			     op[7]);
+       break;
+     case 9:
+       pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4], op[5], op[6],
+ 			     op[7], op[8]);
+       break;
      default:
        gcc_unreachable ();
      }
*************** rs6000_expand_builtin (tree exp, rtx tar
*** 3545,3551 ****
    /* Position of first argument (0 for void-returning functions, else 1).  */
    int k;
    /* Modes for the return value, if any, and arguments.  */
!   const int MAX_BUILTIN_ARGS = 6;
    machine_mode mode[MAX_BUILTIN_ARGS + 1];
  
    if (void_func)
--- 3672,3678 ----
    /* Position of first argument (0 for void-returning functions, else 1).  */
    int k;
    /* Modes for the return value, if any, and arguments.  */
!   const int MAX_BUILTIN_ARGS = 8;
    machine_mode mode[MAX_BUILTIN_ARGS + 1];
  
    if (void_func)
*************** rs6000_expand_builtin (tree exp, rtx tar
*** 3680,3686 ****
    if (bif_is_lxvrze (*bifaddr))
      return lxvrze_expand_builtin (target, icode, op, mode[0], mode[1]);
  
!   if (bif_is_mma (*bifaddr))
      return mma_expand_builtin (exp, target, icode, fcode);
  
    if (TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node)
--- 3807,3813 ----
    if (bif_is_lxvrze (*bifaddr))
      return lxvrze_expand_builtin (target, icode, op, mode[0], mode[1]);
  
!   if (bif_is_mma (*bifaddr) || bif_is_dm (*bifaddr))
      return mma_expand_builtin (exp, target, icode, fcode);
  
    if (TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node)
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000-builtins.def gcc-16-20260725/gcc/config/rs6000/rs6000-builtins.def
*** gcc-16-20260718/gcc/config/rs6000/rs6000-builtins.def	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000-builtins.def	Sat Jul 25 22:32:06 2026
***************
*** 4095,4097 ****
--- 4095,4315 ----
  
    const vf __builtin_altivec_unpack_int8_to_fp32 (vui, const int<2>);
      VUPKINT8TOFP32 altivec_vupkint8tofp32 {}
+ 
+ [dm]
+   void __builtin_dmsetdmrz (dmr1024 *);
+     DMSETDMRZ nothing {dm,dmint}
+ 
+   dmr1024 __builtin_dmsetdmrz_internal ();
+     DMSETDMRZ_INTERNAL dmf_dmsetdmrz {dm}
+ 
+   void __builtin_dmmr (dmr1024 *, dmr1024 *);
+     DMMR nothing {dm,dmint}
+ 
+   dmr1024 __builtin_dmmr_internal (dmr1024);
+     DMMR_INTERNAL movtdo {dm}
+ 
+   void __builtin_dmxor (dmr1024 *, dmr1024 *);
+     DMXOR nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_dmxor_internal (dmr1024, dmr1024);
+     DMXOR_INTERNAL dmf_dmxor {dm}
+ 
+   void __builtin_build_dmr (dmr1024 *, vuc, vuc, vuc, vuc, vuc, vuc, vuc, vuc);
+     BUILD_DMR nothing {dm,dmint}
+ 
+   dmr1024 __builtin_build_dmr_internal (vuc, vuc, vuc, vuc, vuc, vuc, vuc, vuc);
+     BUILD_DMR_INTERNAL dmf_build_dmr {dm}
+ 
+   void __builtin_dmr_extract512 (void *, dmr1024 *, const int<2>);
+     DMF_EXTRACT512 nothing {dm,dmint}
+ 
+   v512 __builtin_dmr_extract512_internal (dmr1024, const int<2>);
+     DMF_EXTRACT512_INTERNAL dm_extract512 {dm}
+ 
+   void __builtin_disassemble_dmr (void *, dmr1024 *);
+     DISASSEMBLE_DMR nothing {dm}
+ 
+   void __builtin_mma_dmxvi8gerx4 (dmr1024 *, v256, vuc);
+     DMXVI8GERX4 nothing {dm,dmint}
+ 
+   dmr1024 __builtin_mma_dmxvi8gerx4_internal (v256, vuc);
+     DMXVI8GERX4_INTERNAL dmf_dmxvi8gerx4 {dm}
+ 
+   void __builtin_mma_dmxvi8gerx4pp (dmr1024 *, v256, vuc);
+     DMXVI8GERX4PP nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvi8gerx4pp_internal (dmr1024, v256, vuc);
+     DMXVI8GERX4PP_INTERNAL dmf_dmxvi8gerx4pp {dm}
+ 
+   void __builtin_mma_dmxvi8gerx4spp (dmr1024 *, v256, vuc);
+     DMXVI8GERX4SPP nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvi8gerx4spp_internal (dmr1024, v256, vuc);
+     DMXVI8GERX4SPP_INTERNAL dmf_dmxvi8gerx4spp {dm}
+ 
+   void __builtin_mma_pmdmxvi8gerx4 (dmr1024 *, v256, vuc, const int<8>, \
+                                    const int<4>, const int<4>);
+     PMDMXVI8GERX4 nothing {dm,pair,dmint}
+ 
+   dmr1024 __builtin_mma_pmdmxvi8gerx4_internal (v256, vuc, const int<8>, \
+                                               const int<4>, const int<4>);
+     PMDMXVI8GERX4_INTERNAL dmf_pmdmxvi8gerx4 {dm,pair}
+ 
+   void __builtin_mma_pmdmxvi8gerx4pp (dmr1024 *, v256, vuc, const int<8>, \
+                                      const int<4>, const int<4>);
+     PMDMXVI8GERX4PP nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvi8gerx4pp_internal (dmr1024, v256, vuc, \
+                                                 const int<8>, const int<4>, \
+                                                 const int<4>);
+     PMDMXVI8GERX4PP_INTERNAL dmf_pmdmxvi8gerx4pp {dm,pair}
+ 
+   void __builtin_mma_pmdmxvi8gerx4spp (dmr1024 *, v256, vuc, const int<8>, \
+                                      const int<4>, const int<4>);
+     PMDMXVI8GERX4SPP nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvi8gerx4spp_internal (dmr1024, v256, vuc, \
+                                                 const int<8>, const int<4>, \
+                                                 const int<4>);
+     PMDMXVI8GERX4SPP_INTERNAL dmf_pmdmxvi8gerx4spp {dm,pair}
+ 
+   void __builtin_mma_dmxvbf16gerx2 (dmr1024 *, v256, vuc);
+     DMXVBF16GERX2 nothing {dm,dmint}
+ 
+   dmr1024 __builtin_mma_dmxvbf16gerx2_internal (v256, vuc);
+     DMXVBF16GERX2_INTERNAL dmf_dmxvbf16gerx2 {dm}
+ 
+   void __builtin_mma_dmxvbf16gerx2pp (dmr1024 *, v256, vuc);
+     DMXVBF16GERX2PP nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvbf16gerx2pp_internal (dmr1024, v256, vuc);
+     DMXVBF16GERX2PP_INTERNAL dmf_dmxvbf16gerx2pp {dm}
+ 
+   void __builtin_mma_dmxvbf16gerx2pn (dmr1024 *, v256, vuc);
+     DMXVBF16GERX2PN nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvbf16gerx2pn_internal (dmr1024, v256, vuc);
+     DMXVBF16GERX2PN_INTERNAL dmf_dmxvbf16gerx2pn {dm}
+ 
+   void __builtin_mma_dmxvbf16gerx2np (dmr1024 *, v256, vuc);
+     DMXVBF16GERX2NP nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvbf16gerx2np_internal (dmr1024, v256, vuc);
+     DMXVBF16GERX2NP_INTERNAL dmf_dmxvbf16gerx2np {dm}
+ 
+   void __builtin_mma_dmxvbf16gerx2nn (dmr1024 *, v256, vuc);
+     DMXVBF16GERX2NN nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvbf16gerx2nn_internal (dmr1024, v256, vuc);
+     DMXVBF16GERX2NN_INTERNAL dmf_dmxvbf16gerx2nn {dm}
+ 
+   void __builtin_mma_pmdmxvbf16gerx2 (dmr1024 *, v256, vuc, const int<8>, \
+                                    const int<4>, const int<2>);
+     PMDMXVBF16GERX2 nothing {dm,pair,dmint}
+ 
+   dmr1024 __builtin_mma_pmdmxvbf16gerx2_internal (v256, vuc, const int<8>, \
+                                               const int<4>, const int<2>);
+     PMDMXVBF16GERX2_INTERNAL dmf_pmdmxvbf16gerx2 {dm,pair}
+ 
+   void __builtin_mma_pmdmxvbf16gerx2pp (dmr1024 *, v256, vuc, const int<8>, \
+                                      const int<4>, const int<2>);
+     PMDMXVBF16GERX2PP nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvbf16gerx2pp_internal (dmr1024, v256, vuc, const int<8>, \
+                                                 const int<4>, const int<2>);
+     PMDMXVBF16GERX2PP_INTERNAL dmf_pmdmxvbf16gerx2pp {dm,pair}
+ 
+   void __builtin_mma_pmdmxvbf16gerx2pn (dmr1024 *, v256, vuc, const int<8>, \
+                                      const int<4>, const int<2>);
+     PMDMXVBF16GERX2PN nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvbf16gerx2pn_internal (dmr1024, v256, vuc, const int<8>, \
+                                                 const int<4>, const int<2>);
+     PMDMXVBF16GERX2PN_INTERNAL dmf_pmdmxvbf16gerx2pn {dm,pair}
+ 
+   void __builtin_mma_pmdmxvbf16gerx2np (dmr1024 *, v256, vuc, const int<8>, \
+                                      const int<4>, const int<2>);
+     PMDMXVBF16GERX2NP nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvbf16gerx2np_internal (dmr1024, v256, vuc, const int<8>, \
+                                                 const int<4>, const int<2>);
+     PMDMXVBF16GERX2NP_INTERNAL dmf_pmdmxvbf16gerx2np {dm,pair}
+ 
+   void __builtin_mma_pmdmxvbf16gerx2nn (dmr1024 *, v256, vuc, const int<8>, \
+                                      const int<4>, const int<2>);
+     PMDMXVBF16GERX2NN nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvbf16gerx2nn_internal (dmr1024, v256, vuc, const int<8>, \
+                                                 const int<4>, const int<2>);
+     PMDMXVBF16GERX2NN_INTERNAL dmf_pmdmxvbf16gerx2nn {dm,pair}
+ 
+   void __builtin_mma_dmxvf16gerx2 (dmr1024 *, v256, vuc);
+     DMXVF16GERX2 nothing {dm,dmint}
+ 
+   dmr1024 __builtin_mma_dmxvf16gerx2_internal (v256, vuc);
+     DMXVF16GERX2_INTERNAL dmf_dmxvf16gerx2 {dm}
+ 
+   void __builtin_mma_dmxvf16gerx2pp (dmr1024 *, v256, vuc);
+     DMXVF16GERX2PP nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvf16gerx2pp_internal (dmr1024, v256, vuc);
+     DMXVF16GERX2PP_INTERNAL dmf_dmxvf16gerx2pp {dm}
+ 
+   void __builtin_mma_dmxvf16gerx2pn (dmr1024 *, v256, vuc);
+     DMXVF16GERX2PN nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvf16gerx2pn_internal (dmr1024, v256, vuc);
+     DMXVF16GERX2PN_INTERNAL dmf_dmxvf16gerx2pn {dm}
+ 
+   void __builtin_mma_dmxvf16gerx2np (dmr1024 *, v256, vuc);
+     DMXVF16GERX2NP nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvf16gerx2np_internal (dmr1024, v256, vuc);
+     DMXVF16GERX2NP_INTERNAL dmf_dmxvf16gerx2np {dm}
+ 
+   void __builtin_mma_dmxvf16gerx2nn (dmr1024 *, v256, vuc);
+     DMXVF16GERX2NN nothing {dm,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_dmxvf16gerx2nn_internal (dmr1024, v256, vuc);
+     DMXVF16GERX2NN_INTERNAL dmf_dmxvf16gerx2nn {dm}
+ 
+   void __builtin_mma_pmdmxvf16gerx2 (dmr1024 *, v256, vuc, const int<8>, \
+ 				    const int<4>, const int<2>);
+     PMDMXVF16GERX2 nothing {dm,pair,dmint}
+ 
+   dmr1024 __builtin_mma_pmdmxvf16gerx2_internal (v256, vuc, const int<8>, \
+ 					       const int<4>, const int<2>);
+     PMDMXVF16GERX2_INTERNAL dmf_pmdmxvf16gerx2 {dm,pair}
+ 
+   void __builtin_mma_pmdmxvf16gerx2pp (dmr1024 *, v256, vuc, const int<8>, \
+ 				      const int<4>, const int<2>);
+     PMDMXVF16GERX2PP nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvf16gerx2pp_internal (dmr1024, v256, vuc, const int<8>, \
+ 						 const int<4>, const int<2>);
+     PMDMXVF16GERX2PP_INTERNAL dmf_pmdmxvf16gerx2pp {dm,pair}
+ 
+   void __builtin_mma_pmdmxvf16gerx2pn (dmr1024 *, v256, vuc, const int<8>, \
+ 				      const int<4>, const int<2>);
+     PMDMXVF16GERX2PN nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvf16gerx2pn_internal (dmr1024, v256, vuc, const int<8>, \
+ 						 const int<4>, const int<2>);
+     PMDMXVF16GERX2PN_INTERNAL dmf_pmdmxvf16gerx2pn {dm,pair}
+ 
+   void __builtin_mma_pmdmxvf16gerx2np (dmr1024 *, v256, vuc, const int<8>, \
+ 				      const int<4>, const int<2>);
+     PMDMXVF16GERX2NP nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvf16gerx2np_internal (dmr1024, v256, vuc, const int<8>, \
+ 						 const int<4>, const int<2>);
+     PMDMXVF16GERX2NP_INTERNAL dmf_pmdmxvf16gerx2np {dm,pair}
+ 
+   void __builtin_mma_pmdmxvf16gerx2nn (dmr1024 *, v256, vuc, const int<8>, \
+ 				      const int<4>, const int<2>);
+     PMDMXVF16GERX2NN nothing {dm,pair,dmint,dmr}
+ 
+   dmr1024 __builtin_mma_pmdmxvf16gerx2nn_internal (dmr1024, v256, vuc, const int<8>, \
+ 						 const int<4>, const int<2>);
+     PMDMXVF16GERX2NN_INTERNAL dmf_pmdmxvf16gerx2nn {dm,pair}
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000-call.cc gcc-16-20260725/gcc/config/rs6000/rs6000-call.cc
*** gcc-16-20260718/gcc/config/rs6000/rs6000-call.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000-call.cc	Sat Jul 25 22:32:06 2026
*************** rs6000_discover_homogeneous_aggregate (m
*** 432,450 ****
  bool
  rs6000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
  {
!   /* We do not allow MMA types being used as return values.  Only report
!      the invalid return value usage the first time we encounter it.  */
    if (cfun
        && !cfun->machine->mma_return_type_error
        && TREE_TYPE (cfun->decl) == fntype
!       && (TYPE_MODE (type) == OOmode || TYPE_MODE (type) == XOmode))
      {
        /* Record we have now handled function CFUN, so the next time we
  	 are called, we do not re-report the same error.  */
        cfun->machine->mma_return_type_error = true;
        if (TYPE_CANONICAL (type) != NULL_TREE)
  	type = TYPE_CANONICAL (type);
!       error ("invalid use of MMA type %qs as a function return value",
  	     IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type))));
      }
  
--- 432,455 ----
  bool
  rs6000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
  {
!   /* We do not allow Dense Math/MMA types being used as return values.  Only
!      report the invalid return value usage the first time we encounter it.  */
    if (cfun
        && !cfun->machine->mma_return_type_error
        && TREE_TYPE (cfun->decl) == fntype
!       && (TYPE_MODE (type) == OOmode
! 	   || TYPE_MODE (type) == XOmode
! 	   || TYPE_MODE (type) == TDOmode))
      {
        /* Record we have now handled function CFUN, so the next time we
  	 are called, we do not re-report the same error.  */
        cfun->machine->mma_return_type_error = true;
        if (TYPE_CANONICAL (type) != NULL_TREE)
  	type = TYPE_CANONICAL (type);
!       const char *type_class =
! 	 (TYPE_MODE (type) == TDOmode) ? "Dense Math" : "MMA";
!       error ("invalid use of %s type %qs as a function return value",
! 	     type_class,
  	     IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type))));
      }
  
*************** rs6000_function_arg (cumulative_args_t c
*** 1631,1642 ****
    machine_mode elt_mode;
    int n_elts;
  
!   /* We do not allow MMA types being used as function arguments.  */
!   if (mode == OOmode || mode == XOmode)
      {
        if (TYPE_CANONICAL (type) != NULL_TREE)
  	type = TYPE_CANONICAL (type);
!       error ("invalid use of MMA operand of type %qs as a function parameter",
  	     IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type))));
        return NULL_RTX;
      }
--- 1636,1650 ----
    machine_mode elt_mode;
    int n_elts;
  
!   /* We do not allow Dense Math/MMA types being used as function arguments.  */
!   if (mode == OOmode || mode == XOmode || mode == TDOmode)
      {
        if (TYPE_CANONICAL (type) != NULL_TREE)
  	type = TYPE_CANONICAL (type);
!       const char *type_class =
! 	 (mode == TDOmode) ? "Dense Math" : "MMA";
!       error ("invalid use of %s operand of type %qs as a function parameter",
! 	     type_class,
  	     IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type))));
        return NULL_RTX;
      }
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000-cpus.def gcc-16-20260725/gcc/config/rs6000/rs6000-cpus.def
*** gcc-16-20260718/gcc/config/rs6000/rs6000-cpus.def	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000-cpus.def	Sat Jul 25 22:32:06 2026
***************
*** 85,91 ****
  
  /* -mcpu=future flags.  */
  #define FUTURE_MASKS_SERVER	(POWER11_MASKS_SERVER			\
! 				 | OPTION_MASK_FUTURE)
  
  /* Flags that need to be turned off if -mno-vsx.  */
  #define OTHER_VSX_VECTOR_MASKS	(OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
--- 85,92 ----
  
  /* -mcpu=future flags.  */
  #define FUTURE_MASKS_SERVER	(POWER11_MASKS_SERVER			\
! 				 | OPTION_MASK_FUTURE			\
! 				 | OPTION_MASK_DMF)
  
  /* Flags that need to be turned off if -mno-vsx.  */
  #define OTHER_VSX_VECTOR_MASKS	(OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
***************
*** 126,131 ****
--- 127,133 ----
  				 | OPTION_MASK_POWER10			\
  				 | OPTION_MASK_POWER11			\
  				 | OPTION_MASK_FUTURE			\
+ 				 | OPTION_MASK_DMF			\
  				 | OPTION_MASK_P10_FUSION		\
  				 | OPTION_MASK_HTM			\
  				 | OPTION_MASK_ISEL			\
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000-gen-builtins.cc gcc-16-20260725/gcc/config/rs6000/rs6000-gen-builtins.cc
*** gcc-16-20260718/gcc/config/rs6000/rs6000-gen-builtins.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000-gen-builtins.cc	Sat Jul 25 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 94,99 ****
--- 94,102 ----
       ibmld    Restrict usage to the case when TFmode is IBM-128
       ibm128   Restrict usage to the case where __ibm128 is supported or
                if ibmld
+      dm       Needs special handling for DMF/MMA+ instructions
+      dmint    DMF/MMA+ instruction expanding to internal call at GIMPLE time
+      dmr      MMA+ instruction using a dmr register as an input operand
  
     An example stanza might look like this:
  
*************** enum bif_stanza
*** 235,240 ****
--- 238,244 ----
   BSTZ_FUTURE,
   BSTZ_FUTURE_ALTIVEC,
   BSTZ_FUTURE_VSX,
+  BSTZ_DM,
   NUMBIFSTANZAS
  };
  
*************** static stanza_entry stanza_map[NUMBIFSTA
*** 271,277 ****
      { "mma",		BSTZ_MMA	},
      { "future",	BSTZ_FUTURE	},
      { "future-altivec", BSTZ_FUTURE_ALTIVEC },
!     { "future-vsx",	BSTZ_FUTURE_VSX	}
    };
  
  static const char *enable_string[NUMBIFSTANZAS] =
--- 275,282 ----
      { "mma",		BSTZ_MMA	},
      { "future",	BSTZ_FUTURE	},
      { "future-altivec", BSTZ_FUTURE_ALTIVEC },
!     { "future-vsx",	BSTZ_FUTURE_VSX	},
!     { "dm",		BSTZ_DM		}
    };
  
  static const char *enable_string[NUMBIFSTANZAS] =
*************** static const char *enable_string[NUMBIFS
*** 299,305 ****
      "ENB_MMA",
      "ENB_FUTURE",
      "ENB_FUTURE_ALTIVEC",
!     "ENB_FUTURE_VSX"
    };
  
  /* Function modifiers provide special handling for const, pure, and fpmath
--- 304,311 ----
      "ENB_MMA",
      "ENB_FUTURE",
      "ENB_FUTURE_ALTIVEC",
!     "ENB_FUTURE_VSX",
!     "ENB_DM"
    };
  
  /* Function modifiers provide special handling for const, pure, and fpmath
*************** enum basetype
*** 333,339 ****
    BT_DECIMAL128,
    BT_IBM128,
    BT_VPAIR,
!   BT_VQUAD
  };
  
  /* Ways in which a const int value can be restricted.  RES_BITS indicates
--- 339,346 ----
    BT_DECIMAL128,
    BT_IBM128,
    BT_VPAIR,
!   BT_VQUAD,
!   BT_DMR
  };
  
  /* Ways in which a const int value can be restricted.  RES_BITS indicates
*************** struct attrinfo
*** 401,406 ****
--- 408,416 ----
    bool isendian;
    bool isibmld;
    bool isibm128;
+   bool isdm;
+   bool isdmint;
+   bool isdmr;
  };
  
  /* Fields associated with a function prototype (bif or overload).  */
*************** static typemap type_map[] =
*** 552,557 ****
--- 562,568 ----
      { "pv16qi",		"ptr_V16QI" },
      { "pv1poi",		"ptr_vector_pair" },
      { "pv1pxi",		"ptr_vector_quad" },
+     { "pv1tdoi",	"ptr_dmr1024" },
      { "pv1ti",		"ptr_V1TI" },
      { "pv2df",		"ptr_V2DF" },
      { "pv2di",		"ptr_V2DI" },
*************** static typemap type_map[] =
*** 582,587 ****
--- 593,599 ----
      { "v16qi",		"V16QI" },
      { "v1poi",		"vector_pair" },
      { "v1pxi",		"vector_quad" },
+     { "v1tdoi",	"dmr1024" },
      { "v1ti",		"V1TI" },
      { "v2df",		"V2DF" },
      { "v2di",		"V2DI" },
*************** match_type (typeinfo *typedata, int void
*** 1067,1072 ****
--- 1079,1085 ----
         vd	vector double
         v256	__vector_pair
         v512	__vector_quad
+        dmr1024	__dmr1024
  
       For simplicity, We don't support "short int" and "long long int".
       We don't currently support a <basetype> of "_Float16".  "signed"
*************** match_type (typeinfo *typedata, int void
*** 1248,1253 ****
--- 1261,1273 ----
        handle_pointer (typedata);
        return 1;
      }
+   else if (!strcmp (token, "dmr1024"))
+     {
+       typedata->isvector = 1;
+       typedata->base = BT_DMR;
+       handle_pointer (typedata);
+       return 1;
+     }
    else if (!strcmp (token, "signed"))
      typedata->issigned = 1;
    else if (!strcmp (token, "unsigned"))
*************** parse_bif_attrs (attrinfo *attrptr)
*** 1446,1451 ****
--- 1466,1477 ----
  	  attrptr->isibmld = 1;
  	else if (!strcmp (attrname, "ibm128"))
  	  attrptr->isibm128 = 1;
+        else if (!strcmp (attrname, "dm"))
+ 	  attrptr->isdm = 1;
+        else if (!strcmp (attrname, "dmint"))
+ 	  attrptr->isdmint = 1;
+        else if (!strcmp (attrname, "dmr"))
+ 	  attrptr->isdmr = 1;
  	else
  	  {
  	    diag (oldpos, "unknown attribute.\n");
*************** parse_bif_attrs (attrinfo *attrptr)
*** 1479,1492 ****
  	"pred = %d, htm = %d, htmspr = %d, htmcr = %d, mma = %d, "
  	"quad = %d, pair = %d, mmaint = %d, no32bit = %d, 32bit = %d, "
  	"cpu = %d, ldstmask = %d, lxvrse = %d, lxvrze = %d, endian = %d, "
! 	"ibmdld = %d, ibm128 = %d.\n",
  	attrptr->isextract, attrptr->isnosoft,attrptr->isldvec,
  	attrptr->isstvec, attrptr->isreve, attrptr->ispred, attrptr->ishtm,
  	attrptr->ishtmspr, attrptr->ishtmcr, attrptr->ismma,
  	attrptr->isquad, attrptr->ispair, attrptr->ismmaint,
  	attrptr->isno32bit, attrptr->is32bit, attrptr->iscpu,
  	attrptr->isldstmask, attrptr->islxvrse,	attrptr->islxvrze,
! 	attrptr->isendian, attrptr->isibmld, attrptr->isibm128);
  #endif
  
    return PC_OK;
--- 1505,1519 ----
  	"pred = %d, htm = %d, htmspr = %d, htmcr = %d, mma = %d, "
  	"quad = %d, pair = %d, mmaint = %d, no32bit = %d, 32bit = %d, "
  	"cpu = %d, ldstmask = %d, lxvrse = %d, lxvrze = %d, endian = %d, "
! 	"ibmdld = %d, ibm128 = %d, dm = %d, dmint = %d, dmr = %d.\n",
  	attrptr->isextract, attrptr->isnosoft,attrptr->isldvec,
  	attrptr->isstvec, attrptr->isreve, attrptr->ispred, attrptr->ishtm,
  	attrptr->ishtmspr, attrptr->ishtmcr, attrptr->ismma,
  	attrptr->isquad, attrptr->ispair, attrptr->ismmaint,
  	attrptr->isno32bit, attrptr->is32bit, attrptr->iscpu,
  	attrptr->isldstmask, attrptr->islxvrse,	attrptr->islxvrze,
! 	attrptr->isendian, attrptr->isibmld, attrptr->isibm128,
! 	attrptr->isdm, attrptr->isdmint, attrptr->isdmr);
  #endif
  
    return PC_OK;
*************** complete_vector_type (typeinfo *typeptr,
*** 1547,1552 ****
--- 1574,1583 ----
        memcpy (&buf[*bufi], "1pxi", 4);
        *bufi += 4;
        break;
+     case BT_DMR:
+       memcpy (&buf[*bufi], "1tdoi", 5);
+       *bufi += 5;
+       break;
      default:
        diag (pos, "unhandled basetype %d.\n", typeptr->base);
        exit (1);
*************** write_decls (void)
*** 2261,2267 ****
    fprintf (header_file, "  ENB_MMA,\n");
    fprintf (header_file, "  ENB_FUTURE,\n");
    fprintf (header_file, "  ENB_FUTURE_ALTIVEC,\n");
!   fprintf (header_file, "  ENB_FUTURE_VSX\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
--- 2292,2299 ----
    fprintf (header_file, "  ENB_MMA,\n");
    fprintf (header_file, "  ENB_FUTURE,\n");
    fprintf (header_file, "  ENB_FUTURE_ALTIVEC,\n");
!   fprintf (header_file, "  ENB_FUTURE_VSX,\n");
!   fprintf (header_file, "  ENB_DM\n");
    fprintf (header_file, "};\n\n");
  
    fprintf (header_file, "#define PPC_MAXRESTROPNDS 3\n");
*************** write_decls (void)
*** 2303,2308 ****
--- 2335,2343 ----
    fprintf (header_file, "#define bif_endian_bit\t\t(0x00200000)\n");
    fprintf (header_file, "#define bif_ibmld_bit\t\t(0x00400000)\n");
    fprintf (header_file, "#define bif_ibm128_bit\t\t(0x00800000)\n");
+   fprintf (header_file, "#define bif_dm_bit\t\t(0x02000000)\n");
+   fprintf (header_file, "#define bif_dmint_bit\t\t(0x04000000)\n");
+   fprintf (header_file, "#define bif_dmr_bit\t\t(0x08000000)\n");
    fprintf (header_file, "\n");
    fprintf (header_file,
  	   "#define bif_is_extract(x)\t((x).bifattrs & bif_extract_bit)\n");
*************** write_decls (void)
*** 2348,2353 ****
--- 2383,2394 ----
  	   "#define bif_is_ibmld(x)\t((x).bifattrs & bif_ibmld_bit)\n");
    fprintf (header_file,
  	   "#define bif_is_ibm128(x)\t((x).bifattrs & bif_ibm128_bit)\n");
+   fprintf (header_file,
+ 	   "#define bif_is_dm(x)\t((x).bifattrs & bif_dm_bit)\n");
+   fprintf (header_file,
+ 	   "#define bif_is_dmint(x)\t((x).bifattrs & bif_dmint_bit)\n");
+   fprintf (header_file,
+ 	   "#define bif_is_dmr(x)\t((x).bifattrs & bif_dmr_bit)\n");
    fprintf (header_file, "\n");
  
    fprintf (header_file,
*************** write_bif_static_init (void)
*** 2547,2552 ****
--- 2588,2599 ----
  	fprintf (init_file, " | bif_ibmld_bit");
        if (bifp->attrs.isibm128)
  	fprintf (init_file, " | bif_ibm128_bit");
+       if (bifp->attrs.isdm)
+ 	fprintf (init_file, " | bif_dm_bit");
+       if (bifp->attrs.isdmint)
+ 	fprintf (init_file, " | bif_dmint_bit");
+       if (bifp->attrs.isdmr)
+ 	fprintf (init_file, " | bif_dmr_bit");
        fprintf (init_file, ",\n");
        fprintf (init_file, "      /* restr_opnd */\t{%d, %d, %d},\n",
  	       bifp->proto.restr_opnd[0], bifp->proto.restr_opnd[1],
*************** write_bif_static_init (void)
*** 2580,2587 ****
  		   : (bifp->kind == FNK_FPMATH ? "= fp, const"
  		      : ""))));
        fprintf (init_file, "      /* assoc_bif */\tRS6000_BIF_%s%s\n",
! 	       bifp->attrs.ismmaint ? bifp->idname : "NONE",
! 	       bifp->attrs.ismmaint ? "_INTERNAL" : "");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
--- 2627,2634 ----
  		   : (bifp->kind == FNK_FPMATH ? "= fp, const"
  		      : ""))));
        fprintf (init_file, "      /* assoc_bif */\tRS6000_BIF_%s%s\n",
! 	       (bifp->attrs.ismmaint || bifp->attrs.isdmint) ? bifp->idname : "NONE",
! 	       (bifp->attrs.ismmaint || bifp->attrs.isdmint) ? "_INTERNAL" : "");
        fprintf (init_file, "    },\n");
      }
    fprintf (init_file, "  };\n\n");
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000-modes.def gcc-16-20260725/gcc/config/rs6000/rs6000-modes.def
*** gcc-16-20260718/gcc/config/rs6000/rs6000-modes.def	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000-modes.def	Sat Jul 25 22:32:06 2026
*************** VECTOR_MODE (INT, SI, 2);     /*
*** 76,81 ****
     combination.  */
  PARTIAL_INT_MODE (TI, 128, PTI);
  
! /* Modes used by __vector_pair and __vector_quad.  */
  OPAQUE_MODE (OO, 32);
  OPAQUE_MODE (XO, 64);
--- 76,82 ----
     combination.  */
  PARTIAL_INT_MODE (TI, 128, PTI);
  
! /* Modes used by __vector_pair, __vector_quad and __dmr1024.  */
  OPAQUE_MODE (OO, 32);
  OPAQUE_MODE (XO, 64);
+ OPAQUE_MODE (TDO, 128);
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000.cc gcc-16-20260725/gcc/config/rs6000/rs6000.cc
*** gcc-16-20260718/gcc/config/rs6000/rs6000.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000.cc	Sat Jul 25 22:32:06 2026
*************** enum rs6000_reg_type {
*** 292,298 ****
    ALTIVEC_REG_TYPE,
    FPR_REG_TYPE,
    SPR_REG_TYPE,
!   CR_REG_TYPE
  };
  
  /* Map register class to register type.  */
--- 292,299 ----
    ALTIVEC_REG_TYPE,
    FPR_REG_TYPE,
    SPR_REG_TYPE,
!   CR_REG_TYPE,
!   DMR_REG_TYPE
  };
  
  /* Map register class to register type.  */
*************** enum rs6000_reload_reg_type {
*** 313,318 ****
--- 314,320 ----
    RELOAD_REG_GPR,			/* General purpose registers.  */
    RELOAD_REG_FPR,			/* Traditional floating point regs.  */
    RELOAD_REG_VMX,			/* Altivec (VMX) registers.  */
+   RELOAD_REG_DMR,			/* Dense Math Facility registers.  */
    RELOAD_REG_ANY,			/* OR of GPR, FPR, Altivec masks.  */
    N_RELOAD_REG
  };
*************** enum rs6000_reload_reg_type {
*** 321,327 ****
     into real registers, and skip the ANY class, which is just an OR of the
     bits.  */
  #define FIRST_RELOAD_REG_CLASS	RELOAD_REG_GPR
! #define LAST_RELOAD_REG_CLASS	RELOAD_REG_VMX
  
  /* Map reload register type to a register in the register class.  */
  struct reload_reg_map_type {
--- 323,329 ----
     into real registers, and skip the ANY class, which is just an OR of the
     bits.  */
  #define FIRST_RELOAD_REG_CLASS	RELOAD_REG_GPR
! #define LAST_RELOAD_REG_CLASS	RELOAD_REG_DMR
  
  /* Map reload register type to a register in the register class.  */
  struct reload_reg_map_type {
*************** static const struct reload_reg_map_type
*** 333,338 ****
--- 335,341 ----
    { "Gpr",	FIRST_GPR_REGNO },	/* RELOAD_REG_GPR.  */
    { "Fpr",	FIRST_FPR_REGNO },	/* RELOAD_REG_FPR.  */
    { "VMX",	FIRST_ALTIVEC_REGNO },	/* RELOAD_REG_VMX.  */
+   { "DMR",      FIRST_DMR_REGNO },      /* RELOAD_REG_DMR.  */
    { "Any",	-1 },			/* RELOAD_REG_ANY.  */
  };
  
*************** char rs6000_reg_names[][8] =
*** 1226,1231 ****
--- 1229,1236 ----
        "0",  "1",  "2",  "3",  "4",  "5",  "6",  "7",
    /* vrsave vscr sfp */
        "vrsave", "vscr", "sfp",
+   /* DMRs */
+       "0", "1", "2", "3", "4", "5", "6", "7",
  };
  
  #ifdef TARGET_REGNAMES
*************** static const char alt_reg_names[][8] =
*** 1252,1257 ****
--- 1257,1264 ----
    "%cr0",  "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
    /* vrsave vscr sfp */
    "vrsave", "vscr", "sfp",
+   /* DMRs */
+   "%dm0", "%dm1", "%dm2", "%dm3", "%dm4", "%dm5", "%dm6", "%dm7",
  };
  #endif
  
*************** rs6000_hard_regno_nregs_internal (int re
*** 1842,1847 ****
--- 1849,1857 ----
    else if (ALTIVEC_REGNO_P (regno))
      reg_size = UNITS_PER_ALTIVEC_WORD;
  
+   else if (DMR_REGNO_P (regno))
+     reg_size = UNITS_PER_DMR_WORD;
+ 
    else
      reg_size = UNITS_PER_WORD;
  
*************** rs6000_hard_regno_mode_ok_uncached (int
*** 1858,1871 ****
    if (COMPLEX_MODE_P (mode))
      mode = GET_MODE_INNER (mode);
  
    /* Vector pair modes need even/odd VSX register pairs.  Only allow vector
       registers.  */
    if (mode == OOmode)
!     return (TARGET_MMA && VSX_REGNO_P (regno) && (regno & 1) == 0);
  
!   /* MMA accumulator modes need FPR registers divisible by 4.  */
    if (mode == XOmode)
!     return (TARGET_MMA && FP_REGNO_P (regno) && (regno & 3) == 0);
  
    /* PTImode can only go in GPRs.  Quad word memory operations require even/odd
       register combinations, and use PTImode where we need to deal with quad
--- 1868,1900 ----
    if (COMPLEX_MODE_P (mode))
      mode = GET_MODE_INNER (mode);
  
+   /* No other types other than XOmode or TDOmode can go in DMRs.  */
+   if (DMR_REGNO_P (regno) && !(mode ==XOmode || mode == TDOmode))
+     return 0;
+ 
+   /* TDOmode value can be held in either 1 DMR register or 8 VSX
+      registers.  */
+   if (mode == TDOmode)
+     {
+       if (TARGET_DMF)
+ 	return (DMR_REGNO_P (regno)
+ 		|| (VSX_REGNO_P (regno)
+ 		    && VSX_REGNO_P (last_regno)
+ 		    && (regno & 1) == 0));
+       else
+ 	return 0;
+     }
+ 
    /* Vector pair modes need even/odd VSX register pairs.  Only allow vector
       registers.  */
    if (mode == OOmode)
!     return ((TARGET_MMA || TARGET_DMF) && VSX_REGNO_P (regno) && (regno & 1) == 0);
  
!   /* MMA accumulator modes need FPR registers divisible by 4.
!      If TARGET_DMF is true, XOmode value can be held in a DMR register.  */
    if (mode == XOmode)
!     return ((TARGET_DMF && DMR_REGNO_P (regno))
! 	     || (TARGET_MMA && FP_REGNO_P (regno) && (regno & 3) == 0));
  
    /* PTImode can only go in GPRs.  Quad word memory operations require even/odd
       register combinations, and use PTImode where we need to deal with quad
*************** static bool
*** 1982,1988 ****
  rs6000_modes_tieable_p (machine_mode mode1, machine_mode mode2)
  {
    if (mode1 == PTImode || mode1 == OOmode || mode1 == XOmode
!       || mode2 == PTImode || mode2 == OOmode || mode2 == XOmode)
      return mode1 == mode2;
  
    if (ALTIVEC_OR_VSX_VECTOR_MODE (mode1))
--- 2011,2018 ----
  rs6000_modes_tieable_p (machine_mode mode1, machine_mode mode2)
  {
    if (mode1 == PTImode || mode1 == OOmode || mode1 == XOmode
!       || mode1 == TDOmode || mode2 == PTImode || mode2 == OOmode
!       || mode2 == XOmode || mode2 == TDOmode)
      return mode1 == mode2;
  
    if (ALTIVEC_OR_VSX_VECTOR_MODE (mode1))
*************** rs6000_debug_reg_global (void)
*** 2273,2278 ****
--- 2303,2309 ----
      V4DFmode,
      OOmode,
      XOmode,
+     TDOmode,
      CCmode,
      CCUNSmode,
      CCEQmode,
*************** rs6000_debug_reg_global (void)
*** 2308,2313 ****
--- 2339,2345 ----
    rs6000_debug_reg_print (FIRST_ALTIVEC_REGNO,
  			  LAST_ALTIVEC_REGNO,
  			  "vs");
+   rs6000_debug_reg_print (FIRST_DMR_REGNO, LAST_DMR_REGNO, "dmr");
    rs6000_debug_reg_print (LR_REGNO, LR_REGNO, "lr");
    rs6000_debug_reg_print (CTR_REGNO, CTR_REGNO, "ctr");
    rs6000_debug_reg_print (CR0_REGNO, CR7_REGNO, "cr");
*************** rs6000_debug_reg_global (void)
*** 2328,2333 ****
--- 2360,2366 ----
  	   "wr reg_class = %s\n"
  	   "wx reg_class = %s\n"
  	   "wA reg_class = %s\n"
+ 	   "wD reg_class = %s\n"
  	   "\n",
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_d]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],
*************** rs6000_debug_reg_global (void)
*** 2335,2341 ****
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_we]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wr]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wx]],
! 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wA]]);
  
    nl = "\n";
    for (m = 0; m < NUM_MACHINE_MODES; ++m)
--- 2368,2375 ----
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_we]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wr]],
  	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wx]],
! 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wA]],
! 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wD]]);
  
    nl = "\n";
    for (m = 0; m < NUM_MACHINE_MODES; ++m)
*************** rs6000_setup_reg_addr_masks (void)
*** 2632,2637 ****
--- 2666,2685 ----
  	  addr_mask = 0;
  	  reg = reload_reg_map[rc].reg;
  
+ 	  if (rc == RELOAD_REG_DMR)
+ 	    {
+ 	      if (TARGET_DMF && (m2 == XOmode || m2 == TDOmode))
+ 		{
+ 		  addr_mask = RELOAD_REG_VALID;
+ 		  reg_addr[m].addr_mask[rc] = addr_mask;
+ 		  any_addr_mask |= addr_mask;
+ 		}
+ 	      else
+ 		reg_addr[m].addr_mask[rc] = 0;
+ 
+ 	      continue;
+ 	    }
+ 
  	  /* Can mode values go in the GPR/FPR/Altivec registers?  */
  	  if (reg >= 0 && rs6000_hard_regno_mode_ok_p[m][reg])
  	    {
*************** rs6000_setup_reg_addr_masks (void)
*** 2727,2736 ****
  
  	  /* Vector pairs can do both indexed and offset loads if the
  	     instructions are enabled, otherwise they can only do offset loads
! 	     since it will be broken into two vector moves.  Vector quads can
! 	     only do offset loads.  */
! 	  else if ((addr_mask != 0) && TARGET_MMA
! 		   && (m2 == OOmode || m2 == XOmode))
  	    {
  	      addr_mask |= RELOAD_REG_OFFSET;
  	      if (rc == RELOAD_REG_FPR || rc == RELOAD_REG_VMX)
--- 2775,2786 ----
  
  	  /* Vector pairs can do both indexed and offset loads if the
  	     instructions are enabled, otherwise they can only do offset loads
! 	     since it will be broken into two vector moves.  Vector quads and
! 	     dmr1024 type can only do offset loads.  */
! 	  else if ((addr_mask != 0)
! 		   && ((TARGET_MMA && (m2 == OOmode || m2 == XOmode))
! 			|| (TARGET_DMF
! 			    && (m2 == TDOmode || m2 == OOmode || m2 == XOmode))))
  	    {
  	      addr_mask |= RELOAD_REG_OFFSET;
  	      if (rc == RELOAD_REG_FPR || rc == RELOAD_REG_VMX)
*************** rs6000_init_hard_regno_mode_ok (bool glo
*** 2778,2783 ****
--- 2828,2836 ----
    for (r = FIRST_ALTIVEC_REGNO; r <= LAST_ALTIVEC_REGNO; ++r)
      rs6000_regno_regclass[r] = ALTIVEC_REGS;
  
+   for (r = FIRST_DMR_REGNO; r <= LAST_DMR_REGNO; ++r)
+     rs6000_regno_regclass[r] = DMR_REGS;
+ 
    rs6000_regno_regclass[CR0_REGNO] = CR0_REGS;
    for (r = CR1_REGNO; r <= CR7_REGNO; ++r)
      rs6000_regno_regclass[r] = CR_REGS;
*************** rs6000_init_hard_regno_mode_ok (bool glo
*** 2806,2811 ****
--- 2859,2865 ----
    reg_class_to_reg_type[(int)LINK_OR_CTR_REGS] = SPR_REG_TYPE;
    reg_class_to_reg_type[(int)CR_REGS] = CR_REG_TYPE;
    reg_class_to_reg_type[(int)CR0_REGS] = CR_REG_TYPE;
+   reg_class_to_reg_type[(int)DMR_REGS] = DMR_REG_TYPE;
  
    if (TARGET_VSX)
      {
*************** rs6000_init_hard_regno_mode_ok (bool glo
*** 2970,2976 ****
  	wc - Reserved to represent individual CR bits (used in LLVM).
  	wn - always NO_REGS.
  	wr - GPR if 64-bit mode is permitted.
! 	wx - Float register if we can do 32-bit int stores.  */
  
    if (TARGET_HARD_FLOAT)
      rs6000_constraints[RS6000_CONSTRAINT_d] = FLOAT_REGS;
--- 3024,3031 ----
  	wc - Reserved to represent individual CR bits (used in LLVM).
  	wn - always NO_REGS.
  	wr - GPR if 64-bit mode is permitted.
! 	wx - Float register if we can do 32-bit int stores.
! 	wD - Dense math register if TARGET_DMF is enabled, else float register.  */
  
    if (TARGET_HARD_FLOAT)
      rs6000_constraints[RS6000_CONSTRAINT_d] = FLOAT_REGS;
*************** rs6000_init_hard_regno_mode_ok (bool glo
*** 2978,2983 ****
--- 3033,3042 ----
      rs6000_constraints[RS6000_CONSTRAINT_v] = ALTIVEC_REGS;
    if (TARGET_VSX)
      rs6000_constraints[RS6000_CONSTRAINT_wa] = VSX_REGS;
+   if (TARGET_DMF)
+     rs6000_constraints[RS6000_CONSTRAINT_wD] = DMR_REGS;
+   else if (TARGET_MMA)
+     rs6000_constraints[RS6000_CONSTRAINT_wD] = FLOAT_REGS;
  
    if (TARGET_POWERPC64)
      {
*************** rs6000_init_hard_regno_mode_ok (bool glo
*** 3160,3165 ****
--- 3219,3230 ----
  	}
      }
  
+   if (TARGET_DMF)
+     {
+       reg_addr[TDOmode].reload_load = CODE_FOR_reload_tdo_load;
+       reg_addr[TDOmode].reload_store = CODE_FOR_reload_tdo_store;
+     }
+ 
    /* Precalculate HARD_REGNO_NREGS.  */
    for (r = 0; HARD_REGISTER_NUM_P (r); ++r)
      for (m = 0; m < NUM_MACHINE_MODES; ++m)
*************** rs6000_init_hard_regno_mode_ok (bool glo
*** 3186,3191 ****
--- 3251,3259 ----
        else if (c == FLOAT_REGS)
  	reg_size = UNITS_PER_FP_WORD;
  
+       else if (c == DMR_REGS)
+ 	reg_size = UNITS_PER_DMR_WORD;
+ 
        else
  	reg_size = UNITS_PER_WORD;
  
*************** rs6000_option_override_internal (bool gl
*** 4381,4386 ****
--- 4449,4467 ----
        rs6000_isa_flags &= ~OPTION_MASK_MMA;
      }
  
+   /* Enable -mdense_math by default on future systems.  */
+   if (TARGET_FUTURE && (rs6000_isa_flags_explicit & OPTION_MASK_DMF) == 0)
+     rs6000_isa_flags |= OPTION_MASK_DMF;
+ 
+   /* Turn off DMF options on non-future systems.  */
+   else if (!TARGET_FUTURE && TARGET_DMF)
+     {
+       if ((rs6000_isa_flags_explicit & OPTION_MASK_DMF) != 0)
+ 	error ("%qs requires %qs", "-mdense_math", "-mcpu=future");
+ 
+       rs6000_isa_flags &= ~OPTION_MASK_DMF;
+     }
+ 
    /* Enable power10 fusion if we are tuning for power10, even if we aren't
       generating power10 instructions.  */
    if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION))
*************** reg_offset_addressing_ok_p (machine_mode
*** 8668,8674 ****
  	 underlying vectors support offset addressing.  */
      case E_OOmode:
      case E_XOmode:
!       return TARGET_MMA;
  
      case E_SDmode:
        /* If we can do direct load/stores of SDmode, restrict it to reg+reg
--- 8749,8758 ----
  	 underlying vectors support offset addressing.  */
      case E_OOmode:
      case E_XOmode:
!       return TARGET_MMA || TARGET_DMF;
! 
!     case E_TDOmode:
!       return TARGET_DMF;
  
      case E_SDmode:
        /* If we can do direct load/stores of SDmode, restrict it to reg+reg
*************** rs6000_emit_move (rtx dest, rtx source,
*** 11223,11228 ****
--- 11307,11318 ----
  	       (mode == OOmode) ? "__vector_pair" : "__vector_quad");
        break;
  
+     case E_TDOmode:
+       if (CONST_INT_P (operands[1]))
+ 	error ("%qs is an opaque type, and you cannot set it to constants",
+ 	       "__dmr1024");
+       break;
+ 
      case E_SImode:
      case E_DImode:
        /* Use default pattern for address of ELF small data */
*************** rs6000_secondary_reload_memory (rtx addr
*** 12351,12356 ****
--- 12441,12455 ----
      addr_mask = (reg_addr[mode].addr_mask[RELOAD_REG_VMX]
  		 & ~RELOAD_REG_AND_M16);
  
+   /* DMR registers have no load/store instructions; memory access goes
+      through an intermediate VSX stage: DMR registers are first copied to
+      VSX registers which are then stored to memory, or value in memory is
+      first loaded into VSX registers which are then copied ot DMR registers.
+      Use the DMR addr_mask so the address-code checks below can determine
+      whether a scratch GPR is needed to simplify the address.  */
+   else if (rclass == DMR_REGS)
+     addr_mask = reg_addr[mode].addr_mask[RELOAD_REG_DMR];
+ 
    /* If the register allocator hasn't made up its mind yet on the register
       class to use, settle on defaults to use.  */
    else if (rclass == NO_REGS)
*************** rs6000_secondary_reload_simple_move (enu
*** 12679,12684 ****
--- 12778,12789 ----
  	       || (to_type == SPR_REG_TYPE && from_type == GPR_REG_TYPE)))
      return true;
  
+   /* DMRs can be copied to VSX register, and vice versa.  */
+   if (TARGET_DMF && (mode == XOmode || mode == TDOmode)
+       && ((to_type == DMR_REG_TYPE && from_type == VSX_REG_TYPE)
+ 	   || (to_type == VSX_REG_TYPE && from_type == DMR_REG_TYPE)))
+     return true;
+ 
    return false;
  }
  
*************** rs6000_preferred_reload_class (rtx x, en
*** 13373,13378 ****
--- 13478,13487 ----
    machine_mode mode = GET_MODE (x);
    bool is_constant = CONSTANT_P (x);
  
+   /* Values cannot be loaded into DMR registers.  */
+   if (rclass == DMR_REGS)
+     return NO_REGS;
+ 
    /* If a mode can't go in FPR/ALTIVEC/VSX registers, don't return a preferred
       reload class for it.  */
    if ((rclass == ALTIVEC_REGS || rclass == VSX_REGS)
*************** rs6000_preferred_reload_class (rtx x, en
*** 13469,13475 ****
  	return VSX_REGS;
  
        if (mode == XOmode)
! 	return FLOAT_REGS;
  
        if (GET_MODE_CLASS (mode) == MODE_INT)
  	return GENERAL_REGS;
--- 13578,13587 ----
  	return VSX_REGS;
  
        if (mode == XOmode)
! 	return (TARGET_DMF ? VSX_REGS : FLOAT_REGS);
! 
!       if (mode == TDOmode)
! 	return VSX_REGS;
  
        if (GET_MODE_CLASS (mode) == MODE_INT)
  	return GENERAL_REGS;
*************** rs6000_secondary_reload_class (enum reg_
*** 13633,13638 ****
--- 13745,13770 ----
        && regno >= 0 && CR_REGNO_P (regno))
      return NO_REGS;
  
+   /* DMR registers can only be moved to/from VSX registers.
+      - DMR -> VSX or VSX -> DMR: direct, no scratch register needed.
+      - DMR -> memory or memory -> DMR: must route through VSX; request
+      VSX_REGS as the intermediate scratch class.
+      - DMR -> DMR: direct move, no scratch needed.  */
+   if (rclass == DMR_REGS)
+     {
+       /* VSX register or another DMR register: direct move, no scratch.  */
+       if (regno >= 0 && (VSX_REGNO_P (regno) || DMR_REGNO_P (regno)))
+ 	return NO_REGS;
+ 
+       /* Memory (regno == -1) or unresolved pseudo: need a VSX intermediate.  */
+       return VSX_REGS;
+     }
+ 
+   /* Copying into a VSX register from a DMR register: direct.  */
+   if ((rclass == VSX_REGS || rclass == FLOAT_REGS || rclass == ALTIVEC_REGS)
+       && regno >= 0 && DMR_REGNO_P (regno))
+     return NO_REGS;
+ 
    /* Otherwise, we need GENERAL_REGS.  */
    return GENERAL_REGS;
  }
*************** print_operand (FILE *file, rtx x, int co
*** 14125,14130 ****
--- 14257,14271 ----
  	 output_operand.  */
  
      case 'A':
+       /* Use dense math register if TARGET_DMF enabled.  */
+       if (TARGET_DMF)
+ 	{
+ 	  if (!REG_P (x) || !DMR_REGNO_P (REGNO (x)))
+ 	    output_operand_lossage ("invalid %%A value");
+ 	  else
+ 	    fprintf (file, "%d", REGNO (x) - FIRST_DMR_REGNO);
+ 	  return;
+ 	}
        /* Write the MMA accumulator number associated with VSX register X.  */
        if (!REG_P (x) || !FP_REGNO_P (REGNO (x)) || (REGNO (x) % 4) != 0)
  	output_operand_lossage ("invalid %%A value");
*************** print_operand (FILE *file, rtx x, int co
*** 14502,14507 ****
--- 14643,14672 ----
  	print_operand (file, x, 0);
        return;
  
+     case 'W':
+       /* Like '%x', but prints the VSX register number +2.
+ 	  TODO: Validate %W operands (e.g. reject V30/V31 to avoid referencing
+ 	  invalid registers). Ensure GET_MODE_SIZE (GET_MODE (x)) >= 64
+ 	  before using %W.  */
+       if (!REG_P (x) || !VSX_REGNO_P (REGNO (x)))
+ 	output_operand_lossage ("invalid %%W value");
+       else
+ 	{
+ 	  int reg = REGNO (x);
+ 	  int vsx_reg = (FP_REGNO_P (reg)
+ 			 ? reg - 32
+ 			 : reg - FIRST_ALTIVEC_REGNO + 32);
+ 	  vsx_reg += 2;
+ 
+ #ifdef TARGET_REGNAMES
+ 	  if (TARGET_REGNAMES)
+ 	    fprintf (file, "%%vs%d", vsx_reg);
+ 	  else
+ #endif
+ 	    fprintf (file, "%d", vsx_reg);
+ 	}
+       return;
+ 
      case 'x':
        /* X is a FPR or Altivec register used in a VSX context.  */
        if (!REG_P (x) || !VSX_REGNO_P (REGNO (x)))
*************** rs6000_mangle_type (const_tree type)
*** 20635,20640 ****
--- 20800,20807 ----
      return "u13__vector_pair";
    if (type == vector_quad_type_node)
      return "u13__vector_quad";
+   if (type == dmr1024_type_node)
+     return "u9__dmr1024";
  
    /* For all other types, use the default mangling.  */
    return NULL;
*************** rs6000_debug_address_cost (rtx x, machin
*** 22747,22752 ****
--- 22914,22944 ----
  }
  
  
+ static int
+ rs6000_dmr_register_move_cost (machine_mode mode, reg_class_t rclass)
+ {
+   const int base_cost = 2;
+   HARD_REG_SET vsx_set = (reg_class_contents[rclass]
+ 			  & reg_class_contents[VSX_REGS]);
+ 
+   if (TARGET_DMF && !hard_reg_set_empty_p (vsx_set))
+     {
+       /* XOmode can be copied in 1 instruction.  */
+       if (mode == XOmode)
+ 	return base_cost;
+ 
+       /* TDOmode can be copied in 2 instructions.  */
+       else if (mode == TDOmode)
+ 	return base_cost * 2;
+ 
+       else
+ 	return base_cost * 2 * hard_regno_nregs (FIRST_DMR_REGNO, mode);
+     }
+ 
+   return 1000 * 2 * hard_regno_nregs (FIRST_DMR_REGNO, mode);
+ }
+ 
+ 
  /* A C expression returning the cost of moving data from a register of class
     CLASS1 to one of CLASS2.  */
  
*************** rs6000_register_move_cost (machine_mode
*** 22767,22776 ****
    HARD_REG_SET to_vsx, from_vsx;
    to_vsx = reg_class_contents[to] & reg_class_contents[VSX_REGS];
    from_vsx = reg_class_contents[from] & reg_class_contents[VSX_REGS];
!   if (!hard_reg_set_empty_p (to_vsx)
!       && !hard_reg_set_empty_p (from_vsx)
!       && (TARGET_VSX
! 	  || hard_reg_set_intersect_p (to_vsx, from_vsx)))
      {
        int reg = FIRST_FPR_REGNO;
        if (TARGET_VSX
--- 22959,22978 ----
    HARD_REG_SET to_vsx, from_vsx;
    to_vsx = reg_class_contents[to] & reg_class_contents[VSX_REGS];
    from_vsx = reg_class_contents[from] & reg_class_contents[VSX_REGS];
! 
!   if ((mode == TDOmode || mode==XOmode) && from == DMR_REGS && to == DMR_REGS)
!     ret = 2 * hard_regno_nregs (FIRST_DMR_REGNO, mode);
! 
!   else if (from == DMR_REGS)
!     ret = rs6000_dmr_register_move_cost (mode, to);
! 
!   else if (to == DMR_REGS)
!     ret = rs6000_dmr_register_move_cost (mode, from);
! 
!   else if (!hard_reg_set_empty_p (to_vsx)
! 	   && !hard_reg_set_empty_p (from_vsx)
! 	   && (TARGET_VSX
! 	       || hard_reg_set_intersect_p (to_vsx, from_vsx)))
      {
        int reg = FIRST_FPR_REGNO;
        if (TARGET_VSX
*************** rs6000_memory_move_cost (machine_mode mo
*** 22866,22871 ****
--- 23068,23076 ----
      ret = 4 * hard_regno_nregs (32, mode);
    else if (reg_classes_intersect_p (rclass, ALTIVEC_REGS))
      ret = 4 * hard_regno_nregs (FIRST_ALTIVEC_REGNO, mode);
+   else if (reg_classes_intersect_p (rclass, DMR_REGS))
+     ret = (rs6000_dmr_register_move_cost (mode, VSX_REGS)
+ 	   + rs6000_memory_move_cost (mode, VSX_REGS, false));
    else
      ret = 4 + rs6000_register_move_cost (mode, rclass, GENERAL_REGS);
  
*************** rs6000_compute_pressure_classes (enum re
*** 24074,24079 ****
--- 24279,24286 ----
        if (TARGET_HARD_FLOAT)
  	pressure_classes[n++] = FLOAT_REGS;
      }
+   if (TARGET_DMF)
+     pressure_classes[n++] = DMR_REGS;
    pressure_classes[n++] = CR_REGS;
    pressure_classes[n++] = SPECIAL_REGS;
  
*************** rs6000_debugger_regno (unsigned int regn
*** 24239,24244 ****
--- 24446,24456 ----
    if (regno == 64)
      return 64;
  
+   /* Note that the debug format register numbers may be changed
+      later.  */
+   if (DMR_REGNO_P (regno))
+     return regno - FIRST_DMR_REGNO + 112;
+ 
    gcc_unreachable ();
  }
  
*************** static struct rs6000_opt_mask const rs60
*** 24469,24474 ****
--- 24681,24687 ----
    { "power10",			OPTION_MASK_POWER10,		false, true  },
    { "power11",			OPTION_MASK_POWER11,		false, false },
    { "future",			OPTION_MASK_FUTURE,		false, false },
+   { "dense-math",		OPTION_MASK_DMF,		false, true  },
    { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
    { "htm",			OPTION_MASK_HTM,		false, true  },
    { "isel",			OPTION_MASK_ISEL,		false, true  },
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27405,27413 ****
    mode = GET_MODE (dst);
    nregs = hard_regno_nregs (reg, mode);
  
!   /* If we have a vector quad register for MMA, and this is a load or store,
!      see if we can use vector paired load/stores.  */
!   if (mode == XOmode && TARGET_MMA
        && (MEM_P (dst) || MEM_P (src)))
      {
        reg_mode = OOmode;
--- 27618,27627 ----
    mode = GET_MODE (dst);
    nregs = hard_regno_nregs (reg, mode);
  
!   /* If we have a vector quad register for MMA or DMR register for Dense Math,
!      and this is a load or store, see if we can use vector paired
!      load/stores.  */
!   if ((mode == XOmode || mode == TDOmode) && (TARGET_MMA || TARGET_DMF)
        && (MEM_P (dst) || MEM_P (src)))
      {
        reg_mode = OOmode;
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27415,27421 ****
      }
    /* If we have a vector pair/quad mode, split it into two/four separate
       vectors.  */
!   else if (mode == OOmode || mode == XOmode)
      reg_mode = V1TImode;
    else if (FP_REGNO_P (reg))
      reg_mode = DECIMAL_FLOAT_MODE_P (mode) ? DDmode :
--- 27629,27635 ----
      }
    /* If we have a vector pair/quad mode, split it into two/four separate
       vectors.  */
!   else if (mode == OOmode || mode == XOmode || mode == TDOmode)
      reg_mode = V1TImode;
    else if (FP_REGNO_P (reg))
      reg_mode = DECIMAL_FLOAT_MODE_P (mode) ? DDmode :
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27461,27473 ****
        return;
      }
  
!   /* The __vector_pair and __vector_quad modes are multi-register
       modes, so if we have to load or store the registers, we have to be
       careful to properly swap them if we're in little endian mode
       below.  This means the last register gets the first memory
       location.  We also need to be careful of using the right register
       numbers if we are splitting XO to OO.  */
!   if (mode == OOmode || mode == XOmode)
      {
        nregs = hard_regno_nregs (reg, mode);
        int reg_mode_nregs = hard_regno_nregs (reg, reg_mode);
--- 27675,27687 ----
        return;
      }
  
!   /* The __vector_pair, __vector_quad and __dmr1024 modes are multi-register
       modes, so if we have to load or store the registers, we have to be
       careful to properly swap them if we're in little endian mode
       below.  This means the last register gets the first memory
       location.  We also need to be careful of using the right register
       numbers if we are splitting XO to OO.  */
!   if (mode == OOmode || mode == XOmode || mode == TDOmode)
      {
        nregs = hard_regno_nregs (reg, mode);
        int reg_mode_nregs = hard_regno_nregs (reg, reg_mode);
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27477,27484 ****
  	  unsigned size = GET_MODE_SIZE (reg_mode);
  
  	  /* If we are reading an accumulator register, we have to
! 	     deprime it before we can access it.  */
! 	  if (TARGET_MMA
  	      && GET_MODE (src) == XOmode && FP_REGNO_P (REGNO (src)))
  	    emit_insn (gen_mma_xxmfacc (src, src));
  
--- 27691,27699 ----
  	  unsigned size = GET_MODE_SIZE (reg_mode);
  
  	  /* If we are reading an accumulator register, we have to
! 	     deprime it before we can access it, unless we have dense math
! 	     registers, which do not need priming/depriming.  */
! 	  if (TARGET_MMA && !TARGET_DMF
  	      && GET_MODE (src) == XOmode && FP_REGNO_P (REGNO (src)))
  	    emit_insn (gen_mma_xxmfacc (src, src));
  
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27511,27518 ****
  	    }
  
  	  /* If we are writing an accumulator register, we have to
! 	     prime it after we've written it.  */
! 	  if (TARGET_MMA
  	      && GET_MODE (dst) == XOmode && FP_REGNO_P (REGNO (dst)))
  	    emit_insn (gen_mma_xxmtacc (dst, dst));
  
--- 27726,27734 ----
  	    }
  
  	  /* If we are writing an accumulator register, we have to
! 	     prime it after we've written it, unless we have dense math
! 	     registers, which do not need priming/depriming.  */
! 	  if (TARGET_MMA && !TARGET_DMF
  	      && GET_MODE (dst) == XOmode && FP_REGNO_P (REGNO (dst)))
  	    emit_insn (gen_mma_xxmtacc (dst, dst));
  
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27580,27587 ****
  	    }
  
  	  /* We are writing an accumulator register, so we have to
! 	     prime it after we've written it.  */
! 	  if (GET_MODE (src) == XOmode)
  	    emit_insn (gen_mma_xxmtacc (dst, dst));
  
  	  return;
--- 27796,27804 ----
  	    }
  
  	  /* We are writing an accumulator register, so we have to
! 	     prime it after we've written it, unless we have dense math
! 	     registers, which do not need priming/depriming.  */
! 	  if (GET_MODE (src) == XOmode && !TARGET_DMF)
  	    emit_insn (gen_mma_xxmtacc (dst, dst));
  
  	  return;
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27593,27608 ****
    if (REG_P (src) && REG_P (dst) && (REGNO (src) < REGNO (dst)))
      {
        /* If we are reading an accumulator register, we have to
! 	 deprime it before we can access it.  */
!       if (TARGET_MMA
  	  && GET_MODE (src) == XOmode && FP_REGNO_P (REGNO (src)))
  	emit_insn (gen_mma_xxmfacc (src, src));
  
        /* Move register range backwards, if we might have destructive
  	 overlap.  */
        int i;
!       /* XO/OO are opaque so cannot use subregs. */
!       if (mode == OOmode || mode == XOmode )
  	{
  	  for (i = nregs - 1; i >= 0; i--)
  	    {
--- 27810,27826 ----
    if (REG_P (src) && REG_P (dst) && (REGNO (src) < REGNO (dst)))
      {
        /* If we are reading an accumulator register, we have to
! 	 deprime it before we can access it, unless we have dense math
! 	 registers, which do not need priming/depriming.  */
!       if (TARGET_MMA && !TARGET_DMF
  	  && GET_MODE (src) == XOmode && FP_REGNO_P (REGNO (src)))
  	emit_insn (gen_mma_xxmfacc (src, src));
  
        /* Move register range backwards, if we might have destructive
  	 overlap.  */
        int i;
!       /* XO/OO/TDO are opaque so cannot use subregs. */
!       if (mode == OOmode || mode == XOmode || mode == TDOmode)
  	{
  	  for (i = nregs - 1; i >= 0; i--)
  	    {
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27621,27628 ****
  	}
  
        /* If we are writing an accumulator register, we have to
! 	 prime it after we've written it.  */
!       if (TARGET_MMA
  	  && GET_MODE (dst) == XOmode && FP_REGNO_P (REGNO (dst)))
  	emit_insn (gen_mma_xxmtacc (dst, dst));
      }
--- 27839,27847 ----
  	}
  
        /* If we are writing an accumulator register, we have to
! 	 prime it after we've written it, unless we have dense math
! 	 registers, which do not need priming/depriming.  */
!       if (TARGET_MMA && !TARGET_DMF
  	  && GET_MODE (dst) == XOmode && FP_REGNO_P (REGNO (dst)))
  	emit_insn (gen_mma_xxmtacc (dst, dst));
      }
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27758,27765 ****
  	}
  
        /* If we are reading an accumulator register, we have to
! 	 deprime it before we can access it.  */
!       if (TARGET_MMA && REG_P (src)
  	  && GET_MODE (src) == XOmode && FP_REGNO_P (REGNO (src)))
  	emit_insn (gen_mma_xxmfacc (src, src));
  
--- 27977,27985 ----
  	}
  
        /* If we are reading an accumulator register, we have to
! 	 deprime it before we can access it, unless we have dense math
! 	 registers, which do not need priming/depriming.  */
!       if (TARGET_MMA && !TARGET_DMF && REG_P (src)
  	  && GET_MODE (src) == XOmode && FP_REGNO_P (REGNO (src)))
  	emit_insn (gen_mma_xxmfacc (src, src));
  
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27775,27782 ****
  	  if (j == 0 && used_update)
  	    continue;
  
! 	  /* XO/OO are opaque so cannot use subregs. */
! 	  if (mode == OOmode || mode == XOmode )
  	    {
  	      rtx dst_i = gen_rtx_REG (reg_mode, REGNO (dst) + j);
  	      rtx src_i = gen_rtx_REG (reg_mode, REGNO (src) + j);
--- 27995,28002 ----
  	  if (j == 0 && used_update)
  	    continue;
  
! 	  /* XO/OO/TDO are opaque so cannot use subregs. */
! 	  if (mode == OOmode || mode == XOmode || mode == TDOmode)
  	    {
  	      rtx dst_i = gen_rtx_REG (reg_mode, REGNO (dst) + j);
  	      rtx src_i = gen_rtx_REG (reg_mode, REGNO (src) + j);
*************** rs6000_split_multireg_move (rtx dst, rtx
*** 27790,27797 ****
  	}
  
        /* If we are writing an accumulator register, we have to
! 	 prime it after we've written it.  */
!       if (TARGET_MMA && REG_P (dst)
  	  && GET_MODE (dst) == XOmode && FP_REGNO_P (REGNO (dst)))
  	emit_insn (gen_mma_xxmtacc (dst, dst));
  
--- 28010,28018 ----
  	}
  
        /* If we are writing an accumulator register, we have to
! 	 prime it after we've written it, unless we have dense math
! 	 registers, which do not need priming/depriming.  */
!       if (TARGET_MMA && !TARGET_DMF && REG_P (dst)
  	  && GET_MODE (dst) == XOmode && FP_REGNO_P (REGNO (dst)))
  	emit_insn (gen_mma_xxmtacc (dst, dst));
  
*************** rs6000_invalid_conversion (const_tree fr
*** 28804,28810 ****
  
    if (frommode != tomode)
      {
!       /* Do not allow conversions to/from XOmode and OOmode types.  */
        if (frommode == XOmode)
  	return N_("invalid conversion from type %<__vector_quad%>");
        if (tomode == XOmode)
--- 29025,29032 ----
  
    if (frommode != tomode)
      {
!       /* Do not allow conversions to/from XOmode, OOmode and TDOmode
! 	 types.  */
        if (frommode == XOmode)
  	return N_("invalid conversion from type %<__vector_quad%>");
        if (tomode == XOmode)
*************** rs6000_invalid_conversion (const_tree fr
*** 28813,28818 ****
--- 29035,29044 ----
  	return N_("invalid conversion from type %<__vector_pair%>");
        if (tomode == OOmode)
  	return N_("invalid conversion to type %<__vector_pair%>");
+       if (frommode == TDOmode)
+ 	return N_("invalid conversion from type %<__dmr1024%>");
+       if (tomode == TDOmode)
+ 	return N_("invalid conversion to type %<__dmr1024%>");
      }
  
    /* Conversion allowed.  */
*************** constant_generates_xxspltidp (vec_const_
*** 29294,29326 ****
    return sf_value;
  }
  
! /* Now we have only two opaque types, they are __vector_quad and
!    __vector_pair built-in types.  They are target specific and
!    only available when MMA is supported.  With MMA supported, it
!    simply returns true, otherwise it checks if the given gimple
!    STMT is an assignment, asm or call stmt and uses either of
!    these two opaque types unexpectedly, if yes, it would raise
!    an error message and returns true, otherwise it returns false.  */
  
  bool
  rs6000_opaque_type_invalid_use_p (gimple *stmt)
  {
!   if (TARGET_MMA)
      return false;
  
!   /* If the given TYPE is one MMA opaque type, emit the corresponding
!      error messages and return true, otherwise return false.  */
    auto check_and_error_invalid_use = [](tree type)
    {
      tree mv = TYPE_MAIN_VARIANT (type);
!     if (mv == vector_quad_type_node)
        {
  	error ("type %<__vector_quad%> requires the %qs option", "-mmma");
  	return true;
        }
!     else if (mv == vector_pair_type_node)
        {
! 	error ("type %<__vector_pair%> requires the %qs option", "-mmma");
  	return true;
        }
      return false;
--- 29520,29563 ----
    return sf_value;
  }
  
! /* Now we have three opaque types: the __vector_quad, __vector_pair and
!    __dmr1024 built-in types.  They are target specific and each one is
!    only available when its required ISA support is enabled:
!    __vector_pair requires MMA or DMF (vector pairs are used by both),
!    __vector_quad requires MMA, and __dmr1024 requires DMF.  Note that
!    DMF does not imply MMA (e.g. -mcpu=future -mno-mma).  With both MMA
!    and DMF enabled, all three types are usable and this simply returns
!    false, otherwise it checks if the given gimple STMT is an
!    assignment, asm or call stmt and uses one of these opaque types
!    whose ISA support is missing, if yes, it would raise an error
!    message and returns true, otherwise it returns false.  */
  
  bool
  rs6000_opaque_type_invalid_use_p (gimple *stmt)
  {
!   if (TARGET_MMA && TARGET_DMF)
      return false;
  
!   /* If the given TYPE is one MMA/DMF opaque type whose required ISA
!      support is missing, emit the corresponding error message and
!      return true, otherwise return false.  */
    auto check_and_error_invalid_use = [](tree type)
    {
      tree mv = TYPE_MAIN_VARIANT (type);
!     if (!TARGET_MMA && mv == vector_quad_type_node)
        {
  	error ("type %<__vector_quad%> requires the %qs option", "-mmma");
  	return true;
        }
!     else if (!TARGET_MMA && !TARGET_DMF && mv == vector_pair_type_node)
        {
! 	error ("type %<__vector_pair%> requires the %qs or %qs option", "-mmma"
! 	       , "-mdense-math");
! 	return true;
!       }
!     else if (!TARGET_DMF && mv == dmr1024_type_node)
!       {
! 	error ("type %<__dmr1024%> requires the %qs option", "-mdense-math");
  	return true;
        }
      return false;
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000.h gcc-16-20260725/gcc/config/rs6000/rs6000.h
*** gcc-16-20260718/gcc/config/rs6000/rs6000.h	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000.h	Sat Jul 25 22:32:06 2026
*************** extern unsigned char rs6000_recip_bits[]
*** 657,662 ****
--- 657,663 ----
  #define UNITS_PER_FP_WORD 8
  #define UNITS_PER_ALTIVEC_WORD 16
  #define UNITS_PER_VSX_WORD 16
+ #define UNITS_PER_DMR_WORD 128
  
  /* Type used for ptrdiff_t, as a string used in a declaration.  */
  #define PTRDIFF_TYPE "int"
*************** enum data_align { align_abi, align_opt,
*** 755,761 ****
     RS/6000 has 32 fixed-point registers, 32 floating-point registers,
     a count register, a link register, and 8 condition register fields,
     which we view here as separate registers.  AltiVec adds 32 vector
!    registers and a VRsave register.
  
     In addition, the difference between the frame and argument pointers is
     a function of the number of registers saved, so we need to have a
--- 756,764 ----
     RS/6000 has 32 fixed-point registers, 32 floating-point registers,
     a count register, a link register, and 8 condition register fields,
     which we view here as separate registers.  AltiVec adds 32 vector
!    registers and a VRsave register. The Dense Math Facility, which may be
!    present in a future processor, introduces 8 DMR registers each having
!    1024 bits.
  
     In addition, the difference between the frame and argument pointers is
     a function of the number of registers saved, so we need to have a
*************** enum data_align { align_abi, align_opt,
*** 770,776 ****
     Another pseudo (not included in DWARF_FRAME_REGISTERS) is soft frame
     pointer, which is eventually eliminated in favor of SP or FP.  */
  
! #define FIRST_PSEUDO_REGISTER 111
  
  /* Use standard DWARF numbering for DWARF debugging information.  */
  #define DEBUGGER_REGNO(REGNO) rs6000_debugger_regno ((REGNO), 0)
--- 773,779 ----
     Another pseudo (not included in DWARF_FRAME_REGISTERS) is soft frame
     pointer, which is eventually eliminated in favor of SP or FP.  */
  
! #define FIRST_PSEUDO_REGISTER 119
  
  /* Use standard DWARF numbering for DWARF debugging information.  */
  #define DEBUGGER_REGNO(REGNO) rs6000_debugger_regno ((REGNO), 0)
*************** enum data_align { align_abi, align_opt,
*** 807,813 ****
     /* cr0..cr7 */				   \
     0, 0, 0, 0, 0, 0, 0, 0,			   \
     /* vrsave vscr sfp */			   \
!    1, 1, 1					   \
  }
  
  /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
--- 810,818 ----
     /* cr0..cr7 */				   \
     0, 0, 0, 0, 0, 0, 0, 0,			   \
     /* vrsave vscr sfp */			   \
!    1, 1, 1,					   \
!    /* DMRs */					   \
!    0, 0, 0, 0, 0, 0, 0, 0			   \
  }
  
  /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
*************** enum data_align { align_abi, align_opt,
*** 831,837 ****
     /* cr0..cr7 */				   \
     1, 1, 0, 0, 0, 1, 1, 1,			   \
     /* vrsave vscr sfp */			   \
!    0, 0, 0					   \
  }
  
  #define TOTAL_ALTIVEC_REGS	(LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO + 1)
--- 836,844 ----
     /* cr0..cr7 */				   \
     1, 1, 0, 0, 0, 1, 1, 1,			   \
     /* vrsave vscr sfp */			   \
!    0, 0, 0,					   \
!    /* DMRs */					   \
!    1, 1, 1, 1, 1, 1, 1, 1			   \
  }
  
  #define TOTAL_ALTIVEC_REGS	(LAST_ALTIVEC_REGNO - FIRST_ALTIVEC_REGNO + 1)
*************** enum data_align { align_abi, align_opt,
*** 868,873 ****
--- 875,881 ----
  	v2		(not saved; incoming vector arg reg; return value)
  	v19 - v14	(not saved or used for anything)
  	v31 - v20	(saved; order given to save least number)
+ 	dmr0 - dmr7	(not saved)
  	vrsave, vscr	(fixed)
  	sfp		(fixed)
  */
*************** enum data_align { align_abi, align_opt,
*** 910,915 ****
--- 918,925 ----
     66,								\
     83, 82, 81, 80, 79, 78,					\
     95, 94, 93, 92, 91, 90, 89, 88, 87, 86, 85, 84,		\
+    /* DMRs */							\
+    111, 112, 113, 114, 115, 116, 117, 118,			\
     108, 109,							\
     110								\
  }
*************** enum data_align { align_abi, align_opt,
*** 936,941 ****
--- 946,954 ----
  /* True if register is a VSX register.  */
  #define VSX_REGNO_P(N) (FP_REGNO_P (N) || ALTIVEC_REGNO_P (N))
  
+ /* True if register is a DMR register.  */
+ #define DMR_REGNO_P(N) ((N) >= FIRST_DMR_REGNO && (N) <= LAST_DMR_REGNO)
+ 
  /* Alternate name for any vector register supporting floating point, no matter
     which instruction set(s) are available.  */
  #define VFLOAT_REGNO_P(N) \
*************** enum data_align { align_abi, align_opt,
*** 975,981 ****
  /* Modes that are not vectors, but require vector alignment.  Treat these like
     vectors in terms of loads and stores.  */
  #define VECTOR_ALIGNMENT_P(MODE)					\
!   (FLOAT128_VECTOR_P (MODE) || (MODE) == OOmode || (MODE) == XOmode)
  
  #define ALTIVEC_VECTOR_MODE(MODE)					\
    ((MODE) == V16QImode							\
--- 988,994 ----
  /* Modes that are not vectors, but require vector alignment.  Treat these like
     vectors in terms of loads and stores.  */
  #define VECTOR_ALIGNMENT_P(MODE)					\
!   (FLOAT128_VECTOR_P (MODE) || (MODE) == OOmode || (MODE) == XOmode || (MODE) == TDOmode)
  
  #define ALTIVEC_VECTOR_MODE(MODE)					\
    ((MODE) == V16QImode							\
*************** enum reg_class
*** 1073,1078 ****
--- 1086,1092 ----
    FLOAT_REGS,
    ALTIVEC_REGS,
    VSX_REGS,
+   DMR_REGS,
    VRSAVE_REGS,
    VSCR_REGS,
    GEN_OR_FLOAT_REGS,
*************** enum reg_class
*** 1102,1107 ****
--- 1116,1122 ----
    "FLOAT_REGS",								\
    "ALTIVEC_REGS",							\
    "VSX_REGS",								\
+   "DMR_REGS",								\
    "VRSAVE_REGS",							\
    "VSCR_REGS",								\
    "GEN_OR_FLOAT_REGS",							\
*************** enum reg_class
*** 1136,1141 ****
--- 1151,1158 ----
    { 0x00000000, 0x00000000, 0xffffffff, 0x00000000 },			\
    /* VSX_REGS.  */							\
    { 0x00000000, 0xffffffff, 0xffffffff, 0x00000000 },			\
+   /* DMR_REGS.  */							\
+   { 0x00000000, 0x00000000, 0x00000000, 0x007f8000 },			\
    /* VRSAVE_REGS.  */							\
    { 0x00000000, 0x00000000, 0x00000000, 0x00001000 },			\
    /* VSCR_REGS.  */							\
*************** enum reg_class
*** 1163,1169 ****
    /* CA_REGS.  */							\
    { 0x00000000, 0x00000000, 0x00000000, 0x00000004 },			\
    /* ALL_REGS.  */							\
!   { 0xffffffff, 0xffffffff, 0xffffffff, 0x00007fff }			\
  }
  
  /* The same information, inverted:
--- 1180,1186 ----
    /* CA_REGS.  */							\
    { 0x00000000, 0x00000000, 0x00000000, 0x00000004 },			\
    /* ALL_REGS.  */							\
!   { 0xffffffff, 0xffffffff, 0xffffffff, 0x007fffff }			\
  }
  
  /* The same information, inverted:
*************** enum r6000_reg_class_enum {
*** 1187,1192 ****
--- 1204,1210 ----
    RS6000_CONSTRAINT_wr,		/* GPR register if 64-bit  */
    RS6000_CONSTRAINT_wx,		/* FPR register for STFIWX */
    RS6000_CONSTRAINT_wA,		/* BASE_REGS if 64-bit.  */
+   RS6000_CONSTRAINT_wD,		/* Accumulator registers.  */
    RS6000_CONSTRAINT_MAX
  };
  
*************** extern char rs6000_reg_names[][8];	/* re
*** 2063,2069 ****
    &rs6000_reg_names[108][0],	/* vrsave  */				\
    &rs6000_reg_names[109][0],	/* vscr  */				\
  									\
!   &rs6000_reg_names[110][0]	/* sfp  */				\
  }
  
  /* Table of additional register names to use in user input.  */
--- 2081,2096 ----
    &rs6000_reg_names[108][0],	/* vrsave  */				\
    &rs6000_reg_names[109][0],	/* vscr  */				\
  									\
!   &rs6000_reg_names[110][0],	/* sfp  */				\
! 									\
!   &rs6000_reg_names[111][0],	/* dmr0  */				\
!   &rs6000_reg_names[112][0],	/* dmr1  */				\
!   &rs6000_reg_names[113][0],	/* dmr2  */				\
!   &rs6000_reg_names[114][0],	/* dmr3  */				\
!   &rs6000_reg_names[115][0],	/* dmr4  */				\
!   &rs6000_reg_names[116][0],	/* dmr5  */				\
!   &rs6000_reg_names[117][0],	/* dmr6  */				\
!   &rs6000_reg_names[118][0] 	/* dmr7  */				\
  }
  
  /* Table of additional register names to use in user input.  */
*************** extern char rs6000_reg_names[][8];	/* re
*** 2117,2122 ****
--- 2144,2151 ----
    {"vs52", 84}, {"vs53", 85}, {"vs54", 86}, {"vs55", 87},	\
    {"vs56", 88}, {"vs57", 89}, {"vs58", 90}, {"vs59", 91},	\
    {"vs60", 92}, {"vs61", 93}, {"vs62", 94}, {"vs63", 95},	\
+   {"dmr0", 111}, {"dmr1", 112}, {"dmr2", 113}, {"dmr3", 114},   \
+   {"dmr4", 115}, {"dmr5", 116}, {"dmr6", 117}, {"dmr7", 118},   \
  }
  
  /* This is how to output an element of a case-vector that is relative.  */
*************** enum rs6000_builtin_type_index
*** 2250,2255 ****
--- 2279,2285 ----
    RS6000_BTI_const_str,		 /* pointer to const char * */
    RS6000_BTI_vector_pair,	 /* unsigned 256-bit types (vector pair).  */
    RS6000_BTI_vector_quad,	 /* unsigned 512-bit types (vector quad).  */
+   RS6000_BTI_dmr1024,            /* unsigned 1024-bit type (dmr1024).  */
    RS6000_BTI_const_ptr_void,     /* const pointer to void */
    RS6000_BTI_ptr_V16QI,
    RS6000_BTI_ptr_V1TI,
*************** enum rs6000_builtin_type_index
*** 2288,2293 ****
--- 2318,2324 ----
    RS6000_BTI_ptr_dfloat128,
    RS6000_BTI_ptr_vector_pair,
    RS6000_BTI_ptr_vector_quad,
+   RS6000_BTI_ptr_dmr1024,
    RS6000_BTI_ptr_long_long,
    RS6000_BTI_ptr_long_long_unsigned,
    RS6000_BTI_INTPTI,
*************** enum rs6000_builtin_type_index
*** 2349,2354 ****
--- 2380,2386 ----
  #define const_str_type_node		 (rs6000_builtin_types[RS6000_BTI_const_str])
  #define vector_pair_type_node		 (rs6000_builtin_types[RS6000_BTI_vector_pair])
  #define vector_quad_type_node		 (rs6000_builtin_types[RS6000_BTI_vector_quad])
+ #define dmr1024_type_node                (rs6000_builtin_types[RS6000_BTI_dmr1024])
  #define pcvoid_type_node		 (rs6000_builtin_types[RS6000_BTI_const_ptr_void])
  #define ptr_V16QI_type_node		 (rs6000_builtin_types[RS6000_BTI_ptr_V16QI])
  #define ptr_V1TI_type_node		 (rs6000_builtin_types[RS6000_BTI_ptr_V1TI])
*************** enum rs6000_builtin_type_index
*** 2387,2392 ****
--- 2419,2425 ----
  #define ptr_dfloat128_type_node		 (rs6000_builtin_types[RS6000_BTI_ptr_dfloat128])
  #define ptr_vector_pair_type_node	 (rs6000_builtin_types[RS6000_BTI_ptr_vector_pair])
  #define ptr_vector_quad_type_node	 (rs6000_builtin_types[RS6000_BTI_ptr_vector_quad])
+ #define ptr_dmr1024_type_node            (rs6000_builtin_types[RS6000_BTI_ptr_dmr1024])
  #define ptr_long_long_integer_type_node	 (rs6000_builtin_types[RS6000_BTI_ptr_long_long])
  #define ptr_long_long_unsigned_type_node (rs6000_builtin_types[RS6000_BTI_ptr_long_long_unsigned])
  
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000.md gcc-16-20260725/gcc/config/rs6000/rs6000.md
*** gcc-16-20260718/gcc/config/rs6000/rs6000.md	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000.md	Sat Jul 25 22:32:06 2026
***************
*** 51,56 ****
--- 51,58 ----
     (VRSAVE_REGNO		108)
     (VSCR_REGNO			109)
     (FRAME_POINTER_REGNUM	110)
+    (FIRST_DMR_REGNO		111)
+    (LAST_DMR_REGNO		118)
    ])
  
  ;;
***************
*** 221,227 ****
     vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,
     vecfloat,vecfdiv,vecdouble,mtvsr,mfvsr,crypto,
     veclogical,veccmpfx,vecexts,vecmove,
!    htm,htmsimple,dfp,mma,
     fused_arith_logical,
     fused_cmp_isel,
     fused_carry,
--- 223,229 ----
     vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,
     vecfloat,vecfdiv,vecdouble,mtvsr,mfvsr,crypto,
     veclogical,veccmpfx,vecexts,vecmove,
!    htm,htmsimple,dfp,mma,dmf,
     fused_arith_logical,
     fused_cmp_isel,
     fused_carry,
***************
*** 369,375 ****
    (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
  
  ;; The ISA we implement.
! (define_attr "isa" "any,p5,p6,p7,p7v,p8,p8v,p9,p9v,p9kf,p9tf,p10,future"
    (const_string "any"))
  
  ;; Is this alternative enabled for the current CPU/ISA/etc.?
--- 371,377 ----
    (const (symbol_ref "(enum attr_cpu) rs6000_tune")))
  
  ;; The ISA we implement.
! (define_attr "isa" "any,p5,p6,p7,p7v,p8,p8v,p9,p9v,p9kf,p9tf,p10,future,mma,dmf"
    (const_string "any"))
  
  ;; Is this alternative enabled for the current CPU/ISA/etc.?
***************
*** 425,430 ****
--- 427,440 ----
       (and (eq_attr "isa" "future")
            (match_test "TARGET_FUTURE"))
       (const_int 1)
+ 
+      (and (eq_attr "isa" "mma")
+ 	  (match_test "TARGET_MMA"))
+      (const_int 1)
+ 
+      (and (eq_attr "isa" "dmf")
+ 	  (match_test "TARGET_DMF"))
+      (const_int 1)
      ] (const_int 0)))
  
  ;; If this instruction is microcoded on the CELL processor
diff -Nrcpad gcc-16-20260718/gcc/config/rs6000/rs6000.opt gcc-16-20260725/gcc/config/rs6000/rs6000.opt
*** gcc-16-20260718/gcc/config/rs6000/rs6000.opt	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/config/rs6000/rs6000.opt	Sat Jul 25 22:32:06 2026
*************** Target Undocumented Mask(POWER11) Var(rs
*** 599,604 ****
--- 599,608 ----
  mfuture
  Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use %<-mfuture>, use %<-mcpu=future>)
  
+ mdense-math
+ Target Mask(DMF) Var(rs6000_isa_flags)
+ Generate (do not generate) DMF (Dense Math Facility) instructions.
+ 
  mprefixed
  Target Mask(PREFIXED) Var(rs6000_isa_flags)
  Generate (do not generate) prefixed memory instructions.
diff -Nrcpad gcc-16-20260718/gcc/cp/ChangeLog gcc-16-20260725/gcc/cp/ChangeLog
*** gcc-16-20260718/gcc/cp/ChangeLog	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/cp/ChangeLog	Sat Jul 25 22:32:07 2026
***************
*** 1,3 ****
--- 1,17 ----
+ 2026-07-23  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/126215
+ 	* constexpr.cc (replace_decl_r): Recompute the flags
+ 	unconditionally.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-13  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR driver/124058
+ 	* decl.cc (maybe_prepare_return_this): Use OPT_Wuse_after_free_.
+ 
  2026-07-14  Jakub Jelinek  <jakub@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/gcc/cp/constexpr.cc gcc-16-20260725/gcc/cp/constexpr.cc
*** gcc-16-20260718/gcc/cp/constexpr.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/cp/constexpr.cc	Sat Jul 25 22:32:07 2026
*************** replace_decl_r (tree *tp, int *walk_subt
*** 3772,3787 ****
    if (TREE_CODE (*tp) == ADDR_EXPR)
      {
        d->pset->add (*tp);
-       auto save_changed = d->changed;
-       d->changed = false;
        cp_walk_tree (&TREE_OPERAND (*tp, 0), replace_decl_r, d, nullptr);
!       if (d->changed)
! 	{
! 	  cxx_mark_addressable (*tp);
! 	  recompute_tree_invariant_for_addr_expr (*tp);
! 	}
!       else
! 	d->changed = save_changed;
        *walk_subtrees = 0;
      }
    else if (*tp == d->decl)
--- 3772,3780 ----
    if (TREE_CODE (*tp) == ADDR_EXPR)
      {
        d->pset->add (*tp);
        cp_walk_tree (&TREE_OPERAND (*tp, 0), replace_decl_r, d, nullptr);
!       cxx_mark_addressable (*tp);
!       recompute_tree_invariant_for_addr_expr (*tp);
        *walk_subtrees = 0;
      }
    else if (*tp == d->decl)
diff -Nrcpad gcc-16-20260718/gcc/cp/decl.cc gcc-16-20260725/gcc/cp/decl.cc
*** gcc-16-20260718/gcc/cp/decl.cc	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/cp/decl.cc	Sat Jul 25 22:32:07 2026
*************** maybe_prepare_return_this (tree cdtor)
*** 20292,20298 ****
    if (targetm.cxx.cdtor_returns_this ())
      if (tree val = DECL_ARGUMENTS (cdtor))
        {
! 	suppress_warning (val, OPT_Wuse_after_free);
  	return val;
        }
  
--- 20292,20298 ----
    if (targetm.cxx.cdtor_returns_this ())
      if (tree val = DECL_ARGUMENTS (cdtor))
        {
! 	suppress_warning (val, OPT_Wuse_after_free_);
  	return val;
        }
  
diff -Nrcpad gcc-16-20260718/gcc/doc/extend.texi gcc-16-20260725/gcc/doc/extend.texi
*** gcc-16-20260718/gcc/doc/extend.texi	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/doc/extend.texi	Sat Jul 25 22:32:07 2026
*************** instructions, but allow the compiler to
*** 18581,18586 ****
--- 18581,18587 ----
  * PowerPC Hardware Transactional Memory Built-in Functions::
  * PowerPC Atomic Memory Operation Functions::
  * PowerPC Matrix-Multiply Assist Built-in Functions::
+ * PowerPC Dense Math Facility Built-in Functions::
  * PRU Built-in Functions::
  * RISC-V Built-in Functions::
  * RISC-V Vector Intrinsics::
*************** __vector_pair __builtin_vsx_lxvp (size_t
*** 27335,27340 ****
--- 27336,27404 ----
  void __builtin_vsx_stxvp (__vector_pair, size_t, __vector_pair *);
  @end smallexample
  
+ Future ISA of PowerPC may add new Matrix-Multiply Assist Plus (MMA+)
+ instructions.  GCC provides support for these instructions through the
+ following built-in functions which are enabled with the @code{-mmma} option.
+ The vec_t type below is defined to be a normal vector unsigned char type.
+ The uint2, uint4 and uint8 parameters are 2-bit, 4-bit and 8-bit unsigned
+ integer constants respectively.  The compiler will verify that they are
+ constants and that their values are within range.  The __dmr1024 type is a
+ 1024-bit integer type.
+ 
+ The built-in functions supported are:
+ 
+ @smallexample
+ void __builtin_mma_dmxvi8gerx4 (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvi8gerx4pp (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvi8gerx4spp (__dmr1024 *, __vector_pair, vec_t);
+ 
+ void __builtin_mma_pmdmxvi8gerx4 (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint4);
+ void __builtin_mma_pmdmxvi8gerx4pp (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint4);
+ void __builtin_mma_pmdmxvi8gerx4spp (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint4);
+ 
+ void __builtin_mma_dmxvbf16gerx2 (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvbf16gerx2pp (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvbf16gerx2pn (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvbf16gerx2np (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvbf16gerx2nn (__dmr1024 *, __vector_pair, vec_t);
+ 
+ void __builtin_mma_pmdmxvbf16gerx2 (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvbf16gerx2pp (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvbf16gerx2pn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvbf16gerx2np (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvbf16gerx2nn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ 
+ void __builtin_mma_dmxvf16gerx2 (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvf16gerx2pp (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvf16gerx2pn (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvf16gerx2np (__dmr1024 *, __vector_pair, vec_t);
+ void __builtin_mma_dmxvf16gerx2nn (__dmr1024 *, __vector_pair, vec_t);
+ 
+ void __builtin_mma_pmdmxvf16gerx2 (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvf16gerx2pp (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvf16gerx2pn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvf16gerx2np (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ void __builtin_mma_pmdmxvf16gerx2nn (__dmr1024 *, __vector_pair, vec_t, uint8, uint4, uint2);
+ @end smallexample
+ 
+ @node PowerPC Dense Math Facility Built-in Functions
+ @subsection PowerPC Dense Math Facility Built-in Functions
+ 
+ A future PowerPC processor may provide Dense Math Facility (DMF)
+ instructions.  GCC provides support for these instructions through the
+ following built-in functions which are enabled with the @code{-mdense-math}
+ option.  The vec_t type below is defined to be a normal vector unsigned char
+ type.  The __dmr1024 type is a 1024 bit integer type.
+ 
+ The built-in functions supported are:
+ 
+ @smallexample
+ void __builtin_dmsetdmrz (__dmr1024 *);
+ void __builtin_dmmr (__dmr1024 *, __dmr1024 *);
+ void __builtin_dmxor (__dmr1024 *, __dmr1024 *);
+ void __builtin_build_dmr (__dmr1024 *, vec_t, vec_t, vec_t, vec_t, vec_t, vec_t, vec_t, vec_t);
+ @end smallexample
+ 
  @node PRU Built-in Functions
  @subsection PRU Built-in Functions
  
diff -Nrcpad gcc-16-20260718/gcc/doc/invoke.texi gcc-16-20260725/gcc/doc/invoke.texi
*** gcc-16-20260718/gcc/doc/invoke.texi	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/doc/invoke.texi	Sat Jul 25 22:32:07 2026
*************** See RS/6000 and PowerPC Options.
*** 1403,1409 ****
  -mgnu-attribute
  -mstack-protector-guard=@var{guard}  -mstack-protector-guard-reg=@var{reg}
  -mstack-protector-guard-offset=@var{offset}  -mprefixed
! -mpcrel  -mmma  -mrop-protect  -mprivileged
  -mno-splat-word-constant  -mno-splat-float-constant
  -mno-ieee128-constant  -mno-warn-altivec-long}
  
--- 1403,1409 ----
  -mgnu-attribute
  -mstack-protector-guard=@var{guard}  -mstack-protector-guard-reg=@var{reg}
  -mstack-protector-guard-offset=@var{offset}  -mprefixed
! -mpcrel  -mmma  -mdense-math  -mrop-protect  -mprivileged
  -mno-splat-word-constant  -mno-splat-float-constant
  -mno-ieee128-constant  -mno-warn-altivec-long}
  
*************** Warn about uses of pointers to dynamical
*** 8442,8447 ****
--- 8442,8448 ----
  been rendered indeterminate by a call to a deallocation function.
  The warning is enabled at all optimization levels but may yield different
  results with optimization than without.
+ @option{-Wuse-after-free} is equivalent to @option{-Wuse-after-free=1}.
  
  @table @gcctabopt
  @item -Wuse-after-free=1
*************** following options:
*** 31615,31621 ****
  -mcrypto  -mhtm  -mpower8-fusion
  -mquad-memory  -mquad-memory-atomic  -mfloat128
  -mfloat128-hardware  -mprefixed  -mpcrel  -mmma
! -mrop-protect}
  
  The particular options set for any particular CPU varies between
  compiler versions, depending on what setting seems to produce optimal
--- 31616,31622 ----
  -mcrypto  -mhtm  -mpower8-fusion
  -mquad-memory  -mquad-memory-atomic  -mfloat128
  -mfloat128-hardware  -mprefixed  -mpcrel  -mmma
! -mdense-math -mrop-protect}
  
  The particular options set for any particular CPU varies between
  compiler versions, depending on what setting seems to produce optimal
*************** Generate (do not generate) the MMA instr
*** 32712,32717 ****
--- 32713,32726 ----
  option requires that the option @option{-mcpu=power10} (or later)
  is enabled.
  
+ @opindex mdense-math
+ @opindex mno-dense-math
+ @item -mdense-math
+ @itemx -mno-dense-math
+ Generate (do not generate) Dense Math Facility (DMF) instructions.
+ The @option{-mdense-math} option requires that the option
+ @option{-mcpu=future} (or later) is enabled.
+ 
  @opindex mrop-protect
  @opindex mno-rop-protect
  @item -mrop-protect
diff -Nrcpad gcc-16-20260718/gcc/doc/md.texi gcc-16-20260725/gcc/doc/md.texi
*** gcc-16-20260718/gcc/doc/md.texi	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/doc/md.texi	Sat Jul 25 22:32:07 2026
*************** Like @code{b}, if @option{-mpowerpc64} i
*** 3418,3423 ****
--- 3418,3427 ----
  @item wB
  Signed 5-bit constant integer that can be loaded into an Altivec register.
  
+ @item wD
+ Dense math register if @option{-mdense-math} is used; floating point register if
+ @option{-mmma} with @option{-mno-dense-math}; otherwise, @code{NO_REGS}.
+ 
  @item wE
  Vector constant that can be loaded with the XXSPLTIB instruction.
  
diff -Nrcpad gcc-16-20260718/gcc/doc/sourcebuild.texi gcc-16-20260725/gcc/doc/sourcebuild.texi
*** gcc-16-20260718/gcc/doc/sourcebuild.texi	Sat Jul 18 22:32:07 2026
--- gcc-16-20260725/gcc/doc/sourcebuild.texi	Sat Jul 25 22:32:07 2026
*************** Target supports the execution of @code{a
*** 2723,2728 ****
--- 2723,2732 ----
  @item amx_fp8
  Target supports the execution of @code{amx-fp8} instructions.
  
+ @item can_deref_null
+ Target runtime permits dereferencing a null pointer without trapping, for
+ example because address zero is mapped and readable.
+ 
  @item cell_hw
  Test system can execute AltiVec and Cell PPU instructions.
  
diff -Nrcpad gcc-16-20260718/gcc/doc/tm.texi gcc-16-20260725/gcc/doc/tm.texi
*** gcc-16-20260718/gcc/doc/tm.texi	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/doc/tm.texi	Sat Jul 25 22:32:07 2026
*************** mode or ``no mode'', depending on contex
*** 10696,10703 ****
  
  @deftypefn {Target Hook} void TARGET_MODE_EMIT (int @var{entity}, int @var{mode}, int @var{prev_mode}, HARD_REG_SET @var{regs_live})
  Generate one or more insns to set @var{entity} to @var{mode}.
! @var{hard_reg_live} is the set of hard registers live at the point where
! the insn(s) are to be inserted. @var{prev_moxde} indicates the mode
  to switch from, or is the number of modes if the previous mode is not
  known.  Sets of a lower numbered entity will be emitted before
  sets of a higher numbered entity to a mode of the same or lower priority.
--- 10696,10703 ----
  
  @deftypefn {Target Hook} void TARGET_MODE_EMIT (int @var{entity}, int @var{mode}, int @var{prev_mode}, HARD_REG_SET @var{regs_live})
  Generate one or more insns to set @var{entity} to @var{mode}.
! @var{regs_live} is the set of hard registers live at the point where
! the insn(s) are to be inserted. @var{prev_mode} indicates the mode
  to switch from, or is the number of modes if the previous mode is not
  known.  Sets of a lower numbered entity will be emitted before
  sets of a higher numbered entity to a mode of the same or lower priority.
diff -Nrcpad gcc-16-20260718/gcc/fortran/ChangeLog gcc-16-20260725/gcc/fortran/ChangeLog
*** gcc-16-20260718/gcc/fortran/ChangeLog	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/fortran/ChangeLog	Sat Jul 25 22:32:07 2026
***************
*** 1,3 ****
--- 1,15 ----
+ 2026-07-20  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-03  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/97592
+ 	PR fortran/125998
+ 	* trans-array.cc (gfc_conv_array_parameter): Always create a new
+ 	descriptor.  Copy lbound and ubound from the original descriptor
+ 	using matching dimension indexes.  Recalculate stride and
+ 	offset.
+ 
  2026-07-14  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/gcc/fortran/trans-array.cc gcc-16-20260725/gcc/fortran/trans-array.cc
*** gcc-16-20260718/gcc/fortran/trans-array.cc	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/fortran/trans-array.cc	Sat Jul 25 22:32:07 2026
*************** gfc_conv_array_parameter (gfc_se *se, gf
*** 9737,9750 ****
  	{
  	  tmp = build_fold_indirect_ref_loc (input_location, desc);
  
! 	  gfc_ss * ss = gfc_walk_expr (expr);
! 	  if (!transposed_dims (ss) && expr->rank != -1)
! 	    {
! 	      if (!ctree)
! 		gfc_conv_descriptor_data_set (&se->pre, tmp, ptr);
! 	    }
! 	  else if (!ctree)
  	    {
  	      tree old_field, new_field;
  	      tree old_desc = tmp;
  	      tree new_desc = gfc_create_var (TREE_TYPE (old_desc), "arg_desc");
--- 9737,9746 ----
  	{
  	  tmp = build_fold_indirect_ref_loc (input_location, desc);
  
! 	  if (!ctree)
  	    {
+ 	      /* The original descriptor may have transposed dims so we
+ 		 can't reuse it directly; we have to create a new one.  */
  	      tree old_field, new_field;
  	      tree old_desc = tmp;
  	      tree new_desc = gfc_create_var (TREE_TYPE (old_desc), "arg_desc");
*************** gfc_conv_array_parameter (gfc_se *se, gf
*** 9809,9827 ****
  		}
  	      else
  		{
! 		  /* The original descriptor has transposed dims so we can't
! 		     reuse it directly; we have to create a new one.  */
! 		  old_field = gfc_conv_descriptor_offset_get (old_desc);
! 		  gfc_conv_descriptor_offset_set (&se->pre, new_desc, old_field);
  
  		  for (int i = 0; i < expr->rank; i++)
  		    {
! 		      old_field = gfc_conv_descriptor_dimension (old_desc,
! 			gfc_rank_cst[get_array_ref_dim_for_loop_dim (ss, i)]);
! 		      new_field = gfc_conv_descriptor_dimension (new_desc,
! 			gfc_rank_cst[i]);
! 		      gfc_add_modify (&se->pre, new_field, old_field);
  		    }
  		}
  
  	      if (flag_coarray == GFC_FCOARRAY_LIB
--- 9805,9859 ----
  		}
  	      else
  		{
! 		  tree offset = gfc_index_zero_node;
! 
! 		  tree stride = gfc_index_one_node;
  
  		  for (int i = 0; i < expr->rank; i++)
  		    {
! 		      tree dim = gfc_rank_cst[i];
! 
! 		      tree lbound = gfc_conv_descriptor_lbound_get (old_desc,
! 								    dim);
! 		      lbound = gfc_evaluate_now (lbound, &se->pre);
! 		      gfc_conv_descriptor_lbound_set (&se->pre, new_desc, dim,
! 						      lbound);
! 
! 		      tree ubound = gfc_conv_descriptor_ubound_get (old_desc,
! 								    dim);
! 		      ubound = gfc_evaluate_now (ubound, &se->pre);
! 		      gfc_conv_descriptor_ubound_set (&se->pre, new_desc, dim,
! 						      ubound);
! 
! 		      gfc_conv_descriptor_stride_set (&se->pre, new_desc, dim,
! 						      stride);
! 
! 		      tree tmp = fold_build2_loc (input_location, MULT_EXPR,
! 						  gfc_array_index_type,
! 						  stride, lbound);
! 		      offset = fold_build2_loc (input_location, MINUS_EXPR,
! 						gfc_array_index_type,
! 						offset, tmp);
! 		      offset = gfc_evaluate_now (offset, &se->pre);
! 
! 		      /* Now calculate the stride for next dimension, unless the
! 			 current dimension is the last one.  */
! 		      if (i == expr->rank - 1)
! 			break;
! 
! 		      tmp = fold_build2_loc (input_location, MINUS_EXPR,
! 					     gfc_array_index_type,
! 					     lbound, gfc_index_one_node);
! 		      tree extent = fold_build2_loc (input_location, MINUS_EXPR,
! 						     gfc_array_index_type,
! 						     ubound, tmp);
! 		      stride = fold_build2_loc (input_location, MULT_EXPR,
! 						gfc_array_index_type,
! 						stride, extent);
! 		      stride = gfc_evaluate_now (stride, &se->pre);
  		    }
+ 
+ 		  gfc_conv_descriptor_offset_set (&se->pre, new_desc, offset);
  		}
  
  	      if (flag_coarray == GFC_FCOARRAY_LIB
*************** gfc_conv_array_parameter (gfc_se *se, gf
*** 9837,9843 ****
  	      gfc_conv_descriptor_data_set (&se->pre, new_desc, ptr);
  	      se->expr = gfc_build_addr_expr (NULL_TREE, new_desc);
  	    }
- 	  gfc_free_ss (ss);
  	}
  
        if (gfc_option.rtcheck & GFC_RTCHECK_ARRAY_TEMPS)
--- 9869,9874 ----
diff -Nrcpad gcc-16-20260718/gcc/gcc-diagnostic-spec.cc gcc-16-20260725/gcc/gcc-diagnostic-spec.cc
*** gcc-16-20260718/gcc/gcc-diagnostic-spec.cc	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/gcc-diagnostic-spec.cc	Sat Jul 25 22:32:07 2026
*************** nowarn_spec_t::nowarn_spec_t (opt_code o
*** 100,106 ****
  
      case OPT_Wdangling_pointer_:
      case OPT_Wreturn_local_addr:
-     case OPT_Wuse_after_free:
      case OPT_Wuse_after_free_:
        m_bits = NW_DANGLING;
        break;
--- 100,105 ----
diff -Nrcpad gcc-16-20260718/gcc/gimple-ssa-warn-access.cc gcc-16-20260725/gcc/gimple-ssa-warn-access.cc
*** gcc-16-20260718/gcc/gimple-ssa-warn-access.cc	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/gimple-ssa-warn-access.cc	Sat Jul 25 22:32:07 2026
*************** pass_waccess::warn_invalid_pointer (tree
*** 3992,3998 ****
        if (!var)
  	ref = NULL_TREE;
        /* Don't warn for cases like when a cdtor returns 'this' on ARM.  */
!       else if (warning_suppressed_p (var, OPT_Wuse_after_free))
  	return;
        else if (DECL_ARTIFICIAL (var))
  	ref = NULL_TREE;
--- 3992,3998 ----
        if (!var)
  	ref = NULL_TREE;
        /* Don't warn for cases like when a cdtor returns 'this' on ARM.  */
!       else if (warning_suppressed_p (var, OPT_Wuse_after_free_))
  	return;
        else if (DECL_ARTIFICIAL (var))
  	ref = NULL_TREE;
*************** pass_waccess::warn_invalid_pointer (tree
*** 4014,4031 ****
        if (!m_early_checks_p
  	  || (equality && warn_use_after_free < 3)
  	  || (maybe && warn_use_after_free < 2)
! 	  || warning_suppressed_p (use_stmt, OPT_Wuse_after_free))
  	return;
  
        const tree inval_decl = gimple_call_fndecl (inval_stmt);
  
        auto_diagnostic_group d;
!       if ((ref && warning_at (use_loc, OPT_Wuse_after_free,
  			      (maybe
  			       ? G_("pointer %qE may be used after %qD")
  			       : G_("pointer %qE used after %qD")),
  			      ref, inval_decl))
! 	  || (!ref && warning_at (use_loc, OPT_Wuse_after_free,
  			      (maybe
  			       ? G_("pointer may be used after %qD")
  			       : G_("pointer used after %qD")),
--- 4014,4031 ----
        if (!m_early_checks_p
  	  || (equality && warn_use_after_free < 3)
  	  || (maybe && warn_use_after_free < 2)
! 	  || warning_suppressed_p (use_stmt, OPT_Wuse_after_free_))
  	return;
  
        const tree inval_decl = gimple_call_fndecl (inval_stmt);
  
        auto_diagnostic_group d;
!       if ((ref && warning_at (use_loc, OPT_Wuse_after_free_,
  			      (maybe
  			       ? G_("pointer %qE may be used after %qD")
  			       : G_("pointer %qE used after %qD")),
  			      ref, inval_decl))
! 	  || (!ref && warning_at (use_loc, OPT_Wuse_after_free_,
  			      (maybe
  			       ? G_("pointer may be used after %qD")
  			       : G_("pointer used after %qD")),
*************** pass_waccess::warn_invalid_pointer (tree
*** 4033,4039 ****
  	{
  	  location_t loc = gimple_location (inval_stmt);
  	  inform (loc, "call to %qD here", inval_decl);
! 	  suppress_warning (use_stmt, OPT_Wuse_after_free);
  	}
        return;
      }
--- 4033,4039 ----
  	{
  	  location_t loc = gimple_location (inval_stmt);
  	  inform (loc, "call to %qD here", inval_decl);
! 	  suppress_warning (use_stmt, OPT_Wuse_after_free_);
  	}
        return;
      }
diff -Nrcpad gcc-16-20260718/gcc/ipa-cp.cc gcc-16-20260725/gcc/ipa-cp.cc
*** gcc-16-20260718/gcc/ipa-cp.cc	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/ipa-cp.cc	Sat Jul 25 22:32:07 2026
*************** decide_about_value (struct cgraph_node *
*** 5963,5969 ****
  	   > get_max_overall_size (node, cur_sweep))
      {
        if (dump_file && (dump_flags & TDF_DETAILS))
! 	fprintf (dump_file, "   Ignoring candidate value because "
  		 "maximum unit size would be reached with %li.\n",
  		 val->local_size_cost + overall_size);
        return false;
--- 5963,5969 ----
  	   > get_max_overall_size (node, cur_sweep))
      {
        if (dump_file && (dump_flags & TDF_DETAILS))
! 	fprintf (dump_file, " - ignoring candidate value because "
  		 "maximum unit size would be reached with %li.\n",
  		 val->local_size_cost + overall_size);
        return false;
*************** decide_about_value (struct cgraph_node *
*** 5971,5977 ****
    else if (!get_info_about_necessary_edges (val, node, &freq_sum, &caller_count,
  					    &rec_count_sum, &count_sum,
  					    &called_without_ipa_profile))
!     return false;
  
    if (!dbg_cnt (ipa_cp_values))
      return false;
--- 5971,5989 ----
    else if (!get_info_about_necessary_edges (val, node, &freq_sum, &caller_count,
  					    &rec_count_sum, &count_sum,
  					    &called_without_ipa_profile))
!     {
!       if (dump_file && (dump_flags & TDF_DETAILS))
! 	{
! 	  fprintf (dump_file, " - skipping candidate value ");
! 	  print_ipcp_constant_value (dump_file, val->value);
! 	  fprintf (dump_file, " for ");
! 	  ipa_dump_param (dump_file, ipa_node_params_sum->get (node), index);
! 	  if (offset != -1)
! 	    fprintf (dump_file, ", offset: " HOST_WIDE_INT_PRINT_DEC, offset);
! 	  fprintf (dump_file, ": no relevant callers\n");
! 	}
!       return false;
!     }
  
    if (!dbg_cnt (ipa_cp_values))
      return false;
*************** decide_whether_version_node (struct cgra
*** 6173,6194 ****
    if (info->node_dead || count == 0)
      return false;
  
    if (dump_file && (dump_flags & TDF_DETAILS))
!     fprintf (dump_file, "\nEvaluating opportunities for %s.\n",
! 	     node->dump_name ());
  
    auto_vec <cloning_opportunity_ranking, 32> opp_ranking;
    for (int i = 0; i < count;i++)
      {
        if (!ipa_is_param_used (info, i))
! 	continue;
  
        class ipcp_param_lattices *plats = ipa_get_parm_lattices (info, i);
        ipcp_lattice<tree> *lat = &plats->itself;
        ipcp_lattice<ipa_polymorphic_call_context> *ctxlat = &plats->ctxlat;
  
        if (!lat->bottom
! 	  && !lat->is_single_const ())
  	{
  	  ipcp_value<tree> *val;
  	  for (val = lat->values; val; val = val->next)
--- 6185,6217 ----
    if (info->node_dead || count == 0)
      return false;
  
+   bool clone_for_all_contexts = node->local;
    if (dump_file && (dump_flags & TDF_DETAILS))
!     {
!       fprintf (dump_file, "\nEvaluating opportunities for %s.",
! 	       node->dump_name ());
!       if (clone_for_all_contexts)
! 	fprintf (dump_file, "  Will try to create a special all-context "
! 		 "clone.\n");
!       fprintf (dump_file, "\n");
!     }
  
    auto_vec <cloning_opportunity_ranking, 32> opp_ranking;
    for (int i = 0; i < count;i++)
      {
        if (!ipa_is_param_used (info, i))
! 	{
! 	  if (dump_file && (dump_flags & TDF_DETAILS))
! 	    fprintf (dump_file, " - ignoring unused parameter %i.\n", i);
! 	  continue;
! 	}
  
        class ipcp_param_lattices *plats = ipa_get_parm_lattices (info, i);
        ipcp_lattice<tree> *lat = &plats->itself;
        ipcp_lattice<ipa_polymorphic_call_context> *ctxlat = &plats->ctxlat;
  
        if (!lat->bottom
! 	  && (!clone_for_all_contexts || !lat->is_single_const ()))
  	{
  	  ipcp_value<tree> *val;
  	  for (val = lat->values; val; val = val->next)
*************** decide_whether_version_node (struct cgra
*** 6230,6238 ****
  	  ipcp_value<tree> *val;
  	  for (aglat = plats->aggs; aglat; aglat = aglat->next)
  	    if (!aglat->bottom && aglat->values
! 		/* If the following is false, the one value has been considered
  		   for cloning for all contexts.  */
! 		&& (plats->aggs_contain_variable
  		    || !aglat->is_single_const ()))
  	      for (val = aglat->values; val; val = val->next)
  		{
--- 6253,6262 ----
  	  ipcp_value<tree> *val;
  	  for (aglat = plats->aggs; aglat; aglat = aglat->next)
  	    if (!aglat->bottom && aglat->values
! 		/* If the following is false, the one value will be considered
  		   for cloning for all contexts.  */
! 		&& (!clone_for_all_contexts
! 		    || plats->aggs_contain_variable
  		    || !aglat->is_single_const ()))
  	      for (val = aglat->values; val; val = val->next)
  		{
*************** decide_whether_version_node (struct cgra
*** 6246,6252 ****
  	}
  
        if (!ctxlat->bottom
! 	  && !ctxlat->is_single_const ())
  	{
  	  ipcp_value<ipa_polymorphic_call_context> *val;
  	  for (val = ctxlat->values; val; val = val->next)
--- 6270,6276 ----
  	}
  
        if (!ctxlat->bottom
! 	  && (!clone_for_all_contexts || !ctxlat->is_single_const ()))
  	{
  	  ipcp_value<ipa_polymorphic_call_context> *val;
  	  for (val = ctxlat->values; val; val = val->next)
*************** decide_whether_version_node (struct cgra
*** 6289,6307 ****
  	}
      }
  
    struct caller_statistics stats;
    init_caller_stats (&stats);
    node->call_for_symbol_thunks_and_aliases (gather_caller_stats, &stats,
  						false);
    if (!stats.n_calls)
      {
!       if (dump_file)
  	fprintf (dump_file, "   Not cloning for all contexts because "
  		 "there are no callers of the original node (any more).\n");
        return ret;
      }
  
-   bool do_clone_for_all_contexts = false;
    ipa_auto_call_arg_values avals;
    int removable_params_cost;
    bool ctx_independent_const
--- 6313,6333 ----
  	}
      }
  
+   if (!clone_for_all_contexts)
+     return ret;
+ 
    struct caller_statistics stats;
    init_caller_stats (&stats);
    node->call_for_symbol_thunks_and_aliases (gather_caller_stats, &stats,
  						false);
    if (!stats.n_calls)
      {
!       if (dump_file && (dump_flags & TDF_DETAILS))
  	fprintf (dump_file, "   Not cloning for all contexts because "
  		 "there are no callers of the original node (any more).\n");
        return ret;
      }
  
    ipa_auto_call_arg_values avals;
    int removable_params_cost;
    bool ctx_independent_const
*************** decide_whether_version_node (struct cgra
*** 6310,6369 ****
    if (ctx_independent_const || devirt_bonus > 0
        || (removable_params_cost && clone_for_param_removal_p (node)))
      {
!        ipa_call_estimates estimates;
! 
!       estimate_ipcp_clone_size_and_time (node, &avals, &estimates);
!       sreal time = estimates.nonspecialized_time - estimates.time;
!       time += devirt_bonus;
!       time += hint_time_bonus (node, estimates);
!       time += removable_params_cost;
!       int size = estimates.size - stats.n_calls * removable_params_cost;
! 
!       if (dump_file && (dump_flags & TDF_DETAILS))
! 	fprintf (dump_file, " - context independent values, size: %i, "
! 		 "time_benefit: %f\n", size, (time).to_double ());
! 
!       if (size <= 0 || node->local)
! 	{
! 	  if (!dbg_cnt (ipa_cp_values))
! 	    return ret;
! 
! 	  do_clone_for_all_contexts = true;
! 	  if (dump_file)
! 	    fprintf (dump_file, "   Decided to specialize for all "
! 		     "known contexts, code not going to grow.\n");
! 	}
!       else if (good_cloning_opportunity_p (node, time, stats.freq_sum,
! 					   stats.count_sum, size,
! 					   stats.called_without_ipa_profile,
! 					   cur_sweep))
! 	{
! 	  if (size + overall_size <= get_max_overall_size (node, cur_sweep))
! 	    {
! 	      if (!dbg_cnt (ipa_cp_values))
! 		return ret;
! 
! 	      do_clone_for_all_contexts = true;
! 	      overall_size += size;
! 	      if (dump_file)
! 		fprintf (dump_file, "   Decided to specialize for all "
! 			 "known contexts, growth (to %li) deemed "
! 			 "beneficial.\n", overall_size);
! 	    }
! 	  else if (dump_file && (dump_flags & TDF_DETAILS))
! 	    fprintf (dump_file, "   Not cloning for all contexts because "
! 		     "maximum unit size would be reached with %li.\n",
! 		     size + overall_size);
! 	}
!       else if (dump_file && (dump_flags & TDF_DETAILS))
! 	fprintf (dump_file, "   Not cloning for all contexts because "
! 		 "!good_cloning_opportunity_p.\n");
!     }
  
-   if (do_clone_for_all_contexts)
-     {
        auto_vec<cgraph_edge *> callers = node->collect_callers ();
- 
        for (int i = callers.length () - 1; i >= 0; i--)
  	{
  	  cgraph_edge *cs = callers[i];
--- 6336,6345 ----
    if (ctx_independent_const || devirt_bonus > 0
        || (removable_params_cost && clone_for_param_removal_p (node)))
      {
!       if (!dbg_cnt (ipa_cp_values))
! 	return ret;
  
        auto_vec<cgraph_edge *> callers = node->collect_callers ();
        for (int i = callers.length () - 1; i >= 0; i--)
  	{
  	  cgraph_edge *cs = callers[i];
diff -Nrcpad gcc-16-20260718/gcc/lra-constraints.cc gcc-16-20260725/gcc/lra-constraints.cc
*** gcc-16-20260718/gcc/lra-constraints.cc	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/lra-constraints.cc	Sat Jul 25 22:32:07 2026
*************** simplify_operand_subreg (int nop, machin
*** 1865,1870 ****
--- 1865,1900 ----
      }
    else if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER)
      {
+       /* A narrowing subreg of a hard register that is not representable as a
+ 	 hard register (its offset does not fall on a register boundary) cannot
+ 	 be turned into one, and would otherwise be resolved to the wrong part
+ 	 of the register.  Reload it through memory so that the correct bytes
+ 	 are accessed, as is done for pseudos below.  Leave the frame, arg and
+ 	 stack pointers alone: simplify_subreg_regno can reject them simply
+ 	 because reload is not finished yet.  */
+       if (partial_subreg_p (mode, innermode)
+ 	  && REGNO (reg) != FRAME_POINTER_REGNUM
+ 	  && REGNO (reg) != ARG_POINTER_REGNUM
+ 	  && REGNO (reg) != STACK_POINTER_REGNUM
+ 	  && simplify_subreg_regno (REGNO (reg), innermode,
+ 				    SUBREG_BYTE (operand), mode) < 0)
+ 	{
+ 	  if (get_reload_reg (type, innermode, reg, NO_REGS, NULL,
+ 			      true, false, "non-representable subreg", &new_reg))
+ 	    {
+ 	      bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
+ 	      bool insert_before = (type != OP_OUT
+ 				    || read_modify_subreg_p (operand));
+ 	      bool insert_after = (type != OP_IN);
+ 	      insert_move_for_subreg (insert_before ? &before : NULL,
+ 				      insert_after ? &after : NULL,
+ 				      reg, new_reg);
+ 	    }
+ 	  SUBREG_REG (operand) = new_reg;
+ 	  lra_process_new_insns (curr_insn, before, after,
+ 				 "Inserting non-representable subreg reload");
+ 	  return true;
+ 	}
        alter_subreg (curr_id->operand_loc[nop], false);
        return true;
      }
diff -Nrcpad gcc-16-20260718/gcc/match.pd gcc-16-20260725/gcc/match.pd
*** gcc-16-20260718/gcc/match.pd	Sat Jul 18 22:32:08 2026
--- gcc-16-20260725/gcc/match.pd	Sat Jul 25 22:32:07 2026
*************** DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
*** 7188,7194 ****
    /* For CONDs, don't handle signed values here. */
    (if (cnd == VEC_COND_EXPR
         || TYPE_UNSIGNED (TREE_TYPE (@0)))
!    (cnd @0 @2 @1))))
  
  /* abs/negative simplifications moved from fold_cond_expr_with_comparison.
  
--- 7188,7208 ----
    /* For CONDs, don't handle signed values here. */
    (if (cnd == VEC_COND_EXPR
         || TYPE_UNSIGNED (TREE_TYPE (@0)))
!    (cnd @0 @2 @1)))
! 
!  /* A == CST ? A : CST -> CST.  */
!  (simplify
!   (cnd (eq @0 CONSTANT_CLASS_P@1) (nop_convert? @0) CONSTANT_CLASS_P@2)
!   (if (ANY_INTEGRAL_TYPE_P (type)
!        && operand_equal_p (@1, @2))
!    (convert @1)))
! 
!  /* A != CST ? CST : A -> CST.  */
!  (simplify
!   (cnd (ne @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2 (nop_convert? @0))
!   (if (ANY_INTEGRAL_TYPE_P (type)
!        && operand_equal_p (@1, @2))
!    (convert @1))))
  
  /* abs/negative simplifications moved from fold_cond_expr_with_comparison.
  
diff -Nrcpad gcc-16-20260718/gcc/target.def gcc-16-20260725/gcc/target.def
*** gcc-16-20260718/gcc/target.def	Sat Jul 18 22:32:10 2026
--- gcc-16-20260725/gcc/target.def	Sat Jul 25 22:32:10 2026
*************** HOOK_VECTOR (TARGET_TOGGLE_, mode_switch
*** 7425,7432 ****
  DEFHOOK
  (emit,
   "Generate one or more insns to set @var{entity} to @var{mode}.\n\
! @var{hard_reg_live} is the set of hard registers live at the point where\n\
! the insn(s) are to be inserted. @var{prev_moxde} indicates the mode\n\
  to switch from, or is the number of modes if the previous mode is not\n\
  known.  Sets of a lower numbered entity will be emitted before\n\
  sets of a higher numbered entity to a mode of the same or lower priority.",
--- 7425,7432 ----
  DEFHOOK
  (emit,
   "Generate one or more insns to set @var{entity} to @var{mode}.\n\
! @var{regs_live} is the set of hard registers live at the point where\n\
! the insn(s) are to be inserted. @var{prev_mode} indicates the mode\n\
  to switch from, or is the number of modes if the previous mode is not\n\
  known.  Sets of a lower numbered entity will be emitted before\n\
  sets of a higher numbered entity to a mode of the same or lower priority.",
diff -Nrcpad gcc-16-20260718/gcc/testsuite/ChangeLog gcc-16-20260725/gcc/testsuite/ChangeLog
*** gcc-16-20260718/gcc/testsuite/ChangeLog	Sat Jul 18 22:32:10 2026
--- gcc-16-20260725/gcc/testsuite/ChangeLog	Sat Jul 25 22:32:10 2026
***************
*** 1,3 ****
--- 1,362 ----
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/dmf-builtin-2.c: New test.
+ 
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/dmf-builtin-1.c: New test.
+ 
+ 2026-07-24  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/dmf-extract512.c: New test.
+ 	* gcc.target/powerpc/dmf-disassemble-dmr.c: New test.
+ 
+ 2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Peter Bergner  <bergner@linux.ibm.com>
+ 		    Surya Kumari Jangala  <jskumari@linux.ibm.com>
+ 		    Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/dmf-build-dmr.c: New test.
+ 	* gcc.target/powerpc/dmf-builtin.c: New test.
+ 
+ 2026-07-24  Manjunath S Matti  <mmatti@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Manjunath Matti  <mmatti@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/dmr1024-alignment.c: New test case.
+ 	* gcc.target/powerpc/dmr1024-compile.c: Likewise.
+ 	* gcc.target/powerpc/dmr1024-invalid-use-1.c: Likewise.
+ 	* gcc.target/powerpc/dmr1024-invalid-use-2.c: Likewise.
+ 	* gcc.target/powerpc/dmf-no-mma.c: Likewise.
+ 
+ 2026-07-24  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Kishan Parmar  <kishan@linux.ibm.com>
+ 
+ 	* gcc.target/powerpc/dmf-xxacc.c: New test.
+ 	* gcc.target/powerpc/nodmf-xxacc.c: New test.
+ 
+ 2026-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR middle-end/126341
+ 	* gcc.dg/pr126341.c: New test.
+ 
+ 2026-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/123625
+ 	PR target/121957
+ 	* gcc.c-torture/execute/pr121957.c: New test.
+ 	* gcc.c-torture/execute/pr123625.c: New test.
+ 	* gcc.c-torture/execute/pr123625-2.c: New test.
+ 	* gcc.c-torture/execute/pr123625-3.c: New test.
+ 	* gcc.dg/pr123625-1.c: New test.
+ 
+ 2026-07-24  Boudewijn van der Heide  <boudewijn@delta-utec.com>
+ 
+ 	Backported from master:
+ 	2026-05-11  Boudewijn van der Heide  <boudewijn@delta-utec.com>
+ 
+ 	PR rtl-optimization/125209
+ 	* gcc.dg/pr125209.c: New test.
+ 
+ 2026-07-24  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	Backported from master:
+ 	2026-05-08  Roger Sayle  <roger@nextmovesoftware.com>
+ 
+ 	PR middle-end/124637
+ 	* gcc.target/powerpc/pr124637.c: New test case.
+ 
+ 2026-07-24  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-07-15  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/126171
+ 	* gcc.dg/pr126171-1.c: New testcase.
+ 	* gcc.dg/torture/pr126171-2.c: Likewise.
+ 
+ 2026-07-24  Cem Akgok  <cemakgok@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Cem Akgok  <cemakgok@gmail.com>
+ 
+ 	PR tree-optimization/126225
+ 	* gcc.dg/vect/vect-iv-12.c: New test.
+ 	* gcc.dg/vect/vect-iv-13.c: New test.
+ 	* gcc.dg/vect/vect-iv-14.c: New test.
+ 
+ 2026-07-24  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR tree-optimization/124663
+ 	* g++.dg/tree-ssa/pr124663.C: New test.
+ 
+ 2026-07-23  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/118407
+ 	* gcc.dg/tree-ssa/predcom-8.c: Use arm_neon as xfail condition.
+ 
+ 2026-07-23  Marek Polacek  <polacek@redhat.com>
+ 
+ 	PR c++/126215
+ 	* g++.dg/cpp1z/constexpr-nsdmi1.C: New test.
+ 
+ 2026-07-23  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-23  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/124112
+ 	* gcc.dg/vect/vect-early-break_65.c: Prevent packing enum to a
+ 	smaller object.
+ 
+ 2026-07-22  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	* gcc.target/arm/reg_equal_test.c: Add require effective target
+ 	cortex-a53 for test.
+ 
+ 2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	Backported from master:
+ 	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	* gcc.target/bpf/const-cost-model.c: New test prefers const.
+ 	* gcc.target/bpf/const-cost-model-2.c: New test prefers const.
+ 
+ 2026-07-21  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	Backported from master:
+ 	2026-07-20  Vineet Gupta  <vineet.gupta@linux.dev>
+ 
+ 	* gcc.target/bpf/divmod-libcall-2.c: Change args/ret to signed.
+ 	* gcc.target/bpf/mult-large.c: New test.
+ 	* gcc.target/bpf/mult-small.c: New test.
+ 
+ 2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/124726
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s124.c: Remove xfail for arm_neon.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s276.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s3111.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s3113.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s312.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s314.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s316.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s317.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s319.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s441.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s443.c: Likewise.
+ 	* gcc.dg/vect/tsvc/vect-tsvc-s453.c: Likewise.
+ 
+ 2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-21  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/124361
+ 	* gcc.dg/tree-ssa/ssa-dom-cse-2.c: Remove xfail for arm_mve.
+ 
+ 2026-07-21  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-07-09  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/125207
+ 	* gcc.dg/ipa/pr125207.c: New test.
+ 	* gcc.dg/vla-1.c (f1): Make function f1 static.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-20  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/execute/max-abs-char-1.a68: New test.
+ 
+ 2026-07-21  chris hermansen  <clhermansen@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  chris hermansen  <clhermansen@gmail.com>
+ 
+ 	* algol68/execute/whole-1.a68: New test.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-15  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/execute/modules/module26.a68: New file.
+ 	* algol68/execute/modules/program-26.a68: New test.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/execute/modules/module1.a68: Add an operator %.
+ 	* algol68/execute/modules/program-1.a68: Use operator %.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/execute/gen-in-constructor-1.a68: New test.
+ 	* algol68/execute/gen-in-constructor-2.a68: Likewise.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-13  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/execute/formula-3.a68: New test.
+ 	* algol68/execute/formula-4.a68: Likewise.
+ 	* algol68/execute/formula-5.a68: Likewise.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-08  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/compile/error-attr-format-token-1.a68: New test.
+ 
+ 2026-07-21  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	Backported from master:
+ 	2026-06-02  Jose E. Marchesi  <jemarch@gnu.org>
+ 
+ 	* algol68/compile/malformed-mode-1.a68: New test.
+ 	* algol68/compile/malformed-mode-2.a68: Likewise.
+ 
+ 2026-07-21  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	Backported from master:
+ 	2026-05-20  Pietro Monteiro  <pietro@sociotechnical.xyz>
+ 
+ 	* algol68/execute/entier-1.a68: Add test for FLOOR = ENTIER.
+ 	* algol68/compile/floor-1.a68: New test.
+ 
+ 2026-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/126309
+ 	* g++.dg/cpp26/feat-cxx26.C: Test __has_cpp_attribute (indeterminate).
+ 
+ 2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	PR target/119210
+ 	* gcc.target/aarch64/sme/za_state_8.c: New test.
+ 
+ 2026-07-20  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* gcc.target/aarch64/sme/zt0_state_8.c: New test.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/126261
+ 	* lib/target-supports.exp (check_effective_target_can_deref_null):
+ 	Cast argument to char*.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR target/124364
+ 	* gcc.dg/Wstringop-overflow-47.c: Remove xfail.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/126261
+ 	* g++.dg/torture/pr101373.C: Use effective-target can_deref_null.
+ 	* lib/target-supports.exp (check_effective_target_can_deref_null):
+ 	New proc.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/118407
+ 	* gcc.dg/tree-ssa/predcom-8.c: Xfail test for arm*-*-* in hard
+ 	float ABI without MVE.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR testsuite/124043
+ 	* gcc.target/arm/crypto-vsha1cq_u32.c: Xfail test for -mthumb
+ 	-mfloat-abi=hard.
+ 	* gcc.target/arm/crypto-vsha1h_u32.c: Likewise.
+ 	* gcc.target/arm/crypto-vsha1mq_u32.c: Likewise.
+ 	* gcc.target/arm/crypto-vsha1pq_u32.c: Likewise.
+ 
+ 2026-07-20  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-03  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/97592
+ 	PR fortran/125998
+ 	* gfortran.dg/contiguous_17.f90: New test.
+ 
+ 2026-07-20  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-06-29  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/105116
+ 	* gcc.target/aarch64/sve/pr105116.c: New test.
+ 	* gcc.target/aarch64/sve/pr105116-run.c: New test.
+ 
+ 2026-07-20  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	Backported from master:
+ 	2026-07-13  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+ 
+ 	PR driver/124058
+ 	* c-c++-common/Wuse-after-free-8.c: New test.
+ 
  2026-07-16  Michal Jires  <mjires@suse.cz>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/compile/error-attr-format-token-1.a68 gcc-16-20260725/gcc/testsuite/algol68/compile/error-attr-format-token-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/compile/error-attr-format-token-1.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/compile/error-attr-format-token-1.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,5 ----
+ begin mode Set = struct (string class, ref[]int elems);
+       Set empty_set
+          = ("", heap[1:0]Elems); { dg-error "collateral clause" }
+       skip
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/compile/floor-1.a68 gcc-16-20260725/gcc/testsuite/algol68/compile/floor-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/compile/floor-1.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/compile/floor-1.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,4 ----
+ # { dg-options "-fstropping=upper -std=algol68" } #
+ BEGIN # FLOOR is a GNU extension #
+       FLOOR 1.2 # { dg-error "indicant FLOOR has not been declared properly" } #
+ END
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/compile/malformed-mode-1.a68 gcc-16-20260725/gcc/testsuite/algol68/compile/malformed-mode-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/compile/malformed-mode-1.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/compile/malformed-mode-1.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,6 ----
+ begin mode Set = ref[]Elem, { dg-error "" }
+                             { dg-message "coercible to itself" "" { target *-*-* } .-1 }
+            Elem = union (int,Set); { dg-error "" }
+                                    { dg-message "coercible to itself" "" { target *-*-* } .-1 }
+       skip
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/compile/malformed-mode-2.a68 gcc-16-20260725/gcc/testsuite/algol68/compile/malformed-mode-2.a68
*** gcc-16-20260718/gcc/testsuite/algol68/compile/malformed-mode-2.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/compile/malformed-mode-2.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,5 ----
+ begin mode Node = struct (int i, Node n); { dg-error "" }
+                                           { dg-message "infinite" "" { target *-*-* } .-1 }
+       skip
+ end
+ 
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/entier-1.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/entier-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/entier-1.a68	Sat Jul 18 22:32:11 2026
--- gcc-16-20260725/gcc/testsuite/algol68/execute/entier-1.a68	Sat Jul 25 22:32:10 2026
*************** BEGIN REAL x = 3.14, y = 3.80;
*** 4,8 ****
        LONG LONG REAL xxx = LONG LONG 3.14, yyy = LONG LONG 3.80;
        ASSERT (ENTIER x = 3 AND ENTIER y = 3);
        ASSERT (ENTIER xx = LONG 3 AND ENTIER yy = LONG 3);
!       ASSERT (ENTIER xxx = LONG LONG 3 AND ENTIER yyy = LONG LONG 3)
  END
--- 4,11 ----
        LONG LONG REAL xxx = LONG LONG 3.14, yyy = LONG LONG 3.80;
        ASSERT (ENTIER x = 3 AND ENTIER y = 3);
        ASSERT (ENTIER xx = LONG 3 AND ENTIER yy = LONG 3);
!       ASSERT (ENTIER xxx = LONG LONG 3 AND ENTIER yyy = LONG LONG 3);
!       ASSERT (ENTIER x = 3 AND FLOOR y = 3);
!       ASSERT (ENTIER xx = LONG 3 AND FLOOR yy = LONG 3);
!       ASSERT (ENTIER xxx = LONG LONG 3 AND FLOOR yyy = LONG LONG 3)
  END
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/formula-3.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/formula-3.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/formula-3.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/formula-3.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,11 ----
+ { This tests that names are passed properly to dyadic operators. }
+ 
+ begin mode Foo = struct (int i,j);
+       Foo f;
+       i'f := 10;
+       j'f := 20;
+       op +:= = (ref Foo f, int i) int: (i'f +:= i; j'f +:= i; i + 1);
+       assert ((f +:= 1) = 2);
+       assert (i'f = 11);
+       assert (j'f = 21)
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/formula-4.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/formula-4.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/formula-4.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/formula-4.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,11 ----
+ { This tests that names are passed properly to dyadic operators. }
+ 
+ begin mode Foo = struct (int i,j);
+       Foo f;
+       i'f := 10;
+       j'f := 20;
+       op +=: = (int i, ref Foo f) int: (i'f +:= i; j'f +:= i; i + 1);
+       assert ((1 +=: f) = 2);
+       assert (i'f = 11);
+       assert (j'f = 21)
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/formula-5.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/formula-5.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/formula-5.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/formula-5.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,11 ----
+ { This tests that names are passed properly to monadic operators. }
+ 
+ begin mode Foo = struct (int i,j);
+       Foo f;
+       i'f := 10;
+       j'f := 20;
+       op + = (ref Foo f) int: (i'f +:= 2; j'f +:= 2; i'f + j'f);
+       assert (+f = 34);
+       assert (i'f = 12);
+       assert (j'f = 22)
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/gen-in-constructor-1.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/gen-in-constructor-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/gen-in-constructor-1.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/gen-in-constructor-1.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,7 ----
+ begin mode Foo = struct (ref[]int lala, bool sign);
+       Foo zero = (heap[3:10]int, true);
+       assert(sign'zero = true);
+       assert(UPB lala'zero = 10);
+       assert(LWB lala'zero = 3);
+       skip
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/gen-in-constructor-2.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/gen-in-constructor-2.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/gen-in-constructor-2.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/gen-in-constructor-2.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,7 ----
+ begin mode Foo = struct (bool sign, ref[]int lala);
+       Foo zero = (false, heap[0:-1]int);
+       assert(sign'zero = false);
+       assert(UPB lala'zero = -1);
+       assert(LWB lala'zero = 0);
+       skip
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/max-abs-char-1.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/max-abs-char-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/max-abs-char-1.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/max-abs-char-1.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1 ----
+ (assert(maxabschar = ABS 16r10ffff))
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/modules/module1.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/modules/module1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/modules/module1.a68	Sat Jul 18 22:32:11 2026
--- gcc-16-20260725/gcc/testsuite/algol68/execute/modules/module1.a68	Sat Jul 25 22:32:10 2026
*************** def
*** 3,8 ****
--- 3,10 ----
      pub mode MyInt = int, MyOtherInt = int;
      pub int beast_number := 666, angelic_number := 777;
      pub string who = "jemarch", whoelse = "pietro";
+     pub mode SomeStruct = struct (int a,b);
+     pub op % = (SomeStruct a,b) SomeStruct: (10, 20);
      puts ("Hello from module'n")
  postlude
      puts ("Bye from module'n")
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/modules/module26.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/modules/module26.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/modules/module26.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/modules/module26.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,15 ----
+ { The way union unraveling works in parser-modes, the union(Foo,Bar)
+   below triggers the emission of two entries with the same modes in
+   the resulting module interface. }
+ 
+ module Module_26 =
+ def
+     pub int public;
+     int private;
+     pub mode Baz = union(Foo,Bar);
+     pub mode Foo = union (int,bool,real);
+     mode Bar = union (int,bool);
+     mode Je = struct (int lele);
+ 
+     skip
+ fed
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/modules/program-1.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/modules/program-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/modules/program-1.a68	Sat Jul 18 22:32:11 2026
--- gcc-16-20260725/gcc/testsuite/algol68/execute/modules/program-1.a68	Sat Jul 25 22:32:10 2026
*************** begin string je = access Module1 begin w
*** 15,20 ****
--- 15,23 ----
        assert (aa = "jemarch");
        assert (bb = "jemarch");
        assert (cc = "jemarch");
+       SomeStruct u,v;
+       SomeStruct z = u%v;
+       assert (a'z = 10 AND b'z = 20);
        access Module1 to 1 do assert (who = "jemarch" AND whoelse = "pietro") od;
        access Module1 (assert (beast_number = 666 AND angelic_number = 777));
        access Module1 (MyInt a = 1; MyOtherInt b = 1; assert (a + b = 2))
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/modules/program-26.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/modules/program-26.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/modules/program-26.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/modules/program-26.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,6 ----
+ { dg-modules "module26" }
+ access Module_26
+ begin
+       Baz x = 10, y = false, z = 3.14;
+       skip
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/algol68/execute/whole-1.a68 gcc-16-20260725/gcc/testsuite/algol68/execute/whole-1.a68
*** gcc-16-20260718/gcc/testsuite/algol68/execute/whole-1.a68	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/algol68/execute/whole-1.a68	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,915 ----
+ begin
+ 
+       { RR standard proc whole replaced; test it }
+ 
+       { testing short short int bits_width min and max values }
+ 
+       if short_short_bits_width = 8
+       then
+            assert(whole(-short_short_max_int - short short 1,0) = "-128"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short short 0,0) = "0");
+            assert(whole(short short 0,5) = "   +0");
+            assert(whole(short short 0,-5) = "    0");
+            assert(whole(short short 100,5) = " +100");
+            assert(whole(-short short 100,5) = " -100");
+            assert(whole(short short 100,-5) = "  100");
+            assert(whole(-short short 100,-5) = " -100");
+            assert(whole(short short 100,4) = "+100");
+            assert(whole(-short short 100,4) = "-100");
+            assert(whole(short short 100,3) = "***");
+            assert(whole(-short short 100,3) = "***");
+            assert(whole(short_short_max_int,0) = "127")
+       elif short_short_bits_width = 16
+       then
+            assert(whole(-short_short_max_int - short short 1,0) = "-32768"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short short 0,0) = "0");
+            assert(whole(short short 0,5) = "   +0");
+            assert(whole(short short 0,-5) = "    0");
+            assert(whole(short short 100,5) = " +100");
+            assert(whole(-short short 100,5) = " -100");
+            assert(whole(short short 100,-5) = "  100");
+            assert(whole(-short short 100,-5) = " -100");
+            assert(whole(short short 100,4) = "+100");
+            assert(whole(-short short 100,4) = "-100");
+            assert(whole(short short 100,3) = "***");
+            assert(whole(-short short 100,3) = "***");
+            assert(whole(short_short_max_int,0) = "32767")
+       elif short_short_bits_width = 32
+       then
+            assert(whole(-short_short_max_int - short short 1,0) = "-2147483648"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short short 0,0) = "0");
+            assert(whole(short short 0,5) = "   +0");
+            assert(whole(short short 0,-5) = "    0");
+            assert(whole(short short 100,5) = " +100");
+            assert(whole(-short short 100,5) = " -100");
+            assert(whole(short short 100,-5) = "  100");
+            assert(whole(-short short 100,-5) = " -100");
+            assert(whole(short short 100,4) = "+100");
+            assert(whole(-short short 100,4) = "-100");
+            assert(whole(short short 100,3) = "***");
+            assert(whole(-short short 100,3) = "***");
+            assert(whole(short_short_max_int,0) = "2147483647")
+       elif short_short_bits_width = 64
+       then
+            assert(whole(-short_short_max_int - short short 1,0) = "-9223372036854775808"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short short 0,0) = "0");
+            assert(whole(short short 0,5) = "   +0");
+            assert(whole(short short 0,-5) = "    0");
+            assert(whole(short short 100,5) = " +100");
+            assert(whole(-short short 100,5) = " -100");
+            assert(whole(short short 100,-5) = "  100");
+            assert(whole(-short short 100,-5) = " -100");
+            assert(whole(short short 100,4) = "+100");
+            assert(whole(-short short 100,4) = "-100");
+            assert(whole(short short 100,3) = "***");
+            assert(whole(-short short 100,3) = "***");
+            assert(whole(short_short_max_int,0) = "9223372036854775807")
+       elif short_short_bits_width = 128
+       then
+            assert(whole(-short_short_max_int - short short 1,0) = "-170141183460469231731687303715884105728"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short short 0,0) = "0");
+            assert(whole(short short 0,5) = "   +0");
+            assert(whole(short short 0,-5) = "    0");
+            assert(whole(short short 100,5) = " +100");
+            assert(whole(-short short 100,5) = " -100");
+            assert(whole(short short 100,-5) = "  100");
+            assert(whole(-short short 100,-5) = " -100");
+            assert(whole(short short 100,4) = "+100");
+            assert(whole(-short short 100,4) = "-100");
+            assert(whole(short short 100,3) = "***");
+            assert(whole(-short short 100,3) = "***");
+            assert(whole(short_short_max_int,0) = "170141183460469231731687303715884105727")
+       fi;
+ 
+       { testing short int bits_width min and max values }
+ 
+       if short_bits_width = 8
+       then
+            assert(whole(-short_max_int - short 1,0) = "-128"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short 0,0) = "0");
+            assert(whole(short 0,5) = "   +0");
+            assert(whole(short 0,-5) = "    0");
+            assert(whole(short 100,5) = " +100");
+            assert(whole(-short 100,5) = " -100");
+            assert(whole(short 100,-5) = "  100");
+            assert(whole(-short 100,-5) = " -100");
+            assert(whole(short 100,4) = "+100");
+            assert(whole(-short 100,4) = "-100");
+            assert(whole(short 100,3) = "***");
+            assert(whole(-short 100,3) = "***");
+            assert(whole(short_max_int,0) = "127")
+       elif short_bits_width = 16
+       then
+            assert(whole(-short_max_int - short 1,0) = "-32768"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short 0,0) = "0");
+            assert(whole(short 0,5) = "   +0");
+            assert(whole(short 0,-5) = "    0");
+            assert(whole(short 100,5) = " +100");
+            assert(whole(-short 100,5) = " -100");
+            assert(whole(short 100,-5) = "  100");
+            assert(whole(-short 100,-5) = " -100");
+            assert(whole(short 100,4) = "+100");
+            assert(whole(-short 100,4) = "-100");
+            assert(whole(short 100,3) = "***");
+            assert(whole(-short 100,3) = "***");
+            assert(whole(short_max_int,0) = "32767")
+       elif short_bits_width = 32
+       then
+            assert(whole(-short_max_int - short 1,0) = "-2147483648"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short 0,0) = "0");
+            assert(whole(short 0,5) = "   +0");
+            assert(whole(short 0,-5) = "    0");
+            assert(whole(short 100,5) = " +100");
+            assert(whole(-short 100,5) = " -100");
+            assert(whole(short 100,-5) = "  100");
+            assert(whole(-short 100,-5) = " -100");
+            assert(whole(short 100,4) = "+100");
+            assert(whole(-short 100,4) = "-100");
+            assert(whole(short 100,3) = "***");
+            assert(whole(-short 100,3) = "***");
+            assert(whole(short_max_int,0) = "2147483647")
+       elif short_bits_width = 64
+       then
+            assert(whole(-short_max_int - short 1,0) = "-9223372036854775808"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short 0,0) = "0");
+            assert(whole(short 0,5) = "   +0");
+            assert(whole(short 0,-5) = "    0");
+            assert(whole(short 100,5) = " +100");
+            assert(whole(-short 100,5) = " -100");
+            assert(whole(short 100,-5) = "  100");
+            assert(whole(-short 100,-5) = " -100");
+            assert(whole(short 100,4) = "+100");
+            assert(whole(-short 100,4) = "-100");
+            assert(whole(short 100,3) = "***");
+            assert(whole(-short 100,3) = "***");
+            assert(whole(short_max_int,0) = "9223372036854775807")
+       elif short_bits_width = 128
+       then
+            assert(whole(-short_max_int - short 1,0) = "-170141183460469231731687303715884105728"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(short 0,0) = "0");
+            assert(whole(short 0,5) = "   +0");
+            assert(whole(short 0,-5) = "    0");
+            assert(whole(short 100,5) = " +100");
+            assert(whole(-short 100,5) = " -100");
+            assert(whole(short 100,-5) = "  100");
+            assert(whole(-short 100,-5) = " -100");
+            assert(whole(short 100,4) = "+100");
+            assert(whole(-short 100,4) = "-100");
+            assert(whole(short 100,3) = "***");
+            assert(whole(-short 100,3) = "***");
+            assert(whole(short_max_int,0) = "170141183460469231731687303715884105727")
+       fi;
+ 
+       { testing int bits_width min and max values }
+ 
+       if bits_width = 8
+       then
+            assert(whole(-max_int - 1,0) = "-128"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(0,0) = "0");
+            assert(whole(0,5) = "   +0");
+            assert(whole(0,-5) = "    0");
+            assert(whole(100,5) = " +100");
+            assert(whole(-100,5) = " -100");
+            assert(whole(100,-5) = "  100");
+            assert(whole(-100,-5) = " -100");
+            assert(whole(100,4) = "+100");
+            assert(whole(-100,4) = "-100");
+            assert(whole(100,3) = "***");
+            assert(whole(-100,3) = "***");
+            assert(whole(max_int,0) = "127")
+       elif bits_width = 16
+       then
+            assert(whole(-max_int - 1,0) = "-32768"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(0,0) = "0");
+            assert(whole(0,5) = "   +0");
+            assert(whole(0,-5) = "    0");
+            assert(whole(100,5) = " +100");
+            assert(whole(-100,5) = " -100");
+            assert(whole(100,-5) = "  100");
+            assert(whole(-100,-5) = " -100");
+            assert(whole(100,4) = "+100");
+            assert(whole(-100,4) = "-100");
+            assert(whole(100,3) = "***");
+            assert(whole(-100,3) = "***");
+            assert(whole(max_int,0) = "32767")
+       elif bits_width = 32
+       then
+            assert(whole(-max_int - 1,0) = "-2147483648"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(0,0) = "0");
+            assert(whole(0,5) = "   +0");
+            assert(whole(0,-5) = "    0");
+            assert(whole(100,5) = " +100");
+            assert(whole(-100,5) = " -100");
+            assert(whole(100,-5) = "  100");
+            assert(whole(-100,-5) = " -100");
+            assert(whole(100,4) = "+100");
+            assert(whole(-100,4) = "-100");
+            assert(whole(100,3) = "***");
+            assert(whole(-100,3) = "***");
+            assert(whole(max_int,0) = "2147483647")
+       elif bits_width = 64
+       then
+            assert(whole(-max_int - 1,0) = "-9223372036854775808"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(0,0) = "0");
+            assert(whole(0,5) = "   +0");
+            assert(whole(0,-5) = "    0");
+            assert(whole(100,5) = " +100");
+            assert(whole(-100,5) = " -100");
+            assert(whole(100,-5) = "  100");
+            assert(whole(-100,-5) = " -100");
+            assert(whole(100,4) = "+100");
+            assert(whole(-100,4) = "-100");
+            assert(whole(100,3) = "***");
+            assert(whole(-100,3) = "***");
+            assert(whole(max_int,0) = "9223372036854775807")
+       elif bits_width = 128
+       then
+            assert(whole(-max_int - 1,0) = "-170141183460469231731687303715884105728"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(0,0) = "0");
+            assert(whole(0,5) = "   +0");
+            assert(whole(0,-5) = "    0");
+            assert(whole(100,5) = " +100");
+            assert(whole(-100,5) = " -100");
+            assert(whole(100,-5) = "  100");
+            assert(whole(-100,-5) = " -100");
+            assert(whole(100,4) = "+100");
+            assert(whole(-100,4) = "-100");
+            assert(whole(100,3) = "***");
+            assert(whole(-100,3) = "***");
+            assert(whole(max_int,0) = "170141183460469231731687303715884105727")
+       fi;
+ 
+       { testing long int bits_width min and max values }
+ 
+       if long_bits_width = 8
+       then
+            assert(whole(-long_max_int - long 1,0) = "-128"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long 0,0) = "0");
+            assert(whole(long 0,5) = "   +0");
+            assert(whole(long 0,-5) = "    0");
+            assert(whole(long 100,5) = " +100");
+            assert(whole(-long 100,5) = " -100");
+            assert(whole(long 100,-5) = "  100");
+            assert(whole(-long 100,-5) = " -100");
+            assert(whole(long 100,4) = "+100");
+            assert(whole(-long 100,4) = "-100");
+            assert(whole(long 100,3) = "***");
+            assert(whole(-long 100,3) = "***");
+            assert(whole(long_max_int,0) = "127")
+       elif long_bits_width = 16
+       then
+            assert(whole(-long_max_int - long 1,0) = "-32768"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long 0,0) = "0");
+            assert(whole(long 0,5) = "   +0");
+            assert(whole(long 0,-5) = "    0");
+            assert(whole(long 100,5) = " +100");
+            assert(whole(-long 100,5) = " -100");
+            assert(whole(long 100,-5) = "  100");
+            assert(whole(-long 100,-5) = " -100");
+            assert(whole(long 100,4) = "+100");
+            assert(whole(-long 100,4) = "-100");
+            assert(whole(long 100,3) = "***");
+            assert(whole(-long 100,3) = "***");
+            assert(whole(long_max_int,0) = "32767")
+       elif long_bits_width = 32
+       then
+            assert(whole(-long_max_int - long 1,0) = "-2147483648"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long 0,0) = "0");
+            assert(whole(long 0,5) = "   +0");
+            assert(whole(long 0,-5) = "    0");
+            assert(whole(long 100,5) = " +100");
+            assert(whole(-long 100,5) = " -100");
+            assert(whole(long 100,-5) = "  100");
+            assert(whole(-long 100,-5) = " -100");
+            assert(whole(long 100,4) = "+100");
+            assert(whole(-long 100,4) = "-100");
+            assert(whole(long 100,3) = "***");
+            assert(whole(-long 100,3) = "***");
+            assert(whole(long_max_int,0) = "2147483647")
+       elif long_bits_width = 64
+       then
+            assert(whole(-long_max_int - long 1,0) = "-9223372036854775808"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long 0,0) = "0");
+            assert(whole(long 0,5) = "   +0");
+            assert(whole(long 0,-5) = "    0");
+            assert(whole(long 100,5) = " +100");
+            assert(whole(-long 100,5) = " -100");
+            assert(whole(long 100,-5) = "  100");
+            assert(whole(-long 100,-5) = " -100");
+            assert(whole(long 100,4) = "+100");
+            assert(whole(-long 100,4) = "-100");
+            assert(whole(long 100,3) = "***");
+            assert(whole(-long 100,3) = "***");
+            assert(whole(long_max_int,0) = "9223372036854775807")
+       elif long_bits_width = 128
+       then
+            assert(whole(-long_max_int - long 1,0) = "-170141183460469231731687303715884105728"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long 0,0) = "0");
+            assert(whole(long 0,5) = "   +0");
+            assert(whole(long 0,-5) = "    0");
+            assert(whole(long 100,5) = " +100");
+            assert(whole(-long 100,5) = " -100");
+            assert(whole(long 100,-5) = "  100");
+            assert(whole(-long 100,-5) = " -100");
+            assert(whole(long 100,4) = "+100");
+            assert(whole(-long 100,4) = "-100");
+            assert(whole(long 100,3) = "***");
+            assert(whole(-long 100,3) = "***");
+            assert(whole(long_max_int,0) = "170141183460469231731687303715884105727")
+       fi;
+ 
+       { testing long long int bits_width min and max values }
+ 
+       if long_long_bits_width = 8
+       then
+            assert(whole(-long_long_max_int - long long 1,0) = "-128"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long long 0,0) = "0");
+            assert(whole(long long 0,5) = "   +0");
+            assert(whole(long long 0,-5) = "    0");
+            assert(whole(long long 100,5) = " +100");
+            assert(whole(-long long 100,5) = " -100");
+            assert(whole(long long 100,-5) = "  100");
+            assert(whole(-long long 100,-5) = " -100");
+            assert(whole(long long 100,4) = "+100");
+            assert(whole(-long long 100,4) = "-100");
+            assert(whole(long long 100,3) = "***");
+            assert(whole(-long long 100,3) = "***");
+            assert(whole(long_long_max_int,0) = "127")
+       elif long_long_bits_width = 16
+       then
+            assert(whole(-long_long_max_int - long long 1,0) = "-32768"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long long 0,0) = "0");
+            assert(whole(long long 0,5) = "   +0");
+            assert(whole(long long 0,-5) = "    0");
+            assert(whole(long long 100,5) = " +100");
+            assert(whole(-long long 100,5) = " -100");
+            assert(whole(long long 100,-5) = "  100");
+            assert(whole(-long long 100,-5) = " -100");
+            assert(whole(long long 100,4) = "+100");
+            assert(whole(-long long 100,4) = "-100");
+            assert(whole(long long 100,3) = "***");
+            assert(whole(-long long 100,3) = "***");
+            assert(whole(long_long_max_int,0) = "32767")
+       elif long_long_bits_width = 32
+       then
+            assert(whole(-long_long_max_int - long long 1,0) = "-2147483648"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long long 0,0) = "0");
+            assert(whole(long long 0,5) = "   +0");
+            assert(whole(long long 0,-5) = "    0");
+            assert(whole(long long 100,5) = " +100");
+            assert(whole(-long long 100,5) = " -100");
+            assert(whole(long long 100,-5) = "  100");
+            assert(whole(-long long 100,-5) = " -100");
+            assert(whole(long long 100,4) = "+100");
+            assert(whole(-long long 100,4) = "-100");
+            assert(whole(long long 100,3) = "***");
+            assert(whole(-long long 100,3) = "***");
+            assert(whole(long_long_max_int,0) = "2147483647")
+       elif long_long_bits_width = 64
+       then
+            assert(whole(-long_long_max_int - long long 1,0) = "-9223372036854775808"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long long 0,0) = "0");
+            assert(whole(long long 0,5) = "   +0");
+            assert(whole(long long 0,-5) = "    0");
+            assert(whole(long long 100,5) = " +100");
+            assert(whole(-long long 100,5) = " -100");
+            assert(whole(long long 100,-5) = "  100");
+            assert(whole(-long long 100,-5) = " -100");
+            assert(whole(long long 100,4) = "+100");
+            assert(whole(-long long 100,4) = "-100");
+            assert(whole(long long 100,3) = "***");
+            assert(whole(-long long 100,3) = "***");
+            assert(whole(long_long_max_int,0) = "9223372036854775807")
+       elif long_long_bits_width = 128
+       then
+            assert(whole(-long_long_max_int - long long 1,0) = "-170141183460469231731687303715884105728"); { this failed in original RR whole which did not understand 2s comp }
+            assert(whole(long long 0,0) = "0");
+            assert(whole(long long 0,5) = "   +0");
+            assert(whole(long long 0,-5) = "    0");
+            assert(whole(long long 100,5) = " +100");
+            assert(whole(-long long 100,5) = " -100");
+            assert(whole(long long 100,-5) = "  100");
+            assert(whole(-long long 100,-5) = " -100");
+            assert(whole(long long 100,4) = "+100");
+            assert(whole(-long long 100,4) = "-100");
+            assert(whole(long long 100,3) = "***");
+            assert(whole(-long long 100,3) = "***");
+            assert(whole(long_long_max_int,0) = "170141183460469231731687303715884105727")
+       fi;
+ 
+       {testing random short short int values between -128 and 127}
+ 
+       assert(whole(short short 30,0) = "30");
+       assert(whole(-short short 116,0) = "-116");
+       assert(whole(short short 117,0) = "117");
+       assert(whole(short short 44,0) = "44");
+       assert(whole(short short 21,0) = "21");
+       assert(whole(short short 20,0) = "20");
+       assert(whole(short short 117,0) = "117");
+       assert(whole(-short short 56,0) = "-56");
+       assert(whole(short short 101,0) = "101");
+       assert(whole(-short short 17,0) = "-17");
+       assert(whole(-short short 125,0) = "-125");
+       assert(whole(short short 53,0) = "53");
+       assert(whole(-short short 45,0) = "-45");
+       assert(whole(-short short 7,0) = "-7");
+       assert(whole(short short 123,0) = "123");
+       assert(whole(-short short 80,0) = "-80");
+       assert(whole(-short short 64,0) = "-64");
+       assert(whole(-short short 19,0) = "-19");
+       assert(whole(-short short 95,0) = "-95");
+       assert(whole(short short 91,0) = "91");
+       assert(whole(-short short 47,0) = "-47");
+       assert(whole(short short 61,0) = "61");
+       assert(whole(-short short 29,0) = "-29");
+       assert(whole(short short 44,0) = "44");
+       assert(whole(-short short 46,0) = "-46");
+       assert(whole(short short 37,0) = "37");
+       assert(whole(short short 96,0) = "96");
+       assert(whole(short short 41,0) = "41");
+       assert(whole(-short short 41,0) = "-41");
+       assert(whole(-short short 3,0) = "-3");
+       assert(whole(short short 45,0) = "45");
+       assert(whole(-short short 47,0) = "-47");
+       assert(whole(-short short 92,0) = "-92");
+       assert(whole(-short short 50,0) = "-50");
+       assert(whole(short short 85,0) = "85");
+       assert(whole(-short short 35,0) = "-35");
+       assert(whole(short short 78,0) = "78");
+       assert(whole(short short 40,0) = "40");
+       assert(whole(short short 34,0) = "34");
+       assert(whole(short short 40,0) = "40");
+       assert(whole(short short 33,0) = "33");
+       assert(whole(short short 50,0) = "50");
+       assert(whole(-short short 102,0) = "-102");
+       assert(whole(-short short 22,0) = "-22");
+       assert(whole(-short short 60,0) = "-60");
+       assert(whole(short short 2,0) = "2");
+       assert(whole(short short 76,0) = "76");
+       assert(whole(short short 44,0) = "44");
+       assert(whole(-short short 101,0) = "-101");
+       assert(whole(short short 47,0) = "47");
+       assert(whole(short short 76,0) = "76");
+       assert(whole(short short 119,0) = "119");
+       assert(whole(short short 108,0) = "108");
+       assert(whole(-short short 93,0) = "-93");
+       assert(whole(short short 123,0) = "123");
+       assert(whole(-short short 49,0) = "-49");
+       assert(whole(short short 68,0) = "68");
+       assert(whole(-short short 75,0) = "-75");
+       assert(whole(short short 11,0) = "11");
+       assert(whole(-short short 33,0) = "-33");
+       assert(whole(-short short 101,0) = "-101");
+       assert(whole(short short 118,0) = "118");
+       assert(whole(short short 65,0) = "65");
+       assert(whole(short short 117,0) = "117");
+       assert(whole(-short short 74,0) = "-74");
+       assert(whole(short short 74,0) = "74");
+       assert(whole(short short 125,0) = "125");
+       assert(whole(short short 48,0) = "48");
+       assert(whole(short short 76,0) = "76");
+       assert(whole(-short short 69,0) = "-69");
+       assert(whole(short short 119,0) = "119");
+       assert(whole(short short 118,0) = "118");
+       assert(whole(short short 108,0) = "108");
+       assert(whole(-short short 119,0) = "-119");
+       assert(whole(-short short 54,0) = "-54");
+       assert(whole(-short short 84,0) = "-84");
+       assert(whole(-short short 99,0) = "-99");
+       assert(whole(short short 5,0) = "5");
+       assert(whole(-short short 74,0) = "-74");
+       assert(whole(-short short 95,0) = "-95");
+       assert(whole(short short 70,0) = "70");
+       assert(whole(-short short 98,0) = "-98");
+       assert(whole(short short 33,0) = "33");
+       assert(whole(short short 74,0) = "74");
+       assert(whole(short short 80,0) = "80");
+       assert(whole(-short short 68,0) = "-68");
+       assert(whole(-short short 33,0) = "-33");
+       assert(whole(-short short 76,0) = "-76");
+       assert(whole(short short 9,0) = "9");
+       assert(whole(-short short 52,0) = "-52");
+       assert(whole(short short 50,0) = "50");
+       assert(whole(short short 53,0) = "53");
+       assert(whole(short short 75,0) = "75");
+       assert(whole(-short short 101,0) = "-101");
+       assert(whole(-short short 108,0) = "-108");
+       assert(whole(-short short 27,0) = "-27");
+       assert(whole(-short short 35,0) = "-35");
+       assert(whole(-short short 25,0) = "-25");
+       assert(whole(-short short 77,0) = "-77");
+       assert(whole(short short 76,0) = "76");
+ 
+       {testing random short int values between -32768 and 32767}
+ 
+       assert(whole(short 3503,0) = "3503");
+       assert(whole(-short 8055,0) = "-8055");
+       assert(whole(-short 3935,0) = "-3935");
+       assert(whole(-short 10968,0) = "-10968");
+       assert(whole(-short 8651,0) = "-8651");
+       assert(whole(-short 4691,0) = "-4691");
+       assert(whole(-short 12319,0) = "-12319");
+       assert(whole(short 14058,0) = "14058");
+       assert(whole(short 27310,0) = "27310");
+       assert(whole(short 3028,0) = "3028");
+       assert(whole(short 31112,0) = "31112");
+       assert(whole(short 3805,0) = "3805");
+       assert(whole(-short 28028,0) = "-28028");
+       assert(whole(short 25727,0) = "25727");
+       assert(whole(short 10603,0) = "10603");
+       assert(whole(short 18697,0) = "18697");
+       assert(whole(short 25636,0) = "25636");
+       assert(whole(short 11014,0) = "11014");
+       assert(whole(short 25754,0) = "25754");
+       assert(whole(-short 4429,0) = "-4429");
+       assert(whole(-short 6796,0) = "-6796");
+       assert(whole(short 4387,0) = "4387");
+       assert(whole(short 24536,0) = "24536");
+       assert(whole(-short 18202,0) = "-18202");
+       assert(whole(short 4251,0) = "4251");
+       assert(whole(-short 923,0) = "-923");
+       assert(whole(-short 25267,0) = "-25267");
+       assert(whole(-short 6473,0) = "-6473");
+       assert(whole(short 8072,0) = "8072");
+       assert(whole(-short 1417,0) = "-1417");
+       assert(whole(-short 9121,0) = "-9121");
+       assert(whole(short 20304,0) = "20304");
+       assert(whole(short 2206,0) = "2206");
+       assert(whole(short 29555,0) = "29555");
+       assert(whole(short 12764,0) = "12764");
+       assert(whole(-short 18407,0) = "-18407");
+       assert(whole(short 19032,0) = "19032");
+       assert(whole(-short 24905,0) = "-24905");
+       assert(whole(short 29130,0) = "29130");
+       assert(whole(short 27021,0) = "27021");
+       assert(whole(-short 5913,0) = "-5913");
+       assert(whole(short 14052,0) = "14052");
+       assert(whole(-short 11378,0) = "-11378");
+       assert(whole(-short 607,0) = "-607");
+       assert(whole(-short 19193,0) = "-19193");
+       assert(whole(short 27668,0) = "27668");
+       assert(whole(-short 11451,0) = "-11451");
+       assert(whole(short 31411,0) = "31411");
+       assert(whole(-short 11622,0) = "-11622");
+       assert(whole(short 8028,0) = "8028");
+       assert(whole(short 22654,0) = "22654");
+       assert(whole(-short 24200,0) = "-24200");
+       assert(whole(short 30148,0) = "30148");
+       assert(whole(short 18724,0) = "18724");
+       assert(whole(short 6318,0) = "6318");
+       assert(whole(-short 31142,0) = "-31142");
+       assert(whole(-short 5230,0) = "-5230");
+       assert(whole(-short 17403,0) = "-17403");
+       assert(whole(short 15107,0) = "15107");
+       assert(whole(short 25146,0) = "25146");
+       assert(whole(-short 8346,0) = "-8346");
+       assert(whole(short 3862,0) = "3862");
+       assert(whole(short 16005,0) = "16005");
+       assert(whole(-short 22634,0) = "-22634");
+       assert(whole(-short 9026,0) = "-9026");
+       assert(whole(-short 11537,0) = "-11537");
+       assert(whole(short 6811,0) = "6811");
+       assert(whole(short 21603,0) = "21603");
+       assert(whole(short 4103,0) = "4103");
+       assert(whole(short 2240,0) = "2240");
+       assert(whole(-short 23455,0) = "-23455");
+       assert(whole(-short 30132,0) = "-30132");
+       assert(whole(short 21132,0) = "21132");
+       assert(whole(-short 10683,0) = "-10683");
+       assert(whole(short 14190,0) = "14190");
+       assert(whole(short 24575,0) = "24575");
+       assert(whole(short 26048,0) = "26048");
+       assert(whole(short 30585,0) = "30585");
+       assert(whole(-short 28681,0) = "-28681");
+       assert(whole(-short 3381,0) = "-3381");
+       assert(whole(short 32360,0) = "32360");
+       assert(whole(short 29261,0) = "29261");
+       assert(whole(-short 2209,0) = "-2209");
+       assert(whole(-short 16459,0) = "-16459");
+       assert(whole(short 875,0) = "875");
+       assert(whole(short 4037,0) = "4037");
+       assert(whole(-short 22602,0) = "-22602");
+       assert(whole(short 13502,0) = "13502");
+       assert(whole(-short 27321,0) = "-27321");
+       assert(whole(short 1598,0) = "1598");
+       assert(whole(short 26282,0) = "26282");
+       assert(whole(-short 31718,0) = "-31718");
+       assert(whole(short 20597,0) = "20597");
+       assert(whole(short 31435,0) = "31435");
+       assert(whole(short 30701,0) = "30701");
+       assert(whole(-short 17815,0) = "-17815");
+       assert(whole(short 20800,0) = "20800");
+       assert(whole(short 9693,0) = "9693");
+       assert(whole(-short 19943,0) = "-19943");
+       assert(whole(short 4186,0) = "4186");
+ 
+       {testing random int values between -2147483648 and 2147483647}
+ 
+       assert(whole(-403100802,0) = "-403100802");
+       assert(whole(-1398207845,0) = "-1398207845");
+       assert(whole(832199979,0) = "832199979");
+       assert(whole(-314430426,0) = "-314430426");
+       assert(whole(-1337423843,0) = "-1337423843");
+       assert(whole(-1473243785,0) = "-1473243785");
+       assert(whole(-1284464373,0) = "-1284464373");
+       assert(whole(569381236,0) = "569381236");
+       assert(whole(265320286,0) = "265320286");
+       assert(whole(481489319,0) = "481489319");
+       assert(whole(177155187,0) = "177155187");
+       assert(whole(-1519375827,0) = "-1519375827");
+       assert(whole(59347841,0) = "59347841");
+       assert(whole(216383259,0) = "216383259");
+       assert(whole(1204541248,0) = "1204541248");
+       assert(whole(1352175722,0) = "1352175722");
+       assert(whole(-1339082237,0) = "-1339082237");
+       assert(whole(-1892481902,0) = "-1892481902");
+       assert(whole(103359891,0) = "103359891");
+       assert(whole(811383023,0) = "811383023");
+       assert(whole(1028306761,0) = "1028306761");
+       assert(whole(-437351215,0) = "-437351215");
+       assert(whole(-150793982,0) = "-150793982");
+       assert(whole(-1108543024,0) = "-1108543024");
+       assert(whole(-11208696,0) = "-11208696");
+       assert(whole(-835359094,0) = "-835359094");
+       assert(whole(-1703726411,0) = "-1703726411");
+       assert(whole(1349070474,0) = "1349070474");
+       assert(whole(-699109453,0) = "-699109453");
+       assert(whole(420661910,0) = "420661910");
+       assert(whole(1224831744,0) = "1224831744");
+       assert(whole(-706699415,0) = "-706699415");
+       assert(whole(-677063649,0) = "-677063649");
+       assert(whole(2058706762,0) = "2058706762");
+       assert(whole(2078646591,0) = "2078646591");
+       assert(whole(-1083083319,0) = "-1083083319");
+       assert(whole(733572898,0) = "733572898");
+       assert(whole(-1596639995,0) = "-1596639995");
+       assert(whole(1179690802,0) = "1179690802");
+       assert(whole(1022222166,0) = "1022222166");
+       assert(whole(907520320,0) = "907520320");
+       assert(whole(-2020974298,0) = "-2020974298");
+       assert(whole(630153429,0) = "630153429");
+       assert(whole(-1437607207,0) = "-1437607207");
+       assert(whole(-70179507,0) = "-70179507");
+       assert(whole(172108858,0) = "172108858");
+       assert(whole(-83462577,0) = "-83462577");
+       assert(whole(1220711557,0) = "1220711557");
+       assert(whole(-1103245389,0) = "-1103245389");
+       assert(whole(-1147801577,0) = "-1147801577");
+       assert(whole(1464141854,0) = "1464141854");
+       assert(whole(809294007,0) = "809294007");
+       assert(whole(-356634754,0) = "-356634754");
+       assert(whole(-149999631,0) = "-149999631");
+       assert(whole(-104783485,0) = "-104783485");
+       assert(whole(-2067391664,0) = "-2067391664");
+       assert(whole(902412219,0) = "902412219");
+       assert(whole(877713857,0) = "877713857");
+       assert(whole(-1779716391,0) = "-1779716391");
+       assert(whole(-402988036,0) = "-402988036");
+       assert(whole(25627773,0) = "25627773");
+       assert(whole(-1677204638,0) = "-1677204638");
+       assert(whole(-692742416,0) = "-692742416");
+       assert(whole(795383882,0) = "795383882");
+       assert(whole(95990551,0) = "95990551");
+       assert(whole(-543093303,0) = "-543093303");
+       assert(whole(-1513903728,0) = "-1513903728");
+       assert(whole(1489666329,0) = "1489666329");
+       assert(whole(750814966,0) = "750814966");
+       assert(whole(1154079971,0) = "1154079971");
+       assert(whole(-1429750049,0) = "-1429750049");
+       assert(whole(-1152819244,0) = "-1152819244");
+       assert(whole(-1124298499,0) = "-1124298499");
+       assert(whole(50261656,0) = "50261656");
+       assert(whole(316126787,0) = "316126787");
+       assert(whole(2117873709,0) = "2117873709");
+       assert(whole(-1144808693,0) = "-1144808693");
+       assert(whole(-841230705,0) = "-841230705");
+       assert(whole(-1816490862,0) = "-1816490862");
+       assert(whole(1311093725,0) = "1311093725");
+       assert(whole(-1916801894,0) = "-1916801894");
+       assert(whole(-1293400369,0) = "-1293400369");
+       assert(whole(-1385414947,0) = "-1385414947");
+       assert(whole(1271329139,0) = "1271329139");
+       assert(whole(-512302845,0) = "-512302845");
+       assert(whole(654388103,0) = "654388103");
+       assert(whole(829132954,0) = "829132954");
+       assert(whole(1151221068,0) = "1151221068");
+       assert(whole(-835494487,0) = "-835494487");
+       assert(whole(1588422425,0) = "1588422425");
+       assert(whole(109289160,0) = "109289160");
+       assert(whole(607092656,0) = "607092656");
+       assert(whole(950512894,0) = "950512894");
+       assert(whole(-638343067,0) = "-638343067");
+       assert(whole(706750001,0) = "706750001");
+       assert(whole(-1412829813,0) = "-1412829813");
+       assert(whole(2029245474,0) = "2029245474");
+       assert(whole(1115959105,0) = "1115959105");
+       assert(whole(-143412736,0) = "-143412736");
+       assert(whole(1623878673,0) = "1623878673");
+ 
+       {testing random long int values between -9223372036854775808 and 9223372036854775807}
+ 
+       assert(whole(long 2000751727886147751,0) = "2000751727886147751");
+       assert(whole(-long 8209586255195506053,0) = "-8209586255195506053");
+       assert(whole(-long 5211436987189768727,0) = "-5211436987189768727");
+       assert(whole(long 3481841343391796357,0) = "3481841343391796357");
+       assert(whole(long 690960258437165470,0) = "690960258437165470");
+       assert(whole(long 2523029388282391222,0) = "2523029388282391222");
+       assert(whole(-long 5041965162172324571,0) = "-5041965162172324571");
+       assert(whole(long 5806250066822741155,0) = "5806250066822741155");
+       assert(whole(long 7434918958482692467,0) = "7434918958482692467");
+       assert(whole(-long 6405176401886229763,0) = "-6405176401886229763");
+       assert(whole(long 6889530937260973061,0) = "6889530937260973061");
+       assert(whole(-long 8718137720999335718,0) = "-8718137720999335718");
+       assert(whole(-long 6116019823292316302,0) = "-6116019823292316302");
+       assert(whole(long 7176063991220177363,0) = "7176063991220177363");
+       assert(whole(long 5624177737173859667,0) = "5624177737173859667");
+       assert(whole(-long 6728618139065383615,0) = "-6728618139065383615");
+       assert(whole(-long 3637134344574050688,0) = "-3637134344574050688");
+       assert(whole(-long 4187265742129456341,0) = "-4187265742129456341");
+       assert(whole(-long 1054988900287603981,0) = "-1054988900287603981");
+       assert(whole(-long 3589531398842171382,0) = "-3589531398842171382");
+       assert(whole(-long 3837722621741715835,0) = "-3837722621741715835");
+       assert(whole(-long 2277618771197657778,0) = "-2277618771197657778");
+       assert(whole(-long 586259625295916749,0) = "-586259625295916749");
+       assert(whole(long 2486181354071841326,0) = "2486181354071841326");
+       assert(whole(long 2671656715190564215,0) = "2671656715190564215");
+       assert(whole(-long 1602965929202284825,0) = "-1602965929202284825");
+       assert(whole(-long 3078680151464021197,0) = "-3078680151464021197");
+       assert(whole(long 1604368937738455413,0) = "1604368937738455413");
+       assert(whole(long 7033461762810777446,0) = "7033461762810777446");
+       assert(whole(-long 4915965037828090348,0) = "-4915965037828090348");
+       assert(whole(long 4663442186490351114,0) = "4663442186490351114");
+       assert(whole(long 320611373827802418,0) = "320611373827802418");
+       assert(whole(-long 8644625706382975770,0) = "-8644625706382975770");
+       assert(whole(long 6112352955252261286,0) = "6112352955252261286");
+       assert(whole(-long 5411281901650093896,0) = "-5411281901650093896");
+       assert(whole(-long 5886311757456009558,0) = "-5886311757456009558");
+       assert(whole(-long 6370825334282316695,0) = "-6370825334282316695");
+       assert(whole(long 6260133907146216724,0) = "6260133907146216724");
+       assert(whole(-long 1129686235629706672,0) = "-1129686235629706672");
+       assert(whole(-long 5196761836215158365,0) = "-5196761836215158365");
+       assert(whole(long 5696076799083177842,0) = "5696076799083177842");
+       assert(whole(-long 8715973978022801493,0) = "-8715973978022801493");
+       assert(whole(long 8684010893599161940,0) = "8684010893599161940");
+       assert(whole(long 2889305961487859277,0) = "2889305961487859277");
+       assert(whole(long 1641288009733302553,0) = "1641288009733302553");
+       assert(whole(long 5886925832571802079,0) = "5886925832571802079");
+       assert(whole(long 1326178806201890792,0) = "1326178806201890792");
+       assert(whole(-long 1337196939196106016,0) = "-1337196939196106016");
+       assert(whole(long 1500806829693949175,0) = "1500806829693949175");
+       assert(whole(long 4842805353620492100,0) = "4842805353620492100");
+       assert(whole(long 5309308043867904646,0) = "5309308043867904646");
+       assert(whole(long 6209415249714271698,0) = "6209415249714271698");
+       assert(whole(long 7429550362116828006,0) = "7429550362116828006");
+       assert(whole(-long 8204062681865459722,0) = "-8204062681865459722");
+       assert(whole(-long 1349569390017616723,0) = "-1349569390017616723");
+       assert(whole(-long 7558566826316437342,0) = "-7558566826316437342");
+       assert(whole(-long 5789923554031087092,0) = "-5789923554031087092");
+       assert(whole(-long 8639236710259188044,0) = "-8639236710259188044");
+       assert(whole(-long 7938133470641140372,0) = "-7938133470641140372");
+       assert(whole(long 5255178156720403551,0) = "5255178156720403551");
+       assert(whole(-long 7863497050998961999,0) = "-7863497050998961999");
+       assert(whole(long 3249912638364174576,0) = "3249912638364174576");
+       assert(whole(long 891317806599313109,0) = "891317806599313109");
+       assert(whole(-long 1932320484056494305,0) = "-1932320484056494305");
+       assert(whole(long 4176622234804239805,0) = "4176622234804239805");
+       assert(whole(-long 7385765929299147406,0) = "-7385765929299147406");
+       assert(whole(-long 444484872487926785,0) = "-444484872487926785");
+       assert(whole(long 5667607892232184451,0) = "5667607892232184451");
+       assert(whole(-long 3364838895669718223,0) = "-3364838895669718223");
+       assert(whole(-long 8106160154562537501,0) = "-8106160154562537501");
+       assert(whole(long 4024278926357670361,0) = "4024278926357670361");
+       assert(whole(long 5292772559442875975,0) = "5292772559442875975");
+       assert(whole(long 932190487089499511,0) = "932190487089499511");
+       assert(whole(-long 775367273302046489,0) = "-775367273302046489");
+       assert(whole(long 7602143321460885477,0) = "7602143321460885477");
+       assert(whole(-long 317782206184848746,0) = "-317782206184848746");
+       assert(whole(-long 7123753982383649729,0) = "-7123753982383649729");
+       assert(whole(long 6151697697526307270,0) = "6151697697526307270");
+       assert(whole(long 8512358833708185563,0) = "8512358833708185563");
+       assert(whole(long 8297632004576639885,0) = "8297632004576639885");
+       assert(whole(-long 4682707546061768077,0) = "-4682707546061768077");
+       assert(whole(long 6795151789649607406,0) = "6795151789649607406");
+       assert(whole(long 738258458205097333,0) = "738258458205097333");
+       assert(whole(long 2306763718473047774,0) = "2306763718473047774");
+       assert(whole(-long 5823745590182419592,0) = "-5823745590182419592");
+       assert(whole(long 7127104180341210031,0) = "7127104180341210031");
+       assert(whole(long 1474577461515786934,0) = "1474577461515786934");
+       assert(whole(long 6132347178447808514,0) = "6132347178447808514");
+       assert(whole(long 3349768669013398040,0) = "3349768669013398040");
+       assert(whole(-long 3035856852955187810,0) = "-3035856852955187810");
+       assert(whole(long 5083565630079627188,0) = "5083565630079627188");
+       assert(whole(-long 3726588518613842730,0) = "-3726588518613842730");
+       assert(whole(long 61062208449684700,0) = "61062208449684700");
+       assert(whole(-long 3132014502905353186,0) = "-3132014502905353186");
+       assert(whole(-long 7459252962100862666,0) = "-7459252962100862666");
+       assert(whole(long 2358002016735975854,0) = "2358002016735975854");
+       assert(whole(long 8002507807388287789,0) = "8002507807388287789");
+       assert(whole(-long 7251148814464051407,0) = "-7251148814464051407");
+       assert(whole(-long 4136787452602721926,0) = "-4136787452602721926");
+       assert(whole(long 5901836429512669496,0) = "5901836429512669496");
+ 
+       {testing random long long int values between -9223372036854775808 and 9223372036854775807}
+ 
+       assert(whole(-long long 5153365255204034573,0) = "-5153365255204034573");
+       assert(whole(-long long 776331665639608338,0) = "-776331665639608338");
+       assert(whole(long long 4335291442932356813,0) = "4335291442932356813");
+       assert(whole(long long 2732439320080222074,0) = "2732439320080222074");
+       assert(whole(long long 1768242404645377449,0) = "1768242404645377449");
+       assert(whole(long long 3491979373335892872,0) = "3491979373335892872");
+       assert(whole(long long 3401721067457720638,0) = "3401721067457720638");
+       assert(whole(-long long 4702592594299544162,0) = "-4702592594299544162");
+       assert(whole(long long 5425686184027932994,0) = "5425686184027932994");
+       assert(whole(long long 4411264892186246525,0) = "4411264892186246525");
+       assert(whole(long long 7273215159638578572,0) = "7273215159638578572");
+       assert(whole(-long long 4582902216034311259,0) = "-4582902216034311259");
+       assert(whole(long long 2370808784495729510,0) = "2370808784495729510");
+       assert(whole(long long 2665216817640841338,0) = "2665216817640841338");
+       assert(whole(-long long 7126531842578155781,0) = "-7126531842578155781");
+       assert(whole(long long 8371345850105992435,0) = "8371345850105992435");
+       assert(whole(long long 7998304148609064210,0) = "7998304148609064210");
+       assert(whole(-long long 8163815673092574454,0) = "-8163815673092574454");
+       assert(whole(-long long 2001232235480029851,0) = "-2001232235480029851");
+       assert(whole(long long 471916789433704337,0) = "471916789433704337");
+       assert(whole(-long long 8154300678198609006,0) = "-8154300678198609006");
+       assert(whole(long long 5290522198727677086,0) = "5290522198727677086");
+       assert(whole(long long 147114572508738885,0) = "147114572508738885");
+       assert(whole(long long 391059118537886777,0) = "391059118537886777");
+       assert(whole(-long long 2563390679566777062,0) = "-2563390679566777062");
+       assert(whole(-long long 3994175603525616854,0) = "-3994175603525616854");
+       assert(whole(long long 496078728018586997,0) = "496078728018586997");
+       assert(whole(-long long 1734200432626566410,0) = "-1734200432626566410");
+       assert(whole(long long 4164881865254444522,0) = "4164881865254444522");
+       assert(whole(-long long 6790775709925543313,0) = "-6790775709925543313");
+       assert(whole(-long long 4304666423172008750,0) = "-4304666423172008750");
+       assert(whole(-long long 8954238941095795869,0) = "-8954238941095795869");
+       assert(whole(-long long 8337663766260128866,0) = "-8337663766260128866");
+       assert(whole(long long 949256083175133995,0) = "949256083175133995");
+       assert(whole(long long 6009023131756010877,0) = "6009023131756010877");
+       assert(whole(-long long 7639526581869384668,0) = "-7639526581869384668");
+       assert(whole(long long 4388452973916673268,0) = "4388452973916673268");
+       assert(whole(long long 7746043457852702610,0) = "7746043457852702610");
+       assert(whole(-long long 8149977344360527938,0) = "-8149977344360527938");
+       assert(whole(long long 4448251315532658327,0) = "4448251315532658327");
+       assert(whole(-long long 5135188612278663070,0) = "-5135188612278663070");
+       assert(whole(-long long 4797046808744719489,0) = "-4797046808744719489");
+       assert(whole(-long long 7750107695213844098,0) = "-7750107695213844098");
+       assert(whole(-long long 9219778313125401306,0) = "-9219778313125401306");
+       assert(whole(-long long 1190972656406746645,0) = "-1190972656406746645");
+       assert(whole(long long 3005982242222302615,0) = "3005982242222302615");
+       assert(whole(long long 5301831249279847096,0) = "5301831249279847096");
+       assert(whole(-long long 4141421373107683641,0) = "-4141421373107683641");
+       assert(whole(-long long 2816200745283394605,0) = "-2816200745283394605");
+       assert(whole(long long 8778726055828346793,0) = "8778726055828346793");
+       assert(whole(-long long 3206713470320379742,0) = "-3206713470320379742");
+       assert(whole(long long 6520735421301069455,0) = "6520735421301069455");
+       assert(whole(-long long 1396469569049042334,0) = "-1396469569049042334");
+       assert(whole(-long long 7269115740536375803,0) = "-7269115740536375803");
+       assert(whole(long long 2160351365460443683,0) = "2160351365460443683");
+       assert(whole(-long long 1316276740473262316,0) = "-1316276740473262316");
+       assert(whole(-long long 6373838130217854388,0) = "-6373838130217854388");
+       assert(whole(long long 2562447621837271432,0) = "2562447621837271432");
+       assert(whole(long long 6293181472454460046,0) = "6293181472454460046");
+       assert(whole(long long 1493945378371622544,0) = "1493945378371622544");
+       assert(whole(long long 778478089466296119,0) = "778478089466296119");
+       assert(whole(-long long 4316093485526552007,0) = "-4316093485526552007");
+       assert(whole(long long 8387342276262215434,0) = "8387342276262215434");
+       assert(whole(-long long 4210385934411236002,0) = "-4210385934411236002");
+       assert(whole(long long 2050638476872507298,0) = "2050638476872507298");
+       assert(whole(-long long 2629034594500208575,0) = "-2629034594500208575");
+       assert(whole(-long long 6150848349519253844,0) = "-6150848349519253844");
+       assert(whole(-long long 2429229408439176088,0) = "-2429229408439176088");
+       assert(whole(long long 7233363348512259980,0) = "7233363348512259980");
+       assert(whole(-long long 1957488695786359316,0) = "-1957488695786359316");
+       assert(whole(-long long 700045719090107674,0) = "-700045719090107674");
+       assert(whole(-long long 6997295081834142303,0) = "-6997295081834142303");
+       assert(whole(long long 8156109753921647445,0) = "8156109753921647445");
+       assert(whole(long long 171352807657823264,0) = "171352807657823264");
+       assert(whole(-long long 7671362793928665837,0) = "-7671362793928665837");
+       assert(whole(long long 3088638805156752224,0) = "3088638805156752224");
+       assert(whole(long long 5995155998824845526,0) = "5995155998824845526");
+       assert(whole(long long 8884072709527103591,0) = "8884072709527103591");
+       assert(whole(-long long 8298663658687149659,0) = "-8298663658687149659");
+       assert(whole(long long 740559831498251244,0) = "740559831498251244");
+       assert(whole(long long 2271019220479614726,0) = "2271019220479614726");
+       assert(whole(long long 4229259096603590455,0) = "4229259096603590455");
+       assert(whole(long long 2462690719565923594,0) = "2462690719565923594");
+       assert(whole(-long long 6238586968253522222,0) = "-6238586968253522222");
+       assert(whole(long long 7934547824919629378,0) = "7934547824919629378");
+       assert(whole(long long 5501149081621417400,0) = "5501149081621417400");
+       assert(whole(long long 6956366543890594417,0) = "6956366543890594417");
+       assert(whole(-long long 2877320621245302229,0) = "-2877320621245302229");
+       assert(whole(-long long 2447701309465336788,0) = "-2447701309465336788");
+       assert(whole(long long 7200122643244394888,0) = "7200122643244394888");
+       assert(whole(-long long 7472639175537233839,0) = "-7472639175537233839");
+       assert(whole(long long 5419631634715727098,0) = "5419631634715727098");
+       assert(whole(-long long 8027915039718311439,0) = "-8027915039718311439");
+       assert(whole(long long 6255157334205441133,0) = "6255157334205441133");
+       assert(whole(-long long 2611616147385198047,0) = "-2611616147385198047");
+       assert(whole(long long 1906099468310042628,0) = "1906099468310042628");
+       assert(whole(-long long 6290331456803530992,0) = "-6290331456803530992");
+       assert(whole(-long long 6953956488428111867,0) = "-6953956488428111867");
+       assert(whole(-long long 9097046594145938000,0) = "-9097046594145938000");
+       assert(whole(long long 4818193871933837971,0) = "4818193871933837971")
+ 
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/c-c++-common/Wuse-after-free-8.c gcc-16-20260725/gcc/testsuite/c-c++-common/Wuse-after-free-8.c
*** gcc-16-20260718/gcc/testsuite/c-c++-common/Wuse-after-free-8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/c-c++-common/Wuse-after-free-8.c	Sat Jul 25 22:32:10 2026
***************
*** 0 ****
--- 1,26 ----
+ /* Verify -Wuse-after-free is an alias for -Wuse-after-free=1. */
+ /* { dg-do compile } */
+ /* { dg-options "-O0 -Wuse-after-free" } */
+ 
+ #if __cplusplus
+ #  define EXTERN_C extern "C"
+ #else
+ #  define EXTERN_C extern
+ #endif
+ 
+ EXTERN_C void free (void *);
+ 
+ void sink (void *);
+ 
+ void warn_call_after_free (void *p)
+ {
+   free (p);
+   sink (p);         // { dg-warning "pointer 'p' used" }
+ }
+ 
+ void warn_cond_call_after_free (void *p, int c)
+ {
+   free (p);
+   if (c)
+     sink (p);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/g++.dg/cpp1z/constexpr-nsdmi1.C gcc-16-20260725/gcc/testsuite/g++.dg/cpp1z/constexpr-nsdmi1.C
*** gcc-16-20260718/gcc/testsuite/g++.dg/cpp1z/constexpr-nsdmi1.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/g++.dg/cpp1z/constexpr-nsdmi1.C	Sat Jul 25 22:32:11 2026
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/126215
+ // { dg-do compile { target c++17 } }
+ 
+ struct bug{ bug *ptr = this; };
+ 
+ struct base0 { bug a; };
+ struct base1 { bug b; };
+ struct tuple_: base0, base1 {};
+ struct tuple : tuple_ {};
+ 
+ constexpr tuple gen() { return {}; }
+ constexpr tuple names = gen();
+ int main() { bug *x = names.b.ptr; }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C gcc-16-20260725/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C
*** gcc-16-20260718/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C	Sat Jul 18 22:32:12 2026
--- gcc-16-20260725/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C	Sat Jul 25 22:32:11 2026
***************
*** 652,654 ****
--- 652,666 ----
  #elif __cpp_expansion_statements != 202506
  #  error "__cpp_expansion_statements != 202506"
  #endif
+ 
+ // C++26 attributes:
+ 
+ #ifdef __has_cpp_attribute
+ #  if ! __has_cpp_attribute(indeterminate)
+ #    error "__has_cpp_attribute(indeterminate)"
+ #  elif __has_cpp_attribute(indeterminate) != 202403
+ #    error "__has_cpp_attribute(indeterminate) != 202403"
+ #  endif
+ #else
+ #  error "__has_cpp_attribute"
+ #endif
diff -Nrcpad gcc-16-20260718/gcc/testsuite/g++.dg/torture/pr101373.C gcc-16-20260725/gcc/testsuite/g++.dg/torture/pr101373.C
*** gcc-16-20260718/gcc/testsuite/g++.dg/torture/pr101373.C	Sat Jul 18 22:32:12 2026
--- gcc-16-20260725/gcc/testsuite/g++.dg/torture/pr101373.C	Sat Jul 25 22:32:12 2026
***************
*** 1,5 ****
--- 1,6 ----
  // { dg-do run }
  // { dg-xfail-run-if "PR100409" { *-*-* } }
+ // { dg-skip-if "PR126261" { can_deref_null } }
  
  int __attribute__((const,noipa)) foo (int j)
  {
diff -Nrcpad gcc-16-20260718/gcc/testsuite/g++.dg/tree-ssa/pr124663.C gcc-16-20260725/gcc/testsuite/g++.dg/tree-ssa/pr124663.C
*** gcc-16-20260718/gcc/testsuite/g++.dg/tree-ssa/pr124663.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/g++.dg/tree-ssa/pr124663.C	Sat Jul 25 22:32:12 2026
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/124663
+ // { dg-do compile }
+ // { dg-options "-O2 -fdump-tree-forwprop3-raw" }
+ 
+ #define vector __attribute__((vector_size(4*sizeof(int))))
+ void f(vector int *a)
+ {
+   vector int cst = {1,2,3,4};
+   vector int t = (*a == cst);
+   *a = (t ? *a : cst);
+ }
+ 
+ // { dg-final { scan-tree-dump-not "_expr" "forwprop3" } }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr121957.c gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr121957.c
*** gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr121957.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr121957.c	Sat Jul 25 22:32:12 2026
***************
*** 0 ****
--- 1,27 ----
+ /* AArch64 wrong code at -O2/-O3.  An oversized vector
+    (V16DI, 128 bytes, with no register mode) is expanded into two distinct
+    stack slots that share the same MEM_EXPR.  The load/store pair-fusion pass
+    then discovers "adjacent" store pairs across the two slots via the shared
+    MEM_EXPR and fuses them, redirecting a store to the wrong slot and leaving
+    part of a slot uninitialised.  Self-checking: aborts if the result is
+    wrong.  */
+ 
+ typedef long __attribute__((vector_size (16 * sizeof (long)))) v16di;
+ 
+ int
+ main (void)
+ {
+   v16di v = {};
+   asm goto ("" : : : : L1);
+ L2:
+   asm goto ("" : : : : L1);
+ L0:
+   asm goto ("" : : : : L2);
+   v = (v16di){ -1 };
+   asm goto ("" : : : : L0);
+ L1:
+   asm goto ("" : : : : L0);
+   if (v[3])
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr123625-2.c gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr123625-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr123625-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr123625-2.c	Sat Jul 25 22:32:12 2026
***************
*** 0 ****
--- 1,34 ----
+ /* With -ftree-coalesce-vars, one variable can have SSA names coalesced into
+    partitions of other variables: the PHIs below put the two names of b into
+    the partitions of a and of c.  All three variables are oversized vectors
+    with no register mode, so both partitions are spilled and b legitimately
+    lives in two distinct stack slots (its DECL_RTL becomes the "multiple
+    places" marker).  Out-of-SSA must keep the two slots distinguishable
+    without rejecting this state.  */
+ 
+ typedef long __attribute__((vector_size (16 * sizeof (long)))) v16di;
+ 
+ v16di g0 = { 1 }, g1 = { 5 }, g2 = { 3 }, g3 = { 7 };
+ volatile int p, q;
+ 
+ int
+ main (void)
+ {
+   v16di b = g0;
+   v16di a;
+   if (p)
+     a = b;
+   else
+     a = g1;
+   g1 = a;
+   b = g2;
+   v16di c;
+   if (q)
+     c = b;
+   else
+     c = g3;
+   g3 = c;
+   if (g1[0] != 5 || g1[1] != 0 || g3[0] != 7 || g3[1] != 0)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr123625-3.c gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr123625-3.c
*** gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr123625-3.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr123625-3.c	Sat Jul 25 22:32:12 2026
***************
*** 0 ****
--- 1,32 ----
+ /* Same state as pr123625-2.c (one variable coalesced into two other
+    variables' spilled partitions) reached through asm goto control flow.  */
+ 
+ typedef long __attribute__((vector_size (16 * sizeof (long)))) v16di;
+ 
+ v16di g0, g1, g2, g3;
+ 
+ int
+ main (void)
+ {
+   v16di b = g0;
+   v16di a;
+   asm goto ("" : : : : L0);
+   a = b;
+   goto L1;
+ L0:
+   a = g1;
+ L1:
+   g1 = a;
+   b = g2;
+   v16di c;
+   asm goto ("" : : : : L2);
+   c = b;
+   goto L3;
+ L2:
+   c = g3;
+ L3:
+   g3 = c;
+   if (g1[0] | g1[1] | g3[0] | g3[1])
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr123625.c gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr123625.c
*** gcc-16-20260718/gcc/testsuite/gcc.c-torture/execute/pr123625.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.c-torture/execute/pr123625.c	Sat Jul 25 22:32:12 2026
***************
*** 0 ****
--- 1,48 ----
+ /* AArch64 wrong code at -O3.  An oversized vector
+    (V16DI, 128 bytes, no register mode) is expanded into two distinct
+    stack slots that shared the same MEM_EXPR.  The load/store pair fusion
+    pass then fused stores belonging to different slots, leaving part of a
+    slot uninitialized.  Self-checking: the checksum is target-independent.  */
+ 
+ #include <stdint.h>
+ 
+ #define BS_VEC(type, num) type __attribute__((vector_size(num * sizeof(type))))
+ uint64_t BS_CHECKSUM, g_284;
+ struct U0
+ {
+   int16_t f0;
+   int64_t f2;
+ } g_205;
+ int16_t g_8, func_2_BS_COND_1;
+ uint8_t g_9[2][1];
+ volatile struct U0 g_121[1];
+ int64_t *g_565 = &g_284;
+ 
+ int
+ main (void)
+ {
+   BS_VEC (int64_t, 16) BS_VAR_3 = { 1, 8096386231136, 9039249955151 };
+   uint64_t LOCAL_CHECKSUM = 0;
+   switch (func_2_BS_COND_1)
+     {
+     case 2: goto BS_LABEL_0;
+     case 4: goto BS_LABEL_0;
+     }
+   for (g_8 = 0; g_8 <= 0; g_8 += 1)
+     for (g_205.f2 = 0; g_205.f2 <= 1; g_205.f2 += 1)
+       {
+ 	if (g_9[g_205.f2][0])
+ 	BS_LABEL_0:
+ 	  for (;;)
+ 	    ;
+ 	for (uint32_t BS_TEMP_371 = 0; BS_TEMP_371 < 16; BS_TEMP_371++)
+ 	  LOCAL_CHECKSUM ^= BS_VAR_3[BS_TEMP_371] + 9
+ 	    + (LOCAL_CHECKSUM << 6) + LOCAL_CHECKSUM
+ 	    >> (*g_565 |= g_121[0].f0);
+ 	BS_VAR_3 = (BS_VEC (int64_t, 16)){};
+       }
+   BS_CHECKSUM = LOCAL_CHECKSUM;
+   if (BS_CHECKSUM != 0x7237237237237237ULL)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/Wstringop-overflow-47.c gcc-16-20260725/gcc/testsuite/gcc.dg/Wstringop-overflow-47.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/Wstringop-overflow-47.c	Sat Jul 18 22:32:13 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/Wstringop-overflow-47.c	Sat Jul 25 22:32:12 2026
*************** void warn_i16_64 (int16_t i)
*** 65,79 ****
     like x86_64 it's a series of BIT_FIELD_REFs.  The overflow by
     the former is detected but the latter is not yet.  */
  
!  extern char warn_a64[64];   // { dg-message "at offset (1|128) into destination object 'warn_a64' of size (63|64)" "pr97027 note" { xfail { ! { aarch64-*-* } } } }
  
    void *p = warn_a64 + 1;
    I16_64 *q = (I16_64*)p;
!   *q = (I16_64){ i };         // { dg-warning "writing (1 byte|64 bytes) into a region of size (0|63)" "pr97027" { xfail { ! { aarch64-*-* } } } }
  
    char a64[64];
    p = a64 + 1;
    q = (I16_64*)p;
!   *q = (I16_64){ i };         // { dg-warning "writing (1 byte|64 bytes) into a region of size (0|63)" "pr97027" { xfail { ! { aarch64-*-* } } } }
    sink (p);
  }
--- 65,79 ----
     like x86_64 it's a series of BIT_FIELD_REFs.  The overflow by
     the former is detected but the latter is not yet.  */
  
!  extern char warn_a64[64];   // { dg-message "at offset (1|128) into destination object 'warn_a64' of size (63|64)" "pr97027 note" { xfail { ! { aarch64-*-* || { arm*-*-* && { arm_neon || { arm_mve || arm_thumb1 } } } } } } }
  
    void *p = warn_a64 + 1;
    I16_64 *q = (I16_64*)p;
!   *q = (I16_64){ i };         // { dg-warning "writing (1 byte|64 bytes) into a region of size (0|63)" "pr97027" { xfail { ! { aarch64-*-* || { arm*-*-* && { arm_neon || { arm_mve || arm_thumb1 } } } } } } }
  
    char a64[64];
    p = a64 + 1;
    q = (I16_64*)p;
!   *q = (I16_64){ i };         // { dg-warning "writing (1 byte|64 bytes) into a region of size (0|63)" "pr97027" { xfail { ! { aarch64-*-* || { arm*-*-* && { arm_neon || { arm_mve || arm_thumb1 } } } } } } }
    sink (p);
  }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/ipa/pr125207.c gcc-16-20260725/gcc/testsuite/gcc.dg/ipa/pr125207.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/ipa/pr125207.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/ipa/pr125207.c	Sat Jul 25 22:32:12 2026
***************
*** 0 ****
--- 1,43 ----
+ /* { dg-do run } */
+ /* { dg-options "-O3 --param ipa-cp-eval-threshold=1"  } */
+ 
+ typedef int(*fp_t_5)(int, int, int);
+ int g2, g30, g21, g17, g16, g14, g9, g3, g12, g31;
+ _Bool g22, g26;
+ static
+ int f11(int, fp_t_5 a1, int, int, int)
+ {
+     do {
+       g12 = a1(1 ^ g14, 0, g9);
+       if (g22)
+         if (g2 != g17)
+           if (g26)
+             return g30;
+     } while(true);
+ }
+ static __attribute__((noinline))
+ int f2(int a0, int, int a2)
+ {
+     static int t = 0;
+     t++;
+     if (t > 2)
+       __builtin_abort();
+     g26 = true;
+     g22 = true;
+     if (g3 != a0) {
+       g31 = 2;
+       a0 = g31;
+     }
+     if (a0 == 2)
+       if (a2 != 80)
+         return 0;
+     g17 = 6;
+     g21 += f11(0, f2, 0, 0, 0);
+     return 0;
+ }
+ void f1() { f2(0, 0, 0); }
+ int main()
+ {
+     f2(0, 0, 0);
+     return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/pr123625-1.c gcc-16-20260725/gcc/testsuite/gcc.dg/pr123625-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/pr123625-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/pr123625-1.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,22 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fgimple -ffloat-store -ftree-coalesce-vars -fdump-rtl-expand" } */
+ 
+ double in1, in2, out1, out2;
+ 
+ void __GIMPLE (ssa, startwith ("expand"))
+ f (void)
+ {
+   double v;
+ 
+ __BB(2):
+   v_1 = in1;
+   v_2 = in2;
+   out1 = v_1;
+   out2 = v_2;
+   return;
+ }
+ 
+ /* The scalar floating-point SSA names overlap, and -ffloat-store assigns
+    both partitions to memory.  */
+ /* { dg-final { scan-rtl-dump {\[[0-9]+ v\+0} "expand" } } */
+ /* { dg-final { scan-rtl-dump {\[[0-9]+ D\.[0-9]+\+0} "expand" } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/pr125209.c gcc-16-20260725/gcc/testsuite/gcc.dg/pr125209.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/pr125209.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/pr125209.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,13 ----
+ /* PR rtl-optimization/125209 */
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fno-tree-sink" } */
+ 
+ int a, b;
+ volatile unsigned c;
+ extern void d(unsigned short);
+ int e(long f) { return a ? f : 0; }
+ int main() {
+   int g = e(c ^ !b);
+   d(g);
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/pr126171-1.c gcc-16-20260725/gcc/testsuite/gcc.dg/pr126171-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/pr126171-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/pr126171-1.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,107 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target int32plus } */
+ /* { dg-options "-O2 -fgimple" } */
+ 
+ static int o;
+ 
+ __attribute__((noipa))
+ int
+ n ()
+ {
+   return 129105662;
+ }
+ 
+ 
+ int __GIMPLE (ssa,startwith("vrp1"),guessed_local(1073741824))
+ main ()
+ {
+   int am;
+   int ak;
+   int ay;
+   int D_3044;
+   int tem[1];
+   int _10;
+   int _11;
+   int _12;
+   int _21;
+   int _23;
+   int _24;
+   int _25;
+   int _26;
+   int _27;
+   int _29;
+ 
+   __BB(2,guessed_local(1073741824)):
+   tem[0ul] = _Literal (int) -1;
+   o = 2147483645;
+   goto __BB6(precise(134217728));
+ 
+   __BB(10,guessed_local(17434151171)):
+   goto __BB3(precise(134217728));
+ 
+   __BB(3,loop_header(2),guessed_local(19522579055)):
+   ak_20 = __PHI (__BB10: ak_22, __BB6: ak_30);
+   am_7 = __PHI (__BB10: am_9, __BB6: am_31);
+   ay_16 = __PHI (__BB10: ay_17, __BB6: ay_32);
+ be:
+   am_9 = am_7 + 1;
+   _10 = n ();
+   _11 = _10 + _Literal (int) -129105632;
+   _12 = am_9 << _11;
+   if (_12 == 0)
+     goto __BB4(guessed(126835753));
+   else
+     goto __BB5(guessed(7381975));
+ 
+   __BB(4,guessed_local(18448837212)):
+   ay_17 = ay_16 - _Literal (int) -2147483648;
+   _21 = ak_20 + _Literal (int) -1;
+   ak_22 = _21 + 2147483647;
+   if (ak_22 != 0)
+     goto __BB10(guessed(126835753));
+   else
+     goto __BB9(guessed(7381975));
+ 
+   __BB(5,guessed_local(1073741842)):
+   _23 = o;
+   _24 = _Literal (int) -2 - _23;
+   o = _24;
+   _25 = ak_20 + _Literal (int) -1;
+   __MEM <int> ((int *)&tem) = _25;
+   _26 = ay_16 >> 31;
+   _27 = ak_20 + _26;
+   if (_27 != 2147483645)
+     goto __BB7(guessed(67108864));
+   else
+     goto __BB8(guessed(67108864));
+ 
+   __BB(9,guessed_local(1014686041)):
+   goto __BB6(precise(134217728));
+ 
+   __BB(6,loop_header(1),guessed_local(2088427865)):
+   ak_30 = __PHI (__BB2: _Literal (int) -1, __BB9: 0);
+   am_31 = __PHI (__BB2: _Literal (int) -1, __BB9: am_9);
+   ay_32 = __PHI (__BB2: _Literal (int) -1782460880, __BB9: 3);
+ az:
+   goto __BB3(precise(134217728));
+ 
+   __BB(7,guessed_local(536870921)):
+   goto __BB8(precise(134217728));
+ 
+   __BB(8,guessed_local(1073741842)):
+   _29 = __PHI (__BB5: 0, __BB7: 1);
+   if (_29 != 0)
+     goto __BB11;
+   else
+     goto __BB12;
+ 
+   __BB(11):
+     __builtin_abort ();
+ 
+   __BB(12):
+   return _29;
+ 
+ }
+ 
+ 
+ 
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/pr126341.c gcc-16-20260725/gcc/testsuite/gcc.dg/pr126341.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/pr126341.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/pr126341.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,53 ----
+ /* { dg-do compile { target bitint575 } } */
+ /* { dg-options "-fnon-call-exceptions -ftree-coalesce-vars" } */
+ /* { dg-prune-output "division by zero" } */
+ 
+ /* PR middle-end/126341 */
+ 
+ #define N 0x200000000uwb
+ #define DIV0 (1 / 0)
+ 
+ struct {
+   char j[8];
+ } k;
+ char l;
+ int m, p, q, r;
+ long n;
+ _Complex o;
+ int s;
+ _BitInt (256) aa;
+ 
+ void
+ foo (_BitInt (8) t)
+ {
+   int ah, ai, aj = 1, ak, al = 1, am = 1, an = 1, ao = 1, ap = 1, aq = DIV0;
+   int ar = 1, as = 1, at, au = DIV0;
+   int av = 1;
+   _BitInt (7) c = ak--;
+   char aw = 1, ax = 1, ay = 1, az = 1, a = 1, d = 1, e = 1;
+   int bfbg = 1, bh = 1, bi = p += ai -= __sync_add_and_fetch (&s, 1);
+   int bj;
+   int bk, blbm = 1, bt = 1, bu = 1, bv = __atomic_or_fetch (&aa, 1, 1);
+   int bn = 1, bobp = 1, br = 1, bs = 1;
+   unsigned b, cc;
+   char cf, ce;
+ 
+   if (bj)
+     goto ca;
+   b = 1, cc = 1;
+   for (;;);
+   ce = q;
+   cf = o ? 1
+     :
+     __builtin_stdc_rotate_left (__builtin_stdc_rotate_left
+ 				(c - 0x3bfuwb, br), n & 1) ? 3 : 3;
+   1 +
+     az & 1 | N << -az & m | ((az & 1 | N) << -az & 1 ? 0 : 7u) & 1 |
+     ((az & 1 | N) - az & m | az & 1 | N) < 7 > -c & 1;
+ ca:
+   s %= __builtin_stdc_rotate_left (cc, ah);
+   at /= r ^= ({ __auto_type cg = 0; __auto_type ch = 0; 0; });
+ 
+   long ci = bk % cf;
+   _BitInt (8) cj = l ? t : k.j[3];
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/torture/pr126171-2.c gcc-16-20260725/gcc/testsuite/gcc.dg/torture/pr126171-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/torture/pr126171-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/torture/pr126171-2.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,52 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target int32plus } */
+ 
+ int ah, o, t, q, aq, as, at;
+ 
+ int __attribute__ ((noipa)) n () {
+   return 129105662;
+ }
+ 
+ int a (int ak, int al[1], int am, int bj) {
+   int ay = as = -1782460880;
+   at = -28702851;
+   o = 0 % al[0] + -1 + bj - 1;
+   goto az;
+ ba:
+   al[0] = ak - 1;
+   am = -1;
+   goto bb;
+ bc:
+   t = -(bj - 2147483646);
+   ay = ay - (-1 % bj - 2147483647);
+   goto bd;
+ be:
+   aq = -1704571560;
+   am = am + bj - 2147483646;
+   if (am << (n () - 129105632) == 0)
+     goto bc;
+   goto bf;
+ bd:
+   ak = (-1 ^ al[0]) - 1 + ak + 2147483647;
+   if (ak)
+     goto be;
+   goto bg;
+ bf:
+   bj = -1 - am - 1 + 2147483647;
+   o = -1 - o - 1;
+   goto ba;
+ bg:
+   ay = 3;
+ az:
+   goto be;
+ bb:
+   q = (ay >> 31) - -ak - 2147483646;
+   if (q != -1) return 1;
+   return 0;
+ }
+ 
+ int main () {
+   if (a (-1, (int[]) { -1 }, -1, 2147483647) != 0)
+     __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/tree-ssa/predcom-8.c gcc-16-20260725/gcc/testsuite/gcc.dg/tree-ssa/predcom-8.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/tree-ssa/predcom-8.c	Sat Jul 18 22:32:13 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/tree-ssa/predcom-8.c	Sat Jul 25 22:32:13 2026
*************** int is_sorted(int *a, int n)
*** 10,13 ****
  }
  
  /* { dg-final { scan-tree-dump "Executing predictive commoning without unrolling" "pcom" } } */
! /* { dg-final { scan-tree-dump-not "Invalid sum" "pcom" } } */
--- 10,13 ----
  }
  
  /* { dg-final { scan-tree-dump "Executing predictive commoning without unrolling" "pcom" } } */
! /* { dg-final { scan-tree-dump-not "Invalid sum" "pcom" { xfail { arm*-*-* && arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c gcc-16-20260725/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c	Sat Jul 18 22:32:13 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c	Sat Jul 25 22:32:13 2026
*************** foo ()
*** 27,30 ****
     but the loop reads only one element at a time, and DOM cannot resolve these.
     The same happens on powerpc depending on the SIMD support available.  */
  
! /* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail { { alpha*-*-* hppa*64*-*-* nvptx*-*-* mmix-knuth-mmixware } || { { { lp64 && { mips*-*-* powerpc*-*-* riscv*-*-* } } || aarch64_sve } || { arm*-*-* && { ! arm_neon } } } } } } } */
--- 27,30 ----
     but the loop reads only one element at a time, and DOM cannot resolve these.
     The same happens on powerpc depending on the SIMD support available.  */
  
! /* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail { { alpha*-*-* hppa*64*-*-* nvptx*-*-* mmix-knuth-mmixware } || { { { lp64 && { mips*-*-* powerpc*-*-* riscv*-*-* } } || aarch64_sve } || { arm*-*-* && { ! { arm_neon || arm_mve } } } } } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s124.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s124.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s124.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s124.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 44,47 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { ! riscv_v } }  } } } */
--- 44,47 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { { ! riscv_v } && { ! arm_neon } } } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s276.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s276.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s276.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s276.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 42,45 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { ! riscv_v } }  } } } */
--- 42,45 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { { ! riscv_v } && { ! arm_neon } } } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3111.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3111.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3111.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3111.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 41,44 ****
  }
  
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { ! riscv_v } }  } } } */
--- 41,44 ----
  }
  
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { { ! riscv_v } && { ! arm_neon } } } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3113.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3113.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3113.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s3113.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 40,43 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 40,43 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s312.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s312.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s312.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s312.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 38,41 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 38,41 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s314.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s314.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s314.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s314.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 40,43 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 40,43 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s316.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s316.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s316.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s316.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 40,43 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 40,43 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s317.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s317.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s317.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s317.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 40,43 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 40,43 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s319.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s319.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s319.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s319.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 41,44 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 41,44 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s441.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s441.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s441.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s441.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 42,45 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { ! riscv_v } }  } } } */
--- 42,45 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { { ! riscv_v } && { ! arm_neon } } } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s443.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s443.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s443.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s443.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 47,50 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { ! riscv_v } }  } } } */
--- 47,50 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { { ! aarch64_sve } && { { ! riscv_v } && { ! arm_neon } } } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s453.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s453.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s453.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s453.c	Sat Jul 25 22:32:13 2026
*************** int main (int argc, char **argv)
*** 39,42 ****
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail *-*-* } } } */
--- 39,42 ----
    return 0;
  }
  
! /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! arm_neon } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-early-break_65.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-early-break_65.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-early-break_65.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-early-break_65.c	Sat Jul 25 22:32:13 2026
***************
*** 4,10 ****
  /* { dg-require-effective-target vect_int } */
  /* { dg-additional-options "-Ofast -fno-vect-cost-model -fdump-tree-vect-details" } */
  
! enum a { b };
  
  struct {
    enum a c;
--- 4,10 ----
  /* { dg-require-effective-target vect_int } */
  /* { dg-additional-options "-Ofast -fno-vect-cost-model -fdump-tree-vect-details" } */
  
! enum a { b, dummy = __INT_MAX__ };
  
  struct {
    enum a c;
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-iv-12.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-iv-12.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-iv-12.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-iv-12.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,60 ----
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-additional-options "-mprefer-vector-width=128" { target { x86_64-*-* i?86-*-* } } } */
+ 
+ /* Ensure that SLP induction does not blindly reuse IVs when the scalar
+    initial values of the lanes differ.  */
+ 
+ #include "tree-vect.h"
+ 
+ #define N 16
+ 
+ static const int expected[N] = {
+   1, 1, 1, 1, 2, 2, 2, 2,
+   3, 3, 3, 3, 4, 4, 4, 4
+ };
+ 
+ __attribute__ ((noipa))
+ void
+ fill (int *ans, int rounds)
+ {
+   int x = 1;
+   int y = 2;
+   int i = 0;
+ 
+   while (rounds > 0)
+     {
+       ans[i++] = x;
+       ans[i++] = x;
+       ans[i++] = x;
+       ans[i++] = x;
+       ans[i++] = y;
+       ans[i++] = y;
+       ans[i++] = y;
+       ans[i++] = y;
+ 
+       --rounds;
+       x += 2;
+       y += 2;
+     }
+ }
+ 
+ int
+ main (void)
+ {
+   int ans[N] = { 0 };
+ 
+   check_vect ();
+ 
+   fill (ans, 2);
+ 
+ #pragma GCC novector
+   for (int i = 0; i < N; ++i)
+     if (ans[i] != expected[i])
+       abort ();
+ 
+   return 0;
+ }
+ 
+ /* Multi-lane SLP inductions are not yet supported for variable-length
+    vectors.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_variable_length } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-iv-13.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-iv-13.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-iv-13.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-iv-13.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,60 ----
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-additional-options "-mprefer-vector-width=128" { target { x86_64-*-* i?86-*-* } } } */
+ 
+ /* Ensure that SLP induction does not blindly reuse IVs when the scalar
+    steps of the lanes differ.  */
+ 
+ #include "tree-vect.h"
+ 
+ #define N 16
+ 
+ static const int expected[N] = {
+   1, 1, 1, 1, 1, 1, 1, 1,
+   3, 3, 3, 3, 4, 4, 4, 4
+ };
+ 
+ __attribute__ ((noipa))
+ void
+ fill (int *ans, int rounds)
+ {
+   int x = 1;
+   int y = 1;
+   int i = 0;
+ 
+   while (rounds > 0)
+     {
+       ans[i++] = x;
+       ans[i++] = x;
+       ans[i++] = x;
+       ans[i++] = x;
+       ans[i++] = y;
+       ans[i++] = y;
+       ans[i++] = y;
+       ans[i++] = y;
+ 
+       --rounds;
+       x += 2;
+       y += 3;
+     }
+ }
+ 
+ int
+ main (void)
+ {
+   int ans[N] = { 0 };
+ 
+   check_vect ();
+ 
+   fill (ans, 2);
+ 
+ #pragma GCC novector
+   for (int i = 0; i < N; ++i)
+     if (ans[i] != expected[i])
+       abort ();
+ 
+   return 0;
+ }
+ 
+ /* Multi-lane SLP inductions are not yet supported for variable-length
+    vectors.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_variable_length } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-iv-14.c gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-iv-14.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vect/vect-iv-14.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vect/vect-iv-14.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,78 ----
+ /* { dg-require-effective-target vect_int } */
+ /* { dg-additional-options "-mprefer-vector-width=128" { target { x86_64-*-* i?86-*-* } } } */
+ 
+ #include "tree-vect.h"
+ 
+ #define N 48
+ 
+ #define STORE4(RESULT, VALUE) \
+   do { \
+     (RESULT)[i++] = (VALUE); \
+     (RESULT)[i++] = (VALUE); \
+     (RESULT)[i++] = (VALUE); \
+     (RESULT)[i++] = (VALUE); \
+   } while (0)
+ 
+ static const int expected[N] = {
+   /* Round 1.  */
+    1,  1,  1,  1,   10, 10, 10, 10,    1,  1,  1,  1,
+    1,  1,  1,  1,   10, 10, 10, 10,    1,  1,  1,  1,
+   /* Round 2 (x + 2, y + 3).  */
+    3,  3,  3,  3,   13, 13, 13, 13,    3,  3,  3,  3,
+    3,  3,  3,  3,   13, 13, 13, 13,    3,  3,  3,  3
+ };
+ 
+ /* To test the multi-IV generation path (CANDIDATE_NIVS > 1), force a
+    geometry where CANDIDATE_NIVS < NIVS.  On four-lane integer vectors,
+    the minimum SLP group size that satisfies this is 24, creating 6 vectors.
+ 
+    The first three (X, Y, X) vectors form the first period.  The last three
+    form the repeated period, which exercises the IVN % CANDIDATE_NIVS reuse
+    path.  */
+ __attribute__ ((noipa))
+ void
+ fill (int *ans, int rounds)
+ {
+   int x = 1;
+   int y = 10;
+   int i = 0;
+ 
+   while (rounds > 0)
+     {
+       /* First period.  */
+       STORE4 (ans, x);
+       STORE4 (ans, y);
+       STORE4 (ans, x);
+ 
+       /* Repeated period.  */
+       STORE4 (ans, x);
+       STORE4 (ans, y);
+       STORE4 (ans, x);
+ 
+       --rounds;
+       x += 2;
+       y += 3;
+     }
+ }
+ 
+ int
+ main (void)
+ {
+   int ans[N] = { 0 };
+ 
+   check_vect ();
+ 
+   fill (ans, 2);
+ 
+ #pragma GCC novector
+   for (int i = 0; i < N; ++i)
+     if (ans[i] != expected[i])
+       abort ();
+ 
+   return 0;
+ }
+ 
+ /* Multi-lane SLP inductions are not yet supported for variable-length
+    vectors.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_variable_length } } } */
+ /* { dg-final { scan-tree-dump-times "reusing 3 SLP induction IVs for 6 vector chunks" 1 "vect" { target { x86_64-*-* i?86-*-* } } } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.dg/vla-1.c gcc-16-20260725/gcc/testsuite/gcc.dg/vla-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.dg/vla-1.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.dg/vla-1.c	Sat Jul 25 22:32:13 2026
***************
*** 1,7 ****
  /* { dg-do compile } */
  /* { dg-options "-g -O3 -fdump-tree-optimized -fvar-tracking-assignments -fno-selective-scheduling -fno-selective-scheduling2 -fno-ipa-vrp" } */
  
! int __attribute__((noinline))
  f1 (int i)
  {
    char a[i + 1];
--- 1,7 ----
  /* { dg-do compile } */
  /* { dg-options "-g -O3 -fdump-tree-optimized -fvar-tracking-assignments -fno-selective-scheduling -fno-selective-scheduling2 -fno-ipa-vrp" } */
  
! static int __attribute__((noinline))
  f1 (int i)
  {
    char a[i + 1];
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,25 ----
+ // { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls" }
+ // { dg-final { check-function-bodies "**" "" } }
+ 
+ #include <arm_sme.h>
+ 
+ void callee_ns();
+ __arm_streaming __arm_inout("za") void callee_s();
+ 
+ /*
+ ** foo:
+ **	...
+ **	smstart	za
+ **	...
+ **	msr	tpidr2_el0, x\d+
+ **	...
+ */
+ __arm_locally_streaming __arm_new("za") const float * foo(const float* x) {
+     callee_ns ();
+     const float32_t *x_f_in = x;
+     svzero_za();
+     callee_s ();
+     return x_f_in;
+ }
+ 
+ 
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_8.c gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_8.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sme/zt0_state_8.c	Sat Jul 25 22:32:13 2026
***************
*** 0 ****
--- 1,14 ----
+ // { dg-options "-O3 -fomit-frame-pointer -fno-optimize-sibling-calls" }
+ 
+ #include <arm_sme.h>
+ 
+ #pragma GCC target "+sme2+sme-lutv2"
+ 
+ __arm_streaming __arm_inout("zt0")
+ void foo(svfloat32_t z)
+ {
+   svzero_zt (0);
+   svwrite_lane_zt_f32 (0, z, 1);
+ }
+ 
+ // { dg-final { scan-assembler "zero" } }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,48 ----
+ /* PR target/105116 */
+ /* { dg-do run { target aarch64_sve_hw } } */
+ /* { dg-options "-O2 -fno-split-wide-types" } */
+ 
+ /* Besides the ICE, the non-representable high-lane subregs used to be
+    resolved lossily (silently reading lane 0), miscompiling the upper lanes.
+    Check the scalarised divide produces the correct result for every lane.  */
+ 
+ typedef signed char vnx16qi __attribute__((vector_size (32)));
+ 
+ __attribute__((noipa)) void
+ vdiv_vnx16qi (vnx16qi *x, vnx16qi y, vnx16qi z)
+ {
+   register vnx16qi dst  asm ("z0");
+   register vnx16qi src1 asm ("z2");
+   register vnx16qi src2 asm ("z4");
+   dst = *x;
+   src1 = y;
+   src2 = z;
+   asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2));
+   dst = src2 - (dst / src1);
+   asm volatile ("" :: "w" (dst));
+   *x = dst;
+ }
+ 
+ int
+ main (void)
+ {
+   vnx16qi X, Y, Z;
+   signed char xv[32], yv[32], zv[32];
+   for (int i = 0; i < 32; i++)
+     {
+       xv[i] = (signed char) (i * 7 - 50);
+       yv[i] = (signed char) (((i % 5) + 1) * (i & 1 ? 1 : -1));
+       zv[i] = (signed char) (100 - i * 3);
+     }
+   __builtin_memcpy (&X, xv, 32);
+   __builtin_memcpy (&Y, yv, 32);
+   __builtin_memcpy (&Z, zv, 32);
+   vdiv_vnx16qi (&X, Y, Z);
+   signed char got[32];
+   __builtin_memcpy (got, &X, 32);
+   for (int i = 0; i < 32; i++)
+     if (got[i]
+ 	!= (signed char) (zv[i] - (signed char) ((int) xv[i] / (int) yv[i])))
+       __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,32 ----
+ /* PR target/105116 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-split-wide-types" } */
+ 
+ /* Wide GNU vectors pinned to SVE z registers and then scalarised by vector
+    lowering used to ICE in lra_split_hard_reg_for ("unable to find a register
+    to spill"): LRA reloaded a non-representable scalar subreg of the OImode
+    register pair into GENERAL_REGS, which cannot hold OImode.  Integer vector
+    divide and modulo have no Advanced SIMD form, so they are still scalarised
+    and exercise the reload path.  */
+ 
+ typedef signed char vnx16qi __attribute__((vector_size (32)));
+ 
+ #define TEST(NAME, OP)						\
+   void								\
+   NAME (vnx16qi *x, vnx16qi y, vnx16qi z)			\
+   {								\
+     register vnx16qi dst  asm ("z0");				\
+     register vnx16qi src1 asm ("z2");				\
+     register vnx16qi src2 asm ("z4");				\
+     dst = *x;							\
+     src1 = y;							\
+     src2 = z;							\
+     asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2));	\
+     dst = src2 - (OP);						\
+     asm volatile ("" :: "w" (dst));				\
+     *x = dst;							\
+   }
+ 
+ TEST (vmul_vnx16qi, dst * src1)
+ TEST (vdiv_vnx16qi, dst / src1)
+ TEST (vmod_vnx16qi, dst % src1)
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1cq_u32.c	Sat Jul 25 22:32:14 2026
*************** uint32_t foo (void)
*** 31,35 ****
  TEST_SHA1C_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1c.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
--- 31,35 ----
  TEST_SHA1C_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1c.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 { xfail { arm_thumb2 && arm_hf_eabi } } } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1h_u32.c	Sat Jul 25 22:32:14 2026
*************** uint32_t foo (void)
*** 27,31 ****
  TEST_SHA1H_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1h.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
--- 27,31 ----
  TEST_SHA1H_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1h.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 { xfail { arm_thumb2 && arm_hf_eabi } } } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1mq_u32.c	Sat Jul 25 22:32:14 2026
*************** uint32_t foo (void)
*** 31,35 ****
  TEST_SHA1M_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1m.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
--- 31,35 ----
  TEST_SHA1M_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1m.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 { xfail { arm_thumb2 && arm_hf_eabi } } } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/arm/crypto-vsha1pq_u32.c	Sat Jul 25 22:32:14 2026
*************** uint32_t foo (void)
*** 31,35 ****
  TEST_SHA1P_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1p.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
--- 31,35 ----
  TEST_SHA1P_VEC_SELECT (GET_LANE)
  
  /* { dg-final { scan-assembler-times {sha1p.32\tq[0-9]+, q[0-9]+} 5 } } */
! /* { dg-final { scan-assembler-times {vdup.32\tq[0-9]+, (?:r[0-9]+|d[0-9]+\[[0-9]+\])} 4 { xfail { arm_thumb2 && arm_hf_eabi } } } } */
  /* { dg-final { scan-assembler-times {vmov.32\tr[0-9]+, d[0-9]+\[[0-9]+\]} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/arm/reg_equal_test.c gcc-16-20260725/gcc/testsuite/gcc.target/arm/reg_equal_test.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/arm/reg_equal_test.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/arm/reg_equal_test.c	Sat Jul 25 22:32:14 2026
***************
*** 1,6 ****
  /* { dg-do compile } */
  /* { dg-options "-fgimple -O1 -fdump-rtl-expand" } */
! /* { dg-skip-if "" { ! { arm_thumb2_ok || arm_thumb1_movt_ok } } } */
  
  void __GIMPLE (ssa,startwith ("expand"))
  x ()
--- 1,7 ----
  /* { dg-do compile } */
  /* { dg-options "-fgimple -O1 -fdump-rtl-expand" } */
! /* { dg-require-effective-target arm_cpu_cortex_a53_ok } */
! /* { dg-add-options arm_cpu_cortex_a53 } */
  
  void __GIMPLE (ssa,startwith ("expand"))
  x ()
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/bpf/const-cost-model-2.c gcc-16-20260725/gcc/testsuite/gcc.target/bpf/const-cost-model-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/bpf/const-cost-model-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/bpf/const-cost-model-2.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,36 ----
+ /* Verify that function return values are const 0 and 1 and not reg.
+    Extracted from BPF selftest sockopt_multi.c  */
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mcpu=v4" } */
+ 
+ struct bpf_sockopt {
+    int level, optname, optlen, retval;
+    void *optval_end, *optval;
+ };
+ 
+ typedef unsigned char u8;
+ 
+ int getsockopt_child(struct bpf_sockopt *ctx)
+ {
+  u8 *optval_end = ctx->optval_end;
+  u8 *optval = ctx->optval;
+ 
+ //  if (ctx->optname != 1)
+ //    goto out;
+  
+  if (ctx->level != 0 || ctx->optname != 1)
+   goto out;
+ 
+  if (optval[0] != 0x80)
+   return 0;
+ 
+  ctx->retval = 0;
+  return 1;
+ 
+ out:
+  return 1;
+ }
+ 
+ /* { dg-final { scan-assembler-not   {\*\(u32 \*\) \(r.\+12\) = r.} } } */
+ /* { dg-final { scan-assembler-times {\*\(u32 \*\) \(r.\+12\) = 0} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/bpf/const-cost-model.c gcc-16-20260725/gcc/testsuite/gcc.target/bpf/const-cost-model.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/bpf/const-cost-model.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/bpf/const-cost-model.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,42 ----
+ /* Verify that arg const 4 to 2nd call is const and not reg r0 which is
+    ret value of first call.
+    Extracted from BPF selftest attach_probe.c  */
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mcpu=v4" } */
+ 
+ extern int bpf_copy_from_user_str(int dst__sz);
+ 
+ _Bool verify_sleepable_user_copy_str(void)
+ {
+  int ret;
+  char data_short_pad[4];
+ 
+  ret = bpf_copy_from_user_str(sizeof(data_short_pad));
+ 
+  if (ret != 4)
+   return false;
+ 
+  ret = bpf_copy_from_user_str(sizeof(data_short_pad));
+ 
+  if (ret != 4)
+   return false;
+ 
+   return true;
+ }
+ 
+ /* Original generated code
+ 	r1 = 4
+ 	call	bpf_copy_from_user_str
+ 	r1 = (s32) r0
+     ...
+ 	call	bpf_copy_from_user_str
+ 
+    Now generated
+ 	r1 = 4
+ 	call	bpf_copy_from_user_str
+     ...
+ 	r1 = 4
+ 	call	bpf_copy_from_user_str  */
+ 
+ /* { dg-final { scan-assembler-times {r1 = 4} 2 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/bpf/divmod-libcall-2.c gcc-16-20260725/gcc/testsuite/gcc.target/bpf/divmod-libcall-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/bpf/divmod-libcall-2.c	Sat Jul 18 22:32:14 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/bpf/divmod-libcall-2.c	Sat Jul 25 22:32:14 2026
***************
*** 1,16 ****
  /* { dg-do compile } */
  /* { dg-options "-O2 -mcpu=v3" } */
  /* { dg-final { scan-assembler "global\t__divdi3" } } */
  /* { dg-final { scan-assembler "global\t__moddi3" } } */
  
! int
! foo (unsigned int len)
  {
!   return ((long)len) * 234 / 5;
  }
  
! int
! bar (unsigned int len)
  {
!   return ((long)len) * 234 % 5;
  }
--- 1,19 ----
+ /* Inverse of divmod-libcall-1.c. Ensure libcalls are generated for
+    -mcpu=v3 due to lack of signed div/mod.  */
+ 
  /* { dg-do compile } */
  /* { dg-options "-O2 -mcpu=v3" } */
  /* { dg-final { scan-assembler "global\t__divdi3" } } */
  /* { dg-final { scan-assembler "global\t__moddi3" } } */
  
! long
! foo (long len)
  {
!   return len * 234 / 5;
  }
  
! long
! bar (long len)
  {
!   return len * 234 % 5;
  }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/bpf/mult-large.c gcc-16-20260725/gcc/testsuite/gcc.target/bpf/mult-large.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/bpf/mult-large.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/bpf/mult-large.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,17 ----
+ /* Verify that a multiply by a complex constant uses BPF's native single
+    instruction mul rather than a synthesized shift/add(-sub) sequence.
+    This is extracted from memset-4.c but with 32-bit multiplicand vs. byte
+    as the constant multiplier could genuinely trigger a mpy synthesis as
+       'x | x<<8 | x<<16 | x<<24'.  */
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ 
+ unsigned
+ bcast (unsigned x)
+ {
+   return x * 0x01010101u;
+ }
+ 
+ /* { dg-final { scan-assembler {\*= 16843009} } } */
+ /* { dg-final { scan-assembler-not {<<=} } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/bpf/mult-small.c gcc-16-20260725/gcc/testsuite/gcc.target/bpf/mult-small.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/bpf/mult-small.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/bpf/mult-small.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,14 ----
+ /* Verify that a multiply by a small constant uses BPF's native single
+    instruction mul rather than a synthesized shift/add(-sub) sequence.  */
+ 
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mcpu=v4" } */
+ 
+ unsigned
+ mul7 (unsigned x)
+ {
+   return x * 7;
+ }
+ 
+ /* { dg-final { scan-assembler {\*= 7} } } */
+ /* { dg-final { scan-assembler-not {<<=} } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/i386/pr126320.c gcc-16-20260725/gcc/testsuite/gcc.target/i386/pr126320.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/i386/pr126320.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/i386/pr126320.c	Sat Jul 25 22:32:14 2026
***************
*** 0 ****
--- 1,45 ----
+ /* { dg-do run } */
+ /* { dg-options "-O1 -march=x86-64" } */
+ 
+ #include <stdint.h>
+ 
+ typedef int64_t v2i64 __attribute__ ((vector_size (16)));
+ void *g4, *f3_p2;
+ int8_t g15, g23;
+ v2i64 g21;
+ _Bool g22, f3_c4;
+ __attribute__ ((__vector_size__ (16 * sizeof (int)))) int g26;
+ int16_t g29;
+ 
+ __attribute__((noipa, noinline, target("avx2")))
+ void
+ do_test (v2i64 a1)
+ {
+   int16_t v3;
+ lbl_entry:
+   f3_p2 = &a1;
+   v3 = g29;
+   if (g22)
+     goto lbl_bf4;
+   f3_c4 = v3 - 709;
+   if (f3_c4)
+     return;
+ lbl_bf4:
+   g21 = a1;
+   uint8_t __ov_tmp_g15;
+   g15 = __ov_tmp_g15;
+   a1[0] = 0;
+   g26 = g26 == ~g26;
+   g4 = f3_p2;
+   g23 = 0;
+   goto lbl_entry;
+ }
+ 
+ int
+ main (void)
+ {
+  if (__builtin_cpu_supports ("avx2"))
+    do_test (g21);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-build-dmr.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-build-dmr.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-build-dmr.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-build-dmr.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo2 (__dmr1024 *dst, vec_t *src)
+ {
+   __builtin_build_dmr (dst, src[0], src[1], src[2], src[3], src[4], src[5], src[6], src[7]);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxxinstdmr512\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mlxv\M} 8 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-builtin-1.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-builtin-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-builtin-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-builtin-1.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,203 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvbf16gerx2 (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvbf16gerx2 (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvbf16gerx2\M} 2 } } */
+ 
+ void
+ foo_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvbf16gerx2nn (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvbf16gerx2nn (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvbf16gerx2nn\M} 2 } } */
+ 
+ void
+ foo_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvbf16gerx2np (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvbf16gerx2np (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvbf16gerx2np\M} 2 } } */
+ 
+ void
+ foo_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvbf16gerx2pn (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvbf16gerx2pn (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvbf16gerx2pn\M} 2 } } */
+ 
+ void
+ foo_4 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvbf16gerx2pp (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_4 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvbf16gerx2pp (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvbf16gerx2pp\M} 2 } } */
+ 
+ void
+ foo_5 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvbf16gerx2 (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvbf16gerx2\M} 1 } } */
+ 
+ void
+ foo_6 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvbf16gerx2nn (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvbf16gerx2nn\M} 1 } } */
+ 
+ void
+ foo_7 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvbf16gerx2np (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvbf16gerx2np\M} 1 } } */
+ 
+ void
+ foo_8 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvbf16gerx2pn (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvbf16gerx2pn\M} 1 } } */
+ 
+ void
+ foo_9 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvbf16gerx2pp (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvbf16gerx2pp\M} 1 } } */
+ 
+ void
+ foo_10 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvi8gerx4spp (dst, vp, vec, 255, 15, 15);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvi8gerx4spp\M} 1 } } */
+ 
+ void
+ foo_11 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvi8gerx4spp (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_11 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvi8gerx4spp (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvi8gerx4spp\M} 2 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-builtin-2.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,170 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvf16gerx2 (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvf16gerx2 (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvf16gerx2\M} 2 } } */
+ 
+ void
+ foo_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvf16gerx2nn (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvf16gerx2nn (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvf16gerx2nn\M} 2 } } */
+ 
+ void
+ foo_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvf16gerx2np (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvf16gerx2np (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvf16gerx2np\M} 2 } } */
+ 
+ void
+ foo_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvf16gerx2pn (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvf16gerx2pn (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvf16gerx2pn\M} 2 } } */
+ 
+ void
+ foo_4 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvf16gerx2pp (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_4 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvf16gerx2pp (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvf16gerx2pp\M} 2 } } */
+ 
+ void
+ foo_5 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvf16gerx2 (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2\M} 1 } } */
+ 
+ void
+ foo_6 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvf16gerx2nn (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2nn\M} 1 } } */
+ 
+ void
+ foo_7 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvf16gerx2np (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2np\M} 1 } } */
+ 
+ void
+ foo_8 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvf16gerx2pn (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2pn\M} 1 } } */
+ 
+ void
+ foo_9 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvf16gerx2pp (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvf16gerx2pp\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-builtin.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-builtin.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-builtin.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-builtin.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,81 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvi8gerx4 (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvi8gerx4 (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvi8gerx4\M} 2 } } */
+ 
+ void
+ foo_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_dmsetdmrz (&dmr);
+   __builtin_mma_dmxvi8gerx4pp (&dmr, vp, vec);
+   *dst = dmr;
+ }
+ 
+ void
+ bar_1 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __dmr1024 dmr = dst[0];;
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_dmxvi8gerx4pp (&dmr, vp, vec);
+   dst[1] = dmr;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxvi8gerx4pp\M} 2 } } */
+ 
+ void
+ foo_2 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvi8gerx4 (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvi8gerx4\M} 1 } } */
+ 
+ void
+ foo_3 (__dmr1024 *dst, __vector_pair *vpp, vec_t *src)
+ {
+   __vector_pair vp = *vpp;
+   vec_t vec = *src;
+   __builtin_mma_pmdmxvi8gerx4pp (dst, vp, vec, 255, 15, 2);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mpmdmxvi8gerx4pp\M} 1 } } */
+ 
+ 
+ void
+ foo_5 (__dmr1024 *dst, __dmr1024 *src)
+ {
+   __builtin_dmxor (dst, src);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxor\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-disassemble-dmr.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-disassemble-dmr.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-disassemble-dmr.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-disassemble-dmr.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ bar (vec_t *dst, __dmr1024 *src)
+ {
+   vec_t res[8];
+   __builtin_disassemble_dmr (res, src);
+   dst[0] = res[0];
+   dst[2] = res[1];
+   dst[4] = res[2];
+   dst[6] = res[3];
+   dst[8] = res[4];
+   dst[10] = res[5];
+   dst[12] = res[6];
+   dst[14] = res[7];
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxxextfdmr512\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 8 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-extract512.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-extract512.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-extract512.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-extract512.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-require-effective-target lp64 } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ bar (vec_t *dst, __dmr1024 *src)
+ {
+   vec_t res[4];
+   __builtin_dmr_extract512 (res, src, 0);
+   dst[0] = res[0];
+   dst[2] = res[1];
+   dst[4] = res[2];
+   dst[6] = res[3];
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mdmxxextfdmr512\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-no-mma.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-no-mma.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-no-mma.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-no-mma.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,19 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -mdense-math -mno-mma -O2" } */
+ 
+ /* Dense Math (-mdense-math) without MMA supports __vector_pair and
+    __dmr1024 (see dmf-no-mma-1.c), but __vector_quad moves still
+    require MMA.  Verify that a __vector_quad copy under -mno-mma is
+    diagnosed with a proper error message via the movxo expander
+    instead of ICEing.  The error is emitted during RTL expansion, so
+    its reported location can be fragile; match it anywhere in the
+    output.  */
+ 
+ void
+ copy_quad (__vector_quad *dst, __vector_quad *src)
+ {
+   *dst = *src;
+ }
+ 
+ /* { dg-error "type '__vector_quad' requires the '-mmma' option" "" { target *-*-* } 0 } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-xxacc.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-xxacc.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmf-xxacc.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmf-xxacc.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ 
+ void
+ foo (__vector_quad *acc)
+ {
+   __builtin_mma_xxmtacc (acc);
+ }
+ 
+ void
+ bar (__vector_quad *acc)
+ {
+   __builtin_mma_xxmfacc (acc);
+ }
+ 
+ /* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */
+ /* { dg-final { scan-assembler-not {\mxxmfacc\M} } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-alignment.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-alignment.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-alignment.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-alignment.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,33 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target hard_float } */
+ /* { dg-options "-O2 -mhard-float" } */
+ 
+ /* Verify the __dmr1024 opaque type is always registered (regardless of
+    whether -mdense-math is enabled) and has the expected size and
+    alignment, following the same model as __vector_pair and
+    __vector_quad in mma-alignment.c.  */
+ 
+ #include <stdlib.h>
+ 
+ struct
+ {
+   int __attribute__ ((__aligned__)) ivar;
+   __dmr1024 dmr;
+ } s;
+ 
+ int
+ main (void)
+ {
+   /* __dmr1024 holds the contents of a 1,024-bit Dense Math Register.  */
+   if (sizeof (__dmr1024) != 128)
+     abort ();
+ 
+   /* __dmr1024 loads/stores are always broken into two vector-pair
+      transfers, and there is no support for aligning the stack to
+      1,024 bits, so the type alignment is 512 bits (64 bytes), matching
+      __vector_quad rather than its own 1,024-bit size.  */
+   if (__alignof__ (s.dmr) != 64)
+     abort ();
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-compile.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-compile.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-compile.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-compile.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -mdense-math -O2" } */
+ 
+ /* Verify that __dmr1024 is accepted as a type with the expected size
+    and alignment, and that it can be used through pointers without
+    triggering any diagnostics.  Only pointers are passed around here;
+    actual __dmr1024 value copies are covered by dmr1024-copy.c.  */
+ 
+ typedef __dmr1024 dmr_t;
+ 
+ _Static_assert (sizeof (__dmr1024) == 128, "__dmr1024 must be 128 bytes");
+ _Static_assert (__alignof__ (__dmr1024) == 64,
+ 		 "__dmr1024 alignment must be 64 bytes");
+ 
+ struct dmr_holder
+ {
+   __dmr1024 dmr;
+ };
+ 
+ extern __dmr1024 global_dmr;
+ extern const dmr_t *global_dmr_ptr;
+ 
+ __dmr1024 *
+ identity (__dmr1024 *p)
+ {
+   return p;
+ }
+ 
+ const dmr_t *
+ identity_const (const dmr_t *p)
+ {
+   return p;
+ }
+ 
+ void *
+ as_void_ptr (__dmr1024 *p)
+ {
+   return (void *) p;
+ }
+ 
+ __dmr1024 *
+ holder_dmr (struct dmr_holder *h)
+ {
+   return &h->dmr;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-1.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-1.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -mdense-math -O2 -std=gnu17" } */
+ 
+ /* The __dmr1024 opaque type, like __vector_quad and __vector_pair
+    (see pr96506-1.c), may not be used as a function parameter.  Verify
+    we flag errors on these uses rather than ICE.
+ 
+    This must be kept separate from the return-value test
+    (dmr1024-invalid-use-2.c): the parameter diagnostics below are only
+    emitted during RTL expansion, which is skipped entirely once a
+    parse-time error (such as the return-value diagnostic) has been
+    emitted.  */
+ 
+ extern void bar0 ();
+ extern void bar1 ();
+ 
+ typedef __dmr1024 dmr_t;
+ 
+ void
+ foo0 (void)
+ {
+   __dmr1024 v;
+   bar0 (v); /* { dg-error "invalid use of Dense Math operand of type .__dmr1024. as a function parameter" } */
+ }
+ 
+ void
+ foo1 (void)
+ {
+   dmr_t v;
+   bar1 (v); /* { dg-error "invalid use of Dense Math operand of type .__dmr1024. as a function parameter" } */
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-2.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/dmr1024-invalid-use-2.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -mdense-math -O2" } */
+ 
+ /* The __dmr1024 opaque type, like __vector_quad and __vector_pair
+    (see pr96506-2.c), may not be used as a function return value.
+    Verify we flag errors on these uses rather than ICE.  Kept separate
+    from the function-parameter test (dmr1024-invalid-use-1.c); see the
+    comment there.  */
+ 
+ typedef __dmr1024 dmr_t;
+ 
+ __dmr1024
+ foo0 (__dmr1024 *src)
+ { /* { dg-error "invalid use of Dense Math type .__dmr1024. as a function return value" } */
+   return *src;
+ }
+ 
+ dmr_t
+ foo1 (dmr_t *src)
+ { /* { dg-error "invalid use of Dense Math type .__dmr1024. as a function return value" } */
+   return *src;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,313 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char  vec_t __attribute__((vector_size(16)));
- 
- void
- foo0 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvi4ger8 (&acc, vec0, vec1);
-   __builtin_mma_xvi4ger8pp (&acc, vec0, vec1);
-   dst[0] = acc;
- }
- 
- void
- foo1 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvi8ger4 (&acc, vec0, vec1);
-   __builtin_mma_xvi8ger4pp (&acc, vec0, vec1);
-   __builtin_mma_xvi8ger4spp(&acc, vec0, vec1);
-   dst[1] = acc;
- }
- 
- void
- foo2 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvi16ger2 (&acc, vec0, vec1);
-   __builtin_mma_xvi16ger2pp (&acc, vec0, vec1);
-   dst[2] = acc;
- }
- 
- void
- foo3 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvi16ger2s (&acc, vec0, vec1);
-   __builtin_mma_xvi16ger2spp (&acc, vec0, vec1);
-   dst[3] = acc;
- }
- 
- void
- foo4 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvf16ger2 (&acc, vec0, vec1);
-   __builtin_mma_xvf16ger2pp (&acc, vec0, vec1);
-   __builtin_mma_xvf16ger2pn (&acc, vec0, vec1);
-   dst[4] = acc;
- }
- 
- void
- foo4b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_xvf16ger2np (&acc, vec0, vec1);
-   __builtin_mma_xvf16ger2nn (&acc, vec0, vec1);
-   dst[4] = acc;
- }
- 
- void
- foo5 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvbf16ger2 (&acc, vec0, vec1);
-   __builtin_mma_xvbf16ger2pp (&acc, vec0, vec1);
-   __builtin_mma_xvbf16ger2pn (&acc, vec0, vec1);
-   dst[5] = acc;
- }
- 
- void
- foo5b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_xvbf16ger2np (&acc, vec0, vec1);
-   __builtin_mma_xvbf16ger2nn (&acc, vec0, vec1);
-   dst[5] = acc;
- }
- 
- void
- foo6 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvf32ger (&acc, vec0, vec1);
-   __builtin_mma_xvf32gerpp (&acc, vec0, vec1);
-   __builtin_mma_xvf32gerpn (&acc, vec0, vec1);
-   dst[6] = acc;
- }
- 
- void
- foo6b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_xvf32gernp (&acc, vec0, vec1);
-   __builtin_mma_xvf32gernn (&acc, vec0, vec1);
-   dst[6] = acc;
- }
- 
- void
- foo7 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvi4ger8 (&acc, vec0, vec1, 15, 15, 255);
-   __builtin_mma_pmxvi4ger8pp (&acc, vec0, vec1, 15, 15, 255);
-   dst[7] = acc;
- }
- 
- void
- foo8 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvi8ger4 (&acc, vec0, vec1, 15, 15, 15);
-   __builtin_mma_pmxvi8ger4pp (&acc, vec0, vec1, 15, 15, 15);
-   __builtin_mma_pmxvi8ger4spp(&acc, vec0, vec1, 15, 15, 15);
-   dst[8] = acc;
- }
- 
- void
- foo9 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvi16ger2 (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvi16ger2pp (&acc, vec0, vec1, 15, 15, 3);
-   dst[9] = acc;
- }
- 
- void
- foo10 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvi16ger2s (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvi16ger2spp (&acc, vec0, vec1, 15, 15, 3);
-   dst[10] = acc;
- }
- 
- void
- foo11 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvf16ger2 (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvf16ger2pp (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvf16ger2pn (&acc, vec0, vec1, 15, 15, 3);
-   dst[11] = acc;
- }
- 
- void
- foo11b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_pmxvf16ger2np (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvf16ger2nn (&acc, vec0, vec1, 15, 15, 3);
-   dst[11] = acc;
- }
- 
- void
- foo12 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvbf16ger2 (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvbf16ger2pp (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvbf16ger2pn (&acc, vec0, vec1, 15, 15, 3);
-   dst[12] = acc;
- }
- 
- void
- foo12b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_pmxvbf16ger2np (&acc, vec0, vec1, 15, 15, 3);
-   __builtin_mma_pmxvbf16ger2nn (&acc, vec0, vec1, 15, 15, 3);
-   dst[12] = acc;
- }
- 
- void
- foo13 (__vector_quad *dst, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_pmxvf32ger (&acc, vec0, vec1, 15, 15);
-   __builtin_mma_pmxvf32gerpp (&acc, vec0, vec1, 15, 15);
-   __builtin_mma_pmxvf32gerpn (&acc, vec0, vec1, 15, 15);
-   dst[13] = acc;
- }
- 
- void
- foo13b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
- {
-   __vector_quad acc;
-   vec_t vec0 = vec[0];
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_pmxvf32gernp (&acc, vec0, vec1, 15, 15);
-   __builtin_mma_pmxvf32gernn (&acc, vec0, vec1, 15, 15);
-   dst[13] = acc;
- }
- 
- /* { dg-final { scan-assembler-times {\mlxv\M} 40 } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 40 } } */
- /* { dg-final { scan-assembler-times {\mxxmfacc\M} 20 } } */
- /* { dg-final { scan-assembler-times {\mxxmtacc\M} 6 } } */
- /* { dg-final { scan-assembler-times {\mxvbf16ger2\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvbf16ger2nn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvbf16ger2np\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvbf16ger2pn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvbf16ger2pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf16ger2\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf16ger2nn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf16ger2np\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf16ger2pn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf16ger2pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf32ger\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf32gernn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf32gernp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf32gerpn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf32gerpp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi16ger2\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi16ger2pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi16ger2s\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi16ger2spp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi4ger8\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi4ger8pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi8ger4\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi8ger4pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvi8ger4spp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvbf16ger2\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvbf16ger2nn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvbf16ger2np\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvbf16ger2pn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvbf16ger2pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf16ger2\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf16ger2nn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf16ger2np\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf16ger2pn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf16ger2pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf32ger\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf32gernn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf32gernp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf32gerpn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf32gerpp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi16ger2\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi16ger2pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi16ger2s\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi16ger2spp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi4ger8\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi4ger8pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi8ger4\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi8ger4pp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvi8ger4spp\M} 1 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,58 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-1.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 40 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 40 } } */
+ 
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gernn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2s\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2spp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi4ger8\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi4ger8pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi8ger4\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi8ger4pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi8ger4spp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gernn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2s\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2spp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi4ger8\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi4ger8pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi8ger4\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi8ger4pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi8ger4spp\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,257 ----
+ /* Header file for mma-builtin-1.c test - contains test functions only */
+ 
+ typedef unsigned char  vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo0 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvi4ger8 (&acc, vec0, vec1);
+   __builtin_mma_xvi4ger8pp (&acc, vec0, vec1);
+   dst[0] = acc;
+ }
+ 
+ void
+ foo1 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvi8ger4 (&acc, vec0, vec1);
+   __builtin_mma_xvi8ger4pp (&acc, vec0, vec1);
+   __builtin_mma_xvi8ger4spp(&acc, vec0, vec1);
+   dst[1] = acc;
+ }
+ 
+ void
+ foo2 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvi16ger2 (&acc, vec0, vec1);
+   __builtin_mma_xvi16ger2pp (&acc, vec0, vec1);
+   dst[2] = acc;
+ }
+ 
+ void
+ foo3 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvi16ger2s (&acc, vec0, vec1);
+   __builtin_mma_xvi16ger2spp (&acc, vec0, vec1);
+   dst[3] = acc;
+ }
+ 
+ void
+ foo4 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvf16ger2 (&acc, vec0, vec1);
+   __builtin_mma_xvf16ger2pp (&acc, vec0, vec1);
+   __builtin_mma_xvf16ger2pn (&acc, vec0, vec1);
+   dst[4] = acc;
+ }
+ 
+ void
+ foo4b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_xvf16ger2np (&acc, vec0, vec1);
+   __builtin_mma_xvf16ger2nn (&acc, vec0, vec1);
+   dst[4] = acc;
+ }
+ 
+ void
+ foo5 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvbf16ger2 (&acc, vec0, vec1);
+   __builtin_mma_xvbf16ger2pp (&acc, vec0, vec1);
+   __builtin_mma_xvbf16ger2pn (&acc, vec0, vec1);
+   dst[5] = acc;
+ }
+ 
+ void
+ foo5b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_xvbf16ger2np (&acc, vec0, vec1);
+   __builtin_mma_xvbf16ger2nn (&acc, vec0, vec1);
+   dst[5] = acc;
+ }
+ 
+ void
+ foo6 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvf32ger (&acc, vec0, vec1);
+   __builtin_mma_xvf32gerpp (&acc, vec0, vec1);
+   __builtin_mma_xvf32gerpn (&acc, vec0, vec1);
+   dst[6] = acc;
+ }
+ 
+ void
+ foo6b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_xvf32gernp (&acc, vec0, vec1);
+   __builtin_mma_xvf32gernn (&acc, vec0, vec1);
+   dst[6] = acc;
+ }
+ 
+ void
+ foo7 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvi4ger8 (&acc, vec0, vec1, 15, 15, 255);
+   __builtin_mma_pmxvi4ger8pp (&acc, vec0, vec1, 15, 15, 255);
+   dst[7] = acc;
+ }
+ 
+ void
+ foo8 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvi8ger4 (&acc, vec0, vec1, 15, 15, 15);
+   __builtin_mma_pmxvi8ger4pp (&acc, vec0, vec1, 15, 15, 15);
+   __builtin_mma_pmxvi8ger4spp(&acc, vec0, vec1, 15, 15, 15);
+   dst[8] = acc;
+ }
+ 
+ void
+ foo9 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvi16ger2 (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvi16ger2pp (&acc, vec0, vec1, 15, 15, 3);
+   dst[9] = acc;
+ }
+ 
+ void
+ foo10 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvi16ger2s (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvi16ger2spp (&acc, vec0, vec1, 15, 15, 3);
+   dst[10] = acc;
+ }
+ 
+ void
+ foo11 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvf16ger2 (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvf16ger2pp (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvf16ger2pn (&acc, vec0, vec1, 15, 15, 3);
+   dst[11] = acc;
+ }
+ 
+ void
+ foo11b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_pmxvf16ger2np (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvf16ger2nn (&acc, vec0, vec1, 15, 15, 3);
+   dst[11] = acc;
+ }
+ 
+ void
+ foo12 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvbf16ger2 (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvbf16ger2pp (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvbf16ger2pn (&acc, vec0, vec1, 15, 15, 3);
+   dst[12] = acc;
+ }
+ 
+ void
+ foo12b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_pmxvbf16ger2np (&acc, vec0, vec1, 15, 15, 3);
+   __builtin_mma_pmxvbf16ger2nn (&acc, vec0, vec1, 15, 15, 3);
+   dst[12] = acc;
+ }
+ 
+ void
+ foo13 (__vector_quad *dst, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_pmxvf32ger (&acc, vec0, vec1, 15, 15);
+   __builtin_mma_pmxvf32gerpp (&acc, vec0, vec1, 15, 15);
+   __builtin_mma_pmxvf32gerpn (&acc, vec0, vec1, 15, 15);
+   dst[13] = acc;
+ }
+ 
+ void
+ foo13b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+ {
+   __vector_quad acc;
+   vec_t vec0 = vec[0];
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_pmxvf32gernp (&acc, vec0, vec1, 15, 15);
+   __builtin_mma_pmxvf32gernn (&acc, vec0, vec1, 15, 15);
+   dst[13] = acc;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,59 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-1.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 40 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 12 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 40 } } */
+ /* { dg-final { scan-assembler-times {\mxxmfacc\M} 20 } } */
+ /* { dg-final { scan-assembler-times {\mxxmtacc\M} 6 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvbf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gernn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf32gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2s\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi16ger2spp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi4ger8\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi4ger8pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi8ger4\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi8ger4pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvi8ger4spp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvbf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2nn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2np\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2pn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gernn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf32gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2s\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi16ger2spp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi4ger8\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi4ger8pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi8ger4\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi8ger4pp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvi8ger4spp\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.c	Thu Jan  1 00:00:00 1970
***************
*** 1,21 ****
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char  vec_t __attribute__((vector_size(16)));
- 
- void
- foo (__vector_pair *dst, vec_t *src)
- {
-   __vector_pair pair0, pair1;
-   /* Adjacent loads should be combined into one lxvp instruction
-      and identical build pairs should be combined.  */
-   __builtin_vsx_build_pair (&pair0, src[0], src[1]);
-   __builtin_vsx_build_pair (&pair1, src[0], src[1]);
-   dst[0] = pair0;
-   dst[2] = pair1;
- }
- 
- /* { dg-final { scan-assembler-not {\mlxv\M} } } */
- /* { dg-final { scan-assembler-not {\mstxv\M} } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 2 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-10-pair.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 2 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,15 ----
+ /* Header file for mma-builtin-10-pair.c test - contains test functions only */
+ 
+ typedef unsigned char  vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__vector_pair *dst, vec_t *src)
+ {
+   __vector_pair pair0, pair1;
+   /* Adjacent loads should be combined into one lxvp instruction
+      and identical build pairs should be combined.  */
+   __builtin_vsx_build_pair (&pair0, src[0], src[1]);
+   __builtin_vsx_build_pair (&pair1, src[0], src[1]);
+   dst[0] = pair0;
+   dst[2] = pair1;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-pair.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-10-pair.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 2 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.c	Thu Jan  1 00:00:00 1970
***************
*** 1,23 ****
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char  vec_t __attribute__((vector_size(16)));
- 
- void
- foo (__vector_quad *dst, vec_t *src)
- {
-   __vector_quad quad0, quad1;
-   /* Adjacent loads should be combined into two lxvp instructions.
-      and identical build accs should not be combined.  */
-   __builtin_mma_build_acc (&quad0, src[0], src[1], src[2], src[3]);
-   __builtin_mma_build_acc (&quad1, src[0], src[1], src[2], src[3]);
-   dst[0] = quad0;
-   dst[2] = quad1;
- }
- 
- /* { dg-final { scan-assembler-not {\mlxv\M} } } */
- /* { dg-final { scan-assembler-not {\mstxv\M} } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 4 } } */
- /* { dg-final { scan-assembler-times {\mxxmtacc\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mxxmfacc\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-10-quad.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ // 2 loads compared to 4 in power, since vsx and dmr regs are independent.
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,15 ----
+ /* Header file for mma-builtin-10-quad.c test - contains test functions only */
+ 
+ typedef unsigned char  vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__vector_quad *dst, vec_t *src)
+ {
+   __vector_quad quad0, quad1;
+   /* Adjacent loads should be combined into two lxvp instructions.
+      and identical build accs should not be combined.  */
+   __builtin_mma_build_acc (&quad0, src[0], src[1], src[2], src[3]);
+   __builtin_mma_build_acc (&quad1, src[0], src[1], src[2], src[3]);
+   dst[0] = quad0;
+   dst[2] = quad1;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-10-quad.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-10-quad.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mxxmtacc\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mxxmfacc\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.c	Thu Jan  1 00:00:00 1970
***************
*** 1,72 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char  vec_t __attribute__((vector_size(16)));
- 
- void
- foo0 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp)
- {
-   __vector_quad acc;
-   __vector_pair vecp0 = *pvecp;
-   vec_t vec1 = vec[1];
- 
-   __builtin_mma_xvf64ger (&acc, vecp0, vec1);
-   __builtin_mma_xvf64gerpp (&acc, vecp0, vec1);
-   __builtin_mma_xvf64gerpn (&acc, vecp0, vec1);
-   dst[0] = acc;
- }
- 
- void
- foo1 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp)
- {
-   __vector_quad acc;
-   __vector_pair vecp0 = *pvecp;
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_xvf64gernp (&acc, vecp0, vec1);
-   __builtin_mma_xvf64gernn (&acc, vecp0, vec1);
-   dst[0] = acc;
- }
- 
- void
- foo2 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp)
- {
-   __vector_quad acc;
-   __vector_pair vecp0 = *pvecp;
-   vec_t vec1 = vec[1];
-   __builtin_mma_pmxvf64ger (&acc, vecp0, vec1, 15, 3);
-   __builtin_mma_pmxvf64gerpp (&acc, vecp0, vec1, 15, 3);
-   __builtin_mma_pmxvf64gerpn (&acc, vecp0, vec1, 15, 3);
-   dst[1] = acc;
- }
- 
- void
- foo3 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp)
- {
-   __vector_quad acc;
-   __vector_pair vecp0 = *pvecp;
-   vec_t vec1 = vec[1];
- 
-   acc = src[0];
-   __builtin_mma_pmxvf64gernp (&acc, vecp0, vec1, 15, 3);
-   __builtin_mma_pmxvf64gernn (&acc, vecp0, vec1, 15, 3);
-   dst[1] = acc;
- }
- 
- /* { dg-final { scan-assembler-times {\mxxmfacc\M} 4 } } */
- /* { dg-final { scan-assembler-times {\mxxmtacc\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mlxv\M} 4 } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 8 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 8 } } */
- /* { dg-final { scan-assembler-times {\mxvf64ger\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf64gerpp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf64gerpn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf64gernp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvf64gernn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf64ger\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf64gerpp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf64gerpn\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf64gernp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpmxvf64gernn\M} 1 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-2.h"
+ 
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 8 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 8 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gernn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gernn\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,54 ----
+ /* Header file for mma-builtin-2.c test - contains test functions only */
+ 
+ typedef unsigned char  vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo0 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp)
+ {
+   __vector_quad acc;
+   __vector_pair vecp0 = *pvecp;
+   vec_t vec1 = vec[1];
+ 
+   __builtin_mma_xvf64ger (&acc, vecp0, vec1);
+   __builtin_mma_xvf64gerpp (&acc, vecp0, vec1);
+   __builtin_mma_xvf64gerpn (&acc, vecp0, vec1);
+   dst[0] = acc;
+ }
+ 
+ void
+ foo1 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp)
+ {
+   __vector_quad acc;
+   __vector_pair vecp0 = *pvecp;
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_xvf64gernp (&acc, vecp0, vec1);
+   __builtin_mma_xvf64gernn (&acc, vecp0, vec1);
+   dst[0] = acc;
+ }
+ 
+ void
+ foo2 (__vector_quad *dst, vec_t *vec, __vector_pair *pvecp)
+ {
+   __vector_quad acc;
+   __vector_pair vecp0 = *pvecp;
+   vec_t vec1 = vec[1];
+   __builtin_mma_pmxvf64ger (&acc, vecp0, vec1, 15, 3);
+   __builtin_mma_pmxvf64gerpp (&acc, vecp0, vec1, 15, 3);
+   __builtin_mma_pmxvf64gerpn (&acc, vecp0, vec1, 15, 3);
+   dst[1] = acc;
+ }
+ 
+ void
+ foo3 (__vector_quad *dst, __vector_quad *src, vec_t *vec, __vector_pair *pvecp)
+ {
+   __vector_quad acc;
+   __vector_pair vecp0 = *pvecp;
+   vec_t vec1 = vec[1];
+ 
+   acc = src[0];
+   __builtin_mma_pmxvf64gernp (&acc, vecp0, vec1, 15, 3);
+   __builtin_mma_pmxvf64gernn (&acc, vecp0, vec1, 15, 3);
+   dst[1] = acc;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-2.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,21 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-2.h"
+ 
+ /* { dg-final { scan-assembler-times {\mxxmfacc\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mxxmtacc\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mlxv\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 8 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 8 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvf64gernn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64ger\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gerpp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gerpn\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gernp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpmxvf64gernn\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.c	Thu Jan  1 00:00:00 1970
***************
*** 1,31 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2" } */
- 
- void
- foo0 (void)
- {
-   __vector_quad acc;
-   asm ("#..." : "=d" (acc));
-   __builtin_mma_xxmtacc (&acc);
-   __builtin_mma_xxmfacc (&acc);
-   asm ("#..." :: "d" (acc));
- }
- 
- typedef unsigned char  vec_t __attribute__((vector_size(16)));
- 
- void
- foo1 (vec_t *vec)
- {
-   vec[1] = __builtin_vsx_xvcvspbf16 (vec[0]);
-   vec[3] = __builtin_vsx_xvcvbf16spn (vec[2]);
- }
- 
- /* { dg-final { scan-assembler-times {\mxxmtacc\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxxmfacc\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mlxv\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mstxv\M} 2 } } */
- /* { dg-final { scan-assembler-not {\mlxvp\M} } } */
- /* { dg-final { scan-assembler-not {\mstxvp\M} } } */
- /* { dg-final { scan-assembler-times {\mxvcvspbf16\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mxvcvbf16spn\M} 1 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-3.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 2 } } */
+ /* { dg-final { scan-assembler-not {\mlxvp\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxvp\M} } } */
+ /* { dg-final { scan-assembler-times {\mxvcvspbf16\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvcvbf16spn\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,20 ----
+ /* Header file for mma-builtin-3.c test - contains test functions only */
+ 
+ void
+ foo0 (void)
+ {
+   __vector_quad acc;
+   asm ("#..." : "=d" (acc));
+   __builtin_mma_xxmtacc (&acc);
+   __builtin_mma_xxmfacc (&acc);
+   asm ("#..." :: "d" (acc));
+ }
+ 
+ typedef unsigned char  vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo1 (vec_t *vec)
+ {
+   vec[1] = __builtin_vsx_xvcvspbf16 (vec[0]);
+   vec[3] = __builtin_vsx_xvcvbf16spn (vec[2]);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-3.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-3.h"
+ 
+ /* { dg-final { scan-assembler-times {\mxxmtacc\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxxmfacc\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mlxv\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 2 } } */
+ /* { dg-final { scan-assembler-not {\mlxvp\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxvp\M} } } */
+ /* { dg-final { scan-assembler-times {\mxvcvspbf16\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mxvcvbf16spn\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.c	Thu Jan  1 00:00:00 1970
***************
*** 1,73 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char vec_t __attribute__((vector_size(16)));
- 
- void
- foo (__vector_pair *dst, vec_t *src)
- {
-   __vector_pair pair;
-   __builtin_mma_assemble_pair (&pair, src[0], src[4]);
-   *dst = pair;
- }
- 
- void
- foo2 (__vector_pair *dst, vec_t *src)
- {
-   __vector_pair pair;
-   __builtin_vsx_assemble_pair (&pair, src[0], src[4]);
-   *dst = pair;
- }
- 
- void
- foo3 (__vector_pair *dst, vec_t *src)
- {
-   __vector_pair pair;
-   __builtin_vsx_build_pair (&pair, src[4], src[0]);
-   *dst = pair;
- }
- 
- void
- bar (vec_t *dst, __vector_pair *src)
- {
-   vec_t res[2];
-   __builtin_mma_disassemble_pair (res, src);
-   dst[0] = res[0];
-   dst[4] = res[1];
- }
- 
- void
- bar2 (vec_t *dst, __vector_pair *src)
- {
-   vec_t res[2];
-   __builtin_vsx_disassemble_pair (res, src);
-   dst[0] = res[0];
-   dst[4] = res[1];
- }
- 
- #if !__has_builtin (__builtin_vsx_assemble_pair)
- #  error "__has_builtin (__builtin_vsx_assemble_pair) failed"
- #endif
- 
- #if !__has_builtin (__builtin_vsx_disassemble_pair)
- #  error "__has_builtin (__builtin_vsx_disassemble_pair) failed"
- #endif
- 
- #if !__has_builtin (__builtin_mma_assemble_pair)
- #  error "__has_builtin (__builtin_mma_assemble_pair) failed"
- #endif
- 
- #if !__has_builtin (__builtin_mma_disassemble_pair)
- #  error "__has_builtin (__builtin_mma_disassemble_pair) failed"
- #endif
- 
- #if !__has_builtin (__builtin_vsx_build_pair)
- #  error "__has_builtin (__builtin_vsx_build_pair) failed"
- #endif
- 
- /* { dg-final { scan-assembler-times {\mlxv\M} 6 } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
- 
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-4.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 6 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,65 ----
+ /* Header file for mma-builtin-4.c test - contains test functions only */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__vector_pair *dst, vec_t *src)
+ {
+   __vector_pair pair;
+   __builtin_mma_assemble_pair (&pair, src[0], src[4]);
+   *dst = pair;
+ }
+ 
+ void
+ foo2 (__vector_pair *dst, vec_t *src)
+ {
+   __vector_pair pair;
+   __builtin_vsx_assemble_pair (&pair, src[0], src[4]);
+   *dst = pair;
+ }
+ 
+ void
+ foo3 (__vector_pair *dst, vec_t *src)
+ {
+   __vector_pair pair;
+   __builtin_vsx_build_pair (&pair, src[4], src[0]);
+   *dst = pair;
+ }
+ 
+ void
+ bar (vec_t *dst, __vector_pair *src)
+ {
+   vec_t res[2];
+   __builtin_mma_disassemble_pair (res, src);
+   dst[0] = res[0];
+   dst[4] = res[1];
+ }
+ 
+ void
+ bar2 (vec_t *dst, __vector_pair *src)
+ {
+   vec_t res[2];
+   __builtin_vsx_disassemble_pair (res, src);
+   dst[0] = res[0];
+   dst[4] = res[1];
+ }
+ 
+ #if !__has_builtin (__builtin_vsx_assemble_pair)
+ #  error "__has_builtin (__builtin_vsx_assemble_pair) failed"
+ #endif
+ 
+ #if !__has_builtin (__builtin_vsx_disassemble_pair)
+ #  error "__has_builtin (__builtin_vsx_disassemble_pair) failed"
+ #endif
+ 
+ #if !__has_builtin (__builtin_mma_assemble_pair)
+ #  error "__has_builtin (__builtin_mma_assemble_pair) failed"
+ #endif
+ 
+ #if !__has_builtin (__builtin_mma_disassemble_pair)
+ #  error "__has_builtin (__builtin_mma_disassemble_pair) failed"
+ #endif
+ 
+ #if !__has_builtin (__builtin_vsx_build_pair)
+ #  error "__has_builtin (__builtin_vsx_build_pair) failed"
+ #endif
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-4.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-4.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 6 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.c	Thu Jan  1 00:00:00 1970
***************
*** 1,47 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char vec_t __attribute__((vector_size(16)));
- 
- void
- foo (__vector_quad *dst, vec_t *src)
- {
-   __vector_quad acc;
-   __builtin_mma_assemble_acc (&acc, src[0], src[4], src[8], src[12]);
-   *dst = acc;
- }
- 
- void
- foo2 (__vector_quad *dst, vec_t *src)
- {
-   __vector_quad acc;
-   __builtin_mma_build_acc (&acc, src[12], src[8], src[4], src[0]);
-   *dst = acc;
- }
- 
- void
- bar (vec_t *dst, __vector_quad *src)
- {
-   vec_t res[4];
-   __builtin_mma_disassemble_acc (res, src);
-   dst[0] = res[0];
-   dst[4] = res[1];
-   dst[8] = res[2];
-   dst[12] = res[3];
- }
- 
- #if !__has_builtin (__builtin_mma_assemble_acc)
- #  error "__has_builtin (__builtin_mma_assemble_acc) failed"
- #endif
- 
- #if !__has_builtin (__builtin_mma_build_acc)
- #  error "__has_builtin (__builtin_mma_build_acc) failed"
- #endif
- 
- /* { dg-final { scan-assembler-times {\mlxv\M} 8 } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
- /* { dg-final { scan-assembler-times {\mxxmfacc\M} 3 } } */
- /* { dg-final { scan-assembler-times {\mxxmtacc\M} 3 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-5.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 8 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,38 ----
+ /* Header file for mma-builtin-5.c test - contains test functions only */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__vector_quad *dst, vec_t *src)
+ {
+   __vector_quad acc;
+   __builtin_mma_assemble_acc (&acc, src[0], src[4], src[8], src[12]);
+   *dst = acc;
+ }
+ 
+ void
+ foo2 (__vector_quad *dst, vec_t *src)
+ {
+   __vector_quad acc;
+   __builtin_mma_build_acc (&acc, src[12], src[8], src[4], src[0]);
+   *dst = acc;
+ }
+ 
+ void
+ bar (vec_t *dst, __vector_quad *src)
+ {
+   vec_t res[4];
+   __builtin_mma_disassemble_acc (res, src);
+   dst[0] = res[0];
+   dst[4] = res[1];
+   dst[8] = res[2];
+   dst[12] = res[3];
+ }
+ 
+ #if !__has_builtin (__builtin_mma_assemble_acc)
+ #  error "__has_builtin (__builtin_mma_assemble_acc) failed"
+ #endif
+ 
+ #if !__has_builtin (__builtin_mma_build_acc)
+ #  error "__has_builtin (__builtin_mma_build_acc) failed"
+ #endif
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-5.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-5.h"
+ 
+ /* { dg-final { scan-assembler-times {\mlxv\M} 8 } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxv\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
+ /* { dg-final { scan-assembler-times {\mxxmfacc\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mxxmtacc\M} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.c	Thu Jan  1 00:00:00 1970
***************
*** 1,20 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2" } */
- 
- void
- foo (__vector_quad *dst)
- {
-   __vector_quad acc0, acc1;
-   __builtin_mma_xxsetaccz (&acc0);
-   __builtin_mma_xxsetaccz (&acc1);
-   dst[0] = acc0;
-   dst[1] = acc1;
- }
- 
- /* { dg-final { scan-assembler-not {\mlxv\M} } } */
- /* { dg-final { scan-assembler-not {\mlxvp\M} } } */
- /* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */
- /* { dg-final { scan-assembler-times {\mxxsetaccz\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mxxmfacc\M} 2 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-6.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mlxvp\M} } } */
+ /* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */
+ /* { dg-final { scan-assembler-times {\mxxsetaccz\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,11 ----
+ /* Header file for mma-builtin-6.c test - contains test functions only */
+ 
+ void
+ foo (__vector_quad *dst)
+ {
+   __vector_quad acc0, acc1;
+   __builtin_mma_xxsetaccz (&acc0);
+   __builtin_mma_xxsetaccz (&acc1);
+   dst[0] = acc0;
+   dst[1] = acc1;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-6.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-Wno-psabi -mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-6.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mlxvp\M} } } */
+ /* { dg-final { scan-assembler-not {\mxxmtacc\M} } } */
+ /* { dg-final { scan-assembler-times {\mxxsetaccz\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mxxmfacc\M} 2 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 4 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.c	Thu Jan  1 00:00:00 1970
***************
*** 1,26 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- void
- foo (__vector_pair *dst, __vector_pair *src, long idx)
- {
-   dst[0] = __builtin_vsx_lxvp (0, src);
-   dst[2] = __builtin_vsx_lxvp (32, src);
-   dst[4] = __builtin_vsx_lxvp (64, src);
-   /* Non-constant offset should generate a lxvpx.  */
-   dst[6] = __builtin_vsx_lxvp (idx, src);
-   /* Non-aligned offset should generate a plxvp.  */
-   dst[8] = __builtin_vsx_lxvp (257, src);
- }
- 
- #if !__has_builtin (__builtin_vsx_lxvp)
- #  error "__has_builtin (__builtin_vsx_lxvp) failed"
- #endif
- 
- /* { dg-final { scan-assembler-not {\mlxv\M} } } */
- /* { dg-final { scan-assembler-not {\mstxv\M} } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */
- /* { dg-final { scan-assembler-times {\mlxvpx\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mplxvp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 5 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-7.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mlxvpx\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mplxvp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 5 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,17 ----
+ /* Header file for mma-builtin-7.c test - contains test functions only */
+ 
+ void
+ foo (__vector_pair *dst, __vector_pair *src, long idx)
+ {
+   dst[0] = __builtin_vsx_lxvp (0, src);
+   dst[2] = __builtin_vsx_lxvp (32, src);
+   dst[4] = __builtin_vsx_lxvp (64, src);
+   /* Non-constant offset should generate a lxvpx.  */
+   dst[6] = __builtin_vsx_lxvp (idx, src);
+   /* Non-aligned offset should generate a plxvp.  */
+   dst[8] = __builtin_vsx_lxvp (257, src);
+ }
+ 
+ #if !__has_builtin (__builtin_vsx_lxvp)
+ #  error "__has_builtin (__builtin_vsx_lxvp) failed"
+ #endif
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-7.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-7.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mlxvpx\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mplxvp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 5 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.c	Thu Jan  1 00:00:00 1970
***************
*** 1,27 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- void
- foo (__vector_pair *dst, __vector_pair *src, long idx)
- {
-   __vector_pair pair = *src;
-   __builtin_vsx_stxvp (pair, 0, dst);
-   __builtin_vsx_stxvp (pair, 32, dst);
-   __builtin_vsx_stxvp (pair, 64, dst);
-   /* Non-constant offset should generate a stxvpx.  */
-   __builtin_vsx_stxvp (pair, idx, dst);
-   /* Non-aligned offset should generate a pstxvp.  */
-   __builtin_vsx_stxvp (pair, 257, dst);
- }
- 
- #if !__has_builtin (__builtin_vsx_stxvp)
- #  error "__has_builtin (__builtin_vsx_stxvp) failed"
- #endif
- 
- /* { dg-final { scan-assembler-not {\mlxv\M} } } */
- /* { dg-final { scan-assembler-not {\mstxv\M} } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
- /* { dg-final { scan-assembler-times {\mstxvpx\M} 1 } } */
- /* { dg-final { scan-assembler-times {\mpstxvp\M} 1 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-8.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mstxvpx\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpstxvp\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,18 ----
+ /* Header file for mma-builtin-8.c test - contains test functions only */
+ 
+ void
+ foo (__vector_pair *dst, __vector_pair *src, long idx)
+ {
+   __vector_pair pair = *src;
+   __builtin_vsx_stxvp (pair, 0, dst);
+   __builtin_vsx_stxvp (pair, 32, dst);
+   __builtin_vsx_stxvp (pair, 64, dst);
+   /* Non-constant offset should generate a stxvpx.  */
+   __builtin_vsx_stxvp (pair, idx, dst);
+   /* Non-aligned offset should generate a pstxvp.  */
+   __builtin_vsx_stxvp (pair, 257, dst);
+ }
+ 
+ #if !__has_builtin (__builtin_vsx_stxvp)
+ #  error "__has_builtin (__builtin_vsx_stxvp) failed"
+ #endif
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-8.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-8.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mstxvpx\M} 1 } } */
+ /* { dg-final { scan-assembler-times {\mpstxvp\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.c	Thu Jan  1 00:00:00 1970
***************
*** 1,28 ****
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- typedef unsigned char  vec_t __attribute__((vector_size(16)));
- 
- void
- foo (__vector_pair *dst, vec_t *src)
- {
-   __vector_pair pair;
-   /* Adjacent loads should be combined into one lxvp instruction.  */
-   __builtin_vsx_build_pair (&pair, src[0], src[1]);
-   *dst = pair;
- }
- 
- void
- bar (__vector_quad *dst, vec_t *src)
- {
-   __vector_quad quad;
-   /* Adjacent loads should be combined into two lxvp instructions.  */
-   __builtin_mma_build_acc (&quad, src[0], src[1], src[2], src[3]);
-   *dst = quad;
- }
- 
- /* { dg-final { scan-assembler-not {\mlxv\M} } } */
- /* { dg-final { scan-assembler-not {\mstxv\M} } } */
- /* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */
- /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "mma-builtin-9.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,21 ----
+ /* Header file for mma-builtin-9.c test - contains test functions only */
+ 
+ typedef unsigned char  vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__vector_pair *dst, vec_t *src)
+ {
+   __vector_pair pair;
+   /* Adjacent loads should be combined into one lxvp instruction.  */
+   __builtin_vsx_build_pair (&pair, src[0], src[1]);
+   *dst = pair;
+ }
+ 
+ void
+ bar (__vector_quad *dst, vec_t *src)
+ {
+   __vector_quad quad;
+   /* Adjacent loads should be combined into two lxvp instructions.  */
+   __builtin_mma_build_acc (&quad, src[0], src[1], src[2], src[3]);
+   *dst = quad;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/mma-builtin-9.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "mma-builtin-9.h"
+ 
+ /* { dg-final { scan-assembler-not {\mlxv\M} } } */
+ /* { dg-final { scan-assembler-not {\mstxv\M} } } */
+ /* { dg-final { scan-assembler-times {\mlxvp\M} 3 } } */
+ /* { dg-final { scan-assembler-times {\mstxvp\M} 3 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/nodmf-xxacc.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/nodmf-xxacc.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/nodmf-xxacc.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/nodmf-xxacc.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-mdejagnu-cpu=future -O2 -mno-dense-math" } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ 
+ void
+ foo (__vector_quad *acc)
+ {
+   __builtin_mma_xxmtacc (acc);
+ }
+ 
+ void
+ bar (__vector_quad *acc)
+ {
+   __builtin_mma_xxmfacc (acc);
+ }
+ 
+ /* { dg-final { scan-assembler {\mxxmtacc\M} } } */
+ /* { dg-final { scan-assembler {\mxxmfacc\M} } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.c	Thu Jan  1 00:00:00 1970
***************
*** 1,24 ****
- /* PR target/100777 */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-require-effective-target fopenmp } */
- /* { dg-options "-O1 -mdejagnu-cpu=power10 -fopenmp" } */
- 
- /* Verify we do not ICE on the following.  */
- 
- void
- foo (__vector_quad *dst)
- {
- #pragma omp parallel
-   {
-     __builtin_mma_xxsetaccz (dst);
-   }
- }
- 
- void
- bar (__vector_quad *dst, __vector_quad *src)
- {
- #pragma omp parallel
-   {
-     __builtin_mma_disassemble_acc (dst, src);
-   }
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-require-effective-target fopenmp } */
+ /* { dg-options "-O1 -mdejagnu-cpu=future -fopenmp" } */
+ 
+ #include "pr100777.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,23 ----
+ /* Header file for pr100777.c test - contains test functions only */
+ 
+ /* PR target/100777 */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ void
+ foo (__vector_quad *dst)
+ {
+ #pragma omp parallel
+   {
+     __builtin_mma_xxsetaccz (dst);
+   }
+ }
+ 
+ void
+ bar (__vector_quad *dst, __vector_quad *src)
+ {
+ #pragma omp parallel
+   {
+     __builtin_mma_disassemble_acc (dst, src);
+   }
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr100777.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr100777.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-require-effective-target fopenmp } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr100777.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.c	Thu Jan  1 00:00:00 1970
***************
*** 1,22 ****
- /* PR target/101849 */
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Verify we do not ICE on the tests below.  */
- 
- void
- foo (__vector_pair *dst, double *x, long offset)
- {
-   dst[0] = __builtin_vsx_lxvp (0, (__vector_pair *)(void *)x);
-   dst[1] = __builtin_vsx_lxvp (32, (__vector_pair *)(void *)x);
-   dst[2] = __builtin_vsx_lxvp (offset, (__vector_pair *)(void *)x);
- }
- 
- void
- bar (__vector_pair *src, double *x, long offset)
- {
-   __builtin_vsx_stxvp (src[0], 0, (__vector_pair *)(void *)x);
-   __builtin_vsx_stxvp (src[1], 32, (__vector_pair *)(void *)x);
-   __builtin_vsx_stxvp (src[2], offset, (__vector_pair *)(void *)x);
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr101849.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,21 ----
+ /* Header file for pr101849.c test - contains test functions only */
+ 
+ /* PR target/101849 */
+ 
+ /* Verify we do not ICE on the tests below.  */
+ 
+ void
+ foo (__vector_pair *dst, double *x, long offset)
+ {
+   dst[0] = __builtin_vsx_lxvp (0, (__vector_pair *)(void *)x);
+   dst[1] = __builtin_vsx_lxvp (32, (__vector_pair *)(void *)x);
+   dst[2] = __builtin_vsx_lxvp (offset, (__vector_pair *)(void *)x);
+ }
+ 
+ void
+ bar (__vector_pair *src, double *x, long offset)
+ {
+   __builtin_vsx_stxvp (src[0], 0, (__vector_pair *)(void *)x);
+   __builtin_vsx_stxvp (src[1], 32, (__vector_pair *)(void *)x);
+   __builtin_vsx_stxvp (src[2], offset, (__vector_pair *)(void *)x);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr101849.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr101849.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr101849.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.c	Thu Jan  1 00:00:00 1970
***************
*** 1,14 ****
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- #include <altivec.h>
- void
- bug (__vector_pair *dst)
- {
-   register vector unsigned char vec0 asm ("vs44");
-   register vector unsigned char vec1 asm ("vs32");
-   __builtin_vsx_build_pair (dst, vec0, vec1);
- }
- 
- /* { dg-final { scan-assembler-times {(?p)\mxxlor \d+,44,44\M} 1 } } */
- /* { dg-final { scan-assembler-times {(?p)\mxxlor \d+,32,32\M} 1 } } */
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,7 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr102976.h"
+ 
+ /* { dg-final { scan-assembler-times {(?p)\mxxlor \d+,44,44\M} 1 } } */
+ /* { dg-final { scan-assembler-times {(?p)\mxxlor \d+,32,32\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,10 ----
+ /* Header file for pr102976.c test - contains test functions only */
+ 
+ #include <altivec.h>
+ void
+ bug (__vector_pair *dst)
+ {
+   register vector unsigned char vec0 asm ("vs44");
+   register vector unsigned char vec1 asm ("vs32");
+   __builtin_vsx_build_pair (dst, vec0, vec1);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr102976.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr102976.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,7 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr102976.h"
+ 
+ /* { dg-final { scan-assembler-times {(?p)\mxxlor \d+,44,44\M} 1 } } */
+ /* { dg-final { scan-assembler-times {(?p)\mxxlor \d+,32,32\M} 1 } } */
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.c	Thu Jan  1 00:00:00 1970
***************
*** 1,19 ****
- /* PR target/103127 */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10 -ftrivial-auto-var-init=zero" } */
- 
- /* Verify we do not ICE on the following tests.  */
- 
- void
- foo (__vector_quad *dst)
- {
-   __vector_quad acc;
-   *dst = acc;
- }
- 
- void
- bar (__vector_pair *dst)
- {
-   __vector_pair pair;
-   *dst = pair;
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future -ftrivial-auto-var-init=zero" } */
+ 
+ #include "pr103127.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,19 ----
+ /* Header file for pr103127.c test - contains test functions only */
+ 
+ /* PR target/103127 */
+ 
+ /* Verify we do not ICE on the following tests.  */
+ 
+ void
+ foo (__vector_quad *dst)
+ {
+   __vector_quad acc;
+   *dst = acc;
+ }
+ 
+ void
+ bar (__vector_pair *dst)
+ {
+   __vector_pair pair;
+   *dst = pair;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103127.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103127.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math -ftrivial-auto-var-init=zero" } */
+ 
+ #include "pr103127.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103627-1.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103627-1.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr103627-1.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr103627-1.c	Thu Jan  1 00:00:00 1970
***************
*** 1,16 ****
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -mno-vsx" } */
- 
- /* Verify compiler emits error message instead of ICE.  */
- 
- extern float *dest;
- extern __vector_quad src;
- 
- int
- foo ()
- {
-   __builtin_mma_disassemble_acc (dest, &src);
-   /* { dg-error "'__builtin_mma_disassemble_acc' requires the '-mmma' option" "" { target *-*-* } .-1 } */
-   return 0;
- }
- 
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.c	Thu Jan  1 00:00:00 1970
***************
*** 1,21 ****
- /* PR target/104923 */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Make sure we do not ICE on the following test cases.  */
- 
- void
- foo (__vector char *dst, __vector_quad *acc, unsigned int n)
- {
-   __vector char a[4];
-   __builtin_mma_disassemble_acc(a, acc);
-   dst[2 * n] = a[0];
- }
- 
- void
- bar (__vector char *dst, __vector_quad *acc, unsigned int n)
- {
-   __vector char a[4];
-   __builtin_mma_disassemble_acc(a, acc);
-   dst[3 * n] = a[0];
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr104923.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,21 ----
+ /* Header file for pr104923.c test - contains test functions only */
+ 
+ /* PR target/104923 */
+ 
+ /* Make sure we do not ICE on the following test cases.  */
+ 
+ void
+ foo (__vector char *dst, __vector_quad *acc, unsigned int n)
+ {
+   __vector char a[4];
+   __builtin_mma_disassemble_acc(a, acc);
+   dst[2 * n] = a[0];
+ }
+ 
+ void
+ bar (__vector char *dst, __vector_quad *acc, unsigned int n)
+ {
+   __vector char a[4];
+   __builtin_mma_disassemble_acc(a, acc);
+   dst[3 * n] = a[0];
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr104923.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr104923.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -mno-dense-math" } */
+ 
+ #include "pr104923.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.c	Thu Jan  1 00:00:00 1970
***************
*** 1,14 ****
- /* PR target/106016 */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Make sure we do not ICE on the following test case.  */
- 
- extern void bar (__vector_quad *);
- 
- void
- foo (__vector_quad *a, __vector_quad *b)
- {
-   __vector_quad arr[2] = {*a, *b};
-   bar (&arr[0]);
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr106016.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,14 ----
+ /* Header file for pr106016.c test - contains test functions only */
+ 
+ /* PR target/106016 */
+ 
+ /* Make sure we do not ICE on the following test case.  */
+ 
+ extern void bar (__vector_quad *);
+ 
+ void
+ foo (__vector_quad *a, __vector_quad *b)
+ {
+   __vector_quad arr[2] = {*a, *b};
+   bar (&arr[0]);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106016.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106016.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -mno-dense-math" } */
+ 
+ #include "pr106016.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.c	Thu Jan  1 00:00:00 1970
***************
*** 1,19 ****
- /* PR target/106017 */
- /* { dg-options "-O1 -mdejagnu-cpu=power10" } */
- /* { dg-require-effective-target power10_ok } */
- 
- /* Make sure we do not flag any errors on the following test cases.  */
- 
- void takeacc(__vector_quad *);
- void
- foo (void)
- {
-   __vector_quad arr[4];
-   takeacc (arr);
- }
- 
- unsigned char *
- bar (__vector_quad *a)
- {
-   return (unsigned char *)a;
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-options "-O1 -mdejagnu-cpu=future" } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ 
+ #include "pr106017.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,19 ----
+ /* Header file for pr106017.c test - contains test functions only */
+ 
+ /* PR target/106017 */
+ 
+ /* Make sure we do not flag any errors on the following test cases.  */
+ 
+ void takeacc(__vector_quad *);
+ void
+ foo (void)
+ {
+   __vector_quad arr[4];
+   takeacc (arr);
+ }
+ 
+ unsigned char *
+ bar (__vector_quad *a)
+ {
+   return (unsigned char *)a;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106017.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106017.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-options "-O1 -mdejagnu-cpu=power10 -mno-dense-math" } */
+ /* { dg-require-effective-target power10_ok } */
+ 
+ #include "pr106017.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.c	Thu Jan  1 00:00:00 1970
***************
*** 1,14 ****
- /* { dg-do link } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-require-effective-target lto } */
- /* { dg-options "-flto -mdejagnu-cpu=power10" } */
- 
- /* Verify there is no ICE in LTO mode.  */
- 
- int main ()
- {
-   float *b;
-   const __vector_quad c;
-   __builtin_mma_disassemble_acc (b, &c);
-   return 0;
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do link } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-require-effective-target lto } */
+ /* { dg-options "-flto -mdejagnu-cpu=future" } */
+ 
+ #include "pr106833.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,11 ----
+ /* Header file for pr106833.c test - contains test functions only */
+ 
+ /* Verify there is no ICE in LTO mode.  */
+ 
+ int main ()
+ {
+   float *b;
+   const __vector_quad c;
+   __builtin_mma_disassemble_acc (b, &c);
+   return 0;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr106833.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr106833.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,6 ----
+ /* { dg-do link } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-require-effective-target lto } */
+ /* { dg-options "-flto -mdejagnu-cpu=power10 -mno-dense-math" } */
+ 
+ #include "pr106833.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.c	Thu Jan  1 00:00:00 1970
***************
*** 1,12 ****
- /* PR target/110411 */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Verify we do not ICE on the following.  */
- 
- void
- bug (__vector_quad *dst)
- {
-   dst = (__vector_quad *)((unsigned long)dst & ~0xFUL);
-   __builtin_mma_xxsetaccz (dst);
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr110411-2.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,12 ----
+ /* Header file for pr110411-2.c test - contains test functions only */
+ 
+ /* PR target/110411 */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ void
+ bug (__vector_quad *dst)
+ {
+   dst = (__vector_quad *)((unsigned long)dst & ~0xFUL);
+   __builtin_mma_xxsetaccz (dst);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr110411-2.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr110411-2.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=power10 -mno-dense-math" } */
+ 
+ #include "pr110411-2.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr124637.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr124637.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr124637.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr124637.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile { target { powerpc64-*-* } } } */
+ /* { dg-options "-O2 -m64 -mbig-endian" } */
+ 
+ typedef struct {
+     unsigned short a;
+     unsigned short b;
+     unsigned short c;
+ } S_t;
+ 
+ static const S_t m1 = { 0x20, 1, 1 };
+ 
+ void ext(S_t r);
+ void foo() { ext(m1); }
+ 
+ /* Apologies in advance that these may be a little fragile.  */
+ 
+ /* { dg-final { scan-assembler "lis 3,0x20" } } */
+ /* { dg-final { scan-assembler "ori 3,3,0x1" } } */
+ /* { dg-final { scan-assembler "sldi 3,3,16" } } */
+ /* { dg-final { scan-assembler "ori 3,3,0x1" } } */
+ 
+ /* { dg-final { scan-assembler-not "lis 9,0x20" } } */
+ /* { dg-final { scan-assembler-not "ori 9,9,0x1" } } */
+ /* { dg-final { scan-assembler-not "lis 3,0x1" } } */
+ /* { dg-final { scan-assembler-not "rldimi 3,9,32,0" } } */
+ 
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.c	Thu Jan  1 00:00:00 1970
***************
*** 1,16 ****
- /* PR target/96466 */
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- /* Verify we do not ICE on the following.  */
- 
- extern void bar0 (void);
- void
- foo0 (__vector_quad *dst)
- {
-   __vector_quad acc;
-   __builtin_mma_xxsetaccz (&acc);
-   bar0 ();
-   *dst = acc;
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "pr96446.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,15 ----
+ /* Header file for pr96446.c test - contains test functions only */
+ 
+ /* PR target/96466 */
+ 
+ /* Verify we do not ICE on the following.  */
+ 
+ extern void bar0 (void);
+ void
+ foo0 (__vector_quad *dst)
+ {
+   __vector_quad acc;
+   __builtin_mma_xxsetaccz (&acc);
+   bar0 ();
+   *dst = acc;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96446.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96446.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr96446.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.c	Thu Jan  1 00:00:00 1970
***************
*** 1,20 ****
- /* PR target/96530 */
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-mdejagnu-cpu=power10 -O2" } */
- 
- /* Verify we do not reject bar() below due to the typedef.  */
- 
- typedef __vector_quad vquad_t;
- 
- void
- foo (__vector_quad *dst)
- {
-   __builtin_mma_xxsetaccz (dst);
- }
- 
- void
- bar (vquad_t *dst)
- {
-   __builtin_mma_xxsetaccz (dst);
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-mdejagnu-cpu=future -O2" } */
+ 
+ #include "pr96530.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,19 ----
+ /* Header file for pr96530.c test - contains test functions only */
+ 
+ /* PR target/96530 */
+ 
+ /* Verify we do not reject bar() below due to the typedef.  */
+ 
+ typedef __vector_quad vquad_t;
+ 
+ void
+ foo (__vector_quad *dst)
+ {
+   __builtin_mma_xxsetaccz (dst);
+ }
+ 
+ void
+ bar (vquad_t *dst)
+ {
+   __builtin_mma_xxsetaccz (dst);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96530.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96530.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr96530.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.c	Thu Jan  1 00:00:00 1970
***************
*** 1,59 ****
- /* PR target/96808 */
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Verify we do not ICE on the tests below.  */
- 
- void
- old_ok (__vector_quad *dst, vector unsigned char vc)
- {
-   __vector_quad vq;
-   __builtin_mma_xxsetaccz(&vq);
-   __builtin_mma_xvf32gerpp(&vq, vc, vc);
-   *dst = vq;
- }
- 
- void
- test0 (__vector_quad *dst, vector unsigned char vc)
- {
-   __vector_quad vq[2];
-   __builtin_mma_xxsetaccz(&vq[1]);
-   __builtin_mma_xvf32gerpp(&vq[1], vc, vc);
-   *dst = vq[1];
- }
- 
- void
- test1 (__vector_quad *dst, vector unsigned char vc)
- {
-   __vector_quad vq[2][2];
-   __builtin_mma_xxsetaccz(&vq[1][1]);
-   __builtin_mma_xvf32gerpp(&vq[1][1], vc, vc);
-   *dst = vq[1][1];
- }
- 
- void
- test2 (__vector_quad *dst, vector unsigned char vc)
- {
-   struct {
-     __vector_quad dummy;
-     __vector_quad acc;
-   } vq;
-   __builtin_mma_xxsetaccz(&vq.acc);
-   __builtin_mma_xvf32gerpp(&vq.acc, vc, vc);
-   *dst = vq.acc;
- }
- 
- void
- test3 (__vector_quad *dst, vector unsigned char vc)
- {
-   __builtin_mma_xxsetaccz(&dst[1]);
-   __builtin_mma_xvf32gerpp(&dst[1], vc, vc);
- }
- 
- void
- test4 (__vector_quad *dst[], vector unsigned char vc)
- {
-   __builtin_mma_xxsetaccz(&dst[1][2]);
-   __builtin_mma_xvf32gerpp(&dst[1][2], vc, vc);
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr96808.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,58 ----
+ /* Header file for pr96808.c test - contains test functions only */
+ 
+ /* PR target/96808 */
+ 
+ /* Verify we do not ICE on the tests below.  */
+ 
+ void
+ old_ok (__vector_quad *dst, vector unsigned char vc)
+ {
+   __vector_quad vq;
+   __builtin_mma_xxsetaccz(&vq);
+   __builtin_mma_xvf32gerpp(&vq, vc, vc);
+   *dst = vq;
+ }
+ 
+ void
+ test0 (__vector_quad *dst, vector unsigned char vc)
+ {
+   __vector_quad vq[2];
+   __builtin_mma_xxsetaccz(&vq[1]);
+   __builtin_mma_xvf32gerpp(&vq[1], vc, vc);
+   *dst = vq[1];
+ }
+ 
+ void
+ test1 (__vector_quad *dst, vector unsigned char vc)
+ {
+   __vector_quad vq[2][2];
+   __builtin_mma_xxsetaccz(&vq[1][1]);
+   __builtin_mma_xvf32gerpp(&vq[1][1], vc, vc);
+   *dst = vq[1][1];
+ }
+ 
+ void
+ test2 (__vector_quad *dst, vector unsigned char vc)
+ {
+   struct {
+     __vector_quad dummy;
+     __vector_quad acc;
+   } vq;
+   __builtin_mma_xxsetaccz(&vq.acc);
+   __builtin_mma_xvf32gerpp(&vq.acc, vc, vc);
+   *dst = vq.acc;
+ }
+ 
+ void
+ test3 (__vector_quad *dst, vector unsigned char vc)
+ {
+   __builtin_mma_xxsetaccz(&dst[1]);
+   __builtin_mma_xvf32gerpp(&dst[1], vc, vc);
+ }
+ 
+ void
+ test4 (__vector_quad *dst[], vector unsigned char vc)
+ {
+   __builtin_mma_xxsetaccz(&dst[1][2]);
+   __builtin_mma_xvf32gerpp(&dst[1][2], vc, vc);
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr96808.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr96808.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr96808.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.c	Thu Jan  1 00:00:00 1970
***************
*** 1,18 ****
- /* PR target/97360 */
- /* { dg-do compile } */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Verify we do not ICE on the test below.  */
- 
- typedef unsigned char vec_t __attribute__((vector_size(16)));
- 
- void
- foo (__vector_quad *dst, __vector_pair *vpair, vec_t *vec)
- {
-   __vector_quad acc = *dst;
-   for (;;)
-     {
-       __builtin_mma_xvf64gerpp(&acc, *vpair, vec[7]);
-     }
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr97360.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,17 ----
+ /* Header file for pr97360.c test - contains test functions only */
+ 
+ /* PR target/97360 */
+ 
+ /* Verify we do not ICE on the test below.  */
+ 
+ typedef unsigned char vec_t __attribute__((vector_size(16)));
+ 
+ void
+ foo (__vector_quad *dst, __vector_pair *vpair, vec_t *vec)
+ {
+   __vector_quad acc = *dst;
+   for (;;)
+     {
+       __builtin_mma_xvf64gerpp(&acc, *vpair, vec[7]);
+     }
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr97360.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr97360.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,5 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr97360.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.c	Sat Jul 18 22:32:15 2026
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.c	Thu Jan  1 00:00:00 1970
***************
*** 1,19 ****
- /* PR target/98872 */
- /* { dg-require-effective-target power10_ok } */
- /* { dg-options "-O2 -mdejagnu-cpu=power10" } */
- 
- /* Verify we do not ICE on the following tests.  */
- 
- void
- foo (__vector_quad *dst)
- {
-   __vector_quad acc;
-   *dst = acc;
- }
- 
- void
- bar (__vector_pair *dst)
- {
-   __vector_pair pair;
-   *dst = pair;
- }
--- 0 ----
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.dmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.dmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.dmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.dmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target powerpc_future_compile_ok } */
+ /* { dg-options "-O2 -mdejagnu-cpu=future" } */
+ 
+ #include "pr98872.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.h gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.h
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.h	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,19 ----
+ /* Header file for pr98872.c test - contains test functions only */
+ 
+ /* PR target/98872 */
+ 
+ /* Verify we do not ICE on the following tests.  */
+ 
+ void
+ foo (__vector_quad *dst)
+ {
+   __vector_quad acc;
+   *dst = acc;
+ }
+ 
+ void
+ bar (__vector_pair *dst)
+ {
+   __vector_pair pair;
+   *dst = pair;
+ }
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.nodmf.c gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.nodmf.c
*** gcc-16-20260718/gcc/testsuite/gcc.target/powerpc/pr98872.nodmf.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gcc.target/powerpc/pr98872.nodmf.c	Sat Jul 25 22:32:15 2026
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-require-effective-target power10_ok } */
+ /* { dg-options "-mdejagnu-cpu=power10 -O2 -mno-dense-math" } */
+ 
+ #include "pr98872.h"
diff -Nrcpad gcc-16-20260718/gcc/testsuite/gfortran.dg/contiguous_17.f90 gcc-16-20260725/gcc/testsuite/gfortran.dg/contiguous_17.f90
*** gcc-16-20260718/gcc/testsuite/gfortran.dg/contiguous_17.f90	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/gcc/testsuite/gfortran.dg/contiguous_17.f90	Sat Jul 25 22:32:16 2026
***************
*** 0 ****
--- 1,229 ----
+ ! { dg-do run }
+ !
+ ! PR fortran/125998
+ ! Check the correct passing of a transposed array to an assumed-shape dummy
+ ! having the contiguous and target attributes.
+ !
+ ! Original testcase from Federico Perini <federico.perini@gmail.com>
+ 
+ subroutine original
+     real(8) :: a(3,4)
+     integer :: dims(2)           
+     character(48) :: iomsg  
+     call show(transpose(a),dims)
+     if (any(dims/=shape(transpose(a)))) then 
+         write(iomsg,1) 'invalid a^T dims',dims, &
+                        ' should be',shape(transpose(a))
+         error stop iomsg
+     endif
+     1 format(*(a,' [',i0,',',i0,']'))
+ 
+ contains
+ 
+     subroutine show(x,dims)
+         ! "3 4" with `contiguous` (BUG); "4 3" without
+         real(8), intent(in), target, contiguous :: x(:,:)
+         integer, intent(out) :: dims(2)    
+         dims = [size(x,1),size(x,2)]
+     end 
+ 
+ end
+ 
+ module m
+     implicit none
+     private
+     public :: check_all
+ 
+ contains
+ 
+     subroutine abort_different(lx,x,ly,y,code)
+         character(*), intent(in) :: lx, ly
+         integer, intent(in) :: x(..), y(..), code
+         write(6,'(a," /= ",a)') lx, ly
+         select rank(x)
+             rank(1)
+                 write(6,3) lx
+                 write(6,*) x
+             rank(2)
+                 write(6,3) lx
+                 write(6,*) x
+             rank default
+         end select
+         select rank(y)
+             rank(1)
+                 write(6,3) ly
+                 write(6,*) y
+             rank(2)
+                 write(6,3) ly
+                 write(6,*) y
+             rank default
+         end select
+         error stop code
+       3 format(a,":")
+     end subroutine
+ 
+     subroutine check_target(x,expected,num_error)
+         integer, intent(in), target, contiguous :: x(:,:)
+         integer, intent(in) :: num_error, expected(:,:)
+         if (any(shape(x) /= shape(expected))) then
+             call abort_different( &
+                     "shape(x)",shape(x), &
+                     "shape(expected)",shape(expected), &
+                     num_error*10+1 &
+             )
+         end if
+         if (any(x /= expected)) then
+             call abort_different("x",x,"expected",expected,num_error*10+2)
+         end if
+         if (x(2,2) /= expected(2,2)) then
+             call abort_different( &
+                 "x(2,2)",x(2,2), &
+                 "expected(2,2)",expected(2,2), &
+                 num_error*10+3 &
+             )
+         end if
+     end 
+ 
+     subroutine check_non_target(x,expected,num_error)
+         integer, intent(in), contiguous :: x(:,:)
+         integer, intent(in) :: num_error, expected(:,:)
+         if (any(shape(x) /= shape(expected))) then
+             call abort_different( &
+                     "shape(x)",shape(x), &
+                     "shape(expected)",shape(expected), &
+                     num_error*10+1 &
+             )
+         end if
+         if (any(x /= expected)) then
+             call abort_different("x",x,"expected",expected,num_error*10+2)
+         end if
+         if (x(2,2) /= expected(2,2)) then
+             call abort_different( &
+                 "x(2,2)",x(2,2), &
+                 "expected(2,2)",expected(2,2), &
+                 num_error*10+3 &
+             )
+         end if
+     end 
+ 
+     subroutine wrapper_target(x,expected,num_error)
+         integer, intent(in), target :: x(:,:)
+         integer, intent(in) :: expected(:,:)
+         integer, intent(in) :: num_error
+         call check_target(x,expected,num_error)
+     end subroutine
+ 
+     subroutine wrapper_non_target(x,expected,num_error)
+         integer, intent(in) :: x(:,:), expected(:,:)
+         integer, intent(in) :: num_error
+         call check_non_target(x,expected,num_error)
+     end subroutine
+ 
+     subroutine wrapper_transpose_target(x,expected,num_error)
+         integer, intent(in), target :: x(:,:)
+         integer, intent(in) :: expected(:,:)
+         integer, intent(in) :: num_error
+         call check_target(transpose(x),expected,num_error)
+     end subroutine
+ 
+     subroutine wrapper_transpose_non_target(x,expected,num_error)
+         integer, intent(in) :: x(:,:), expected(:,:)
+         integer, intent(in) :: num_error
+         call check_non_target(transpose(x),expected,num_error)
+     end subroutine
+ 
+     subroutine check_all
+         integer :: a(3,4)
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 1 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_non_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 2 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 3 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_non_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 4 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_target( &
+                 a, &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 5 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_non_target( &
+                 a, &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 6 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_target( &
+                 transpose(a), &
+                 reshape([0,1,1,2,3,5,8,13,21,34,55,89],[3,4]), &
+                 7 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_non_target( &
+                 transpose(a), &
+                 reshape([0,1,1,2,3,5,8,13,21,34,55,89],[3,4]), &
+                 8 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 9 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_non_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 10 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 11 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_non_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 12 &
+         )
+ 
+     end subroutine
+ 
+ end module
+ 
+ use m
+ call original
+ call check_all
+ end
diff -Nrcpad gcc-16-20260718/gcc/testsuite/lib/target-supports.exp gcc-16-20260725/gcc/testsuite/lib/target-supports.exp
*** gcc-16-20260718/gcc/testsuite/lib/target-supports.exp	Sat Jul 18 22:32:17 2026
--- gcc-16-20260725/gcc/testsuite/lib/target-supports.exp	Sat Jul 25 22:32:17 2026
*************** proc check_effective_target_memtag_exec
*** 15027,15029 ****
--- 15027,15049 ----
        }
      return 1;
  }
+ 
+ # Return 1 if the target runtime can deref null, 0 otherwise.
+ # Cache the result.
+ 
+ proc check_effective_target_can_deref_null { } {
+     return [check_runtime can_deref_null {
+ 	char __attribute__((noipa))
+ 	read_mem (volatile char *p)
+ 	{
+ 	  return *p;
+ 	}
+ 
+ 	int
+ 	main ()
+ 	{
+ 	  read_mem ((char *)0);
+ 	  return 0;
+ 	}
+       } "-O0 -fno-delete-null-pointer-checks -Wno-null-dereference"]
+ }
diff -Nrcpad gcc-16-20260718/gcc/tree-outof-ssa.cc gcc-16-20260725/gcc/tree-outof-ssa.cc
*** gcc-16-20260718/gcc/tree-outof-ssa.cc	Sat Jul 18 22:32:17 2026
--- gcc-16-20260725/gcc/tree-outof-ssa.cc	Sat Jul 25 22:32:17 2026
*************** along with GCC; see the file COPYING3.
*** 25,30 ****
--- 25,31 ----
  #include "rtl.h"
  #include "tree.h"
  #include "gimple.h"
+ #include "gimple-expr.h"
  #include "cfghooks.h"
  #include "ssa.h"
  #include "tree-ssa.h"
*************** expand_phi_nodes (struct ssaexpand *sa)
*** 1049,1054 ****
--- 1050,1140 ----
  }
  
  
+ /* Out-of-SSA can leave several partitions sharing one base VAR_DECL, when
+    that variable's SSA versions are simultaneously live and so cannot all be
+    coalesced.  When such a partition is spilled (it has no register mode,
+    e.g.  an oversized vector that is BLKmode), set_mem_attributes would give
+    every one of those slots that single decl as its MEM_EXPR at offset 0, so
+    the distinct slots appear to be the same object and mislead MEM_EXPR-based
+    disambiguation, and the load/store pair-fusion pass then fuses across the
+    slots and corrupts one.  Give every partition but one of such a decl its
+    own artificial decl so the slots are distinguished at the source.
+    The new decl carries a DECL_DEBUG_EXPR back to the user variable so debug
+    info still attributes the storage to it (cf.  create_access_replacement in
+    tree-sra.cc).  PARM_DECLs and RESULT_DECLs are left alone, as they require
+    a single partition holding the canonical RTL.  */
+ 
+ static void
+ split_overlapping_partition_decls (var_map map)
+ {
+   unsigned n = num_var_partitions (map);
+   hash_set<tree> seen;
+   auto_vec<tree> new_decl;
+   new_decl.safe_grow_cleared (n);
+   bool any = false;
+ 
+   for (unsigned i = 0; i < n; i++)
+     {
+       tree repr = partition_to_var (map, i);
+       if (!repr)
+ 	continue;
+       tree var = SSA_NAME_VAR (repr);
+       if (!var || !VAR_P (var))
+ 	continue;
+       /* Only partitions that will live in memory can end up with a
+ 	 misleading shared MEM_EXPR.  Mirror the decision that
+ 	 expand_one_ssa_partition will make.  */
+       if (use_register_for_decl (repr))
+ 	continue;
+       /* One partition of VAR keeps the user decl, the rest are split.
+ 	 A default definition cannot change its variable, so if VAR has a
+ 	 partitioned default definition, its partition is the one that
+ 	 keeps the user decl.  Otherwise the first partition seen does.  */
+       tree ddef = ssa_default_def (cfun, var);
+       int keep = ddef ? var_to_partition (map, ddef) : NO_PARTITION;
+       if (keep == NO_PARTITION)
+ 	{
+ 	  if (!seen.add (var))
+ 	    continue;
+ 	}
+       else if (keep >= 0 && (unsigned) keep == i)
+ 	continue;
+ 
+       tree nvar = create_tmp_var_raw (TREE_TYPE (var));
+       /* Avoid a register-only NVAR when the partition already has a MEM,
+ 	 since set_rtl cannot assign that MEM to NVAR.  */
+       if (use_register_for_decl (nvar))
+ 	DECL_IGNORED_P (nvar) = DECL_IGNORED_P (var);
+       gcc_checking_assert (!use_register_for_decl (nvar));
+       DECL_CONTEXT (nvar) = DECL_CONTEXT (var);
+       DECL_SOURCE_LOCATION (nvar) = DECL_SOURCE_LOCATION (var);
+       SET_DECL_ALIGN (nvar, DECL_ALIGN (var));
+       if (!DECL_ARTIFICIAL (var) && DECL_NAME (var))
+ 	{
+ 	  SET_DECL_DEBUG_EXPR (nvar, var);
+ 	  DECL_HAS_DEBUG_EXPR_P (nvar) = 1;
+ 	}
+       copy_warning (nvar, var);
+       add_local_decl (cfun, nvar);
+       new_decl[i] = nvar;
+       any = true;
+     }
+ 
+   if (!any)
+     return;
+ 
+   unsigned ver;
+   tree name;
+   FOR_EACH_SSA_NAME (ver, name, cfun)
+     {
+       if (SSA_NAME_IS_DEFAULT_DEF (name))
+ 	continue;
+       int p = var_to_partition (map, name);
+       if (p != NO_PARTITION && new_decl[p])
+ 	SET_SSA_NAME_VAR_OR_IDENTIFIER (name, new_decl[p]);
+     }
+ }
+ 
  /* Remove the ssa-names in the current function and translate them into normal
     compiler variables.  PERFORM_TER is true if Temporary Expression Replacement
     should also be used.  */
*************** remove_ssa_form (bool perform_ter, struc
*** 1080,1085 ****
--- 1166,1176 ----
  	dump_replaceable_exprs (dump_file, values);
      }
  
+   /* Distinct partitions of one decl must not share a MEM_EXPR once they are
+      spilled to separate stack slots.  Done after TER so reassigning
+      SSA_NAME_VAR does not perturb find_replaceable_exprs.  */
+   split_overlapping_partition_decls (map);
+ 
    rewrite_trees (map);
  
    sa->map = map;
diff -Nrcpad gcc-16-20260718/gcc/tree-scalar-evolution.cc gcc-16-20260725/gcc/tree-scalar-evolution.cc
*** gcc-16-20260718/gcc/tree-scalar-evolution.cc	Sat Jul 18 22:32:17 2026
--- gcc-16-20260725/gcc/tree-scalar-evolution.cc	Sat Jul 25 22:32:17 2026
*************** private:
*** 607,614 ****
  					   tree *evolution_of_loop, int limit);
    t_bool follow_ssa_edge_inner_loop_phi (gphi *loop_phi_node,
  					 tree *evolution_of_loop, int limit);
!   tree add_to_evolution (tree chrec_before, enum tree_code code,
! 			 tree to_add, gimple *at_stmt);
    tree add_to_evolution_1 (tree chrec_before, tree to_add, gimple *at_stmt);
  
    class loop *loop;
--- 607,613 ----
  					   tree *evolution_of_loop, int limit);
    t_bool follow_ssa_edge_inner_loop_phi (gphi *loop_phi_node,
  					 tree *evolution_of_loop, int limit);
!   tree add_to_evolution (tree chrec_before, tree to_add, gimple *at_stmt);
    tree add_to_evolution_1 (tree chrec_before, tree to_add, gimple *at_stmt);
  
    class loop *loop;
*************** scev_dfs::add_to_evolution_1 (tree chrec
*** 853,862 ****
  */
  
  tree
! scev_dfs::add_to_evolution (tree chrec_before, enum tree_code code,
! 			    tree to_add, gimple *at_stmt)
  {
-   tree type = chrec_type (to_add);
    tree res = NULL_TREE;
  
    if (to_add == NULL_TREE)
--- 852,859 ----
  */
  
  tree
! scev_dfs::add_to_evolution (tree chrec_before, tree to_add, gimple *at_stmt)
  {
    tree res = NULL_TREE;
  
    if (to_add == NULL_TREE)
*************** scev_dfs::add_to_evolution (tree chrec_b
*** 879,903 ****
        fprintf (dump_file, ")\n");
      }
  
-   if (code == MINUS_EXPR)
-     {
-       if (INTEGRAL_TYPE_P (type)
- 	  && TYPE_OVERFLOW_UNDEFINED (type)
- 	  && !expr_not_equal_to (to_add,
- 				 wi::to_wide (TYPE_MIN_VALUE (type))))
- 	{
- 	  tree utype = unsigned_type_for (type);
- 	  to_add = chrec_convert_rhs (utype, to_add);
- 	  to_add = chrec_fold_multiply (utype, to_add,
- 					build_int_cst_type (utype, -1));
- 	  to_add = chrec_convert_rhs (type, to_add);
- 	}
-       else
- 	to_add = chrec_fold_multiply (type, to_add, SCALAR_FLOAT_TYPE_P (type)
- 				      ? build_real (type, dconstm1)
- 				      : build_int_cst_type (type, -1));
-     }
- 
    res = add_to_evolution_1 (chrec_before, to_add, at_stmt);
  
    if (dump_file && (dump_flags & TDF_SCEV))
--- 876,881 ----
*************** scev_dfs::follow_ssa_edge_binary (gimple
*** 942,948 ****
  	      res = follow_ssa_edge_expr (at_stmt, rhs0, &evol, limit);
  	      if (res == t_true)
  		*evolution_of_loop = add_to_evolution
! 		    (chrec_convert (type, evol, at_stmt), code, rhs1, at_stmt);
  	      else if (res == t_false)
  		{
  		  res = follow_ssa_edge_expr
--- 920,926 ----
  	      res = follow_ssa_edge_expr (at_stmt, rhs0, &evol, limit);
  	      if (res == t_true)
  		*evolution_of_loop = add_to_evolution
! 		    (chrec_convert (type, evol, at_stmt), rhs1, at_stmt);
  	      else if (res == t_false)
  		{
  		  res = follow_ssa_edge_expr
*************** scev_dfs::follow_ssa_edge_binary (gimple
*** 950,956 ****
  		  if (res == t_true)
  		    *evolution_of_loop = add_to_evolution
  			(chrec_convert (type, *evolution_of_loop, at_stmt),
! 			 code, rhs0, at_stmt);
  		}
  	    }
  
--- 928,934 ----
  		  if (res == t_true)
  		    *evolution_of_loop = add_to_evolution
  			(chrec_convert (type, *evolution_of_loop, at_stmt),
! 			 rhs0, at_stmt);
  		}
  	    }
  
*************** scev_dfs::follow_ssa_edge_binary (gimple
*** 966,972 ****
  	  if (res == t_true)
  	    *evolution_of_loop = add_to_evolution
  		(chrec_convert (type, *evolution_of_loop, at_stmt),
! 		 code, rhs0, at_stmt);
  	}
  
        else
--- 944,950 ----
  	  if (res == t_true)
  	    *evolution_of_loop = add_to_evolution
  		(chrec_convert (type, *evolution_of_loop, at_stmt),
! 		 rhs0, at_stmt);
  	}
  
        else
*************** scev_dfs::follow_ssa_edge_binary (gimple
*** 976,992 ****
  	res = t_false;
        break;
  
-     case MINUS_EXPR:
-       /* This case is under the form "opnd0 = rhs0 - rhs1".  */
-       if (TREE_CODE (rhs0) == SSA_NAME)
- 	gcc_unreachable (); /* Handled in caller.  */
-       else
- 	/* Otherwise, match an assignment under the form:
- 	   "a = ... - ...".  */
- 	/* And there is nothing to do.  */
- 	res = t_false;
-       break;
- 
      default:
        res = t_false;
      }
--- 954,959 ----
*************** scev_dfs::follow_ssa_edge_expr (gimple *
*** 1283,1292 ****
        /* Fallthru.  */
      case POINTER_PLUS_EXPR:
      case PLUS_EXPR:
-     case MINUS_EXPR:
        /* This case is under the form "rhs0 +- rhs1".  */
!       if (TREE_CODE (rhs0) == SSA_NAME
! 	  && (TREE_CODE (rhs1) != SSA_NAME || code == MINUS_EXPR))
  	{
  	  /* Match an assignment under the form:
  	     "a = b +- ...".  */
--- 1250,1257 ----
        /* Fallthru.  */
      case POINTER_PLUS_EXPR:
      case PLUS_EXPR:
        /* This case is under the form "rhs0 +- rhs1".  */
!       if (TREE_CODE (rhs0) == SSA_NAME && TREE_CODE (rhs1) != SSA_NAME)
  	{
  	  /* Match an assignment under the form:
  	     "a = b +- ...".  */
*************** scev_dfs::follow_ssa_edge_expr (gimple *
*** 1295,1307 ****
  	  if (res == t_true)
  	    *evolution_of_loop = add_to_evolution
  		(chrec_convert (type, *evolution_of_loop, at_stmt),
! 		 code, rhs1, at_stmt);
  	  return res;
  	}
        /* Else search for the SCC in both rhs0 and rhs1.  */
        return follow_ssa_edge_binary (at_stmt, type, rhs0, code, rhs1,
  				     evolution_of_loop, limit);
  
      default:
        return t_false;
      }
--- 1260,1315 ----
  	  if (res == t_true)
  	    *evolution_of_loop = add_to_evolution
  		(chrec_convert (type, *evolution_of_loop, at_stmt),
! 		 rhs1, at_stmt);
  	  return res;
  	}
        /* Else search for the SCC in both rhs0 and rhs1.  */
        return follow_ssa_edge_binary (at_stmt, type, rhs0, code, rhs1,
  				     evolution_of_loop, limit);
  
+ 
+     case MINUS_EXPR:
+       /* This case is under the form "rhs0 - rhs1".  */
+       if (TREE_CODE (rhs0) == SSA_NAME)
+ 	{
+ 	  /* Match an assignment under the form:
+ 	     "a = b +- ...".  */
+ 	  t_bool res = follow_ssa_edge_expr (at_stmt, rhs0,
+ 					     evolution_of_loop, limit);
+ 	  if (res != t_true)
+ 	    return res;
+ 	  /* We have to avoid negating INT_MIN given that a) invokes UB,
+ 	     b) results in a wrong scev_direction.  See PR126171.  */
+ 	  if (INTEGRAL_TYPE_P (type)
+ 	      && TYPE_OVERFLOW_UNDEFINED (type)
+ 	      && !expr_not_equal_to (rhs1,
+ 				     wi::to_wide (TYPE_MIN_VALUE (type))))
+ 	    {
+ 	      tree utype = unsigned_type_for (type);
+ 	      tree to_add = chrec_convert_rhs (utype, rhs1);
+ 	      to_add = chrec_fold_multiply (utype, to_add,
+ 					    build_int_cst_type (utype, -1));
+ 	      *evolution_of_loop
+ 		= chrec_convert (utype, *evolution_of_loop, at_stmt);
+ 	      *evolution_of_loop = add_to_evolution (*evolution_of_loop,
+ 						     to_add, at_stmt);
+ 	      *evolution_of_loop
+ 		= chrec_convert (type, *evolution_of_loop, at_stmt);
+ 	    }
+ 	  else
+ 	    {
+ 	      tree to_add = chrec_fold_multiply (type, rhs1,
+ 						 build_minus_one_cst (type));
+ 	      *evolution_of_loop
+ 		= add_to_evolution (chrec_convert (type, *evolution_of_loop,
+ 						   at_stmt),
+ 				    to_add, at_stmt);
+ 	    }
+ 	  return res;
+ 	}
+       /* There is nothing to do.  */
+       return t_false;
+ 
      default:
        return t_false;
      }
diff -Nrcpad gcc-16-20260718/gcc/tree-vect-loop.cc gcc-16-20260725/gcc/tree-vect-loop.cc
*** gcc-16-20260718/gcc/tree-vect-loop.cc	Sat Jul 18 22:32:17 2026
--- gcc-16-20260725/gcc/tree-vect-loop.cc	Sat Jul 25 22:32:17 2026
*************** vectorizable_nonlinear_induction (loop_v
*** 9511,9516 ****
--- 9511,9549 ----
    return true;
  }
  
+ /* Return true if the scalar initial values and steps of the SLP induction
+    lanes allow the first CANDIDATE_NIVS IVs to be reused circularly for the
+    remaining lanes.  */
+ static bool
+ vect_slp_induction_reuse_p (tree *steps, tree *inits, unsigned group_size,
+ 			  unsigned HOST_WIDE_INT const_nunits,
+ 			  unsigned candidate_nivs, unsigned nivs)
+ {
+   gcc_assert (candidate_nivs > 0);
+   gcc_assert (candidate_nivs < nivs);
+ 
+   /* This function compares only STEPS and INITS, so all checked lanes must
+      precede the first wrap of the SLP group.  */
+   gcc_assert (nivs * const_nunits <= group_size);
+ 
+   for (unsigned ivn = candidate_nivs; ivn < nivs; ++ivn)
+     {
+       unsigned reuse_ivn = ivn % candidate_nivs;
+       for (unsigned HOST_WIDE_INT eltn = 0; eltn < const_nunits; ++eltn)
+ 	{
+ 	  unsigned HOST_WIDE_INT elt = ivn * const_nunits + eltn;
+ 	  unsigned HOST_WIDE_INT reused_elt
+ 	    = reuse_ivn * const_nunits + eltn;
+ 
+ 	  if (!operand_equal_p (steps[elt], steps[reused_elt], 0)
+ 	      || !operand_equal_p (inits[elt], inits[reused_elt], 0))
+ 	    return false;
+ 	}
+     }
+ 
+   return true;
+ }
+ 
  /* Function vectorizable_induction
  
     Check if STMT_INFO performs an induction computation that can be vectorized.
*************** vectorizable_induction (loop_vec_info lo
*** 9745,9757 ****
      nivs = nvects;
    else if (nunits.is_constant (&const_nunits))
      {
!       /* Compute the number of distinct IVs we need.  First reduce
! 	 group_size if it is a multiple of const_nunits so we get
! 	 one IV for a group_size of 4 but const_nunits 2.  */
        unsigned group_sizep = group_size;
        if (group_sizep % const_nunits == 0)
! 	group_sizep = group_sizep / const_nunits;
!       nivs = least_common_multiple (group_sizep, const_nunits) / const_nunits;
      }
    else
      {
--- 9778,9805 ----
      nivs = nvects;
    else if (nunits.is_constant (&const_nunits))
      {
!       gcc_assert (!init_node);
!       /* Compute the number of distinct IVs we need.  We can reduce the
! 	 number when later vector chunks are equal to earlier chunks.  */
!       nivs = least_common_multiple (group_size, const_nunits) / const_nunits;
        unsigned group_sizep = group_size;
        if (group_sizep % const_nunits == 0)
! 	{
! 	  group_sizep = group_sizep / const_nunits;
! 	  unsigned candidate_nivs
! 	    = least_common_multiple (group_sizep, const_nunits) / const_nunits;
! 	  if (candidate_nivs < nivs
! 	      && vect_slp_induction_reuse_p (steps, inits, group_size,
! 					   const_nunits, candidate_nivs, nivs))
! 	    {
! 	      if (dump_enabled_p ())
! 		dump_printf_loc (MSG_NOTE, vect_location,
! 				 "reusing %u SLP induction IVs for %u "
! 				 "vector chunks\n",
! 				 candidate_nivs, nivs);
! 	      nivs = candidate_nivs;
! 	    }
! 	}
      }
    else
      {
*************** vectorizable_induction (loop_vec_info lo
*** 9978,9987 ****
        else
  	nivs = 1;
        vec_steps.reserve (nivs-ivn);
        for (; ivn < nivs; ++ivn)
  	{
! 	  slp_node->push_vec_def (SLP_TREE_VEC_DEFS (slp_node)[0]);
! 	  vec_steps.quick_push (vec_steps[0]);
  	}
      }
  
--- 10026,10038 ----
        else
  	nivs = 1;
        vec_steps.reserve (nivs-ivn);
+       unsigned generated_nivs = ivn;
+       gcc_assert (generated_nivs > 0);
        for (; ivn < nivs; ++ivn)
  	{
! 	  unsigned reuse_ivn = ivn % generated_nivs;
! 	  slp_node->push_vec_def (SLP_TREE_VEC_DEFS (slp_node)[reuse_ivn]);
! 	  vec_steps.quick_push (vec_steps[reuse_ivn]);
  	}
      }
  
diff -Nrcpad gcc-16-20260718/libga68/ChangeLog gcc-16-20260725/libga68/ChangeLog
*** gcc-16-20260718/libga68/ChangeLog	Sat Jul 18 22:32:17 2026
--- gcc-16-20260725/libga68/ChangeLog	Sat Jul 25 22:32:17 2026
***************
*** 1,3 ****
--- 1,27 ----
+ 2026-07-21  chris hermansen  <clhermansen@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  chris hermansen  <clhermansen@gmail.com>
+ 
+ 	* standard.a68.in (Integer): New mode.
+ 	(whole_max_entry): New variable.
+ 	(whole_p10): Likewise.
+ 	(whole_stop_after): Likewise.
+ 	(whole_powers_of_10): Likewise.
+ 	(WHOLEDIGITS): New operator.
+ 	(whole): Rewrite.
+ 	(subwhole): Likewise.
+ 
+ 2026-07-21  Dhruv Chawla  <dhruvc@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-05-30  Dhruv Chawla  <dhruvc@nvidia.com>
+ 
+ 	* ga68-error.c: Fix typos.
+ 	* ga68-unistr.c (_libga68_u32_cmp): Likewise.
+ 	(_libga68_u8_uctomb): Likewise.
+ 	(_libga68_u32_to_u8): Likewise.
+ 
  2026-04-30  Release Manager
  
  	* GCC 16.1.0 released.
diff -Nrcpad gcc-16-20260718/libga68/ga68-error.c gcc-16-20260725/libga68/ga68-error.c
*** gcc-16-20260718/libga68/ga68-error.c	Sat Jul 18 22:32:17 2026
--- gcc-16-20260725/libga68/ga68-error.c	Sat Jul 25 22:32:17 2026
***************
*** 28,34 ****
  
  /* Run-time error handling.
  
!    Please use the following format when outputing runtime error messages:
  
       FILE:LINE:[COLUMN:] TEXT
  
--- 28,34 ----
  
  /* Run-time error handling.
  
!    Please use the following format when outputting runtime error messages:
  
       FILE:LINE:[COLUMN:] TEXT
  
diff -Nrcpad gcc-16-20260718/libga68/ga68-unistr.c gcc-16-20260725/libga68/ga68-unistr.c
*** gcc-16-20260718/libga68/ga68-unistr.c	Sat Jul 18 22:32:18 2026
--- gcc-16-20260725/libga68/ga68-unistr.c	Sat Jul 25 22:32:17 2026
***************
*** 54,60 ****
  # define MIN(a,b) ((a) < (b) ? (a) : (b))
  #endif
  
! /* Compare two UCS-4 strings of same lenght, lexicographically.
     Return -1, 0 or 1.  */
  
  static int
--- 54,60 ----
  # define MIN(a,b) ((a) < (b) ? (a) : (b))
  #endif
  
! /* Compare two UCS-4 strings of same length, lexicographically.
     Return -1, 0 or 1.  */
  
  static int
*************** _libga68_u32_cmp (const uint32_t *s1, si
*** 83,89 ****
    return 0;
  }
  
! /* Compare two UCS-4 strings of perhaps different lenghts, lexicographically.
     Return -1, 0 or 1.  */
  
  int
--- 83,89 ----
    return 0;
  }
  
! /* Compare two UCS-4 strings of perhaps different lengths, lexicographically.
     Return -1, 0 or 1.  */
  
  int
*************** _libga68_u8_uctomb (uint8_t *s, uint32_t
*** 307,313 ****
  
  /* Convert S of size N with stride STRIDE UCS-4 to UTF-8.
     Returns a pointer to the converted string with a traiiling '\0'.
!    The string length, not counting the trailling '\0', is returned on LENGTHP.
     Returns NULL on error.
     Callers *must* call _libga68_free_internal on a non-null result.  */
  
--- 307,313 ----
  
  /* Convert S of size N with stride STRIDE UCS-4 to UTF-8.
     Returns a pointer to the converted string with a traiiling '\0'.
!    The string length, not counting the trailing '\0', is returned on LENGTHP.
     Returns NULL on error.
     Callers *must* call _libga68_free_internal on a non-null result.  */
  
*************** _libga68_u32_to_u8 (const uint32_t *s, s
*** 380,386 ****
      {
        if (length + 1 != allocated)
  	{
! 	  /* Resize the allocated memory to fit the string plus the trailling NULL.  */
  	  uint8_t *memory;
  
  	  memory =
--- 380,386 ----
      {
        if (length + 1 != allocated)
  	{
! 	  /* Resize the allocated memory to fit the string plus the trailing NULL.  */
  	  uint8_t *memory;
  
  	  memory =
diff -Nrcpad gcc-16-20260718/libga68/standard.a68.in gcc-16-20260725/libga68/standard.a68.in
*** gcc-16-20260718/libga68/standard.a68.in	Sat Jul 18 22:32:18 2026
--- gcc-16-20260725/libga68/standard.a68.in	Sat Jul 25 22:32:17 2026
*************** def
*** 58,85 ****
                       {reti {,}}
                    );
  
      pub proc whole = (Number v, int width) string:
         case v in
!           {iter L  {short short}  {short}  {} {long}  {long long}}
!           {iter L_ {short_short_} {short_} {} {long_} {long_long_}}
!           ({L} int x):
!              (int length := ABS width - (x < {L} 0 OR width > 0 | 1 | 0),
!                             {L} int n := ABS x;
!               if width = 0
!               then {L} int m := n; length := 0;
!                    while m %:= {L} 10; length +:= 1; m /= {L} 0
!                    do ~ od
!               fi;
!               string s := subwhole (n, length);
!               if length = 0 OR char_in_string (errorchar, loc int, s)
!               then ABS width * errorchar
!               else (x < {L} 0 | "-" |: width > 0 | "+" | "") +=: s;
!                    (width /= 0 | (ABS width - UPB s) * " " +=: s);
!                    s
!               fi),
!           ({L} real x): fixed (x, width, 0)
            {reti {,}}
!        esac;
  
      pub proc fixed = (Number v, int width, after) string:
         case v in
--- 58,152 ----
                       {reti {,}}
                    );
  
+     { The definition of mode Integer used by both the RR subwhole and this one.  }
+     
+     mode Integer = union (
+                       {iter L {long long } {long } {} {short } {short short }}
+                       {L}int
+                       {reti {,}}
+                    );
+     
+     { The whole_powers_of_10 row is used to look up the appropriate power of 10 for
+       each integer division required to select the leading in the conversion
+       process, for each integer multiplication to eliminate the leading digit,
+       and in the lookup operator WHOLEDIGITS to determine the number of digits in
+       the integer to be converted.  }
+     
+     int whole_max_entry := 1;
+     long long int whole_p10 := long long 1;
+     long long int whole_stop_after = long_long_max_int % long long 10;
+     while whole_p10 < whole_stop_after
+     do
+        whole_p10 *:= long long 10;
+        whole_max_entry +:= 1
+     od;
+     heap [1:whole_max_entry]long long int whole_powers_of_10;
+     while whole_max_entry > 0
+     do
+        whole_powers_of_10[whole_max_entry] := whole_p10;
+        whole_p10 %:= long long 10;
+        whole_max_entry -:= 1
+     od;
+     
+     { The WHOLEDIGITS operator is used to determine the number of decimal digits in a
+       number.  We convert the operand to long long and make it negative if
+       necessary, to allow for twos-complement minimum (negative) integer.  }
+     
+     op WHOLEDIGITS = (Integer number) int:
+     begin
+           long long int work =
+              case number in
+                 {iter L {long long } {long } {} {short } {short short }}
+                 {iter K {} {LENG } {LENG LENG } {LENG LENG LENG } {LENG LENG LENG LENG }}
+                 ({L}int x):
+                    {K}(x > {L} 0 | -x | x)
+                 {reti {,}}
+              esac;
+           int num_digits := 1;
+           for i from (LWB whole_powers_of_10) + 1 to UPB whole_powers_of_10
+               while work <= -whole_powers_of_10[i]
+           do num_digits +:= 1 od;
+           num_digits
+     end { WHOLEDIGITS };
+     
+     { proc whole checks for a too-small width, returning a string of the error
+       character if so; it left-pads the result with blanks as necessary and the
+       sign as necessary; and it relies on subwhole to do the actual digit
+       conversion.  The [] result returned is either exactly the number of chars
+       needed (width = 0) to hold the converted integer and negative sign if < 0
+       or width characters (width ≠ 0).  }
+     
+     
      pub proc whole = (Number v, int width) string:
         case v in
!           {iter L {long long } {long } {} {short } {short short }}
!           ({L}int x):
!              if int digits_required = WHOLEDIGITS x;
!                 bool negative = x < {L}0;
!                 int signs_required = (negative OR width > 0 | 1 | 0);
!                 int chars_required = signs_required + digits_required;
!                 int chars_available = (width = 0 | chars_required | ABS width);
!                 chars_available < chars_required
!              then chars_available * "*"
!              else [1:chars_available]char buffer;
!                   int spaces_required = chars_available - chars_required;
!                   int buf_ch := 1;
!                   while buf_ch <= spaces_required
!                   do buffer[buf_ch] := " ";
!                      buf_ch +:= 1
!                   od;
!                   if signs_required > 0
!                   then buffer[buf_ch] := (negative | "-" | "+");
!                        buf_ch +:= 1
!                   fi;
!                   subwhole(x, buffer, buf_ch);
!                   buffer
!              fi
            {reti {,}}
!        out
!           fixed(v, width, 0)
!        esac { whole };
! 
  
      pub proc fixed = (Number v, int width, after) string:
         case v in
*************** def
*** 137,158 ****
             {reti {,}}
          esac;
  
!     { Returns a string of maximum length `width' containing a decimal
!       representation of the positive integer `v'. }
! 
!     proc subwhole = (Number v, int width) string:
!        case v in
!           {iter L {short short} {short} {} {long}    {long long}}
!           {iter S {LENG LENG}   {LENG}  {} {SHORTEN} {SHORTEN SHORTEN}}
!           ({L} int x):
!              begin string s, {L} int n := x;
!                    while dig_char ({S} (n MOD {L} 10)) +=: s;
!                          n %:= {L} 10; n /= {L} 0
!                    do ~ od;
!                    (UPB s > width | width * errorchar | s)
!              end
            {reti {,}}
!        esac;
  
      { Returns a string of maximum length `width' containing a rounded
        decimal representation of the positive real number `v'; if
--- 204,245 ----
             {reti {,}}
          esac;
  
!     { The RR proc subwhole looks like
!     
!       proc ℵ₀ subwhole = (number v, int width) string: { implementation };
!     
!       We deviate from that design below.  This means that, should someone copy
!       proc putf from the RR, they must recognize that the subwhole mentioned
!       there is no longer defined here, and make adjustments.
!     
!       I considered calling this subwhole something else (whole_do_conv for example)
!       but that would mean anyone else calling subwhole hoping to get the new
!       version would silently get the old subwhole instead.
!     
!       This subwhole converts digit by digit from left to right.  It relies on the
!       caller having padded out the buffer with spaces and sign as required and
!       begins filling digits starting at the value passed in buf_ch.  The final
!       []char array and final value of buf_ch are returned.  }
!     
!     proc subwhole = (Integer v, ref []char buffer, ref int buf_ch) void:
!        case int char_zero = ABS "0"; v in
!           {iter L {long long } {long } {} {short } {short short }}
!           {iter K {LENG LENG } {LENG } {} {SHORTEN } {SHORTEN SHORTEN }}
!           {iter S {SHORTEN SHORTEN } {SHORTEN } {} {LENG } {LENG LENG }}k
!           {iter T {} {SHORTEN } {SHORTEN SHORTEN } {SHORTEN SHORTEN SHORTEN } {SHORTEN SHORTEN SHORTEN SHORTEN }}
!           ({L}int number_to_convert):
!           begin {L}int work := number_to_convert;
!                 while buf_ch <= UPB buffer
!                 do int digit_number = UPB buffer - buf_ch + 1;
!                    {L}int p10 = {T}whole_powers_of_10[digit_number];
!                    int digit = {S} (work % p10);
!                    buffer[buf_ch] := REPR (ABS digit + char_zero);
!                    buf_ch +:= 1;
!                    work -:= {K}digit * p10
!                 od
!           end
            {reti {,}}
!        esac { subwhole };
  
      { Returns a string of maximum length `width' containing a rounded
        decimal representation of the positive real number `v'; if
diff -Nrcpad gcc-16-20260718/libgomp/ChangeLog gcc-16-20260725/libgomp/ChangeLog
*** gcc-16-20260718/libgomp/ChangeLog	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libgomp/ChangeLog	Sat Jul 25 22:32:18 2026
***************
*** 1,3 ****
--- 1,11 ----
+ 2026-07-21  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	Backported from master:
+ 	2026-07-09  Martin Jambor  <mjambor@suse.cz>
+ 
+ 	PR ipa/125207
+ 	* testsuite/libgomp.c/ipcp-cb-spec1.c (test): Rework.
+ 
  2026-04-30  Release Manager
  
  	* GCC 16.1.0 released.
diff -Nrcpad gcc-16-20260718/libgomp/testsuite/libgomp.c/ipcp-cb-spec1.c gcc-16-20260725/libgomp/testsuite/libgomp.c/ipcp-cb-spec1.c
*** gcc-16-20260718/libgomp/testsuite/libgomp.c/ipcp-cb-spec1.c	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libgomp/testsuite/libgomp.c/ipcp-cb-spec1.c	Sat Jul 25 22:32:18 2026
***************
*** 4,18 ****
  /* { dg-options "-O3 -fopenmp -std=gnu99 -fdump-ipa-cp-details" } */
  /* { dg-require-effective-target fopenmp } */
  
! void test(int c) {
    for (int i = 0; i < c; i++)
      if (!__builtin_constant_p(c))
        __builtin_abort();
  }
! int main() {
  #pragma omp task
!   test(7);
    return 0;
  }
  
! /* { dg-final { scan-ipa-dump "Creating a specialized node of main._omp_fn" "cp" } } */
--- 4,24 ----
  /* { dg-options "-O3 -fopenmp -std=gnu99 -fdump-ipa-cp-details" } */
  /* { dg-require-effective-target fopenmp } */
  
! static inline void __attribute__((always_inline)) test(int c) {
    for (int i = 0; i < c; i++)
      if (!__builtin_constant_p(c))
        __builtin_abort();
  }
! 
! int foo(int c) {
  #pragma omp task
!   test(c);
    return 0;
  }
  
! int main() {
!   foo(7);
!   return 0;
! }
! 
! /* { dg-final { scan-ipa-dump "Creating a specialized node of foo._omp_fn" "cp" } } */
diff -Nrcpad gcc-16-20260718/libsanitizer/ChangeLog gcc-16-20260725/libsanitizer/ChangeLog
*** gcc-16-20260718/libsanitizer/ChangeLog	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libsanitizer/ChangeLog	Sat Jul 25 22:32:19 2026
***************
*** 1,3 ****
--- 1,12 ----
+ 2026-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR sanitizer/126307
+ 	* tsan/tsan_trace.h: Cherry-pick llvm-project revision
+ 	cdfdb06c9155080ec97d6e4f4dd90b6e7cefb0ca.
+ 
  2026-04-30  Release Manager
  
  	* GCC 16.1.0 released.
diff -Nrcpad gcc-16-20260718/libsanitizer/tsan/tsan_trace.h gcc-16-20260725/libsanitizer/tsan/tsan_trace.h
*** gcc-16-20260718/libsanitizer/tsan/tsan_trace.h	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libsanitizer/tsan/tsan_trace.h	Sat Jul 25 22:32:19 2026
*************** struct Trace {
*** 190,196 ****
    Mutex mtx;
    IList<TraceHeader, &TraceHeader::trace_parts, TracePart> parts;
    // First node non-queued into ctx->trace_part_recycle.
!   TracePart* local_head;
    // Final position in the last part for finished threads.
    Event* final_pos = nullptr;
    // Number of trace parts allocated on behalf of this trace specifically.
--- 190,196 ----
    Mutex mtx;
    IList<TraceHeader, &TraceHeader::trace_parts, TracePart> parts;
    // First node non-queued into ctx->trace_part_recycle.
!   TracePart* local_head = nullptr;
    // Final position in the last part for finished threads.
    Event* final_pos = nullptr;
    // Number of trace parts allocated on behalf of this trace specifically.
diff -Nrcpad gcc-16-20260718/libstdc++-v3/ChangeLog gcc-16-20260725/libstdc++-v3/ChangeLog
*** gcc-16-20260718/libstdc++-v3/ChangeLog	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/ChangeLog	Sat Jul 25 22:32:19 2026
***************
*** 1,3 ****
--- 1,205 ----
+ 2026-07-24  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 	    Álvaro Begué  <alvaro.begue@gmail.com>
+ 
+ 	PR libstdc++/124853
+ 	* src/c++20/tzdb.cc
+ 	(time_zone::_M_get_sys_info): Extract code blocks to
+ 	separate functions, and invoke them.
+ 	(<unnamed>::find_active_rule): Modify algorithm to
+ 	handle cascading saves.
+ 	(<unnamed>::find_first_std): Simplified implementation
+ 	benefiting from reordering of rules.
+ 	(chrono::reload_tzdb): Sort rules by name, from and save.
+ 	* testsuite/std/time/time_zone/wall_cascade.cc: New test.
+ 	(cherry picked from commits f7cde200320e0800e4fcc5cea399e9faef50f8d4)
+ 	(610134a51fa3d0bcd3e0980c6574557172dc88c0)
+ 
+ 2026-07-23  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-20  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	PR libstdc++/116110
+ 	* src/c++20/tzdb.cc (time_zone::_M_get_sys_info): Correct
+ 	condition for stopping zone expansion before STD zone.
+ 	* testsuite/std/time/time_zone/116110.cc (test_dawson):
+ 	Add test for America/Dawson August 1945 transition.
+ 
+ 2026-07-23  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-05-18  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	PR libstdc++/124852
+ 	* src/c++20/tzdb.cc (on_month_day::on_day_t, on_month_day::on_day):
+ 	Remove.
+ 	(operator>>(istream&, on_month_day::day_t&)): Inlined into...
+ 	(operator>>(istream&, on_month_day)): Inlined on_month_day::on_day.
+ 	Avoid modifying on.month if MONTH is not present. Report failure
+ 	on failure to parse day for LessEq / GreaterEq.
+ 
+ 2026-07-23  Álvaro Begué  <alvaro.begue@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-05-13  Álvaro Begué  <alvaro.begue@gmail.com>
+ 		    Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	PR libstdc++/124852
+ 	* src/c++20/tzdb.cc (on_day): Rename to...
+ 	(on_day_month): Rename from on_day.
+ 	(on_day_month::on_day_t, on_day_month::on_day): Define.
+ 	(operator>>(istream&, on_day_t&&)): Factored out of
+ 	operator>>(istream&, on_day&).
+ 	(operator>>(istream&, on_day&)): Use on_day_t parser.
+ 	(operator>>(istream&, ZoneInfo&)): Replace the integer DAY
+ 	parser with on_day_t for the UNTIL field.
+ 	* testsuite/std/time/time_zone/until_day_on.cc: New test.
+ 
+ 2026-07-23  Álvaro Begué  <alvaro.begue@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-05-13  Álvaro Begué  <alvaro.begue@gmail.com>
+ 
+ 	PR libstdc++/124851
+ 	* src/c++20/tzdb.cc (ZoneInfo::ZoneInfo(sys_info&&)): Store
+ 	stdoff only in m_offset (subtract info.save).
+ 	(ZoneInfo::ZoneInfo(const pair<sys_info, string_view>&)):
+ 	Likewise.
+ 	(ZoneInfo::offset()): Document new semantics.
+ 	(ZoneInfo::to(sys_info&)): Add m_save back to offset() when
+ 	populating sys_info::offset.
+ 	* testsuite/std/time/time_zone/numeric_save.cc: New test.
+ 
+ 2026-07-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Regenerate.
+ 	* config/abi/post/hppa-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/i386-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/i486-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/ia64-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/m68k-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/powerpc-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt:
+ 	Likewise.
+ 	* config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/s390x-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/sparc64-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/x86_64-linux-gnu/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Likewise.
+ 	* config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Likewise.
+ 
+ 2026-07-21  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-07  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/mdspan
+ 	(layout_stride::mapping::mapping(const extent_type&, span<...>)):
+ 	Convert strides using __index_type_cast, which bring asserts
+ 	for negative and unrepresentable values.
+ 	* testsuite/23_containers/mdspan/layouts/stride_neg.cc: New test.
+ 
+ 2026-07-21  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-10  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/ranges (repeat_view::repeat_view): Assert that
+ 	__bound >= 0 consistently. Replace !same_as<unreachable_sentinel>
+ 	with __is_signed_integer_like check.
+ 
+ 2026-07-21  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-07  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* config/abi/pre/gnu.ver (GLIBCXX_3.4.36): Export basic_format_arg
+ 	_M_handle_unrecognized method of specializations of
+ 	format_context and wformat_context.
+ 	* include/std/format (basic_format_arg::_M_handle_unrecognized):
+ 	Declare with explicit specializations for (w)format_context
+ 	if _GLIBCXX_EXTERN_TEMPLATE, and define otherwise.
+ 	(basic_format_arg::_M_visit): Remove __type parameter, and use
+ 	_M_type instead. Call _M_handle_unrecognized for unrecognized
+ 	_Arg_t values.
+ 	(basic_format_arg::_M_visit_user): Remove __type parameter,
+ 	and use _M_type instead. Adjust calls to _M_visit.
+ 	(basic_format_arg::visit, std::visit_format_arg)
+ 	(__format::__visit_format_arg): Remove _M_type argument from
+ 	_M_visit(_user) calls.
+ 	* src/c++20/format-inst.cc
+ 	(basic_format_arg::_M_handle_unrecognized): Define and export
+ 	explicit specializations for (w)format_context.
+ 
+ 2026-07-21  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-03  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/format (_Pres_type::_Pres_p, _Pres_type::_Pres_P):
+ 	Change the values to which they are defined.
+ 	(__formatter_fp::format): Append 0x/0X if _M_type is _Pres_p/_Pres_P
+ 	respectively.
+ 	(__formatter_fp::_M_localize): Add __offset parameter representing
+ 	start of number value (after sign and prefix).
+ 	(__formatter_ptr::parse, __formatter_ptr::_M_default)
+ 	(__formatter_ptr::__formatter_ptr): Remove unused __type parameter,
+ 	and replace use of _Pres_p/P with _Pres_x/X.
+ 
+ 2026-07-21  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-03  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/format (__formatter_int::format)
+ 	(__formatter_fp::format): For unrecognised _M_spec._M_type
+ 	values (default branch of switch) fallthrou to _Pres_none.
+ 
+ 2026-07-21  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-06-24  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/format (__do_vformat_to): Change the preprocessor
+ 	check for __do_vformat_to.
+ 
+ 2026-07-21  Jonathan Wakely  <jwakely@redhat.com>
+ 	    Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	PR libstdc++/123165
+ 	* acinclude.m4 (libtool_VERSION): Bump version.
+ 	* config/abi/pre/gnu.ver (GLIBCXX_3.4.36): Add new symbol
+ 	version and export new symbol.
+ 	* configure: Regenerate.
+ 	* include/std/chrono (__detail::__recent_leap_second_info):
+ 	Declare new function and make it a friend of various classes.
+ 	(leap_second): Make private constructor constexpr. Remove friend
+ 	declaration for get_leap_second_info.
+ 	(__detail::__get_leap_second_info): Use new function for times
+ 	past the hardcoded expiry.
+ 	* src/c++20/tzdb.cc (tzdb_list::_Node::fixed_leaps): Move array
+ 	of leap seconds here from _S_read_leap_seconds.
+ 	(_Node::NumLeapSeconds): New class.
+ 	(_Node::num_leap_seconds): New static variable.
+ 	(__detail::__recent_leap_second_info): Define new function.
+ 	(tzdb_list::_Node::_S_read_leap_seconds): Populate vector from
+ 	_Node::fixed_leaps. Rename bool variable to clarify meaning.
+ 	(tzdb_list::_Node::_S_replace_head): Update num_leap_seconds
+ 	when updating the tzdb_list.
+ 	* testsuite/util/testsuite_abi.cc: Update known_versions and
+ 	latestp.
+ 	* testsuite/std/time/clock/utc/leap_second_info-2.cc: New test.
+ 	(cherry-picked from commits e79f0f818c0e42d0d84c90a54684dfb269ac388c)
+ 	(b12fdd952511786bf8d285e7080e94deeb32aa1d)
+ 	(adb4f4a064c009cd616106fa4c648182c18f96d9)
+ 	(a7ad4bee6fe7cd77aceb6e86380dcaeb6da82791)
+ 
  2026-07-16  Jonathan Wakely  <jwakely@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-16-20260718/libstdc++-v3/acinclude.m4 gcc-16-20260725/libstdc++-v3/acinclude.m4
*** gcc-16-20260718/libstdc++-v3/acinclude.m4	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/acinclude.m4	Sat Jul 25 22:32:19 2026
*************** changequote([,])dnl
*** 4096,4102 ****
  fi
  
  # For libtool versioning info, format is CURRENT:REVISION:AGE
! libtool_VERSION=6:35:0
  
  # Everything parsed; figure out what files and settings to use.
  case $enable_symvers in
--- 4096,4102 ----
  fi
  
  # For libtool versioning info, format is CURRENT:REVISION:AGE
! libtool_VERSION=6:36:0
  
  # Everything parsed; figure out what files and settings to use.
  case $enable_symvers in
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/aarch64-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4688,4693 ****
--- 4691,4697 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/hppa-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/hppa-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/hppa-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/hppa-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 555,560 ****
--- 555,562 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3119,3124 ****
--- 3121,3127 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9tzdb_list11erase_afterENS0_14const_iteratorE@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9tzdb_list14const_iteratorppEi@@GLIBCXX_3.4.31
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4650,4655 ****
--- 4653,4659 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/i386-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/i386-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/i386-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/i386-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4693,4698 ****
--- 4696,4702 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4693,4698 ****
--- 4696,4702 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4693,4698 ****
--- 4696,4702 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4688,4693 ****
--- 4691,4697 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3359,3364 ****
--- 3361,3367 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4934,4939 ****
--- 4937,4943 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/32/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3359,3364 ****
--- 3361,3367 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4934,4939 ****
--- 4937,4943 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc64-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3359,3364 ****
--- 3361,3367 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4934,4939 ****
--- 4937,4943 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/powerpc64le-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17__gnu_cxx_ieee1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intB5cxx11IjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_IEEE128_3.4.29
  FUNC:_ZNKSt17__gnu_cxx_ieee1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intB5cxx11IlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_IEEE128_3.4.29
  FUNC:_ZNKSt17__gnu_cxx_ieee1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intB5cxx11ImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_IEEE128_3.4.29
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3530,3535 ****
--- 3532,3538 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 5143,5148 ****
--- 5146,5152 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/riscv64-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4689,4694 ****
--- 4692,4698 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/s390x-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
  FUNC:_ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@@GLIBCXX_LDBL_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3359,3364 ****
--- 3361,3367 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4934,4939 ****
--- 4937,4943 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/sparc64-linux-gnu/32/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4688,4693 ****
--- 4691,4697 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/sparc64-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/sparc64-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/sparc64-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/sparc64-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4688,4693 ****
--- 4691,4697 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4693,4698 ****
--- 4696,4702 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/x86_64-linux-gnu/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4693,4698 ****
--- 4696,4702 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt gcc-16-20260725/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt
*** gcc-16-20260718/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt	Sat Jul 25 22:32:19 2026
*************** FUNC:_ZNKSt15basic_streambufIwSt11char_t
*** 582,587 ****
--- 582,589 ----
  FUNC:_ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt16bad_array_length4whatEv@@CXXABI_1.3.8
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIcEEcEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
+ FUNC:_ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterIwEEwEE22_M_handle_unrecognizedEv@@GLIBCXX_3.4.36
  FUNC:_ZNKSt17bad_function_call4whatEv@@GLIBCXX_3.4.18
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@@GLIBCXX_3.4
  FUNC:_ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@@GLIBCXX_3.4
*************** FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIB
*** 3169,3174 ****
--- 3171,3177 ----
  FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj@@GLIBCXX_3.4.36
  FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono9gps_clock3nowEv@@GLIBCXX_3.4.35
  FUNC:_ZNSt6chrono9tai_clock3nowEv@@GLIBCXX_3.4.35
*************** OBJECT:0:GLIBCXX_3.4.32
*** 4693,4698 ****
--- 4696,4702 ----
  OBJECT:0:GLIBCXX_3.4.33
  OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.35
+ OBJECT:0:GLIBCXX_3.4.36
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
diff -Nrcpad gcc-16-20260718/libstdc++-v3/config/abi/pre/gnu.ver gcc-16-20260725/libstdc++-v3/config/abi/pre/gnu.ver
*** gcc-16-20260718/libstdc++-v3/config/abi/pre/gnu.ver	Sat Jul 18 22:32:19 2026
--- gcc-16-20260725/libstdc++-v3/config/abi/pre/gnu.ver	Sat Jul 25 22:32:19 2026
*************** GLIBCXX_3.4.35 {
*** 2623,2628 ****
--- 2623,2639 ----
  
  } GLIBCXX_3.4.34;
  
+ # GCC 16.2.0
+ GLIBCXX_3.4.36 {
+ 
+     _ZNSt6chrono8__detail25__recent_leap_second_infoERNS_16leap_second_infoEj;
+ 
+     # basic_format_arg<format_context>::handle basic_format_arg<format_context>::_M_handle_unrecognized() const;
+     # basic_format_arg<wformat_context>::handle basic_format_arg<wformat_context>::_M_handle_unrecognized() const;
+     _ZNKSt16basic_format_argISt20basic_format_contextINSt8__format10_Sink_iterI[cw]EE[cw]EE22_M_handle_unrecognizedEv;
+ 
+ } GLIBCXX_3.4.35;
+ 
  # Symbols in the support library (libsupc++) have their own tag.
  CXXABI_1.3 {
  
diff -Nrcpad gcc-16-20260718/libstdc++-v3/configure gcc-16-20260725/libstdc++-v3/configure
*** gcc-16-20260718/libstdc++-v3/configure	Sat Jul 18 22:32:23 2026
--- gcc-16-20260725/libstdc++-v3/configure	Sat Jul 25 22:32:22 2026
*************** $as_echo "$as_me: WARNING: === Symbol ve
*** 51429,51435 ****
  fi
  
  # For libtool versioning info, format is CURRENT:REVISION:AGE
! libtool_VERSION=6:35:0
  
  # Everything parsed; figure out what files and settings to use.
  case $enable_symvers in
--- 51429,51435 ----
  fi
  
  # For libtool versioning info, format is CURRENT:REVISION:AGE
! libtool_VERSION=6:36:0
  
  # Everything parsed; figure out what files and settings to use.
  case $enable_symvers in
diff -Nrcpad gcc-16-20260718/libstdc++-v3/include/std/chrono gcc-16-20260725/libstdc++-v3/include/std/chrono
*** gcc-16-20260718/libstdc++-v3/include/std/chrono	Sat Jul 18 22:32:20 2026
--- gcc-16-20260725/libstdc++-v3/include/std/chrono	Sat Jul 25 22:32:19 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 131,136 ****
--- 131,143 ----
        leap_second_info
        get_leap_second_info(const utc_time<_Duration>& __ut);
  
+     /// @cond undocumented
+     namespace __detail
+     {
+       bool __recent_leap_second_info(leap_second_info&, unsigned);
+     }
+     /// @endcond
+ 
      /** A clock that measures Universal Coordinated Time (UTC).
       *
       * The epoch is 1970-01-01 00:00:00.
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 2818,2823 ****
--- 2825,2833 ----
        friend class leap_second;
        friend struct time_zone::_Impl;
        friend class time_zone_link;
+ 
+       friend bool
+       __detail::__recent_leap_second_info(leap_second_info&, unsigned);
      };
  
      class time_zone_link
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 2943,2958 ****
  	{ return __x.date() <=> __y; }
  
      private:
!       explicit leap_second(seconds::rep __s) : _M_s(__s) { }
  
        friend struct tzdb_list::_Node;
  
        friend const tzdb& reload_tzdb();
  
-       template<typename _Duration>
- 	friend leap_second_info
- 	get_leap_second_info(const utc_time<_Duration>&);
- 
        seconds _M_s; // == date().time_since_epoch() * value().count()
      };
  
--- 2953,2964 ----
  	{ return __x.date() <=> __y; }
  
      private:
!       constexpr explicit leap_second(seconds::rep __s) : _M_s(__s) { }
  
        friend struct tzdb_list::_Node;
  
        friend const tzdb& reload_tzdb();
  
        seconds _M_s; // == date().time_since_epoch() * value().count()
      };
  
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 3217,3222 ****
--- 3223,3231 ----
  
  namespace __detail
  {
+     // This function is inline to support fast conversions between utc_time
+     // and sys_time when possible, without requiring a chrono::tzdb object
+     // to be constructed.
      inline leap_second_info
      __get_leap_second_info(sys_seconds __ss, bool __is_utc)
      {
*************** namespace __detail
*** 3252,3316 ****
  	1435708800, // 1 Jul 2015
  	1483228800, // 1 Jan 2017
        };
        // The list above is known to be valid until (at least) this date
        // and only contains positive leap seconds.
        constexpr sys_seconds __expires(1798416000s); // 2026-12-28 00:00:00 UTC
  
- #if _GLIBCXX_USE_CXX11_ABI || ! _GLIBCXX_USE_DUAL_ABI
        if (__ss > __expires)
  	{
! 	  // Use updated leap_seconds from tzdb.
! 	  size_t __n = std::size(__leaps);
! 
! 	  auto __db = get_tzdb_list().begin();
! 	  auto __first = __db->leap_seconds.begin() + __n;
! 	  auto __last = __db->leap_seconds.end();
! 	  auto __pos = std::upper_bound(__first, __last, __ss);
! 	  seconds __elapsed(__n);
! 	  for (auto __i = __first; __i != __pos; ++__i)
! 	    __elapsed += __i->value();
  
! 	  if (__is_utc)
! 	    {
! 	      // Convert utc_time to sys_time:
! 	      __ss -= __elapsed;
! 	      // See if that sys_time is before (or during) previous leap sec:
! 	      if (__pos != __first && __ss < __pos[-1])
! 		{
! 		  if ((__ss + 1s) >= __pos[-1])
! 		    return {true, __elapsed};
! 		  __elapsed -= __pos[-1].value();
! 		}
! 	    }
! 	  return {false, __elapsed};
! 	}
!       else
  #endif
! 	{
! 	  seconds::rep __s = __ss.time_since_epoch().count();
! 	  const seconds::rep* __first = std::begin(__leaps);
! 	  const seconds::rep* __last = std::end(__leaps);
  
! 	  // Don't bother searching the list if we're after the last one.
! 	  if (__s > (__last[-1] + (__last - __first) + 1))
! 	    return { false, seconds(__last - __first) };
  
! 	  auto __pos = std::upper_bound(__first, __last, __s);
! 	  seconds __elapsed{__pos - __first};
! 	  if (__is_utc)
  	    {
! 	      // Convert utc_time to sys_time:
! 	      __s -= __elapsed.count();
! 	      // See if that sys_time is before (or during) previous leap sec:
! 	      if (__pos != __first && __s < __pos[-1])
! 		{
! 		  if ((__s + 1) >= __pos[-1])
! 		    return {true, __elapsed};
! 		  --__elapsed;
! 		}
  	    }
- 	  return {false, __elapsed};
  	}
      }
  } // namespace __detail
  
--- 3261,3316 ----
  	1435708800, // 1 Jul 2015
  	1483228800, // 1 Jan 2017
        };
+ 
+       // The default result for times after the last leap year.
+       constexpr leap_second_info __after_last{
+ 	.is_leap_second = false,
+ 	.elapsed = seconds(std::size(__leaps))
+       };
+ 
        // The list above is known to be valid until (at least) this date
        // and only contains positive leap seconds.
        constexpr sys_seconds __expires(1798416000s); // 2026-12-28 00:00:00 UTC
  
        if (__ss > __expires)
  	{
! #if _GLIBCXX_USE_CXX11_ABI || ! _GLIBCXX_USE_DUAL_ABI // use chrono::tzdb
! 	  // Call into the library because it might have knowledge of new
! 	  // leap seconds loaded at runtime from the tzdata files.
  
! 	  // We misuse leap_second_info here to pass {bool, seconds} inputs:
! 	  leap_second_info __info{ .is_leap_second = __is_utc,
! 				   .elapsed = __ss.time_since_epoch() };
! 	  // If this returns true, then __info holds the output result:
! 	  if (__detail::__recent_leap_second_info(__info, std::size(__leaps)))
! 	    return __info;
  #endif
! 	  return __after_last;
! 	}
  
!       seconds::rep __s = __ss.time_since_epoch().count();
!       const seconds::rep* __first = std::begin(__leaps);
!       const seconds::rep* __last = std::end(__leaps);
  
!       // Don't bother searching the list if we're after the last one.
!       if (__s > (__last[-1] + (__last - __first) + 1))
! 	return __after_last;
! 
!       auto __pos = std::upper_bound(__first, __last, __s);
!       seconds __elapsed{__pos - __first};
!       if (__is_utc)
! 	{
! 	  // Convert utc_time to sys_time:
! 	  __s -= __elapsed.count();
! 	  // See if that sys_time is before (or during) previous leap sec:
! 	  if (__pos != __first && __s < __pos[-1])
  	    {
! 	      if ((__s + 1) >= __pos[-1])
! 		return {true, __elapsed};
! 	      --__elapsed;
  	    }
  	}
+       return {false, __elapsed};
      }
  } // namespace __detail
  
diff -Nrcpad gcc-16-20260718/libstdc++-v3/include/std/format gcc-16-20260725/libstdc++-v3/include/std/format
*** gcc-16-20260718/libstdc++-v3/include/std/format	Sat Jul 18 22:32:20 2026
--- gcc-16-20260725/libstdc++-v3/include/std/format	Sat Jul 25 22:32:19 2026
*************** namespace __format
*** 495,502 ****
      _Pres_c = 2, _Pres_x, _Pres_X, _Pres_d, _Pres_o, _Pres_b, _Pres_B,
      // Presentation types for floating-point types
      _Pres_g = 1, _Pres_G, _Pres_a, _Pres_A, _Pres_e, _Pres_E, _Pres_f, _Pres_F,
!     // For pointers, the value are same as hexadecimal presentations for integers
!     _Pres_p = _Pres_x, _Pres_P = _Pres_X,
      _Pres_max = 0xf,
    };
    using enum _Pres_type;
--- 495,501 ----
      _Pres_c = 2, _Pres_x, _Pres_X, _Pres_d, _Pres_o, _Pres_b, _Pres_B,
      // Presentation types for floating-point types
      _Pres_g = 1, _Pres_G, _Pres_a, _Pres_A, _Pres_e, _Pres_E, _Pres_f, _Pres_F,
!       _Pres_p, _Pres_P,
      _Pres_max = 0xf,
    };
    using enum _Pres_type;
*************** namespace __format
*** 1672,1677 ****
--- 1671,1677 ----
  	    case _Pres_c:
  	      return _M_format_character(_S_to_character(__i), __fc);
  #endif
+ 	    default: // Fallback for _Pres_type values introduces in later versions.
  	    case _Pres_none:
  	      // Should not reach here with _Pres_none for bool or charT, so:
  	      [[fallthrough]];
*************** namespace __format
*** 1695,1702 ****
  		  *__p = std::toupper(*__p);
  #endif
  	      break;
- 	    default:
- 	      __builtin_unreachable();
  	  }
  
  	  if (_M_spec._M_alt && __base_prefix.size())
--- 1695,1700 ----
*************** namespace __format
*** 1707,1713 ****
  	    }
  	  __start = __format::__put_sign(__i, _M_spec._M_sign, __start - 1);
  
- 
  	  string_view __narrow_str(__start, __res.ptr - __start);
  	  size_t __prefix_len = __start_digits - __start;
  	  if constexpr (is_same_v<char, _CharT>)
--- 1705,1710 ----
*************** namespace __format
*** 2081,2103 ****
  	  if (__use_prec)
  	    __prec = _M_spec._M_get_precision(__fc);
  
- 	  char* __start = __buf + 1; // reserve space for sign
- 	  char* __end = __buf + sizeof(__buf);
- 
  	  chars_format __fmt{};
  	  bool __upper = false;
  	  bool __trailing_zeros = false;
  	  char __expc = 'e';
  
  	  switch (_M_spec._M_type)
  	  {
  	    case _Pres_A:
  	      __upper = true;
  	      __expc = 'P';
  	      [[fallthrough]];
  	    case _Pres_a:
! 	      if (_M_spec._M_type != _Pres_A)
! 		__expc = 'p';
  	      __fmt = chars_format::hex;
  	      break;
  	    case _Pres_E:
--- 2078,2106 ----
  	  if (__use_prec)
  	    __prec = _M_spec._M_get_precision(__fc);
  
  	  chars_format __fmt{};
  	  bool __upper = false;
  	  bool __trailing_zeros = false;
  	  char __expc = 'e';
+ 	  size_t __offset = 1; // reserve space for sign
  
  	  switch (_M_spec._M_type)
  	  {
+ 	    case _Pres_P:
+ 	      if (__builtin_isfinite(__v))
+ 	        __offset += 2; // reserve space for prefix
+ 	      [[fallthrough]];
  	    case _Pres_A:
  	      __upper = true;
  	      __expc = 'P';
+ 	      __fmt = chars_format::hex;
+ 	      break;
+ 	    case _Pres_p:
+ 	      if (__builtin_isfinite(__v))
+ 	        __offset += 2; // reserve space for prefix
  	      [[fallthrough]];
  	    case _Pres_a:
! 	      __expc = 'p';
  	      __fmt = chars_format::hex;
  	      break;
  	    case _Pres_E:
*************** namespace __format
*** 2124,2137 ****
  	      __use_prec = true;
  	      __fmt = chars_format::general;
  	      break;
  	    case _Pres_none:
  	      if (__use_prec)
  		__fmt = chars_format::general;
  	      break;
- 	    default:
- 	      __builtin_unreachable();
  	  }
  
  	  // Write value into buffer using std::to_chars.
  	  auto __to_chars = [&](char* __b, char* __e) {
  	    if (__use_prec)
--- 2127,2142 ----
  	      __use_prec = true;
  	      __fmt = chars_format::general;
  	      break;
+ 	    default: // Fallback for _Pres_type values introduces in later versions.
  	    case _Pres_none:
  	      if (__use_prec)
  		__fmt = chars_format::general;
  	      break;
  	  }
  
+ 	  char* __start = __buf + __offset;
+ 	  char* __end = __buf + sizeof(__buf);
+ 
  	  // Write value into buffer using std::to_chars.
  	  auto __to_chars = [&](char* __b, char* __e) {
  	    if (__use_prec)
*************** namespace __format
*** 2149,2155 ****
  	    {
  	      // If the buffer is too small it's probably because of a large
  	      // precision, or a very large value in fixed format.
! 	      size_t __guess = 8 + __prec;
  	      if (__fmt == chars_format::fixed) // +ddd.prec
  		{
  		  if constexpr (is_same_v<_Fp, float> || is_same_v<_Fp, double>
--- 2154,2160 ----
  	    {
  	      // If the buffer is too small it's probably because of a large
  	      // precision, or a very large value in fixed format.
! 	      size_t __guess = 7 + __offset + __prec;
  	      if (__fmt == chars_format::fixed) // +ddd.prec
  		{
  		  if constexpr (is_same_v<_Fp, float> || is_same_v<_Fp, double>
*************** namespace __format
*** 2180,2207 ****
  		  // instantiated with it, was fixed in ABI 18 (G++ 13).  Since
  		  // <format> was new in G++ 13, and is experimental, that
  		  // isn't a problem.
! 		  auto __overwrite = [&__to_chars, &__res] (char* __p, size_t __n)
  		  {
! 		    __res = __to_chars(__p + 1, __p + __n - 1);
  		    return __res.ec == errc{} ? __res.ptr - __p : 0;
  		  };
  
  		  __dynbuf.__resize_and_overwrite(__dynbuf.capacity() * 2,
  						  __overwrite);
! 		  __start = __dynbuf.data() + 1; // reserve space for sign
  		  __end = __dynbuf.data() + __dynbuf.size();
  		}
  	      while (__builtin_expect(__res.ec == errc::value_too_large, 0));
  	  }
  
! 	  // Use uppercase for 'A', 'E', and 'G' formats.
  	  if (__upper)
  	    {
  	      for (char* __p = __start; __p != __res.ptr; ++__p)
  		*__p = std::toupper(*__p);
  	    }
  
- 	  bool __have_sign = true;
  	  // Add sign for non-negative values.
  	  if (!__builtin_signbit(__v))
  	    {
--- 2185,2220 ----
  		  // instantiated with it, was fixed in ABI 18 (G++ 13).  Since
  		  // <format> was new in G++ 13, and is experimental, that
  		  // isn't a problem.
! 		  auto __overwrite = [&__to_chars, &__res, __offset] (char* __p, size_t __n)
  		  {
! 		    __res = __to_chars(__p + __offset, __p + __n - __offset);
  		    return __res.ec == errc{} ? __res.ptr - __p : 0;
  		  };
  
  		  __dynbuf.__resize_and_overwrite(__dynbuf.capacity() * 2,
  						  __overwrite);
! 		  __start = __dynbuf.data() + __offset; // reserve space for sign and prefix
  		  __end = __dynbuf.data() + __dynbuf.size();
  		}
  	      while (__builtin_expect(__res.ec == errc::value_too_large, 0));
  	  }
  
!           if (__offset == 3)
! 	    {
! 	      __start -= 2;
! 	      if (__builtin_signbit(__v))
! 	        ranges::copy(string_view("-0x"), __start);
! 	      else
! 	        ranges::copy(string_view("0x"), __start);
! 	    }
! 
! 	  // Use uppercase for 'A', 'P', 'E', and 'G' formats.
  	  if (__upper)
  	    {
  	      for (char* __p = __start; __p != __res.ptr; ++__p)
  		*__p = std::toupper(*__p);
  	    }
  
  	  // Add sign for non-negative values.
  	  if (!__builtin_signbit(__v))
  	    {
*************** namespace __format
*** 2210,2216 ****
  	      else if (_M_spec._M_sign == _Sign_space)
  		*--__start = ' ';
  	      else
! 		__have_sign = false;
  	    }
  
  	  string_view __narrow_str(__start, __res.ptr - __start);
--- 2223,2229 ----
  	      else if (_M_spec._M_sign == _Sign_space)
  		*--__start = ' ';
  	      else
! 		--__offset;
  	    }
  
  	  string_view __narrow_str(__start, __res.ptr - __start);
*************** namespace __format
*** 2234,2242 ****
  		  if (__trailing_zeros)
  		    {
  		      // Find number of digits after first significant figure.
! 		      if (__s[__have_sign] != '0')
  			// A string like "D.D" or "-D.DDD"
! 			__sigfigs = __p - __have_sign - 1;
  		      else
  			// A string like "0.D" or "-0.0DD".
  			// Safe to assume there is a non-zero digit, because
--- 2247,2255 ----
  		  if (__trailing_zeros)
  		    {
  		      // Find number of digits after first significant figure.
! 		      if (__s[__offset] != '0')
  			// A string like "D.D" or "-D.DDD"
! 			__sigfigs = __p - __offset - 1;
  		      else
  			// A string like "0.D" or "-0.0DD".
  			// Safe to assume there is a non-zero digit, because
*************** namespace __format
*** 2250,2256 ****
  		  if (__p == __s.npos)
  		    __p = __s.size();
  		  __d = __p; // Position where '.' should be inserted.
! 		  __sigfigs = __d - __have_sign;
  		}
  
  	      if (__trailing_zeros && __prec != 0)
--- 2263,2269 ----
  		  if (__p == __s.npos)
  		    __p = __s.size();
  		  __d = __p; // Position where '.' should be inserted.
! 		  __sigfigs = __d - __offset;
  		}
  
  	      if (__trailing_zeros && __prec != 0)
*************** namespace __format
*** 2314,2320 ****
  
  	  if (_M_spec._M_localized && __builtin_isfinite(__v))
  	    {
! 	      auto __s = _M_localize(__str, __expc, __fc.locale());
  	      if (!__s.empty())
  		__str = __wstr = std::move(__s);
  	    }
--- 2327,2333 ----
  
  	  if (_M_spec._M_localized && __builtin_isfinite(__v))
  	    {
! 	      auto __s = _M_localize(__str, __expc, __offset, __fc.locale());
  	      if (!__s.empty())
  		__str = __wstr = std::move(__s);
  	    }
*************** namespace __format
*** 2335,2345 ****
  	      if (_M_spec._M_zero_fill && __builtin_isfinite(__v))
  		{
  		  __fill_char = _CharT('0');
! 		  // Write sign before zero filling.
! 		  if (!__format::__is_xdigit(__narrow_str[0]))
  		    {
! 		      *__out++ = __str[0];
! 		      __str.remove_prefix(1);
  		    }
  		}
  	      else
--- 2348,2357 ----
  	      if (_M_spec._M_zero_fill && __builtin_isfinite(__v))
  		{
  		  __fill_char = _CharT('0');
! 		  if (__offset > 0)
  		    {
! 		      __out = __format::__write(__out, __str.substr(0, __offset));
! 		      __str.remove_prefix(__offset);
  		    }
  		}
  	      else
*************** namespace __format
*** 2352,2358 ****
        // Locale-specific format.
        basic_string<_CharT>
        _M_localize(basic_string_view<_CharT> __str, char __expc,
! 		  const locale& __loc) const
        {
  	basic_string<_CharT> __lstr;
  
--- 2364,2370 ----
        // Locale-specific format.
        basic_string<_CharT>
        _M_localize(basic_string_view<_CharT> __str, char __expc,
! 		  int __offset, const locale& __loc) const
        {
  	basic_string<_CharT> __lstr;
  
*************** namespace __format
*** 2400,2415 ****
  	  __e = __str.size();
  	const size_t __r = __str.size() - __e; // Length of remainder.
  	auto __overwrite = [&](_CharT* __p, size_t) {
  	  // Apply grouping to the digits before the radix or exponent.
! 	  int __off = 0;
! 	  if (auto __c = __str.front(); __c == '-' || __c == '+' || __c == ' ')
! 	    {
! 	      *__p = __c;
! 	      __off = 1;
! 	    }
! 	  auto __end = std::__add_grouping(__p + __off, __np.thousands_sep(),
  					   __grp.data(), __grp.size(),
! 					   __str.data() + __off,
  					   __str.data() + __e);
  	  if (__r) // If there's a fractional part or exponent
  	    {
--- 2412,2423 ----
  	  __e = __str.size();
  	const size_t __r = __str.size() - __e; // Length of remainder.
  	auto __overwrite = [&](_CharT* __p, size_t) {
+ 	  // Copy any +/- sign and "0x" prefix
+ 	  ranges::copy_n(__str.data(), __offset, __p); 
  	  // Apply grouping to the digits before the radix or exponent.
! 	  auto __end = std::__add_grouping(__p + __offset, __np.thousands_sep(),
  					   __grp.data(), __grp.size(),
! 					   __str.data() + __offset,
  					   __str.data() + __e);
  	  if (__r) // If there's a fractional part or exponent
  	    {
*************** namespace __format
*** 2440,2464 ****
        __formatter_ptr() noexcept
        : _M_spec()
        {
! 	_M_spec._M_type = _Pres_p;
  	_M_spec._M_alt = true;
        }
  
        constexpr
        __formatter_ptr(_Spec<_CharT> __spec) noexcept
        : _M_spec(__spec)
!       { _M_set_default(_Pres_p); }
  
        constexpr typename basic_format_parse_context<_CharT>::iterator
!       parse(basic_format_parse_context<_CharT>& __pc, _Pres_type __type = _Pres_p)
        {
  	__format::_Spec<_CharT> __spec{};
  	const auto __last = __pc.end();
  	auto __first = __pc.begin();
  
! 	auto __finalize = [this, &__spec, __type] {
  	  _M_spec = __spec;
! 	  _M_set_default(__type);
  	};
  
  	auto __finished = [&] {
--- 2448,2472 ----
        __formatter_ptr() noexcept
        : _M_spec()
        {
! 	_M_spec._M_type = _Pres_x;
  	_M_spec._M_alt = true;
        }
  
        constexpr
        __formatter_ptr(_Spec<_CharT> __spec) noexcept
        : _M_spec(__spec)
!       { _M_set_default(); }
  
        constexpr typename basic_format_parse_context<_CharT>::iterator
!       parse(basic_format_parse_context<_CharT>& __pc)
        {
  	__format::_Spec<_CharT> __spec{};
  	const auto __last = __pc.end();
  	auto __first = __pc.begin();
  
! 	auto __finalize = [this, &__spec] {
  	  _M_spec = __spec;
! 	  _M_set_default();
  	};
  
  	auto __finished = [&] {
*************** namespace __format
*** 2491,2505 ****
  
  	if (*__first == 'p')
  	  {
! 	    __spec._M_type = _Pres_p;
! 	    __spec._M_alt = !__spec._M_alt;
  	    ++__first;
  	  }
  #if __glibcxx_format >= 202304L
  	else if (*__first == 'P')
  	  {
! 	    __spec._M_type = _Pres_P;
! 	    __spec._M_alt = !__spec._M_alt;
  	    ++__first;
  	  }
  #endif
--- 2499,2513 ----
  
  	if (*__first == 'p')
  	  {
! 	    __spec._M_type = _Pres_x;
! 	    __spec._M_alt = true;
  	    ++__first;
  	  }
  #if __glibcxx_format >= 202304L
  	else if (*__first == 'P')
  	  {
! 	    __spec._M_type = _Pres_X;
! 	    __spec._M_alt = true;
  	    ++__first;
  	  }
  #endif
*************** namespace __format
*** 2521,2532 ****
      private:
        [[__gnu__::__always_inline__]]
        constexpr void
!       _M_set_default(_Pres_type __type)
        {
! 	if (_M_spec._M_type == _Pres_none && __type != _Pres_none)
  	{
! 	  _M_spec._M_type = __type;
! 	  _M_spec._M_alt = !_M_spec._M_alt;
  	}
        }
  
--- 2529,2540 ----
      private:
        [[__gnu__::__always_inline__]]
        constexpr void
!       _M_set_default()
        {
! 	if (_M_spec._M_type == _Pres_none)
  	{
! 	  _M_spec._M_type = _Pres_x;
! 	  _M_spec._M_alt = true;
  	}
        }
  
*************** namespace __format
*** 4321,4332 ****
        template<typename _Visitor>
  	decltype(auto)
  	visit(this basic_format_arg __arg, _Visitor&& __vis)
! 	{ return __arg._M_visit_user(std::forward<_Visitor>(__vis), __arg._M_type); }
  
        template<typename _Res, typename _Visitor>
  	_Res
  	visit(this basic_format_arg __arg, _Visitor&& __vis)
! 	{ return __arg._M_visit_user(std::forward<_Visitor>(__vis), __arg._M_type); }
  #endif
  
      private:
--- 4329,4340 ----
        template<typename _Visitor>
  	decltype(auto)
  	visit(this basic_format_arg __arg, _Visitor&& __vis)
! 	{ return __arg._M_visit_user(std::forward<_Visitor>(__vis)); }
  
        template<typename _Res, typename _Visitor>
  	_Res
  	visit(this basic_format_arg __arg, _Visitor&& __vis)
! 	{ return __arg._M_visit_user(std::forward<_Visitor>(__vis)); }
  #endif
  
      private:
*************** namespace __format
*** 4539,4551 ****
  	friend consteval __format::_Arg_t
  	__format::__to_arg_t_enum() noexcept;
  
        template<typename _Visitor>
  	decltype(auto)
! 	_M_visit(_Visitor&& __vis, __format::_Arg_t __type)
  	{
! 	  using namespace __format;
! 	  switch (__type)
  	  {
  	    case _Arg_none:
  	      return std::forward<_Visitor>(__vis)(_M_val._M_none);
  	    case _Arg_bool:
--- 4547,4563 ----
  	friend consteval __format::_Arg_t
  	__format::__to_arg_t_enum() noexcept;
  
+       [[__gnu__::__noinline__]]
+       handle
+       _M_handle_unrecognized() const;
+ 
        template<typename _Visitor>
  	decltype(auto)
! 	_M_visit(_Visitor&& __vis)
  	{
! 	  switch (_M_type)
  	  {
+ 	    using enum __format::_Arg_t;
  	    case _Arg_none:
  	      return std::forward<_Visitor>(__vis)(_M_val._M_none);
  	    case _Arg_bool:
*************** namespace __format
*** 4610,4622 ****
  	      return std::forward<_Visitor>(__vis)(_M_val._M_u128);
  #endif
  	    default:
! 	      __builtin_unreachable();
  	  }
  	}
  
        template<typename _Visitor>
  	decltype(auto)
! 	_M_visit_user(_Visitor&& __vis, __format::_Arg_t __type)
  	{
  	  return _M_visit([&__vis]<typename _Tp>(_Tp& __val) -> decltype(auto)
  	    {
--- 4622,4638 ----
  	      return std::forward<_Visitor>(__vis)(_M_val._M_u128);
  #endif
  	    default:
! 	      // Call exported definition of _M_handle_unrecognized from
! 	      // libstdc++.so, that should recognize new _Arg_t values and
! 	      // return basic_format_arg, containing a handle to that value.
! 	      handle __h = _M_handle_unrecognized();
! 	      return std::forward<_Visitor>(__vis)(__h);
  	  }
  	}
  
        template<typename _Visitor>
  	decltype(auto)
! 	_M_visit_user(_Visitor&& __vis)
  	{
  	  return _M_visit([&__vis]<typename _Tp>(_Tp& __val) -> decltype(auto)
  	    {
*************** namespace __format
*** 4633,4639 ****
  		 handle __h(__val);
  		 return std::forward<_Visitor>(__vis)(__h);
  	       }
! 	   }, __type);
  	}
      };
  
--- 4649,4655 ----
  		 handle __h(__val);
  		 return std::forward<_Visitor>(__vis)(__h);
  	       }
! 	  });
  	}
      };
  
*************** namespace __format
*** 4641,4649 ****
      _GLIBCXX26_DEPRECATED_SUGGEST("std::basic_format_arg::visit")
      inline decltype(auto)
      visit_format_arg(_Visitor&& __vis, basic_format_arg<_Context> __arg)
!     {
!       return __arg._M_visit_user(std::forward<_Visitor>(__vis), __arg._M_type);
!     }
  
  /// @cond undocumented
  namespace __format
--- 4657,4663 ----
      _GLIBCXX26_DEPRECATED_SUGGEST("std::basic_format_arg::visit")
      inline decltype(auto)
      visit_format_arg(_Visitor&& __vis, basic_format_arg<_Context> __arg)
!     { return __arg._M_visit_user(std::forward<_Visitor>(__vis)); }
  
  /// @cond undocumented
  namespace __format
*************** namespace __format
*** 4651,4659 ****
    template<typename _Visitor, typename _Ctx>
      inline decltype(auto)
      __visit_format_arg(_Visitor&& __vis, basic_format_arg<_Ctx> __arg)
!     {
!       return __arg._M_visit(std::forward<_Visitor>(__vis), __arg._M_type);
!     }
  
    struct _WidthPrecVisitor
    {
--- 4665,4671 ----
    template<typename _Visitor, typename _Ctx>
      inline decltype(auto)
      __visit_format_arg(_Visitor&& __vis, basic_format_arg<_Ctx> __arg)
!     { return __arg._M_visit(std::forward<_Visitor>(__vis)); }
  
    struct _WidthPrecVisitor
    {
*************** namespace __format
*** 4980,4985 ****
--- 4992,5017 ----
        void advance_to(iterator __it) { _M_out = std::move(__it); }
      };
  
+ #if _GLIBCXX_EXTERN_TEMPLATE
+    // The defintion _M_handle_unrecognized is placed in format-inst.cc
+    // source file, to ensure that it will not be inlined by compiler.
+    extern template basic_format_arg<format_context>::handle
+      basic_format_arg<format_context>::_M_handle_unrecognized() const;
+ # ifdef _GLIBCXX_USE_WCHAR_T
+    extern template basic_format_arg<wformat_context>::handle
+      basic_format_arg<wformat_context>::_M_handle_unrecognized() const;
+ # endif
+ #else
+   template<typename _Context>
+     typename basic_format_arg<_Context>::handle
+     basic_format_arg<_Context>::_M_handle_unrecognized() const
+     {
+       // If _M_type corresponds to a new value of _Arg_t introduced after
+       // GCC 16, this function should return a handle that refers to the 
+       // union member of _M_val corresponding to that _Arg_t value.	    
+       __throw_format_error("format error: unrecognized argument type");
+     }
+ #endif
  
  /// @cond undocumented
  namespace __format
*************** namespace __format
*** 5299,5305 ****
  // instantiates formatters for types stored in basic_format_arg, we can
  // support only single encoding, in this case unicode. This should cover
  // most common use cases.
! #if __cplusplus <= 202002L && _GLIBCXX_EXTERN_TEMPLATE > 0
      extern template _Sink_iter<char>
        __do_vformat_to<char, 1>(_Sink_iter<char>, string_view,
  			       format_context&);
--- 5331,5337 ----
  // instantiates formatters for types stored in basic_format_arg, we can
  // support only single encoding, in this case unicode. This should cover
  // most common use cases.
! #if __cplusplus <= 202002L && _GLIBCXX_EXTERN_TEMPLATE
      extern template _Sink_iter<char>
        __do_vformat_to<char, 1>(_Sink_iter<char>, string_view,
  			       format_context&);
diff -Nrcpad gcc-16-20260718/libstdc++-v3/include/std/mdspan gcc-16-20260725/libstdc++-v3/include/std/mdspan
*** gcc-16-20260718/libstdc++-v3/include/std/mdspan	Sat Jul 18 22:32:20 2026
--- gcc-16-20260725/libstdc++-v3/include/std/mdspan	Sat Jul 25 22:32:19 2026
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1897,1903 ****
  	: _M_extents(__exts)
  	{
  	  for (size_t __i = 0; __i < extents_type::rank(); ++__i)
! 	    _M_strides[__i] = index_type(as_const(__strides[__i]));
  	}
  
        template<typename _OIndexType>
--- 1897,1904 ----
  	: _M_extents(__exts)
  	{
  	  for (size_t __i = 0; __i < extents_type::rank(); ++__i)
! 	    _M_strides[__i] =
! 	      __mdspan::__index_type_cast<index_type>(as_const(__strides[__i]));
  	}
  
        template<typename _OIndexType>
diff -Nrcpad gcc-16-20260718/libstdc++-v3/include/std/ranges gcc-16-20260725/libstdc++-v3/include/std/ranges
*** gcc-16-20260718/libstdc++-v3/include/std/ranges	Sat Jul 18 22:32:20 2026
--- gcc-16-20260725/libstdc++-v3/include/std/ranges	Sat Jul 25 22:32:19 2026
*************** namespace views::__adaptor
*** 7902,7915 ****
      requires copy_constructible<_Tp>
      : _M_value(__value), _M_bound(__bound)
      {
!       if constexpr (!same_as<_Bound, unreachable_sentinel_t>)
  	__glibcxx_assert(__bound >= 0);
      }
  
      constexpr explicit
      repeat_view(_Tp&& __value, _Bound __bound = _Bound())
      : _M_value(std::move(__value)), _M_bound(__bound)
!     { }
  
      template<typename... _Args, typename... _BoundArgs>
        requires constructible_from<_Tp, _Args...>
--- 7902,7918 ----
      requires copy_constructible<_Tp>
      : _M_value(__value), _M_bound(__bound)
      {
!       if constexpr (__detail::__is_signed_integer_like<_Bound>)
  	__glibcxx_assert(__bound >= 0);
      }
  
      constexpr explicit
      repeat_view(_Tp&& __value, _Bound __bound = _Bound())
      : _M_value(std::move(__value)), _M_bound(__bound)
!     {
!       if constexpr (__detail::__is_signed_integer_like<_Bound>)
! 	__glibcxx_assert(__bound >= 0);
!     }
  
      template<typename... _Args, typename... _BoundArgs>
        requires constructible_from<_Tp, _Args...>
*************** namespace views::__adaptor
*** 7920,7926 ****
  		tuple<_BoundArgs...> __bound_args = tuple<>{})
      : _M_value(std::make_from_tuple<_Tp>(std::move(__args))),
        _M_bound(std::make_from_tuple<_Bound>(std::move(__bound_args)))
!     { }
  
      constexpr _Iterator
      begin() const
--- 7923,7932 ----
  		tuple<_BoundArgs...> __bound_args = tuple<>{})
      : _M_value(std::make_from_tuple<_Tp>(std::move(__args))),
        _M_bound(std::make_from_tuple<_Bound>(std::move(__bound_args)))
!     {
!       if constexpr (__detail::__is_signed_integer_like<_Bound>)
! 	__glibcxx_assert(_M_bound >= 0);
!     }
  
      constexpr _Iterator
      begin() const
diff -Nrcpad gcc-16-20260718/libstdc++-v3/src/c++20/format-inst.cc gcc-16-20260725/libstdc++-v3/src/c++20/format-inst.cc
*** gcc-16-20260718/libstdc++-v3/src/c++20/format-inst.cc	Sat Jul 18 22:32:20 2026
--- gcc-16-20260725/libstdc++-v3/src/c++20/format-inst.cc	Sat Jul 25 22:32:19 2026
***************
*** 27,32 ****
--- 27,51 ----
  namespace std
  {
  _GLIBCXX_BEGIN_NAMESPACE_VERSION
+ 
+   template<typename _Context>
+     typename basic_format_arg<_Context>::handle
+     basic_format_arg<_Context>::_M_handle_unrecognized() const
+     {
+       // If _M_type corresponds to a new value of _Arg_t introduced after GCC 16,
+       // this function should return a handle that refers to the union member of
+       // _M_val corresponding to that _Arg_t value.	    
+       __throw_format_error("format error: unrecognized argument type");
+     }
+ 
+  template basic_format_arg<format_context>::handle
+    basic_format_arg<format_context>::_M_handle_unrecognized() const;
+ 
+ # ifdef _GLIBCXX_USE_WCHAR_T
+  template basic_format_arg<wformat_context>::handle
+    basic_format_arg<wformat_context>::_M_handle_unrecognized() const;
+ # endif
+ 
  namespace __format
  {
  
diff -Nrcpad gcc-16-20260718/libstdc++-v3/src/c++20/tzdb.cc gcc-16-20260725/libstdc++-v3/src/c++20/tzdb.cc
*** gcc-16-20260718/libstdc++-v3/src/c++20/tzdb.cc	Sat Jul 18 22:32:20 2026
--- gcc-16-20260725/libstdc++-v3/src/c++20/tzdb.cc	Sat Jul 25 22:32:19 2026
***************
*** 36,41 ****
--- 36,42 ----
  #include <memory>     // atomic<shared_ptr<T>>
  #include <mutex>      // mutex
  #include <iomanip>    // quoted
+ #include <span>
  #if defined __GTHREADS && ! defined _GLIBCXX_HAS_GTHREADS
  # include <ext/concurrence.h> // __gnu_cxx::__mutex
  #endif
***************
*** 66,71 ****
--- 67,73 ----
  #endif
  
  #if USE_ATOMIC_SHARED_PTR && ! USE_ATOMIC_LIST_HEAD
+ // Cannot use atomic<shared_ptr<T>> without lock-free atomic<T*>.
  # error Unsupported combination
  #endif
  
*************** namespace std::chrono
*** 196,201 ****
--- 198,210 ----
      static const tzdb& _S_replace_head(shared_ptr<_Node>, shared_ptr<_Node>);
  
      static pair<vector<leap_second>, bool> _S_read_leap_seconds();
+ 
+     // This is here because _Node is a friend so can call private constructor.
+     static const leap_second fixed_leaps[];
+ 
+     // This is a member so that it can access fixed_leaps.
+     struct NumLeapSeconds;
+     static NumLeapSeconds num_leap_seconds;
    };
  
    // Implementation of the private constructor used for the singleton object.
*************** namespace std::chrono
*** 214,220 ****
    constinit atomic<tzdb_list::_Node*> tzdb_list::_Node::_S_head_cache{nullptr};
  #endif
  
!   // The data structures defined in this file (Rule, on_day, at_time etc.)
    // are used to represent the information parsed from the tzdata.zi file
    // described at https://man7.org/linux/man-pages/man8/zic.8.html#FILES
  
--- 223,229 ----
    constinit atomic<tzdb_list::_Node*> tzdb_list::_Node::_S_head_cache{nullptr};
  #endif
  
!   // The data structures defined in this file (Rule, on_month_day, at_time etc.)
    // are used to represent the information parsed from the tzdata.zi file
    // described at https://man7.org/linux/man-pages/man8/zic.8.html#FILES
  
*************** namespace std::chrono
*** 303,309 ****
      };
  
      // The IN and ON fields of a RULE record, e.g. "March lastSunday".
!     struct on_day
      {
        using rep = uint_least16_t;
        // Equivalent to Kind, chrono::month, chrono::day, chrono::weekday,
--- 312,318 ----
      };
  
      // The IN and ON fields of a RULE record, e.g. "March lastSunday".
!     struct on_month_day
      {
        using rep = uint_least16_t;
        // Equivalent to Kind, chrono::month, chrono::day, chrono::weekday,
*************** namespace std::chrono
*** 367,373 ****
  	return ymd;
        }
  
!       friend istream& operator>>(istream&, on_day&);
      };
  
      // Wrapper for two chrono::year values, which reads the FROM and TO
--- 376,383 ----
  	return ymd;
        }
  
! 
!       friend istream& operator>>(istream&, on_month_day&);
      };
  
      // Wrapper for two chrono::year values, which reads the FROM and TO
*************** namespace std::chrono
*** 478,489 ****
  
        ZoneInfo(sys_info&& info)
        : m_buf(std::move(info.abbrev)), m_expanded(true), m_save(info.save),
! 	m_offset(info.offset), m_until(info.end)
        { }
  
        ZoneInfo(const pair<sys_info, string_view>& info)
!       : m_expanded(true), m_save(info.first.save), m_offset(info.first.offset),
! 	m_until(info.first.end)
        {
  	if (info.second.size())
  	  {
--- 488,500 ----
  
        ZoneInfo(sys_info&& info)
        : m_buf(std::move(info.abbrev)), m_expanded(true), m_save(info.save),
! 	m_offset(info.offset - seconds(info.save)), m_until(info.end)
        { }
  
        ZoneInfo(const pair<sys_info, string_view>& info)
!       : m_expanded(true), m_save(info.first.save),
! 	m_offset(info.first.offset - seconds(info.first.save)),
!        	m_until(info.first.end)
        {
  	if (info.second.size())
  	  {
*************** namespace std::chrono
*** 494,500 ****
  	m_buf += info.first.abbrev;
        }
  
!       // STDOFF: Seconds from UTC during standard time.
        seconds
        offset() const noexcept { return m_offset; }
  
--- 505,511 ----
  	m_buf += info.first.abbrev;
        }
  
!       // STDOFF: Seconds from UTC during standard time (without any save).
        seconds
        offset() const noexcept { return m_offset; }
  
*************** namespace std::chrono
*** 539,545 ****
  	  return false;
  
  	info.end = until();
! 	info.offset = offset();
  	info.save = minutes(m_save);
  	info.abbrev = format();
  	format_abbrev_str(info); // expand %z
--- 550,556 ----
  	  return false;
  
  	info.end = until();
! 	info.offset = offset() + seconds(m_save);
  	info.save = minutes(m_save);
  	info.abbrev = format();
  	format_abbrev_str(info); // expand %z
*************** namespace std::chrono
*** 589,597 ****
      // A RULE record from the tzdata.zi timezone info file.
      struct Rule
      {
!       // This allows on_day to reuse padding of at_time.
        // This keeps the size to 8 bytes and the alignment to 4 bytes.
!       struct datetime : at_time { on_day day; };
  
        // TODO combining name+letters into a single string (like in ZoneInfo)
        // would save sizeof(string) and make Rule fit in a single cacheline.
--- 600,608 ----
      // A RULE record from the tzdata.zi timezone info file.
      struct Rule
      {
!       // This allows on_month_day to reuse padding of at_time.
        // This keeps the size to 8 bytes and the alignment to 4 bytes.
!       struct datetime : at_time { on_month_day day; };
  
        // TODO combining name+letters into a single string (like in ZoneInfo)
        // would save sizeof(string) and make Rule fit in a single cacheline.
*************** namespace std::chrono
*** 653,669 ****
  	    << ' ' << r.when.day.get_month() << ' ';
  	switch (r.when.day.kind)
  	{
! 	case on_day::DayOfMonth:
  	  out << (unsigned)r.when.day.get_day();
  	  break;
! 	case on_day::LastWeekday:
  	  out << "last" << weekday(r.when.day.day_of_week);
  	  break;
! 	case on_day::LessEq:
  	  out << weekday(r.when.day.day_of_week) << " <= "
  	    << r.when.day.day_of_month;
  	  break;
! 	case on_day::GreaterEq:
  	  out << weekday(r.when.day.day_of_week) << " >= "
  	    << r.when.day.day_of_month;
  	  break;
--- 664,680 ----
  	    << ' ' << r.when.day.get_month() << ' ';
  	switch (r.when.day.kind)
  	{
! 	case on_month_day::DayOfMonth:
  	  out << (unsigned)r.when.day.get_day();
  	  break;
! 	case on_month_day::LastWeekday:
  	  out << "last" << weekday(r.when.day.day_of_week);
  	  break;
! 	case on_month_day::LessEq:
  	  out << weekday(r.when.day.day_of_week) << " <= "
  	    << r.when.day.day_of_month;
  	  break;
! 	case on_month_day::GreaterEq:
  	  out << weekday(r.when.day.day_of_week) << " >= "
  	    << r.when.day.day_of_month;
  	  break;
*************** namespace std::chrono
*** 678,683 ****
--- 689,835 ----
        }
  #endif
      };
+ 
+     const Rule*
+     find_active_rule(span<const Rule> rules, sys_seconds t, seconds std_offset)
+     {
+       struct Transition {
+ 	const Rule* rule;
+ 	sys_seconds when;
+       };
+ 
+       const year_month_day date(chrono::floor<days>(t));
+       // Expand the search window for a time near the end
+       // of the year which can be pushed to next/previous
+       // year by 'offset'. This assumes that 'offset' is
+       // never greater than 24h.
+       year first_year = date.year(), last_year = date.year();
+       if (std_offset.count() > 0)
+ 	if (date.month() == December && date.day() == day(31))
+ 	  ++last_year;
+       if (std_offset.count() < 0)
+ 	if (date.month() == January && date.day() == day(1))
+ 	  --first_year;
+ 
+       // Rule specifying start time as Wall time, should apply
+       // running 'save' accumulated by earlier rules. To handle
+       // that we firstly collect transitions surrounding specified
+       // time t, ignoring the 'save':
+       // * curr_tran - rule active directly before or at t,
+       // * prev_tran - rule transition before curr_tran
+       // * next_tran - rule transition directly after t
+       Transition prev_tran{nullptr, sys_seconds::min()};
+       Transition curr_tran{nullptr, sys_seconds::min()};
+       Transition next_tran{nullptr, sys_seconds::max()};
+       for (const auto& rule : rules)
+ 	{
+ 	  if (last_year < rule.from) // Rule doesn't apply yet at time t.
+ 	    break; // Rules are ordered by 'from' in ascending order.
+ 
+ 	  seconds offset{}; // appropriate for at_time::Universal
+ 	  if (rule.when.indicator == at_time::Wall
+ 	      || rule.when.indicator == at_time::Standard)
+ 	    offset = std_offset;
+ 
+ 	  // Times at which rule takes affect before (or equal) t,
+ 	  // and after t, respectively.
+ 	  sys_seconds start_before = sys_seconds::min();
+ 	  sys_seconds start_after = sys_seconds::max();
+ 	  auto for_year = [&](year y)
+ 	  {
+ 	    // Time the rule takes effect on year y:
+ 	    const sys_seconds rule_start = rule.start_time(y, offset);
+ 	    if (rule_start <= t)
+ 	      {
+ 		start_before = rule_start;
+ 		if (y == last_year && rule.to > y)
+ 		  start_after = rule.start_time(++y, offset);
+ 	      }
+ 	    // Do not override start_after set for first_year
+ 	    else if (rule_start < start_after)
+ 	      {
+ 		start_after = rule_start;
+ 		if (y == first_year && rule.from < y)
+ 		  start_before = rule.start_time(--y, offset);
+ 	      }
+ 	  };
+ 
+ 	  if (first_year > rule.to)
+ 	    // Rule no longer applies at time t, record last transition
+             start_before = rule.start_time(rule.to, offset);
+ 	  else if (first_year == last_year)
+ 	    for_year(first_year);
+ 	  else
+ 	   {
+ 	     // Local time may of t may be in prev/next year.
+ 	     if (first_year >= rule.from)
+ 	       for_year(first_year);
+ 	     if (last_year <= rule.to)
+ 	       for_year(last_year);
+ 	   }
+ 
+ 	  if (curr_tran.when < start_before)
+ 	    {
+ 	      prev_tran = curr_tran;
+ 	      curr_tran = {&rule, start_before};
+ 	    }
+ 	  else if (prev_tran.when < start_before)
+ 	    prev_tran = {&rule, start_before};
+ 
+ 	  if (start_after < next_tran.when)
+ 	    next_tran = {&rule, start_after};
+ 	}
+ 
+       // No rule was active at the time of t, running 'save'
+       // cannot change this output, as we have no save to apply.
+       if (!curr_tran.rule)
+ 	return nullptr;
+ 
+       auto cascade_save = [](const Rule* from, Transition& to)
+       {
+ 	if (!from || from->save == seconds(0))
+ 	  return false;
+ 	if (!to.rule || to.rule->when.indicator != at_time::Wall)
+ 	   return false;
+ 	to.when -= from->save;
+ 	return true;
+       };
+ 
+       if (cascade_save(curr_tran.rule, next_tran))
+ 	// Running save moved what we considered next_tran to time
+ 	// before or at t, in that case next_tran is active rule.
+ 	if (next_tran.when <= t)
+ 	  return next_tran.rule;
+ 
+       if (cascade_save(prev_tran.rule, curr_tran))
+ 	// Running save moved what we consider curr_tran to
+ 	// time after t, in that case prev_tran is active rule.
+ 	if (curr_tran.when > t)
+ 	  return prev_tran.rule;
+ 
+       return curr_tran.rule;
+     }
+ 
+     const Rule*
+     find_first_std(span<const Rule> rules)
+     {
+       auto is_std = [](const Rule& rule) { return !rule.save.count(); };
+       // Rules with same name are sorted by 'from' and then 'save' in ascending order.
+       auto it = ranges::find_if(rules, is_std);
+       if (it == rules.end())
+ 	return nullptr;
+ 
+       const Rule* first = &*it;
+       const year y = first->from;
+       for (const Rule& next : span<const Rule>(++it, rules.end()))
+ 	{
+ 	  if (!is_std(next) || next.from > y)
+ 	    break;
+ 	  if (next.start_time(y, {}) < first->start_time(y, {}))
+ 	    first = &next;
+ 	}
+       return first;
+     }
    } // namespace
  #endif // TZDB_DISABLED
  
*************** namespace std::chrono
*** 866,935 ****
  
      if (letters.empty())
        {
- 	sys_seconds t = info.begin - seconds(1);
- 	const year_month_day date(chrono::floor<days>(t));
- 
  	// Try to find a Rule active before this time, to get initial
  	// SAVE and LETTERS values. There may not be a Rule for the period
  	// before the first DST transition, so find the earliest DST->STD
  	// transition and use the LETTERS from that.
! 	const Rule* active_rule = nullptr;
! 	sys_seconds active_rule_start = sys_seconds::min();
! 	const Rule* first_std = nullptr;
! 	for (const auto& rule : rules)
! 	  {
! 	    if (rule.save == minutes(0))
! 	      {
! 		if (!first_std)
! 		  first_std = &rule;
! 		else if (rule.from < first_std->from)
! 		  first_std = &rule;
! 		else if (rule.from == first_std->from)
! 		  {
! 		    if (rule.start_time(rule.from, {})
! 			  < first_std->start_time(first_std->from, {}))
! 		      first_std = &rule;
! 		  }
! 	      }
! 
! 	    year y = date.year();
! 
! 	    if (y > rule.to) // rule no longer applies at time t
! 	      continue;
! 	    if (y < rule.from) // rule doesn't apply yet at time t
! 	      continue;
! 
! 	    sys_seconds rule_start;
! 
! 	    seconds offset{}; // appropriate for at_time::Universal
! 	    if (rule.when.indicator == at_time::Wall)
! 	      offset = info.offset;
! 	    else if (rule.when.indicator == at_time::Standard)
! 	      offset = ri.offset();
! 
! 	    // Time the rule takes effect this year:
! 	    rule_start = rule.start_time(y, offset);
! 
! 	    if (rule_start >= t && rule.from < y)
! 	      {
! 		// Try this rule in the previous year.
! 		rule_start = rule.start_time(--y, offset);
! 	      }
! 
! 	    if (active_rule_start < rule_start && rule_start < t)
! 	      {
! 		active_rule_start = rule_start;
! 		active_rule = &rule;
! 	      }
! 	  }
! 
! 	if (active_rule)
  	  {
  	    info.offset = ri.offset() + active_rule->save;
  	    info.save = chrono::duration_cast<minutes>(active_rule->save);
  	    letters = active_rule->letters;
  	  }
! 	else if (first_std)
  	  letters = first_std->letters;
        }
  
--- 1018,1034 ----
  
      if (letters.empty())
        {
  	// Try to find a Rule active before this time, to get initial
  	// SAVE and LETTERS values. There may not be a Rule for the period
  	// before the first DST transition, so find the earliest DST->STD
  	// transition and use the LETTERS from that.
! 	if (const Rule* active_rule = find_active_rule(rules, info.begin, ri.offset()))
  	  {
  	    info.offset = ri.offset() + active_rule->save;
  	    info.save = chrono::duration_cast<minutes>(active_rule->save);
  	    letters = active_rule->letters;
  	  }
! 	else if (const Rule* first_std = find_first_std(rules))
  	  letters = first_std->letters;
        }
  
*************** namespace std::chrono
*** 1016,1025 ****
  	  result_index = new_infos.size() - 1;
  	else if (result_index >= 0 && !merged)
  	  {
! 	    // Finish on a DST sys_info if possible, so that if we resume
  	    // generating sys_info objects after this time point, save=0
  	    // should be correct for the next sys_info.
! 	    if (num_after > 1 || info.save != 0min)
  	      --num_after;
  	  }
  
--- 1115,1124 ----
  	  result_index = new_infos.size() - 1;
  	else if (result_index >= 0 && !merged)
  	  {
! 	    // Finish before a STD sys_info if possible, so that if we resume
  	    // generating sys_info objects after this time point, save=0
  	    // should be correct for the next sys_info.
! 	    if (num_after > 1 || !next_rule || next_rule->save == 0s)
  	      --num_after;
  	  }
  
*************** namespace std::chrono
*** 1251,1306 ****
    }
  #endif // TZDB_DISABLED
  
    // Return leap_second values, and a bool indicating whether the values are
    // current (true), or potentially out of date (false).
    pair<vector<leap_second>, bool>
    tzdb_list::_Node::_S_read_leap_seconds()
    {
!     // This list is valid until at least 2026-12-28 00:00:00 UTC.
!     constexpr auto expires = sys_days{2026y/12/28};
!     vector<leap_second> leaps
!     {
!       (leap_second)  78796800, // 1 Jul 1972
!       (leap_second)  94694400, // 1 Jan 1973
!       (leap_second) 126230400, // 1 Jan 1974
!       (leap_second) 157766400, // 1 Jan 1975
!       (leap_second) 189302400, // 1 Jan 1976
!       (leap_second) 220924800, // 1 Jan 1977
!       (leap_second) 252460800, // 1 Jan 1978
!       (leap_second) 283996800, // 1 Jan 1979
!       (leap_second) 315532800, // 1 Jan 1980
!       (leap_second) 362793600, // 1 Jul 1981
!       (leap_second) 394329600, // 1 Jul 1982
!       (leap_second) 425865600, // 1 Jul 1983
!       (leap_second) 489024000, // 1 Jul 1985
!       (leap_second) 567993600, // 1 Jan 1988
!       (leap_second) 631152000, // 1 Jan 1990
!       (leap_second) 662688000, // 1 Jan 1991
!       (leap_second) 709948800, // 1 Jul 1992
!       (leap_second) 741484800, // 1 Jul 1993
!       (leap_second) 773020800, // 1 Jul 1994
!       (leap_second) 820454400, // 1 Jan 1996
!       (leap_second) 867715200, // 1 Jul 1997
!       (leap_second) 915148800, // 1 Jan 1999
!       (leap_second)1136073600, // 1 Jan 2006
!       (leap_second)1230768000, // 1 Jan 2009
!       (leap_second)1341100800, // 1 Jul 2012
!       (leap_second)1435708800, // 1 Jul 2015
!       (leap_second)1483228800, // 1 Jan 2017
!     };
  
! #if 0
!     // This optimization isn't valid if the file has additional leap seconds
!     // defined since the library was compiled, but the system clock has been
!     // set to a time before the hardcoded expiration date.
!     if (system_clock::now() < expires)
!       return {std::move(leaps), true};
! #endif
  
  #ifndef TZDB_DISABLED
      if (ifstream ls{zoneinfo_file(leaps_file)})
        {
! 	auto exp_year = year_month_day(expires).year();
  	std::string s, w;
  	s.reserve(80); // Avoid later reallocations.
  	while (std::getline(ls, s))
--- 1350,1589 ----
    }
  #endif // TZDB_DISABLED
  
+ // These are the same values as the array in the <chrono> header, but might
+ // contain additional leap seconds if the libstdc++.so used at runtime is
+ // newer than the <chrono> header used to compile parts of the application.
+ constexpr leap_second tzdb_list::_Node::fixed_leaps[] {
+ #define LS leap_second
+   LS(  78796800), // 1 Jul 1972
+   LS(  94694400), // 1 Jan 1973
+   LS( 126230400), // 1 Jan 1974
+   LS( 157766400), // 1 Jan 1975
+   LS( 189302400), // 1 Jan 1976
+   LS( 220924800), // 1 Jan 1977
+   LS( 252460800), // 1 Jan 1978
+   LS( 283996800), // 1 Jan 1979
+   LS( 315532800), // 1 Jan 1980
+   LS( 362793600), // 1 Jul 1981
+   LS( 394329600), // 1 Jul 1982
+   LS( 425865600), // 1 Jul 1983
+   LS( 489024000), // 1 Jul 1985
+   LS( 567993600), // 1 Jan 1988
+   LS( 631152000), // 1 Jan 1990
+   LS( 662688000), // 1 Jan 1991
+   LS( 709948800), // 1 Jul 1992
+   LS( 741484800), // 1 Jul 1993
+   LS( 773020800), // 1 Jul 1994
+   LS( 820454400), // 1 Jan 1996
+   LS( 867715200), // 1 Jul 1997
+   LS( 915148800), // 1 Jan 1999
+   LS(1136073600), // 1 Jan 2006
+   LS(1230768000), // 1 Jan 2009
+   LS(1341100800), // 1 Jul 2012
+   LS(1435708800), // 1 Jul 2015
+   LS(1483228800), // 1 Jan 2017
+   // If new leap seconds get defined they should be added here.
+   // Negative leap seconds are represented as -1 * timestamp.
+ #undef LS
+ };
+ 
+ namespace
+ {
+   // The expiry date corresponding to the list above.
+   // tzdata 2026a leapseconds list expires at 2026-12-28 00:00:00 UTC
+   constexpr seconds fixed_expiry{1798416000u};
+ }
+ 
+ // This holds the most up-to-date number of leap seconds known at runtime.
+ // Initially zero, updated when _S_read_leap_seconds() is called.
+ struct tzdb_list::_Node::NumLeapSeconds
+ {
+   // Called by __recent_leap_second_info to read num_leap_seconds.
+   unsigned
+   get()
+   {
+ #if ATOMIC_INT_LOCK_FREE == 2
+     atomic_ref<unsigned> ref(count);
+     auto num = ref.load(memory_order::relaxed);
+ 
+     if (num == std::size(_Node::fixed_leaps))
+       // A leapseconds file has been read and has no new leap seconds.
+       return num;
+ 
+     if (num == 0)
+       // No leapseconds file has been read yet.
+       return 0;
+ 
+     // The tzdb_list has been initialized and contains a tzdb object with
+     // new leap seconds, which the caller is going to use.
+     // The relaxed load above does not synchronize with anything, so to
+     // ensure that the get_tzdb_list() in the caller will see a tzdb object
+     // set by _S_replace_head, we load num_leap_seconds again with acquire
+     // ordering:
+     return ref.load(memory_order::acquire);
+ #else
+     lock_guard<mutex> l(list_mutex()); // This ensures acquire ordering.
+     return count;
+ #endif
+   }
+ 
+   // Called by __recent_leap_second_info to set num_leap_seconds when
+   // we have determined there are no new leap seconds in a leapseconds file.
+   void
+   set_to_fixed_size()
+   {
+ #if ATOMIC_INT_LOCK_FREE == 2
+     atomic_ref<unsigned> ref(count);
+     unsigned expected = 0;
+     ref.compare_exchange_strong(expected, std::size(_Node::fixed_leaps),
+ 				memory_order::relaxed);
+ #else
+     lock_guard<mutex> l(list_mutex());
+     if (count == 0)
+       count = std::size(_Node::fixed_leaps);
+ #endif
+   }
+ 
+   // Called by _Node::_S_replace_head
+   // The two versions are named differently so that caller has to be explicit
+   // about which version it calls, based on whether the mutex is held.
+   void
+   set(unsigned val)
+   {
+ #if ATOMIC_INT_LOCK_FREE == 2
+     atomic_ref<unsigned> ref(count);
+     // The release op here synchronizes with the acquire op in get().
+     ref.store(val, memory_order::release);
+ #else
+     lock_guard<mutex> l(list_mutex());
+     count = val;
+ #endif
+   }
+ 
+   void
+   set_locked(unsigned val, const lock_guard<mutex>&)
+   {
+ #if ATOMIC_INT_LOCK_FREE == 2
+     // Even though the caller locked the mutex, we still need to use an
+     // atomic store in this case, because there could be concurrent loads.
+     set(val);
+ #else
+     // The only caller of this function locks list_mutex() so we would
+     // deadlock if we locked it again here.
+     count = val;
+ #endif
+   }
+ 
+ private:
+   unsigned count = 0;
+ };
+ 
+ constinit tzdb_list::_Node::NumLeapSeconds tzdb_list::_Node::num_leap_seconds;
+ 
+   namespace __detail
+   {
+     // Called by chrono::__detail::__get_leap_second_info in <chrono>
+     // to get leap_second_info for times after the expiry date in the header.
+     // The caller provides the time being queried in `info.elapsed` and
+     // whether that is a UTC time in `info.is_leap_second`.
+     // If it returns true, this function did the lookup and updated `info`.
+     // If this returns false, it means the hardcoded list of leap seconds
+     // in the header should be used for the lookup.
+     bool
+     __recent_leap_second_info(leap_second_info& info,
+ 			      unsigned num_positive_leaps)
+     {
+       // Extract the input args from info:
+       const auto [is_utc, secs] = info;
+       // And then reuse info for the output result:
+       info.is_leap_second = false;
+       info.elapsed = seconds(num_positive_leaps);
+ 
+       auto update_info = [&](span<const leap_second> leaps)
+       {
+ 	if (leaps.size() == num_positive_leaps)
+ 	  return false; // No new leap seconds, use the array in the header.
+ 
+ 	// info.elapsed already contains the first N leap seconds,
+ 	// so we only search the end of the span.
+ 	auto first = leaps.begin() + num_positive_leaps;
+ 	auto pos = std::upper_bound(first, leaps.end(), sys_seconds(secs));
+ 	for (auto i = first; i != pos; ++i)
+ 	  info.elapsed += i->value();
+ 
+ 	if (is_utc)
+ 	  {
+ 	    // This should never happen, but check it so that pos[-1] is valid:
+ 	    if (num_positive_leaps == 0) [[unlikely]]
+ 	      return false;
+ 
+ 	    // Convert utc_time to sys_time:
+ 	    sys_seconds ss(secs - info.elapsed);
+ 	    // See if that sys_time is before (or during) previous leap sec:
+ 	    if (ss < pos[-1])
+ 	      {
+ 		if ((ss + 1s) >= pos[-1])
+ 		  info.is_leap_second = true;
+ 		else
+ 		  info.elapsed -= pos[-1].value();
+ 	      }
+ 	  }
+ 	return true;
+       };
+ 
+       using _Node = tzdb_list::_Node;
+ 
+       // If the caller was compiled using an older GCC with an older expiry
+       // time in the header than the `fixed_expiry` defined above, we might
+       // be able to answer the query easily using the static `fixed_leaps`.
+       if (secs <= fixed_expiry)
+ 	return update_info(_Node::fixed_leaps);
+ 
+       constexpr auto num_fixed_leaps = std::size(_Node::fixed_leaps);
+ 
+       auto num_leaps = _Node::num_leap_seconds.get();
+       if (num_leaps == num_fixed_leaps)
+ 	// A leapseconds file has been read and has no new leap seconds:
+ 	return update_info(_Node::fixed_leaps);
+       else if (num_leaps == 0)
+ 	{
+ 	  // The tzdb_list has not been initialized yet, so we don't know
+ 	  // the correct number of leap seconds.
+ 	  // We use _S_read_leap_seconds() to read the leapseconds file.
+ 	  // If that tells us there are no new leapseconds, we don't need
+ 	  // to parse all of tzdata.zi and initialize a whole tzdb object.
+ 	  if (_Node::_S_read_leap_seconds().first.size() == num_fixed_leaps)
+ 	    {
+ 	      // There are no new leap seconds. Remember that so that the next
+ 	      // call to this function can just use fixed_leaps.
+ 	      _Node::num_leap_seconds.set_to_fixed_size();
+ 	      return update_info(_Node::fixed_leaps);
+ 	    }
+ 	  // else there are new leap seconds. We init tzdb_list so that the
+ 	  // new leap seconds are persisted in a tzdb object.
+ 	}
+ 
+       // Use updated leap_seconds from tzdb.
+       return update_info(get_tzdb_list().begin()->leap_seconds);
+     }
+   }
+ 
    // Return leap_second values, and a bool indicating whether the values are
    // current (true), or potentially out of date (false).
    pair<vector<leap_second>, bool>
    tzdb_list::_Node::_S_read_leap_seconds()
    {
!     // Populate the vector with the leap seconds we already know about:
!     vector<leap_second> leaps(fixed_leaps, std::end(fixed_leaps));
  
!     bool read_leaps_file = false;
  
  #ifndef TZDB_DISABLED
      if (ifstream ls{zoneinfo_file(leaps_file)})
        {
! 	constexpr year exp_year
! 	  = year_month_day(sys_days(duration_cast<days>(fixed_expiry))).year();
! 
  	std::string s, w;
  	s.reserve(80); // Avoid later reallocations.
  	while (std::getline(ls, s))
*************** namespace std::chrono
*** 1309,1314 ****
--- 1592,1598 ----
  
  	    if (!s.starts_with("Leap"))
  	      continue;
+ 
  	    istringstream li(std::move(s));
  	    li.exceptions(ios::failbit);
  	    li.ignore(4);
*************** namespace std::chrono
*** 1339,1350 ****
  		      leaps.push_back(ls);
  		  }
  	      }
! 	    s = std::move(li).str(); // return storage to s
  	  }
! 	return {std::move(leaps), true};
        }
  #endif
!     return {std::move(leaps), false};
    }
  
  #ifndef TZDB_DISABLED
--- 1623,1636 ----
  		      leaps.push_back(ls);
  		  }
  	      }
! 	    s = std::move(li).str(); // give allocated storage back to s
  	  }
! 
! 	read_leaps_file = true;
        }
  #endif
! 
!     return {std::move(leaps), read_leaps_file};
    }
  
  #ifndef TZDB_DISABLED
*************** namespace std::chrono
*** 1402,1409 ****
  	new_head_ptr->next = curr;
        }
      // XXX small window here where _S_head_cache still points to previous tzdb.
  #else
!     lock_guard<mutex> l(list_mutex());
      if (const _Node* h = _S_head_owner.get())
        {
  	if (h->db.version == new_head_ptr->db.version)
--- 1688,1700 ----
  	new_head_ptr->next = curr;
        }
      // XXX small window here where _S_head_cache still points to previous tzdb.
+     _S_cache_list_head(new_head_ptr);
+ 
+     // This allows __recent_leap_second_info() to know that it can use
+     // get_tzdb_list()->begin()->leap_seconds to get new leap seconds.
+     num_leap_seconds.set(new_head_ptr->db.leap_seconds.size());
  #else
!     lock_guard<mutex> lock(list_mutex());
      if (const _Node* h = _S_head_owner.get())
        {
  	if (h->db.version == new_head_ptr->db.version)
*************** namespace std::chrono
*** 1411,1418 ****
  	new_head_ptr->next = _S_head_owner;
        }
      _S_head_owner = std::move(new_head);
- #endif
      _S_cache_list_head(new_head_ptr);
      return new_head_ptr->db;
    }
  
--- 1702,1712 ----
  	new_head_ptr->next = _S_head_owner;
        }
      _S_head_owner = std::move(new_head);
      _S_cache_list_head(new_head_ptr);
+ 
+     num_leap_seconds.set_locked(new_head_ptr->db.leap_seconds.size(), lock);
+ #endif
+ 
      return new_head_ptr->db;
    }
  
*************** namespace std::chrono
*** 1622,1628 ****
  
      ranges::sort(node->db.zones, {}, &time_zone::name);
      ranges::sort(node->db.links, {}, &time_zone_link::name);
!     ranges::stable_sort(node->rules, {}, &Rule::name);
  
      return Node::_S_replace_head(std::move(head), std::move(node));
  #else
--- 1916,1929 ----
  
      ranges::sort(node->db.zones, {}, &time_zone::name);
      ranges::sort(node->db.links, {}, &time_zone_link::name);
!     ranges::sort(node->rules, [](const Rule& lhs, const Rule& rhs)
!     {
!       if (auto result = lhs.name <=> rhs.name; result != 0)
! 	return result < 0;
!       if (auto result = lhs.from <=> rhs.from; result != 0)
! 	return result < 0;
!       return lhs.save < rhs.save;
!     });
  
      return Node::_S_replace_head(std::move(head), std::move(node));
  #else
*************** namespace std::chrono
*** 2199,2253 ****
        }
      };
  
!     istream& operator>>(istream& in, on_day& to)
      {
!       on_day on{};
!       abbrev_month m{};
!       in >> m;
!       on.month = static_cast<unsigned>(m.m);
!       int c = ws(in).peek();
!       if ('0' <= c && c <= '9')
! 	{
! 	  on.kind = on_day::DayOfMonth;
! 	  unsigned d;
! 	  in >> d;
! 	  if (d <= 31) [[likely]]
! 	    {
! 	      on.day_of_month = d;
! 	      to = on;
! 	      return in;
! 	    }
! 	}
!       else if (c == 'l') // lastSunday, lastWed, ...
  	{
! 	  in.ignore(4);
! 	  if (abbrev_weekday w{}; in >> w) [[likely]]
  	    {
! 	      on.kind = on_day::LastWeekday;
! 	      on.day_of_week = w.wd.c_encoding();
! 	      to = on;
! 	      return in;
  	    }
! 	}
!       else
! 	{
! 	  abbrev_weekday w;
! 	  in >> w;
! 	  if (auto c = in.get(); c == '<' || c == '>')
  	    {
! 	      if (in.get() == '=')
  		{
! 		  on.kind = c == '<' ? on_day::LessEq : on_day::GreaterEq;
  		  on.day_of_week = w.wd.c_encoding();
! 		  unsigned d;
! 		  in >> d;
! 		  if (d <= 31) [[likely]]
  		    {
  		      on.day_of_month = d;
- 		      to = on;
  		      return in;
  		    }
- 		}
  	    }
  	}
        in.setstate(ios::failbit);
--- 2500,2548 ----
        }
      };
  
!     // Read the MONTH DAY. Three forms are accepted for DAY:
!     // * a plain day-of-month number (DayOfMonth),
!     // * "lastWww" where Www is a weekday name (LastWeekday),
!     // * "Www<=N" or "Www>=N" (LessEq / GreaterEq).
!     // On failure to read either MONTH or DAY this function sets
!     // failbit. If DAY is not parsed, only `on.month` is modified,
!     // otherwise `on` is left unchanged.
!     istream& operator>>(istream& in, on_month_day& on)
      {
!       using enum on_month_day::Kind;
!       if (abbrev_month m{}; in >> m)
  	{
!  	  on.month = static_cast<unsigned>(m.m);
! 	  if (int c = ws(in).peek(); '0' <= c && c <= '9')
  	    {
! 	      if (unsigned d; (in >> d) && (d <= 31)) [[likely]]
! 		{
! 		  on.kind = DayOfMonth;
! 		  on.day_of_month = d;
! 		  return in;
! 		}
  	    }
! 	  else if (c == 'l') // lastSunday, lastWed, ...
  	    {
! 	      in.ignore(4);
! 	      if (abbrev_weekday w{}; in >> w) [[likely]]
  		{
! 		  on.kind = LastWeekday;
  		  on.day_of_week = w.wd.c_encoding();
! 		  return in;
! 		}
! 	    }
! 	  else if (abbrev_weekday w; in >> w) [[likely]]
! 	    {
! 	      if (c = in.get(); c == '<' || c == '>')
! 		if (in.get() == '=')
! 		  if (unsigned d; (in >> d) && (d <= 31)) [[likely]]
  		    {
+ 		      on.kind = c == '<' ? LessEq : GreaterEq;
+ 		      on.day_of_week = w.wd.c_encoding();
  		      on.day_of_month = d;
  		      return in;
  		    }
  	    }
  	}
        in.setstate(ios::failbit);
*************** namespace std::chrono
*** 2356,2367 ****
        in.exceptions(ios::goodbit); // Don't throw ios::failure if YEAR absent.
        if (int y = int(year::max()); in >> y)
  	{
! 	  abbrev_month m{January};
! 	  int d = 1;
  	  at_time t{};
! 	  // XXX DAY should support ON format, e.g. lastSun or Sun>=8
! 	  in >> m >> d >> t;
! 	  inf.m_until = sys_days(year(y)/m.m/day(d)) + seconds(t.time);
  	  if (t.indicator != at_time::Universal)
  	    { // UNTIL uses "the rules in effect just before the transition"
  	      // adjust by STDOFF
--- 2651,2662 ----
        in.exceptions(ios::goodbit); // Don't throw ios::failure if YEAR absent.
        if (int y = int(year::max()); in >> y)
  	{
! 	  on_month_day on{ .kind = on_month_day::DayOfMonth,
! 			   .month = 1, .day_of_month = 1 };
  	  at_time t{};
! 	  in >> on >> t;
! 	  year_month_day ymd = on.pin(year(y));
! 	  inf.m_until = sys_days(ymd) + seconds(t.time);
  	  if (t.indicator != at_time::Universal)
  	    { // UNTIL uses "the rules in effect just before the transition"
  	      // adjust by STDOFF
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/23_containers/mdspan/layouts/stride_neg.cc gcc-16-20260725/libstdc++-v3/testsuite/23_containers/mdspan/layouts/stride_neg.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/23_containers/mdspan/layouts/stride_neg.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/libstdc++-v3/testsuite/23_containers/mdspan/layouts/stride_neg.cc	Sat Jul 25 22:32:20 2026
***************
*** 0 ****
--- 1,31 ----
+ // { dg-do compile { target c++23 } }
+ #include <mdspan>
+ 
+ #include "../layout_traits.h"
+ #include <cstdint>
+ 
+ constexpr size_t dyn = std::dynamic_extent;
+ 
+ constexpr bool
+ test_stride_overflow()
+ {
+   auto exts = std::extents<uint8_t, dyn, dyn>(1, 3);
+   auto n = size_t(1) << 9;
+   auto m = std::layout_stride::mapping(exts, std::array{n, 1zu}); // { dg-error "expansion of" }
+   (void) m;
+   return true;
+ }
+ static_assert(test_stride_overflow()); // { dg-error "expansion of" }
+ 
+ constexpr bool
+ test_stride_negative()
+ {
+   auto exts = std::extents<std::size_t, dyn, dyn>(1, 3);
+   auto m = std::layout_stride::mapping(exts, std::array{1, -4}); // { dg-error "expansion of" } 
+   (void) m;
+   return true;
+ }
+ static_assert(test_stride_negative()); // { dg-error "expansion of" } 
+ 
+ // { dg-prune-output "non-constant condition for static assertion" }
+ // { dg-prune-output "__glibcxx_assert_fail()" }
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/std/time/clock/utc/leap_second_info-2.cc gcc-16-20260725/libstdc++-v3/testsuite/std/time/clock/utc/leap_second_info-2.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/std/time/clock/utc/leap_second_info-2.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/libstdc++-v3/testsuite/std/time/clock/utc/leap_second_info-2.cc	Sat Jul 25 22:32:20 2026
***************
*** 0 ****
--- 1,108 ----
+ // { dg-do run { target c++20 } }
+ // { dg-require-effective-target tzdb }
+ // { dg-require-effective-target cxx11_abi }
+ // { dg-xfail-run-if "no weak override on AIX" { powerpc-ibm-aix* } }
+ 
+ #include <chrono>
+ #include <fstream>
+ #include <testsuite_hooks.h>
+ 
+ using namespace std::chrono_literals;
+ 
+ static bool override_used = false;
+ 
+ namespace __gnu_cxx
+ {
+   const char* zoneinfo_dir_override() {
+     override_used = true;
+     return "./";
+   }
+ }
+ 
+ void
+ test_known_leaps()
+ {
+   // Test some values within the list of known leap seconds.
+   auto s = std::chrono::utc_seconds(-1s);
+   auto lsi = get_leap_second_info(s);
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == 0s );
+ 
+   s = std::chrono::utc_seconds(126230402s); // 1 Jan 1974
+   lsi = get_leap_second_info(s);
+   VERIFY( lsi.is_leap_second == true );
+   VERIFY( lsi.elapsed == 3s );
+ 
+   s = std::chrono::utc_seconds(1483228826s); // 1 Jan 2017
+   lsi = get_leap_second_info(s);
+   VERIFY( lsi.is_leap_second == true );
+   VERIFY( lsi.elapsed == 27s );
+ 
+   // We should not have checked the filesystem for the times above.
+   VERIFY( ! override_used );
+ }
+ 
+ void
+ test_future_leaps()
+ {
+   // XXX adjust this if real leap seconds are added to the hardcoded lists:
+   const auto hardcoded_count = 27s;
+ 
+   // Make sure there's no old file from a previous test run.
+   std::ofstream("leapseconds") << "";
+ 
+   using std::chrono::years;
+   auto s = std::chrono::utc_seconds(1483228826s + years(100)); // 1 Jan 2117
+   auto lsi = get_leap_second_info(s);
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == hardcoded_count );
+   lsi = get_leap_second_info(s + years(10));
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == hardcoded_count );
+ 
+   std::ofstream("leapseconds") << R"(
+ # No need to repeat the real leap seconds here, they're hardcoded in the lib.
+ # These are fake new leap seconds for testing purposes:
+ Leap	2099	Dec	31	23:59:60	+	S
+ Leap	2120	Jun	30	23:59:59	-	S
+ Leap	2120	Dec	30	23:59:59	-	S
+ )";
+ 
+   override_used = false;
+   std::chrono::reload_tzdb();
+   VERIFY( override_used );
+ 
+   // Check the same dates again using the custom leapseconds file:
+   lsi = get_leap_second_info(s);
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == hardcoded_count + 1s ); // One positive leap second.
+   lsi = get_leap_second_info(s + years(10));
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == hardcoded_count - 1s ); // Two negative leap seconds.
+ 
+   // Overwrite the custom file again:
+   override_used = false;
+   std::ofstream("leapseconds") << "";
+ 
+   // This should not re-read the custom file, the head of the tzdb_list
+   // should already have been populated by calling get_leap_second_info(s):
+   auto& tzdb = std::chrono::get_tzdb();
+   // The file was not read again:
+   VERIFY( ! override_used );
+   // The list in the tzdb contains the three fake leap seconds:
+   VERIFY( tzdb.leap_seconds.size() == hardcoded_count.count() + 3 );
+   // And repeating the queries above gives the same results:
+   lsi = get_leap_second_info(s);
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == hardcoded_count + 1s ); // One positive leap second.
+   lsi = get_leap_second_info(s + years(10));
+   VERIFY( lsi.is_leap_second == false );
+   VERIFY( lsi.elapsed == hardcoded_count - 1s ); // Two negative leap seconds.
+ }
+ 
+ int main()
+ {
+   test_known_leaps();
+   test_future_leaps();
+ }
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/116110.cc gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/116110.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/116110.cc	Sat Jul 18 22:32:21 2026
--- gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/116110.cc	Sat Jul 25 22:32:20 2026
*************** test_apia()
*** 78,86 ****
--- 78,127 ----
    VERIFY( info.abbrev == "+14" );
  }
  
+ void
+ test_dawson()
+ {
+   /* 1945 August rule change changes letters (abbrev)
+      and remains in DST:
+   R Y 1942 o - F 9 2 1 W
+   R Y 1945 o - Au 14 23u 1 P
+   R Y 1945 o - S 30 2 0 S
+   Z America/Dawson -9:17:40 - LMT 1900 Au 20
+   -9 Y Y%sT 1965
+   -9 Yu Y%sT 1973 O 28
+   */
+ 
+   auto* tz = locate_zone("America/Dawson");
+   
+   // Triggers rule transitions from the start.
+   sys_info info = tz->get_info(sys_days(1900y/August/20) + 10h);
+   VERIFY( info.offset == -9h );
+   VERIFY( info.save == 0min );
+   VERIFY( info.abbrev == "YST" );
+ 
+   // Check YWT transition at 02:00 + 9h UT, that is DST
+   info = tz->get_info(sys_days(1942y/February/9) + 11h);
+   VERIFY( info.offset == -8h );
+   VERIFY( info.save == 60min );
+   VERIFY( info.abbrev == "YWT" );
+ 
+   // Check YPT transition at 23:00 UT, remains DST
+   info = tz->get_info(sys_days(1945y/August/14) + 23h);
+   VERIFY( info.offset == -8h );
+   VERIFY( info.save == 60min );
+   VERIFY( info.abbrev == "YPT" );
+ 
+   // Check YST transition at 02:00 + 8h UT, switches to STD
+   info = tz->get_info(sys_days(1945y/September/30) + 10h);
+   VERIFY( info.offset == -9h );
+   VERIFY( info.save == 0min );
+   VERIFY( info.abbrev == "YST" );
+ }
+ 
  int main()
  {
    test_broken_hill();
    test_kiritimati();
    test_apia();
+   test_dawson();
  }
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/numeric_save.cc gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/numeric_save.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/numeric_save.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/numeric_save.cc	Sat Jul 25 22:32:20 2026
***************
*** 0 ****
--- 1,58 ----
+ // { dg-do run { target c++20 } }
+ // { dg-require-effective-target tzdb }
+ // { dg-require-effective-target cxx11_abi }
+ // { dg-xfail-run-if "no weak override on AIX" { powerpc-ibm-aix* } }
+ 
+ // When a Zone line specifies a numeric value as its RULES field, that
+ // value is the constant DST save value for that zone line.  Per
+ // [time.zone.info.sys] sys_info::offset is the total UTC offset
+ // (stdoff + save).
+ 
+ #include <chrono>
+ #include <fstream>
+ #include <testsuite_hooks.h>
+ 
+ static bool override_used = false;
+ 
+ namespace __gnu_cxx
+ {
+   const char* zoneinfo_dir_override() {
+     override_used = true;
+     return "./";
+   }
+ }
+ 
+ int
+ main()
+ {
+   using namespace std::chrono;
+ 
+   std::ofstream("tzdata.zi") << R"(# version test_numeric_save
+ Z Test/Gaborone 2 -  CAT  1943 Sep 19 2
+                 2 1  CAST 1944 Mar 19 2
+                 2 -  CAT
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_numeric_save" );
+ 
+   auto* tz = locate_zone("Test/Gaborone");
+ 
+   // Sample well inside the CAST (numeric-save) zone line.
+   auto info = tz->get_info(sys_days(1943y/December/15));
+   VERIFY( info.offset == 3h );        // stdoff +2h + save +1h
+   VERIFY( info.save == 60min );
+   VERIFY( info.abbrev == "CAST" );
+ 
+   // Bordering zone lines should report the standard offset with save 0.
+   auto before = tz->get_info(sys_days(1943y/September/1));
+   VERIFY( before.offset == 2h );
+   VERIFY( before.save == 0min );
+   VERIFY( before.abbrev == "CAT" );
+ 
+   auto after = tz->get_info(sys_days(1944y/April/15));
+   VERIFY( after.offset == 2h );
+   VERIFY( after.save == 0min );
+   VERIFY( after.abbrev == "CAT" );
+ }
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/until_day_on.cc gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/until_day_on.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/until_day_on.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/until_day_on.cc	Sat Jul 25 22:32:20 2026
***************
*** 0 ****
--- 1,222 ----
+ // { dg-do run { target c++20 } }
+ // { dg-require-effective-target tzdb }
+ // { dg-require-effective-target cxx11_abi }
+ // { dg-xfail-run-if "no weak override on AIX" { powerpc-ibm-aix* } }
+ 
+ // The DAY portion of a Zone line's UNTIL field accepts not only a
+ // numeric day-of-month but also "lastXxx" (last weekday in the month)
+ // and "Xxx<=N" / "Xxx>=N" forms, just like the ON field of a Rule line.
+ //
+ // Real-world example: Europe/Simferopol has
+ //   3 - MSK 1997 Mar lastSu 1u
+ // which places the boundary on 1997-03-30 (the last Sunday of March).
+ 
+ #include <chrono>
+ #include <fstream>
+ #include <testsuite_hooks.h>
+ 
+ static bool override_used = false;
+ 
+ namespace __gnu_cxx
+ {
+   const char* zoneinfo_dir_override() {
+     override_used = true;
+     return "./";
+   }
+ }
+ 
+ void
+ test_lastsu()
+ {
+   using namespace std::chrono;
+ 
+   std::ofstream("tzdata.zi") << R"(# version test_lastsu
+ Z Test/LastSu 3 - MSK 1997 Mar lastSu 1u
+               3 - X
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_lastsu" );
+ 
+   auto* tz = locate_zone("Test/LastSu");
+ 
+   // True boundary: 1997-03-30 01:00 UTC (lastSu of March 1997 is Mar 30,
+   // and the indicator is 'u' = Universal so no offset adjustment).
+   sys_seconds boundary = sys_days{1997y/March/30} + 1h;
+ 
+   // Just before: still in the MSK line.
+   auto before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "MSK" );
+   VERIFY( before.offset == 3h );
+ 
+   // At/after the boundary: in the X line.
+   auto at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "X" );
+ 
+   // Check that the lastSu day is parsed correctly, and not defaulted
+   // to the 1st: a March 15 query must still be in the MSK line.
+   auto mid_march = tz->get_info(sys_days{1997y/March/15});
+   VERIFY( mid_march.abbrev == "MSK" );
+   VERIFY( mid_march.offset == 3h );
+ }
+ 
+ void
+ test_sun_ge_n()
+ {
+   using namespace std::chrono;
+ 
+   std::ofstream("tzdata.zi") << R"(# version test_sun_ge_n
+ Z Test/SunGE 0 - A 1990 Jun Sun>=8 0u
+              0 - B
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_sun_ge_n" );
+ 
+   auto* tz = locate_zone("Test/SunGE");
+ 
+   // First Sunday >= June 8 1990 = June 10 (June 8 1990 was a Friday).
+   sys_seconds boundary = sys_days{1990y/June/10};
+ 
+   auto before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "A" );
+   auto at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "B" );
+ 
+   // Check that Sun>=8 is parsed correctly, and not defaulted to the 1st.
+   auto early = tz->get_info(sys_days{1990y/June/1});
+   VERIFY( early.abbrev == "A" );
+ }
+ 
+ void
+ test_sun_le_n()
+ {
+   using namespace std::chrono;
+ 
+   std::ofstream("tzdata.zi") << R"(# version test_sun_le_n
+ Z Test/SunLE 0 - A 1990 Jun Sun<=15 0u
+              0 - B
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_sun_le_n" );
+ 
+   auto* tz = locate_zone("Test/SunLE");
+ 
+   // Last Sunday <= June 15 1990 = June 10.
+   sys_seconds boundary = sys_days{1990y/June/10};
+ 
+   auto before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "A" );
+   auto at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "B" );
+ }
+ 
+ void
+ test_year_only()
+ {
+   using namespace std::chrono;
+ 
+   // MONTH, DAY and TIME default to January 1st 00:00 if not specified.
+   std::ofstream("tzdata.zi") << R"(# version test_year_only
+ Z Test/YearOnly 0 - A 1990
+                 0 - B
+ Z Test/YearOnlyC 4 - C 1995 # comment
+                  4 - D
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_year_only" );
+ 
+   auto* tz = locate_zone("Test/YearOnly");
+   sys_seconds boundary = sys_days{1990y/January/1};
+   auto before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "A" );
+   auto at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "B" );
+ 
+   tz = locate_zone("Test/YearOnlyC");
+   boundary = sys_days{1995y/January/1} - 4h;
+   before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "C" );
+   at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "D" );
+ }
+ 
+ void
+ test_year_month_only()
+ {
+   using namespace std::chrono;
+ 
+   // DAY and TIME default to the 1st 00:00 if not specified.
+   std::ofstream("tzdata.zi") << R"(# version test_year_month_only
+ Z Test/YearMonth 0 - A 1990 Jul
+                  0 - B
+ Z Test/YearMonthC 3 - C 1995 Apr # comment
+                   3 - D
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_year_month_only" );
+ 
+   auto* tz = locate_zone("Test/YearMonth");
+   sys_seconds boundary = sys_days{1990y/July/1};
+   auto before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "A" );
+   auto at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "B" );
+ 
+   tz = locate_zone("Test/YearMonthC");
+   boundary = sys_days{1995y/April/1} - 3h;
+   before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "C" );
+   at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "D" );
+ }
+ 
+ void
+ test_year_month_day_only()
+ {
+   using namespace std::chrono;
+ 
+   std::ofstream("tzdata.zi") << R"(# version test_day_only
+ Z Test/DayOnly 0 - A 1997 Mar 12
+                0 - B
+ Z Test/DayOnlyC 5 - C 1998 Jun 14 # comment
+                 5 - D
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_day_only" );
+ 
+   auto* tz = locate_zone("Test/DayOnly");
+   sys_seconds boundary = sys_days{1997y/March/12};
+   auto before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "A" );
+   auto at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "B" );
+ 
+   tz = locate_zone("Test/DayOnlyC");
+   boundary = sys_days{1998y/June/14} - 5h;
+   before = tz->get_info(boundary - 1s);
+   VERIFY( before.abbrev == "C" );
+   at = tz->get_info(boundary);
+   VERIFY( at.abbrev == "D" );
+ }
+ 
+ int
+ main()
+ {
+   test_lastsu();
+   test_sun_ge_n();
+   test_sun_le_n();
+   test_year_only();
+   test_year_month_only();
+   test_year_month_day_only();
+ }
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/wall_cascade.cc gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/wall_cascade.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/std/time/time_zone/wall_cascade.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20260725/libstdc++-v3/testsuite/std/time/time_zone/wall_cascade.cc	Sat Jul 25 22:32:20 2026
***************
*** 0 ****
--- 1,273 ----
+ // { dg-do run { target c++20 } }
+ // { dg-require-effective-target tzdb }
+ // { dg-require-effective-target cxx11_abi }
+ // { dg-xfail-run-if "no weak override on AIX" { powerpc-ibm-aix* } }
+ 
+ // Wall-time rules in the same rule set whose effective firing time
+ // depends on a prior rule's save (Europe/Paris 1945):
+ //   1945 Apr 2  02:00 wall  save=2  M
+ //   1945 Sep 16 03:00 wall  save=0  -
+ // In the (stdoff=1, save=2) frame the September rule fires at
+ // Sep 16 00:00 UT, not Sep 16 02:00 UT.
+ 
+ #include <chrono>
+ #include <fstream>
+ #include <testsuite_hooks.h>
+ 
+ static bool override_used = false;
+ 
+ namespace __gnu_cxx
+ {
+   const char* zoneinfo_dir_override() {
+     override_used = true;
+     return "./";
+   }
+ }
+ 
+ using namespace std::chrono;
+ 
+ void
+ test_positive()
+ {
+   // Line 1 ends at "1945 Sep 16 1u" (Universal time, no save shenanigans),
+   // so info.begin for line 2 is exactly 1945-09-16 01:00 UT.
+   //
+   // Two-line zone whose second line begins at 1945 Sep 16 01:00 UT,
+   // between the cascaded firing time (Sep 16 00:00 UT) and the
+   // non-cascaded firing time (Sep 16 02:00 UT) of the September rule.
+   // The seeding must pick the September rule (save=0, CET) at info.begin.
+   std::ofstream("tzdata.zi") << R"(# version test_wall_cascade
+ R Fr 1945 o - Apr 2  2 2 M
+ R Fr 1945 o - Sep 16 3 0 -
+ Z Test/Paris 0  -  X     1945 Sep 16 1u
+              1  Fr CE%sT
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_wall_cascade" );
+ 
+   auto* tz = locate_zone("Test/Paris");
+ 
+   // Line 2 begins at exactly 1945-09-16 01:00 UT.  Sample one second
+   // after the boundary, well inside line 2's first sys_info.
+   auto info = tz->get_info(sys_seconds{
+       sys_days(1945y/September/16) + 1h + 1s});
+   VERIFY( info.offset == 1h );
+   VERIFY( info.save == 0min );
+   VERIFY( info.abbrev == "CET" );
+ 
+   // The boundary instant itself is in the new line.
+   auto at_boundary
+     = tz->get_info(sys_seconds{sys_days(1945y/September/16) + 1h});
+   VERIFY( at_boundary.offset == 1h );
+   VERIFY( at_boundary.save == 0min );
+ 
+   // Sample later still in line 2 (winter): unchanged.
+   auto winter = tz->get_info(sys_days(1945y/December/1));
+   VERIFY( winter.offset == 1h );
+   VERIFY( winter.save == 0min );
+ }
+ 
+ void
+ test_negative()
+ {
+   // This is synthetic version of above example, with negative
+   // running save.
+   //
+   // Two-line zone whose second line begins at 1945 Sep 16 01:00 UT,
+   // before the cascaded firing time (Sep 16 02:00 UT), but after
+   // non-cascaded firing time (Sep 16 00:00 UT) of the September rule.
+   // The seeding must pick the April rule (save=-2, CEST) at info.begin.
+   std::ofstream("tzdata.zi") << R"(# version test_negative_cascade
+ R Fr 1945 o - Apr 2  2 -3 M
+ R Fr 1945 o - Sep 16 0 0 -
+ Z Test/Negative 0  -  X     1945 Sep 16 1u
+              1  Fr CE%sT
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_negative_cascade" );
+ 
+   auto* tz = locate_zone("Test/Negative");
+ 
+   // Line 2 begins at exactly 1945-09-16 01:00 UT, sample
+   // one second after.
+   auto info = tz->get_info(sys_seconds{
+       sys_days(1945y/September/16) + 1h + 1s});
+   VERIFY( info.offset == -2h );
+   VERIFY( info.save == -3h );
+   VERIFY( info.abbrev == "CEMT" );
+ 
+   // The boundary instant.
+   auto at_boundary
+     = tz->get_info(sys_seconds{sys_days(1945y/September/16) + 1h});
+   VERIFY( at_boundary.offset == -2h );
+   VERIFY( at_boundary.save == -3h );
+ 
+   // Test the firing of Sep 16 rule
+   auto at_sep_rule = tz->get_info(sys_seconds{
+     sys_days(1945y/September/16) + 2h});
+   // The transition_window < 1d condition triggers, and
+   // transition is ignored.
+   // VERIFY( at_sep_rule.offset == 1h );
+   // VERIFY( at_sep_rule.save == 0h );
+   // VERIFY( at_sep_rule.abbrev == "CET" );
+ }
+ 
+ void
+ test_next_year()
+ {
+   // The NZ 1946 rule triggers at 1946 Jan 1 00:00:00
+   // local time, which correspond to 1946 Dec 13 12:00:00 UT.
+   std::ofstream("tzdata.zi") << R"(# version test_next_year
+ R NZ 1934 1940 - Ap lastSu 2 0 M
+ R NZ 1934 1940 - S lastSu 2 0:30 S
+ R NZ 1946 o - Ja 1 0 0 S
+ Z Pacific/Auckland 11:39:4 - LMT 1868 N 2
+ 11:30 NZ NZ%sT 1946
+ 12 NZ NZ%sT
+ Z Pacific/AucklandUT 11:39:4 - LMT 1868 N 2
+ 11:30 NZ NZ%sT 1945 Dec 31 13u
+ 12 NZ NZ%sT
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_next_year" );
+ 
+   // Pacific/Auckland requires both PR124854 and PR116110 to work
+   // correctly. TODO test it once implemented.
+   // The UT version uses 1945-12-31 13:00:00 UT after
+   // the rule application change.
+   auto* utz = locate_zone("Pacific/AucklandUT");
+ 
+   // Before the change
+   auto before_utboundary
+    = utz->get_info(sys_seconds{sys_days(1945y/December/31) + 11h});
+   VERIFY( before_utboundary.offset == 12h );
+   VERIFY( before_utboundary.save == 30min );
+   VERIFY( before_utboundary.abbrev == "NZST" );
+ 
+   auto at_utboundary
+     = utz->get_info(sys_seconds{sys_days(1945y/December/31) + 13h});
+   VERIFY( at_utboundary.offset == 12h );
+   VERIFY( at_utboundary.save == 0h );
+   VERIFY( at_utboundary.abbrev == "NZST" );
+ 
+   auto after_utboundary
+     = utz->get_info(sys_seconds{sys_days(1945y/December/31) + 14h});
+   VERIFY( after_utboundary.offset == 12h );
+   VERIFY( after_utboundary.save == 0h );
+   VERIFY( after_utboundary.abbrev == "NZST" );
+ }
+ 
+ void
+ test_prev_year()
+ {
+   // The synthetic version of above, where the local
+   // time for rule is moved to previous year.
+   // The NZ 1946 rule triggers at 1946 Dec 31 22:00:00
+   // local time, which correspond to 1947 Jan 1 10:00:00 UT.
+   std::ofstream("tzdata.zi") << R"(# version test_prev_year
+ R PY 1934 1940 - Ap lastSu 2 0 M
+ R PY 1934 1940 - S lastSu 2 0:30 S
+ R PY 1946 o - D 31 22 0 S
+ Z Test/PrevYear -11:39:4 - LMT 1868 N 2
+ -12:30 PY PY%sT 1947 Jan 1 11u
+ -12 PY PY%sT
+ )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_prev_year" );
+ 
+   // The UT version uses 1945-12-31 13:00:00 UT after
+   // the rule application change.
+   auto* tz = locate_zone("Test/PrevYear");
+ 
+   // Before the change
+   auto before_boundary
+    = tz->get_info(sys_seconds{sys_days(1947y/January/1) + 9h});
+   VERIFY( before_boundary.offset == -12h );
+   VERIFY( before_boundary.save == 30min );
+   VERIFY( before_boundary.abbrev == "PYST" );
+ 
+   auto at_boundary
+     = tz->get_info(sys_seconds{sys_days(1947y/January/1) + 11h});
+   VERIFY( at_boundary.offset == -12h );
+   VERIFY( at_boundary.save == 0h );
+   VERIFY( at_boundary.abbrev == "PYST" );
+ 
+   auto after_boundary
+     = tz->get_info(sys_seconds{sys_days(1947y/January/1) + 12h});
+   VERIFY( after_boundary.offset == -12h );
+   VERIFY( after_boundary.save == 0h );
+   VERIFY( after_boundary.abbrev == "PYST" );
+ }
+ 
+ void
+ test_earlier_year()
+ {
+   // Synthetic example where PY 1941 rule is still running.
+   std::ofstream("tzdata.zi") << R"(# version test_earlier_year
+ R EY 1934 1941 - Ap lastSu 2 0 M
+ R EY 1934 1940 - S lastSu 2 0:30 S
+ Z Test/EarielYear 11:39:4 - LMT 1868 N 2
+ 11:30 EY EY%sT 1943 Jan 1 12u
+ 12 EY EY%sT
+    )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_earlier_year" );
+ 
+   auto* utz = locate_zone("Test/EarielYear");
+   auto at_boundary
+     = utz->get_info(sys_seconds{sys_days(1943y/January/1) + 12h});
+   VERIFY( at_boundary.offset == 12h );
+   VERIFY( at_boundary.save == 0min );
+   VERIFY( at_boundary.abbrev == "EYMT" );
+ }
+ 
+ void
+ test_at_boundary()
+ {
+   std::ofstream("tzdata.zi") << R"(# version test_at_boundary
+ R p 1947 1966 - Ap Su>=1 2s 1 S
+ R p 1947 1965 - O Su>=1 2s 0 -
+ R p 1976 o - S lastSu 1 0 -
+ R p 1977 o - Mar lastSu 0s 1 S
+ R p 1977 o - S lastSu 0s 0 -
+ Z Europe/Lisbon -0:36:45 - LMT 1884
+ 1 - CET 1976 S 26 1
+ 0 p WE%sT 1986
+    )";
+ 
+   const auto& db = reload_tzdb();
+   VERIFY( override_used ); // If this fails then XFAIL for the target.
+   VERIFY( db.version == "test_at_boundary" );
+ 
+   // The change from CET to WE%sT line happens 1976 Sep 26 00:00:00 UT,
+   // should take into consideration 1976 lastSu rule that fires at the
+   // same time (running save is 1h from 1966 Ap rule application),
+   // and start in standard time (WET period).
+   auto* utz = locate_zone("Europe/Lisbon");
+   auto at_boundary
+     = utz->get_info(sys_seconds{sys_days(1976y/September/26) + 0h});
+   VERIFY( at_boundary.offset == 0h );
+   VERIFY( at_boundary.save == 0min );
+   VERIFY( at_boundary.abbrev == "WET" );
+ }
+ 
+ int
+ main()
+ {
+   test_positive();
+   test_negative();
+   test_next_year();
+   test_prev_year();
+   test_earlier_year();
+   test_at_boundary();
+ }
diff -Nrcpad gcc-16-20260718/libstdc++-v3/testsuite/util/testsuite_abi.cc gcc-16-20260725/libstdc++-v3/testsuite/util/testsuite_abi.cc
*** gcc-16-20260718/libstdc++-v3/testsuite/util/testsuite_abi.cc	Sat Jul 18 22:32:21 2026
--- gcc-16-20260725/libstdc++-v3/testsuite/util/testsuite_abi.cc	Sat Jul 25 22:32:20 2026
*************** check_version(symbol& test, bool added)
*** 217,222 ****
--- 217,223 ----
        known_versions.push_back("GLIBCXX_3.4.33");
        known_versions.push_back("GLIBCXX_3.4.34");
        known_versions.push_back("GLIBCXX_3.4.35");
+       known_versions.push_back("GLIBCXX_3.4.36");
        known_versions.push_back("GLIBCXX_LDBL_3.4.31");
        known_versions.push_back("GLIBCXX_IEEE128_3.4.29");
        known_versions.push_back("GLIBCXX_IEEE128_3.4.30");
*************** check_version(symbol& test, bool added)
*** 260,266 ****
  	test.version_status = symbol::incompatible;
  
        // Check that added symbols are added in the latest pre-release version.
!       bool latestp = (test.version_name == "GLIBCXX_3.4.35"
  		     || test.version_name == "CXXABI_1.3.17"
  		     || test.version_name == "CXXABI_FLOAT128"
  		     || test.version_name == "CXXABI_TM_1");
--- 261,267 ----
  	test.version_status = symbol::incompatible;
  
        // Check that added symbols are added in the latest pre-release version.
!       bool latestp = (test.version_name == "GLIBCXX_3.4.36"
  		     || test.version_name == "CXXABI_1.3.17"
  		     || test.version_name == "CXXABI_FLOAT128"
  		     || test.version_name == "CXXABI_TM_1");
