2026-07-10  Martin Jambor  <mjambor@suse.cz>

	Backported from master:
	2026-06-18  Martin Jambor  <mjambor@suse.cz>

	PR ipa/124128
	* ipa-cp.cc (ipa_vr_intersect_with_arith_jfunc): Move the check if
	the final type conversion needs to happen before the conversion.

2026-07-10  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Backported from master:
	2026-07-01  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.md: Annotate mnemonic for
	extzv_<mode>_{srl,sll}<clobbercc_or_nocc>.

2026-07-10  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Backported from master:
	2026-07-01  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/126054
	* config/s390/s390.md: Fix
	extzv_<mode>_{srl,sll}<clobbercc_or_nocc> by adjusting the
	bitmasks in the output templates.

2026-07-09  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2026-07-07  Richard Earnshaw  <rearnsha@arm.com>

	* config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION):
	Remove +mpamv2.
	* config/aarch64/aarch64-sys-regs.def: Remove sysregs associated
	with MPAMv2_VID and adjust other related sysregs to use the
	base permitted architecture.
	* doc/invoke.texi (aarch64: +mpamv2): Remove option.

2026-07-09  Uros Bizjak  <ubizjak@gmail.com>

	Backported from master:
	2026-07-08  Uros Bizjak  <ubizjak@gmail.com>

	PR target/126148
	* config/i386/i386-expand.cc (ix86_gen_ccmp_first): Restrict
	floating-point modes accepted for ccmp according to the
	available floating-point instruction set.

2026-07-08  Tamar Christina  <tamar.christina@arm.com>

	Backported from master:
	2026-06-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/125597
	* tree-vect-loop-manip.cc (vect_do_peeling): Create IFN_VARYING for
	early break scalar IV.
	* tree-vect-loop.cc (vect_update_ivs_after_vectorizer_for_early_breaks):
	Replace the IFN_VARYING with actual value.

2026-07-08  Tamar Christina  <tamar.christina@arm.com>

	Backported from master:
	2026-06-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/125597
	(vect_do_peeling): Create IFN_VARYING for masks.
	* tree-vect-loop-manip.cc (vect_set_loop_condition): Replace the
	IFN_VARYING.

2026-07-08  Tamar Christina  <tamar.christina@arm.com>

	Backported from master:
	2026-06-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/125597
	* internal-fn.def (VARYING): New.
	* doc/ifn.texi: Document it.
	* internal-fn.cc (expand_VARYING): New.
	* internal-fn.h (expand_VARYING): New.
	* tree-cfg.cc (verify_gimple_call): Check for leaked IFN_VARYING.

2026-07-07  Stafford Horne  <shorne@gmail.com>

	Backported from master:
	2026-07-07  Stafford Horne  <shorne@gmail.com>

	PR target/126081
	* config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Stop allowing
	SImode for FLAG_REGS.
	(or1k_can_change_mode_class): Stop allowing SImode for
	FLAG_REGS.
	(or1k_noce_conversion_profitable_p): Always check
	or1k_is_cmov_insn.

2026-07-07  Stafford Horne  <shorne@gmail.com>

	Backported from master:
	2026-06-14  Stafford Horne  <shorne@gmail.com>

	* config/or1k/or1k.md (cbranchsi4): Add clobber clause.

2026-07-07  Stafford Horne  <shorne@gmail.com>

	Backported from master:
	2026-06-14  Stafford Horne  <shorne@gmail.com>

	* config/or1k/or1k.h (SHIFT_COUNT_TRUNCATED): Define.
	* config/or1k/or1k.md (rotrsi3): Rename reg_or_u6_operand to
	reg_or_u5_operand.
	(<shift_op>si3): Ditto.
	* config/or1k/predicates.md (reg_or_u6_operand): Remove.
	(reg_or_u5_operand): New predicate.

2026-07-07  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-06-24  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	* config/rs6000/altivec.md (V16QI_V2DI): New mode iterator.
	(add<mode>3): Split into two patterns to support future ISA
	alternatives.
	(sub<mode>3): Likewise.
	* config/rs6000/vsx.md (VIArith): New mode iterator.
	(vsx_mul<mode>3): New insn pattern.
	(smul<mode>3_highpart): Split into mode-specific patterns.
	(umul<mode>3_highpart): Likewise.
	(smulv8hi3_highpart): New insn pattern.
	(smulv4si3_highpart): Likewise.
	(smulv2di3_highpart): Likewise.
	(umulv8hi3_highpart): Likewise.
	(umulv4si3_highpart): Likewise.
	(umulv2di3_highpart): Likewise.
	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvmulhuh): New
	builtin.
	(__builtin_vsx_xvmulhsh): Likewise.
	* config/rs6000/rs6000-overload.def (__builtin_vec_mulh): Add
	overloads for vector multiply-high signed/unsigned halfword.
	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add entry for
	BSTZ_FUTURE_VSX.
	(stanza_map): Add future-vsx stanza mapping.
	(enable_string): Add ENB_FUTURE_VSX.
	(write_decls): Add ENB_FUTURE_VSX to the bif_enable enum in the
	generated header file.
	* config/rs6000/rs6000.md (define_attr "isa"): Add future to the list
	of ISA values.
	(define_attr "enabled"): Add check for future ISA.
	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
	ENB_FUTURE_VSX and issue a diagnostic requiring -mcpu=future and -mvsx.
	(rs6000_builtin_is_supported): Return TARGET_FUTURE && TARGET_VSX
	for ENB_FUTURE_VSX built-ins.
	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions Available
	on Future ISA): Document new functions.

2026-07-07  Icenowy Zheng  <zhengxingda@iscas.ac.cn>

	Backported from master:
	2026-07-01  Icenowy Zheng  <zhengxingda@iscas.ac.cn>

	PR target/126049
	* config/riscv/autovec.md: Change fmin/fmax reduction initial
	value from inf/-inf to NaN for proper semantics of corresponding
	C funtion.

2026-07-06  vekumar  <Venkataramanan.Kumar@amd.com>

	Backported from master:
	2026-06-04  vekumar  <Venkataramanan.Kumar@amd.com>

	* config/i386/x86-tune.def (X86_TUNE_FUSE_ALU_AND_BRANCH_MEM): Enable
	for m_ZNVER6.
	(X86_TUNE_FUSE_ALU_AND_BRANCH_MEM_IMM): Likewise.
	(X86_TUNE_SSE_REDUCTION_PREFER_PSHUF): Likewise.

2026-07-06  liuhongt  <hongtao.liu@intel.com>

	Backported from master:
	2026-07-06  liuhongt  <hongtao.liu@intel.com>

	PR target/126098
	* config/i386/sse.md (VI1_AVX512VNNIBW): Remove.
	(sdot_prod<ssedvecmodelower><mode>): Use VI1_AVX512 instead of
	VI1_AVX512VNNIBW so V64QI is enabled only under AVX512BW.
	(udot_prod<ssedvecmodelower><mode>): Likewise.

2026-07-05  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/67459
	PR target/122948
	* config/sh/sh.md (addc): Fix T bit set expression.
	(subc): Likewise.

2026-07-03  Avinash Jayakar  <avinashd@linux.ibm.com>

	Backported from master:
	2026-05-07  Avinash Jayakar  <avinashd@linux.ibm.com>

	* config/rs6000/crypto.md (UNSPEC_XXAESENCP): New unspec entry.
	(UNSPEC_XXAES128ENCP): Likewise.
	(UNSPEC_XXAES192ENCP): Likewise.
	(UNSPEC_XXAES256ENCP): Likewise.
	(UNSPEC_XXAESDECP): Likewise.
	(UNSPEC_XXAES128DECP): Likewise.
	(UNSPEC_XXAES192DECP): Likewise.
	(UNSPEC_XXAES256DECP): Likewise.
	(UNSPEC_XXAESGENLKP): Likewise.
	(UNSPEC_XXAES128GENLKP): Likewise.
	(UNSPEC_XXAES192GENLKP): Likewise.
	(UNSPEC_XXAES256GENLKP): Likewise.
	(UNSPEC_XXGFMUL128): Likewise.
	(UNSPEC_XXGFMUL128GCM): Likewise.
	(UNSPEC_XXGFMUL128XTS): Likewise.
	(AESACC_base_code): New iterator for xxaesencp and xxaesdecp base
	mnemonics.
	(AESACC_code): New iterator for xxaesencp and xxaesdecp extended
	mnemonics.
	(AESGENLKP_code): New iterator for xxaesgenlkp extended mnemonics.
	(AESGF_code): New iterator for xxgfmul128 extended mnemonics.
	(AESACC_base_insn): New attribute iterator for xxaesencp and xxaesdecp
	base mnemonics.
	(AESACC_insn): New attribute iterator for xxaesencp and xxaesdecp
	extended mnemonics.
	(AESGENLKP_insn): New attribute iterator for xxaesgenlkp extended
	mnemonics.
	(AESGF_insn): New attribute iterator for xxgfmul128 extended mnemonics.
	(<AESACC_base_insn>): New define_insn for xxaesencp and xxaesdecp base
	mnemonics.
	(<AESACC_insn>): New define_insn for xxaesencp and xxaesdecp extended
	mnemonics.
	(<AESGENLKP_insn>): New define_insn for xxaesgenlkp extended mnemonics.
	(xxaesgenlkp): New define_insn for genlkp base mnemonic.
	(<AESGF_insn>): New define_insn for xxgfmul128 extended mnemonics.
	(xxgfmul128): New define_insn for xxgfmul128 base mnemonic.
	* config/rs6000/rs6000-builtins.def: Added new builtin definitions for
	AES acceleration.
	* doc/extend.texi: Add new section for AES acceleration builtins
	for Future ISA.

2026-07-03  Kishan Parmar  <kishan@linux.ibm.com>

	Backported from master:
	2026-06-23  Kishan Parmar  <kishan@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
	ENB_FUTURE_ALTIVEC and issue a diagnostic requiring -mcpu=future
	and -maltivec.
	(rs6000_builtin_is_supported): Check TARGET_FUTURE && TARGET_ALTIVEC
	for ENB_FUTURE_ALTIVEC built-ins.
	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
	BSTZ_FUTURE_ALTIVEC entry.
	(stanza_map): Add future-altivec stanza mapping.
	(enable_string): Add ENB_FUTURE_ALTIVEC.
	(write_decls): Add ENB_FUTURE_ALTIVEC to the bif_enable enum in the
	generated header file.

2026-07-02  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-06-30  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md
	(@stack_protect_combined_set_normal_<mode>): Replace `st.d'
	with `st.<d>', reject stptr.d on LA32 with enabled attribute.
	(@stack_protect_combined_test_internal_<mode>): Replace `ld.d'
	with `ld.<d>', reject ldptr.d on LA32 with enabled attribute.
	(@stack_protect_combined_set_extreme_<mode>): Rename to ...
	(stack_protect_combined_set_extreme): ... here.  Force DImode.
	Add TARGET_ABI_LP64 as the condition.
	(stack_protect_combined_set): Adapt for the change of
	stack_protect_combined_set_extreme.

2026-07-01  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Backported from master:
	2026-06-26  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/125972
	* config/s390/s390.cc (s390_rtx_costs): Deal with non-compare
	conditions during costing.  Also fix some indentation.

2026-07-01  Eric Botcazou  <ebotcazou@adacore.com>

	* tree-ssa-structalias.cc (set_uids_in_ptset): If ANYTHING is
	present in the ESCAPED_RETURN solution, record that the global
	solution has an escaped heap if FROM contains a heap variable.

2026-07-01  Avinash Jayakar  <avinashd@linux.ibm.com>

	Backported from master:
	2026-06-30  Avinash Jayakar  <avinashd@linux.ibm.com>
		    Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Add logic to
	handle __builtin_ppc_atomic_cas_local.
	* config/rs6000/rs6000-builtins.def: New builtins for
	__builtin_ppc_atomic_cas_local with types.
	* config/rs6000/rs6000-c.cc (altivec_build_resolved_builtin): Handle
	builtins with up to 6 arguments.
	* config/rs6000/rs6000-overload.def: Overload builtin for signed/unsiged
	char, short, int, long, __int128.
	* config/rs6000/rs6000-protos.h (rs6000_expand_atomic_compare_and_swap): Add
	additional parameter 'local' to the prototype.
	* config/rs6000/rs6000.cc (emit_load_locked): Add new parameter. Pass new
	parameter to generate load-locked instruction.
	(rs6000_expand_atomic_compare_and_swap): Add new parameter. Call
	emit_load_locked() with additional parameter value of EH bit.
	(rs6000_expand_atomic_exchange): Pass EH value 0 to emit_load_locked().
	(rs6000_expand_atomic_op): Likewise.
	* config/rs6000/sync.md (load_locked<mode>): Add new operand in RTL template.
	Specify EH bit in the larx instruction.
	(load_locked<QHI:mode>_si): Likewise.
	(load_lockedpti): Likewise.
	(load_lockedti): Add new operand in RTL template. Pass EH bit to
	gen_load_lockedpti().
	(atomic_compare_and_swap<mode>): Pass new parameter 'false' to
	rs6000_expand_atomic_compare_and_swap.
	(atomic_compare_and_swap_local<mode>): New define_expand.
	* doc/extend.texi: Add documentation for new builtin.

2026-07-01  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386.h (PTA_DIAMONDRAPIDS): Remove PTA_AMX_TF32.
	* doc/invoke.texi: Correct documentation.

2026-07-01  Xin Liu  <liulxx@hygon.cn>

	Backported from master:
	2026-06-23  Xin Liu  <liulxx@hygon.cn>

	* common/config/i386/cpuinfo.h (get_hygon_cpu): Detect HYGON
	Family 18h model 8 as c86-4g-m8.
	* common/config/i386/i386-common.cc (processor_names): Add
	c86-4g-m8.
	(processor_alias_table): Likewise.
	* common/config/i386/i386-cpuinfo.h (enum processor_subtypes): Add
	HYGONFAM18H_C86_4G_M8.
	* config.gcc: Add c86-4g-m8 to supported x86 CPUs and handle
	c86_4g_m8 target triples.
	* config/i386/c86-4g-m7.md: Rename to ...
	* config/i386/c86-4g-m7m8.md: ... this and extend shared c86-4g-m7
	scheduling reservations to c86-4g-m8.
	(c86_4g_m8_imovx_cwde): New reservation.
	(c86_4g_m7_imov_xchg): Add c86_4g_m8 to CPU attribute.
	(c86_4g_m7_imov_xchg_load): Ditto.
	(c86_4g_m7_imov): Ditto.
	(c86_4g_m7_imov_load): Ditto.
	(c86_4g_m7_imov_store): Ditto.
	(c86_4g_m7_push): Ditto.
	(c86_4g_m7_push_mem): Ditto.
	(c86_4g_m7_pop): Ditto.
	(c86_4g_m7_pop_mem): Ditto.
	(c86_4g_m7_imul): Ditto.
	(c86_4g_m7_imul_load): Ditto.
	(c86_4g_m7_idiv): Ditto.
	(c86_4g_m7_idiv_QI): Ditto.
	(c86_4g_m7_idiv_load): Ditto.
	(c86_4g_m7_idiv_QI_load): Ditto.
	(c86_4g_m7_insn): Ditto.
	(c86_4g_m7_insn_load): Ditto.
	(c86_4g_m7_insn_store): Ditto.
	(c86_4g_m7_insn2_store): Ditto.
	(c86_4g_m7_insn_both): Ditto.
	(c86_4g_m7_setcc): Ditto.
	(c86_4g_m7_setcc_load): Ditto.
	(c86_4g_m7_setcc_store): Ditto.
	(c86_4g_m7_alu1_double): Ditto.
	(c86_4g_m7_alu1_double_load): Ditto.
	(c86_4g_m7_alu1_vector): Ditto.
	(c86_4g_m7_alu1_vector_load): Ditto.
	(c86_4g_m7_alu1_direct): Ditto.
	(c86_4g_m7_alu1_direct_load): Ditto.
	(c86_4g_m7_call): Ditto.
	(c86_4g_m7_branch): Ditto.
	(c86_4g_m7_branch_load): Ditto.
	(c86_4g_m7_lea): Ditto.
	(c86_4g_m7_leave): Ditto.
	(c86_4g_m7_str): Ditto.
	(c86_4g_m7_str_load): Ditto.
	(c86_4g_m7_ieu_vector): Ditto.
	(c86_4g_m7_ieu_vector_load): Ditto.
	(c86_4g_m7_sse_insertimm): Ditto.
	(c86_4g_m7_sse_insert): Ditto.
	(c86_4g_m7_fp_cmov): Ditto.
	(c86_4g_m7_fp_mov_direct_load): Ditto.
	(c86_4g_m7_fp_mov_direct_store): Ditto.
	(c86_4g_m7_fp_mov_double_load): Ditto.
	(c86_4g_m7_fp_mov_double_store): Ditto.
	(c86_4g_m7_fp_mov_direct): Ditto.
	(c86_4g_m7_fp_sqrt): Ditto.
	(c86_4g_m7_fp_spc_direct): Ditto.
	(c86_4g_m7_fp_spc): Ditto.
	(c86_4g_m7_fp_op_mul): Ditto.
	(c86_4g_m7_fp_op_mul_load): Ditto.
	(c86_4g_m7_fp_op_imul_load): Ditto.
	(c86_4g_m7_fp_div): Ditto.
	(c86_4g_m7_fp_div_load): Ditto.
	(c86_4g_m7_fp_idiv_load): Ditto.
	(c86_4g_m7_fp_fsgn): Ditto.
	(c86_4g_m7_fp_fcmp): Ditto.
	(c86_4g_m7_fp_fcmp_load): Ditto.
	(c86_4g_m7_fp_mmx): Ditto.
	(c86_4g_m7_mmx_add_cmp): Ditto.
	(c86_4g_m7_mmx_add_cmp_load): Ditto.
	(c86_4g_m7_mmx_cvt): Ditto.
	(c86_4g_m7_mmx_cvt_load): Ditto.
	(c86_4g_m7_mmx_shift): Ditto.
	(c86_4g_m7_mmx_shift_load): Ditto.
	(c86_4g_m7_mmx_shift_avg): Ditto.
	(c86_4g_m7_mmx_shift_avg_load): Ditto.
	(c86_4g_m7_mmx_shift_sadbw): Ditto.
	(c86_4g_m7_mmx_shift_sadbw_load): Ditto.
	(c86_4g_m7_mmx_mov): Ditto.
	(c86_4g_m7_mmx_mov_store): Ditto.
	(c86_4g_m7_mmx_mov_load): Ditto.
	(c86_4g_m7_mmx_mul): Ditto.
	(c86_4g_m7_mmx_mul_load): Ditto.
	(c86_4g_m7_sse_pinsr_reg): Ditto.
	(c86_4g_m7_sse_pinsr_reg_load): Ditto.
	(c86_4g_m7_avx_vpinsr_reg): Ditto.
	(c86_4g_m7_avx_vpinsr_reg_load): Ditto.
	(c86_4g_m7_avx512_perm_xmm): Ditto.
	(c86_4g_m7_avx512_perm_xmm_opload): Ditto.
	(c86_4g_m7_avx512_permi2_ymm): Ditto.
	(c86_4g_m7_avx512_permi2_zmm): Ditto.
	(c86_4g_m7_avx512_permi2_ymm_load): Ditto.
	(c86_4g_m7_avx512_permi2_zmm_load): Ditto.
	(c86_4g_m7_avx512_perm_zmm_imm): Ditto.
	(c86_4g_m7_avx512_perm_zmm_imm_load): Ditto.
	(c86_4g_m7_avx512_perm_zmm_noimm): Ditto.
	(c86_4g_m7_sse_perm_zmm_noimm_load): Ditto.
	(c86_4g_m7_avx512_insertx_ymm): Ditto.
	(c86_4g_m7_avx512_insertx_ymem): Ditto.
	(c86_4g_m7_avx512_insertx_zxmm): Ditto.
	(c86_4g_m7_avx512_insertx_zxmem): Ditto.
	(c86_4g_m7_avx512_insertx_zymm): Ditto.
	(c86_4g_m7_avx512_insertx_zymem): Ditto.
	(c86_4g_m7_avx_insertx_ymm): Ditto.
	(c86_4g_m7_avx_insertx_ymem): Ditto.
	(c86_4g_m7_avx512_shuf_xymm): Ditto.
	(c86_4g_m7_avx512_shuf_zmm): Ditto.
	(c86_4g_m7_avx512_shuf_xymem): Ditto.
	(c86_4g_m7_avx512_shuf_zmem): Ditto.
	(c86_4g_m7_sselogic_xymm): Ditto.
	(c86_4g_m7_sselogic_xymm_load): Ditto.
	(c86_4g_m7_avx512_cmpestr): Ditto.
	(c86_4g_m7_avx512_cmpestr_load): Ditto.
	(c86_4g_m7_avx512_log): Ditto.
	(c86_4g_m7_avx512_log_load): Ditto.
	(c86_4g_m7_avx512_vdbpsadbw_xymm): Ditto.
	(c86_4g_m7_avx512_vdbpsadbw_xymem): Ditto.
	(c86_4g_m7_avx512_vdbpsadbw_zmm): Ditto.
	(c86_4g_m7_avx512_vdbpsadbw_zmem): Ditto.
	(c86_4g_m7_avx512_abs): Ditto.
	(c86_4g_m7_avx512_abs_load): Ditto.
	(c86_4g_m7_avx_sign): Ditto.
	(c86_4g_m7_avx_sign_load): Ditto.
	(c86_4g_m7_avx_blend): Ditto.
	(c86_4g_m7_avx_blend_load): Ditto.
	(c86_4g_m7_avx512_aes): Ditto.
	(c86_4g_m7_avx512_aes_load): Ditto.
	(c86_4g_m7_avx_aes): Ditto.
	(c86_4g_m7_avx_aes_load): Ditto.
	(c86_4g_m7_extr): Ditto.
	(c86_4g_m7_extr_store): Ditto.
	(c86_4g_m7_avx_ssecomi_comi): Ditto.
	(c86_4g_m7_avx_ssecomi_comi_load): Ditto.
	(c86_4g_m7_avx_ssecomi_test): Ditto.
	(c86_4g_m7_avx_ssecomi_test_load): Ditto.
	(c86_4g_m7_avx512_imul): Ditto.
	(c86_4g_m7_avx512_imul_mem): Ditto.
	(c86_4g_m7_avx_imul): Ditto.
	(c86_4g_m7_avx_imul_mem): Ditto.
	(c86_4g_m7_avx512_mov_vmov): Ditto.
	(c86_4g_m7_avx512_mov_vmov_store): Ditto.
	(c86_4g_m7_avx512_mov_vmov_load): Ditto.
	(c86_4g_m7_avx512_vpmovx_y): Ditto.
	(c86_4g_m7_avx512_vpmovx_y_load): Ditto.
	(c86_4g_m7_avx512_vpmovx_z): Ditto.
	(c86_4g_m7_avx512_vpmovx_z_load): Ditto.
	(c86_4g_m7_avx512_vpmovx_x): Ditto.
	(c86_4g_m7_avx512_vpmovx_x_load): Ditto.
	(c86_4g_m7_avx_vpmovx_xx): Ditto.
	(c86_4g_m7_avx_vpmovx_xx_load): Ditto.
	(c86_4g_m7_avx512_expand): Ditto.
	(c86_4g_m7_avx512_expand_load): Ditto.
	(c86_4g_m7_avx512_expand_z): Ditto.
	(c86_4g_m7_avx512_expand_z_load): Ditto.
	(c86_4g_m7_avx512_movnt_load): Ditto.
	(c86_4g_m7_avx512_movnt_store): Ditto.
	(c86_4g_m7_sse_movnt_store): Ditto.
	(c86_4g_m7_sse_movnt): Ditto.
	(c86_4g_m7_avx512_blendv): Ditto.
	(c86_4g_m7_avx512_blendv_load): Ditto.
	(c86_4g_m7_sse_mov2): Ditto.
	(c86_4g_m7_sse_mov2_load): Ditto.
	(c86_4g_m7_avx512_sseishft_aligr): Ditto.
	(c86_4g_m7_avx512_sseishft_aligr_load): Ditto.
	(c86_4g_m7_avx512_sseishft_vshift): Ditto.
	(c86_4g_m7_avx512_sseishft_vshift_load): Ditto.
	(c86_4g_m7_avx512_sseadd_maxmin): Ditto.
	(c86_4g_m7_avx512_sseadd_maxmin_load): Ditto.
	(c86_4g_m7_avx_sseadd_maxmin): Ditto.
	(c86_4g_m7_avx_sseadd_maxmin_load): Ditto.
	(c86_4g_m7_sse_sseadd_maxmin): Ditto.
	(c86_4g_m7_sse_sseadd_maxmin_load): Ditto.
	(c86_4g_m7_avx512_sseadd): Ditto.
	(c86_4g_m7_avx512_sseadd_load): Ditto.
	(c86_4g_m7_avx_sseadd_hplus): Ditto.
	(c86_4g_m7_avx_sseadd_hplus_load): Ditto.
	(c86_4g_m7_avx512_sseiadd_madd): Ditto.
	(c86_4g_m7_avx512_sseiadd_madd_mem): Ditto.
	(c86_4g_m7_avx_sseiadd_sadbw): Ditto.
	(c86_4g_m7_avx_sseiadd_sadbw_mem): Ditto.
	(c86_4g_m7_sse_sseiadd_sadbw): Ditto.
	(c86_4g_m7_sse_sseiadd_sadbw_mem): Ditto.
	(c86_4g_m7_sse_sseiadd_madd): Ditto.
	(c86_4g_m7_sse_sseiadd_madd_mem): Ditto.
	(c86_4g_m7_avx512_sseiadd_avg): Ditto.
	(c86_4g_m7_avx512_sseiadd_avg_load): Ditto.
	(c86_4g_m7_avx_sseiadd_hplus): Ditto.
	(c86_4g_m7_avx_sseiadd_hplus_load): Ditto.
	(c86_4g_m7_sse_sseiadd_hplus): Ditto.
	(c86_4g_m7_sse_sseiadd_hplus_load): Ditto.
	(c86_4g_m8_avx512_ssemul): New reservation.
	(c86_4g_m8_avx512_ssemul_load): Ditto.
	(c86_4g_m7_avx512_ssediv_x): Add c86_4g_m8 to CPU attribute.
	(c86_4g_m7_avx512_ssediv_xmem): Ditto.
	(c86_4g_m7_avx512_ssediv_y): Ditto.
	(c86_4g_m7_avx512_ssediv_ymem): Ditto.
	(c86_4g_m7_avx512_ssediv_z): Ditto.
	(c86_4g_m7_avx512_ssediv_zmem): Ditto.
	(c86_4g_m7_avx512_ssecmp): Ditto.
	(c86_4g_m7_avx512_ssecmp_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_z): Ditto.
	(c86_4g_m7_avx512_ssecmp_z_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_vp): Ditto.
	(c86_4g_m7_avx512_ssecmp_vp_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_vp_z): Ditto.
	(c86_4g_m7_avx512_ssecmp_vp_z_load): Ditto.
	(c86_4g_m7_avx_ssecmp_vp): Ditto.
	(c86_4g_m7_avx_ssecmp_vp_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_test): Ditto.
	(c86_4g_m7_avx512_ssecmp_test_load): Ditto.
	(c86_4g_m7_avx512_ssecvt_xy): Ditto.
	(c86_4g_m7_avx512_ssecvt_xy_load): Ditto.
	(c86_4g_m7_avx512_ssecvt_y_z): Ditto.
	(c86_4g_m7_avx512_ssecvt_y_z_load): Ditto.
	(c86_4g_m7_avx512_ssecvt_z): Ditto.
	(c86_4g_m7_avx512_ssecvt_z_load): Ditto.
	(c86_4g_m7_avx_ssecvt): Ditto.
	(c86_4g_m7_avx_ssecvt_load): Ditto.
	(c86_4g_m7_sse_ssecvt_pspi): Ditto.
	(c86_4g_m7_sse_ssecvt_pspi_load): Ditto.
	(c86_4g_m7_sse_ssecvt_pi): Ditto.
	(c86_4g_m7_sse_ssecvt_pi_load): Ditto.
	(c86_4g_m8_avx512_muladd): New reservation.
	(c86_4g_m8_avx512_muladd_load): Ditto.
	(c86_4g_m7_avx512_muladd_madd): Add c86_4g_m8 to CPU attribute.
	(c86_4g_m7_avx512_muladd_madd_load): Ditto.
	(c86_4g_m7_avx512_sse_range): Ditto.
	(c86_4g_m7_avx512_sse_range_load): Ditto.
	(c86_4g_m7_avx512_sse_conflict_x): Ditto.
	(c86_4g_m7_avx512_sse_conflict_x_load): Ditto.
	(c86_4g_m7_avx512_sse_conflict_y): Ditto.
	(c86_4g_m7_avx512_sse_conflict_y_load): Ditto.
	(c86_4g_m7_avx512_sse_conflict_z): Ditto.
	(c86_4g_m7_avx512_sse_conflict_z_load): Ditto.
	(c86_4g_m7_avx512_sse_class): Ditto.
	(c86_4g_m7_avx512_sse_class_load): Ditto.
	(c86_4g_m7_avx512_sse_class_z): Ditto.
	(c86_4g_m7_avx512_sse_class_z_load): Ditto.
	(c86_4g_m7_avx_sse): Ditto.
	(c86_4g_m7_avx_sse_load): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_sf_x): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_sf_xload): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_sf_y): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_sf_yload): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_sf_z): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_sf_zload): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_df_x): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_df_xload): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_df_y): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_df_yload): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_df_z): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_df_zload): Ditto.
	(c86_4g_m7_avx512_msklog): Ditto.
	(c86_4g_m7_avx512_msklog_vector): Ditto.
	(c86_4g_m7_avx512_mskmov_reg_k): Ditto.
	(c86_4g_m7_avx512_mskmov_xy_k): Ditto.
	(c86_4g_m7_avx512_mskmov_z_k): Ditto.
	(c86_4g_m7_avx512_mskmov_k_k): Ditto.
	(c86_4g_m7_avx512_mskmov_k_reg): Ditto.
	(c86_4g_m7_avx512_mskmov_k_m): Ditto.
	* config/i386/driver-i386.cc (host_detect_local_cpu): Detect
	c86-4g-m8.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
	c86-4g-m8 arch and tune macros.
	* config/i386/i386-options.cc (m_C86_4G_M8): New macro.
	(m_C86_4G): Include m_C86_4G_M8.
	(processor_cost_table): Add c86_4g_m8_cost.
	* config/i386/i386.cc (ix86_reassociation_width): Handle
	PROCESSOR_C86_4G_M8.
	* config/i386/i386.h (enum processor_type): Add
	PROCESSOR_C86_4G_M8.
	(PTA_C86_4G_M8): New.
	* config/i386/i386.md: Add c86_4g_m8 to cpu attribute.
	* config/i386/x86-tune-costs.h (c86_4g_m8_cost): New.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Handle
	PROCESSOR_C86_4G_M8.
	(ix86_adjust_cost): Likewise.
	* config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Include
	m_C86_4G_M8.
	(X86_TUNE_USE_SCATTER_4PARTS): Likewise.
	(X86_TUNE_USE_SCATTER_8PARTS): Likewise.
	(X86_TUNE_SSE_REDUCTION_PREFER_PSHUF): Likewise.
	(X86_TUNE_AVX512_SPLIT_REGS): Likewise.
	(X86_TUNE_AVX512_MOVE_BY_PIECES): Likewise.
	(X86_TUNE_AVX512_MASKED_EPILOGUES): Likewise.
	* doc/extend.texi: Document c86-4g-m8 for __builtin_cpu_is.
	* doc/invoke.texi: Document c86-4g-m8.

2026-07-01  Zhongjie Guo  <guozhongjie@hygon.cn>

	Backported from master:
	2026-06-17  Zhongjie Guo  <guozhongjie@hygon.cn>

	* config/i386/x86-tune-costs.h (c86_4g_m7_cost): Increase
	512-bit load/store and unaligned load/store costs.

2026-07-01  Xin Liu  <liulxx@hygon.cn>

	Backported from master:
	2026-06-17  Xin Liu  <liulxx@hygon.cn>

	* config/i386/c86-4g-m7.md (c86_4g_m7_imov_xchg): Adjust
	reservation units.
	(c86_4g_m7_imov_xchg_load): Ditto.
	(c86_4g_m7_call): Ditto.
	(c86_4g_m7_branch): Ditto.
	(c86_4g_m7_branch_load): Ditto.
	(c86_4g_m7_fp_spc_direct): Add missing store unit.
	(c86_4g_m7_sse_pinsr_reg): Adjust reservation units.
	(c86_4g_m7_avx512_insertx_ymm): Ditto.
	(c86_4g_m7_avx512_insertx_ymem): Ditto.
	(c86_4g_m7_avx512_insertx_zxmm): Ditto.
	(c86_4g_m7_avx512_insertx_zxmem): Ditto.
	(c86_4g_m7_avx512_abs_load): Add missing store unit.
	(c86_4g_m7_avx_sign): Use combined FPU reservation.
	(c86_4g_m7_avx_sign_load): Ditto.
	(c86_4g_m7_avx_aes): Ditto.
	(c86_4g_m7_avx_aes_load): Ditto.
	(c86_4g_m7_extr_load): Rename to ...
	(c86_4g_m7_extr_store): ... this and restrict to store memory.
	(c86_4g_m7_avx_imul): Use combined FPU reservation.
	(c86_4g_m7_avx_imul_mem): Ditto.
	(c86_4g_m7_avx512_vpmovx_y_load): Add missing store unit.
	(c86_4g_m7_avx_vpmovx_xx_load): Ditto.
	(c86_4g_m7_avx512_sseadd_maxmin_xy): Rename to ...
	(c86_4g_m7_avx512_sseadd_maxmin): ... this and simplify
	memory attribute check.
	(c86_4g_m7_avx512_sseadd_maxmin_xy_load): Rename to ...
	(c86_4g_m7_avx512_sseadd_maxmin_load): ... this and simplify
	memory attribute check.
	(c86_4g_m7_avx512_sseadd_xy): Rename to ...
	(c86_4g_m7_avx512_sseadd): ... this.
	(c86_4g_m7_avx512_sseadd_xy_load): Rename to ...
	(c86_4g_m7_avx512_sseadd_load): ... this.
	(c86_4g_m7_sse_sseiadd_sadbw): Use combined FPU reservation.
	(c86_4g_m7_sse_sseiadd_sadbw_mem): Ditto.
	(c86_4g_m7_avx512_ssecmp_vp_z): Adjust reservation units.
	(c86_4g_m7_avx512_ssecmp_vp_z_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_test_load): Ditto.
	(c86_4g_m7_avx512_mskmov_k_m): Adjust latency.

2026-06-30  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Backported from master:
	2026-06-12  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR rtl-optimization/125173
	* ira.cc (combine_and_move_insns): Allow multiple uses within
	an insn.

2026-06-30  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-04-22  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/124908
	* config/aarch64/aarch64-sve-builtins-base.cc
	(svld1rq_impl::fold): When the SVE vector length equals the
	quadword width, emit VIEW_CONVERT_EXPR instead of VEC_PERM_EXPR.

2026-06-30  Alfie Richards  <alfie.richards@arm.com>

	PR target/125838
	* config/aarch64/aarch64.cc (aarch64_fntype_abi): Fall back to
	AAPCS for preserve_none variadic calls.

2026-06-30  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-06-21  H.J. Lu  <hjl.tools@gmail.com>

	PR target/125883
	* config/i386/i386-features.cc (ix86_broadcast_inner): Skip JUMP
	from asm goto.

2026-06-29  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2026-06-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/125818
	* config/aarch64/aarch64-sve-builtins-base.cc (svset_impl::fold): Fix
	unsharing to ensure the returned stmt has the exact same lhs as the
	original.

2026-06-29  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-06-29  Jakub Jelinek  <jakub@redhat.com>

	PR target/125469
	* config/i386/i386.md (*add<mode>_1<nf_name>): Revert 2026-05-28
	changes.
	(define_split from *add<mode>_1_nf to *lea<mode>): Set INSN_CODE
	to -1 if <LEAMODE> and <MODE> are the same.

2026-06-29  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-05-28  Jakub Jelinek  <jakub@redhat.com>

	PR target/125469
	* config/i386/i386.md (*add<mode>_1<nf_name>): Don't return "#" for
	the lea non-TARGET_APX_NDD case, instead emit a lea directly.

2026-06-29  vekumar  <Venkataramanan.Kumar@amd.com>

	Backported from master:
	2026-06-26  vekumar  <Venkataramanan.Kumar@amd.com>

	PR target/125949
	* config/i386/i386.md ("isa"): Add avxvnniint8.
	("enabled"): Adjust for avxvnniint8.
	* config/i386/sse.md (vpdp<vpdotprodtype>_<mode>): Adjust for
	AVXVNNIINT8.

2026-06-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-06-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/125992
	* config/s390/s390.md (*brx_stage1_<GPR:mode>): Add CC_REGNUM clobber.

2026-06-25  Peter Bergner  <bergner@tenstorrent.com>

	* config/riscv/riscv-cores.def (RISCV_TUNE): Add tt-ascalon-x.
	(RISCV_CORE): Likewise.
	* doc/riscv-mcpu.texi: Regenerate.
	* doc/riscv-mtune.texi: Likewise.

2026-06-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-25  Richard Biener  <rguenther@suse.de>

	PR middle-end/125977
	* cfgexpand.cc (pass_expand::execute): Guard ranger use
	on optimize.

2026-06-25  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-06-25  Xi Ruoyao  <xry111@xry111.site>

	PR target/125628
	* config/mips/sync.md (sync_old_<optab><mode>): Fix
	uninitialized operand use.
	(sync_new_<optab><mode>): Fix uninitialized operand use, use the
	same expression for the set source of operand 0 and 1.

2026-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/riscv/arch-canonicalize: Avoid f"..." strings.

2026-06-25  Oleg Tolmatcev  <oleg.tolmatcev@gmail.com>

	Backported from master:
	2026-06-24  Oleg Tolmatcev  <oleg.tolmatcev@gmail.com>

	* config/i386/prfchwintrin.h (_m_prefetchw): Take
	volatile const void * instead of void *.

2026-06-24  Jan Beulich  <jbeulich@suse.com>

	* doc/ifn.texi: Drop blanks after @code.

2026-06-23  Xi Ruoyao  <xry111@xry111.site>

	Revert:
	2026-06-09  Xi Ruoyao  <xry111@xry111.site>

	* config/mips/sync.md (sync_old_<optab><mode>): Fix
	uninitialized operand use.
	(sync_new_<optab><mode>): Fix uninitialized operand use, use the
	same expression for the set source of operand 0 and 1.

2026-06-22  Robin Dapp  <rdapp.gcc@gmail.com>

	Backported from master:
	2026-06-17  Robin Dapp  <rdapp.gcc@gmail.com>

	PR target/125478
	* config/riscv/vector.md: Set widen-alu mode_idx to 3.

2026-06-22  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-06-09  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	* config/rs6000/amo.h (_AMO_LD): Add _AMO_LD_CS_EQ enumerator, gated on
	_ARCH_FUTURE.
	(amo_lwat_cas_eq, amo_lwat_scas_eq, amo_ldat_cas_eq,
	amo_ldat_scas_eq): New compare-and-swap equal helper functions.
	(_AMO_ERR_CMPSWP): New macro for error-attribute stubs on non-Future
	targets.
	* doc/extend.texi (PowerPC Atomic Memory Operation Functions): Document
	new functions.

2026-06-22  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-06-04  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	PR target/106895
	* config/rs6000/rs6000.h (enum rs6000_builtin_type_index): Add
	RS6000_BTI_INTPTI and RS6000_BTI_UINTPTI.
	(intPTI_type_internal_node, uintPTI_type_internal_node): New
	PTImode type macros.
	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Register
	signed and unsigned PTImode internal builtin types.
	* config/rs6000/sync.md (trunctipti2): New splitter.
	(extendptiti2): Likewise.
	(zero_extendptiti2): Likewise.

2026-06-22  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-05-13  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	PR target/122665
	* config/rs6000/vsx.md (smul<mode>3_highpart, umul<mode>3_highpart):
	Replace shift-based patterns with smul_highpart and umul_highpart RTL
	codes and use altivec_register_operand.

2026-06-22  Jeevitha  <jeevitha@linux.ibm.com>

	Backported from master:
	2026-05-19  Peter Bergner  <bergner@linux.ibm.com>
		    Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	* config/rs6000/amo.h: Add missing atomic memory operations.
	* doc/extend.texi (PowerPC Atomic Memory Operation Functions): Document
	new functions.

2026-06-22  Robin Dapp  <rdapp.gcc@gmail.com>

	Backported from master:
	2026-06-16  Robin Dapp  <rdapp.gcc@gmail.com>

	PR target/125670
	* config/riscv/autovec-opt.md: Use avl_type operand number.

2026-06-20  Arsen Arsenović  <aarsenovic@baylibre.com>

	Backported from master:
	2026-06-19  Arsen Arsenović  <aarsenovic@baylibre.com>

	* doc/extend.texi: Move @anchor-s referring to tops of nodes
	after their corresponding @node lines.
	* doc/invoke.texi: Ditto.

2026-06-19  Eric Botcazou  <ebotcazou@adacore.com>

	* acinclude.m4 (gcc_GAS_FLAGS): Set to --32 for abi32 targets.
	* configure.ac (TLS support): Use 32-bit sequence for abi32 targets.
	* configure: Regenerate.

2026-06-17  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2026-06-09  Alex Coplan  <alex.coplan@arm.com>

	PR middle-end/125621
	* expmed.cc (make_tree): Fix CONST_POLY_INT case to pass type
	instead of t, move it to its own switch case.

2026-06-17  Kishan Parmar  <kishan@linux.ibm.com>

	Backported from master:
	2026-05-22  Steve Markgraf  <steve@steve-m.de>

	* config/rs6000/rs6000.h (TARGET_NO_LWSYNC): Add PROCESSOR_MPCCORE.

2026-06-17  Tamar Christina  <tamar.christina@arm.com>

	Backported from master:
	2026-05-27  Tamar Christina  <tamar.christina@arm.com>

	PR target/125148
	* config/aarch64/aarch64-sve.md
	(*aarch64_vec_shl_insert_into_zero_<mode>,
	*aarch64_vec_shl_insert_into_zero_vnx16qi,
	*aarch64_vec_shl_insert_from_load_<mode>): New.
	* config/aarch64/aarch64.cc (aarch64_emit_load_store_through_mode):
	Replace paradoxical subreg with zero-extend.

2026-06-17  Tamar Christina  <tamar.christina@arm.com>

	Backported from master:
	2026-06-03  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/125431
	* tree-vect-slp-patterns.cc (complex_mul_pattern::matches,
	complex_fms_pattern::matches): Gate on FP contraction.

2026-06-17  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-06-15  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/125795
	* config/aarch64/aarch64-early-ra.cc (early_ra::allocate_colors):
	Compute the allocated-FPR mask as
	((1ULL << color->group->size) - 1) << best.

2026-06-17  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/125501
	* tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges): Abort
	if there are 2 SSA_NAMES on the branch condition.

2026-06-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	Backported from master:
	2026-06-13  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/125776
	* tree-ssa-phiopt.cc (is_factor_profitable): An
	usage in a debug stmt should be ignored.

2026-06-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	Backported from master:
	2026-06-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/125774
	* gimple-range-fold.cc (fold_using_range::relation_fold_and_or): Use
	relation_swap rather than relation_negate when the operands are exchanged.

2026-06-16  Carter Rennick  <carter.rennick@gmail.com>

	Backported from master:
	2026-04-24  Carter Rennick  <carter.rennick@gmail.com>

	PR target/120144
	* config/mips/mips.h (MAX_FIXED_MODE_SIZE): Remove.

2026-06-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	Backported from master:
	2026-06-10  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR ipa/125699
	* ipa-param-manipulation.cc (ipa_param_body_adjustments::prepare_debug_expressions): Fix
	lifetime issue with m_dead_ssa_debug_equiv usage.

2026-06-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	Backported from master:
	2026-05-24  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/125419
	* tree-if-conv.cc (factor_out_operators): Change
	asserts about abnormals into a conditional to reject
	it.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125652
	* tree-chrec.cc (chrec_fold_plus_poly_poly): Avoid UB
	integer overflow in accumulating CHREC_RIGHT.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125686
	* tree-vect-patterns.cc (synth_lshift_by_additions): Specify
	pattern vector type.
	(apply_binop_and_append_stmt): Likewise.
	(vect_synth_mult_by_constant): Adjust.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125646
	* tree-vect-patterns.cc (vect_synth_mult_by_constant): Assign
	vector type to the pattern def sequence stmts.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125553
	* tree-ssa-sccvn.cc (visit_nary_op): Valueize the BIT_FIELD_REF
	operand before looking at its definition.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125545
	* tree-ssa-reassoc.cc (insert_stmt_after): Allow asm goto
	with a single successor.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125502
	* tree-ssa-forwprop.cc (optimize_vector_load): Do not
	move defs of abnormals.

2026-06-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-06-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125477
	* tree-vect-loop-manip.cc (vect_loop_versioning): Verify we
	can duplicate an outer loop before considering to version it.

2026-06-15  Kishan Parmar  <kishan@linux.ibm.com>

	Backported from master:
	2026-05-04  Kishan Parmar  <kishan@linux.ibm.com>

	* config.gcc (powerpc*-*-*): Add support for supporting
	--with-cpu=future.
	* config/rs6000/aix71.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
	if the user used the -mcpu=future option.
	* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Handle
	ENB_FUTURE and issue diagnostic requiring -mcpu=future.
	(rs6000_builtin_is_supported): Return TARGET_FUTURE for
	ENB_FUTURE built-ins.
	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
	_ARCH_FUTURE if -mcpu=future.
	* config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macro.
	(POWERPC_MASKS): Add OPTION_MASK_FUTURE.
	(rs6000_cpu_opt_value): New entry for 'future' via the RS6000_CPU macro.
	* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
	BSTZ_FUTURE for future.
	(write_decls): Add ENB_FUTURE in bif_enable enum of generated header
	file.
	* config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): New macro.
	* config/rs6000/rs6000-tables.opt: Regenerate.
	* config/rs6000/rs6000.cc (rs6000_machine_from_flags) If -mcpu=future,
	set the .machine directive to "future".
	(rs6000_opt_masks): Add entry for -mfuture.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Pass -mfuture to the assembler
	if the user used the -mcpu=future option.
	* config/rs6000/rs6000.opt (-mfuture): New option.
	* doc/invoke.texi (IBM RS/6000 and PowerPC Options): Document
	-mcpu=future.

2026-06-11  Georg-Johann Lay  <avr@gjlay.de>

	Backported from master:
	2026-06-11  Georg-Johann Lay  <avr@gjlay.de>

	PR target/125751
	* config/avr/avr.cc (avr_out_fract): Fix too small sequence
	lengths in avr_asm_len calls.

2026-06-11  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR testsuite/113276
	* doc/sourcebuild.texi (arm_mixed_fp): Document.

2026-06-09  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-06-08  Xi Ruoyao  <xry111@xry111.site>

	* config/mips/sync.md (sync_old_<optab><mode>): Fix
	uninitialized operand use.
	(sync_new_<optab><mode>): Fix uninitialized operand use, use the
	same expression for the set source of operand 0 and 1.

2026-06-09  Kewen Lin  <linkewen@hygon.cn>

	Backported from master:
	2026-05-28  Kewen Lin  <linkewen@hygon.cn>
		    Xin Liu  <liulxx@hygon.cn>

	* config/i386/c86-4g-m7.md (c86_4g_m7_fpu): Remove automaton.
	(c86_4g_m7_fpu02): New automaton.
	(c86_4g_m7_fpu13): Ditto.
	(c86-4g-m7-fpu0): Move to c86_4g_m7_fpu02 automaton.
	(c86-4g-m7-fpu1): Move to c86_4g_m7_fpu13 automaton.
	(c86-4g-m7-fpu2): Move to c86_4g_m7_fpu02 automaton.
	(c86-4g-m7-fpu3): Move to c86_4g_m7_fpu13 automaton.
	(c86-4g-m7-fdiv): Remove cpu unit.
	(c86-4g-m7-fdiv1): New cpu unit.
	(c86-4g-m7-fdiv3): Ditto.
	(c86-4g-m7-fpu_0_3): New reservation.
	(c86-4g-m7-fpu_1_3x2): Ditto.
	(c86-4g-m7-fpu_1_3x3): Ditto.
	(c86-4g-m7-fpu_1_3x6): Ditto.
	(c86-4g-m7-fpux2): Ditto.
	(c86-4g-m7-fpux4): Ditto.
	(c86-4g-m7-fpux6): Ditto.
	(c86-4g-m7-fpux8): Ditto.
	(c86-4g-m7-fpux16): Ditto.
	(c86-4g-m7-fp1fdiv1x4): Ditto.
	(c86-4g-m7-fp3fdiv3x4): Ditto.
	(c86-4g-m7-fdiv13): Ditto.
	(c86-4g-m7-fp13div13): Ditto.
	(c86-4g-m7-fp13div13x4): Ditto.
	(c86-4g-m7-fp1div1_fp3div3_x4x8): Ditto.
	(c86-4g-m7-fp1div1_fp3div3_x4x9): Ditto.
	(c86-4g-m7-fp1div1_fp3div3_x4x11): Ditto.
	(c86-4g-m7-fp1div1_fp3div3_x4x15): Ditto.
	(c86-4g-m7-fp1div1_fp3div3_x4x18): Ditto.
	(c86_4g_m7_idiv): New reservation.
	(c86_4g_m7_idiv_QI): Adjust reservation latency and unit occupancy.
	(c86_4g_m7_idiv_load): New reservation.
	(c86_4g_m7_idiv_QI_load): Adjust reservation latency and unit
	occupancy.
	(c86_4g_m7_idiv_DI): Remove reservation.
	(c86_4g_m7_idiv_SI): Ditto.
	(c86_4g_m7_idiv_HI): Ditto.
	(c86_4g_m7_idiv_DI_load): Ditto.
	(c86_4g_m7_idiv_SI_load): Ditto.
	(c86_4g_m7_idiv_HI_load): Ditto.
	(c86_4g_m7_sse_insertimm): Adjust reservation units and unit
	occupancy.
	(c86_4g_m7_sse_insert): Ditto.
	(c86_4g_m7_fp_sqrt): Adjust reservation.
	(c86_4g_m7_fp_div): Ditto.
	(c86_4g_m7_fp_div_load): Ditto.
	(c86_4g_m7_fp_idiv_load): Ditto.
	(c86_4g_m7_sse_pinsr_reg): Adjust reservation units and unit
	occupancy.
	(c86_4g_m7_sse_pinsr_reg_load): Ditto.
	(c86_4g_m7_avx_vpinsr_reg): Ditto.
	(c86_4g_m7_avx_vpinsr_reg_load): Ditto.
	(c86_4g_m7_avx512_perm_xmm): Delete the prefix condition.
	(c86_4g_m7_avx512_perm_xmm_opload): Ditto.
	(c86_4g_m7_avx512_permi2_ymm): Adjust reservation units and unit
	occupancy.
	(c86_4g_m7_avx512_permi2_zmm): Ditto.
	(c86_4g_m7_avx512_permi2_ymm_load): Ditto.
	(c86_4g_m7_avx512_permi2_zmm_load): Ditto.
	(c86_4g_m7_avx512_perm_zmm_imm): Ditto.
	(c86_4g_m7_avx512_perm_zmm_imm_load): Ditto.
	(c86_4g_m7_avx512_perm_zmm_noimm): Ditto.
	(c86_4g_m7_sse_perm_zmm_noimm_load): Ditto.
	(c86_4g_m7_avx_perm_ymm): Remove.
	(c86_4g_m7_avx_perm_ymem): Ditto.
	(c86_4g_m7_avx512_shuf_zmm): Adjust reservation units and unit
	occupancy.
	(c86_4g_m7_avx512_shuf_zmem): Ditto.
	(c86_4g_m7_avx512_cmpestr): Ditto.
	(c86_4g_m7_avx512_cmpestr_load): Ditto.
	(c86_4g_m7_avx512_vdbpsadbw_zmm): Ditto.
	(c86_4g_m7_avx512_vdbpsadbw_zmem): Ditto.
	(c86_4g_m7_avx_ssecomi_comi): Ditto.
	(c86_4g_m7_avx_ssecomi_comi_load): Ditto.
	(c86_4g_m7_avx512_expand): Ditto.
	(c86_4g_m7_avx512_expand_load): Ditto.
	(c86_4g_m7_avx512_expand_z): Ditto.
	(c86_4g_m7_avx512_expand_z_load): Ditto.
	(c86_4g_m7_sse_movnt_xy): Rename to c86_4g_m7_sse_movnt.
	(c86_4g_m7_avx512_sseadd_xy): Adjust reservation units.
	(c86_4g_m7_avx512_sseadd_xy_load): Ditto.
	(c86_4g_m7_sse_sseiadd_hplus): Adjust reservation units and unit
	occupancy.
	(c86_4g_m7_sse_sseiadd_hplus_load): Ditto.
	(c86_4g_m7_avx512_ssemul): Adjust reservation units.
	(c86_4g_m7_avx512_ssemul_load): Ditto.
	(c86_4g_m7_avx512_ssediv): Remove.
	(c86_4g_m7_avx512_ssediv_mem): Remove.
	(c86_4g_m7_avx512_ssediv_x): New.
	(c86_4g_m7_avx512_ssediv_xmem): New.
	(c86_4g_m7_avx512_ssediv_y): New.
	(c86_4g_m7_avx512_ssediv_ymem): New.
	(c86_4g_m7_avx512_ssediv_z): Adjust reservation units.
	(c86_4g_m7_avx512_ssediv_zmem): Ditto.
	(c86_4g_m7_avx512_ssecmp_z): Add reservation units and unit
	occupancy.
	(c86_4g_m7_avx512_ssecmp_z_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_vp_z): New reservation.
	(c86_4g_m7_avx512_ssecmp_vp_z_load): Ditto.
	(c86_4g_m7_avx512_ssecmp_test_z): Remove reservation.
	(c86_4g_m7_avx512_ssecmp_test_z_load): Ditto.
	(c86_4g_m7_avx512_muladd): Broaden matching condition.
	(c86_4g_m7_avx512_muladd_load): Ditto.
	(c86_4g_m7_fma_muladd): Remove reservation.
	(c86_4g_m7_fma_muladd_load): Ditto.
	(c86_4g_m7_avx512_sse_conflict_x): Add reservation units and unit
	occupancy.
	(c86_4g_m7_avx512_sse_conflict_x_load): Ditto.
	(c86_4g_m7_avx512_sse_conflict_y): Ditto.
	(c86_4g_m7_avx512_sse_conflict_y_load): Ditto.
	(c86_4g_m7_avx512_sse_conflict_z): Ditto.
	(c86_4g_m7_avx512_sse_conflict_z_load): Ditto.
	(c86_4g_m7_avx512_sse_class_z): Add reservation units and unit
	occupancy.
	(c86_4g_m7_avx512_sse_class_z_load): Ditto.
	(c86_4g_m7_avx512_sse_sqrt): Remove.
	(c86_4g_m7_avx512_sse_sqrt_load): Remove.
	(c86_4g_m7_avx512_sse_sqrt_sf_x): New.
	(c86_4g_m7_avx512_sse_sqrt_sf_xload): New.
	(c86_4g_m7_avx512_sse_sqrt_sf_y): New.
	(c86_4g_m7_avx512_sse_sqrt_sf_yload): New.
	(c86_4g_m7_avx512_sse_sqrt_sf_z): New.
	(c86_4g_m7_avx512_sse_sqrt_sf_zload): New.
	(c86_4g_m7_avx512_sse_sqrt_df_x): New.
	(c86_4g_m7_avx512_sse_sqrt_df_xload): New.
	(c86_4g_m7_avx512_sse_sqrt_df_y): New.
	(c86_4g_m7_avx512_sse_sqrt_df_yload): New.
	(c86_4g_m7_avx512_sse_sqrt_df_z): New.
	(c86_4g_m7_avx512_sse_sqrt_df_zload): New.
	(c86_4g_m7_avx512_msklog_vector): Add reservation units and unit
	occupancy.
	(c86_4g_m7_avx512_mskmov_z_k): Ditto.
	(c86_4g_m7_avx512_mskmov_k_reg): Ditto.
	* config/i386/c86-4g.md (c86_4g_fp): Remove automaton.
	(c86_4g_fp024): New automaton.
	(c86_4g_fp1): Ditto.
	(c86-4g-fp0): Move to c86_4g_fp024 automaton.
	(c86-4g-fp1): Move to c86_4g_fp1 automaton.
	(c86-4g-fp2): Move to c86_4g_fp024 automaton.
	(c86-4g-fp3): Ditto.
	(c86-4g-fp1fdivx4): New reservation.
	(c86_4g_fp_sqrt): Adjust reservation.
	(c86_4g_sse_sqrt_sf): Ditto.
	(c86_4g_sse_sqrt_sf_mem): Ditto.
	(c86_4g_sse_sqrt_df): Ditto.
	(c86_4g_sse_sqrt_df_mem): Ditto.
	(c86_4g_fp_op_div): Ditto.
	(c86_4g_fp_op_div_load): Ditto.
	(c86_4g_fp_op_idiv_load): Adjust reservation latency.
	(c86_4g_ssediv_ss_ps): Adjust reservation.
	(c86_4g_ssediv_ss_ps_load): Ditto.
	(c86_4g_ssediv_sd_pd): Ditto.
	(c86_4g_ssediv_sd_pd_load): Ditto.
	(c86_4g_ssediv_avx256_ps): Ditto.
	(c86_4g_ssediv_avx256_ps_load): Ditto.
	(c86_4g_ssediv_avx256_pd): Ditto.
	(c86_4g_ssediv_avx256_pd_load): Ditto.

2026-06-09  Kewen Lin  <linkewen@hygon.cn>

	Backported from master:
	2026-05-01  Kewen Lin  <linkewen@hygon.cn>

	* config/i386/c86-4g-m7.md (c86_4g_m7_idiv): New automaton.
	(c86_4g_m7_fdiv): Ditto.
	(c86-4g-m7-idiv): New unit.
	(c86-4g-m7-fdiv): Ditto.
	(c86_4g_m7_idiv_DI): Adjust unit in the reservation.
	(c86_4g_m7_idiv_SI): Ditto.
	(c86_4g_m7_idiv_HI): Ditto.
	(c86_4g_m7_idiv_QI): Ditto.
	(c86_4g_m7_idiv_DI_load): Ditto.
	(c86_4g_m7_idiv_SI_load): Ditto.
	(c86_4g_m7_idiv_HI_load): Ditto.
	(c86_4g_m7_idiv_QI_load): Ditto.
	(c86_4g_m7_fp_div): Ditto.
	(c86_4g_m7_fp_div_load): Ditto.
	(c86_4g_m7_fp_idiv_load): Ditto.
	(c86_4g_m7_avx512_ssediv): Ditto.
	(c86_4g_m7_avx512_ssediv_mem): Ditto.
	(c86_4g_m7_avx512_ssediv_z): Ditto.
	(c86_4g_m7_avx512_ssediv_zmem): Ditto.
	(c86_4g_m7_avx512_sse_sqrt): Ditto.
	(c86_4g_m7_avx512_sse_sqrt_load): Ditto.
	(c86_4g_m7_fp_sqrt): Ditto.  Rename from ...
	(c86_4g_m7fp_sqrt): ... here.
	* config/i386/c86-4g.md (c86_4g_idiv): New automaton.
	(c86_4g_fdiv): Ditto.
	(c86-4g-idiv): New unit.
	(c86-4g-fdiv): Ditto.
	(c86_4g_idiv_DI): Ditto.
	(c86_4g_idiv_SI): Ditto.
	(c86_4g_idiv_HI): Ditto.
	(c86_4g_idiv_QI): Ditto.
	(c86_4g_idiv_mem_DI): Ditto.
	(c86_4g_idiv_mem_SI): Ditto.
	(c86_4g_idiv_mem_HI): Ditto.
	(c86_4g_idiv_mem_QI): Ditto.
	(c86_4g_fp_sqrt): Ditto.
	(c86_4g_sse_sqrt_sf): Ditto.
	(c86_4g_sse_sqrt_sf_mem): Ditto.
	(c86_4g_sse_sqrt_df): Ditto.
	(c86_4g_sse_sqrt_df_mem): Ditto.
	(c86_4g_fp_op_div): Ditto.
	(c86_4g_fp_op_div_load): Ditto.
	(c86_4g_fp_op_idiv_load): Ditto.
	(c86_4g_ssediv_ss_ps): Ditto.
	(c86_4g_ssediv_ss_ps_load): Ditto.
	(c86_4g_ssediv_ss_pd): Ditto.
	(c86_4g_ssediv_ss_pd_load): Ditto.
	(c86_4g_ssediv_avx256_ps): Ditto.
	(c86_4g_ssediv_avx256_ps_load): Ditto.
	(c86_4g_ssediv_avx256_pd): Ditto.
	(c86_4g_ssediv_avx256_pd_load): Ditto.

2026-06-09  Xin Liu  <liulxx@hygon.cn>

	Backported from master:
	2026-04-29  Xin Liu  <liulxx@hygon.cn>
		    Zhaoling Bao  <baozhaoling@hygon.cn>

	* common/config/i386/cpuinfo.h (get_hygon_cpu): Detect the specific
	type of HYGON CPU and return HYGON CPU name.
	(cpu_indicator_init): Handle HYGON CPU.
	* common/config/i386/i386-common.cc (processor_names): Add HYGON
	C86-4G processors c86-4g-m{4,6,7}.
	(processor_alias_table): Add hygon, hygonfam18h and c86-4g-m{4,6,7}
	entries.
	(ARRAY_SIZE): Update as new entries added.
	* common/config/i386/i386-cpuinfo.h (enum processor_vendor): Add
	VENDOR_HYGON.
	(enum processor_types): Add HYGONFAM18H.
	(enum processor_subtypes): Add HYGONFAM18H_C86_4G_M{4,6,7}.
	* config.gcc: Add support for c86_4g_m{4,6,7}.
	* config/i386/cpuid.h (signature_HYGON_ebx):  Add signature for HYGON.
	(signature_HYGON_ecx): Ditto.
	(signature_HYGON_edx): Ditto.
	* config/i386/driver-i386.cc (host_detect_local_cpu): Support HYGON
	c86-4g-m4{4,6,7} processors.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
	* config/i386/i386-options.cc (m_C86_4G_M4): New definition.
	(m_C86_4G_M6): Ditto.
	(m_C86_4G_M7): Ditto.
	(m_C86_4G): Ditto.
	(processor_cost_table): Add cost entries for c86-4g-m4{4,6,7}.
	* config/i386/i386.cc (ix86_reassociation_width): Add handlings for
	PROCESSOR_C86_4G_M{4,6,7}.
	* config/i386/i386.h (enum processor_type): Define
	PROCESSOR_C86_4G_M{4,6,7}.
	(PTA_C86_4G_M4): New define.
	(PTA_C86_4G_M6): Ditto.
	(PTA_C86_4G_M7): Ditto.
	* config/i386/x86-tune-costs.h (c86_4g_m4_memcpy): New stringop_algs.
	(c86_4g_m4_cost): New processor_costs.
	(c86_4g_m6_cost): Ditto.
	(c86_4g_m7_cost): Ditto.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Handle
	PROCESSOR_C86_4G_M{4,6,7}.
	(ix86_adjust_cost): Ditto.
	* config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Handle m_C86_4G.
	(X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
	(X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
	(X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
	(X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
	(X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
	(X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
	(X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
	(X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
	(X86_TUNE_USE_LEAVE): Ditto.
	(X86_TUNE_PUSH_MEMORY): Ditto.
	(X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
	(X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
	(X86_TUNE_USE_SAHF): Ditto.
	(X86_TUNE_USE_BT): Ditto.
	(X86_TUNE_AVOID_MFENCE): Ditto.
	(X86_TUNE_USE_FFREEP): Ditto.
	(X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
	(X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL): Ditto.
	(X86_TUNE_SSE_TYPELESS_STORES): Ditto.
	(X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
	(X86_TUNE_USE_GATHER_2PARTS): Ditto.
	(X86_TUNE_USE_GATHER_4PARTS): Ditto.
	(X86_TUNE_USE_GATHER_8PARTS): Ditto.
	(X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
	(X86_TUNE_AVOID_256FMA_CHAINS): Ditto.
	(X86_TUNE_USE_RCR): Ditto.
	(X86_TUNE_AVX256_MOVE_BY_PIECES): Handle m_C86_4G_M{4,6}.
	(X86_TUNE_USE_SCATTER_2PARTS): Handle m_C86_4G_M7.
	(X86_TUNE_USE_SCATTER_4PARTS): Ditto.
	(X86_TUNE_USE_SCATTER_8PARTS): Ditto.
	(X86_TUNE_SSE_REDUCTION_PREFER_PSHUF): Ditto.
	(X86_TUNE_AVX512_SPLIT_REGS): Ditto.
	(X86_TUNE_AVX512_MOVE_BY_PIECES): Ditto.
	(X86_TUNE_AVX512_MASKED_EPILOGUES): Ditto.
	* doc/extend.texi: Document about hygonfam18h and c86-4g-m{4,6,7}.
	* doc/invoke.texi: Document about c86-4g-m{4,6,7}.
	* config/i386/c86-4g-m7.md: New file for c86-4g-m7 scheduling model
	information.
	* config/i386/c86-4g.md: New file for c86-4g-m{4,6} scheduling model
	information.
	* config/i386/i386.md (cpu attr): Add c86_4g_m{4,6,7}.
	(c86-4g.md): New include.
	(c86-4g-m7.md): Ditto.
	(*cmpi<unord>xf_i387): Set attr c86_decode.
	(*cmpi<unord><MODEF:mode>): Ditto.
	(swap<mode>): Ditto.
	(*swap<mode>): Ditto.
	(extendhisi2): Ditto.
	(floathi<mode>2): Ditto.
	(float<SWI48x:mode>xf2): Ditto.
	(*float<SWI48:mode><MODEF:mode>2): Ditto.
	(*floatdi<MODEF:mode>2_i387): Ditto.
	(*anddi_1_bt): Ditto.
	(*iordi_1_bts): Ditto.
	(*xordi_1_btc): Ditto.
	(*<btsc><mode>): Ditto.
	(*btr<mode>): Ditto.
	(*btsq_imm): Ditto.
	(*btrq_imm): Ditto.
	(*btcq_imm): Ditto.
	(*tzcnt<mode>_1): Ditto.
	(*tzcnt<mode>_1_falsedep): Ditto.
	(*bsf<mode>_1): Ditto.
	(*ctz<mode>2_falsedep): Ditto.
	(*ctzsi2_zext): Ditto.
	(*ctzsi2_zext_falsedep): Ditto.
	(bsr_rex64): Ditto.
	(bsr_rex64_1): Ditto.
	(bsr_rex64_1_zext): Ditto.
	(bsr): Ditto.
	(bsr_1): Ditto.
	(bsr_zext_1): Ditto.
	(*bswaphi2_movbe): Ditto.
	(*bswaphi2): Ditto.
	(bswaphisi2_lowpart): Ditto.
	(fpremxf4_i387): Ditto.
	(fprem1xf4_i387): Ditto.
	(<sincos>xf2): Ditto.
	(sincosxf3): Ditto.
	(fptanxf4_i387): Ditto.
	(atan2xf3): Ditto.
	(fyl2xxf3_i387): Ditto.
	(fyl2xp1xf3_i387): Ditto.
	(fxtractxf3_i387): Ditto.
	(*f2xm1xf2_i387): Ditto.
	(fscalexf4_i387): Ditto.
	(rintxf2): Ditto.
	(*movxi_internal_avx512f): Set attr c86_attr.
	(*movoi_internal_avx): Ditto.
	(*movti_internal): Ditto.
	(*movdi_internal): Ditto.
	(*movsi_internal): Ditto.
	(*movhi_internal): Ditto.
	(*movtf_internal): Ditto.
	(*movdf_internal): Ditto.
	(*movsf_internal): Ditto.
	(*zero_extendsidi2): Ditto.
	(sqrtxf2): Ditto.
	(<smaxmin:code><mode>3): Ditto.
	(*ieee_s<ieee_maxmin><mode>3): Ditto.
	* config/i386/mmx.md (*mmx_maskmovq): Set attr c86_decode.
	(*mmx_maskmovq): Ditto.
	(sse_movntq): Set attr c86_attr.
	(*mmx_blendps): Ditto.
	(mmx_blendvps): Ditto.
	(*mmx_pmaddwd): Ditto.
	(mmx_pblendvb_v8qi): Ditto.
	(mmx_pblendvb_<mode>): Ditto.
	(sse4_1_<code>v4qiv4hi2): Ditto.
	(sse4_1_<code>v2hiv2si2): Ditto.
	(sse4_1_<code>v2qiv2si2): Ditto.
	(sse4_1_<code>v2qiv2hi2): Ditto.
	(*mmx_pinsrd): Ditto.
	(*mmx_pinsrw): Ditto.
	(*mmx_pinsrb): Ditto.
	(*mmx_pextrw): Ditto.
	(*mmx_pextrw<mode>): Ditto.
	(*mmx_pextrw_zext): Ditto.
	(*mmx_pextrb): Ditto.
	(*mmx_pextrb_zext): Ditto.
	(*mmx_pblendw64): Ditto.
	(*mmx_pblendw32): Ditto.
	(*vec_extractv2si_1): Ditto.
	(*vec_extractv2si_1_zext): Ditto.
	(*pinsrw): Ditto.
	(*pinsrb): Ditto.
	(*pextrw): Ditto.
	(*pextrw<mode>): Ditto.
	(*pextrw_zext): Ditto.
	(*pextrb): Ditto.
	(*pextrb_zext): Ditto.
	(*mmx_psadbw): Ditto.
	* config/i386/sse.md (ktest<mode>): Set attr c86_decode.
	(*kortest<mode>): Ditto.
	(sse_cvtsi2ss<rex64namesuffix><round_name>): Ditto.
	(sse2_cvtsi2sd): Ditto.
	(sse2_maskmovdqu): Ditto.
	(*<sse>_dp<ssemodesuffix><avxsizesuffix>): Ditto.
	(*<sse4_1_avx2>_mpsadbw): Ditto.
	(pclmulqdq): Ditto.
	(<mask_codefor>conflict<mode><mask_name>): Ditto.
	(<avx512>_blendm<mode>): Set attr c86_attr.
	(sse2_movnti<mode>): Ditto.
	(<sse>_movnt<mode>): Ditto.
	(<sse2>_movnt<mode>): Ditto.
	(<sse>_rcp<mode>2): Ditto.
	(sse_vmrcpv4sf2): Ditto.
	(<mask_codefor>rcp14<mode><mask_name>): Ditto.
	(srcp14<mode>): Ditto.
	(srcp14<mode>_mask): Ditto.
	(<sse>_sqrt<mode>2<mask_name><round_name>): Ditto.
	(<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>): Ditto.
	(*<sse>_vmsqrt<mode>2<mask_scalar_name><round_scalar_name>): Ditto.
	(<mask_codefor>rsqrt14<mode><mask_name>): Ditto.
	(rsqrt14<mode>): Ditto.
	(rsqrt14_<mode>_mask"): Ditto.
	(*<code><mode>3<mask_name><round_saeonly_name>): Ditto.
	(ieee_<ieee_maxmin><mode>3<mask_name><round_saeonly_name>): Ditto.
	(*<sse>_vm<code><mode>3<mask_scalar_name><round_saeonly_scalar_name>):
	Ditto.
	(<sse>_ieee_vm<ieee_maxmin><mode>3<mask_scalar_name>
	<round_saeonly_scalar_name>): Ditto.
	(*ieee_<ieee_maxmin><mode>3): Ditto.
	(avx_h<insn>v4df3): Ditto.
	(*sse3_haddv2df3): Ditto.
	(sse3_hsubv2df3): Ditto.
	(*sse3_haddv2df3_low): Ditto.
	(*sse3_hsubv2df3_low): Ditto.
	(avx_h<insn>v8sf3): Ditto.
	(sse3_h<insn>v4sf3): Ditto.
	(*<mask_codefor>reducep<mode><mask_name><round_saeonly_name>): Ditto.
	(reduces<mode><mask_scalar_name><round_saeonly_scalar_name>): Ditto.
	(*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Ditto.
	(<sse>_andnot<mode>3<mask_name>): Ditto.
	(*<code><mode>3<mask_name>): Ditto.
	(*andnot<mode>3): Ditto.
	(<code><mode>3): Ditto.
	(*<code>tf3): Ditto.
	(vec_set<mode>_0): Ditto.
	(@vec_set<mode>_0): Ditto.
	(*sse4_1_extractps): Ditto.
	(vec_extract<mode>): Ditto.
	(<mask_codefor><avx512>_align<mode><mask_name>): Ditto.
	(avx512bw_pmaddwd512<mode><mask_name>): Ditto.
	(*avx2_pmaddw): Ditto.
	(*sse2_pmaddwd): Ditto.
	(*avx2_<code><mode>3): Ditto.
	(*avx512f_<code><mode>3<mask_name>): Ditto.
	(*avx512bw_<code><mode>3<mask_name>): Ditto.
	(*sse4_1_<code><mode>3<mask_name>): Ditto.
	(*<code>v8hi3): Ditto.
	(*<code>v16qi3): Ditto.
	(*andnot<mode>3_mask): Ditto.
	(*<code><mode>3): Ditto.
	(<code>v1ti3): Ditto.
	(<sse2p4_1>_pinsr<ssemodesuffix>): Ditto.
	(*<extract_type>_vinsert<shuffletype><extract_suf>_0): Ditto.
	(<mask_codefor><extract_type>_vinsert<shuffletype><extract_suf>
	_1<mask_name>): Ditto.
	(vec_set_lo_<mode><mask_name>): Ditto.
	(vec_set_hi_<mode><mask_name>): Ditto.
	(<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Ditto.
	(avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ditto.
	(*avx512f_shuf_<shuffletype>64x2_1<mask_name>_1): Ditto.
	(avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
	(avx512f_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
	(*avx512f_shuf_<shuffletype>32x4_1<mask_name>_1): Ditto.
	(*vec_extract<mode>): Ditto.
	(*vec_extract<PEXTR_MODE12:mode>_zext): Ditto.
	(*vec_extractv16qi_zext): Ditto.
	(*vec_extractv4si): Ditto.
	(*vec_extractv4si_zext): Ditto.
	(*vec_extractv2di_1): Ditto.
	(*vec_concatv2si_sse4_1): Ditto.
	(vec_concatv2di): Ditto.
	(*<sse2_avx2>_uavg<mode>3<mask_name>): Ditto.
	(*<sse2_avx2>_psadbw): Ditto.
	(<sse>_movmsk<ssemodesuffix><avxsizesuffix>): Ditto.
	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Ditto.
	(<sse2_avx2>_pmovmskb): Ditto.
	(*<sse2_avx2>_pmovmskb_zext): Ditto.
	(*sse2_maskmovdqu): Ditto.
	(avx2_ph<plusminus_mnemonic>wv16hi3): Ditto.
	(ssse3_ph<plusminus_mnemonic>wv8hi3): Ditto.
	(ssse3_ph<plusminus_mnemonic>dv4si3): Ditto.
	(avx2_ph<plusminus_mnemonic>dv8si3): Ditto.
	(avx2_pmaddubsw256): Ditto.
	(avx512bw_pmaddubsw512<mode><mask_name>): Ditto.
	(ssse3_pmaddubsw128): Ditto.
	(<ssse3_avx2>_psign<mode>3): Ditto.
	(ssse3_psign<mode>3): Ditto.
	(*abs<mode>2): Ditto.
	(abs<mode>2_mask): Ditto.
	(abs<mode>2_mask): Ditto.
	(sse4a_movnt<mode>): Ditto.
	(sse4a_vmmovnt<mode>): Ditto.
	(<sse4_1>_blend<ssemodesuffix><avxsizesuffix>): Ditto.
	(<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>): Ditto.
	(sse4_1_blendv<ssemodesuffix>): Ditto.
	(<vi8_sse4_1_avx2_avx512>_movntdqa): Ditto.
	(<sse4_1_avx2>_pblendvb): Ditto.
	(sse4_1_pblend<ssemodesuffix>): Ditto.
	(*avx2_pblend<ssemodesuffix>): Ditto.
	(avx2_pblendd<mode>): Ditto.
	(avx2_<code>v16qiv16hi2<mask_name>): Ditto.
	(avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
	(sse4_1_<code>v8qiv8hi2<mask_name>): Ditto.
	(*sse4_1_<code>v8qiv8hi2<mask_name>_1): Ditto.
	(<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
	(avx2_<code>v8qiv8si2<mask_name>): Ditto.
	(*avx2_<code>v8qiv8si2<mask_name>_1): Ditto.
	(sse4_1_<code>v4qiv4si2<mask_name>): Ditto.
	(*sse4_1_<code>v4qiv4si2<mask_name>_1): Ditto.
	(avx512f_<code>v16hiv16si2<mask_name>): Ditto.
	(avx2_<code>v8hiv8si2<mask_name>): Ditto.
	(sse4_1_<code>v4hiv4si2<mask_name>): Ditto.
	(*sse4_1_<code>v4hiv4si2<mask_name>_1): Ditto.
	(avx512f_<code>v8qiv8di2<mask_name>): Ditto.
	(*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
	(avx2_<code>v4qiv4di2<mask_name>): Ditto.
	(*avx2_<code>v4qiv4di2<mask_name>_1): Ditto.
	(sse4_1_<code>v2qiv2di2<mask_name>): Ditto.
	(*sse4_1_<code>v2qiv2di2<mask_name>_1): Ditto.
	(avx512f_<code>v8hiv8di2<mask_name>): Ditto.
	(avx2_<code>v4hiv4di2<mask_name>): Ditto.
	(*avx2_<code>v4hiv4di2<mask_name>_1): Ditto.
	(sse4_1_<code>v2hiv2di2<mask_name>): Ditto.
	(*sse4_1_<code>v2hiv2di2<mask_name>_1): Ditto.
	(avx512f_<code>v8siv8di2<mask_name>): Ditto.
	(avx2_<code>v4siv4di2<mask_name>): Ditto.
	(sse4_1_<code>v2siv2di2<mask_name>): Ditto.
	(*sse4_1_<code>v2siv2di2<mask_name>_1): Ditto.
	(sse4_1_round<ssescalarmodesuffix>): Ditto.
	(*sse4_1_round<ssescalarmodesuffix>"): Ditto.
	(sse4_2_pcmpestri): Ditto.
	(sse4_2_pcmpestrm): Ditto.
	(sse4_2_pcmpestr_cconly): Ditto.
	(sse4_2_pcmpistri): Ditto.
	(sse4_2_pcmpistrm): Ditto.
	(sse4_2_pcmpistr_cconly): Ditto.
	(xop_phadd<u>bw): Ditto.
	(xop_phadd<u>bd): Ditto.
	(xop_phadd<u>bq): Ditto.
	(xop_phadd<u>wd): Ditto.
	(xop_phadd<u>wq): Ditto.
	(xop_phadd<u>dq): Ditto.
	(xop_phsubbw): Ditto.
	(xop_phsubwd): Ditto.
	(xop_phsubdq): Ditto.
	(aesenc): Ditto.
	(aesenclast): Ditto.
	(aesdec): Ditto.
	(aesdeclast): Ditto.
	(aesimc): Ditto.
	(aeskeygenassist): Ditto.
	(<avx2_avx512>_permvar<mode><mask_name>): Ditto.
	(avx2_perm<mode>_1<mask_name>): Ditto.
	(<avx512>_permvar<mode><mask_name>): Ditto.
	(avx512f_perm<mode>_1<mask_name>): Ditto.
	(<mask_codefor>avx512f_broadcast<mode><mask_name>): Ditto.
	(avx_vbroadcastf128_<mode>): Ditto.
	(<mask_codefor>avx512vl_broadcast<mode><mask_name>_1): Ditto.
	(<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Ditto.
	(*<avx512>_vpermi2var<mode>3_mask): Ditto.
	(<avx512>_vpermt2var<mode>3<sd_maskz_name>): Ditto.
	(<avx512>_vpermt2var<mode>3_mask): Ditto.
	(*avx_vperm2f128<mode>_nozero): Ditto.
	(vec_set_lo_<mode><mask_name>): Ditto.
	(vec_set_hi_<mode><mask_name>): Ditto.
	(vec_set_lo_<mode>): Ditto.
	(vec_set_hi_<mode>): Ditto.
	(vec_set_lo_v32qi): Ditto.
	(<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Ditto.
	(<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
	(avx_vec_concat<mode>): Ditto.
	(<avx512>_compress<mode>_mask): Ditto.
	(compress<mode>_mask): Ditto.
	(<avx512>_compressstore<mode>_mask): Ditto.
	(compressstore<mode>_mask): Ditto.
	(expand<mode>_mask): Ditto.
	(<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>): Ditto.
	(clz<mode>2<mask_name>): Ditto.
	(vpmadd52<vpmadd52type>v8di): Ditto.
	(vpmadd52<vpmadd52type><mode>): Ditto.
	(vpmadd52<vpmadd52type><mode>_maskz_1): Ditto.
	(vpmadd52<vpmadd52type><mode>_mask): Ditto.
	(vaesdec_<mode>): Ditto.
	(vaesdeclast_<mode>): Ditto.
	(vaesenc_<mode>): Ditto.
	(vaesenclast_<mode>): Ditto.

2026-06-06  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-06-06  Jakub Jelinek  <jakub@redhat.com>

	PR target/125611
	* config/i386/sse.md (<ssse3_avx2>_pmulhrsw<mode>3, smulhrs<mode>3):
	Use vector_operand instead of nonimmediate_operand.

2026-06-03  Richard Sandiford  <rdsandiford@googlemail.com>

	PR rtl-optimization/125375
	* cfgrtl.cc (flow_active_insn_p): Return true for clobbers.

2026-06-03  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-06-01  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/tuning_models/olympus.h (olympus_scalar_issue_info,
	olympus_advsimd_issue_info, olympus_sve_issue_info): Set
	loads_stores_per_cycle to 6.

2026-06-03  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Backported from master:
	2026-06-01  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/122827
	* config/aarch64/aarch64.cc (aarch64_hard_regno_call_part_clobbered):
	For SVE modes use BYTES_PER_SVE_VECTOR for the per-register size
	rather than GET_MODE_SIZE.
	* config/aarch64/aarch64-early-ra.cc (early_ra::get_allocno_subgroup):
	Classify any SVE mode as FPR_Z.

2026-06-02  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-05-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125250
	* tree-ssa-loop-im.cc (execute_sm): For modes that cannot
	transfer bits, _Bool and bitfield accesses force the
	multi-threaded model.

2026-06-02  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-05-04  Richard Biener  <rguenther@suse.de>

	PR middle-end/125156
	* tree-cfgcleanup.cc (cleanup_control_expr_graph): Clear
	EDGE_TRUE_VALUE and EDGE_FALSE_VALUE edge flags only.

2026-06-01  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.cc (pa_trampoline_init): Rework to use
	clear_cache pattern.
	* config/pa/pa.md (dcacheflush): Use "<<" condition instead
	of "<<=".
	(icacheflush): Remove.
	(icacheflush1, icacheflush2, icacheflush3): New flush patterns
	for PA 1.x targets, PA 2.0 targets, and PA 1.x no space
	register targets.
	(clear_cache): Rework to flush data and instruction caches.
	Skip flush if the start address is greater than or equal to
	the end address.  Don't align the end address to a cacheline
	boundary.  Handle instruction flushes for PA 1.x targets,
	PA 2.0 targets, and PA 1.x no space register targets.

2026-06-01  Christophe Lyon  <christophe.lyon@arm.com>

	Backported from master:
	2026-05-19  Christophe Lyon  <christophe.lyon@arm.com>

	PR target/124870
	* config/arm/arm-mve-builtins-base.cc (vstrq_scatter_base_impl)
	(vldrq_gather_base_impl): Fix call_properties.

2026-06-01  Hongyu Wang  <hongyu.wang@intel.com>

	Backported from master:
	2026-06-01  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/x86-tune.def (X86_TUNE_DISABLE_SETZUCC): New.
	Enable for m_DIAMONDRAPIDS | m_NOVALAKE.
	* config/i386/i386.h (TARGET_DISABLE_SETZUCC): New define.
	* config/i386/i386.md (*setcc_<mode>_zu): Guard with
	TARGET_APX_ZU && !TARGET_DISABLE_SETZUCC.
	(*setcc_di_1, *setcc_<mode>_1_movzbl): Guard with
	(!TARGET_APX_ZU || TARGET_DISABLE_SETZUCC).
	(*setcc_qi, *setcc_qi_slp): Emit setzucc only when
	TARGET_APX_ZU && !TARGET_DISABLE_SETZUCC.

2026-05-31  Zhongyao Chen  <chen.zhongyao@zte.com.cn>

	Backported from master:
	2026-05-13  Zhongyao Chen  <chen.zhongyao@zte.com.cn>

	PR target/125215
	* config/riscv/riscv-v.cc (expand_const_vector_interleaved_stepped_npatterns):
	Remove hi/lo optimization and always use the merge fallback.

2026-05-28  Martin Jambor  <mjambor@suse.cz>

	Backported from master:
	2026-05-12  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/124151
	* tree-sra.cc (build_user_friendly_ref_for_offset): Added parameters
	CUR_SIZE and EXP_SIZE.  Added code passing the correct CUR_SIZE and
	checking it against EXP_SIZE.  Removed unused code for the case when
	EXP_TYPE was NULL_TREE.
	(create_artificial_child_access): Adjusted the call to
	build_user_friendly_ref_for_offset.
	(propagate_subaccesses_from_rhs): Likewise.
	(propagate_subaccesses_from_rhs): Removed a check that the size of
	lchild is a multiple of BITS_PER_UNIT.
	(propagate_subaccesses_from_lhs): Likewise.

2026-05-27  liuhongt  <hongtao.liu@intel.com>

	Backported from master:
	2026-05-27  liuhongt  <hongtao.liu@intel.com>

	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Disable
	for m_DIAMONDRAPIDS.
	(X86_TUNE_USE_GATHER_4PARTS): Likewise.

2026-05-26  Soumya AR  <soumyaa@nvidia.com>

	Backported from master:
	2026-05-08  Soumya AR  <soumyaa@nvidia.com>

	PR target/124895
	* config/aarch64/aarch64-passes.def (pass_narrow_gp_writes): Move pass
	before pass_free_cfg.

2026-05-25  Georg-Johann Lay  <avr@gjlay.de>

	Backported from master:
	2026-05-25  Georg-Johann Lay  <avr@gjlay.de>

	PR target/125409
	* config/avr/avr-fixed.md (FIXED_A, FIXED_B): Add PSI to iterators.

2026-05-22  Zhou Qiankang  <wszqkzqk@qq.com>

	Backported from master:
	2026-05-20  Zhou Qiankang  <wszqkzqk@qq.com>

	PR target/125362
	* config/loongarch/t-loongarch (TM_H): Add
	common/config/loongarch/cpu-features.h.

2026-05-21  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-05-21  Xi Ruoyao  <xry111@xry111.site>

	PR target/125320
	* config/riscv/riscv.md (stack_protect_test_<mode>): Call
	riscv_output_move() instead of hard coding <load>.
	(stack_protect_set_<mode>): Call riscv_output_move() instead of
	hard coding <load> and <store>.

2026-05-20  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-05-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/125373
	* config/i386/i386.md
	(Convert imul by three, five and nine into lea define_peephole2s): Use
	index_reg_operand instead of register_operand.

2026-05-20  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-05-19  Jakub Jelinek  <jakub@redhat.com>

	PR other/125348
	* config/i386/i386-expand.cc (ix86_expand_builtin): Fix diagnostic
	typo, forth -> fourth.

2026-05-19  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-05-19  H.J. Lu  <hjl.tools@gmail.com>

	PR target/125355
	* config/i386/i386-expand.cc (ix86_expand_movmem): Replace
	optimize_function_for_size_p with optimize_insn_for_size_p.

2026-05-19  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-05-18  H.J. Lu  <hjl.tools@gmail.com>

	PR target/125355
	* config/i386/i386-expand.cc (ix86_expand_movmem): Return false
	for -Os.

2026-05-19  Andi Kleen  <ak@gcc.gnu.org>

	PR target/125351
	* config/i386/i386.md: Use alternative to handle masm ptwrite
	syntax.

2026-05-15  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-05-13  H.J. Lu  <hjl.tools@gmail.com>
		    Uros Bizjak  <ubizjak@gmail.com>

	PR target/120870
	* config/i386/i386.cc (ix86_save_reg): Return true for DRAP
	register early at entry.
	(find_drap_reg): Use R11_REG in preserve_none functions in
	64-bit mode.

2026-05-15  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-05-15  Xi Ruoyao  <xry111@xry111.site>

	PR tree-optimization/125291
	* tree-scalar-evolution.cc (simplify_peeled_chrec): Sign-extend
	the step for peeled converted IV.

2026-05-15  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-05-15  Jakub Jelinek  <jakub@redhat.com>

	PR target/125308
	* config/i386/sse.md (*minmax<mode>3_4): Force also
	operands[2] into a REG.

2026-05-14  Andi Kleen  <ak@gcc.gnu.org>

	PR target/124316
	* config/i386/i386.md (ptwrite): Add explicit mode to
	instruction.

2026-05-14  Georg-Johann Lay  <avr@gjlay.de>

	Backported from master:
	2026-05-14  Georg-Johann Lay  <avr@gjlay.de>

	PR target/125194
	* config/avr/avr.cc (avr_no_call_main_p): Remove variable...
	(avr_file_end): ...and code that uses it.
	(avr_insert_attributes): Same.  Add "used" to main attributes
	when -mno-call-main.
	* config/avr/gen-avr-mmcu-specs.cc (print_mcu): Emit code
	for link_no_call_main specs.
	* config/avr/specs.h (LINK_SPEC): Add %(link_no_call_main).

2026-05-13  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-05-08  Xi Ruoyao  <xry111@xry111.site>

	PR target/125049
	* config/loongarch/predicates.md (ssp_operand): New
	define_predicate.
	(ssp_normal_operand): New define_predicate.
	* config/loongarch/constraints.md (ZE): New define_constraint.
	(ZF): New define_constraint.
	* config/loongarch/loongarch.md (UNSPEC_SSP): New unspec.
	(cbranch4): Add "@" to create gen_cbranch4(machine_mode, ...).
	(@stack_protect_combined_set_normal_<mode>): New define_insn.
	(@stack_protect_combined_set_extreme_<mode>): New define_insn.
	(@stack_protect_combined_test_internal_<mode>): New define_insn.
	(stack_protect_combined_set): New define_expand.
	(stack_protect_combined_test): New define_expand.
	* config/loongarch/loongarch-protos.h
	(loongarch_output_asm_load_canary): Declare.
	* config/loongarch/loongarch.cc (loongarch_print_operand): Allow
	'v' to print d/w for DImode/SImode.
	(loongarch_output_asm_load_canary): Implement.

2026-05-13  Xi Ruoyao  <xry111@xry111.site>

	Backported from master:
	2026-05-08  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc (loongarch_print_operand): Print
	the symbol name for SYMBOL_REF with %c.

2026-05-12  Artemiy Volkov  <artemiy.volkov@arm.com>

	Backported from master:
	2026-05-12  Artemiy Volkov  <artemiy.volkov@arm.com>

	PR middle-end/125259
	* match.pd: Fix the view_convert (BIT_FIELD_REF) pattern.

2026-05-11  LIU Hao  <lh_mouse@126.com>

	Backported from master:
	2026-05-11  LIU Hao  <lh_mouse@126.com>

	PR target/53929
	* config/mingw/winnt.cc (mingw_pe_file_end): Use `ASM_OUTPUT_LABELREF`
	to emit `name`.

2026-05-11  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	Backported from master:
	2026-05-01  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc (s390_secondary_reload): Add cases for HF
	vector modes.
	* config/s390/s390.md: Add modes V{1,2,4,8}HF to mode iterator
	ALL.

2026-05-08  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-05-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125185
	* tree-vect-slp.cc (vect_analyze_slp_reduc_chain): Guard
	first vect_slp_linearize_chain call.

2026-05-08  Richard Biener  <rguenther@suse.de>

	Revert:
	2025-04-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/120003
	* tree-ssa-threadbackward.cc (back_threader::find_paths_to_names):
	Allow block re-use but do not enlarge the path beyond such a
	re-use.

2026-05-08  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-05-04  Richard Biener  <rguenther@suse.de>

	PR middle-end/125146
	* gimple-fold.cc (fold_stmt_1): Discard stmts in seq
	after failed gimple_simplify as well.

2026-05-08  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-04-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125025
	* tree-ssa-loop-niter.cc (number_of_iterations_ne): Avoid
	negation of most negative signed integer.
	(number_of_iterations_lt): Likewise.

2026-05-06  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-05-05  H.J. Lu  <hjl.tools@gmail.com>

	PR target/120587
	PR target/125155
	* config/or1k/or1k.cc (or1k_hard_regno_mode_ok): Allow condition
	condition flag register in SImode.

2026-05-06  Lulu Cheng  <chenglulu@loongson.cn>

	Backported from master:
	2026-05-06  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/125057
	* config/loongarch/loongarch.cc
	(loongarch_split_vector_move): Complete the split condition.
	* config/loongarch/loongarch.h (LSX_REG_RTX_P): Delete.
	(LASX_REG_RTX_P): Delete.
	(GP_REG_RTX_P): Define macro.

2026-05-06  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-05-06  Richard Biener  <rguenther@suse.de>

	* config/i386/x86-tune.def (avx512_two_epilogues): Enable
	for m_ZNVER6.
	(avx512_masked_epilogues): Likewise.

2026-05-05  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-05-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/125180
	* config/i386/i386.md (HI/SI test -> QI test splitter): Punt if
	operands[2] is a volatile MEM.

2026-05-04  Nathan Myers  <ncm@cantrip.org>

	Backported from master:
	2026-05-04  Nathan Myers  <ncm@cantrip.org>

	* doc/invoke.texi: insert "result" in comment text

2026-05-03  Collin Funk  <collin.funk1@gmail.com>

	Backported from master:
	2026-05-03  Collin Funk  <collin.funk1@gmail.com>

	* glimits.h (__STDC_VERSION_LIMITS_H__): Only define the macro
	if it was not already defined.

2026-05-02  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/125079
	* tree-ssa-strlen.cc (get_string_length): Don't overwrite
	lenstmt variable with another stmt.

2026-05-01  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	Revert:
	2026-05-01  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>

	PR rtl-optimization/123967
	* match.pd(`if (cond) (A | CST1) : (A & ~CST1)`)`: New pattern.

2026-05-01  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>

	PR rtl-optimization/123967
	* match.pd(`if (cond) (A | CST1) : (A & ~CST1)`)`: New pattern.

2026-05-01  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-05-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/125079
	* tree-ssa-strlen.cc (get_string_length): Transform
	__strcat_chk (x, y, z) when we need strlen (x) afterwards into
	l1 = strlen (x); l = __stpcpy_chk (x + l1, y, z - l1) - x;
	where l is the strlen (x), instead of using z as last __stpcpy_chk
	argument.

2026-05-01  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2026-05-01  H.J. Lu  <hjl.tools@gmail.com>

	PR target/125117
	* config/i386/i386-expand.cc (ix86_expand_movmem): Generate
	last_4x_vec_label when min_size <= 4 * MOVE_MAX.

2026-05-01  Soumya AR  <soumyaa@nvidia.com>

	Backported from master:
	2026-04-27  Soumya AR  <soumyaa@nvidia.com>

	* config/aarch64/tuning_models/generic.h: Update br_mispredict_factor
	to 7.

2026-05-01  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	Backported from master:
	2026-04-25  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/124984
	* config/riscv/thead.cc (th_memidx_classify_address_index): Extract
	constant multiplicand value from the right object.

2026-04-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-04-29  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123635
	* gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow):
	Move obj_nelts/atype computation before bitint_extended handling.  For
	bitint_big_endian in the bitint_extended handling use size_zero_node
	only for limb_access_type calls, otherwise use
	size_int (nelts - obj_nelts) and pass NULL_TREE as first argument to
	limb_access calls.

2026-04-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-04-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/125039
	* range-op-float.cc (operator_not_equal::fold_range): Call
	empty_range_varying when not calling frelop_early_resolve.

2026-04-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-04-24  Jakub Jelinek  <jakub@redhat.com>

	PR target/124133
	* config/rs6000/rs6000-c.cc (c_fold_convert): New function.
	(c_fold_build2_loc): Likewise.
	(fully_fold_convert): Use c_fold_convert instead of fold_convert.
	(altivec_build_resolved_builtin): Likewise.  Use c_fold_build2_loc
	instead of fold_build2.
	(resolve_vec_mul, resolve_vec_adde_sube, resolve_vec_addec_subec):
	Use c_fold_build2_loc instead of fold_build2_loc.
	(resolve_vec_splats, resolve_vec_extract): Use c_fold_convert instead
	of fold_convert.
	(resolve_vec_insert): Use c_fold_build2_loc instead of fold_build2.
	(altivec_resolve_overloaded_builtin): Use c_fold_convert instead
	of fold_convert.

2026-04-30  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2026-04-24  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123635
	PR tree-optimization/124988
	* gimple-lower-bitint.cc (bitint_large_huge::finish_arith_overflow):
	Handle bitint_extend.
	(bitint_large_huge::lower_addsub_overflow): Fix up comment spelling.
	For bitint_extended extend the partial limb if any.

2026-04-30  Release Manager

	* GCC 16.1.0 released.

2026-04-27  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2026-04-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/125019
	* tree-vect-loop.cc (vectorizable_recurr): Properly guard
	against hitting last stmt when searching for the insertion
	place.

2026-04-22  Richard Earnshaw  <rearnsha@arm.com>

	PR target/124933
	* config/arm/constraints.md (Uj): Allow offset addressing for
	all targets, only allow Neon addressing when we have both Neon
	and FP16INST.
	* config/arm/vfp.md (mov<mode>_vfp_<mode>16): Only use vld1/vst1
	when the pattern needs address write-back.

2026-04-22  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/124971
	* gensupport.cc (convert_syntax): Fix up // comment handling.

2026-04-21  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/120189
	* doc/gm2.texi (Building a shared library): Replace
	constant string with DEFAULT_RUNTIME_MODULE_OVERRIDE.

2026-04-21  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123635
	* gimple-lower-bitint.cc (bitint_large_huge::lower_muldiv_stmt):
	Extend the padding bits not just for unsigned MULT_EXPR but for any
	TYPE_OVERFLOW_WRAPS MULT_EXPR and signed TYPE_OVERFLOW_WRAPS division.

2026-04-21  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/124941
	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Use build_bitint_type
	rather than build_nonstandard_integer_type for
	maxsizei larger than MAX_FIXED_MODE_SIZE.

2026-04-21  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/120189
	* doc/gm2.texi (Building a shared library): Rewrite.

2026-04-20  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123635
	* gimple-lower-bitint.cc (bitint_large_huge::lower_shift_stmt): In the
	RSHIFT_EXPR case, use p2 in two LE_EXPR conditions rather than just
	one.  In LSHIFT_EXPR case, use signed RSHIFT_EXPR instead of unsigned.
	(bitint_large_huge::lower_muldiv_stmt): For unsigned MULT_EXPR with
	bitint_extended if prec is not multiple of limb_prec, clear padding
	bits after libgcc call.
	(bitint_large_huge::lower_float_conv_stmt): Use signed RSHIFT_EXPR
	instead of unsigned.

2026-04-20  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123635
	* gimple-lower-bitint.cc (bitint_precision_kind): Assert the current
	assumptions, that bitint_ext_full for abi_limb_prec > limb_prec is
	supported only when abi_limb_prec is limb_Prec * 2 and it is not
	big endian in that case.
	(bitint_large_huge::lower_mergeable_stmt): Don't set separate_ext
	fir bitint_ext_full for bit-field stores.  Guard the condition
	on an extra limb of padding bits to be extended rather than including
	earlier extensions in that too.  If already sign extending before
	and type is unsigned, set zero_ms_limb instead and later handle it.
	(bitint_large_huge::lower_shift_stmt): Handle bitint_ext_full.

2026-04-20  Soumya AR  <soumyaa@nvidia.com>

	* config/aarch64/aarch64-narrow-gp-writes.cc (narrow_dimode_src): Remove
	redundant checks. Don't recurse when an operand remains DImode.
	(narrow_gp_writes::optimize_compare_arith_insn): Use
	HOST_WIDE_INT_PRINT_HEX.
	(narrow_gp_writes::optimize_single_set_insn): Likewise.

2026-04-19  Richard Sandiford  <rdsandiford@googlemail.com>

	PR rtl-optimization/124643
	* cse.cc (canon_reg): Handle and canonicalize subregs.

2026-04-18  Richard Sandiford  <rdsandiford@googlemail.com>

	* config/aarch64/aarch64.md (SME_STATE_REGNUM): Fix a comment typo.

2026-04-18  Gopi Kumar Bulusu  <gopi@sankhya.com>

	PR target/103383
	* config/microblaze/microblaze.md: bswaphi2: (set_attr length 8)

2026-04-17  Jonathan Wakely  <jwakely@redhat.com>

	PR c/84717
	* doc/extend.texi (Decimal Float): Document d and D suffixes.
	Fix index entries for decimal float suffixes.

2026-04-17  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/120098
	* ipa-polymorphic-call.cc (polymorphic_ctor_dtor_p): Remove
	check for pure/const flags

2026-04-17  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/120098
	* ipa-devirt.cc (odr_type_p): Add no_derived_construction_vtables
	(odr_types_ptr): Move ahead in file.
	(odr_types): Move ahead in file.
	(anonymous_construction_vtable_p): New function.
	(mark_derived_construction_vtables): New function.
	(construction_vtable_hook): New function.
	(type_possibly_instantiated_p): Watch for construction vtables.

2026-04-17  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx-sm.def: Add '50'.
	* config/nvptx/nvptx-gen.h: Regenerate.
	* config/nvptx/nvptx-gen.opt: Likewise.
	* config/nvptx/nvptx.cc (first_ptx_version_supporting_sm): Adjust.
	* config/nvptx/nvptx.opt (-march-map=sm_50): Likewise.
	* config.gcc: Likewise.
	* doc/invoke.texi (Nvidia PTX Options): Document '-march=sm_50'.
	* config/nvptx/gen-multilib-matches-tests: Extend.

2026-04-17  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx-opts.h (enum ptx_version): Add
	'PTX_VERSION_4_0'.
	* config/nvptx/nvptx.cc (ptx_version_to_string)
	(ptx_version_to_number): Adjust.
	* config/nvptx/nvptx.h (TARGET_PTX_4_0): New.
	* config/nvptx/nvptx.opt (Enum(ptx_version)): Add 'EnumValue'
	'4.0' for 'PTX_VERSION_4_0'.
	* doc/invoke.texi (Nvidia PTX Options): Document '-mptx=4.0'.

2026-04-17  Tamar Christina  <tamar.christina@arm.com>

	PR middle-end/124900
	* gimple-crc-optimization.cc (crc_optimization::optimize_crc_loop): Do
	not expand to table when compiling for size.
	(class crc_optimization): Update prototype of optimize_crc_loop to
	include loop.
	(crc_optimization::execute): Pass loop to optimize_crc_loop.

2026-04-16  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm-cpus.in (cortex-m85): Allow +cdecp<n>.
	* doc/invoke.texi: Document this

2026-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/124565
	* config/stormy16/stormy16.cc (xstormy16_build_builtin_va_list): Set
	TREE_PUBLIC on type_decl.
	* config/xtensa/xtensa.cc (xtensa_build_builtin_va_list): Likewise.

2026-04-16  Tobias Burnus  <tburnus@baylibre.com>

	PR target/124897
	* doc/install.texi (amdgcn-amdhsa): Fix required LLVM version for
	default multilib.

2026-04-16  Richard Biener  <rguenther@suse.de>

	PR middle-end/124877
	* calls.cc (initialize_argument_information): Compute
	signedness of the formal argument type before applying
	PROMOTE_PROTOTYPES promotion.  Also apply promotion to
	a smaller than int integer first member type of a
	transparent union.
	* target.def (promote_prototypes): Update documentation.
	* doc/tm.texi: Re-generate.

2026-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/124892
	* config/i386/i386.md (clz<mode>2_lzcnt_nf,
	<lt_zcnt>_<mode>_nf, popcount<mode>2_nf): Emit explicit
	set of (match_dup 0) to (const_int 0) without flags clobber instead of
	using ix86_expand_clear.

2026-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/124891
	* tree-ssa-propagate.cc
	(substitute_and_fold_dom_walker::before_dom_children): Call update_stmt
	in the did_replace case before calling fold_stmt.

2026-04-15  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/122976
	* tree-sra.cc (path_comparable_for_same_access): Return false if the
	base is a MEM_REF with a different underlying type.

2026-04-15  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123635
	* target.h (enum bitint_ext): New.
	(struct bitint_info): Change extend type from bool to enum bitint_ext
	and document it.
	* gimple-lower-bitint.cc (bitint_extended): Change type from bool
	to enum bitint_ext.
	(bitint_precision_kind): Change bitint_extended to bitint_ext_partial
	from bitint_ext_full if limb_mode is the same as abi_limb_mode.
	(bitint_large_huge::limb_access_type): For
	bitint_extended == bitint_ext_full allow access to the most
	significant limb solely with padding bits if present.
	(bitint_large_huge::lower_mergeable_stmt): Handle
	bitint_extended == bitint_ext_full extension if needed.
	(bitint_large_huge::lower_muldiv_stmt): Likewise.
	(bitint_large_huge::lower_float_conv_stmt): Likewise.
	* config/aarch64/aarch64.cc (aarch64_bitint_type_info): Set
	info->extended to bitint_ext_undef rather than false.
	* config/arm/arm.cc (arm_bitint_type_info): Set
	info->extended to bitint_ext_full rather than true.
	* config/i386/i386.cc (ix86_bitint_type_info): Set
	info->extended to bitint_ext_undef rather than false.
	* config/loongarch/loongarch.cc (loongarch_bitint_type_info): Set
	info->extended to bitint_ext_partial rather than true.
	* config/riscv/riscv.cc (riscv_bitint_type_info): Set
	info->extended to bitint_ext_full rather than true.
	* config/s390/s390.cc (s390_bitint_type_info): Likewise.

2026-04-15  Jason Merrill  <jason@redhat.com>

	PR c++/117133
	PR c++/124768
	PR c++/124773
	* doc/trouble.texi (Linkage in Anonymous Namespaces): Remove.

2026-04-15  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386.cc
	(x86_64_preserve_none_int_parameter_registers): Replace
	ix86_function_value_regno_p with ix86_function_arg_regno_p in
	comments.

2026-04-14  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (armagicpu): New.
	* config/aarch64/aarch64-tune.md: Renegerate
	* doc/invoke.texi: Document it.

2026-04-14  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/124809
	* value-relation.cc (equiv_oracle::equiv_oracle): Allocate lhs
	equivalence bitmap.
	(relation_oracle::record): Check if LHS has already created an
	equivalence record.
	* value-relation.h (relation_oracle::relation_oracle): New.
	(relation_oracle::m_lhs_equiv_set_p): New.

2026-04-14  Richard Earnshaw  <rearnsha@arm.com>

	PR target/123102
	* config/arm/arm.md (*cmp_ite0): Apply stricter checks on the
	comparison mode.
	(*cmp_ite1, *cmp_and, *cmp_ior): Likewise.

2026-04-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/124777
	* ipa-cp.h (ipacp_value_safe_for_type): Declare.
	* ipa-cp.cc (ipacp_value_safe_for_type): Make public.
	* ipa-prop.cc (ipa_set_jf_cst_copy): Fix comment.
	(ipa_convert_prop_cst_jf): New function.
	(update_jump_functions_after_inlining): Handle the constant to
	pass-through case by calling ipa_convert_prop_cst_jf.

2026-04-14  Soumya AR  <soumyaa@nvidia.com>

	* config/aarch64/aarch64.opt.urls: Regenerate.

2026-04-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124875
	* tree-ssa-pre.cc (prefer): Also compare TBAA set and base_set.
	Refactor computing the final prefered expression, do early outs
	and allow same prefered expressions.
	(sorted_array_from_bitmap_set): Fix thinko that prevented
	the last expression in the set of being excluded.

2026-04-14  Soumya AR  <soumyaa@nvidia.com>
	    Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config.gcc: Add aarch64-narrow-gp-writes.o.
	* config/aarch64/aarch64-passes.def (INSERT_PASS_BEFORE): Insert
	pass_narrow_gp_writes before pass_cleanup_barriers.
	* config/aarch64/aarch64-protos.h (make_pass_narrow_gp_writes): Declare.
	* config/aarch64/aarch64-tuning-flags.def
	(AARCH64_EXTRA_TUNING_OPTION): Add NARROW_GP_WRITES.
	* config/aarch64/aarch64.opt (mnarrow-gp-writes): New option.
	* config/aarch64/t-aarch64: Add aarch64-narrow-gp-writes.o rule.
	* config/aarch64/tuning_models/olympus.h: Add
	AARCH64_EXTRA_TUNE_NARROW_GP_WRITES to tune_flags.
	* doc/invoke.texi: Document -mnarrow-gp-writes.
	* config/aarch64/aarch64-narrow-gp-writes.cc: New file.

2026-04-14  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/124826
	* gimple-lower-bitint.cc (bitint_large_huge::handle_load): Look through
	BIT_FIELD_REF with zero bit offset.

2026-04-14  Jakub Jelinek  <jakub@redhat.com>

	* cgraphunit.cc (process_symver_attribute): Fix comment typo,
	bintuils -> binutils.

2026-04-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124868
	* gimple-ssa-isolate-paths.cc (handle_return_addr_local_phi_arg):
	Do not diagnose returns in blocks not dominated by the PHI.
	(find_implicit_erroneous_behavior): Do two sweeps over PHIs,
	first for NULL dereferences and then for local address returns.

2026-04-14  Avinash Jayakar  <avinashd@linux.ibm.com>

	Revert:
	2026-04-07  Avinash Jayakar  <avinashd@linux.ibm.com>
		    Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Add
	logic to handle __builtin_ppc_atomic_cas_local.
	* config/rs6000/rs6000-builtins.def: New builtins for
	__builtin_ppc_atomic_cas_local with types.
	* config/rs6000/rs6000-c.cc (altivec_build_resolved_builtin):
	Handle builtins with up to 6 arguments.
	* config/rs6000/rs6000-overload.def: Overload builtin for
	signed/unsiged char, short, int, long, __int128.
	* config/rs6000/rs6000-protos.h (rs6000_expand_atomic_compare_and_swap):
	Add additional parameter 'local' to the prototype.
	* config/rs6000/rs6000.cc (emit_load_locked): Add new parameter. Pass
	new parameter to generate load-locked instruction.
	(rs6000_expand_atomic_compare_and_swap): Add new parameter. Call
	emit_load_locked() with additional parameter value of EH bit.
	(rs6000_expand_atomic_exchange): Pass EH value 0 to emit_load_locked().
	(rs6000_expand_atomic_op): Likewise.
	* config/rs6000/sync.md (load_locked<mode>): Add new operand in RTL
	template. Specify EH bit in the larx instruction.
	(load_locked<QHI:mode>_si): Likewise.
	(load_lockedpti): Likewise.
	(load_lockedti): Add new operand in RTL template. Pass EH bit to
	gen_load_lockedpti().
	(atomic_compare_and_swap<mode>): Pass new parameter 'false' to
	rs6000_expand_atomic_compare_and_swap.
	(atomic_compare_and_swap_local<mode>): New define_expand.

2026-04-14  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124876
	* config/i386/i386.cc (ix86_zero_call_used_regs): Zero ZMM16-31
	if needed.

2026-04-13  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	Revert:
	2025-06-30  Peter Bergner  <bergner@linux.ibm.com>

	PR target/109116
	* config/rs6000/mma.md (unspec): Delete UNSPEC_MMA_EXTRACT.
	(vsx_disassemble_pair): Expand into a vector register sized subreg.
	(mma_disassemble_acc): Likewise.
	(*vsx_disassemble_pair): Delete.
	(*mma_disassemble_acc): Likewise.

2026-04-13  Josef Melcr  <josef.melcr@suse.com>

	PR ipa/124700
	* cgraph.cc (cgraph_node::is_clone_of): New method, determines
	whether a node is a descendant of another in the clone tree.
	* cgraph.h (struct cgraph_node): Add decl of is_clone_of.
	* cgraphbuild.cc (mark_address): Fix reference creation for
	cloned callback functions.

2026-04-13  Hu, Lin1  <lin1.hu@intel.com>

	PR target/124710
	* config/i386/sse.md (iptrps2qq): New mode attribute for
	ps2qq Intel syntax memory operand size override.
	(avx10_2_vcvttps2<sat_cvt_sign_prefix>qqs<mode><mask_name><round_saeonly_name>):
	Use %<iptrps2qq>1 in Intel syntax to emit qword ptr for V2DI (128-bit)
	memory operands.
	(avx10_2_vcvttsd2<sat_cvt_sign_prefix>sis<mode><round_saeonly_name>):
	Use %q1 in Intel syntax to emit qword ptr for scalar double memory
	operands.
	(avx10_2_vcvttss2<sat_cvt_sign_prefix>sis<mode><round_saeonly_name>):
	Use %k1 in Intel syntax to emit dword ptr for scalar single memory
	operands.

2026-04-11  Christopher Albert  <albert@tugraz.at>

	PR fortran/93554
	* omp-expand.cc (expand_oacc_for): Relax entry_bb and cont_bb
	assertions to allow intermediate blocks from finalization code.
	Remove exit_bb predecessor count assertion.

2026-04-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/124827
	* gimple-ssa-warn-access.cc (xchg_models): Remove.
	(pass_waccess::check_atomic_builtin): Fix up sucs_arg for
	BUILT_IN_ATOMIC_EXCHAGE_* and use all_models instead of xchg_models.
	Handle BUILT_IN_TSAN_ATOMIC*.  Formatting fixes.

2026-04-10  Dhruv Chawla  <dhruvc@nvidia.com>

	* configure: Regenerate.

2026-04-10  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Set
	__riscv_v_intrinsic to v1.0.
	* doc/extend.texi (RISC-V Vector Intrinsics): Document the
	ratified v1.0 RVV intrinsic specification and update the link.

2026-04-09  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/124773
	* doc/trouble.texi (Linkage in Anonymous Namespaces): New section.

2026-04-09  Alex Coplan  <alex.coplan@arm.com>

	PR target/122483
	* config/aarch64/t-aarch64: Replace instances of TM_H with
	TARGET_H where appropriate, add missing dependency on TARGET_H
	for aarch64-early-ra.cc.

2026-04-09  Dhruv Chawla  <dhruvc@nvidia.com>

	* Makefile.in (AFDO_PROFILER): New variable.
	(PERF): Likewise.
	* config/aarch64/gcc-auto-profile: Detect and use ARM SPE events when
	invoking perf record.
	* configure: Regenerate.
	* configure.ac: Detect whether build has perf utility available and
	check for ARM SPE-based profiling support when building on AArch64.

2026-04-09  Richard Biener  <rguenther@suse.de>

	* coverage.cc (coverage_init): Do not call read_counts_file
	if flag_auto_profile.

2026-04-09  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/124818
	* config/riscv/riscv.cc (synthesize_ior_xor): Do not treat
	TARGET_ZBKB as sufficient for single-bit immediate IOR/XOR.

2026-04-09  Tamar Christina  <tamar.christina@arm.com>

	* doc/params.texi: Replace param_vect_scalar_cost_multiplier with
	param_vect_allow_possibly_not_worthwhile_vectorizations
	* params.opt: Likewise.
	* config/aarch64/aarch64.cc (aarch64_override_options_internal):
	Likewise.
	* config/riscv/riscv.cc (riscv_override_options_internal): Likewise.
	* tree-vect-loop.cc (vect_estimate_min_profitable_iters): Likewise.
	* tree-vect-slp.cc (vect_bb_vectorization_profitable_p): Likewise.
	(vect_slp_region): Likewise.

2026-04-09  Xi Ruoyao  <xry111@xry111.site>

	PR target/105192
	* ifcvt.cc (find_if_header): Don't attempt to use ctrap expander
	after reload.

2026-04-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124810
	* cfgloopmanip.cc (fix_loop_placements): Do not stop
	iterating when an inner loop didn't get re-parented.
	Compute the outermost loop we have to consider re-parenting.

2026-04-08  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	* auto-profile.cc (function_instance::merge): Set other->timestamp() if it's
	lesser than timestamp() and greater than zero or if timestamp() is zero.

2026-04-07  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124759
	PR target/124789
	* config/i386/i386.cc (ix86_need_alignment_p_2): New function.
	Exclude memory with SYMBOLIC_CONST.
	(ix86_need_alignment_p_1): Call ix86_need_alignment_p_2.
	(ix86_find_max_used_stack_alignment): Restore
	hard_stack_slot_access handling.

2026-04-07  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386.cc (ix86_need_alignment_p_1): Replace
	GET_MODE_ALIGNMENT with MEM_ALIGN.

2026-04-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124802
	* tree-vect-slp-patterns.cc (vect_match_expression_p): Fail
	for SLP_TREE_PERMUTE_P.

2026-04-07  Sandra Loosemore  <sloosemore@baylibre.com>

	PR sanitizer/124170
	* doc/invoke.texi (Option Summary) <Linker Options>: Add
	-static-libhwasan and fix alphabetization of similar options.
	(Link Options): Likewise.
	* common.opt.urls: Regenerated.

2026-04-07  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/124784
	* regenerate-opt-urls.py (canonicalize_option_name):  Remove one
	of the dashes from option names starting with two dashes.
	(test_parse_option_index): Add a self-test for this.
	* common.opt.urls: Regenerated.
	* config/picolibc.opt.urls: Regenerated.

2026-04-07  Peter Damianov  <peter0x44@disroot.org>

	* config/mingw/t-cygming: Remove obsolete STMP_FIXINC
	override.

2026-04-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124743
	* tree-vect-slp.cc (vect_schedule_slp_node): Schedule
	loop invariant operations in the loop preheader.

2026-04-07  Avinash Jayakar  <avinashd@linux.ibm.com>
	    Surya Kumari Jangala  <jskumari@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Add
	logic to handle __builtin_ppc_atomic_cas_local.
	* config/rs6000/rs6000-builtins.def: New builtins for
	__builtin_ppc_atomic_cas_local with types.
	* config/rs6000/rs6000-c.cc (altivec_build_resolved_builtin):
	Handle builtins with up to 6 arguments.
	* config/rs6000/rs6000-overload.def: Overload builtin for
	signed/unsiged char, short, int, long, __int128.
	* config/rs6000/rs6000-protos.h (rs6000_expand_atomic_compare_and_swap):
	Add additional parameter 'local' to the prototype.
	* config/rs6000/rs6000.cc (emit_load_locked): Add new parameter. Pass
	new parameter to generate load-locked instruction.
	(rs6000_expand_atomic_compare_and_swap): Add new parameter. Call
	emit_load_locked() with additional parameter value of EH bit.
	(rs6000_expand_atomic_exchange): Pass EH value 0 to emit_load_locked().
	(rs6000_expand_atomic_op): Likewise.
	* config/rs6000/sync.md (load_locked<mode>): Add new operand in RTL
	template. Specify EH bit in the larx instruction.
	(load_locked<QHI:mode>_si): Likewise.
	(load_lockedpti): Likewise.
	(load_lockedti): Add new operand in RTL template. Pass EH bit to
	gen_load_lockedpti().
	(atomic_compare_and_swap<mode>): Pass new parameter 'false' to
	rs6000_expand_atomic_compare_and_swap.
	(atomic_compare_and_swap_local<mode>): New define_expand.

2026-04-06  Nathaniel Shead  <nathanieloshead@gmail.com>

	PR libstdc++/124268
	* doc/invoke.texi: Note that -Wexpose-global-module-tu-local
	also applies to 'export using' declarations.

2026-04-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* doc/install.texi (Specific, amd64-*-solaris2*, i?86-*-solaris2*)
	(sparc-sun-solaris2*, sparc64-*-solaris2*, sparcv9-*-solaris2*)
	(x86_64-*-solaris2*): Remove.  Fold into ...
	(Specific, *-*-solaris2*): ... this.
	Rewrite.

2026-04-04  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/invoke.texi (Picolibc Options): Copy-edit for markup, use
	of proper names, etc.

2026-04-04  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/invoke.texi (GCC Command Options): Move Picolibc Options
	section to Target-Specific Options.
	(Option Summary): Likewise.

2026-04-04  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Common Attributes): Fix cross-reference for
	renamed "Submodel Options" -> "Target-Specific Options".
	* doc/invoke.texi (Invoking GCC): Likewise for the menu.
	(Option Summary): Likewise for the use here.
	(Submodel Options): Rename to Target-Specific Options.  Leave
	an anchor with the old name.  Add better index entries.  Rewrite
	introductory text.
	(Precompiled Headers): Fix another cross-reference.

2026-04-04  Sandra Loosemore  <sloosemore@baylibre.com>

	PR target/107337
	* doc/invoke.texi (x86 Options): Add CX16 feature to nocona,
	alderlake, arrowlake, arrowlake-s, pantherlake, novalake,
	bonnell, sierraforest, grandridge, clearwaterforest, and amdfam10
	family processors.

2026-04-04  Richard Biener  <rguenther@suse.de>

	* doc/gccint.texi: Add named pattern index with @mdindex.
	* doc/md.texi (Standard Pattern Names For Generation): Split
	table into two using subsections, splitting out vectorizer
	related standard patterns.  Use @mdindex for all standard
	pattern names.

2026-04-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (xtensa_legitimize_address):
	Add code to legitimize the displacement of 64 kilobytes before and
	after using two ADDMI instructions.

2026-04-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (negsf2):
	Change define_insn to define_insn_and_split, and replace the
	corresponding output template with the split pattern.

2026-04-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (TARGET_DIFFERENT_ADDR_DISPLACEMENT_P):
	Remove.

2026-04-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (smalloffset_mem_p):
	Rename it to smalloffset_address_p and remove the result check
	of MEM_P().
	(constantpool_address_p): Change from static scope to global.
	* config/xtensa/xtensa-protos.h (smalloffset_mem_p):
	Rename it to smalloffset_address_p.
	(constantpool_address_p): New function prototype.
	* config/xtensa/constraints.md (R):
	Change the call in (match_test "...") from smalloffset_mem_p()
	to smalloffset_address_p().
	(T, U): Change the call in (match_test "...") from
	constantpool_mem_p() to constantpool_address_p().

2026-04-03  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/123234
	* doc/extend.texi (Decimal Float): Clarify that GCC really does
	support only the older N1312 draft as documented here, not the
	standard C23 functionality yet.

2026-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/124754
	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_strcpy): Make
	sure both get_stridx calls are done before first get_strinfo call.
	(strlen_pass::handle_builtin_memcpy): Likewise.
	(strlen_pass::handle_builtin_strcat): Likewise.

2026-04-03  Sandra Loosemore  <sloosemore@baylibre.com>

	PR debug/94491
	* doc/invoke.texi (Debugging Options): Explicitly document what
	-g2 does instead of just saying it's the default.

2026-04-03  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/94182
	* doc/implement-c.texi (Characters implementation): Add
	cross-reference to more detailed discussion about signedness.
	* doc/invoke.texi (C Dialect Options): Combine -fsigned-char
	and -funsigned-char table entries since the following discussion
	applies to both.  Add an anchor so other things can point at it.
	(Warning Options): Add cross-references to the above two places.
	Clarify that the warning is given regardless of whether char is
	signed or unsigned.

2026-04-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/124746
	* tree-ssa-phiprop.cc (propagate_with_phi): Treat
	and aggregate copy as it is a trapping load.

2026-04-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* tree-ssa-phiprop.cc (propagate_with_phi): Move the
	check for load from ptr before the checks of domination.

2026-04-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-protos.h
	(loongarch_parse_fmv_features): Modify parameter type.
	* config/loongarch/loongarch-target-attr.cc
	(loongarch_parse_fmv_features): Some errors have been
	changed to warnings.
	* config/loongarch/loongarch.cc
	(loongarch_process_target_version_attr): Update parameters.
	(loongarch_check_target_clone_version): Likewise.
	(loongarch_option_same_function_versions): Likewise.
	(TARGET_CHECK_TARGET_CLONE_VERSION): Define.

2026-04-01  Tamar Christina  <tamar.christina@arm.com>
	    Roger Sayle  <roger@nextmovesoftware.com>

	PR target/123238
	* config/aarch64/aarch64.cc (aarch64_rtx_costs) <case NE/EQ>:
	Provide improved costs for scalar and vector comparisons.

2026-04-01  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/123238
	* expr.cc (convert_tree_comp_to_rtx): Make global.
	* expr.h (convert_tree_comp_to_rtx): Prototype here.
	* internal-fn.cc (expand_vec_cond_mask_optab_fn): Use rtx_costs
	to determine whether swapping operands would result in better
	code.
	* config/i386/i386-expand.cc (ix86_expand_int_vec_cmp): On
	AVX512 targets use a ternlog instead of a comparison to negate
	the mask (requires one instruction instead of two).
	* config/i386/i386.cc (ix86_rtx_costs): Refactor code for UNSPEC.
	Provide costs for UNSPEC_BLENDV and  UNSPEC_MOVMSK.  Provide
	costs for comparison operators of integer vector modes.

2026-04-01  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/124696
	* lra-constraints.cc (simplify_operand_subreg): Reload
	paradoxical subreg only if it requires more than one hard reg.

2026-04-01  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc (print_operand): Use fputs instead of
	fprintf.

2026-04-01  Sandra Loosemore  <sloosemore@baylibre.com>

	PR preprocessor/70917
	* doc/invoke.texi (Environment Variables): Clarify that LC_ALL,
	LC_CTYPE, LC_MESSAGES, and LANG affect only diagnostics and
	informational output from GCC, not the encodings of input and
	output files.	Remove separate bit-rotten entry for LANG.

2026-04-01  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/124742
	* tree-ssa-forwprop.cc (optimize_aggr_zeroprop): Exit
	if the vdef on the stmt is NULL.

2026-04-01  H.J. Lu  <hjl.tools@gmail.com>

	PR middle-end/124697
	* function.cc (assign_parm_adjust_stack_rtl): Force a local copy
	if the current alignment is less than the minimum of
	BIGGEST_ALIGNMENT and MAX_SUPPORTED_STACK_ALIGNMENT.

2026-04-01  Richard Biener  <rguenther@suse.de>
	    Sandra Loosemore  <sloosemore@baylibre.com>

	PR middle-end/124634
	* doc/ifn.texi: New file.
	* doc/gccint.texi: Include ifn.texi.
	* Makefile.in (TEXI_GCCINT_FILES): Add ifn.texi.

2026-04-01  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/61896
	* doc/cppopts.texi (-finput-charset=): Remove long-obsolete
	locale discussion.  Document behavior about ill-formed inputs.

2026-04-01  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/poly-int.texi: Add copyright notice.
	* doc/specs.texi: Likewise.

2026-03-31  Eric Botcazou  <ebotcazou@adacore.com>

	* tree-ssa-dse.cc (compute_trims): Bail out if ref->size is not
	byte aligned either.

2026-03-31  Mikael Morin  <mikael@gcc.gnu.org>
	    Christopher Albert  <albert@tugraz.at>

	PR fortran/121185
	PR fortran/124661
	* tree-inline.cc (debug_find_tree, debug_find_tree_1): Move
	and rename functions...
	* tree.cc (find_tree, find_tree_1): ... here.
	* tree-inline.h (debug_find_tree): Move renamed declaration...
	* tree.h (find_tree): ... here.

2026-03-31  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124165
	PR target/124684
	* config/i386/i386.cc (ix86_symbolic_const_load_p_1): Renamed to
	...
	(ix86_need_alignment_p_1): This.
	(ix86_symbolic_const_load_p): Renamed to ...
	(ix86_need_alignment_p): This.
	(ix86_find_max_used_stack_alignment): Call ix86_access_stack_p
	only if the INSN needs alignment > stack alignment.

2026-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* config/aarch64/aarch64-sys-regs.def: Copy from Binutils.

2026-03-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* config/aarch64/aarch64-option-extensions.def (poe2):
	New CLI extension option.
	(tev): Likewise.
	(tlbid): Likewise.
	(gcie): Likewise.
	(mpamv2): Likewise.
	(lscp): Likewise.
	(mops-go): Likewise.
	(sve2p3): Likewise.
	(sme2p3): Likewise.
	(f16f32dot): Likewise.
	(sve-b16mm): Likewise.
	(mtetc): Likewise.
	(f16f32mm): Likewise.
	(f16mm): Likewise.
	* doc/invoke.texi (poe2): Document option.
	(tev): Likewise.
	(tlbid): Likewise.
	(gcie): Likewise.
	(mpamv2): Likewise.
	(lscp): Likewise.
	(mops-go): Likewise.
	(sve2p3): Likewise.
	(sme2p3): Likewise.
	(f16f32dot): Likewise.
	(sve-b16mm): Likewise.
	(mtetc): Likewise.
	(f16f32mm): Likewise.
	(f16mm): Likewise.

2026-03-31  Wu Haotian  <rigoligo03@gmail.com>

	* config.gcc: removed linux.h and t-linux for loongarch*-*-elf* targets

2026-03-30  H.J. Lu  <hjl.tools@gmail.com>
	    Richard Biener  <rguenther@suse.de>

	PR target/120839
	PR middle-end/124671
	* function.cc (assign_parm_adjust_stack_rtl): Get the parameter
	as argument.  Adjust alignment check forcing a local copy.
	(assign_parms): Adjust.
	* config/i386/i386.cc (ix86_argument_passed_on_stack_p): New.
	(ix86_update_stack_alignment): Ignore argument passed on stack.

2026-03-30  Vineet Gupta  <vineet.gupta@linux.dev>

	* config/bpf/bpf.md (zero_extendhidi2): Add alternates for
	alu32 and use 'W' for reg operands.
	(zero_extendqidi2): Ditto.

2026-03-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124692
	* tree-cfg.cc (replace_uses_by): Call update_stmt after
	substitution and before folding.

2026-03-30  Saurabh Jha  <saurabh.jha@arm.com>
	    Evgeny Karpov  <evgeny.karpov@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_scalar_mode_supported_p): Only return true on TFmode if
	TARGET_LONG_DOUBLE_128 is set.

2026-03-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/88576
	* tree-ssa-alias.cc (check_fnspec): Remove flag_errno_math check.
	* ipa-modref.cc (modref_access_analysis::process_fnspec):
	Likewise.

2026-03-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124677
	* tree-vect-loop.cc (vectorizable_recurr): Skip vector
	stmts for the def.

2026-03-30  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>

	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Apple M5
	cores.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi: Add apple-m5 core to the ones listed
	for arch and tune selections.

2026-03-30  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR target/102309
	* config/arm/arm.cc (arm_constant_limit): Allways allow at least
	one insn when loading a constant.

2026-03-29  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/124674
	* config/riscv/riscv-modes.def: Create OImode.

2026-03-27  Vineet Gupta  <vineet.gupta@linux.dev>

	PR target/124670
	* config/bpf/bpf.md (zero_extendsidi2): Use 'W' in asm template.

2026-03-27  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/124649
	* regcprop.cc (maybe_mode_change): Return early
	for unordered modes.

2026-03-27  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/124613
	* config/riscv/riscv-vector-builtins.cc (rvv_switcher::rvv_switcher):
	Add riscv_registering_builtins.
	(rvv_switcher::~rvv_switcher): Set riscv_registering_builtins to
	false.
	* config/riscv/riscv.cc (riscv_vector_mode_supported_p): Use
	riscv_registering_builtins.
	* config/riscv/riscv.h: Declare.

2026-03-27  Richard Biener  <rguenther@suse.de>

	PR debug/124644
	* dwarf2out.cc (dwarf2out_abstract_function): Only
	add DW_AT_artificial if the decl isn't DECL_ARTIFICIAL.

2026-03-27  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	* Makefile.in: (PLUGIN_HEADERS): Add $(srcdir)/topics/*.h.
	(install-plugin): Preserve directory structure for topics
	headers.

2026-03-25  Richard Biener  <rguenther@suse.de>

	PR gcov-profile/121074
	* coverage.h (coverage_init_file): Declare.
	(coverage_finish_file): Likewise.
	* coverage.cc (coverage_init_file): New function, split
	out actual file opening and writing from ...
	(coverage_init): ... here.
	(coverage_finish_file): Likewise for file closing, from ...
	(coverage_finish): ... here.
	* tree-profile.cc (tree_profiling): Call coverage_init_file
	and coverage_finish_file here.

2026-03-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124627
	* tree-inline.cc (copy_debug_stmts): Only copy debug
	stmts that are still in the IL.

2026-03-25  Alexandre Oliva  <oliva@adacore.com>

	* gcc-diagnostic-spec.cc (nowarn_spec_t::nowarn_spec_t): Map
	OPT_Wuse_after_free like OPT_Wuse_after_free_.

2026-03-25  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/i386/i386.cc (ix86_in_large_data_p): Check for .lbss etc.
	(x86_64_elf_section_type_flags): Clear SECTION_NOTYPE for .lbss etc.
	* config/i386/x86-64.h (MACH_DEP_SECTION_ASM_FLAG): Define.
	* config/i386/sol2.h [HAVE_SOLARIS_AS]
	(MACH_DEP_SECTION_ASM_FLAG): Redefine as 'h'.

2026-03-25  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* cgraph.cc (cgraph_edge::get_next_speculative_id): Use
	next_speculative_call_target in get_next_speculative_id.

2026-03-24  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/124572
	* lra-eliminations.cc (lra_eliminate): Push new reload insns for
	eliminations in insns.

2026-03-24  Christopher Bazley  <chris.bazley@arm.com>

	* doc/rtl.texi: Fix example of the SSA form.

2026-03-24  Alfie Richards  <alfie.richards@arm.com>

	* tree-vect-stmts.cc (vectorizable_load): Swap order of failure
	message checks.

2026-03-23  Stefan Weigl-Bosker  <stefan@s00.xyz>

	* omp-general.h: Fix typos.

2026-03-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124599
	* tree-ssa-pre.cc (compute_avail): Make the VUSE in the
	PRE reference expression part of the value again.
	(phi_translate_1): Likewise.

2026-03-23  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/124547
	* configure.ac: After config.gcc inclusion use or set only gas instead
	of gas_flag and gnu_ld instead of gnu_ld_flag.
	* config.gcc: Document possibility of gas_flag or gnu_ld_flag being
	empty.
	* acinclude.m4 (gcc_GAS_FLAGS): Use gas instead of gas_flag.
	(gcc_AC_INITFINI_ARRAY): Likewise.  Use gnu_ld instead of gnu_ld_flag.
	* configure: Regenerate.

2026-03-22  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/124597
	* config/i386/i386-builtins.cc (ix86_init_builtins_va_builtins_abi):
	Also add nothrow and leaf attributes to the va builtins.

2026-03-22  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/124597
	* gimple-fold.cc (gimple_fold_builtin_stdarg): Correct the
	eh_update argument to gsi_replace for the VA_END case.

2026-03-21  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/123852
	* config/sh/sh.md (movsicc_t_false): Add the SImode
	on the if_then_else.
	(movsicc_t_true): Likewise.
	(negsi_cond): Likewise.
	(negdi_cond): Add the DImode on the if_then_else.
	(bst_m2a): Add the QImode on the if_then_else.

2026-03-20  Tobias Burnus  <tburnus@baylibre.com>
	    Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/122866
	* gimplify.cc (omp_instantiate_mapper): Give a sorry if there are
	iterators.

2026-03-20  Kwok Cheung Yeung  <kcyeung@baylibre.com>
	    Sandra Loosemore  <sloosemore@baylibre.com>

	* gimplify.cc (gimplify_omp_workshare): Handle iterators in
	"target data".

2026-03-20  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/tuning_models/olympus.h (olympus_tunings): Set
	loop_align to 64:16.

2026-03-20  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (gen_int_relational):
	Specify the table array "info" and the pointer to its elements
	as const.

2026-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/124565
	* config/i386/i386.cc (ix86_build_builtin_va_list_64): Set TREE_PUBLIC
	on type_decl.

2026-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/124566
	* config/sh/sh.cc (sh_build_builtin_va_list): Set TREE_PUBLIC
	on type_decl.

2026-03-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124578
	* tree-ssa-sccvn.cc (vn_reference_eq): Consistently check
	fields from vro2.

2026-03-20  Yangyu Chen  <cyy@cyyself.name>

	* config/aarch64/aarch64.cc (aarch64_generate_version_dispatcher_body):
	Check DECL_VIRTUAL_P for virtual functions for LTO handling.
	* config/i386/i386-features.cc (ix86_generate_version_dispatcher_body):
	Ditto.
	* config/riscv/riscv.cc (riscv_generate_version_dispatcher_body): Ditto.
	* config/rs6000/rs6000.cc (rs6000_generate_version_dispatcher_body):
	Ditto.
	* config/loongarch/loongarch.cc
	(loongarch_generate_version_dispatcher_body): Ditto.

2026-03-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/124565
	* config/alpha/alpha.cc (alpha_build_builtin_va_list): Set TREE_PUBLIC
	on type_decl.

2026-03-19  Dhruv Chawla  <dhruvc@nvidia.com>

	* common.opt.urls: Added missing entry.

2026-03-18  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/124041
	PR rtl-optimization/124439
	* lra-constraints.cc (process_alt_operands): Check hard reg subreg
	mode by hard_regno_mode_ok.
	(curr_insn_transform): Always subsitute equivalence for hard reg
	subreg.

2026-03-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124555
	* match.pd ((A - B) >=/> 0 ? (A - B) : (B - A) -> abs (A - B)):
	Guard the vector case with target_supports_op_p checks.
	((A - B) <=/< 0 ? (A - B) : (B - A) -> -abs (A - B)): Likewise.
	((type)A >=/> 0 ? A : -A -> abs (A)): Likewise.
	((type)A <=/< 0 ? A : -A -> -abs (A)): Likewise.

2026-03-18  Dhruv Chawla  <dhruvc@nvidia.com>

	* Makefile.in (all.fda): Add `--print-autofdo-gcov-version` to
	profile_merger invocation.
	* auto-profile.cc (AUTO_PROFILE_VERSION): Move from here ...
	* auto-profile.h (AUTO_PROFILE_VERSION): ... to here.
	* common.opt: Add -print-autofdo-gcov-version and
	--print-autofdo-gcov-version.
	* doc/invoke.texi: Document the options.
	* gcc.cc: Add include for auto-profile.h.
	(driver_handle_option): Add OPT_print_autofdo_gcov_version.
	(driver::maybe_print_and_exit): Handle the option.

2026-03-18  Richard Biener  <rguenther@suse.de>

	PR middle-end/124552
	* function.cc (free_after_compilation): Free the copyid
	allocator.

2026-03-18  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/124547
	* configure.ac (--with-gnu-ld): Set gnu_ld_flag= instead of
	gnu_ld_flag=no if not explicitly specified.
	(--with-gnu-as): Similarly for gas_flag.
	(DEFAULT_ASSEMBLER): Use wording without GNU as whenever gas_flag
	is not yes rather than when it is no.
	* configure: Regenerate.

2026-03-18  Richard Biener  <rguenther@suse.de>

	* common.opt (fpost-ipa-mem-report): Fix typo.

2026-03-18  Richard Biener  <rguenther@suse.de>

	* ipa-cp.cc (gather_edges_for_value): Return an auto_vec.
	(decide_about_value): Simplify, fixing leak of callers.

2026-03-18  Prachi Godbole  <pgodbole@nvidia.com>

	PR target/123749
	* ipa-locality-cloning.cc (partition_callchain): Start new partition
	if no. of insns exceeds size and if there are nodes to process.

2026-03-18  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/sparc/t-rtems: Add leon5 multilibs.

2026-03-17  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64-sve2.md (@aarch64_pred_revd<mode>):
	Remove movprfx alternative.
	(@cond_revd<mode>): Likewise.

2026-03-17  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	PR rtl-optimization/124476
	* avoid-store-forwarding.cc
	(store_forwarding_analyzer::process_store_forwarding): Replace
	bitmap_all_bits_in_range_p with bitmap_any_bit_in_range_p and
	return false on partial overlap.  Remove redundant-store vectors
	and their associated removal, dump, and deletion logic.

2026-03-17  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_analyze_slp): Release BST map when
	returning.

2026-03-17  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (_loop_vec_info::_loop_vec_info):
	Initialize loop_iv_cond given it's no longer always
	initialized ...
	(vect_create_loop_vinfo): ... here.  Fix formatting.

2026-03-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/122380
	* tree-ssa-sccvn.h (copy_reference_ops_from_ref): Declare.
	(vn_reference_compute_hash): Likewise.
	(vn_reference_eq): Add parameter indicating lexical equivalence,
	defaulted to false.
	* tree-ssa-sccvn.cc (vn_reference_eq): Likewise.
	(print_vn_reference_ops): Print alias type and alignment.
	(vn_reference_compute_hash): Export.
	(copy_reference_ops_from_ref): Likewise.
	* tree-ssa-pre.cc (pre_expr_d::equal): Use lexical equivalence.
	(get_or_alloc_expr_for_reference): Also get value-id, upon
	zero assign a new value-id if the expression is unknown.
	(expr_cmp): New helper.
	(prefer): Likewise.
	(pre_expr_DFS): Get expression exclusion bitmap and honor it.
	(sorted_array_from_bitmap_set): If done for insertion, do limited
	canonexpr() via pairwise prefer on expression pairs with the same
	value, populating an exclution bitmap.
	(phi_translate_1): Do not use the VN hashtable expressions
	or insert there.  Instead maintain a PRE view of expressions.
	(clean): Adjust.
	(do_hoist_insertion): Likewise.
	(insert): Likewise.
	(compute_avail): Use gimple_could_trap_p_1
	on the original stmt rather than vn_reference_may_trap on
	the VN leader.  Use the original stmt operands for the PRE
	view of reference expressions, only use the value number from the VN
	tables.  Remove no longer effective workarounds for semantically
	different references with same value.
	(fini_pre): Release operand vectors for PRE IL reference
	expressions.

2026-03-17  Yangyu Chen  <cyy@cyyself.name>

	* config/i386/i386-features.cc (make_resolver_func): Use
	symtab->change_decl_assembler_name instead of
	SET_DECL_ASSEMBLER_NAME to properly update the symbol table.

2026-03-16  Jose E. Marchesi  <jemarch@gnu.org>

	* doc/install.texi (Configuration): Fix copy pasto
	--enable-objc-gc to --enable-algol68-gc.

2026-03-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124528
	* tree-scalar-evolution.cc (scev_dfs::add_to_evolution):
	Perform the negation in an unsigned type if we cannot make
	sure it will not cause UB.

2026-03-16  Kito Cheng  <kito.cheng@sifive.com>

	* doc/invoke.texi: Add experimental warning for RISC-V
	big-endian support.

2026-03-16  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc
	(constantsynth_method_lshr_mi12b): New.
	(constantsynth_methods): Add constantsynth_method_lshr_mi12b.

2026-03-14  Jakub Jelinek  <jakub@redhat.com>

	PR other/124508
	* config/loongarch/genopts/gen-evolution.awk: Rename copyright_header
	routine so that update-copyright.py isn't upset about it.

2026-03-13  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/124454
	* regcprop.cc (pass_cprop_hardreg::execute): If something
	changed and non-call exceptions is on, call purge_all_dead_edges
	and cleanup_cfg.

2026-03-13  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/117182
	* lra-constraints.cc (curr_insn_transform): Don't change an output
	operand by constant or invariant equivalence.

2026-03-13  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/arm.cc (TARGET_C_BITINT_TYPE_INFO): New Macro.
	(arm_return_in_memory): Return true for any _BitInt(N) where N > 64.
	(arm_needs_doubleword_align): Return true for any _BitInt(N) where N > 32.
	(arm_bitint_type_info): New.
	* config/arm/arm-protos.h (arm_bitint_type_info): New declaration.

2026-03-13  Saurabh Jha  <saurabh.jha@arm.com>

	PR target/122953
	* config/aarch64/aarch64-c.cc
	(TARGET_AARCH64_MS_ABI): Explicitly set it to 0 if not on mingw.
	(aarch64_define_unconditional_macros): Remove __ARM_PCS_AAPCS64
	from here.
	(aarch64_update_cpp_builtins): Define __ARM_PCS_AAPCS64 if not
	on Windows ABI.
	---
	Hey,
	Regression tested on aarch64-linux-gnu and found no regressions.
	Built for arch64-w64-mingw32, ran target dependent tests, and
	found no regressions.
	Ok for master?
	Thanks,
	Saurabh

2026-03-13  Jakub Jelinek  <jakub@redhat.com>

	* tree-profile.cc (struct conds_ctx): Formatting fixes.
	Rename B1, B2, G1, G2 and G3 members to b1, b2, g1, g2 and g3.
	Adjust all uses.
	(topological_cmp, topological_src_cmp, index_of, single_p,
	single_edge, contract_edge_up): Formatting fixes.
	(struct outcomes): Likewise.
	(conditional_succs, condition_index, condition_uid,
	masking_vectors, emit_assign, emit_bitwise_op): Likewise.
	(make_top_index_visit, make_top_index): Likewise.  Rename
	L argument to l.
	(paths_between): Formatting fixes.
	(struct condcov): Likewise.
	(cov_length, cov_blocks, cov_masks, cov_maps, cov_free): Likewise.
	(find_conditions): Likewise.  Don't start warning_at message with
	uppercase letter.
	(struct counters): Formatting fixes.
	(find_counters, resolve_counter, resolve_counters,
	instrument_decisions): Likewise.
	(init_ic_make_global_vars): Comment formatting fixes.
	(gimple_init_gcov_profiler): Formatting fixes.

2026-03-13  Jørgen Kvalsvik  <j@lambda.is>

	PR ipa/124462
	* tree-profile.cc (masking_vectors): Skip blocks with less than
	2 non-complex incoming edges.

2026-03-13  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (constantsynth_pass1):
	Change the comparison between src and SET_SRC(pat) to be performed
	using rtx_equal_p rather than between references (pointer values)
	directly, and adjust the destination of changes in validate_change
	to eliminate the need to call gen_rtx_SET.
	(constantsynth_pass2):
	Fill in missing spacing in one place and changes dump file output
	slightly.

2026-03-13  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (xtensa_split_operand_pair)
	Move the common code from the split part of movd[if]_internal
	MD patterns into this function, since this function is only
	called from the split part of that patterns.
	Also, during non-debug optimization, re-register new literal
	pool entries with the split values themselves instead of
	splitting the memory reference of the source numeric constant
	placed in the pool.
	(split_DI_SF_DF_const):
	Rename to convert_SF_const and remove the split function of
	D[IF]mode constant assignment.
	(do_largeconst2):
	Change the call from split_DI_SF_DF_const to convert_SF_const.
	* config/xtensa/xtensa.md (movdi_internal, movdf_internal):
	Reduce their split parts to just a call to xtensa_split_operand_pair.

2026-03-13  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (FPreg_neg_scaled_simm12b_1):
	Change the test to determine whether REAL_VALUE_TYPE is a non-
	zero finite value to whether it is normal.
	(FPreg_neg_scaled_simm12b):
	Place the call to FPreg_neg_scaled_simm12b_1 last in the
	expression to improve performance, and change the dump file
	output slightly.

2026-03-13  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa-passes.def (pass_xtensa_largeconst):
	Rename to pass_xtensa_largeconst1.
	(pass_xtensa_largeconst2): New target-specific pass.
	* config/xtensa/xtensa-protos.h (make_pass_xtensa_largeconst):
	Rename to make_pass_xtensa_largeconst1.
	(make_pass_xtensa_largeconst2): New function prototype.
	* config/xtensa/xtensa.cc (litpool_set_src_1):
	Change to process large numeric constant assignments to DImode
	as well as [SH]Imode.
	(do_largeconst):
	Rename it to do_largeconst1 and leave only the mandatory insn
	transformation process.
	(do_largeconst2): New function that inherits the optional insn
	transformation processes from the old do_largeconst.
	(rest_of_handle_largeconst):
	Rename to rest_of_handle_largeconst1 and change to call
	do_largeconst1.
	(rest_of_handle_largeconst2): New function that calls
	do_largeconst2.
	(pass_data_xtensa_largeconst)
	Rename to pass_data_xtensa_largeconst1.
	(pass_xtensa_largeconst):
	Rename to pass_xtensa_largeconst1 and change to call
	rest_of_handle_largeconst1.
	(pass_data_xtensa_largeconst2): New opt_pass data.
	(pass_xtensa_largeconst2):
	New rtl_opt_pass that runs rest_of_handle_largeconst2 when non-
	debug optimizations are enabled.
	(make_pass_xtensa_largeconst):
	Rename to make_pass_xtensa_largeconst1.
	(make_pass_xtensa_largeconst2): New function definition.

2026-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/124461
	* config/i386/i386.md (movrs<mode>): Use <imodesuffix> only for
	-masm=att, not for -masm=intel.

2026-03-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/123822
	* simplify-rtx.cc (simplify_context::simplify_subreg): Check the
	mode of the part to be non-VOIDmode before calling gen_rtx_SUBREG.

2026-03-12  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/124452
	* lra-constraints.cc (curr_insn_transform): Move return on the
	postponed insn before any reload generation.

2026-03-12  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	Revert:
	2026-02-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (gnu_ld_flag): Move $gcc_cv_ld --version check into
	AC_ARG_WITH(gnu-ld).
	(gcc_cv_ld): Set before gnu_ld_flag.
	(gas_flag): Move $gcc_cv_ld --version check into AC_ARG_WITH(gnu-ld).
	(gcc_cv_as): Set before gas_flag.
	* configure: Regenerate.

2026-03-12  Martin Jambor  <mjambor@suse.cz>

	PR objc/124260
	* ipa-prop.cc (ipa_analyze_var_static_initializer): Skip a constructor
	entry if its index is NULL.

2026-03-12  Richard Biener  <rguenther@suse.de>

	PR bootstrap/124406
	* ipa-pure-const.cc (skip_function_for_local_pure_const):
	Do not analyze interposable functions when LTO is enabled.

2026-03-12  H.J. Lu  <hjl.tools@gmail.com>

	PR target/122925
	PR target/119979
	* config/sh/sh.cc (TARGET_PROMOTE_PROTOTYPES): Removed.

2026-03-12  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	* fold-mem-offsets.cc (do_analysis): Revise comment.

2026-03-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR middle-end/120030
	* symtab.cc (symtab_node::set_init_priority): Better
	handle the case of setting the priority back to default.
	(cgraph_node::set_fini_priority): Likewise.

2026-03-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* doc/extend.texi (constructor/destructor): Add documentation
	about multiple attributes here.

2026-03-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* doc/extend.texi (constructor/destructor): Document
	the priority when none is supplied.

2026-03-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/124409
	* doc/install.texi: Increment the required binutils for
	riscv to 2.40.

2026-03-12  Marek Polacek  <polacek@redhat.com>

	PR c++/124397
	* diagnostic.h (emitting_diagnostic_p): New.
	* diagnostics/context.h (context::emitting_diagnostic_p): New.

2026-03-11  Jakub Jelinek  <jakub@redhat.com>

	PR target/124436
	* genautomata.cc (output_dfa_insn_code_func): Use
	MIN (INT_MAX, 2U * uid) instead of 2 * uid in dfa_insn_code_enlarge.

2026-03-11  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124407
	* config/i386/i386-features.cc (ix86_place_single_vector_set):
	Handle non-int load with integer constant.
	(ix86_broadcast_inner): Convert const0_rtx to non-int mode.

2026-03-11  Richard Sandiford  <rdsandiford@googlemail.com>

	PR middle-end/124435
	* expr.cc (store_field_updates_msb_p): Use GET_MODE_BITSIZE
	instead of GET_MODE_SIZE.  Handle the two endiannesses separately.

2026-03-11  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	Revert:
	2026-02-27  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR tree-optimization/90036
	* tree-ssa-scopedtables.cc (avail_exprs_stack::record_cond): Always
	record the new hash table entry.

2026-03-11  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	Revert:
	2026-02-28  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR tree-optimization/90036
	* tree-ssa-dom.cc (back_propagate_equivalences): Accept new
	argument for available expression stack.  Lookup equivalences
	in the expression hash table too.  If an expression hash a
	known constant value, record it and recurse.
	(record_temporary_equivalences): Back propagate for a subset of
	edge equivalences.

2026-03-11  Richard Earnshaw  <rearnsha@arm.com>

	PR target/123271
	* config/arm/arm.md (subvsi3_intmin): Renamed to ...
	(sub_cmpVsi3_intmin): ... this.
	(subvsi3): Renamed to ...
	(sub_cmpVsi3): ... this.
	(subvsi3_imm1): Renamed to ...
	(sub_cmpVsi3_imm1): ... this.
	(usubvsi3_borrow): Renamed to ...
	(usub_cmpVsi3_borrow): ... this.
	(usubvsi3_borrow_imm): Renamed to ...
	(usub_cmpVsi3_borrow_imm): ... this.
	(subvsi3_borrow): Renamed to ...
	(sub_cmpVsi3_borrow): ... this.
	(subvsi3_borrow_imm): Renamed to ...
	(sub_cmpVsi3_borrow_imm): ... this.

2026-03-11  Arsen Arsenović  <aarsenovic@baylibre.com>

	* config/gcn/gcn.cc (gcn_addr_space_convert): Use
	SHARED_BASE_REG to find flat address space base of LDS.

2026-03-11  Arsen Arsenović  <aarsenovic@baylibre.com>

	PR target/124044
	* config/gcn/gcn.cc (gcn_addr_space_resolve_default): New
	function.  Converts from ADDR_SPACE_DEFAULT to
	DEFAULT_ADDR_SPACE.
	(gcn_addr_space_convert): Resolve from_type and to_type address
	spaces.

2026-03-11  Arsen Arsenović  <aarsenovic@baylibre.com>

	* config/gcn/gcn.cc (gcn_regno_reg_class): Handle
	MEMORY_APERTURE_REGS.
	(gcn_hard_regno_rename_ok): Return false for memory aperture
	regs.
	(gcn_memory_move_cost): Handle memory aperture regs the same as
	general registers.
	(gcn_hard_regno_nregs): Handle MEMORY_APERTURE_REGS.
	* config/gcn/gcn.h (SHARED_BASE_REG): Define.
	(SHARED_LIMT_REG): Ditto.
	(PRIVATE_BASE_REG): Ditto.
	(PRIVATE_LIMT_REG): Ditto.
	(MEMORY_APERTURE_REG_P): New macro.  Evaluates to non-zero if
	parameter is one of the above registers.
	(SSRC_REGNO_P): Also evaluate to non-zero for aperture regs, as
	they can be sources to scalar instructions.
	(enum reg_class): New class: MEMORY_APERTURE_REGS.
	(REG_CLASS_NAMES): Provide name for that class.
	(MEMORY_APERTURE_REGS_MASK): New helper macro.  Value of
	NAMED_REG_MASK2 for each of the memory aperture regs.
	(REG_CLASS_CONTENTS): Add the above registers to
	MEMORY_APERTURE_REGS, SGPR_VOP_SRC_REGS, and SGPR_SRC_REGS.

2026-03-11  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	* fold-mem-offsets.cc (do_check_validity): fix wrong mode
	and rename arguments to avoid future confusion

2026-03-10  Yangyu Chen  <cyy@cyyself.name>

	* config/riscv/riscv.cc (riscv_check_target_clone_version):
	Fix TARGET_CHECK_TARGET_CLONE_VERSION implementation.

2026-03-10  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_get_datarefs_in_loop): Add function
	level comment.
	(vect_analyze_loop_2): Fix comment.

2026-03-10  Jan Hubicka  <jh@suse.cz>
	    Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/120987
	* ipa-modref.cc (ipa_merge_modref_summary_after_inlining): Mask
	off non const/pure/novops related flags when combining of outer
	functions.

2026-03-09  Jonathan Wakely  <jwakely@redhat.com>

	PR translation/124422
	* config/loongarch/loongarch-target-attr.cc
	(loongarch_parse_fmv_features): Fix spelling in diagnostics.
	* params.opt (max-devirt-targets): Fix typo in description.

2026-03-09  Martin Jambor  <mjambor@suse.cz>

	PR ipa/124291
	* ipa-cp.cc (ipcp_val_replacement_ok_p): Allow more precise
	contexts that what the clone was originally intended for.

2026-03-09  Dhruv Chawla  <dhruvc@nvidia.com>

	PR gcov-profile/124075
	* config/aarch64/gcc-auto-profile: Add "-o perf.data" to perf
	record invocation.
	* config/i386/gcc-auto-profile: Likewise.

2026-03-09  Dhruv Chawla  <dhruvc@nvidia.com>

	PR gcov-profile/123923
	* config/aarch64/gcc-auto-profile: Add --inherit to perf record flags.
	* config/i386/gcc-auto-profile: Likewise.

2026-03-09  Richard Sandiford  <rdsandiford@googlemail.com>

	PR middle-end/118608
	* rtlanal.cc (truncated_to_mode): Revert a change made on 2026-02-03.
	* config/mips/mips.md (*extenddi_truncate<mode>): Likewise.

2026-03-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (movdi_internal, movdf_internal, *btrue,
	*ubtrue, movsicc_internal0, movsicc_internal1, movsfcc_internal0,
	movsfcc_internal1):
	Rewrite in compact syntax.

2026-03-08  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/124403
	* config/riscv/riscv.cc (riscv_get_vls_cc_attr): Fix formating
	of the diagnostic.

2026-03-07  Sandra Loosemore  <sloosemore@baylibre.com>

	PR driver/69367
	PR driver/69849
	* Makefile.in (TEXI_GCCINT_FILES): Add specs.texi.
	* doc/gccint.texi: Include it.
	* doc/install.texi: Fix cross-references.
	* doc/invoke.texi: Likewise.
	(Option Summary): Reclassify -specs/--specs as a developer option.
	(Overall Options): Move -specs= documentation to...
	(Developer Options): ...here.
	(Spec Files): Move entire section to....
	* doc/specs.texi: ....new file.
	* common.opt.urls: Regenerated.

2026-03-07  Jørgen Kvalsvik  <j@lambda.is>

	* tree-profile.cc (struct conds_ctx): Add edges.
	(topological_src_cmp): New function.
	(masking_vectors): New search strategy.

2026-03-07  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR rtl-optimization/121649
	* cse.cc (find_sets_in_insn):  Only use non-reg vec_select
	simplifications.

2026-03-06  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/124126
	* config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types): Copy
	the array type before setting the mode.

2026-03-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/124135
	* tree-inline.cc (expand_call_inline): If both gimple_call_lhs (stmt)
	and use_retvar aren't gimple regs but have gimple reg type, use
	separate load of use_retva into SSA_NAME and then store of it
	into gimple_call_lhs (stmt).

2026-03-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/124358
	* match.pd ((ptr) (x p+ y) p+ z -> (ptr) (x p+ (y + z))): Simplify
	into (ptr) x p+ (y + z) instead.

2026-03-05  Victor Do Nascimento  <victor.donascimento@arm.com>

	PR tree-optimization/124037
	* tree-vect-stmts.cc (get_load_store_type): Fix
	alignment_support_scheme categorization for early
	break VMAT_ELEMENTWISE accesses.

2026-03-05  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vectorizable_live_operation): Fix typo.

2026-03-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98064
	* tree-vect-loop.cc (vectorizable_live_operation): Do
	not restrict replacing uses in a LC PHI.

2026-03-05  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.md (swap<mode>): Swap operand order for
	-masm=intel.

2026-03-05  Xi Ruoyao  <xry111@xry111.site>

	PR target/123807
	PR middle-end/124250
	* config/loongarch/loongarch.cc
	(loongarch_expand_vector_init_same): Revert r16-7163 change.

2026-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/124349
	* config/i386/sse.md (iptrssebvec_2): New define_mode_attr.
	(cvthf82ph<mode><mask_name>): Use it for -masm=intel input
	operand.

2026-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/124367
	* config/i386/sse.md (*andnot<mode>3): Use 0x44 rather than $0x44
	for -masm=intel.

2026-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/124366
	* config/i386/i386.md (@wrss<mode>, @wruss<mode>): Swap operand
	order for -masm=intel.

2026-03-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/119568
	* tree-ssa-math-opts.cc (convert_plusminus_to_widen): Reject different
	mode classes.

2026-03-04  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR rtl-optimization/124041
	* lra-constraints.cc (curr_insn_transform): Check if hardreg is
	valid in subreg context.

2026-03-04  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	PR rtl-optimization/124351
	* avoid-store-forwarding.cc (process_store_forwarding): Add
	bitmap_clear after allocating forwarded_bytes.

2026-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/124341
	* config/i386/sse.md (vcvt<convertfp8_pack><mode><mask_name>): Use
	<mask_operand3> rather than <mask_operand2> for -masm=intel.

2026-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/124349
	* config/i386/sse.md (avx10_2_comisbf16_v8bf): Use %w1 instead of %1
	for -masm=intel.

2026-03-03  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124165
	* config/i386/i386-protos.h (symbolic_reference_mentioned_p):
	Change the argument type from rtx to const_rtx.
	* config/i386/i386.cc (symbolic_reference_mentioned_p): Likewise.
	(ix86_access_stack_p): Add 2 auto_bitmap[] arguments.  Cache
	the register BB domination result.
	(ix86_symbolic_const_load_p_1): New.
	(ix86_symbolic_const_load_p): Likewise.
	(ix86_find_max_used_stack_alignment): If there is no symbolic
	constant load into the register, don't call ix86_access_stack_p.

2026-03-03  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/115042
	* lra-int.h (lra_postponed_insns): New.
	* lra.cc (lra_set_insn_deleted, lra_asm_insn_error): Clear
	postponed insn flag.
	(lra_process_new_insns): Propagate postponed insn flag for asm
	gotos.
	(lra_postponed_insns): New.
	(lra): Initialize lra_postponed_insns.  Push postponed insns on
	the stack.
	* lra-constraints.cc (postpone_insns): New function.
	(curr_insn_transform): Use it to postpone processing reload insn
	constraints.  Skip processing postponed insns.

2026-03-03  Richard Biener  <rguenther@suse.de>

	PR middle-end/45273
	* predict.cc (combine_predictions_for_insn): Use int64_t
	math instead of double.

2026-03-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/124336
	* config/i386/i386.cc (output_adjust_stack_and_probe): Use
	or{b} rather than or%z0 and BYTE PTR rather than DWORD PTR.
	(output_probe_stack_range): Likewise.
	* config/i386/i386.md (probe_stack): Pass just 2 arguments
	to gen_probe_stack_1, first adjust_address to QImode, second
	const0_rtx.
	(@probe_stack_1_<mode>): Remove.
	(probe_stack_1): New define_insn.

2026-03-03  Jonathan Wakely  <jwakely@redhat.com>

	* fold-const.cc: Fix "Conveinece" typo in comment.

2026-03-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_make_slp_decision): Do not call
	vect_mark_slp_stmts.
	* tree-vect-data-refs.cc (vect_enhance_data_refs_alignment):
	We are always doing SLP.
	(vect_supportable_dr_alignment): Likewise.
	* tree-vect-loop.cc (vect_analyze_loop_2): No need to reset
	STMT_SLP_TYPE.

2026-03-03  Jonathan Yong  <10walls@gmail.com>

	* Makefile.in: the libgdiagnostics shared object for mingw
	should be based on host name, not target name.

2026-03-03  Richard Sandiford  <rdsandiford@googlemail.com>
	    Artemiy Volkov  <artemiy.volkov@arm.com>

	PR rtl-optimization/123786
	* rtl-ssa/functions.h (function_info::live_out_value): Delete.
	(function_info::create_degenerate_phi): New overload.
	* rtl-ssa/blocks.cc (all_uses_are_live_out_uses): Delete.
	(function_info::live_out_value): Likewise.
	(function_info::replace_phi): Keep live-out uses if they are followed
	by a definition in the same EBB.
	(function_info::create_degenerate_phi): New overload, extracted
	from create_reg_use.
	(function_info::add_phi_nodes): Ensure that there is a phi for
	every live input that is redefined by a second or subsequent
	block in the EBB.  Record that such phis need live-out uses.
	(function_info::record_block_live_out): Use look_through_degenerate_phi
	rather than live_out_value when setting phi inputs.  Remove use of
	live_out_value for live-out uses.  Inline the old handling of
	bb_mem_live_out.
	(function_info::start_block): Move append_bb call to...
	(function_info::create_ebbs): ...here.
	* rtl-ssa/insns.cc (function_info::create_reg_use): Use the new
	create_degenerate_phi overload.

2026-03-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/124315
	* config/i386/sse.md (avx512f_vmfmadd_<mode>_mask3<round_name>,
	avx512f_vmfmsub_<mode>_mask3<round_name>,
	avx512f_vmfnmadd_<mode>_mask3<round_name>,
	avx512f_vmfnmsub_<mode>_mask3<round_name>): Use %<iptr>1 instead of
	%<iptr>3 in -masm=intel syntax.

2026-03-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/124335
	* config/i386/sse.md (*avx512f_load<mode>_mask): Use %{%3%} instead of
	%{3%} for -masm=intel syntax.

2026-03-03  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/sse.md (avx512fp16_mov<mode>): Rename pattern to...
	(*avx512fp16_mov<mode>): ... this.

2026-03-02  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/102397
	* doc/extend.texi (Attributes): Explicitly say that all attributes
	work in both syntaxes and examples may show either form.
	(Common Attributes): Convert some examples to use the new syntax.

2026-03-02  Filip Kastl  <fkastl@suse.cz>

	PR target/123926
	* config/sparc/sparc.h (HAVE_AS_TLS): Default to 0.

2026-03-02  Alfie Richards  <alfie.richards@arm.com>

	PR target/124167
	* attribs.cc (make_dispatcher_decl): Change node->definition
	to inherit from the node its called on.
	* ipa.cc (remote_unreachable_nodes): Move FMV logic out of
	(!in_boundary_p) if block.

2026-03-02  Cupertino Miranda  <cupertino.miranda@oracle.com>

	PR target/113453
	* config/bpf/bpf-protos.h (bpf_output_call): Change prototype.
	* config/bpf/bpf.cc (bpf_output_call): Change to adapt operands
	and return
	the instruction template instead of immediately emit asm and
	not allow proper final expected execution flow.
	(bpf_output_line_info): Add function to introduce line info
	entries in respective structures
	(bpf_asm_out_unwind_emit): Add function as hook to
	TARGET_ASM_UNWIND_EMIT. This hook is called before any
	instruction is emitted.
	* config/bpf/bpf.md: Change calls to bpf_output_call.
	* config/bpf/btfext-out.cc (struct btf_ext_lineinfo): Add fields
	to struct.
	(bpf_create_lineinfo, btf_add_line_info_for): Add support
	function to insert line_info data in respective structures.
	(output_btfext_line_info): Function to emit line_info data in
	.BTF.ext section.
	(btf_ext_output): Call output_btfext_line_info.
	* config/bpf/btfext-out.h: Add prototype for
	btf_add_line_info_for.

2026-03-02  Jakub Jelinek  <jakub@redhat.com>

	PR target/124294
	* config/i386/sse.md (avx512fp16_mov<mode>): Fix ordering of operands
	for -masm=intel for the avx10_2 alternative.  Fix up indentation in
	the insn condition.
	(vec_set<mode>_0): Fix comment typo, higer -> higher.

2026-03-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR target/57261
	* configure.ac (gcc_cv_ld_as_needed) <i?86-*-solaris2* |
	x86_64-*-solaris2*>: Don't disable.
	* configure: Regenerate.

2026-03-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (solaris_ld): New check.
	Test solaris_ld instead of gnu_ld_flag.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/i386/sol2.h: Switch to HAVE_SOLARIS_LD.
	* config/sol2.h: Likewise.
	* config/sparc/sol2.h: Likewise.
	* config/sparc/sparc.md: Likewise.

2026-03-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (solaris_as): New check.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/i386/i386.cc: Switch to HAVE_SOLARIS_AS.
	* config/i386/sol2.h: Likewise.
	* config/sol2.h: Likewise.
	* config/sparc/sol2.h: Likewise.
	* config/sparc/sparc.cc: Likewise.
	* config/sparc/sparc.md: Likewise.

2026-02-28  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR tree-optimization/90036
	* tree-ssa-dom.cc (back_propagate_equivalences): Accept new
	argument for available expression stack.  Lookup equivalences
	in the expression hash table too.  If an expression hash a
	known constant value, record it and recurse.
	(record_temporary_equivalences): Back propagate for a subset of
	edge equivalences.

2026-02-28  David Malcolm  <dmalcolm@redhat.com>

	PR target/124094
	* config/aarch64/aarch64-generate-json-tuning-routines.py
	(generate_field_code): Add "ctxt, " arg to function call when
	operation is "parse".
	(generate_function): Add "gcc_json_context &ctxt, " param to
	function decl when operation is "parse".
	* config/aarch64/aarch64-json-tunings-parser-generated.inc:
	Regenerate, passing around a gcc_json_context &.
	* config/aarch64/aarch64-json-tunings-parser.cc: Include
	"json-diagnostic.h".
	(WARNING_OPT) New macro.
	(PARSE_INTEGER_FIELD): Add "ctxt" param and pass it around.
	(PARSE_UNSIGNED_INTEGER_FIELD): Likewise.
	(PARSE_BOOLEAN_FIELD): Likewise.
	(PARSE_STRING_FIELD): Likewise.
	(PARSE_OBJECT): Likewise.
	(PARSE_ARRAY_FIELD): Likewise.
	(PARSE_ENUM_FIELD): Likewise.
	(parse_func_type): Likewise.
	(parse_object_helper): Likewise.  Use json_error rather than error.
	(inform_about_wrong_kind_of_json_value): New.
	(extract_string): Add "ctxt" param.  Replace "warning" with a pair
	of calls to json_warning and
	inform_about_wrong_kind_of_json_value, tweaking wording
	accordingly.
	(extract_integer): Likewise.
	(extract_unsigned_integer): Likewise.
	(parse_enum_field): Likewise.
	(validate_and_traverse): Replace "warning" and "error" with
	"json_warning" and "json_error".
	(check_version_compatibility): Use WARNING_OPT.  Add
	auto_diagnostic_group to group the error and note.
	(aarch64_load_tuning_params_from_json_string): Add "js_filename"
	param.  Use gcc_json_context to capture location info.  Use it
	when reporting errors to get file/line/column info.  Replace check
	on root being non-null with assertion, as this is guaranteed if
	error is non-null.  Replace warning with json_warning.
	(aarch64_load_tuning_params_from_json): Pass data_filename to
	aarch64_load_tuning_params_from_json_string for use when reporting
	diagnostics.
	(selftest::test_json_integers): Add a placeholder filename.
	(selftest::test_json_boolean): Likewise.
	(selftest::test_json_strings): Likewise.
	(selftest::test_json_enums): Likewise.

2026-02-28  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add json-diagnostic.o.
	* diagnostics/client-data-hooks.h
	(class client_data_hooks_decorator): New.
	* diagnostics/context.cc (context::set_client_data_hooks): Return
	the old hooks.
	* diagnostics/context.h (context::set_client_data_hooks): Update
	decl likewise.
	* json-diagnostic.cc: New file.
	* json-diagnostic.h: New file.

2026-02-28  David Malcolm  <dmalcolm@redhat.com>

	* config/aarch64/aarch64-json-tunings-parser.cc: Define
	INCLUDE_MAP.
	* json-parsing.cc: Likewise.
	* json-parsing.h (class simple_location_map): New class, moved and
	renamed from...
	* libsarifreplay.cc (class replayer_location_map): ...here.
	(sarif_replayer::m_json_location_map): Update for renaming of
	class.

2026-02-28  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon):
	Add diagnostics/physical-location-maker.o.
	* diagnostics/physical-location-maker.cc: New file, adapted from
	material in libgdiagnostics.cc.
	* diagnostics/physical-location-maker.h: New file, adapted from
	material in libgdiagnostics.cc.
	* libgdiagnostics.cc: Include
	"diagnostics/physical-location-maker.h".
	(diagnostic_manager::diagnostic_manager): Initialize
	m_phys_loc_maker.
	(diagnostic_manager::new_location_from_file_and_line): Split out
	into physical_location_maker.
	(diagnostic_manager::new_location_from_file_line_column):
	Likewise.
	(diagnostic_manager::ensure_linemap_for_file_and_line): Likewise.
	(diagnostic_manager::m_phys_loc_maker): New field.

2026-02-28  David Malcolm  <dmalcolm@redhat.com>

	* diagnostics/html-sink.cc
	(html_builder::make_element_for_diagnostic): Update for logical
	location strings being returned as  label_text rather than
	const char *.
	* diagnostics/logical-locations.h
	(logical_locations::manager::get_short_name): Return label_text
	rather than const char *.
	(logical_locations::manager::get_name_with_scope): Likewise.
	(logical_locations::manager::get_internal_name): Likewise.
	* diagnostics/sarif-sink.cc
	(sarif_builder::ensure_sarif_logical_location_for): Update for
	logical location strings being returned as label_text rather than
	const char *.
	(sarif_builder::make_minimal_sarif_logical_location): Likewise.
	* diagnostics/selftest-logical-locations.cc
	(test_manager::get_short_name): Likewise.
	(test_manager::get_name_with_scope): Likewise.
	(test_manager::get_internal_name): Likewise.
	(selftest_logical_locations_cc_tests): Likewise.
	* diagnostics/selftest-logical-locations.h
	(test_manager::get_short_name): Likewise.
	(test_manager::get_name_with_scope): Likewise.
	(test_manager::get_internal_name): Likewise.
	* diagnostics/state-graphs-to-dot.cc
	(state_diagram::on_node_in_table): Likewise.
	* libgdiagnostics.cc
	(impl_logical_location_manager::get_short_name): Likewise.
	(impl_logical_location_manager::get_name_with_scope): Likewise.
	(impl_logical_location_manager::get_internal_name): Likewise.
	* tree-logical-location.cc
	(tree_logical_location_manager::get_short_name): Likewise.
	(tree_logical_location_manager::get_name_with_scope): Likewise.
	(tree_logical_location_manager::get_internal_name): Likewise.
	* tree-logical-location.h
	(tree_logical_location_manager::get_short_name): Likewise.
	(tree_logical_location_manager::get_name_with_scope): Likewise.
	(tree_logical_location_manager::get_internal_name): Likewise.

2026-02-28  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c/87591
	* doc/extend.texi (Attributes): Document __attribute keyword.
	(Attribute Syntax): Here too.

2026-02-28  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Attributes): Rename the node "GNU Attribute
	Syntax" node back to "Attribute Syntax"; fix references.  Add
	@anchor for sections recently merged away at the new location of
	the material they used to contain.

2026-02-28  Kwok Cheung Yeung  <kcyeung@baylibre.com>

	PR middle-end/113436
	* omp-low.cc (lower_omp_target): Merge branches for allocating memory
	for private clauses.  Add handling for references when allocator
	clause not specified.

2026-02-27  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/124142
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
	For early break require masking when operation can trap.

2026-02-27  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR tree-optimization/90036
	* tree-ssa-scopedtables.cc (avail_exprs_stack::record_cond): Always
	record the new hash table entry.

2026-02-27  Xi Ruoyao  <xry111@xry111.site>

	PR middle-end/124280
	* optabs.cc (expand_vector_broadcast): Allow broadcasting QImode
	to BImode vector.

2026-02-27  Vladimir N. Makarov  <vmakarov@redhat.com>

	Revert:
	2026-02-26  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/115042
	* lra-int.h (lra_constraint_insn_stack_clear): New prototype.
	* lra.cc (lra_constraint_insn_stack2): New vector.
	(lra_constraint_insn_stack_clear): New function.
	(lra): Initialize/finalize lra_constraint_insn_stack2.
	* lra-constraints.cc (lra_constraints): Use
	lra_constraint_insn_stack_clear to postpone processing new reload
	insns.

2026-02-27  Martin Jambor  <mjambor@suse.cz>

	PR ipa/123229
	* ipa-prop.cc (update_indirect_edges_after_inlining): Reset parameter
	index associated with an indirect edge if the inlined edge does not
	have any jump functions.

2026-02-27  Soumya AR  <soumyaa@nvidia.com>

	* config/aarch64/aarch64-json-tunings-parser.cc (parse_object_helper):
	Zero-initialize objects that are NULL in the base tunings, if provided
	in JSON tunings.
	* config/aarch64/aarch64-protos.h (struct sve_vec_cost): Add default
	constructor.
	(struct aarch64_simd_vec_issue_info): Likewise.
	(struct aarch64_sve_vec_issue_info): Likewise.

2026-02-27  Martin Jambor  <mjambor@suse.cz>

	PR ipa/123629
	* ipa-polymorphic-call.cc
	(ipa_polymorphic_call_context::meet_with): When an outer context is
	NULL, call make_speculative on the other one.

2026-02-27  Tamar Christina  <tamar.christina@arm.com>

	PR target/124162
	* config/aarch64/aarch64-sve.md (cond_vec_cbranch_any,
	cond_vec_cbranch_all): Drop partial vectors support.

2026-02-27  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/117935
	* tree-ssa-phiopt.cc (contains_hot_cold_predict): New function.
	(match_simplify_replacement): Return early if early_p and one of
	the middle bb(s) have a hot/cold predict statement.

2026-02-26  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/115042
	* lra-int.h (lra_constraint_insn_stack_clear): New prototype.
	* lra.cc (lra_constraint_insn_stack2): New vector.
	(lra_constraint_insn_stack_clear): New function.
	(lra): Initialize/finalize lra_constraint_insn_stack2.
	* lra-constraints.cc (lra_constraints): Use
	lra_constraint_insn_stack_clear to postpone processing new reload
	insns.

2026-02-26  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/122448
	* config/riscv/riscv-vsetvl.cc (compute_reaching_defintion):
	Rename...
	(compute_reaching_definition): ...To this.
	(pre_vsetvl::compute_vsetvl_def_data):  Compute reaching
	definitions for vsetvl VL -> vsetvl AVL.
	(pre_vsetvl::compute_transparent): Include VL uses.
	(pre_vsetvl::fuse_local_vsetvl_info): Initialize m_reg_use_loc.
	(pre_vsetvl::earliest_fuse_vsetvl_info): Don't hoist if any
	successor would use VL.

2026-02-26  Xi Ruoyao  <xry111@xry111.site>

	PR middle-end/124250
	PR target/123807
	* optabs.cc (expand_vector_broadcast): Add a checking assert to
	verify the precondition about the input modes.
	(expand_binop): Extend the shift amount if it's narrower than
	the element of the shifted vector.

2026-02-26  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/124194
	* config/i386/sse.md (*<avx512>_cmp<mode>3_dup_op): Also return
	CONSTM1_RTX for the case cmp_imm == 7 (predicate TRUE).

2026-02-26  Roger Sayle  <roger@nextmovesoftware.com>

	PR c/119651
	PR c/123472
	* fold-const.cc (tree_nonzero_bits): Rename the original as a
	static function taking an additional precision parameter.  Make
	this implementation robust to error_mark_node.  Preserve the
	original API by checking for error_operand_p before invoking the
	static helper function.

2026-02-26  H.J. Lu  <hjl.tools@gmail.com>

	PR target/119979
	PR target/120888
	* targhooks.cc (default_promote_function_mode_sign_extend): New.
	* targhooks.h (default_promote_function_mode_sign_extend):
	Likewise.
	* config/mcore/mcore.cc (TARGET_PROMOTE_FUNCTION_MODE): Use
	default_promote_function_mode_sign_extend.
	(TARGET_PROMOTE_PROTOTYPES): Removed.
	* config/xtensa/xtensa.cc (xtensa_promote_function_mode): Removed.
	(TARGET_PROMOTE_FUNCTION_MODE): Use
	default_promote_function_mode_sign_extend.

2026-02-25  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	* avoid-store-forwarding.cc
	(store_forwarding_analyzer::process_store_forwarding): Use
	auto_sbitmap for forwarded_bytes to ensure it is freed on all
	return paths.

2026-02-25  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	* avoid-store-forwarding.cc
	(store_forwarding_analyzer::update_stats): Use stats_sf_avoided
	for the "avoided" counter.

2026-02-25  Philipp Tomsich  <philipp.tomsich@vrull.eu>

	* avoid-store-forwarding.cc: Move config.h before
	avoid-store-forwarding.h; place avoid-store-forwarding.h
	after rtl.h; remove unused cselib.h include.
	* avoid-store-forwarding.h: Remove includes of config.h,
	system.h, coretypes.h, backend.h, rtl.h.

2026-02-25  Cupertino Miranda  <cupertino.miranda@oracle.com>

	PR target/120241
	* config/bpf/core-builtins.cc
	(is_attr_preserve_access): Correct for pointer types.
	(maybe_get_base_for_field_expr, core_access_index_map,
	core_access_clean, core_is_access_index, core_mark_as_access_index):
	Remove.
	(make_gimple_core_safe_access_index): Remove function.
	(struct walker_data): New struct to pass data to tree walker.
	(callback_should_do_core_access, should_do_core_access): Add
	function to identify expressions that should not be converted to
	CO-RE.
	(core_make_builtins): Add callback tree walker function to
	convert expressions to CO-RE.
	(callback_find_next_split_location, core_should_split_expr,
	find_next_split_location, gimple_core_early_split_expr): Add
	function to split expressions in CO-RE and non-CO-RE
	expressions.
	(execute_lower_bpf_core): Adapt to new code.
	* config/bpf/bpf.opt: Add option Wco-re.
	* doc/invoke.texi: Add documentation for Wco-re.

2026-02-25  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/110091
	* ipa-split.cc (split_function): Find the bb
	which is used for return in the outlined function.
	Move the clobbers that are at the end of that bb
	to be after the new call.

2026-02-25  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/110091
	* ipa-split.cc (split_function): Split after
	the clobbers/debug stmts rather than after the labels.

2026-02-25  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (spaceshipsi4):
	New RTL generation pattern.

2026-02-25  Richard Biener  <rguenther@suse.de>

	PR target/120234
	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
	For constructor elements always look through a conversion.
	Rewrite load and vector extraction matching to be more obvious.
	Allow arbitrary conversions from the vector extract to elide
	costing of a gpr<->xmm move.

2026-02-25  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/123285
	* config/aarch64/aarch64-early-ra.cc (early_ra::form_chains): Process clobbers
	and ABI clobbers before starting to form the chain.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/88472
	* Makefile.in (ATTR_URLS_HTML_DEPS): Point at new index file.
	* attr-urls.def: Regenerated.
	* gcc-attribute-urlifier.cc (test_attribute_urlifier): Adjust
	URLs to match formatting in the new index.
	* regenerate-attr-urls.py (parse_html_line_attribute_index):
	Update pattern to match formatting in the new combined index.
	Don't segregate entries into separate function/variable/etc
	arrays.
	(INDEX_REL_PATH): Point at the new index file.
	(class TestParsingIndex): Update patterns in self-tests to match
	the current formatting.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/88472
	* doc/extend.texi (Common Attributes): Change @cindex entries for
	attributes to @atindex.  Add some additional @cindex entries.
	(AArch64 Attributes): Likewise.
	(AMD GCN Attributes): Likewise.
	(ARC Attributes): Likewise.
	(ARM Attributes): Likewise.
	(AVR Attributes): Likewise.
	(Blackfin Attributes): Likewise.
	(BPF Attributes): Likewise.
	(C-SKY Attributes): Likewise.
	(Epiphany Attributes): Likewise.
	(H8/300 Attributes): Likewise.
	(IA-64 Attributes): Likewise.
	(LoongArch Attributes): Likewise.
	(M32C Attributes): Likewise.
	(M32R/D Attributes): Likewise.
	(m68k Attributes): Likewise.
	(MicroBlaze Attributes): Likewise.
	(Microsoft Windows Attributes): Likewise.
	(MIPS Attributes): Likewise.
	(MSP430 Attributes): Likewise.
	(NDS32 Attributes): Likewise.
	(Nvidia PTX Attributes): Likewise.
	(PowerPC Attributes): Likewise.
	(RISC-V Attributes): Likewise.
	(RL78 Attributes): Likewise.
	(RX Attributes): Likewise.
	(S/390 Attributes): Likewise.
	(SH Attributes): Likewise.
	(Symbian OS Attributes): Likewise.
	(V850 Attributes): Likewise.
	(Visium Attributes): Likewise.
	(x86 Attributes): Likewise.
	(Xstormy16 Attributes): Likewise.
	(C++ Attributes): Likewise.
	* doc/gcc.texi: Define a new "at" index for attributes.
	(Attribute Index): New appendix.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/88472
	* doc/extend.texi (Common Attributes): Document the "naked"
	attribute here.
	(ARC Attributes): Delete entry for "naked".
	(ARM Attributes): Likewise.
	(AVR Attributes): Likewise.
	(BPF Attributes): Likewise.
	(C-SKY Attributes): Likewise.
	(MCORE Attributes): Delete entire section since "naked" was
	the only thing listed.
	(MSP430 Attributes): Delete entry for "naked".
	(NDS32 Attributes): Likewise.
	(RISC-V Attributes): Likewise.
	(RL78 Attributes): Likewise.
	(RX Attributes): Likewise.
	(x86 Attributes): Likewise.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/88472
	* doc/extend.texi (Common Attributes): Consolidate documentation
	for "cold" and "hot" attributes, including the C++-specific
	behavior.
	(C++ Attributes): Likewise, just point to the main entry.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (RISC-V Attributes): Format and index options
	for the "target" attribute consistently with the documentation
	for other back ends.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Common Attributes): Add LoongArch to lists of
	targets supporting target_clones and target_version.
	(LoongArch Attributes): Copy-edit for grammar and markup.  Wrap
	excessively long lines.  Rearrange the introductory material for
	the target attribute.  Correct index entries for target attribute
	options.
	(Function Multiversioning): Add LoongArch to list of targets
	supporting this feature.  Fix nearby typo.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (AArch64 Attributes): Reorganize material in this
	section, correct terminology and formatting.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/extend.texi (Attributes): General copy-editing.
	(C++ Attributes): Likewise.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/88472
	* doc/extend.texi (Attributes): Start each attribute's
	documentation with a short paragraph describing what it applies to.
	(C++ Attributes): Likewise.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/88472
	* doc/extend.texi (Attributes): Merge respective subsections of
	Function Attributes, Variable Attributes, Type Attributes,
	Label Attributes, Enumerator Attributes, and Statement Attributes
	into new sections Common Attributes and Target-Specific Attributes.
	Fix cross-references.
	* doc/invoke.texi: Fix cross-references.
	* doc/trouble.texi: Likewise.

2026-02-24  Sandra Loosemore  <sloosemore@baylibre.com>

	PR c++/102397
	* doc/extend.texi (Attributes): Rewrite and expand discussion
	of standard vs legacy syntax, with several examples.
	(Attribute Syntax): Rename section to...
	(GNU Attribute Syntax): ...this.  Prune discussion of standard
	attribute syntax.  Fix cross-references.

2026-02-24  Robin Dapp  <rdapp@oss.qualcomm.com>

	* config/riscv/vector.md:  Change 'X' to 'r' in _lra insns.

2026-02-24  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/124147
	* config/riscv/autovec.md: Work around fractional-LMUL modes for
	TARGET_XTHEADVECTOR.
	* config/riscv/riscv-protos.h (get_m1_mode): Export.
	* config/riscv/riscv-v.cc (get_m1_mode): Allow to get a VLS m1
	vector.

2026-02-24  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR rtl-optimization/123381
	* lra-constraints.cc (process_alt_operands): Detect cycles in
	three-operand moves with clobber.
	(curr_insn_transform): Don't write back a scratch operand.

2026-02-24  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/121240
	* config/aarch64/aarch64-simd.md (mov<mode>): Expand vector constants
	early.
	* config/aarch64/aarch64.cc (aarch64_select_rtx_section): Force
	vector immediates <= 16 bytes to constdata.

2026-02-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123117
	PR target/120234
	* tree-ssa-forwprop.cc (simplify_vector_constructor): Fix
	sign conversion check guarding unpacking.

2026-02-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/123629
	* ipa-cp.cc (ipcp_val_replacement_ok_p): Also verify that the
	vector of known contexts has sufficient length.

2026-02-23  Sandra Loosemore  <sloosemore@baylibre.com>

	PR translation/118988
	* params.opt (-param=cycle-accurate-model=): Fix wording of help
	string.
	(-param=phiopt-factor-max-stmts-live=): Likewise.

2026-02-23  Sandra Loosemore  <sloosemore@baylibre.com>

	* config/gcn/gcn.md (addsi3): Disparage vector alternative.
	(addptrdi3): Reverse order of vector and scalar alternatives
	to prefer the latter.
	(subsi3): Disparage vector alternatives.
	(mulsi3): Likewise.
	(muldi3): Likewise.
	(bitunop <expander>si2): Likewise.
	(vec_and_scalar_com <expander>si3): Likewise.
	(vec_and_scalar_nocom <expander>si3): Likewise.
	(one_cmpldi2): Likewise.
	(vec_and_scalar64_com <expander>di3): Likwise.
	(vec_and_scalar64_nocom <expander>di3): Likwise.

2026-02-23  Paul-Antoine Arras  <parras@baylibre.com>

	PR fortran/120505
	* gimplify.cc (omp_accumulate_sibling_list): When the containing struct
	is a Fortran array descriptor, sort mapped components by offset.

2026-02-23  Paul-Antoine Arras  <parras@baylibre.com>

	PR fortran/120505
	* gimplify.cc (omp_mapped_by_containing_struct): Handle Fortran array
	descriptors.
	(omp_build_struct_sibling_lists): Allow attach_detach bias to be
	adjusted on non-target regions.
	(gimplify_adjust_omp_clauses): Remove GIMPLE-only nodes.
	* tree-pretty-print.cc (dump_omp_clause): Handle
	OMP_CLAUSE_MAP_SIZE_NEEDS_ADJUSTMENT and OMP_CLAUSE_MAP_GIMPLE_ONLY.
	* tree.h (OMP_CLAUSE_MAP_SIZE_NEEDS_ADJUSTMENT,
	OMP_CLAUSE_MAP_GIMPLE_ONLY): Define.

2026-02-23  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64.cc (aarch64_override_options_internal):
	Remove +sme+nosve sorry, and remove SVE from nosme workaround.
	* doc/invoke.texi: Remove SVE2 requirement from +sme.

2026-02-23  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
	Replace TARGET_SVE{2} with explicit feature flag checks.
	* config/aarch64/aarch64.cc
	(aarch64_adjust_generic_arch_tuning): Add SME to SVE2 check.
	* config/aarch64/aarch64.h (TARGET_SVE): Adjust condition.
	(TARGET_SVE2): Ditto.

2026-02-23  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64-sme.md (UNSPEC_GET_CURRENT_VG): New
	enum value.
	(aarch64_get_current_vg): New insn.
	* config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
	__arm_get_current_vg if cntd is unavailable.

2026-02-22  Roger Sayle  <roger@nextmovesoftware.com>

	PR c/123716
	* tree.cc (tree_nop_conversion_p): Move sanity checks on
	inner_type to here...
	(tree_nop_conversion): ... from here.

2026-02-22  Nathaniel Shead  <nathanieloshead@gmail.com>

	PR c++/120974
	* gcc.cc (join_spec_func): Escape special characters.

2026-02-21  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (constantsynth_pass1):
	Add the case where the assignment destination is a stack pointer
	to the exclusion criteria for processing.

2026-02-21  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR rtl-optimization/123994
	* rtl-ssa/changes.cc (function_info::verify_insn_changes): Bullet
	proof loop to not fault if we run off the end of the insn chain.

2026-02-21  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/124147
	* config/riscv/riscv.cc (riscv_same_function_versions): Use nullptr_t rather
	than UNKNOWN_LOCATION for pointer argument.

2026-02-20  Kwok Cheung Yeung  <kcyeung@baylibre.com>

	PR middle-end/113436
	* omp-low.cc (omp_lower_target):  Do not check for variable-length
	variables in private clauses by reference when allocating memory.

2026-02-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124068
	* tree-vect-patterns.cc (target_has_vecop_for_code): Move
	earlier, add defaulted optab_subtype parameter.
	(vect_recog_over_widening_pattern): Check that the target
	supports the narrowed operation before committing to the
	pattern.

2026-02-20  Martin Jambor  <mjambor@suse.cz>

	PR ipa/122856
	* ipa-cp.cc (self_recursive_pass_through_p): Test jump function type first.
	(self_recursive_ancestor_p): New function.
	(find_scalar_values_for_callers_subset): Test also for self-recursive
	ancestor jump functions.
	(push_agg_values_for_index_from_edge): Likewise.

2026-02-20  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/121103
	* gimple-fold.cc (gimple_fold_call): Don't simplify
	noreturn functions.
	* tree-ssa-dse.cc (dse_optimize_stmt): Don't handle
	calls to noreturn functions.

2026-02-19  jlaw  <jeffreyalaw@gmail.com>

	PR tree-optimization/124108
	* match.pd (reassociating XOR to expose rotations): Check
	type_has_mode_precision_p before simplifying.

2026-02-19  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.cc (avx_vpermilp_parallel): Use IN_RANGE
	macro.

2026-02-19  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec-opt.md (*literal_v<ieee_fmaxmin_op>_vf_<mode>):
	Add new pattern for vfmax/min combine to fx.

2026-02-18  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/116053
	* regcprop.cc (copyprop_hardreg_forward_1): Use delete_insn_and_edges
	instead of delete_insn.

2026-02-18  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/120169
	* lra-int.h (lra_process_new_insns): Modify the prototype.
	* lra.cc (lra_process_new_insns): Add arg fixup_reg_args_size with
	implicit value.  Move REG_ARGS_SIZE note if necessary.
	* lra-constraints.cc (curr_insn_transform): Pass the new arg value.

2026-02-18  Richard Biener  <rguenther@suse.de>

	PR target/123137
	* config/i386/i386-features.cc (ix86_emit_tls_call): Improve
	local FLAGS_REG liveness calculation.

2026-02-18  Jakub Jelinek  <jakub@redhat.com>

	PR target/124138
	* config/i386/i386.cc (avx_vpermilp_parallel): Verify
	ipar[2] and ipar[3] aren't larger than 3.

2026-02-18  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124098
	* config/i386/i386.cc (ix86_access_stack_p): New.
	(ix86_find_max_used_stack_alignment): Update stack alignment only
	if stack is used.

2026-02-17  H.J. Lu  <hjl.tools@gmail.com>

	PR target/124136
	* config/i386/i386-features.cc (ix86_check_flags_reg): Don't
	mark clobbered FLAGS_REG as live.

2026-02-17  Richard Earnshaw  <rearnsha@arm.com>

	PR target/124134
	* config/arm/arm.md (movsfcc): FAIL if using restricted IT
	blocks and we lack VSEL.
	(movdfcc): Likewise.

2026-02-17  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/124048
	* config/riscv/zicond.md (conditional AND patterns): Fix missed
	flipping the condition's test in RTL output.

2026-02-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124130
	* tree-inline.cc (copy_edges_for_bb): Fixup noreturn calls
	with abnormal edge source.

2026-02-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124132
	* tree-ssa-loop-split.cc (compute_new_first_bound): Fix
	bound difference computation.

2026-02-17  Jakub Jelinek  <jakub@redhat.com>

	PR target/120233
	* gimple-ssa-store-merging.cc (find_bswap_or_nop_2): New function.
	(find_bswap_or_nop): Move CONSTRUCTOR handling to above function,
	call it instead of find_bswap_or_nop_1.
	(bswap_replace): Handle VEC_PACK_TRUNC_EXPR like CONSTRUCTOR.
	(maybe_optimize_vector_constructor): Likewise.
	(pass_optimize_bswap::execute): Likewise.
	(get_status_for_store_merging): Likewise.
	(pass_store_merging::execute): Likewise.

2026-02-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR libstdc++/113450
	PR libstdc++/123176
	* config/sol2.h (INT8_TYPE): Change to signed char.
	(INT_LEAST8_TYPE): Likewise.
	(INT_FAST8_TYPE): Likewise.

2026-02-15  Iain Sandoe  <iain@sandoe.co.uk>

	* json.cc (pointer::token::print): Cast the value to pp_scalar
	with (fmt_size_t).

2026-02-15  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-devirt.cc (ipa_devirt): Improve statistics for multi-target
	devirtualization; do not simple-call devirtualize already devirtualized calls.

2026-02-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac <sparc*-*-*> (gcc_cv_as_sparc_fmaf): Remove.
	(gcc_cv_as_sparc_sparc4): Remove.
	(gcc_cv_as_sparc_sparc): Remove.
	(gcc_cv_as_sparc_sparc6): Remove.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/sparc/sparc.h (AS_NIAGARA3_FLAG) Remove.  Replace uses by
	definition.
	(AS_NIAGARA4_FLAG): Likewise.
	(AS_NIAGARA7_FLAG): Likewise.
	(AS_M8_FLAG): Likewise.
	* config/sparc/sol2.h [!HAVE_AS_SPARC4]: Remove.
	(AS_SPARC32_FLAG): Remove.
	(AS_SPARC64_FLAG): Remove.
	(AS_NIAGARA3_FLAG) Replace uses by definition.
	(AS_NIAGARA4_FLAG): Likewise.
	(AS_NIAGARA7_FLAG): Likewise.
	(AS_M8_FLAG): Likewise.
	* config/sparc/sparc.cc (sparc_option_override):
	[!HAVE_AS_FMAF_HPC_VIS3]: Remove.
	[!HAVE_AS_SPARC4]: Likewise.
	[!HAVE_AS_SPARC5_VIS4]: Likewise.
	[!HAVE_AS_SPARC6]: Likewise.

2026-02-15  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/124099
	* tree-ssa-forwprop.cc (optimize_agr_copyprop_return): Don't do anything
	if the return is already result decl or a deference of result decl.
	Also reject non local var decls.

2026-02-14  Jakub Jelinek  <jakub@redhat.com>

	PR cobol/122839
	* doc/install.texi (COBOL-Specific Options): New.

2026-02-14  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac <sparc*-*-*> (gcc_cv_as_sparc_gotdata_op): Remove.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/sparc/sparc.md [!HAVE_AS_SPARC_GOTDATA_OP]: Remove.

2026-02-14  Kalvis Duckmanton  <kalvisd@gmail.com>

	PR target/112400
	* config/vax/vax.md (casesi1): Wrap naked operand 1 with a USE
	where used with the insn split to.
	(*casesi1): Likewise naked incoming operand 1.

2026-02-14  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/vax/vax.cc (nonindexed_address_p): Move incoming RTX's
	operand 0 access to the actual use places.

2026-02-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/124086
	* tree-complex.cc (extract_component): Extend the check
	for ssa names for VCE to include invariants.

2026-02-13  David Malcolm  <dmalcolm@redhat.com>

	* json-parsing.cc (selftest::assert_json_pointer_eq): New.
	(ASSERT_JSON_POINTER_EQ): New.
	(selftest::test_parse_object): Add tests of JSON pointer.
	(selftest::test_pointer_escaping): New test.
	(selftest::json_parser_cc_tests): Call it.
	* json.cc (json::pointer::token::print): New.
	(json::value::print_pointer): New.
	* json.h (json::pointer::token::print): New decl.
	(json::value::print_pointer): New decl.
	* libsarifreplay.cc: Include pretty-print.h.
	(make_logical_location_from_jv): Use
	json::pointer::token::print for short_name.

2026-02-13  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/124079
	* lra-constraints.cc (get_matching_reload_reg_subreg): Add new arg
	rclass.  Use another condition to use lowpart_subreg.  Use lra_constraint_offset
	to calculate the subreg offset.
	(get_reload_reg, match_reload): Pass the new arg.

2026-02-13  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/95825
	* tree-ssa-forwprop.cc (optimize_agr_copyprop_return): New function.
	(optimize_agr_copyprop): Call optimize_agr_copyprop_return
	for return statements.

2026-02-13  David Malcolm  <dmalcolm@redhat.com>

	PR diagnostics/124014
	* diagnostics/html-sink.cc (html_builder::get_logical_loc_mgr):
	New.
	(html_builder::m_logical_loc_mgr): Drop field.
	(html_builder::html_builder): Drop initialization of
	m_logical_loc_mgr.
	(html_builder::maybe_make_state_diagram): Use get_logical_loc_mgr
	rather than m_logical_loc_mgr.
	(html_builder::make_element_for_diagnostic): Likewise.

2026-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99959
	* tree-sra.cc (create_access_replacement): Guard DECL_NONLOCAL_FRAME
	access.

2026-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99959
	* tree-sra.cc (create_access_replacement): Always create
	debug expressions for DECL_NONLOCAL_FRAME bases.

2026-02-13  Dhruv Chawla  <dhruvc@nvidia.com>

	* Makefile.in (all.fda): Bump profile_merger gcov_version to 3.

2026-02-12  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.cc (cris_reduce_compare): Add forcing the first
	operand to be a register, unless the second operand is 0, to scope.
	* config/cris/cris.md ("*cstore<mode><code>4")
	("*cbranch<mode><code>4"): Add guards to condition, for either operand
	to be a register unless the last operand is zero.

2026-02-12  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.md (BWDSF): New mode_iterator replacing SISF.
	All callers changed.
	("*movhi_internal<setcc><setnz><setnzvc>"): Anonymized from
	"<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>" to make it a
	match-only pattern.  Add conditions to guard from source and
	destination both being memory operands.
	("*movstricthi_internal", "*movstrictqi_internal"): Similarly
	for "movstricthi" and "movstrictqi".
	("movstrict<mode>"): Add common expander for BW, forcing one operand
	to be a register or source being zero.

2026-02-12  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.md (SISF): New mode_iterator for SI and SF.
	("mov<mode>"): Make "movsi" a define_expand to include SFmode by
	means of the SISF iterator and adjust to also handle SFmode.
	("*movsf_internal"): Anonymize "movsf"; make it a match-only pattern.
	Add conditions to guard from source and destination both being memory
	operands.

2026-02-12  Kwok Cheung Yeung  <kcyeung@baylibre.com>

	PR middle-end/113436
	* omp-low.cc (is_variable_sized): Add extra is_ref argument.  Check
	referenced type if true.
	(lower_omp_target): Call lower_private_allocate to generate code to
	allocate memory for firstprivate/private clauses with allocators, and
	insert code after dependent variables have been initialized.
	Construct calls to free allocate memory and insert after target block.
	Adjust decl values for clause variables.  Copy value of firstprivate
	variables to allocated memory.

2026-02-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/124062
	* ifcvt.cc (noce_try_cond_arith): Check the conditional code
	for UNKNOWN.

2026-02-12  Soumya AR  <soumyaa@nvidia.com>

	* config/aarch64/aarch64-json-schema.h: Include inherited members for
	SVE vector costs.
	* config/aarch64/aarch64-json-tunings-parser-generated.inc
	(parse_vec_costs_sve): Regenerate.
	* config/aarch64/aarch64-json-tunings-parser.cc
	(aarch64_load_tuning_params_from_json_string): Clear dispatch scheduling
	flag if dispatch_constraints is NULL.
	* config/aarch64/aarch64-json-tunings-printer-generated.inc
	(serialize_vec_costs_sve): Regenerate.

2026-02-11  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/121191
	* lra-constraints.cc (get_matching_reload_reg_subreg): New.
	(get_reload_reg, match_reload): Use it.

2026-02-11  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/124038
	* tree-ssa-math-opts.cc (strip_nop_view_converts): Remove.
	(convert_mult_to_fma): Undo stripping.

2026-02-11  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/124056
	* cfgexpand.cc (expand_asm_stmt): If after_md_seq is non-NULL, emit
	it at the start of after_rtl_seq instead of after fallthru_label.

2026-02-11  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/116600
	PR middle-end/123386
	* cfgrtl.cc (force_nonfallthru_and_redirect): Don't do any
	asm goto adjustments early, only note in asm_goto_edge if
	any labels point originally to e->dest head.  After jumpblock
	creation don't add an extra edge for asm_goto_edge, instead
	adjust those labels pointing to former e->dest head to point
	to jumpblock instead.

2026-02-10  Dimitry Andric  <dimitry@andric.com>

	PR libfortran/123366
	* configure.ac: Move restoring of CXXFLAGS/LDFLAGS for zstd test to
	the correct place.
	* configure: Regenerate.

2026-02-10  Alice Carlotti  <alice.carlotti@arm.com>

	PR target/123624
	* config/aarch64/aarch64-protos.h
	(aarch64_use_simple_return_insn_p): New.
	* config/aarch64/aarch64.cc
	(aarch64_use_simple_return_insn_p): New, used...
	* config/aarch64/aarch64.md (simple_return): ...here.

2026-02-10  Alice Carlotti  <alice.carlotti@arm.com>

	* config.gcc: Improve aarch64 --with-arch checks.

2026-02-10  Alfie Richards  <alfie.richards@arm.com>

	* tree-vect-data-refs.cc (vect_analyze_data_refs_alignment):
	Update signature and comment.
	* tree-vect-loop.cc (vect_analyze_loop_2): Update comment for
	vect_analyze_data_refs_alignment and remove control flow.
	* tree-vectorizer.h (vect_analyze_data_refs_alignment): Update
	signature.

2026-02-10  Juergen Christ  <jchrist@linux.ibm.com>

	PR tree-optimization/122297
	* tree-vect-loop.cc (vectorize_fold_left_reduction): Adjust.
	(vectorizable_induction): Adjust.
	(vectorizable_live_operation_1): Adjust.
	(vect_get_loop_len): Provide parameter to select bias-adjusted
	length.
	(vect_gen_loop_len_mask): Adjust.
	(vect_update_ivs_after_vectorizer_for_early_breaks): Adjust.
	* tree-vect-stmts.cc (vect_get_strided_load_store_ops): Adjust.
	(vectorizable_call): Adjust.
	(vectorizable_operation): Adjust.
	(vectorizable_store): Adjust.
	(vectorizable_load): Adjust.
	(vectorizable_condition): Adjust.
	* tree-vectorizer.h (vect_get_loop_len): Add parameter.

2026-02-10  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/tuning_models/olympus.h (olympus_sve_vector_cost):
	Set align_load_cost to 6.

2026-02-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/107690
	* tree-ssa-ifcombine.cc (ifcombine_ifandif): Do not merge
	possibly analyzable exit conditions.

2026-02-09  David Malcolm  <dmalcolm@redhat.com>

	PR diagnostics/124014
	* diagnostics/sarif-sink.cc
	(sarif_builder::get_logical_location_manager): Reimplement, to
	eliminate m_logical_loc_mgr.
	(sarif_builder::m_logical_loc_mgr): Drop field.
	(sarif_builder::sarif_builder): Update for removed field.
	(sarif_builder::set_any_logical_locs_arr): Likewise.
	(sarif_builder::ensure_sarif_logical_location_for): Likewise.
	(sarif_builder::make_minimal_sarif_logical_location): Likewise.

2026-02-09  David Faust  <david.faust@oracle.com>

	PR target/123556
	* config/bpf/bpf.h (SLOW_BYTE_ACCESS): Set to 0, update comment.

2026-02-09  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/80881
	* attribs.cc (handle_dll_attribute): If TARGET_WIN32_TLS is 1,
	issue an error if either attribute is set on a TLS variable.

2026-02-09  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR other/123841
	PR target/123926
	* acinclude.m4 (gcc_GAS_FLAGS): Handle non-Darwin/Solaris as cases
	alike on x86 and SPARC.
	* configure: Regenerate.

2026-02-09  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/123796
	* lra-int.h (lra_pointer_equiv_set_add): Add prototype.
	(lra_pointer_equiv_set_in, lra_finish_equiv): Ditto.
	* lra.cc (lra_emit_move): Set up pointer flag of the destination
	if necessary.
	(lra): Call lra_finish_equiv.
	* lra-constraints.cc: Include hash-set.h.
	(pointer_equiv_set, lra_pointer_equiv_set_add): New.
	(lra_pointer_equiv_set_in, lra_finish_equiv): New.
	(get_equiv_with_elimination): Propagate pointer flag by adding to
	pointer_equiv_set.
	(process_addr_reg, curr_insn_transform): Ditto.

2026-02-09  Richard Biener  <rguenther@suse.de>

	* doc/analyzer.texi (State Tracking): Fix typo.

2026-02-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123225
	* tree-vect-loop.cc (vect_analyze_loop_costing): For uncounted
	loops reject not trivially profitable loops that have no
	estimate on the number of scalar iterations.

2026-02-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/124034
	* tree-vect-stmts.cc (process_use): Never force induction
	latch defs relevant when doing early break vectorization.

2026-02-09  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* doc/invoke.texi (-mconst16/-mno-const16):
	Remove the clause "The CONST16 instruction is currently not a
	standard option from Tensilica."

2026-02-09  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/117217
	* tree-sra.cc (propagate_subaccesses_from_rhs): Do not propagate
	bit-field children.
	(propagate_subaccesses_from_lhs): Likewise.

2026-02-09  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/123911
	* config/riscv/riscv.cc (riscv_legitimize_move): Elide nop moves to
	avoid infinite recursion.

2026-02-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123672
	* tree-ssa-forwprop.cc (recognise_vec_perm_simplify_seq): Use std::swap
	instead of fetching gimple_assign_rhs{1,2} again.  Change type of lanes
	vector from auto_vec<unsigned int> to auto_vec<bool> and store true
	instead of 1 into it.  Fix comment typo and formatting fix.
	(can_blend_vec_perm_simplify_seqs_p): Put end of comment on the same
	line as the last sentence in it.
	(calc_perm_vec_perm_simplify_seqs): Change lane_assignment type from
	auto_vec<int> to auto_vec<unsigned> and store 2 + l_orig into it
	instead of true.  Fix comment typo and formatting fix.  Set use_seq1
	to line_assignment[i] < 2 instead of line_assignment[i] != 2.  Replace
	bogus computation of index for !use_seq with using
	line_assignment[i] - 2.  Set l1 to l1 % nelts and similarly for l2.

2026-02-07  Jakub Jelinek  <jakub@redhat.com>

	* optabs.cc (expand_vec_perm_const): Comment spelling fix,
	permuation -> permutation.
	* config/arm/arm.cc (arm_evpc_neon_vtbl): Likewise.
	* config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const):
	Comment spelling fix, permuatation -> permutation.
	(loongarch_is_elem_duplicate): Likewise.  Comment spelling fix,
	permuation -> permutation.

2026-02-07  Richard Biener  <rguenther@suse.de>

	* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
	Remove double and triple accounting of GPR -> XMM moves
	in construction of AVX and AVX512 vectors.

2026-02-07  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* cse.cc (invalidate_from_sets_and_clobbers): Consider any hard
	register referred to by any single register constraint
	potentially being clobbered.

2026-02-07  Roger Sayle  <roger@nextmovesoftware.com>

	PR middle-end/123826
	PR tree-optimization/123958
	PR c++/124002
	* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
	Delete code that (mis)handled conversion of pow(x,2.0) to x*x.

2026-02-07  Roger Sayle  <roger@nextmovesoftware.com>
	    Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
	    Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR rtl-optimization/123833
	* recog.cc (cancel_changes): Update the recog_data cache if it
	holds the instruction being changed.

2026-02-06  Richard Ball  <Richard.Ball@arm.com>

	* config/aarch64/aarch64-builtins.cc
	(enum aarch64_builtins): Add ptr and generic variants.
	(aarch64_init_pcdphint_builtins): Likewise.
	(aarch64_general_expand_builtin): Add ptr variant.
	(aarch64_resolve_overloaded_builtin_stshh): Function to handle
	overloaded atomic_store_with_stshh.
	(aarch64_resolve_overloaded_builtin_general): Add call to stshh function.
	* config/aarch64/aarch64-c.cc
	(aarch64_resolve_overloaded_builtin): Allow fndecl to return.
	* config/aarch64/arm_acle.h
	(__atomic_store_with_stshh): Remove __Generic.

2026-02-06  Martin Jambor  <mjambor@suse.cz>

	PR ipa/106260
	* ipa-cp.cc (initialize_node_lattices): Replace assert that there are
	callers with handling that situation when -fno-toplevel_reorder.

2026-02-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (gnu_ld_flag): Move $gcc_cv_ld --version check into
	AC_ARG_WITH(gnu-ld).
	(gcc_cv_ld): Set before gnu_ld_flag.
	(gas_flag): Move $gcc_cv_ld --version check into AC_ARG_WITH(gnu-ld).
	(gcc_cv_as): Set before gas_flag.
	* configure: Regenerate.

2026-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR c/101312
	* alias.cc (get_alias_set): Allow TYPE_CANONICAL (mv) to be
	not its own TYPE_MAIN_VARIANT, as long as its TYPE_MAIN_VARIANT
	has TYPE_CANONICAL equal to itself.
	* tree.cc (verify_type): Likewise.

2026-02-06  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>

	PR tree-optimization/114969
	* match.pd (`(A | (convert?)(A != 0)) EQ|NE 0`): New pattern.

2026-02-06  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-valu.md (*mov<mode>_exec_match): Delete.
	(*mov<mode>_exec_match): Likewise.
	(*mov<mode>): Delete unaligned register support, and convert to new
	constraint syntax.
	(mov<mode>_exec): Likewise.
	(@mov<mode>_sgprbase): Likewise.
	* config/gcn/gcn.md (*movbi): Likewise.

2026-02-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114274
	* tree-switch-conversion.cc (switch_conversion::build_one_array):
	Use UNKNOWN_LOCATION for the CSWTCH decl.

2026-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR c++/123977
	* tree.cc (build_function_type): Pass no_named_args_stdarg_p
	as last argument to recursive call.

2026-02-06  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123940
	* tree-ssa-math-opts.cc (convert_mult_to_fma): Check
	multiplication result is an addend.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* attribs.cc: Replace CONST_CAST with const_cast<>.
	* builtins.cc: Likewise.
	* collect2.cc: Likewise.
	* config/bpf/core-builtins.cc: Likewise.
	* config/gcn/mkoffload.cc: Likewise.
	* config/nvptx/mkoffload.cc: Likewise.
	* config/nvptx/nvptx.cc: Likewise.
	* ctfc.cc: Likewise.
	* dumpfile.cc: Likewise.
	* gcc.cc: Likewise.
	* gcov.cc: Likewise.
	* gengtype-parse.cc: Likewise.
	* gengtype-state.cc: Likewise.
	* gengtype.cc: Likewise.
	* genoutput.cc: Likewise.
	* ggc-page.cc: Likewise.
	* godump.cc: Likewise.
	* lto-section-in.cc: Likewise.
	* lto-wrapper.cc: Likewise.
	* omp-offload.cc: Likewise.
	* passes.cc: Likewise.
	* plugin.cc: Likewise.
	* prefix.cc: Likewise.
	* pretty-print.cc: Likewise.
	* selftest.cc: Likewise.
	* statistics.cc: Likewise.
	* stringpool.cc: Likewise.
	* tree.h: Likewise.
	* tree-profile.cc: Likewise.
	* vec.h: Likewise.
	* system.h (CONST_CAST2): Remove.
	(CONST_CAST): Likewise.
	* tsystem.h (CONST_CAST2): Remove.
	(CONST_CAST): Likewise.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* tree.h: Replace CONST_CAST2 with const_cast<>.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* attribs.cc: Replace CONST_CAST_TREE with const_cast<tree>.
	* config/aarch64/aarch64.cc: Likewise.
	* config/arm/arm.cc: Likewise.
	* config/darwin.cc: Likewise.
	* fold-const.cc: Likewise.
	* gimple-expr.cc: Likewise.
	* print-rtl.cc: Likewise.
	* tree-object-size.cc: Likewise.
	* tree.cc: Likewise.
	* varasm.cc: Likewise.
	* tree.h: Likewise.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* gimple.h: Replace CONST_CAST_GIMPLE with const_cast<gimple *>.
	* system.h (CONST_CAST_GIMPLE): Remove.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* system.h: Remove.
	* tracer.cc: Replace CONST_CAST_BB with
	const_cast<basic_block>.
	* tree-cfg.cc: Likewise.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* alias.cc: Replace CONST_CAST_RTX with const_cast<rtx>.
	* config/i386/x86-tune-sched-bd.cc: Likewise.
	* config/rs6000/rs6000.cc: Likewise.
	* recog.cc: Likewise.
	* sel-sched-ir.cc: Likewise.
	* var-tracking.cc: Likewise.
	* varasm.cc: Likewise.
	* system.h (CONST_CAST_RTX): Remove.

2026-02-06  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* config/aarch64/aarch64.cc: Replace CONST_CAST_RTX_INSN with
	const_cast<struct rtx_insn *>.
	* rtlanal.cc: Likewise.
	* sched-deps.cc: Likewise.
	* system.h (CONST_CAST_RTX_INSN): Remove.

2026-02-05  David Malcolm  <dmalcolm@redhat.com>

	* value-range.cc (irange_bitmask::irange_bitmask): Fix typo in
	comment.
	* value-range.h (class vrange): Update leading comment to refer
	to "subsets" rather than "ranges".  Allude to the available
	subclasses.  Warn that the classes can be over-approximations and
	thus can introduce imprecision.
	(class irange_bitmask): Updating leading comment to refer to
	knowledge about a "value", rather than a "range".  Reword
	description of MASK and VALUE to clarify implementation, and
	add an example.
	(class irange): Update leading comment to refer to a
	"subset of possible values" rather than a "range", and
	that subclasses have responsibility for storage.
	(class nan_state): Rewrite leading comment.
	(class frange final): Update leading comment to refer to
	subsets of possible values, rather than ranges, and to
	consistently use "Nan" when capitalizing.

2026-02-05  Michal Jires  <mjires@suse.cz>

	PR testsuite/123559
	* cgraphunit.cc (check_global_declaration): Suppress OPT_Wunused.

2026-02-05  Jakub Jelinek  <jakub@redhat.com>

	Revert:
	2026-01-28  Jakub Jelinek  <jakub@redhat.com>

	PR c/101312
	* langhooks.h (struct lang_hooks_for_types): Remove
	copy_lang_qualifiers.  Add build_lang_qualified_type.
	* langhooks.cc (lhd_build_lang_qualified_type): New function.
	* langhooks-def.h (lhd_build_lang_qualified_type): Declare.
	(LANG_HOOKS_COPY_LANG_QUALIFIERS): Remove.
	(LANG_HOOKS_BUILD_LANG_QUALIFIED_TYPE): Add.
	(LANG_HOOKS_FOR_TYPES_INITIALIZER): Use
	LANG_HOOKS_BUILD_LANG_QUALIFIED_TYPE instead of
	LANG_HOOKS_COPY_LANG_QUALIFIERS.
	* attribs.cc (build_type_attribute_qual_variant): Use
	lang_hooks.types.build_lang_qualified_type instead of
	build_qualified_type and/or build_qualified_type with
	optional lang_hooks.types.copy_lang_qualifiers call.
	(attr_access::array_as_string): Use "array " attribute instead of
	"array".  If attribute has been created or intended quals differ
	from quals of build_array_type, use copy_node and adjust quals and
	attributes on the copy, print and then ggc_free.

2026-02-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123986
	* tree-vect-slp.cc (vect_slp_analyze_operations): When
	rolling back analyzed nodes, release node specific data
	and reset SLP_TREE_TYPE.

2026-02-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123983
	* tree-vect-loop-manip.cc (vect_update_ivs_after_vectorizer):
	Only update the PHI argument on the requested edge.

2026-02-05  Richard Earnshaw  <rearnsha@arm.com>

	PR target/123604
	* compare-elim.cc (find_flags_uses_in_insn): Handle COND_EXEC.
	* config/arm/arm.cc (TARGET_FLAGS_REGNUM): Define.

2026-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123978
	* range-op.h (OP_WIDEN_MULT_SIGNED_UNSIGNED): Define.
	(OP_WIDEN_PLUS_SIGNED, OP_WIDEN_PLUS_UNSIGNED,
	RANGE_OP_TABLE_SIZE): Renumber.
	* gimple-range-op.cc (imple_range_op_handler::maybe_non_standard):
	Use 3 different classes instead of 2 for WIDEN_MULT_EXPR, one
	for both operands signed, one for both operands unsigned and
	one for operands with different signedness.  In the last case
	canonicalize to first operand signed second unsigned.
	* range-op.cc (operator_widen_mult_signed::wi_fold): Use
	TYPE_PRECISION (type) rather than wi::get_precision (whatever) * 2,
	use SIGNED for all wide_int::from calls.
	(operator_widen_mult_unsigned::wi_fold): Similarly but use UNSIGNED
	for all wide_int::from calls.
	(class operator_widen_mult_signed_unsigned): New type.
	(operator_widen_mult_signed_unsigned::wi_fold): Define.

2026-02-05  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/123226
	* cgraph.cc (cgraph_update_edges_for_call_stmt_node): Fix handling
	of multi-target speculations resolved at clone materialization time

2026-02-05  xiezhiheng  <xiezhiheng@huawei.com>
	    liyunfei  <liyunfei33@huawei.com>

	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add hip12 core
	* config/aarch64/aarch64-cost-tables.h: Add hip12_extra_costs
	* config/aarch64/aarch64-tune.md: Regenerate
	* config/aarch64/aarch64.cc: Include hip12 tuning model
	* doc/invoke.texi: Document -mcpu=hip12
	* config/aarch64/tuning_models/hip12.h: New file.

2026-02-05  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123870
	PR target/123969
	* config/riscv/vector.md: Add vlds to "no ratio" for
	theadvector.

2026-02-05  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123971
	* config/riscv/riscv.cc (riscv_vector_mode_supported_any_target_p):
	Remove TARGET_XTHEADVECTOR.

2026-02-05  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123925
	* tree-ssa-forwprop.cc (simplify_vector_constructor):
	Add nop-conversion handling for maybe_ident.

2026-02-05  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123910
	* config/riscv/riscv-string.cc (riscv_expand_block_move):
	Remove !xtheadvector guard.
	(use_vector_stringop_p): Guard small LMULs.
	(check_vectorise_memory_operation): Ditto.

2026-02-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/121726
	* tree-sra.cc (build_ref_for_offset): Add force_ref_all
	parameter and use ptr_type_node as alias pointer type in
	that case.
	(build_ref_for_model): Add force_ref_all parameter and
	pass it through, forcing build_ref_for_offset.
	(generate_subtree_copies): Likewise.
	(sra_modify_call_arg): Force ref-all accesses.

2026-02-05  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/123898
	* tree-ssa-math-opts.cc (strip_nop_view_converts): New.
	(convert_mult_to_fma): Use it.

2026-02-05  Alexandre Oliva  <oliva@adacore.com>

	* simplify-rtx.cc (negated_ops_p): New.
	(simplify_context::simplify_binary_operation_1): Use it.

2026-02-05  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-opts.h (VR2FPR_COST_UNPROVIDED): Add new
	sentinel for unprovided cost.
	* config/riscv/riscv-protos.h (get_vr2fr_cost): Add new func
	decl.
	* config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost):
	Leverage new func to get cost of vr2fpr.
	* config/riscv/riscv.cc (riscv_register_move_cost): Ditto.
	(get_vr2fr_cost): Add new func to wrap access to the cost
	of the vr2fpr.
	* config/riscv/riscv.opt: Add new param vr2fpr-cost.

2026-02-05  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-opts.h (GPR2VR_COST_UNPROVIDED): Depend on
	default unprovided value.
	(FPR2VR_COST_UNPROVIDED): Ditto.
	(VR2GPR_COST_UNPROVIDED): Ditto.
	(COST_UNPROVIDED): Add new default unprovided value.
	* config/riscv/riscv-protos.h (get_vr2gr_cost): Add new func
	decl.
	* config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost):
	Leverage new func to get cost of vr2gpr.
	* config/riscv/riscv.cc (riscv_register_move_cost): Ditto.
	(get_vr2gr_cost): Add new func to wrap access to the cost
	of the vr2gpr.
	* config/riscv/riscv.opt: Add new param vr2gpr-cost.

2026-02-04  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/123922
	* lra-assigns.cc (lra_split_hard_reg_for): Allocate and free
	update_hard_regno_preference_check.  Clear non_reload_pseudos for
	successful spilling too.

2026-02-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR middle-end/121661
	* tree-complex.cc (extract_component): Create gimple
	assign statements directly rather than call force_gimple_operand_gsi.

2026-02-04  Sandra Loosemore  <sloosemore@baylibre.com>

	PR translation/89915
	* doc/params.texi: Copy-edit text throughout the file.
	* params.opt: Likewise in documentation strings.

2026-02-04  Sandra Loosemore  <sloosemore@baylibre.com>

	PR target/123245
	PR translation/89915
	* doc/invoke.texi (Warning Options): Remove discussion of parameters
	from -Winterference-size documentation.
	(Static Analyzer Options): Ditto for -Wanalyzer-symbol-too-complex,
	the list of things the analyzer has specific knowledge of, and
	-fanalyzer-call-summaries.
	(Optimize Options): Ditto for -finline-limit and fipa-cp-clone.
	(Instrumentation Options): Likewise for -fsanitize=kernel-hwaddress
	and -fharden-control-flow-redundancy.
	(C++ Compiled Module Interface): Likewise for discussion of limits
	on number of open files.

2026-02-04  Sandra Loosemore  <sloosemore@baylibre.com>

	PR target/123245
	PR translation/89915
	* Makefile.in (TEXI_GCCINT_FILES): Add params.texi.
	* doc/gccint.texi (pa): New index.
	(Top): Add new Parameters and Parameters Index nodes to menu.
	Include params.texi.
	(Parameter Index): New.
	* doc/invoke.texi (Option Summary): Move --param from Optimization
	Options to Developer Options.
	(Optimization Options): Move parameter documentation to params.texi.
	(Developer Options): Add abbreviated discussion of --param here.
	(LoongArch Options): Move parameter documentation to params.texi.
	(RISC-V Options): Likewise.
	(RS/6000 and PowerPC Options): Likewise.
	* doc/params.texi: New file.

2026-02-04  Yangyu Chen  <cyy@cyyself.name>

	* config/riscv/riscv-target-attr.cc
	(riscv_target_attr_parser::parse_arch): Fix nullptr dereference
	when parsing invalid arch string.

2026-02-04  Jakub Jelinek  <jakub@redhat.com>

	PR c++/123818
	* tree.cc (simple_cst_equal) <case CONSTRUCTOR>: Return -1 if some
	recursive call returns -1.  Also compare indexes.

2026-02-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/122689
	* gimple-lower-bitint.cc (gimple_lower_bitint): For the PHI handling
	if min_prec == prec, break after emitting assignment from c.

2026-02-04  Prachi Godbole  <pgodbole@nvidia.com>

	* params.opt: Change default param value.

2026-02-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR other/123841
	* acinclude.m4 (gcc_GAS_FLAGS): Check $gas_flag, $gnu_ld_flag
	instead of $gas, $gnu_ld.
	* configure.ac: Likewise.
	(gas_flag): Determine if not already set.
	(gnu_ld_flag): Likewise.
	(ld_32_opt): Only set after gnu_ld_flag is set.
	(ld_64_opt): Likewise.
	* configure: Regenerate.

2026-02-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR other/123841
	* acinclude.m4 (gcc_GAS_FLAGS): Handle Darwin as cases separately.
	* configure: Regenerate.

2026-02-03  Roger Sayle  <roger@nextmovesoftware.com>

	PR middle-end/118608
	* expr.cc (store_field_updates_msb_p): New helper function that
	now also handles BYTES_BIG_ENDIAN targets.
	(expand_assignment): Use the above function when deciding to emit
	a required sign/zero extension.
	* rtlanal.cc (truncated_to_mode): Call targetm.mode_rep_extended
	to check whether an explicit TRUNCATE is required (i.e. performs
	an extension) on this target.
	* config/mips/mips.md (*extenddi_truncate<mode>): Handle all
	SUBDI modes, not just SHORT modes.

2026-02-03  Roger Sayle  <roger@nextmovesoftware.com>

	PR middle-end/123826
	* tree-ssa-math-opts.cc (gimple_expand_builtin_pow): Add test
	for flag_errno_math.
	* fold-const-call.cc (fold_const_pow): Reorganize, eliminating
	call to real_powi, and letting do_mpfr_arg2 do all the heavy
	lifting.

2026-02-03  Alfie Richards  <alfie.richards@arm.com>

	PR target/123548
	* config/aarch64/aarch64-builtins.cc
	(aarch64_builtins): Rename AARCH64_PL<X> to
	AARCH64_PREFETCH_PL<X>.
	(aarch64_init_prefetch_builtin): Rename to...
	(aarch64_init_prefetch_builtins): ...this and change builtin
	names.
	(AARCH64_INIT_PREFETCH_BUILTIN): Change to not add
	"__builtin_aarch64__" prefix and to register builtins.
	(handle_arm_acle_h): Add call to aarch64_init_prefetch_builtins.
	(aarch64_init_pcdphint_builtins): Move __pldir code to init
	prefetch builtins.
	(aarch64_general_init_builtins): Remove call to
	aarch64_init_prefetch_builtin.
	(aarch64_expand_prefetch_builtin): Update names of PL<X>
	builtins.`
	* config/aarch64/arm_acle.h
	(__pld): Remove
	(__pli): Likewise.
	(__plix): Likewise.
	(__pldx): Likewise.
	(__pldir): Likewise.

2026-02-03  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR rtl-optimization/123322
	* combine.cc (try_combine): Consider an IF_THEN_ELSE "good" when
	evaluating if 4 insn combinations should be tried.
	* config/riscv/iterators.md (zero_is_neutral_op): New iterator.
	(zero_is_neutral_op_c): Likewise.
	(any_shift_rotate): Likewise.
	* config/riscv/riscv.cc (riscv_rtx_costs): Recognize the conditional
	AND RTL and cost is appropriately.
	* config/riscv/zicond.md: Add patterns to rewrite general conditional
	move sequences into simpler forms.

2026-02-03  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac (gcc_cv_header_afunix_h): New test.
	(HAVE_AFUNIX_H): New AC_DEFINE.
	* diagnostics/sarif-sink.cc: Conditionally include afunix.h
	if it's available, else fall back to internal definition.

2026-02-03  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>

	PR middle-end/123892
	* collect2.cc: Migrate from CONST_CAST2() macro to
	const_cast<>() C++ expression.
	* config/sparc/driver-sparc.cc: Likewise.
	* gcc-ar.cc: Likewise.
	* gcc.cc: Likewise.
	* toplev.cc: Likewise.
	* tree-nested.cc: Likewise.

2026-02-03  Richard Biener  <rguenther@suse.de>

	PR ipa/123416
	* ipa-modref.cc (ipa_merge_modref_summary_after_inlining):
	Fix typo in condtion for load merging when no callee summary.

2026-02-03  Xi Ruoyao  <xry111@xry111.site>

	Revert:
	2025-11-08  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/122097
	* config/loongarch/loongarch.cc
	(loongarch_const_vector_same_bytes_p): Add processing for
	floating-point vector data.

2026-02-03  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/predicates.md (const_vector_neg_fp_operand):
	New define_predicate.
	(reg_or_vector_neg_fp_operand): New define_predicate.
	* config/loongarch/lasx.md (copysign<mode>3): Remove.
	(xorsign<mode>3): Remove.
	* config/loongarch/lsx.md (copysign<mode>3): Remove.
	(@xorsign<mode>3): Remove.
	* config/loongarch/simd.md (copysign<mode>3): New define_expand.
	(@xorsign<mode>3): New define_expand.
	(and<mode>3): Only allow IVEC instead of ALLVEC.
	(ior<mode>3): Likewise.
	(xor<mode>3): Likewise.
	* config/loongarch/loongarch.cc (loongarch_print_operand): No
	longer allow floating-point vector constants for %V.
	(loongarch_const_vector_bitimm_set_p): Always return false for
	floating-point vector constants.
	(loongarch_build_signbit_mask): Factor out force_reg.
	(loongarch_emit_swrsqrtsf): Use integer vector mode instead of
	floating-point vector mode when masking zero inputs.

2026-02-02  David Malcolm  <dmalcolm@redhat.com>

	PR diagnostics/110522
	* gcc.cc (driver_handle_option): Use
	get_diagnostic_file_output_basename for
	OPT_fdiagnostics_format_.
	* opts-diagnostic.cc (get_base_filename): Likewise.
	(get_diagnostic_file_output_basename): New.
	* opts-diagnostic.h (get_diagnostic_file_output_basename): New
	decl.
	* opts.cc (maybe_prepend_dump_dir_name): New, based on code in
	finish_options.
	(finish_options): Move code for determining prepended
	dump_base_name to maybe_prepend_dump_dir_name and call it.
	(common_handle_option): Use get_diagnostic_file_output_basename
	for OPT_fdiagnostics_format_.
	* opts.h (maybe_prepend_dump_dir_name): New decl.

2026-02-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/123294
	* ifcvt.cc (noce_emit_store_flag): Reject modes
	greater than MAX_FIXED_MODE_SIZE.

2026-02-02  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/123897
	* tree-ssa-math-opts.cc (convert_mult_to_fma_1): Use type of variable
	being folded.

2026-02-02  Tamar Christina  <tamar.christina@arm.com>

	PR target/121290
	* config/aarch64/aarch64.cc (aarch64_vector_costs::add_stmt_cost):
	Remove else.

2026-02-02  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/121104
	* tree-ssa-math-opts.cc (match_uaddc_usubc): Punt if
	lhs of ovf1 or ovf2 doesn't have element type compatible with type.

2026-02-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123755
	* tree-vect-stmts.cc (vectorizable_call): Adjust len-masking
	condition.  Simplify code generation.

2026-01-31  Keith Packard  <keithp@keithp.com>

	* config/picolibc-spec.h (LIBC_LINK_SPEC): Use find-file for test
	and access to picolibc.ld.

2026-01-31  Richard Biener  <rguenther@suse.de>

	PR middle-end/123887
	* match.pd ((a ? x : y) !=/== (b ? x : y)): Make sure
	x and y have no side-effects before evaluating them
	unconditionally.

2026-01-31  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/install.texi (Binaries): Switch delorie.com to https.

2026-01-30  Richard Biener  <rguenther@suse.de>

	PR middle-end/123887
	* match.pd ((zero_one ==/!= 0) ? .. z <op> y .. -> zero_one * z ..):
	Check evaluating z unconditionally has no side-effects, like
	trapping.

2026-01-30  Richard Biener  <rguenther@suse.de>

	PR debug/123886
	* dwarf2out.cc (sym_off_pair::sym): Remove GTY((skip)).

2026-01-30  Michal Jires  <mjires@suse.cz>

	* doc/extend.texi: Mention flto-toplevel-asm-heuristics.
	* doc/invoke.texi: Add flto-toplevel-asm-heuristics.

2026-01-30  Richard Biener  <rguenther@suse.de>

	PR debug/110885
	* dwarf2out.cc (generate_skeleton_bottom_up): Generate the
	skeleton ancestor tree when moving a new child to the parent
	even for template instantiations.

2026-01-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123864
	* match.pd (__builtin_mul_overflow_p (x, cst, (stype) 0) ->
	x > stype_max / cst || x < stype_min / cst): Only check
	integer_minus_onep for signed types.

2026-01-30  Jakub Jelinek  <jakub@redhat.com>

	PR c++/123790
	* fold-const.cc (fold_convert_const): Handle conversion of
	integer_zerop to NULLPTR_TYPE.
	(fold_convert_loc): Likewise.

2026-01-30  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/123855
	* path-coverage.cc (flush_on_edges): Only look up SSA name def
	stmt when counter is non-const.

2026-01-30  Jørgen Kvalsvik  <j@lambda.is>

	* gcov-dump.cc (tag_paths): New function.

2026-01-30  Jørgen Kvalsvik  <j@lambda.is>

	* common.opt: ftest-coverage enabled by fpath-coverage or
	fcondition-coverage

2026-01-30  Jørgen Kvalsvik  <j@lambda.is>

	* gcov-dump.cc (tag_conditions):  Read position before blocks,
	terms.

2026-01-30  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/121084
	PR gcov-profile/121123
	PR gcov-profile/121409
	* profile.cc (branch_prob): Record seen_locations without
	discriminators.

2026-01-30  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123876
	* omp-low.cc (diagnose_sb_2): Handle GIMPLE_ASM.

2026-01-30  Alex Coplan  <alex.coplan@arm.com>

	PR target/123206
	* config/aarch64/aarch64-builtins.cc (struct aarch64_pragma_builtins_data):
	Declare array as CONSTEXPR.
	* config/aarch64/aarch64-simd-pragma-builtins.def: Update
	incorrect uses of TARGET_SIMD to use AARCH64_FL_SIMD instead.

2026-01-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/109410
	* tree-ssa-reassoc.cc (build_and_add_sum): Use
	gsi_start_nondebug_after_labels_bb to look for a possible
	returns-twice call.

2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config/darwin-d.cc (darwin_d_os_builtins): Add Apple.

2026-01-30  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/122170
	* ifcvt.cc (noce_can_force_operand): Don't only check if
	there is an optab for the code check the entry for the
	mode is non-null. Handle non integral div by checking
	optab like force_operand does.

2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-ftypes.def: Remove unused type.

2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/123766
	* config/loongarch/loongarch-builtins.cc
	(loongarch_build_vpointer_type): New function.  Return a type
	for 'volatile void *'.
	(LARCH_ATYPE_VPOINTER): New macro.
	* config/loongarch/loongarch-ftypes.def: Change the pointer
	type of the store class function from CVPOINTER to VPOINTER.

2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/123807
	* config/loongarch/loongarch.cc
	(loongarch_expand_vector_init_same): When same is MEM and
	GET_MODE(same) != imode, first load the data from memory
	and then process it further.

2026-01-30  mengqinggang  <mengqinggang@loongson.cn>

	* config/loongarch/loongarch.md: Delete movsf TARGET_HARD_FLOAT
	condition.

2026-01-29  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR middle-end/123869
	* optabs.cc (expand_unop): Move the NEG optab
	handling before the widening code.
	Move the ABS bitwise expansion from expand_abs_nojump
	to before the widening code.
	(expand_abs_nojump): Remove the bitwise expansion trial
	since expand_unop is called right above.

2026-01-29  Roger Sayle  <roger@nextmovesoftware.com>

	* expr.cc (emit_group_load_1): Don't call force_reg if orig_src
	is already a CONCAT.

2026-01-29  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/options.texi (Options): Point to the "user experience"
	documentation.
	* doc/ux.texi (Guidelines for Options): Add some.

2026-01-29  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123806
	* config/riscv/riscv-string.cc (expand_rawmemchr): Use unified
	vl_read.
	(expand_strcmp): Ditto.
	* config/riscv/riscv-vector-builtins-bases.cc:
	* config/riscv/riscv-vector-builtins.cc (function_expander::use_fof_load_insn):
	Only emit the store and not the VL read.
	* config/riscv/riscv-vsetvl.cc (get_fof_set_vl_reg): New
	function.
	(init_rtl_ssa): New wrapper.
	(finish_rtl_ssa): Ditto.
	(emit_fof_read_vls): Emit read_vl after each fault-only-first
	load.
	(pass_vsetvl::simple_vsetvl): Call emit_fof_read_vls ().
	(pass_vsetvl::lazy_vsetvl): Ditto.
	* config/riscv/vector-iterators.md: Add read_vl unspec.
	* config/riscv/vector.md (read_vlsi): Unify.
	(@read_vl<mode>): Ditto.
	(read_vldi_zero_extend): Ditto.
	(@pred_fault_load_set_vl<V_VLS:mode><P:mode>): New FoF variant
	that saves VL in a register.
	(@pred_fault_load_set_vl<VT:mode><P:mode>): Ditto.

2026-01-29  Filip Kastl  <fkastl@suse.cz>

	* gimple-ssa-pta-constraints.cc (make_param_constraints): Adjust
	comment: The function only creates varinfos for the parameters,
	the return value and the static chain.

2026-01-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/122537
	* tree-ssa-loop-niter.cc (number_of_iterations_lt_to_ne): Register
	may_be_zero condition when the IV may overflow.

2026-01-29  Sangamesh Mallayya  <swamy.sangamesh@gmail.com>

	* diagnostics/sarif-sink.cc: Move config.h at the begining.

2026-01-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123596
	* tree-eh.cc (sink_clobbers): Create a virtual PHI when
	one is required but not present, queuing arguments
	for renaming.

2026-01-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116747
	* tree-ssa-phiopt.cc (cond_if_else_store_replacement): Avoid
	duplicate stmts in the set of store pairs to process.

2026-01-28  Uros Bizjak  <ubizjak@gmail.com>

	PR target/36503
	* config/i386/i386.md (*<insn:any_shift><mode:SWI48>3_sub):
	Also allow operands[3] & (<mode_bitsize>-1) == (<mode_bitsize>-1)
	in insn condition. Emit NOT RTX instead of NEG RTX in this case.
	(*<insn:any_shift><mode:SWI48>3_sub_1): Ditto.

2026-01-28  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123824
	* config/riscv/riscv.cc (riscv_vls_mode_fits_in_gprs_p): New
	helper.
	(riscv_pass_vls_aggregate_in_gpr): Use helper and distribute
	half-fitting vector to GPR and stack.
	(riscv_pass_aggregate_in_vr): Reformat comment.
	(riscv_get_arg_info): Use helper.
	(riscv_pass_by_reference): Ditto.

2026-01-28  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/121571
	* lra-constraints.cc (process_alt_operands): Reprocess asm insn
	when there are no enough regs for the asm-insn.

2026-01-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/123575
	* match.pd (abs ((T)x) -> absu (x)): For vector type
	arguments require the resulting operation is supported.

2026-01-28  Richard Biener  <rguenther@suse.de>

	PR ipa/111036
	* match.pd (__builtin_constant_p ((T)x)): Strip nop-conversions
	from __builtin_constant_p arguments.

2026-01-28  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/106859
	* var-tracking.cc (val_store): Dump -1 as UID if setting_insn
	is NULL.

2026-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123537
	* match.pd (REDUC (@0 & @1) -> @0[I] & @1[I]): Restrict
	allowed conversions.

2026-01-28  Karl Meakin  <karl.meakin@arm.com>

	* doc/invoke.texi: Document `+sve-bfscale` flag.
	* config/aarch64/aarch64.h (TARGET_SVE_BFSCALE): New macro.
	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
	Define `__AARCH64_FEATURE_SVE_BFSCALE`.
	* config/aarch64/aarch64-sve-builtins-base.cc: Skip constant
	folding for floating-point or unpredicated multiplications.
	* config/aarch64/aarch64-sve-builtins-sve2.def: New `SVE_FUNCTION`s.
	* config/aarch64/aarch64-sve.md: Modify insns for
	`SVE_COND_FP_BINARY_INT` to handle BF16 modes.
	* config/aarch64/aarch64-sve2.md
	(@aarch64_sve_<optab><mode>, @aarch64_sve_<optab><mode>_single): New insn for `BFSCALE`.
	Modify insns for `UNSPEC_FSCALE` to handle BF16 modes.
	* config/aarch64/iterators.md (SVE_FULL_F_SCALAR): Add `VNx8BF` to iterator.
	(SVE_FULL_F_BFSCALE): New iterator.
	(SVE_Fx24_BFSCALE): New iterator.
	(SVE_BFx24): New iterator.
	(UNSPEC_FMUL): New unspec.
	(V_INT_EQUIV): Add entries for BF16 modes.
	(b): Add entries for scalar float modes.
	(is_bf16): Add entries for BF16 modes and reformat.
	(SVSCALE_SINGLE_INTARG): Likewise.
	(SVSCALE_INTARG): Likewise.
	(SVE_FP_MULL): New iterator.

2026-01-28  Pengfei Li  <Pengfei.Li2@arm.com>

	PR middle-end/123447
	* expr.cc (expand_expr_real_1): Increase stack slot alignment
	for STRICT_ALIGNMENT targets.

2026-01-28  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR target/123016
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): use
	'build_truth_vector_type_for_mode' to reconstruct mask's vectype for
	non-scalar masks.

2026-01-28  Jakub Jelinek  <jakub@redhat.com>

	PR c/101312
	* langhooks.h (struct lang_hooks_for_types): Remove
	copy_lang_qualifiers.  Add build_lang_qualified_type.
	* langhooks.cc (lhd_build_lang_qualified_type): New function.
	* langhooks-def.h (lhd_build_lang_qualified_type): Declare.
	(LANG_HOOKS_COPY_LANG_QUALIFIERS): Remove.
	(LANG_HOOKS_BUILD_LANG_QUALIFIED_TYPE): Add.
	(LANG_HOOKS_FOR_TYPES_INITIALIZER): Use
	LANG_HOOKS_BUILD_LANG_QUALIFIED_TYPE instead of
	LANG_HOOKS_COPY_LANG_QUALIFIERS.
	* attribs.cc (build_type_attribute_qual_variant): Use
	lang_hooks.types.build_lang_qualified_type instead of
	build_qualified_type and/or build_qualified_type with
	optional lang_hooks.types.copy_lang_qualifiers call.
	(attr_access::array_as_string): Use "array " attribute instead of
	"array".  If attribute has been created or intended quals differ
	from quals of build_array_type, use copy_node and adjust quals and
	attributes on the copy, print and then ggc_free.

2026-01-28  Jakub Jelinek  <jakub@redhat.com>

	PR c++/123837
	* ipa-free-lang-data.cc (find_decls_types_r): Remove C++ annotations
	from {DECL,TYPE}_ATRIBUTES.

2026-01-28  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123849
	* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
	DEMANGLE_COMPONENT_EXTENDED_BUILTIN_TYPE like DEMANGLE_COMPONENT_BUILTIN_TYPE.

2026-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/110043
	* pointer-query.cc (get_offset_range): Fail for integer
	types with precision larger than ptrdiff_type_node.

2026-01-28  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/123779
	* config/i386/sse.md (*sse4_1_<code>v8qiv8hi2<mask_name>_2):
	Rename to ...
	(*sse4_1_<code>v8qiv8hi2_2): ... this, and drop mask conditions.
	(*avx2_<code>v8qiv8si2<mask_name>_2): Rename to ...
	(*avx2_<code>v8qiv8si2_2): ... this, and likewise.
	(*sse4_1_<code>v4qiv4si2<mask_name>_2): Rename to ...
	(*sse4_1_<code>v4qiv4si2_2): ... this, and likewise.
	(*sse4_1_<code>v4hiv4si2<mask_name>_2): Rename to ...
	(*sse4_1_<code>v4hiv4si2_2): ... this, and likewise.
	(*avx2_<code>v4qiv4di2<mask_name>_2): Rename to ...
	(*avx2_<code>v4qiv4di2_2): ... this, and likewise.
	(*avx2_<code>v4hiv4di2<mask_name>_2): Rename to ...
	(*avx2_<code>v4hiv4di2_2): ... this, and likewise.
	(*sse4_1_<code>v2hiv2di2<mask_name>_2): Rename to ...
	(*sse4_1_<code>v2hiv2di2_2): ... this, and likewise.
	(*sse4_1_<code>v2siv2di2<mask_name>_2): Rename to ...
	(*sse4_1_<code>v2siv2di2_2): ... this, and likewise.
	(*avx512f_<code>v8qiv8di2<mask_name>_2): Rename to ...
	(*avx512f_<code>v8qiv8di2_2): ... this.
	(*avx512vl_<code>v8qiv8hi2_mask_2): New define_insn_and_split.
	(*avx512vl_<code>v8qiv8si2_mask_2): Likewise.
	(*avx512vl_<code>v4qiv4si2_mask_2): Likewise.
	(*avx512vl_<code>v4hiv4si2_mask_2): Likewise.
	(*avx512f_<code>v8qiv8di2_mask_2): Likewise.
	(*avx512vl_<code>v4qiv4di2_mask_2): Likewise.
	(*avx512vl_<code>v4hiv4di2_mask_2): Likewise.
	(*avx512vl_<code>v2hiv2di2_mask_2): Likewise.
	(*avx512vl_<code>v2siv2di2_mask_2): Likewise.

2026-01-28  Nina Ranns  <dinka.ranns@gmail.com>
	    Iain Sandoe  <iain@sandoe.co.uk>
	    Ville Voutilainen  <ville.voutilainen@gmail.com>

	* doc/invoke.texi: Document -fcontracts-client-check= and
	-fcontracts-definition-check=.

2026-01-28  Nina Ranns  <dinka.ranns@gmail.com>
	    Iain Sandoe  <iain@sandoe.co.uk>
	    Ville Voutilainen  <ville.voutilainen@gmail.com>

	* doc/invoke.texi: Document -fcontract-checks-outlined and
	-fcontract-disable-optimized-checks.

2026-01-28  Nina Ranns  <dinka.ranns@gmail.com>
	    Iain Sandoe  <iain@sandoe.co.uk>

	* tree-core.h (struct tree_base): Update tree flag usage comment.

2026-01-28  Nina Ranns  <dinka.ranns@gmail.com>
	    Iain Sandoe  <iain@sandoe.co.uk>

	* tree.h (CONST_WRAPPER_P): New.

2026-01-28  Nina Ranns  <dinka.ranns@gmail.com>
	    Iain Sandoe  <iain@sandoe.co.uk>

	* doc/invoke.texi: Document -fcontracts-conservative-ipa.

2026-01-28  Iain Sandoe  <iain@sandoe.co.uk>
	    Nina Ranns  <dinka.ranns@gmail.com>
	    Ville Voutilainen  <ville.voutilainen@gmail.com>

	* config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Add cases for contract
	constant data that need to be in independent link-time 'atoms'.
	* doc/invoke.texi: Document -fcontracts and
	-fcontract-evaluation-semantic=.

2026-01-28  Iain Sandoe  <iain@sandoe.co.uk>
	    Nina Ranns  <dinka.ranns@gmail.com>

	* doc/invoke.texi: Remove documentation of contracts options.

2026-01-27  Jakub Jelinek  <jakub@redhat.com>

	PR other/123841
	* acinclude.m4 (gcc_GAS_FLAGS) <i?86-*-* | x86_64-*-*>: Set
	gcc_cv_as_flags irrespective of $gas_flag.
	* configure: Regenerate.

2026-01-27  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/122623
	* doc/invoke.texi (-fanalyzer-assume-nothrow): New option.

2026-01-27  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR middle-end/97898
	* omp-expand.cc (expand_omp_for_static_chunk): Don't
	conditionalize the call to force_gimple_operand_gsi on DECL_P/TREE_ADDRESSABLE
	but rather pass that as the 3rd argument.

2026-01-27  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/123619
	* ipa-polymorphic-call.cc
	(ipa_polymorphic_call_context::possible_dynamic_type_change): Remove impossible
	speuculation.

2026-01-27  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (ld_32_opt, ld_64_opt): Set.
	(ld_ix86_gld_32_opt): Replace by ld_32_opt.
	(ld_ix86_gld_64_opt): Replace by ld_64_opt.
	Replace -melf_x86_64 by ld_64_opt.
	* configure: Regenerate.

2026-01-27  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* acinclude.m4 (gcc_cv_as_flags) Provide Solaris settings.
	Apply Linux/x86 gas settings on all x86 gas targets, too.
	(as_32_opt, as_64_opt): Set on all x86 gas targets.
	* configure.ac: Consistenly use as_32_opt, as_64_opt instead of
	as_ix86_gas_{32,64}_opt or hardcoded --64.
	<sparc*-*-*>: Simplify setting TLS test code.
	* configure: Regenerate.

2026-01-27  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (fw_as_opt): Set.
	Replace --fatal-warnings by $fw_as_opt.
	(tls_as_opt): Remove --fatal-warnings.
	(gcc_cv_as_tls): Use $fw_as_opt.
	* configure: Regenerate.

2026-01-27  Richard Biener  <rguenther@suse.de>

	PR ipa/116296
	* ipa-modref-tree.cc (modref_access_node::contains): Use
	poly_offset_int for the param offset difference and the
	overlap computation.

2026-01-27  Richard Biener  <rguenther@suse.de>

	PR debug/123376
	* dwarf2out.cc (tree_add_const_value_attribute): Walk all
	initializers for early mangling of referenced decls.
	(mangle_referenced_decls): Also walk subtrees of CONSTRUCTORS.

2026-01-27  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123799
	* tree-ssa-forwprop.cc (simplify_vector_constructor): Pun
	conversion element type with integer type.

2026-01-27  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/123791
	* config/aarch64/aarch64.cc (aarch64_cannot_force_const_mem):
	Always return true for symbols and labels except for large model.
	(aarch64_select_rtx_section): Force .rodata for constants only.

2026-01-27  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/123792
	* config/aarch64/aarch64.md (aarch64_<optab>_reg_minus<mode>3):
	Add support for invert in shift count.

2026-01-27  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (gcn): Require Newlib 4.6.0+, replacing 4.3.0+
	requirement with long list of recommended fixes up to post-4.5.0.

2026-01-27  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122749
	* tree-ssa-math-opts.cc (convert_mult_to_fma_1, convert_mult_to_fma):
	Unwrap converts around addend.

2026-01-26  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123820
	* gimple-ssa-strength-reduction.cc (create_add_on_incoming_edge): Use
	the correct type for the stride (lhs if non-pointer).

2026-01-26  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR middle-end/123709
	* final.cc (output_asm_operand_names): Skip over
	opnum which is MAX_RECOG_OPERANDS (invalid).
	(output_asm_insn): Increase opoutput and oporder size
	by 1. For out of range operands, set the opnum to
	MAX_RECOG_OPERANDS.

2026-01-26  Filip Kastl  <fkastl@suse.cz>

	* doc/invoke.texi: Document --param auto-profile-reorder-only.
	* params.opt: Fix spelling.

2026-01-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/122474
	* tree-vectorizer.h (vect_reduc_info_s::neutral_op): New.
	(VECT_REDUC_INFO_NEUTRAL_OP): New.
	* tree-vect-loop.cc (vectorizable_reduction): Adjust condition
	guarding the check for .VEC_SHL_INSERT.

2026-01-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123755
	* tree-vect-stmts.cc (vectorizable_call): Fixup LEN masking
	of unconditional but possibly trapping calls.

2026-01-26  Victor Do Nascimento  <victor.donascimento@arm.com>

	PR tree-optimization/123657
	* tree-vect-loop.cc (vect_analyze_loop_form): Add
	chrec_dont_know check.

2026-01-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123794
	* tree-vect-slp.cc (vect_remove_slp_scalar_calls): Unlink
	VOPs for all calls.

2026-01-26  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	PR tree-optimization/123628
	* tree-if-conv.cc (if_convertible_simdclone_stmt_p): New.
	(if_convertible_stmt_p, predicate_statements): Use it.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	* gcc-urlifier.cc (test_gcc_urlifier): Match either positive
	or negative option URLS.

2026-01-25  Roger Sayle  <roger@nextmovesoftware.com>

	PR middle-end/122348
	* expr.cc (store_constructor): Ignore fields where DECL_SIZE
	is NULL_TREE, i.e. flexible array members.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	* common.opt.urls: Regenerated.
	* config/alpha/alpha.opt.urls: Regenerated.
	* config/arc/arc.opt.urls: Regenerated.
	* config/arm/arm.opt.urls: Regenerated.
	* config/avr/avr.opt.urls: Regenerated.
	* config/bpf/bpf.opt.urls: Regenerated.
	* config/cris/cris.opt.urls: Regenerated.
	* config/lynx.opt.urls: Regenerated.
	* config/m68k/m68k.opt.urls: Regenerated.
	* config/mcore/mcore.opt.urls: Regenerated.
	* config/mingw/cygming.opt.urls: Regenerated.
	* config/mips/mips.opt.urls: Regenerated.
	* config/mips/sde.opt.urls: Regenerated.
	* config/mmix/mmix.opt.urls: Regenerated.
	* config/nvptx/nvptx.opt.urls: Regenerated.
	* config/rs6000/linux64.opt.urls: Regenerated.
	* config/rs6000/rs6000.opt.urls: Regenerated.
	* config/rs6000/sysv4.opt.urls: Regenerated.
	* config/sh/sh.opt.urls: Regenerated.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	* doc/invoke.texi (Option Summary): Fix whitespace in @gccoptlist
	tables.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/cppopts.texi: Add missing @opindex entries for
	-fno-* options.
	* doc/invoke.texi: Likewise.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/cppwarnopts.texi: Add missing @opindex entries for
	-Wno-* options.
	* doc/invoke.texi: Likewise.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/cppdiropts.texi: Document -imultiarch.
	* doc/invoke.texi (Option Summary) <Optimization Options>: Add
	-flto-toplevel-asm-heuristics.
	<Program Instrumentation Options>: Remove -fbounds-check.
	<Directory Options>: Add -imultiarch.
	<ARC Options>: Add -mbitops, -mcmem, -munaligned-access.
	<ARM Options>: Add -mvectorize-with-neon-quad and
	-mvectorize-with-neon-double.
	<AVR Options>: Add -mrmw and -mstrict-X.
	<CRIS Options>: Fix typo in -mmax-stackframe.
	<Cygwin and MinGW Options>: Add -muse-libstdc-wrappers.
	<M680x0 Options>: Add several missing CPU options, plus -mxtls.
	<MIPS Options>: Add -mno-data-in-code and -mcode-xonly.
	<MMIX Options>: Add mset-data-start, -mset-program-start, and
	-mno-set-program-start.
	<Nvidia PTX Options>: Add -msoft-stack-reserve-local.
	<RS/6000 and PowerPC Options>: Add -mprofile-kernel, -mbit-word,
	-mno-splat-word-constant, -mno-splat-float-constant,
	-mno-ieee128-constant, and -mno-warn-altivec-long.
	(Optimization Options): Document -flto-toplevel-asm-heuristics.
	(ARC Options): Document -mbitops and -mcmem.
	(ARM Options): Add index entries for mbe32,
	m[no-]fix-cortex-a57-aes-1742098, m[no-]fix-cortex-a72-aes-1655431.
	Document -mvectorize-with-neon-quad and -mvectorize-with-neon-double.
	(AVR Options): Document -mpmem-wrap-around.
	(CRIS Options): Fix typo in -mmax-stackframe.
	(Cygwin and MinGW Options): Document -muse-libstdc-wrappers.
	(DEC Alpha Options): Fix typo in -mfp-regs.
	(eBPF Options): Add @opindex for -mframe-limit.
	(HPPA Options): Fix typos in -mno-disable-fpregs and -mno-gas
	index entries.
	(m680x0 Options): Document -m68302, -m68332, -m68851, and -mfidoa.
	Document -mnoshort and -mnortd aliases.  Document -mxtls.
	(MCore Options): Fix typos in -m[no-]relax-immediates.
	(MIPS Options): Document -mno-data-in-code and -mcode-xonly.
	(MMIX Options): Document -mset-data-start, -mset-program-start, and
	-mno-set-program-start.
	(Nvidia PTX Options): Document -msoft-stack-reserve-local.
	(RS/6000 and PowerPC Options): Document -mprofile-kernel,
	-mbit-word, -msplat-word-constant, -msplat-float-constant,
	-mieee128-constant, and -mwarn-altivec-long.
	(SH Options): Add index entry for -m2e.  Document -m4-400.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* common.opt (fbounds-check): Mark as Undocumented, expand comments
	to explain why.
	* config/frv/frv.opt (msched-lookahead=): Mark unused option as
	Undocumented.
	* config/m68k/m68k.opt (m68851): Add RejectNegative.
	* config/nvptx/nvptx.opt (minit-regs=): Mark as Undocumented.  It's
	not currently documented and seems to have been introduced as a
	stopgap to experiment with different implementation strategies.
	* config/rs6000/476.opt (mpreserve-link-stack): Mark as Undocumented.
	It seems to be an internal option that is enabled by default on the
	cpu that can benefit from it.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* common.opt (gtoggle): Mark RejectNegative.
	* doc/invoke.texi (Option Summary) <Debugging Options>: Remove
	redundant -gno- forms from the list.
	(Debugging Options): Add @opindex for -gno- option forms.
	Copy-edit option descriptions to avoid future tense and use of
	implementor jargon.

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/67300
	* common.opt (foffload-abi, foffload-abi-host-opts): Mark
	"Undocumented".

2026-01-25  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/invoke.texi (Option Summary) <LynxOS Options>: New.
	(LynxOS Options): New section.

2026-01-24  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123803
	* gimple-ssa-strength-reduction.cc (replace_rhs_if_not_dup): For
	pointer lhs use sizetype.

2026-01-23  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123780
	* config/riscv/vector.md: Correct output template.

2026-01-23  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123767
	* tree-vect-stmts.cc (vectorizable_store): Only scale offset
	once.
	(vectorizable_load): Ditto.

2026-01-23  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123778
	* genmatch.cc (parser::parse_expr): Peek on the next
	token after eating the `!` or `^`.
	* match.pd (`(op (cnd @0 @1 @2) @3)`, `(op @3 (cnd @0 @1 @2))`):
	Add the type to resulting op.

2026-01-23  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/120258
	PR tree-optimization/106883
	* gimple-ssa-strength-reduction.cc (replace_mult_candidate): Allow for
	basis_name and bump_tree not to be the same type as the lhs.
	Rewrite added multiply for undefined overflow.
	(create_add_on_incoming_edge): Allow for init
	to be a different type from the wanted type.
	Rewrite added add for undefined overflow.
	(replace_rhs_if_not_dup): Rewrite replaced stmts
	for undefined overflow.
	(replace_one_candidate): Allow for basis_name and
	rhs2 to be a different type from lhs.

2026-01-23  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/106883
	* gimple-ssa-strength-reduction.cc (create_add_on_incoming_edge): Rewrite
	the new addition on the edge too.

2026-01-23  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* gimple-ssa-strength-reduction.cc (introduce_cast_before_cand): Use
	gimple_convert instead of manually creating the gimple_assign.

2026-01-23  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/121347
	PR tree-optimization/106883
	* gimple-ssa-strength-reduction.cc (insert_initializers): Rewrite
	newly inserted statements for undefinedness (overflow).

2026-01-23  Peter Bergner  <bergner@tenstorrent.com>

	PR target/123492
	* config/riscv/riscv-cores.def (RISCV_CORE): Add zvfbfmin to
	tt-ascalon-d8.

2026-01-23  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123776
	* gimple-fold.cc (gimple_fold_partial_load_store): Copy
	the vdef from the old statement to the new statement of a
	load that is also a store to non gimple_reg.

2026-01-23  Richard Sandiford  <rdsandiford@googlemail.com>

	PR rtl-optimization/80357
	PR rtl-optimization/94014
	PR rtl-optimization/123144
	* haifa-sched.cc (model_recompute): Ignore dying uses of registers
	that are not assumed to be live.

2026-01-23  Richard Biener  <rguenther@suse.de>

	* match.pd ((convert (vec_cond ...))): Make sure the
	resulting vec_cond can be expanded.

2026-01-23  Richard Biener  <rguenther@suse.de>

	PR middle-end/123775
	* match.pd ((view_convert (vec_cond ...))): Make sure the
	resulting vec_cond can be expanded.

2026-01-23  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Revert:
	2026-01-20  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/123584
	* config/aarch64/aarch64-sve2.md (@aarch64_sve2_xar<mode>): Use
	aarch64_simd_rshift_imm predicate for rotate amount.

2026-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123703
	* builtins.cc (fold_builtin_abs): Return NULL_TREE if type is not
	integral.

2026-01-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123771
	* tree-vect-loop.cc (vectorizable_induction): Convert step
	also for VLA vectors.

2026-01-23  Richard Biener  <rguenther@suse.de>

	* config/i386/i386.cc (ix86_vector_costs::finish_cost):
	Avoid selecting masked epilogs for in-order reductions.

2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/sse.md (avx2_vbroadcasti128_<mode>): Constraint
	alternative 0 with jm and add gpr16 attr to avoid egpr usage.

2026-01-22  Richard Earnshaw  <rearnsha@arm.com>

	PR target/123742
	* config/arm/neon.md (*smin<mode>3_neon): Renamed to ...
	(*smin<VDQWH:mode>3_neon): ... this.  Add HFmode support.
	(*smax<mode>3_neon): Renamed to ...
	(*smax<VDQWH:mode>3_neon): ... this.  Add HFmode support.

2026-01-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123741
	* tree-vect-stmts.cc (vectorizable_store): Add missing check
	on loop vectorization.

2026-01-22  Jonathan Wakely  <jwakely@redhat.com>

	* tree-vrp.cc (remove_unreachable::fully_replaceable): Fix typo
	in comment.

2026-01-22  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123731
	* tree-ssa-forwprop.cc (simplify_vector_constructor): Handle nop
	conversion between during extraction.

2026-01-22  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/122869
	* config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
	Remove
	* config/riscv/riscv-vector-builtins.cc (function_expander::use_contiguous_load_insn):
	Use new helper.
	(function_expander::prepare_contiguous_load_insn): New helper.
	(function_expander::use_fof_load_insn): New function to emit FoF
	loads.
	* config/riscv/riscv-vector-builtins.h: Declare new functions.

2026-01-22  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR target/123279
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
	Add VECTOR_EXT_NO_XTHEAD.
	(vlm): Move to VECTOR_EXT_NO_XTHEAD.
	(vsm): Ditto.
	(vzext): Ditto.
	(vsext): Ditto.
	(vaaddu): Ditto.
	(vaadd): Ditto.
	(vasubu): Ditto.
	(vasub): Ditto.
	(vfrsqrt7): Ditto.
	(vfrec7): Ditto.
	(vfrec7_frm): Ditto.
	(vfslide1up): Ditto.
	(vfslide1down): Ditto.
	(vluxei8): Ditto.
	(vluxei16): Ditto.
	(vluxei32): Ditto.
	(vluxei64): Ditto.
	(vsuxei8): Ditto.
	(vsuxei16): Ditto.
	(vsuxei32): Ditto.
	(vsuxei64): Ditto.
	(vluxseg): Ditto.
	(vsuxseg): Ditto.
	(vrgatherei16): Ditto.
	(vlseg): Keep.
	(vsseg): Keep.
	(vlsseg): Keep.
	(vssseg): Keep.
	(vloxseg): Keep.
	(vsoxseg): Keep.
	(vlsegff): Keep.
	* config/riscv/riscv-vector-builtins.cc (GTY): Split
	registered_functions into multiple partitions.
	(is_fractional_lmul): New function.
	(xthvector_unsupported_p): Ditto.
	(get_builtin_partition): Ditto.
	(function_builder::add_function): Use new functions.
	(lookup_registered_function): Ditto.
	(builtin_decl): Use lookup_registered_function.
	(gimple_fold_builtin): Ditto.
	(expand_builtin): Ditto.
	(check_builtin_call): Ditto.
	(resolve_overloaded_builtin): Ditto.
	* config/riscv/riscv-vector-builtins.h (enum required_ext):
	(enum rvv_builtin_partition): New enum.
	(required_ext_to_isa_name): Add NO_XTHEAD.
	(required_extensions_specified): Ditto.
	* config/riscv/riscv-vector-switch.def (ENTRY): Remove
	XTheadVector.
	(TUPLE_ENTRY): Ditto.
	* config/riscv/riscv.cc (riscv_expand_mult_with_const_int): Fix
	whitespace.
	(riscv_legitimize_poly_move): Ditto.
	(riscv_vector_fractional_lmul_p): New function.
	(riscv_validate_vector_type): Use new function.

2026-01-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123755
	* tree-vect-stmts.cc (vectorizable_call): Register mask when
	the call could trap.

2026-01-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123756
	* tree-vect-loop.cc (vect_transform_reduction): Remove
	bogus assert.

2026-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123736
	* tree-ssa-loop-unswitch.cc (hoist_guard): Guard dump message
	on dump_file && (dump_flags & TDF_DETAILS) condition.

2026-01-22  David Malcolm  <dmalcolm@redhat.com>

	PR diagnostics/122622
	* diagnostics/paths-output.cc: Include "diagnostics/file-cache.h".
	(event_range::print_as_text): Generalize the fallback logic for
	special locations to also cover the case where source-printing
	will fail, and show the location for that case.
	(event_range::print_as_html): Likewise.
	(event_range::can_print_source_p): New.

2026-01-22  liuhongt  <hongtao.liu@intel.com>

	PR target/123631
	* config/i386/i386-expand.cc (ix86_vector_duplicate_value):
	Don't force CONST_INT to reg !TARGET_PREFER_BCST_FROM_INTEGER,
	force it to mem instead.
	* config/i386/i386.h (TARGET_PREFER_BCST_FROM_INTEGER): New macro.
	* config/i386/x86-tune.def
	(X86_TUNE_PREFER_BCST_FROM_INTEGER): New tune.

2026-01-21  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/122781
	* config/s390/vector.md: Don't emulate vec_cmpgtu for 128-bit
	integers for VXE3.

2026-01-20  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR rtl-optimization/123380
	* combine.cc (gen_lowpart_for_combine): Don't try to create a
	paradoxical SUBREG if it's going to be rejected by validate_subreg.

2026-01-20  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/123626
	* config/riscv/vector.md (vxrm_mode): Handle CALL_INSNs, which set
	the attribute to the new VXRM_MODE_CLOBBER state.
	* config/riscv/riscv.cc (riscv_emit_mode_set): Don't emit code when
	VXRM's state changes to VXRM_MODE_CLOBBER.

2026-01-20  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/123314
	* gimple-range.cc (gimple_ranger::range_on_entry): Do not check
	ranger cache for an SSA_NAME with no BB.
	(gimple_ranger::prefill_stmt_dependencies): Stop filling
	dependencies when an out-of IL name is encountered.

2026-01-20  supers1ngular  <supers1ngular@baylibre.com>

	* doc/extend.texi: Swap samp fields to fix overfull hbox.
	* doc/invoke.texi: Ditto.

2026-01-20  Giuseppe D'Angelo  <giuseppe.dangelo@kdab.com>

	PR c++/123639
	* doc/invoke.texi: Add @item for -Wsfinae-incomplete.

2026-01-20  Nathan Sidwell  <nathan@acm.org>

	* diagnostics/context.cc (context::action_after_output): Print
	invocation on ICE.

2026-01-20  David Malcolm  <dmalcolm@redhat.com>

	PR sarif-replay/123056
	* libsarifreplay.cc (struct embedded_link): Move decl earlier.
	(sarif_replayer::append_embeddded_link): New.
	(sarif_replayer::make_plain_text_within_result_message): Move the
	link-replay logic to the above, and skip the link part of
	intra-sarif links.

2026-01-20  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (TARGET_SETJMP_PRESERVES_NONVOLATILE_REGS_P):
	Return true when WITH_AVRLIBC.

2026-01-20  Alfie Richards  <alfie.richards@arm.com>

	* config/aarch64/aarch64.md: Update comment.
	* config/aarch64/aarch64-simd.md: Change comment to refer to
	aarch64.md.
	* config/aarch64/aarch64-sme.md: Likewise.
	* config/aarch64/aarch64-sve.md: Likewise.
	* config/aarch64/aarch64-sve2.md: Likewise.
	* config/aarch64/aarch64-sve-builtins.def: Update comment.
	* config/aarch64/aarch64-sve-builtins-base.def: Update to refer
	to aarch64-sve-builtins.def.
	* config/aarch64/aarch64-sve-builtins-sme.def: Likewise.
	* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.

2026-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/123724
	* config/aarch64/aarch64.cc (aarch64_possible_by_lane_insn_p): Ignore
	debug stmts.

2026-01-20  Roger Sayle  <roger@nextmovesoftware.com>

	PR rtl-optimization/123585
	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
	<case VEC_SELECT>: Correct gcc_assert when optimizing a vec_select
	of a vec_select with differing vector lengths.

2026-01-20  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/123584
	* config/aarch64/aarch64-sve2.md (@aarch64_sve2_xar<mode>): Use
	aarch64_simd_rshift_imm predicate for rotate amount.

2026-01-20  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/123584
	* config/aarch64/aarch64-simd.md (aarch64_xarqv2di): Leave zero
	rotate amounts as zero during expansion.
	(*aarch64_xarqv2di_insn): Account for zero rotate amounts.  Print #
	in rotate immediate.

2026-01-20  Prachi Godbole  <pgodbole@nvidia.com>

	* flag-types.h (enum lto_locality_heuristics): New enum.
	* ipa-locality-cloning.cc (struct templ_info): New struct.
	(struct locality_info): Add templ_info field.
	(templ_hash_map): New hash_map.
	(callee_templ_cmp): Ditto.
	(static_profile_templ_cmp): Ditto.
	(sort_templ_hashes_cmp): Ditto.
	(order_templ_hashes): Ditto.
	(locality_dc_template_p): Ditto.
	(populate_templ_info): Ditto.
	(create_locality_info): Call populate_templ_info.
	(partition_callchain): Call callee_templ_cmp.
	(locality_determine_static_order): Populate and sort templ_hash_map.
	(locality_partition_and_clone): Handle lto_locality_heuristics.
	(lc_execute): Initialize templ_hash_map.
	* params.opt: New param.

2026-01-20  Prachi Godbole  <pgodbole@nvidia.com>

	* ipa-locality-cloning.cc (struct locality_callee_info): New struct.
	(struct locality_info): Ditto.
	(loc_infos): Ditto.
	(get_locality_info): New function.
	(sort_all_callees_default): Ditto.
	(callee_default_cmp): Ditto.
	(populate_callee_locality_info): Ditto.
	(populate_caller_locality_info): Ditto.
	(create_locality_info): Ditto.
	(adjust_recursive_callees): Access node_to_clone by reference.
	(inline_clones): Access node_to_clone and clone_to_node by reference.
	(clone_node_as_needed): Ditto.
	(accumulate_incoming_edge_frequency): Remove function.
	(clone_node_p): New function.
	(partition_callchain): Refactor the function.
	(is_entry_node_p): Call local_p ().
	(locality_determine_ipa_order): Call create_locality_info ().
	(locality_determine_static_order): Ditto.
	(locality_partition_and_clone): Update call to partition_callchain ()
	according prototype.
	(lc_execute): Allocate and free node_to_ch_info, node_to_clone,
	clone_to_node.

2026-01-20  Richard Biener  <rguenther@suse.de>

	PR middle-end/123697
	* gimple-fold.cc (gimple_fold_partial_load_store): Use an
	empty CTOR for a zero else value in .MASK_LOAD_LANES.

2026-01-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123729
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Set
	SSA_NAME_OCCURS_IN_ABNORMAL_PHI if the reduction flows
	across an abnomal edge.

2026-01-20  Richard Biener  <rguenther@suse.de>

	* tree-phinodes.h (phi_arg_index_from_use): Use gphi *.
	(phi_arg_edge_from_use): New helper composing
	phi_arg_index_from_use and gimple_phi_arg_edge.

2026-01-19  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR rtl-optimization/121787
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl): Adjust call to
	loop_optimizer_init to avoid making CFG changes.

2026-01-19  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/sol2.opt.urls: Regenerate.
	* config/darwin.opt.urls: Likewise.
	* config/dragonfly.opt.urls: Likewise.
	* config/freebsd.opt.urls: Likewise.
	* config/gnu-user.opt.urls: Likewise.
	* config/hpux11.opt.urls: Likewise.
	* config/i386/cygwin.opt.urls: Likewise.
	* config/mingw/mingw.opt.urls: Likewise.
	* config/netbsd.opt.urls: Likewise.
	* config/openbsd.opt.urls: Likewise.
	* config/rs6000/aix64.opt.urls: Likewise.
	* config/rtems.opt.urls: Likewise.

2026-01-19  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/sol2.h (CPP_SUBTARGET_SPEC): Remove.
	* config/sol2.opt (pthread): Ignore.
	(pthreads): Likewise.
	* config/i386/sol2.h (CPP_SPEC): Remove.
	(SUBTARGET_CPU_EXTRA_SPECS): Remove cpp_subtarget.
	* doc/invoke.texi (Solaris 2 Options, pthread): Remove.

2026-01-19  Jeff Law  <jeffrey.law@oss.qualcomm.com>
	    Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/113666
	* fold-const-call.cc (fold_const_vec_extract): New function.
	(fold_const_call, case CFN_VEC_EXTRACT): Call it.
	* match.pd (IFN_VEC_EXTRACT): Handle extraction from a uniform
	vector.

2026-01-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123061
	PR tree-optimization/123636
	* tree-ssa-loop-im.cc (fill_always_executed_in_1): Change
	outer-to-inner to inner-to-outer iteration.  Update inner
	loop state only when always executed in an immediately
	nested loop.

2026-01-19  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (GCN): gfx9-4-generic requires LLVM 20.

2026-01-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123602
	* tree-ssa-pre.cc (find_or_generate_expression): Do not
	generate references to abnormal SSA names.

2026-01-19  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config.gcc: Deprecate -m31.
	* doc/invoke.texi: Deprecate -m31.

2026-01-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123656
	* tree-vect-generic.cc (expand_vector_mult): Fix up alg_sub_factor
	handling.  Fix up formatting in alg_add_t_m2 handling.

2026-01-19  Richard Biener  <rguenther@suse.de>

	PR target/123603
	* config/i386/i386.opt (-param=ix86-vect-compare-costs=): Add.
	* config/i386/i386.cc (ix86_autovectorize_vector_modes): Honor it.
	* doc/invoke.texi (ix86-vect-compare-costs): Document.

2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/117575
	* config/loongarch/lasx.md: Modify the range of operand1.

2026-01-18  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123645
	* tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Rewrite
	the canonicalization of the args code based on e1/e2 being edges into
	the join block.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	* config/darwin.opt.urls: Regenerated.
	* config/dragonfly.opt.urls: Regenerated.
	* config/freebsd.opt.urls: Regenerated.
	* config/gnu-user.opt.urls: Regenerated.
	* config/hpux11.opt.urls: Regenerated.
	* config/i386/cygwin.opt.urls: Regenerated.
	* config/i386/i386.opt.urls: Regenerated.
	* config/mingw/mingw.opt.urls: Regenerated.
	* config/nds32/nds32.opt.urls: Regenerated.
	* config/netbsd.opt.urls: Regenerated.
	* config/nvptx/nvptx.opt.urls: Regenerated.
	* config/openbsd.opt.urls: Regenerated.
	* config/pru/pru.opt.urls: Regenerated.
	* config/riscv/riscv.opt.urls: Regenerated.
	* config/rl78/rl78.opt.urls: Regenerated.
	* config/rs6000/aix64.opt.urls: Regenerated.
	* config/rs6000/rs6000.opt.urls: Regenerated.
	* config/rs6000/sysv4.opt.urls: Regenerated.
	* config/rtems.opt.urls: Regenerated.
	* config/rx/rx.opt.urls: Regenerated.
	* config/s390/s390.opt.urls: Regenerated.
	* config/s390/tpf.opt.urls: Regenerated.
	* config/sh/sh.opt.urls: Regenerated.
	* config/sol2.opt.urls: Regenerated.
	* config/sparc/sparc.opt.urls: Regenerated.
	* config/v850/v850.opt.urls: Regenerated.
	* config/vax/vax.opt.urls: Regenerated.
	* config/vxworks.opt.urls: Regenerated.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/nds32/nds32.opt: Tidy documentation strings.
	(mbig-endian, mlittle-endian): Remove "Undocumented" flag since
	these are, in fact, documented.
	* doc/invoke.texi (Option Summary) <NDS32 Options>: Document
	-EB, -EL, -mabi, -mfloat-abi, -malways-align, -malign-functions,
	-mfp-as-gp, -mext-dsp, -mext-fpu-fma, -mext-fpu-sp, -mext-fpu-dp,
	-misr-vector-size, -misr-secure, -mcpu, -mconfig-fpu,
	-mconfig-mul, -mconfig-register-ports, -mrelax-hint,
	-msched-prolog-epilog, -mno-ret-in-naked-func, -malways-save-lp,
	-munaligned-access, and -minline-asm-r15.
	(NDS32 Options): Likewise.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/xtensa/uclinux.opt (elf2flt, elf2flt=): Mark as Undocumented.
	* config/xtensa/xtensa.opt (mlra): Likewise.
	* doc/invoke.texi (Option Summary) <Xtensa Options>: Remove
	redundant negative forms plus obsolete -mfused-madd option.
	(Xtensa Options): Likewise undocument -mfused-madd.  List
	negative form of -mforce-no-pic.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/i386/i386.opt (malign-functions): Mark undocumented/unused
	option as Undocumented.
	(malign-jumps): Likewise.
	(malign-loops): Likewise.
	(mbranch-cost, mforce-drap): Mark undocumented options likely
	intended for developer use only as Undocumented.
	(mstv): Correct sense of option in doc string.
	(mavx512cd): Remove extra "and" from doc string.
	(mavx512dq): Likewise.
	(mavx512bw): Likewise.
	(mavx512vl): Likewise.
	(mavx512ifma): Likewise.
	(mavx512bvmi): Likewise.
	* doc/invoke.texi (Options Summary) <x86 Options>: Add
	missing options.  Correct whitespace and re-wrap long lines.
	Remove -mthreads which is now classed as a MinGW option.
	(Cygwin and MinGW Options): Replace existing documentation of
	-mthreads with the more detailed text moved from x86 Options.
	(x86 Options): Move introductory text about ISA extensions before
	the individual options instead of after.  Document them all
	individually instead of as a group, and move immediately after
	-march/-mtune documentation.  Rewrap long lines.  Document
	interaction between SSE and AVX with -mfpmath=sse.  Move -masm
	documentation farther down instead of grouped with options
	affecting floating-point behavior.  Add missing @opindex
	entries.  Rewrite the -mdaz-ftz documentation.  Document
	-mstack-arg-probe.  Copy-editing.  Document -mstv.  Remove
	obsolete warning about -mskip-rax-setup in very old GCC versions.
	Rewrite the -mapx-inline-asm-use-gpr32 documentation.
	Document -mgather and -mscatter.  Split -miamcu documentation
	from -m32/-m64/etc.  Rewrite -munroll-only-small-loops documentation.
	Document -mdispatch-scheduler.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/invoke.texi (Option Summary) <VxWorks Options>: Add -mvthreads.
	(VxWorks Options): Likewise.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/vms/vms.opt (map): Mark as Undocumented.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/visium/visium.opt (menable-trampolines): Mark Undocumented.
	* doc/invoke.texi (Options Summary) <Visium Options>: Remove
	redundant -mno- option.
	(Visium Options): Copy-editing to put in active voice and add markup.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/vax/elf.opt (mno-asm-pic): Mark as Undocumented.
	* doc/invoke.texi (Option Summary) <VAX Options>: Add
	-mvaxc-alignment and -mqmath.
	(VAX Options): Likewise.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/v850/v850.opt: Copy-edit documentation strings.
	(mdebug): Make Undocumented.
	(mno-strict-align): Add RejectNegative.
	(mUS-bit-set): Make Undocumented.
	* doc/invoke.texi (Option Summary) <V850 Options>: Remove
	redundant -mno- forms from list.  Add missing entries.
	(V850 Options): Add @opindex for negative forms.  Combine
	entries for -mapp-regs and -mno-app-regs.  Document -msmall-sld,
	-mno-strict-align, and -mjump-tables-in-data-section.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/invoke.texi (Option Summary) <SPARC Options>: Remove
	redundant -mno- forms from the list.  Add -mptr32 and -mptr64.
	(SPARC Options): Document -mptr32 and -mptr64.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* doc/invoke.texi (Option Summary) <Solaris 2 Options>:
	Remove redundant negative option forms from list.  List both
	-pthread and -pthreads.
	(Solaris 2 Options): Index and list the negative forms here.
	Combine the two @table environments.  Document both -pthread
	and -pthreads.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/sh/sh.opt (mhitachi, mpadstruct): Mark obsolete options
	as Undocumented.
	* doc/invoke.texi (Option Summary) <SH Options>: Add missing
	entries for -m4-* and other options.  Remove redundant -mno- entries
	and obsolete options.  Add missing options -mfdpic, -mlra.
	(SH Options): Combine entries for -mrenesas and -mno-renesas.
	Index and list -mno- forms for other options that have them.
	Remove documentation for obsolete options -mpadstruct and
	-mfused-madd.  Add documentation for -mlra.  Copy-edit and wrap long
	lines throughout the section.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/s390/s390.opt (mbranch-cost): Mark as Undocumented.
	* config/s390/tpf.opt (mtpf-trace-hook-prologue-check=): Likewise.
	(mtpf-trace-hook-prologue-target=): Likewise.
	(mtpf-trace-hook-epilogue-check=): Likewise.
	(mtpf-trace-hook-epilogue-target=): Likewise.
	* doc/invoke.texi (Option Summary) <S/390 and zSeries Options>:
	Remove redundant -mno- entries and add missing options.  Make
	entries with arguments match the syntax in the main documentation.
	(S/390 and zSeries Options): Light copy-editing.  Wrap overly-long
	lines.  Add missing @opindex entries.  Add documention for
	-mmain, -mno-pic-data-is-text-relative, -mindirect-branch,
	-mindirect-branch-jump, -mindirect-branch-call,
	-mfunction-return, -mfunction-return-mem, -mfunction-return-reg,
	-mindirect-branch-table, -mfentry, -mrecord-mcount, -mnop-mcount,
	-mpreserve-args, and -munaligned-symbols.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/rx/rx.opt (mgcc-abi, mrx-abi): Mark as Undocumented.
	* doc/invoke.texi (Option Summary) <RX Options>: Remove redundant
	entries for -mno-forms, correct name of -msmall-data-limit option,
	add -mlra, clean up formatting.
	(RX Options): Minor copy-editing, add -mlra.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	* config/rs6000/darwin.opt (Waltivec-long-deprecated): Mark as
	Undocumented.
	(faltivec, ffix-and-continue, findirect-data): Likewise.
	* config/rs6000/rs6000.opt (mvrsave): Likewise.
	* config/rs6000/sysv4.opt (mno-toc, mtoc, mno-traceback): Likewise.
	(mshlib, mnewlib): Likewise.
	* doc/invoke.texi (Option Summary) <RS/6000 and PowerPC Options>:
	Document only one form of each option.  Add missing options.
	Correct whitespace.
	(RS/6000 and PowerPC Options): Separately document -mpowerpc-gpopt,
	-mpowerpc-gfxopt, -mpowerpc64, -mmfcrf, -mpopcntb, -mpopcntd,
	-mfprnd, -mcmpb, and -mhard-dfp and move their documentation after
	-mcpu=.  Remove documentation for -mtoc which is unimplemented.
	Add missing @opindex entries.  Minor copy-editing and whitespace
	fixes.

2026-01-17  Sandra Loosemore  <sloosemore@baylibre.com>

	PR other/122243
	PR target/71340
	* doc/invoke.texi (Option Summary) <RL78 Options>: Remove
	never-implemented -m64bit-doubles and -m32bit-doubles options.
	Add missing entries for -mrelax, -mes0, -mmul=rl78, -mcpu=rl78,
	and -mrl78.
	(RL78 Options): Likewise.  Add missing @opindex entries.
	Light copy-editing.

2026-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123513
	* tree.cc (valid_new_delete_pair_p): If new_name[3] or delete_name[3]
	is 'I', return false with *pcertain set to false rather than true.

2026-01-16  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* hierarchical_discriminator.cc (init_copyid_allocator): Walks the function
	body to find existing max copyids per location.
	(record_existing_copyid): New.

2026-01-16  Alice Carlotti  <alice.carlotti@arm.com>

	PR target/123460
	* config.gcc: Accept hyphens in aarch64 --with-arch extensions.

2026-01-16  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/123145
	* timevar.def (TV_ANALYZER_SUPERGRAPH): Rename to...
	(TV_ANALYZER_SUPERGRAPH_CREATION): ...this.
	(TV_ANALYZER_SUPERGRAPH_FIXUP_LOCATIONS): New.
	(TV_ANALYZER_SUPERGRAPH_SIMPLIFY): New.
	(TV_ANALYZER_SUPERGRAPH_SORTING): New.

2026-01-16  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/123092
	* lra-constraints.cc (lra_constraints): Push insn on processing
	stack after equivalence substitution.

2026-01-16  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR pch/110746
	* config/host-freebsd.cc: New file.
	* config.host <*-*-freebsd*>: Use it.
	* config/x-freebsd: New file.

2026-01-16  Martin Jambor  <mjambor@suse.cz>

	PR ipa/123412
	* ipa-cp.cc (devirtualization_time_bonus): Do add the indirect
	edge frequency at least once even for targets which cannot be
	inlined.

2026-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/123607
	* config/i386/i386.md (movhf_mask): Change constraint on
	match_operand 2's second alternative from 0C to 0.

2026-01-16  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/123521
	* config/loongarch/loongarch.cc
	(loongarch_expand_vector_init_same): Fixed a bug in the
	vector initialization section..

2026-01-16  David Guillen Fandos  <david@davidgf.net>

	* config/mips/mips.h (ISA_HAS_FMIN_FMAX): Add R5900;
	note that, R5900 is not IEEE754 fully compatiable.

2026-01-15  Marek Polacek  <polacek@redhat.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR c++/120775
	PR c++/123081
	PR c++/122634
	* attribs.cc (attribute_value_equal): Return false if either attribute
	is ATTR_UNIQUE_VALUE_P.
	(merge_attributes): Handle lists with ATTR_UNIQUE_VALUE_P values.
	* doc/invoke.texi: Document -freflection.
	* dwarf2out.cc (is_base_type) <case default>: Check
	TREE_CODE >= LAST_AND_UNUSED_TREE_CODE instead of is_cxx_auto.
	(gen_type_die_with_usage): For TREE_CODE >= LAST_AND_UNUSED_TREE_CODE
	trees use use DW_TAG_unspecified_type.
	* tree-core.h (struct tree_base): Update a comment.
	* tree.h (ATTR_UNIQUE_VALUE_P): Define.
	(BINFO_BASE_ACCESSES): Update the comment.

2026-01-15  Peter Damianov  <peter0x44@disroot.org>

	PR driver/123504
	* config/i386/cygming.h (EXTRA_DEFAULT_COMPILERS): Comment out
	.res spec to allow COFF files with .res extension to pass
	through to the linker.
	* config/aarch64/cygming.h (EXTRA_DEFAULT_COMPILERS): Likewise.

2026-01-15  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* ira-lives.cc (ira_implicitly_set_insn_hard_regs): Honor hard
	register constraints.
	* ira.cc (ira_setup_alts): Ditto.

2026-01-15  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* doc/extend.texi: Document current limitations of hard register
	constraints.
	* stmt.cc (parse_output_constraint): Reject multiple hard
	register constraints or a combination of hard register
	constraints and regular register constraints in one alternative.
	(parse_input_constraint): Ditto.

2026-01-15  Alfie Richards  <alfie.richards@arm.com>

	* config/aarch64/aarch64-simd.md: Add comment.
	* config/aarch64/aarch64-sme.md: Likewise.
	* config/aarch64/aarch64-sve-builtins-base.def: Likewise.
	* config/aarch64/aarch64-sve-builtins-sme.def: Likewise.
	* config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
	* config/aarch64/aarch64-sve-builtins.def: Likewise.
	* config/aarch64/aarch64-sve.md: Likewise.
	* config/aarch64/aarch64-sve2.md: Likewise.
	* config/aarch64/aarch64.md: Likewise.

2026-01-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/sparc/sparc.h (TARGET_SUN_TLS): Remove.
	* config/sparc/sol2.h (TARGET_SUN_TLS): Likewise.
	* config/sparc/sparc.cc (TARGET_ASM_OUTPUT_DWARF_DTPREL): Guard
	with HAVE_GNU_AS.
	(sparc_tls_got): Guard with !HAVE_GNU_AS.
	(sparc_legitimize_tls_address): Likewise.
	* config/sparc/sparc.md ("tls_delay_slot"): Likewise.
	("@tie_add<P:mode>"): Likewise.

2026-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR debug/121045
	* tree-pretty-print.h (dump_location): Add new dump_flags_t
	argument defaulted to TDF_NONE.
	* tree-pretty-print.cc (dump_location): Add flags argument.  Don't
	print discriminator if TDF_COMPARE_DEBUG bit is set in flags.
	(dump_block_node, dump_generic_node): Pass through flags to
	dump_location.
	* gimple-pretty-print.cc (dump_gimple_phi, pp_gimple_stmt_1,
	dump_implicit_edges): Likewise.
	(gimple_dump_bb_as_sarif_properties): Pass dump_flags to
	dump_location.
	* print-rtl.cc (rtx_writer::print_rtx_operand_code_L): If dump_flags
	has TDF_COMPARE_DEBUG bit set, don't print discriminators.

2026-01-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/i386/sol2.h [!HAVE_GNU_AS] (ASM_CPU32_DEFAULT_SPEC): Use -m32.
	(ASM_CPU64_DEFAULT_SPEC): Use -m64.

2026-01-15  Josef Melcr  <josef.melcr@suse.com>

	PR ipa/122852
	* cgraph.cc (cgraph_node::verify_node): Verify that callback
	edges are unreachable when the carrying edge is unreachable.
	* ipa-fnsummary.cc (redirect_to_unreachable): Redirect callback
	edges to unreachable when redirecting the carrying edge.

2026-01-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* configure.ac (gcc_cv_as_sparc_ua_pcrel): Remove.
	(gcc_cv_as_sparc_ua_pcrel_hidden): Likewise.
	* configure: Regenerate.
	* config.in: Regenerate.
	* config/sparc/sparc.h (ASM_PREFERRED_EH_DATA_FORMAT): Remove
	!HAVE_AS_SPARC_UA_PCREL, !HAVE_AS_SPARC_UA_PCREL_HIDDEN support.
	* config/sparc/sol2.h (ASM_PREFERRED_EH_DATA_FORMAT): Remove.
	* config/sparc/sparc.cc (TARGET_ASM_OUTPUT_DWARF_DTPREL): Remove
	HAVE_AS_SPARC_UA_PCREL guard.

2026-01-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/sparc/sparc.h (TARGET_TLS): Define as HAVE_AS_TLS.
	Update comment.
	(TARGET_SUN_TLS): Define as 0.
	(TARGET_GNU_TLS): Remove.
	* config/sparc/freebsd.h (TARGET_SUN_TLS): Remove.
	(TARGET_GNU_TLS): Remove.
	* config/sparc/linux.h: Likewise.
	* config/sparc/linux64.h: Likewise.
	* config/sparc/sol2.h (TARGET_SUN_TLS): Redefine as 1.
	Guard with HAVE_AS_TLS && !HAVE_GNU_AS.
	(TARGET_GNU_TLS): Remove.
	* config/sparc/sparc.cc (TARGET_ASM_OUTPUT_DWARF_DTPREL): Use
	!TARGET_SUN_TLS in guard.
	with !TARGET_SUN_TLS only.
	* config/sparc/sparc.md ("tls_delay_slot"): Guard with
	!TARGET_SUN_TLS.

2026-01-15  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR target/38118
	* config/sparc/sol2.h (ASM_OUTPUT_ALIGNED_COMMON): Remove.

2026-01-15  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Assign
	hierarchical discriminators for loop unrolling.
	* cfgloopmanip.h (DLTHE_RECORD_HIERARCHICAL_DISCRIMINATOR): New flag.
	* tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Pass flag
	to enable hierarchical discriminator assignment.
	(try_peel_loop): Likewise.

2026-01-15  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* gimple-loop-versioning.cc (loop_versioning::version_loop): Assign
	copyid discriminators to distinguish different loop versions.

2026-01-15  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* tree-vect-loop-manip.cc (vect_loop_versioning): Assign copyid
	discriminators for vectorized and scalar loop versions.
	* tree-vect-loop.cc (vect_transform_loop): Assign copyid
	discriminators for vectorized and scalar loop versions.

2026-01-15  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* Makefile.in: Add hierarchical_discriminator.o to OBJS.
	* hierarchical_discriminator.cc: New file.
	* hierarchical_discriminator.h: New file.
	* function.h (copyid_alloc): New.
	* input.cc (location_with_discriminator_components): New function.
	(get_discriminator_components_from_loc): Likewise.
	* input.h (DISCR_BASE_BITS): New constant.
	(DISCR_MULTIPLICITY_BITS): Likewise.
	(DISCR_COPYID_BITS): Likewise.
	(DISCR_UNUSED_BITS): Likewise.
	(DISCR_BASE_MASK): Likewise.
	(DISCR_MULTIPLICITY_MASK): Likewise.
	(DISCR_COPYID_MASK): Likewise.
	(DISCR_BASE_SHIFT): Likewise.
	(DISCR_MULTIPLICITY_SHIFT): Likewise.
	(DISCR_COPYID_SHIFT): Likewise.
	(DISCR_BASE_MAX): Likewise.
	(DISCR_MULTIPLICITY_MAX): Likewise.
	(DISCR_COPYID_MAX): Likewise.
	(location_with_discriminator_components): New function declaration.
	(get_discriminator_components_from_loc): Likewise.

2026-01-15  DengJianbo  <dengjianbo@loongson.cn>

	* config/loongarch/loongarch.md: Remove condition in template
	movdi_symbolic_off64.

2026-01-14  Peter Bergner  <bergner@tenstorrent.com>

	PR target/123092
	* config/riscv/constraints.md (ZD): Disable when xmipscbop is disabled.

2026-01-14  Martin Jambor  <mjambor@suse.cz>

	PR ipa/123542
	* ipa-cp.cc (ipa_value_from_jfunc): Always use
	ipacp_value_safe_for_type.  Bail out if parm_type is NULL.

2026-01-14  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/121240
	* config/aarch64/aarch64.md (mov<mode>): Expand FP immediates early.
	* config/aarch64/aarch64.cc (aarch64_select_rtx_section): Force
	immediates <= 8 bytes to constdata.
	(aarch64_rtx_costs): Increase cost of CONST_DOUBLE loaded from memory.

2026-01-14  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/114528
	* config/aarch64/aarch64.cc (aarch64_check_mov_add_imm12):
	New function to check and emit MOV+ADD/SUB immediates.
	(aarch64_internal_mov_immediate): Add support for MOV+ADD/SUB
	immediates.

2026-01-14  Tejas Belagod  <tejas.belagod@arm.com>

	PR middle-end/123392
	* cfgexpand.cc (expand_debug_expr): Handle variable-length initializer
	for CONSTRUCTOR.

2026-01-14  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/123115
	* defaults.h (EH_RETURN_DATA_REGNO): Add void (N) to the macro
	definition inside of a comma expression before INVALID_REGNUM.

2026-01-14  Jakub Jelinek  <jakub@redhat.com>

	PR target/120250
	* combine.cc (recog_for_combine): Don't try to put SET_SRC
	into a constant pool if SET_DEST is pc_rtx.

2026-01-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123190
	* tree-vectorizer.h (vect_load_store_data): Add n_loads member.
	* tree-vect-stmts.cc (get_load_store_type): Record the
	number of required loads for permuted loads.
	(vectorizable_load): Make use of this when costing loads
	for VMAT_CONTIGUOUS[_REVERSE].

2026-01-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123190
	* tree-vect-loop.cc (vect_analyze_loop_costing): Allow
	vectorizing loops with a single scalar iteration iff the
	vectorization factor is 1.

2026-01-14  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/123544
	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
	<case AND>: Don't canonicalize (subreg (lshiftrt (x cnt)) low) into
	(lshiftrt (subreg x low) cnt) if the SUBREG is paradoxical.

2026-01-14  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	* auto-profile.cc: (string_table::filenames): New method.
	(function_instance::timestamp_): New member.
	(function_instance::timestamp): New accessor for timestamp_ member.
	(function_instance::set_timestamp): New function.
	(function_instance::prop_timestamp): Likewise.
	(function_instance::prop_timestamp_1): Likewise.
	(function_instance::function_instance): Initialize timestamp_ to 0.
	(function_instance::read_function_instance): Adjust prototype by
	replacing head_count with toplevel param with default value true, and
	stream in head_count and timestamp values from gcov file.
	(autofdo::timestamp_info_map): New std::map.
	(autofdo_source_profile::get_function_instance_by_decl): New argument
	filename with default value NULL.
	(autofdo_source_profile::read): Populate timestamp_info_map and
	propagate timestamp to inlined instances from toplevel function.
	(afdo_annotate_cfg): Assign node->tp_first_run based on
	timestamp_info_map and bail out of annotation if
	param_auto_profile_reorder_only is enabled.
	* params.opt: New param auto-profile-reorder-only.

2026-01-14  Lili Cui  <lili.cui@intel.com>

	* config/i386/x86-tune.def (X86_TUNE_ALIGN_TIGHT_LOOPS):
	disable tight loop alignment for m_CORE_ATOM.

2026-01-14  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>

	* match.pd: remove 'fold_overflow_warning' references.
	* tree.h (TYPE_OVERFLOW_UNDEFINED): remove note telling
	that we must use warn_strict_overflow for every optimization
	based on TYPE_OVERFLOW_UNDEFINED.

2026-01-13  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* match.pd (`(T1)(a bit_op (T2)b)`): Remove redundant
	type checks.

2026-01-13  Pengxuan Zheng  <pengxuan.zheng@oss.qualcomm.com>

	PR tree-optimization/123109
	* fold-const.cc (fold_binary_loc): Remove (X >> C) NE/EQ 0 -> X LT/GE 0
	folding.
	* match.pd (`(X >> C) NE/EQ 0 -> X LT/GE 0`): New pattern.

2026-01-13  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/119402
	* match.pd (`(a*zero_one_valued_p) & b`): New pattern.

2026-01-13  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/123312
	* ifcvt.cc (noce_try_cond_zero_arith): Rename to ...
	(noce_try_cond_arith): This. For AND try `cmp ? a : -1`
	also to see which one cost less.
	(noce_process_if_block): Handle the rename.

2026-01-13  Jonathan Yong  <10walls@gmail.com>

	* config/i386/winnt-utf8.manifest: enable longPathAware.

2026-01-13  Jonathan Yong  <10walls@gmail.com>

	PR driver/108865
	* config/i386/winnt-utf8.manifest: correct XML tags

2026-01-13  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR tree-optimization/123530
	* match.pd (reassociating xor to enable rotations): Verify constants
	fit into a uhwi before trying to extract them as a uhwi.

2026-01-13  Richard Biener  <rguenther@suse.de>

	PR middle-end/123573
	* fold-const.cc (fold_vec_perm): Actually check, not assert,
	that input and output vector element numbers agree.
	* match.pd (vec_perm @0 @1 @2): Make sure element numbers
	are the same when folding to an input vector and wrap that
	inside a VIEW_CONVERT_EXPR.

2026-01-13  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123525
	* tree-ssa-forwprop.cc (simplify_vector_constructor): Use
	converted source type for conversion bit field ref.

2026-01-13  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123301
	* tree-if-conv.cc (convert_scalar_cond_reduction):
	Disallow vector types.

2026-01-13  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR rtl-optimization/123501
	PR rtl-optimization/123444
	* rtlanal.cc (nonzero_bits1): Use operand mode instead of
	operation mode.

2026-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR libstdc++/123396
	* configure.ac (gcc_cv_ld_use_as_needed_ldscript): New test.
	(USE_LD_AS_NEEDED_LDSCRIPT): New AC_DEFINE.
	* gcc.cc (LINK_LIBATOMIC_SPEC): Use "-latomic_asneeded" instead
	of LD_AS_NEEDED_OPTION " -latomic " LD_NO_AS_NEEDED_OPTION
	if USE_LD_AS_NEEDED_LDSCRIPT is defined.
	(init_gcc_specs): Use "-lgcc_s_asneeded" instead of
	LD_AS_NEEDED_OPTION " -lgcc_s " LD_NO_AS_NEEDED_OPTION
	if USE_LD_AS_NEEDED_LDSCRIPT is defined.
	* config.in: Regenerate.
	* configure: Regenerate.

2026-01-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123539
	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
	Use the compute vectype to pun down to smaller or element
	size for by-element reductions.

2026-01-13  Kito Cheng  <kito.cheng@sifive.com>

	* tree-ssa-sccvn.cc (vn_walk_cb_data::push_partial_def): Use
	build_bitint_type for BITINT_TYPE when maxsizei exceeds
	MAX_FIXED_MODE_SIZE.

2026-01-13  Kito Cheng  <kito.cheng@sifive.com>

	PR target/117581
	* config/riscv/riscv.cc (riscv_bitint_type_info): New function.
	(TARGET_C_BITINT_TYPE_INFO): Define.

2026-01-13  liuhongt  <hongtao.liu@intel.com>

	PR target/123484
	* config/i386/mmx.md (divv4hf3): Add TARGET_MMX_WITH_SSE to
	the condition.
	(cmlav4hf4): Ditto.
	(cmla_conjv4hf4): Ditto.
	(cmulv4hf3): Ditto.
	(cmul_conjv4hf3): Ditto.

2026-01-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/122845
	PR tree-optimization/122843
	* match.pd (`(T1)(a bit_op (T2)b)`): Also
	simplify if T1 is the same type as b and T2 is wider
	type than T1.

2026-01-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123528
	* tree-vect-patterns.cc (vect_recog_bool_pattern): Restore
	INTEGRAL_TYPE_P check but also allow SCALAR_FLOAT_TYPE_P.

2026-01-12  Martin Jambor  <mjambor@suse.cz>

	PR ipa/123543
	* ipa-cp.cc (propagate_bits_across_jump_function): Fix test for
	recipient_only_p.

2026-01-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/122830
	PR tree-optimization/122824
	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Generalize
	aggregate copy handling when no variable offsets are
	involved.

2026-01-12  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Only tentatively
	accumulate extra_off when tentatively consuming components
	during aggregate copy handling.

2026-01-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/123175
	* match.pd (vec_perm @0 @1 @2): Fixup for inputs having a
	different number of elements than the result.
	* tree-vect-generic.cc (lower_vec_perm): Likewise.

2026-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/123523
	* simplify-rtx.cc (simplify_const_binary_operation): Use
	DImode for VOIDmode shift and truncation counts if int_mode
	is narrower than HOST_BITS_PER_WIDE_INT rather than
	word_mode if int_mode it is narrower than BITS_PER_WORD.

2026-01-12  Dhruv Chawla  <dhruvc@nvidia.com>

	* auto-profile.cc (autofdo_source_profile::offline_unrealized_inlines):
	Add missing check for in_map.

2026-01-11  Michal Jires  <mjires@suse.cz>

	* asm-toplevel.cc (mark_fragile_ref_by_asm):
	Add marked_local to handle symbol as local.
	(ipa_asm_heuristics): New.
	(class pass_ipa_asm): New.
	(make_pass_ipa_asm_lgen): New.
	(make_pass_ipa_asm_wpa): New.
	* common.opt: New flto-toplevel-asm-heuristics.
	* passes.def: New asm passes.
	* timevar.def (TV_IPA_LTO_ASM): New.
	* tree-pass.h (make_pass_ipa_asm_lgen): New.
	(make_pass_ipa_asm_wpa): New.

2026-01-11  Michal Jires  <mjires@suse.cz>

	* asm-toplevel.cc (mark_fragile_ref_by_asm): New.
	(struct constraint_data): New.
	(walk_through_constraints): Handle .local definitions.
	(analyze_toplevel_extended_asm): Propagate constraint_data.

2026-01-11  Michal Jires  <mjires@suse.cz>

	* cgraph.h: Add must_remain_in_tu_*.
	* cgraphclones.cc (cgraph_node::create_clone): Propagate
	must_remain_in_tu_body.
	* cif-code.def (MUST_REMAIN_IN_TU): New.
	* ipa-icf.cc (sem_function::equals_wpa): Check
	must_remain_in_tu_*
	(sem_variable::equals_wpa): Likewise.
	* ipa-inline-transform.cc (inline_call): Propagate
	must_remain_in_tu_body.
	* ipa-inline.cc (can_inline_edge_p): Check
	must_remain_in_tu_body.
	* lto-cgraph.cc (lto_output_node): Output must_remain_in_tu_*
	(lto_output_varpool_node): Likewise.
	(input_overwrite_node): Input must_remain_in_tu_*.
	(input_varpool_node): Likewise.
	* tree.cc (decl_address_ip_invariant_p): Check
	must_remain_in_tu_name.
	* varpool.cc (varpool_node::ctor_useable_for_folding_p): Check
	must_remain_in_tu_body.

2026-01-11  Michal Jires  <mjires@suse.cz>

	* lto-cgraph.cc (compute_ltrans_boundary): Add symbols
	referenced from asm_nodes.
	* lto-streamer-out.cc (lto_output): Move adding asm_nodes
	to...
	* passes.cc (ipa_write_summaries): ...here.

2026-01-11  Michal Jires  <mjires@suse.cz>

	* ipa-free-lang-data.cc (find_decls_types_in_asm): New.
	(free_lang_data_in_cgraph): Use find_decls_types_in_asm.
	* lto-cgraph.cc (input_cgraph_1): Move asm to..
	(input_toplevel_asms): ..here.
	* lto-streamer-in.cc (lto_input_toplevel_asms):
	Allow extended asm.
	* lto-streamer-out.cc (lto_output_toplevel_asms):
	Allow extended asm.
	(lto_output_toplevel_asms): Allow ASM_EXPR.
	* lto-streamer.h (input_toplevel_asms): New.

2026-01-11  Michal Jires  <mjires@suse.cz>

	PR ipa/122458
	* Makefile.in: Add new file.
	* cgraph.h (analyze_toplevel_extended_asm): New.
	* cgraphunit.cc (symbol_table::finalize_compilation_unit):
	Call analyze_toplevel_extended_asm.
	* asm-toplevel.cc: New file.

2026-01-11  Michal Jires  <mjires@suse.cz>

	* cgraph.cc (cgraph_node_cannot_be_local_p_1): Check ref_by_asm.
	(cgraph_node::verify_node): Likewise.
	* cgraph.h (cgraph_node::only_called_directly_or_aliased_p):
	Likewise.
	(cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
	Likewise.
	(varpool_node::can_remove_if_no_refs_p): Likewise.
	(varpool_node::all_refs_explicit_p): Likewise.
	* cgraphunit.cc (symtab_node::needed_p): Likewise.
	(analyze_functions): Likewise.
	* gimple-ssa-pta-constraints.cc (refered_from_nonlocal_fn):
	Likewise.
	(refered_from_nonlocal_var): Likewise.
	(ipa_create_global_variable_infos): Likewise.
	* ipa-comdats.cc (ipa_comdats): Likewise.
	* ipa-visibility.cc (cgraph_externally_visible_p): Likewise.
	(varpool_node::externally_visible_p): Likewise.
	* ipa.cc (symbol_table::remove_unreachable_nodes): Likewise.
	* lto-cgraph.cc (lto_output_node): Output ref_by_asm.
	(lto_output_varpool_node): Likewise.
	(input_overwrite_node): Input ref_by_asm.
	(input_varpool_node): Likewise.
	* symtab.cc (address_matters_1): Check ref_by_asm.

2026-01-11  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.cc (cris_rtx_costs) <POST_INC>: Handle POST_INC
	as ZERO_EXTEND and SIGN_EXTEND, i.e. as an operator without cost.

2026-01-10  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	* config/mcore/mcore.h (ASM_OUT_ADDR_DIFF_ELT): Remove.

2026-01-10  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-modes.def (FLOAT_MODE): Add HF mode.
	(VECTOR_MODE): Add V{1,2,4,8,16}HF modes.
	* config/s390/s390.cc (s390_scalar_mode_supported_p): For 64-bit
	targets z10 and newer support HF mode.
	(s390_vector_mode_supported_p): Add HF mode.
	(s390_register_move_cost): Keep HF mode operands in registers.
	(s390_legitimate_constant_p): Support zero constant.
	(s390_secondary_reload): For GPR to FPR moves a secondary reload
	register is required.
	(s390_secondary_memory_needed): GPR<->FPR moves don't require
	secondary memory.
	(s390_libgcc_floating_mode_supported_p): For 64-bit targets z10
	and newer support HF mode.
	(s390_hard_regno_mode_ok): Allow HF mode for FPRs and VRs.
	(s390_function_arg_float): Consider HF mode, too.
	(s390_excess_precision): For EXCESS_PRECISION_TYPE_FLOAT16
	return FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16.
	(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
	* config/s390/s390.md (movhf): Define.
	(reload_half_gprtofpr_z10): Define.
	(signbithf2): Define.
	* config/s390/vector.md: Add new vector modes to various
	iterators.

2026-01-10  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123417
	* tree-cfgcleanup.cc (maybe_remove_forwarder_block): Always
	protect latches.

2026-01-10  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123431
	* gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
	Punt if type-generic builtins with a single argument don't have
	exactly one argument.  For returns_arg punt if call doesn't have
	at least one argument.

2026-01-09  Robin Dapp  <rdapp@oss.qualcomm.com>

	PR tree-optimization/123414
	* tree-ssa-forwprop.cc (simplify_vector_constructor):
	Use ssizetype as mask type.

2026-01-09  Jakub Jelinek  <jakub@redhat.com>

	* config/loongarch/genopts/gen-evolution.awk: Update
	copyright year.
	(copyright_header): Separate parts of Copyright word
	with " " so that it doesn't get matched by update-copyright.py.
	(gen_full_header, gen_full_source, gen_full_def): Include
	2026 year in the ranges.

2026-01-09  David Malcolm  <dmalcolm@redhat.com>

	* channels.h (gcc::topics::analyzer_events::subscriber): New
	forward decl.
	(compiler_channels::analyzer_events_channel): New field.
	* doc/plugins.texi (PLUGIN_ANALYZER_INIT): Delete.
	* plugin.cc (register_callback): Delete PLUGIN_ANALYZER_INIT.
	(invoke_plugin_callbacks_full): Likewise.
	* plugin.def (PLUGIN_ANALYZER_INIT): Delete this event.

2026-01-09  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS): Add tree-diagnostic-cfg.o.
	(OBJS-libcommon): Add custom-sarif-properties/cfg.o,
	diagnostics/digraphs-to-dot.o, and
	diagnostics/digraphs-to-dot-from-cfg.o.
	* cfghooks.cc: Define INCLUDE_VECTOR.  Add includes of
	"diagnostics/sarif-sink.h" and "custom-sarif-properties/cfg.h".
	(dump_bb_as_sarif_properties): New.
	* cfghooks.h (diagnostics::sarif_builder): New forward decl.
	(json::object): New forward decl.
	(cfg_hooks::dump_bb_as_sarif_properties): New callback field.
	(dump_bb_as_sarif_properties): New decl.
	* cfgrtl.cc (rtl_cfg_hooks): Populate the new callback
	field with rtl_dump_bb_as_sarif_properties.
	(cfg_layout_rtl_cfg_hooks): Likewise.
	* custom-sarif-properties/cfg.cc: New file.
	* custom-sarif-properties/cfg.h: New file.
	* diagnostics/digraphs-to-dot-from-cfg.cc: New file, partly
	adapted from gcc/graph.cc.
	* diagnostics/digraphs-to-dot.cc: New file.
	* diagnostics/digraphs-to-dot.h: New file, based on material in...
	* diagnostics/digraphs.cc: Include
	"diagnostics/digraphs-to-dot.h".
	(class conversion_to_dot): Rework and move to above.
	(make_dot_graph_from_diagnostic_graph): Likewise.
	(make_dot_node_from_digraph_node): Likewise.
	(make_dot_edge_from_digraph_edge): Likewise.
	(conversion_to_dot::get_dot_id_for_node): Likewise.
	(conversion_to_dot::has_edges_p): Likewise.
	(digraph::make_dot_graph): Use to_dot::converter::make and invoke
	the result to make the dot graph.
	* diagnostics/digraphs.h (digraph:get_all_nodes): New accessor.
	* diagnostics/html-sink.cc
	(html_builder::m_per_logical_loc_graphs): New field.
	(html_builder::add_graph_for_logical_loc): New.
	(html_sink::report_digraph_for_logical_location): New.
	* diagnostics/sarif-sink.cc (sarif_array_of_unique::get_element):
	New.
	(sarif_builder::report_digraph_for_logical_location): New.
	(sarif_sink::report_digraph_for_logical_location): New.
	* diagnostics/sink.h: Include "diagnostics/logical-locations.h".
	(sink::report_digraph_for_logical_location): New vfunc.
	* diagnostics/text-sink.h
	(text_sink::report_digraph_for_logical_location): New.
	* doc/invoke.texi (fdiagnostics-add-output): Clarify wording.
	Distinguish between scheme-specific vs GCC-specific keys, and add
	"cfgs" as the first example of the latter.
	* gimple-pretty-print.cc: Include "cfghooks.h", "json.h", and
	"custom-sarif-properties/cfg.h".
	(gimple_dump_bb_as_sarif_properties): New.
	* gimple-pretty-print.h (diagnostics::sarif_builder): New forward
	decl.
	(json::object): Likewise.
	(gimple_dump_bb_as_sarif_properties): New.
	* graphviz.cc (get_compass_pt_from_string): New
	* graphviz.h (get_compass_pt_from_string): New decl.
	* libsarifreplay.cc (sarif_replayer::handle_graph_object): Fix
	overlong line.
	* opts-common.cc: Define INCLUDE_VECTOR.
	* opts-diagnostic.cc: Define INCLUDE_LIST.  Include
	"diagnostics/sarif-sink.h", "tree-diagnostic-sink-extensions.h",
	"opts-diagnostic.h", and "pub-sub.h".
	(class gcc_extra_keys): New class.
	(opt_spec_context::opt_spec_context): Add "client_keys" param and
	pass to dc_spec_context.
	(handle_gcc_specific_keys): New.
	(try_to_make_sink): New.
	(gcc_extension_factory::singleton): New.
	(handle_OPT_fdiagnostics_add_output_): Rework to use
	try_to_make_sink.
	(handle_OPT_fdiagnostics_set_output_): Likewise.
	* opts-diagnostic.h: Include "diagnostics/sink.h".
	(class gcc_extension_factory): New.
	* opts.cc: Define INCLUDE_LIST.
	* print-rtl.cc: Include "dumpfile.h", "cfghooks.h", "json.h", and
	"custom-sarif-properties/cfg.h".
	(rtl_dump_bb_as_sarif_properties): New.
	* print-rtl.h (diagnostics::sarif_builder): New forward decl.
	(json::object): Likewise.
	(rtl_dump_bb_as_sarif_properties): New decl.
	* tree-cfg.cc (gimple_cfg_hooks): Use
	gimple_dump_bb_as_sarif_properties for new callback field.
	* tree-diagnostic-cfg.cc: New file, based on material in graph.cc.
	* tree-diagnostic-sink-extensions.h: New file.
	* tree-diagnostic.cc: Define INCLUDE_LIST.  Include
	"tree-diagnostic-sink-extensions.h".
	(compiler_ext_factory): New.
	(tree_diagnostics_defaults): Set gcc_extension_factory::singleton
	to be compiler_ext_factory.

2026-01-09  David Malcolm  <dmalcolm@redhat.com>

	* channels.h: New file.
	* context.cc: Define INCLUDE_LIST.  Include "channels.h".
	(gcc::context::context): Create m_channels.
	(gcc::context::~context): Delete it.
	* context.h (struct compiler_channels): New forward decl.
	(gcc::context::get_channels): New accessor.
	(gcc::context::m_channels): New field.
	* passes.cc: Define INCLUDE_LIST.  Include "topics/pass-events.h"
	and "channels.h".
	(execute_one_pass): If the global context's pass_events_channel
	has subscribers, publish before_pass and after_pass events to it.
	* topics/pass-events.h: New file.

2026-01-09  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add pub-sub.o.
	* pub-sub.cc: New file.
	* pub-sub.h: New file.
	* selftest-run-tests.cc (selftest::run_tests): Call
	selftest::pub_sub_cc_tests.
	* selftest.h (selftest::pub_sub_cc_tests): New decl.

2026-01-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR target/123457
	* config/aarch64/aarch64-sve-builtins.cc (struct registered_function_hasher):
	Change base class to ggc_ptr_hash.
	(initial_indexes): Mark with GTY.
	(function_table): Likewise.
	(handle_arm_sve_h): Allocate function_table from ggc instead of heap.

2026-01-09  Jakub Jelinek  <jakub@redhat.com>

	* doc/invoke.texi (-x): Add c++-system-module, objc-cpp-output,
	objc++-cpp-output, adascil, adawhy, modula-2, modula-2-cpp-output,
	rust, algol68 and lto as further possible option arguments.

2026-01-09  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/123121
	* lra-remat.cc (bad_for_rematerialization_p): Consider div/mod ops.
	(operand_to_remat): Exclude rematerialization of insns with
	multiple sets.

2026-01-09  Peter Bergner  <bergner@tenstorrent.com>

	PR target/123492
	* config/riscv/riscv-cores.def (RISCV_CORE)<tt-ascalon-d8>: Add missing
	extensions via use of rva23s64 profile and adding zkr, smaia, smmpm,
	smnpm, smrnmi, smstateen, ssaia, ssstrict, svadu.

2026-01-09  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.h (class ipcp_bits_lattice): New members set_recipient_only,
	recipient_only_p and m_recipient_only.
	(class ipcp_vr_lattice): Likewise.
	(ipcp_vr_lattice::init): Initialize also m_recipient_only.
	* ipa-cp.cc (ipcp_bits_lattice::print): Adjust printting to also
	print the new flag.
	(ipcp_vr_lattice::print): Likewise.
	(ipcp_vr_lattice::set_recipient_only): New function.
	(ipcp_bits_lattice::set_recipient_only): Likewise.
	(set_all_contains_variable): New parameter MAKE_SIMPLE_RECIPIENTS, set
	bits and vr lattices to recibient only insted to bottom when it is
	true.
	(initialize_node_lattices): Pass true to the second parameter of
	set_all_contains_variable.
	(propagate_bits_across_jump_function): Treat recipient_only source
	lattices like bottom.
	(propagate_vr_across_jump_function): Likewise.
	(ipcp_store_vr_results): Skip non-local nodes.

2026-01-09  Martin Jambor  <mjambor@suse.cz>

	* ipa-cp.cc (good_cloning_opportunity_p): Dump a message when
	bailing out early too.
	(find_more_scalar_values_for_callers_subset): Rename to
	find_scalar_values_for_callers_subset, collect constants regardless of
	what is already in the vector.  Remove dumping.
	(find_more_contexts_for_caller_subset): Rename to
	find_contexts_for_caller_subset, collect contexts regardless of what
	is already in the vector.  Remove dumping.
	(find_aggregate_values_for_callers_subset): Rename to
	find_aggregate_values_for_callers_subset_gc, implement using new
	functions.
	(find_aggregate_values_for_callers_subset_1): New function.
	(find_aggregate_values_for_callers_subset): Likewise.
	(copy_known_vectors_add_val): Removed.
	(dump_reestimation_message): New function.
	(decide_about_value): Remove formal parameter avals, compute it
	independently, and use it to estimate local cloning effects.
	(struct cloning_opportunity_ranking): New type.
	(compare_cloning_opportunities): New function.
	(cloning_opportunity_ranking_evaluation): Likewise.
	(decide_whether_version_node): Pre-sort candidates for cloning before
	really evaluating them.  Calculate context independent values only
	when considering versioning for all contexts.
	(ipcp_val_agg_replacement_ok_p): Renamed to
	ipcp_val_replacement_ok_p, check also non-aggregate values.

2026-01-09  Alexandre Oliva  <oliva@gnu.org>

	PR target/119430
	* config/arm/arm.cc (arm_function_ok_for_sibcall): Disable
	sibcalls for long-calls that use all call-clobbered
	general-purpose registers, including the static chain.

2026-01-09  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc (print_operand): Align %cN with %N.
	* config/s390/s390.md: Remove comment.

2026-01-09  Filip Kastl  <fkastl@suse.cz>

	PR c/123212
	* opts.cc: Enable -fbit-tests and -fjump-tables at -Og.

2026-01-09  Alfie Richards  <alfie.richards@arm.com>

	* config/aarch64/aarch64-builtins.cc
	(aarch64_expand_pragma_builtin): Add case for FMMLA.
	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
	Add new __ARM_FEATURE_X macros.
	* config/aarch64/aarch64-simd-pragma-builtins.def
	(vmmlaq_f16_mf8): New intrinsic.
	(vmmlaq_f32_mf8): Likewise.
	* config/aarch64/aarch64-simd.md
	(@aarch64_<insn><VDQ_HSF_FMMLA:mode>): New instruction.
	* config/aarch64/aarch64-sve-builtins-base.cc: Update mmla_impl
	for new instructions.
	* config/aarch64/aarch64-sve-builtins-shapes.cc
	(struct mmla_def): Add support for the new widening forms.
	* config/aarch64/aarch64-sve-builtins-sve2.def (svmmla) Add new
	intrinsics.
	* config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_narrow_s):
	Fix comment.
	* config/aarch64/aarch64-sve2.md
	(@aarch64_sve2_<sve_fp_op><SVE_FULL_HSF_FMMLA:mode><VNx16QI_ONLY:mode>): New instruction.
	(@aarch64_sve2_<sve_fp_op><VNx4SF_ONLY:mode><VNx8HF_ONLY:mode>): Likewise.
	* config/aarch64/aarch64.h (TARGET_F8F32MM): New macro.
	(TARGET_F8F16MM): Likewise.
	(TARGET_SVE_F16F32MM): Likewise.
	* config/aarch64/iterators.md (insn): Add fmmla entry.
	(VDQ_HSF_FMMLA): New iterator.
	(SVE_FULL_HSF_FMMLA): Likewise.

2026-01-09  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Remove
	TARGET_HAVE_MVE condition.
	(class arm_target_switcher): New.
	(arm_init_mve_builtins): Remove calls to
	arm_init_simd_builtin_types and
	arm_init_simd_builtin_scalar_types.  Switch to MVE isa flags.
	(arm_init_neon_builtins): Remove calls to
	arm_init_simd_builtin_types and
	arm_init_simd_builtin_scalar_types.
	(arm_need_mve_mode_regs): New.
	(arm_need_neon_mode_regs): New.
	(arm_target_switcher::arm_target_switcher): New.
	(arm_target_switcher::~arm_target_switcher): New.
	(arm_init_builtins): Call arm_init_simd_builtin_scalar_types and
	arm_init_simd_builtin_types.  Always call arm_init_mve_builtins
	and arm_init_neon_builtins.

2026-01-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/123489
	* config/i386/i386-builtin.def (__builtin_ia32_cvttsd2sis64_round,
	__builtin_ia32_cvttsd2usis64_round, __builtin_ia32_cvttss2sis64_round,
	__builtin_ia32_cvttss2usis64_round): Require OPTION_MASK_ISA_64BIT.

2026-01-09  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR rtl-optimization/123491
	* ifcvt.cc (noce_try_cond_zero_arith): Reject non-scalar
	integer modes for the inner mode of the subreg.

2026-01-09  Shreya Munnangi  <smunnangi1@ventanamicro.com>
	    Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/121778
	* match.pd: Add pattern to recognize rotate with one or more
	bits flipped via xor.
	* config/sh/sh.md (*rotcl); New variant which handles the output
	we get after the match.pd change above.

2026-01-09  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	* config/riscv/andes-23-series.md: Clamp reservations to 7c.
	* config/riscv/andes-25-series.md: Likewise.
	* config/riscv/andes-45-series.md: Likewise.
	* config/riscv/generic.md: Likewise.
	* config/riscv/mips-p8700.md: Likewise.
	* config/riscv/sifive-7.md: Likewise.
	* config/riscv/spacemit-x60.md: Likewise.

2026-01-09  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	PR gcov-profile/123019
	* auto-profile.cc (auto_profile): Call execute_fixup_cfg.

2026-01-09  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	PR ipa/123383
	* cgraph.cc (cgraph_edge::get_next_speculative_id): Check
	lto_stmt_uid in get_next_speculative_id.

2026-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/111817
	* stmt.cc (parse_input_constraint): For matching construct, goto
	before the loop without changing j instead of break.  Remove comment
	about that problem.

2026-01-08  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/122846
	* config/riscv/riscv-opts.h (enum rvv_max_lmul_enum): Add
	RVV_CONV_DYNAMIC.
	(TARGET_MAX_LMUL): Ditto.
	* config/riscv/riscv-string.cc (use_vector_stringop_p): Use
	LMUL1 for RVV_CONV_DYNAMIC.
	(expand_rawmemchr): Ditto.
	(expand_strcmp): Ditto.
	(check_vectorise_memory_operation): Ditto.
	* config/riscv/riscv-vector-costs.cc (get_smallest_mode):
	New function.
	(compute_lmul_from_conversion_ratio): Calculate LMUL from
	largest/smallest type.
	(costs::has_unexpected_spills_p): Split.
	(costs::compute_live_ranges_and_lmul): Compute smallest type and
	call new function.
	(costs::cleanup_live_range_data): New function.
	(costs::compute_conversion_dynamic_lmul): New function.
	(costs::record_potential_unexpected_spills): Use new function.
	(costs::better_main_loop_than_p): Allow appropriate LMUL.
	* config/riscv/riscv-vector-costs.h: Declare.
	* config/riscv/riscv.opt: New option
	-mrvv-max-lmul=conv-dynamic.

2026-01-08  Qing Zhao  <qing.zhao@oracle.com>

	* doc/extend.texi: Update doc to support pointers inside structures.

2026-01-08  Olivier Hainque  <hainque@adacore.com>
	    Alexandre Oliva  <oliva@adacore.com>

	* config.gcc [x86_64-*-*]: Match *abi32 target, default to m32
	abi.  Accept 32 or m32 for --with-abi.

2026-01-08  Jonathan Wakely  <jwakely@redhat.com>

	* doc/invoke.texi (C++ Dialect Options): Fix typo in
	documentation of -flang-info-module-cmi.

2026-01-08  Aleksandar Rakic  <aleksandar.rakic@htecgroup.com>

	* Makefile.in: Add with_multi_buildlist for multilib
	configuration control. Pass an additional argument to
	genmultilib indicating whether --with-multi-buildlist is set
	(true or false). Use with_multi_buildlist to filter
	multilib directories in fixinc_list.
	* configure: Regenerate.
	* configure.ac: Restrict the installed fixedincludes multilibs.
	* configure.tgt: New file.
	* doc/install.texi: Add --with-multi-buildlist configure option
	for multilib filtering.
	* genmultilib: Document the new eleventh argument indicating
	whether --with-multi-buildlist configure option is set (true or
	false). Update argument parsing to include this flag before
	enable_multilib. Modify reuse rule validation:
	- Keep the original error for reuse of nonexistent multilibs
	when --with-multi-buildlist is not used.
	- Suppress the error only when the new configure option is
	active, allowing reuse rules to reference multilibs that are
	intentionally excluded from the build.

2026-01-08  Tomas Glozar  <tglozar@gmail.com>

	* config/ia64/ia64.cc (MAX_VECT_LEN): Set to 16 from 8.

2026-01-08  Robin Dapp  <rdapp.gcc@gmail.com>

	PR target/123268
	* gimple-match-exports.cc (convert_conditional_op): Check if
	orig_op->type and type of else value match.

2026-01-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Richard Biener  <rguenther@suse.de>

	PR tree-optimization/122793
	* tree-vect-slp.cc (vect_add_slp_permutation): Document the existing
	identity_offset parameter.  Handle identities that take from the
	second input rather than the first.

2026-01-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123310
	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Properly
	test against unknown offset.

2026-01-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123298
	* tree-ssa-alias.h (get_continuation_for_phi): Take a gphi *,
	add is_backedge hook argument.
	(walk_non_aliased_vuses): Add is_backedge hook argument.
	* tree-ssa-alias.cc (maybe_skip_until): Adjust.
	(get_continuation_for_phi): Use new hook to classify an
	edge into the PHI as backedge.
	(walk_non_aliased_vuses): Adjust.
	* gimple-lower-bitint.cc (bitint_dom_walker::before_dom_children):
	Likewise.
	* ipa-prop.cc (determine_known_aggregate_parts): Likewise.
	* tree-ssa-scopedtables.cc (avail_exprs_stack::lookup_avail_expr):
	Likewise.
	* tree-ssa-pre.cc (translate_vuse_through_block): Likewise.
	* tree-ssa-sccvn.cc (vn_bb_to_rpo): Make BB to RPO order
	mapping accessible from new hook.
	(do_rpo_vn_1): Likewise.
	(vn_is_backedge): New hook to classify edge.
	(vn_reference_lookup_pieces): Adjust.
	(vn_reference_lookup): Likewise.

2026-01-08  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_shift): Improve missing
	optab or optab support messages.
	(vectorizable_operation): Likewise.

2026-01-08  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.cc (s390_logical_operator_ok_p): Test for
	volatile memory.
	(s390_mem_constraint): Remove volatile condition.
	* config/s390/s390.md (*andc_split_<mode>): Test for volatile
	memory.

2026-01-08  Richard Biener  <rguenther@suse.de>

	PR middle-end/123107
	* fold-const.cc (fold_binary_loc): Guard (v >> CST) == { 0, 0.. }
	to v < { 0, 0.. } folding.

2026-01-08  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	PR tree-optimization/123382
	* tree-if-conv.cc: Reject VEC_PERM_EXPR for factoring
	if it is the mask and they are constant.

2026-01-08  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* cse.cc (cse_find_path): Change follow_jumps to bool.

2026-01-07  Tomas Glozar  <tglozar@gmail.com>

	PR target/121535
	* config/ia64/ia64.cc (TARGET_ZERO_CALL_USED_REGS): Override
	function with target-specific one.
	(struct gcc_target): Move to end of file.
	(ia64_zero_call_used_regs): Add target-specific function.

2026-01-07  Xinhui Yang  <cyan@cyano.uk>

	* config.gcc: limit -lunwind usage by testing if the system
	libunwind is being used.

2026-01-07  Xi Ruoyao  <xry111@xry111.site>

	PR target/123320
	* config/loongarch/loongarch.md (<optab><mode>3): Only expand
	using psuedos when can_create_pseudo_p ().
	(addsi3): Likewise.

2026-01-07  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/123300
	* gimple-range-gori.cc (gori_map::exports_and_deps): New.
	* gimple-range-gori.h (exports_and_deps): New prototype.
	(FOR_EACH_GORI_EXPORT_AND_DEP_NAME): New macro.
	* tree-vrp.cc (remove_unreachable:remove_unreachable): Initialize
	m_tmp bitmap.
	(remove_unreachable:~remove_unreachable): Dispose of m_tmp bitmap.
	(remove_unreachable:fully_replaceable): Move from static function
	and check reachability of exports and dependencies.

2026-01-07  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/123319
	* value-range.cc (irange::intersect): If there is a bitmask, snap
	subranges after creating them.

2026-01-07  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>

	PR tree-optimization/102486
	* match.pd (`popcount (X & -X) -> -X != 0`): New pattern.

2026-01-07  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/119291
	PR rtl-optimization/121773
	* combine.cc (try_combine): Check that SET_DEST (setN) is neither
	modified_between_p nor reg_used_between_p instead of just not
	reg_used_between_p or pc_rtx.

2026-01-07  Richard Earnshaw  <rearnsha@arm.com>

	PR target/123390
	* config/arm/arm.cc (arm_gen_constant): Fix types of HWI literals.
	(arm_const_double_prefer_rsbs_rsc): Likewise.

2026-01-07  Alfie Richards  <alfie.richards@arm.com>

	* config/aarch64/aarch64.cc (aarch64_parse_fmv_features): Add parsing
	for priority arguments.
	(aarch64_process_target_version_attr): Update call to
	aarch64_parse_fmv_features.
	(get_feature_mask_for_version): Update call to
	aarch64_parse_fmv_features.
	(aarch64_compare_version_priority): Add logic to order by priority if present.
	(aarch64_functions_b_resolvable_from_a): Update call to
	aarch64_parse_fmv_features.
	(aarch64_mangle_decl_assembler_name): Update call to
	aarch64_parse_fmv_features.
	(dispatch_function_versions): Add logic to sort by priority.
	(aarch64_same_function_versions): Add diagnostic if invalid use of
	priority syntax.
	(aarch64_merge_decl_attributes): Add logic to make suer priority
	arguments are preserved.
	(aarch64_check_target_clone_version): Update call to
	aarch64_parse_fmv_features.

2026-01-07  Alfie Richards  <alfie.richards@arm.com>

	* target.def (TARGET_OPTION_SAME_FUNCTION_VERSIONS): Update
	documentation.
	* tree.cc (disjoint_version_decls): Change for new NULL parameter
	to same_function_versions.
	(diagnose_versioned_decls): Update to pass diagnostic location to
	same_function_versions.
	* doc/tm.texi: Regenerate.
	* config/aarch64/aarch64.cc (aarch64_same_function_versions):
	Update hook impl for new arguments.
	* config/riscv/riscv.cc (riscv_same_function_versions): Update
	hook impl for new arguments.
	* config/loongarch/loongarch.cc
	(loongarch_same_function_versions): Likewise
	* hooks.cc (hook_stringslice_stringslice_unreachable): Changed
	to...
	(hook_stringslice_consttree_stringslice_consttree_unreachable):
	...this and add extra arguments.
	* hooks.h (hook_stringslice_stringslice_unreachable): Changed
	to...
	(hook_stringslice_consttree_stringslice_consttree_unreachable):
	and add extra arguments.

2026-01-07  Martin Jambor  <mjambor@suse.cz>

	* params.opt (param_ipa_cp_sweeps): New.
	* doc/invoke.texi (ipa-cp-sweeps): New.
	* ipa-cp.cc (max_number_sweeps): New.
	(get_max_overall_size): New parameter cur_sweep, use it and the total
	number of sweeps from the NODE to calculate the result too.
	(ipcp_propagate_stage): Get the maximum number of sweeps specified in
	the corresponding parameter of any possibly affected node.
	(good_cloning_opportunity_p): Add parameter cur_sweep, adjust the
	threshold according to it.
	(decide_about_value): New parameter cur_sweep, pass it to
	get_max_overall_size and to good_cloning_opportunity_p.
	(decide_whether_version_node): New parameter cur_sweep, pass it to
	decide_about_value and get_max_overall_size.  Make sure the node is
	not dead.
	(ipcp_decision_stage): Make multiple sweeps over the call-graph.

2026-01-07  Martin Jambor  <mjambor@suse.cz>

	* ipa-prop.h (ipa_node_params): Remove member do_clone_for_all_contexts.
	(ipa_node_params::ipa_node_params): Do not initialize
	do_clone_for_all_contexts.
	* ipa-cp.cc (gather_context_independent_values): Remove parameter
	calculate_aggs, calculate them always.
	(estimate_local_effects): Move the decision whether to clone for
	all context...
	(decide_whether_version_node): ...here.  Fix dumps.
	(decide_about_value): Adjust alignment in dumps.

2026-01-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123315
	* tree-vect-loop.cc (vect_analyze_loop_2): Reset
	LOOP_VINFO_USING_DECREMENTING_IV_P before retrying.

2026-01-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123221
	* tree-vect-loop.cc (vectorizable_reduction): When we did not
	find the non-conversion reduction operation, bail.

2026-01-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/123316
	* tree-vect-loop.cc (vectorizable_reduction): Detect missing
	PHI patterns for bools.

2026-01-07  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR debug/123259
	* toplev.cc (process_options): Guard CTF non-C warning by
	-Wcomplain-wrong-lang.
	* doc/invoke.texi (Warning Options, -Wno-complain-wrong-lang):
	Document effect on -gctf/-gsctf.

2026-01-07  Siddhesh Poyarekar  <siddhesh@gotplt.org>

	PR tree-optimization/123374
	* gimple-ssa-warn-access.cc (pass_waccess::set_pass_param): Add
	a second parameter.
	(pass_waccess::check_call): Skip access checks for waccess2.
	(pass_waccess::execute): Drop initialization of
	M_CHECK_DANGLING_P.
	* passes.def: Adjust.

2026-01-06  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* tree-profile.cc (tree_profiling): Do not use atomic operations
	if they are not available.  Try to use at least partial atomic
	updates as a fallback.

2026-01-06  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.h (EPILOGUE_USES): New macro definition.
	* config/xtensa/xtensa.md (return):
	Remove '(use (reg:SI A0_REG))' from the template description, and
	reload_completed from the condition.
	(sibcall_epilogue): Remove emitting '(use (reg:SI A0_REG))'.

2026-01-06  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	* tree-if-conv.cc (ifcvt_can_predicate): Add check for
	normal builtins.

2026-01-06  Richard Ball  <Richard.Ball@arm.com>

	* config/aarch64/aarch64-builtins.cc
	(enum aarch64_builtins): New builtin flag.
	(aarch64_init_pcdphint_builtins): New builtin function.
	(aarch64_expand_pldir_builtin): Expander for new intrinsic.
	(aarch64_general_expand_builtin): Call new expander.
	* config/aarch64/aarch64.md
	(aarch64_pldir): New pattern for instrinsic.
	* config/aarch64/arm_acle.h
	(__attribute__): New call to builtin.
	(__pldir): Likewise.

2026-01-06  Richard Ball  <Richard.Ball@arm.com>

	* config/aarch64/aarch64-builtins.cc
	(enum aarch64_builtins): Add new flags.
	(aarch64_init_pcdphint_builtins): Create new Builtin functions.
	(aarch64_general_init_builtins): Call init for PCDPHINT.
	(aarch64_expand_stshh_builtin): Expander for new intrinsic.
	(aarch64_general_expand_builtin): Call new expander.
	* config/aarch64/aarch64-c.cc
	(aarch64_update_cpp_builtins): New feature.
	* config/aarch64/aarch64.h (TARGET_PCDPHINT): Likewise.
	* config/aarch64/arm_acle.h
	(__atomic_store_with_stshh): Generic to call builtins.
	* config/aarch64/atomics.md
	(@aarch64_atomic_store_stshh<mode>): New pattern for intrinsic.
	* config/aarch64/iterators.md: New UNSPEC.

2026-01-06  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/121192
	* expr.cc (store_constructor) <VECTOR_TYPE>: Disable the special
	trick for uniform boolean vectors with integer modes and single-bit
	mask entries on big-endian platforms.

2026-01-06  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/install.texi (Prerequisites): Remove reference to Ada in
	conjunction with GCC 9.5 and adjust its GCC version requirement.

2026-01-06  Jakub Jelinek  <jakub@redhat.com>
	    Marco Falke  <falke.marco@gmail.com>

	PR tree-optimization/123351
	* tree-object-size.cc (object_sizes_set_temp): Separate calls to
	make_ssa_name to ensure deterministic execution order.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	* tree-vect-stmts.cc (vectorizable_call): Handle trapping math.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	* tree-if-conv.cc (ifcvt_can_predicate): Support gimple_call_builtin_p.
	(if_convertible_stmt_p, predicate_rhs_code,
	predicate_statements): Likewise.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	* match.pd: Add COND_FMA to COND_FMS rewrite rules.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	* doc/md.texi: Document them
	* internal-fn.cc (FOR_EACH_COND_FN_PAIR, internal_fn_else_index): Add
	SQRT, CEIL, FLOOR, ROUND and RINT.
	* internal-fn.def (IFN_COND_SQRT, IFN_COND_CEIL, IFN_COND_FLOOR,
	IFN_COND_ROUND, IFN_COND_RINT, IFN_COND_LEN_SQRT, IFN_COND_LEN_CEIL,
	IFN_COND_LEN_FLOOR, IFN_COND_LEN_ROUND, IFN_COND_LEN_RINT): New.
	* optabs.def (cond_rint_optab, cond_sqrt_optab, cond_round_optab,
	cond_ceil_optab, cond_floor_optab, cond_len_rint_optab,
	cond_len_sqrt_optab, cond_len_round_optab, cond_len_ceil_optab,
	cond_len_floor_optab): New.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/122103
	* gimple.cc (gimple_could_trap_p_1): Handle __builtin_ calls.

2026-01-05  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	* config/riscv/riscv-string.cc (expand_block_move): Restore using
	inlined memcpy/memmove for unknown counts if the param hasn't been
	specified.
	(expand_vec_setmem): Similarly for memset.

2026-01-05  Pan Li  <pan2.li@intel.com>

	PR target/123317
	* config/riscv/autovec-opt.md: Take zero_extend for
	both the vwaddu and vwsubu wx pattern.

2026-01-05  Alice Carlotti  <alice.carlotti@arm.com>

	* config/aarch64/aarch64-sme.md
	(aarch64_sme_write_zt): Add TARGET_STREAMING requirement.
	(aarch64_sme_lut_zt): Ditto.

2026-01-05  Alice Carlotti  <alice.carlotti@arm.com>

	* doc/invoke.texi: Fix incorrect function name.

2026-01-05  Pan Li  <pan2.li@intel.com>

	* tree-vect-slp.cc (vec_slp_has_scalar_use): Adjust the
	depth_limit from 2 to 3.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR target/121290
	* config/aarch64/aarch64.cc (aarch64_possible_by_lane_insn_p): New.
	(aarch64_vector_costs): Add m_num_dup_stmts and m_num_total_stmts.
	(aarch64_vector_costs::add_stmt_cost): Use them.
	(adjust_body_cost): Likewise.

2026-01-05  Tamar Christina  <tamar.christina@arm.com>

	PR target/123017
	* config/aarch64/aarch64-json-schema.h: Add br_mispredict_factor.
	* config/aarch64/aarch64-json-tunings-parser-generated.inc
	(parse_branch_costs): Add br_mispredict_factor.
	* config/aarch64/aarch64-json-tunings-printer-generated.inc
	(serialize_branch_costs): Add br_mispredict_factor.
	* config/aarch64/aarch64-protos.h (struct cpu_branch_cost): Add
	br_mispredict_factor.
	* config/aarch64/aarch64.cc (aarch64_max_noce_ifcvt_seq_cost,
	aarch64_noce_conversion_profitable_p,
	TARGET_MAX_NOCE_IFCVT_SEQ_COST,
	TARGET_NOCE_CONVERSION_PROFITABLE_P): New.
	* config/aarch64/tuning_models/generic.h (generic_branch_cost): Add
	br_mispredict_factor.
	* config/aarch64/tuning_models/generic_armv8_a.h: Remove
	generic_armv8_a_branch_cost and use generic_branch_cost.

2026-01-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>

	* configure: Regenerate.

2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	* config/riscv/riscv.cc (riscv_conditional_register_usage): Revert
	patch that made VXRM a global register.

2026-01-04  Keith Packard  <keithp@keithp.com>

	* config.gcc: Add clause for picolibc.
	* config/picolibc-spec.h: New file.
	* config/picolibc.opt: Likewise.
	* config/picolibc.opt.urls: Likewise.
	* configure.ac: Add support for --with-picolibc.
	* configure: Rebuilt.
	* doc/invoke.texi: Document picolibc options.
	* doc/tm.texi.in (LIBC_CPP_SPEC): Document.
	(LIBC_LINK_SPEC): Similarly.
	* doc/tm.texi: Rebuilt.
	* gcc.cc (LIBC_CPP_SPEC): Provide default definition.
	(LIBC_LINK_SPEC): Likewise.
	(cpp_spec): Include LIBC_CPP_SPEC.
	(link_spec): Similarly for LIBC_LINK_SPEC.

2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	* doc/contrib.texi: Add Kazumoto & Oleg.

2026-01-04  Richard Braun  <rbraun@sceen.net>

	* config/c6x/c6x-sched.md.in (mpydp_m_N__CROSS_,
	mpyspdp_m_N__CROSS_, mpysp2dp_m_N__CROSS_): Update reservations.
	* config/c6x/c6x-sched.md: Regenerated.
	* config/c6x/c6x.md (m1dp, m1spdp, m2dp, m2spdp): New CPU units.

2026-01-04  Kalvis Duckmanton  <kalvisd@gmail.com>

	* config/host-netbsd.cc (netbsd_gt_pch_use_address): Support PCH
	loading at addresses other than its preferred address.
	* config/host-openbsd.cc (openbsd_gt_pch_use_address): Likewise.

2026-01-04  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>

	PR tree-optimization/122608
	* match.pd (`(c ? a : b) op d -> c ? (a op d) : (b op d)`): New
	pattern.
	(`d op (c ? a : b) -> c ? (d op a) : (d op b)`): Likewise

2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>

	PR target/123010
	* simplify-rtx.cc (simplify_binary_operation_1, case ASHIFT): Simplify
	case where a left shift of the sign extracted field can be turned into
	a sign extension of a left shift.

2026-01-03  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/123372
	* tree-ssa-math-opts.cc
	(build_saturation_binary_arith_call_and_replace): Pass type of op_0
	rather than type of lhs as second argument to
	direct_internal_fn_supported_p.

2026-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/aarch64/aarch64-sve-builtins-shapes.cc
	(INCLUDE_ALGORITHM): Define.

2026-01-01  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

	* cgraph.cc (cgraph_edge::get_next_speculative_id): New.
	* cgraph.h (cgraph_edge::get_next_speculative_id): New.
	* ipa-devirt.cc (ipa_devirt): Use get_next_speculative_id
	in make_speculative.

2026-01-01  Jakub Jelinek  <jakub@redhat.com>

	* gcc.cc (process_command): Update copyright notice dates.
	* gcov-dump.cc (print_version): Ditto.
	* gcov.cc (print_version): Ditto.
	* gcov-tool.cc (print_version): Ditto.
	* gengtype.cc (create_file): Ditto.
	* doc/cpp.texi: Bump @copying's copyright year.
	* doc/cppinternals.texi: Ditto.
	* doc/gcc.texi: Ditto.
	* doc/gccint.texi: Ditto.
	* doc/gcov.texi: Ditto.
	* doc/install.texi: Ditto.
	* doc/invoke.texi: Ditto.


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