diff -Nrcpad gcc-15-20260117/LAST_UPDATED gcc-15-20260124/LAST_UPDATED
*** gcc-15-20260117/LAST_UPDATED	Sat Jan 17 22:32:19 2026
--- gcc-15-20260124/LAST_UPDATED	Sat Jan 24 22:32:18 2026
***************
*** 1 ****
! Obtained from git: releases/gcc-15 revision 1a248bbc02cd595ac342723aff3c2e5d31b7188e
--- 1 ----
! Obtained from git: releases/gcc-15 revision 8df4ee53f257fbf67fb2d08f3c4e239dc266ba2c
diff -Nrcpad gcc-15-20260117/MD5SUMS gcc-15-20260124/MD5SUMS
*** gcc-15-20260117/MD5SUMS	Sat Jan 17 22:32:24 2026
--- gcc-15-20260124/MD5SUMS	Sat Jan 24 22:32:22 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-15-20260117.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-15-20260124.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** d32239bcb673463ab874e80d47fae504  COPYIN
*** 25,31 ****
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! ed4aad8b36b61df95dcf62abe0cf010f  LAST_UPDATED
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--- 25,31 ----
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*** 514,520 ****
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--- 514,520 ----
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*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 551,557 ****
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--- 551,557 ----
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*** 563,569 ****
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--- 563,569 ----
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*************** e364f4e3ae92066699cc93a8f7b828c1  gcc/ad
*** 2926,2932 ****
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--- 2926,2932 ----
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*************** db6f5a37bd59fd83ff3286e71ab985fe  gcc/ad
*** 2970,2976 ****
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--- 2970,2976 ----
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! 4292a2fc5b42cbce7ec79d19cc5f7eb9  gcc/ada/sem_util.adb
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*************** fe292df4b7f3e3ef7c0b8305084b6844  gcc/bi
*** 3202,3208 ****
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! 2e944dea52dbc383e763e0585daa1b01  gcc/builtins.cc
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--- 3202,3208 ----
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! 542c803f6a28d39f6101f0d3286bd240  gcc/builtins.cc
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*************** d790ecc09ebef93e83ed249e4941fda4  gcc/co
*** 3722,3728 ****
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! 4639c23d19b1e88e0d32ef64d889c37e  gcc/config/arm/neon.md
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--- 3722,3728 ----
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*************** de4e89bc042c6bc7eb093bda5d33a266  gcc/co
*** 4266,4272 ****
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--- 4266,4272 ----
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*************** d4774d1c1bf66446a29da4693ee53d1e  gcc/co
*** 4319,4325 ****
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--- 4319,4325 ----
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! 82399aeaa1c5709524b16e94186d7bc7  gcc/config/i386/x86-tune.def
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*************** c69ef27c10b319a5443289af516f40b8  gcc/co
*** 4413,4419 ****
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! c4e370331da2f019efa9365b9471110e  gcc/config/loongarch/lasx.md
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--- 4413,4419 ----
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*************** d70f08b893e019d12b16dc9a70754ef9  gcc/co
*** 5033,5039 ****
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! e84127a4493a0433c0798fb72e06f484  gcc/config/rs6000/altivec.md
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--- 5033,5039 ----
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! c95ef79b0d39ab81739003cca63c7c2c  gcc/config/rs6000/altivec.md
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*************** a9c3cddee4e237141062720b72fe38cd  gcc/co
*** 5500,5506 ****
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--- 5500,5506 ----
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*************** e5ccdda9d62d96ac397910d0fa391b0a  gcc/cp
*** 5560,5566 ****
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--- 5560,5566 ----
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*************** c2a7409e57253e5d9bfd8ce29fb85212  gcc/cp
*** 5585,5593 ****
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--- 5585,5593 ----
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*************** e7580325e4512cd9f5c2d665b528fa8f  gcc/fi
*** 6057,6063 ****
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*** 117908,117913 ****
--- 117929,117935 ----
  5fb2390505ce446a223d21f02b332874  gcc/testsuite/selftests/x86_64/copy-hard-reg-into-frame.rtl
  e42076aeff1c5ac155a88db5b1993d38  gcc/testsuite/selftests/x86_64/times-two.rtl
  195d431640249dac1928ced4d93ecb76  gcc/testsuite/selftests/x86_64/unspec.rtl
+ 5bf662844191f6cef3adde64d58741b4  gcc/testsuite/sparseset.supp
  4f2cac6fe70242fd7fe19fc4905f4d47  gcc/text-art/box-drawing-chars.inc
  5d65dcbc77e136bacdbafd25df3f5adb  gcc/text-art/box-drawing.cc
  fa30a9d397e3ed1585af5280c4658965  gcc/text-art/box-drawing.h
*************** fbcc93539b376489c1256eb8cf2d4800  gcc/tr
*** 118029,118035 ****
  189317c0b965ddd0ee491f8e45af4b0d  gcc/tree-ssa-loop-niter.h
  523a4b7c5b7113009b3b1f0f514d0cd3  gcc/tree-ssa-loop-prefetch.cc
  164c07dbb4079f7d4f41eb0101ed3193  gcc/tree-ssa-loop-split.cc
! 57dcd3919dadb6f23e2bcefe55f7cd14  gcc/tree-ssa-loop-unswitch.cc
  2f97e7f187f4f4cce48b71489ef542a0  gcc/tree-ssa-loop.cc
  538146c17730f67ffcc58afdfcc93712  gcc/tree-ssa-loop.h
  63757376d191769eb10c935d75de61bd  gcc/tree-ssa-math-opts.cc
--- 118051,118057 ----
  189317c0b965ddd0ee491f8e45af4b0d  gcc/tree-ssa-loop-niter.h
  523a4b7c5b7113009b3b1f0f514d0cd3  gcc/tree-ssa-loop-prefetch.cc
  164c07dbb4079f7d4f41eb0101ed3193  gcc/tree-ssa-loop-split.cc
! ada2da4e4f03dd37043a0cc6daa67681  gcc/tree-ssa-loop-unswitch.cc
  2f97e7f187f4f4cce48b71489ef542a0  gcc/tree-ssa-loop.cc
  538146c17730f67ffcc58afdfcc93712  gcc/tree-ssa-loop.h
  63757376d191769eb10c935d75de61bd  gcc/tree-ssa-math-opts.cc
*************** c0b0549adb2c1140cf285901abb5a78c  gcc/tr
*** 118038,118044 ****
  da72a60de8a6f51a635ead26120d3cc7  gcc/tree-ssa-operands.h
  c5c94f731fa48c6557765e712c67aaf5  gcc/tree-ssa-phiopt.cc
  0864f59d85045caee0a643f82fa6d20c  gcc/tree-ssa-phiprop.cc
! 0c173f8637d1259922572eb432a405ef  gcc/tree-ssa-pre.cc
  bc94d7017980d97ff957feb308ae771c  gcc/tree-ssa-propagate.cc
  299c5d8dabcb4a4d30bab51fbedc4e68  gcc/tree-ssa-propagate.h
  233d764ee886ccb3223d08a55f2a1ddc  gcc/tree-ssa-reassoc.cc
--- 118060,118066 ----
  da72a60de8a6f51a635ead26120d3cc7  gcc/tree-ssa-operands.h
  c5c94f731fa48c6557765e712c67aaf5  gcc/tree-ssa-phiopt.cc
  0864f59d85045caee0a643f82fa6d20c  gcc/tree-ssa-phiprop.cc
! 56669b2d0405dccdeb2acb778d058e82  gcc/tree-ssa-pre.cc
  bc94d7017980d97ff957feb308ae771c  gcc/tree-ssa-propagate.cc
  299c5d8dabcb4a4d30bab51fbedc4e68  gcc/tree-ssa-propagate.h
  233d764ee886ccb3223d08a55f2a1ddc  gcc/tree-ssa-reassoc.cc
*************** cc0bdf3f684b251509b8552d2d8549a3  gcc/tr
*** 118080,118087 ****
  a41c3fb8911461149186ff901cf31d4a  gcc/tree-vect-loop.cc
  77240c08cea454c2d4a449206f7930c3  gcc/tree-vect-patterns.cc
  75eb406d11bc2ae9f01cc1e72787b3d5  gcc/tree-vect-slp-patterns.cc
! 1509298594ae256fc192ed720185ee63  gcc/tree-vect-slp.cc
! 257592dcaddb183075b1dc6505be744b  gcc/tree-vect-stmts.cc
  c8efeee600d612c4bae8dda4bd45ee54  gcc/tree-vector-builder.cc
  258611ff1e83cc7680e8c9f033499665  gcc/tree-vector-builder.h
  6a5457c324d4279acbd82f147f1dd823  gcc/tree-vectorizer.cc
--- 118102,118109 ----
  a41c3fb8911461149186ff901cf31d4a  gcc/tree-vect-loop.cc
  77240c08cea454c2d4a449206f7930c3  gcc/tree-vect-patterns.cc
  75eb406d11bc2ae9f01cc1e72787b3d5  gcc/tree-vect-slp-patterns.cc
! a090557cdadf056f684074809754a3eb  gcc/tree-vect-slp.cc
! 4572489a3aeb1a3163bd6409309fe0c5  gcc/tree-vect-stmts.cc
  c8efeee600d612c4bae8dda4bd45ee54  gcc/tree-vector-builder.cc
  258611ff1e83cc7680e8c9f033499665  gcc/tree-vector-builder.h
  6a5457c324d4279acbd82f147f1dd823  gcc/tree-vectorizer.cc
*************** d680e7307fb59fe24f8431e179191f16  libssp
*** 132124,132130 ****
  534c3fb4a88e5c1f70db35c12b7742c3  libssp/vsnprintf-chk.c
  34daeb04a522ee796098df4446d6ce61  libssp/vsprintf-chk.c
  9e2de2e1f20ab0ffa2201164de02824f  libstdc++-v3/.editorconfig
! d0e0c98efe92e7dec2089b86ce0b0208  libstdc++-v3/ChangeLog
  7aa6c40440a44fcf5ec94c066160c2f8  libstdc++-v3/ChangeLog-1998
  7aff86600b6a1ed3fa87305075a92db0  libstdc++-v3/ChangeLog-1999
  a6f28e8fc9bb07696a9e068b439a3a87  libstdc++-v3/ChangeLog-2000
--- 132146,132152 ----
  534c3fb4a88e5c1f70db35c12b7742c3  libssp/vsnprintf-chk.c
  34daeb04a522ee796098df4446d6ce61  libssp/vsprintf-chk.c
  9e2de2e1f20ab0ffa2201164de02824f  libstdc++-v3/.editorconfig
! 84722f5c64ee73eada3879d01d092271  libstdc++-v3/ChangeLog
  7aa6c40440a44fcf5ec94c066160c2f8  libstdc++-v3/ChangeLog-1998
  7aff86600b6a1ed3fa87305075a92db0  libstdc++-v3/ChangeLog-1999
  a6f28e8fc9bb07696a9e068b439a3a87  libstdc++-v3/ChangeLog-2000
*************** f801ad9baad07e266be912cfec758b44  libstd
*** 132166,132172 ****
  13f901be7333a2072916659b04e88e8d  libstdc++-v3/config/abi/post/i386-solaris/amd64/baseline_symbols.txt
  d45eb5f70812c01e9571ca948c4da8cd  libstdc++-v3/config/abi/post/i386-solaris/baseline_symbols.txt
  0feacae434c67857f81d494f83cf3851  libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt
! 01500b319bb297b4059106c465b92567  libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt
  97784a5e669593e12f36ff38c1ed28cd  libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt
  61308215d393f11169ace76935f2b034  libstdc++-v3/config/abi/post/mips-linux-gnu/baseline_symbols.txt
  725325d7b24195d1e6374ce4e24afdb0  libstdc++-v3/config/abi/post/mips64-linux-gnu/32/baseline_symbols.txt
--- 132188,132194 ----
  13f901be7333a2072916659b04e88e8d  libstdc++-v3/config/abi/post/i386-solaris/amd64/baseline_symbols.txt
  d45eb5f70812c01e9571ca948c4da8cd  libstdc++-v3/config/abi/post/i386-solaris/baseline_symbols.txt
  0feacae434c67857f81d494f83cf3851  libstdc++-v3/config/abi/post/i486-linux-gnu/baseline_symbols.txt
! 5dca274dfeba1c1c125014f358dc6b89  libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt
  97784a5e669593e12f36ff38c1ed28cd  libstdc++-v3/config/abi/post/m68k-linux-gnu/baseline_symbols.txt
  61308215d393f11169ace76935f2b034  libstdc++-v3/config/abi/post/mips-linux-gnu/baseline_symbols.txt
  725325d7b24195d1e6374ce4e24afdb0  libstdc++-v3/config/abi/post/mips64-linux-gnu/32/baseline_symbols.txt
*************** a155d2afa910d24be0955f42c4585228  libstd
*** 132814,132820 ****
  4ab7627c024bab75db708e43d35616aa  libstdc++-v3/include/bits/char_traits.h
  195dabcb74f9b313c574745539925b0e  libstdc++-v3/include/bits/charconv.h
  8a303c55e1a9a90d751641a38581e2bc  libstdc++-v3/include/bits/chrono.h
! 3448d66faf4aeb61396ce4ac5dbcc176  libstdc++-v3/include/bits/chrono_io.h
  2ff73cb405cb01626a751e0fa0f339f3  libstdc++-v3/include/bits/codecvt.h
  23fc42ee8644308c793f44d20f00420e  libstdc++-v3/include/bits/concept_check.h
  e999e0783a5ca2165919f352526501e9  libstdc++-v3/include/bits/cow_string.h
--- 132836,132842 ----
  4ab7627c024bab75db708e43d35616aa  libstdc++-v3/include/bits/char_traits.h
  195dabcb74f9b313c574745539925b0e  libstdc++-v3/include/bits/charconv.h
  8a303c55e1a9a90d751641a38581e2bc  libstdc++-v3/include/bits/chrono.h
! f220a3edd81f69f475178857df2cbeb7  libstdc++-v3/include/bits/chrono_io.h
  2ff73cb405cb01626a751e0fa0f339f3  libstdc++-v3/include/bits/codecvt.h
  23fc42ee8644308c793f44d20f00420e  libstdc++-v3/include/bits/concept_check.h
  e999e0783a5ca2165919f352526501e9  libstdc++-v3/include/bits/cow_string.h
*************** f5af35184f655abcf9edbb76a7ac9985  libstd
*** 133828,133834 ****
  96c5a746ee563d36d5c93056996ec3ff  libstdc++-v3/src/c++11/streambuf-inst.cc
  63b97d5a214a3ed86e82dff205caf8b0  libstdc++-v3/src/c++11/string-inst.cc
  51eb59aec233df19c1193a1961362c36  libstdc++-v3/src/c++11/string-io-inst.cc
! b8e7b1593e5ed3dee7f0c98b40666a11  libstdc++-v3/src/c++11/system_error.cc
  2c8e1fdeb39d12dc28ddf3a5f6aaaf99  libstdc++-v3/src/c++11/thread.cc
  8f11c4680a8c193b75888713450f5ae3  libstdc++-v3/src/c++11/wlocale-inst.cc
  9a2f4bc77bc2e1c94a8b5cefd3821420  libstdc++-v3/src/c++11/wstring-inst.cc
--- 133850,133856 ----
  96c5a746ee563d36d5c93056996ec3ff  libstdc++-v3/src/c++11/streambuf-inst.cc
  63b97d5a214a3ed86e82dff205caf8b0  libstdc++-v3/src/c++11/string-inst.cc
  51eb59aec233df19c1193a1961362c36  libstdc++-v3/src/c++11/string-io-inst.cc
! 2d92d6ae252ba9485d45f9cd723caf2b  libstdc++-v3/src/c++11/system_error.cc
  2c8e1fdeb39d12dc28ddf3a5f6aaaf99  libstdc++-v3/src/c++11/thread.cc
  8f11c4680a8c193b75888713450f5ae3  libstdc++-v3/src/c++11/wlocale-inst.cc
  9a2f4bc77bc2e1c94a8b5cefd3821420  libstdc++-v3/src/c++11/wstring-inst.cc
*************** f18e7cefbea6929c94bbd2d65539b270  libstd
*** 134151,134157 ****
  f5897a45c81923d805b6e5ff5a13315f  libstdc++-v3/testsuite/19_diagnostics/error_category/operators/less.cc
  c2a9a6f57e2374ca35e3ff15856e5819  libstdc++-v3/testsuite/19_diagnostics/error_category/operators/not_equal.cc
  d4d6fd6e2c4dd3c75ef8ea215bece650  libstdc++-v3/testsuite/19_diagnostics/error_category/operators/three_way.cc
! bafaff2a0448a9d24053e0a40a4cc2bd  libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc
  25ceafd7651ec34c0cdd5f53d98d4da1  libstdc++-v3/testsuite/19_diagnostics/error_code/cons/1.cc
  07166070b38578a6b31c3c7fb96b0e85  libstdc++-v3/testsuite/19_diagnostics/error_code/cons/39882.cc
  81f9725b7658563bbe88b3ba6c3c1852  libstdc++-v3/testsuite/19_diagnostics/error_code/cons/lwg3629.cc
--- 134173,134179 ----
  f5897a45c81923d805b6e5ff5a13315f  libstdc++-v3/testsuite/19_diagnostics/error_category/operators/less.cc
  c2a9a6f57e2374ca35e3ff15856e5819  libstdc++-v3/testsuite/19_diagnostics/error_category/operators/not_equal.cc
  d4d6fd6e2c4dd3c75ef8ea215bece650  libstdc++-v3/testsuite/19_diagnostics/error_category/operators/three_way.cc
! c8bf8de335cbc15b8f2415786da5547b  libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc
  25ceafd7651ec34c0cdd5f53d98d4da1  libstdc++-v3/testsuite/19_diagnostics/error_code/cons/1.cc
  07166070b38578a6b31c3c7fb96b0e85  libstdc++-v3/testsuite/19_diagnostics/error_code/cons/39882.cc
  81f9725b7658563bbe88b3ba6c3c1852  libstdc++-v3/testsuite/19_diagnostics/error_code/cons/lwg3629.cc
*************** dcb9d587d1738c8bdb50039c6928431e  libstd
*** 143157,143163 ****
  54378d7890a365088cc6292493caf83d  libstdc++-v3/testsuite/std/time/month_weekday_last/io.cc
  60231b6bb71cc9175500ebf6d9f92ceb  libstdc++-v3/testsuite/std/time/parse/114240.cc
  a0be85b8053be995a48a4cfec6a5b675  libstdc++-v3/testsuite/std/time/parse/114279.cc
! a62052228d6df7ad716017e0526fa955  libstdc++-v3/testsuite/std/time/parse/parse.cc
  8e3bf07939ba94874a6652e2a596d549  libstdc++-v3/testsuite/std/time/syn_c++20.cc
  f9d9d1cb483f1731762a8e5787c8020b  libstdc++-v3/testsuite/std/time/time_zone/get_info_local.cc
  d041367e20c424ad627fce102335edd0  libstdc++-v3/testsuite/std/time/time_zone/get_info_sys.cc
--- 143179,143185 ----
  54378d7890a365088cc6292493caf83d  libstdc++-v3/testsuite/std/time/month_weekday_last/io.cc
  60231b6bb71cc9175500ebf6d9f92ceb  libstdc++-v3/testsuite/std/time/parse/114240.cc
  a0be85b8053be995a48a4cfec6a5b675  libstdc++-v3/testsuite/std/time/parse/114279.cc
! 4650244d174eff0342f84405e248bbfe  libstdc++-v3/testsuite/std/time/parse/parse.cc
  8e3bf07939ba94874a6652e2a596d549  libstdc++-v3/testsuite/std/time/syn_c++20.cc
  f9d9d1cb483f1731762a8e5787c8020b  libstdc++-v3/testsuite/std/time/time_zone/get_info_local.cc
  d041367e20c424ad627fce102335edd0  libstdc++-v3/testsuite/std/time/time_zone/get_info_sys.cc
diff -Nrcpad gcc-15-20260117/gcc/ChangeLog gcc-15-20260124/gcc/ChangeLog
*** gcc-15-20260117/gcc/ChangeLog	Sat Jan 17 22:32:05 2026
--- gcc-15-20260124/gcc/ChangeLog	Sat Jan 24 22:32:04 2026
***************
*** 1,3 ****
--- 1,118 ----
+ 2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/123703
+ 	* builtins.cc (fold_builtin_abs): Return NULL_TREE if type is not
+ 	integral.
+ 
+ 2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-22  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/123736
+ 	* tree-ssa-loop-unswitch.cc (hoist_guard): Guard dump message
+ 	on dump_file && (dump_flags & TDF_DETAILS) condition.
+ 
+ 2026-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-01-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/123741
+ 	* tree-vect-stmts.cc (vectorizable_store): Add missing check
+ 	on loop vectorization.
+ 
+ 2026-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-01-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/123602
+ 	* tree-ssa-pre.cc (find_or_generate_expression): Do not
+ 	generate references to abnormal SSA names.
+ 
+ 2026-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-01-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/123107
+ 	* fold-const.cc (fold_binary_loc): Guard (v >> CST) == { 0, 0.. }
+ 	to v < { 0, 0.. } folding.
+ 
+ 2026-01-23  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	Backported from master:
+ 	2026-01-08  Richard Sandiford  <rdsandiford@googlemail.com>
+ 		    Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/122793
+ 	* tree-vect-slp.cc (vect_add_slp_permutation): Document the existing
+ 	identity_offset parameter.  Handle identities that take from the
+ 	second input rather than the first.
+ 
+ 2026-01-23  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	PR target/119130
+ 	* config/rs6000/altivec.md (convert_4f32_8f16): Use same operand
+ 	order for both endian format.
+ 
+ 2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	Backported from master:
+ 	2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	* config/i386/sse.md (avx2_vbroadcasti128_<mode>): Constraint
+ 	alternative 0 with jm and add gpr16 attr to avoid egpr usage.
+ 
+ 2026-01-23  Lili Cui  <lili.cui@intel.com>
+ 
+ 	Backported from master:
+ 	2026-01-14  Lili Cui  <lili.cui@intel.com>
+ 
+ 	* config/i386/x86-tune.def (X86_TUNE_ALIGN_TIGHT_LOOPS):
+ 	disable tight loop alignment for m_CORE_ATOM.
+ 
+ 2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/123742
+ 	* config/arm/neon.md (*smin<mode>3_neon): Renamed to ...
+ 	(*smin<VDQWH:mode>3_neon): ... this.  Add HFmode support.
+ 	(*smax<mode>3_neon): Renamed to ...
+ 	(*smax<VDQWH:mode>3_neon): ... this.  Add HFmode support.
+ 
+ 2026-01-19  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-16  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/123092
+ 	* lra-constraints.cc (lra_constraints): Push insn on processing
+ 	stack after equivalence substitution.
+ 
+ 2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	PR target/117575
+ 	* config/loongarch/lasx.md: Modify the range of operand1.
+ 
+ 2026-01-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/123513
+ 	* tree.cc (valid_new_delete_pair_p): If new_name[3] or delete_name[3]
+ 	is 'I', return false with *pcertain set to false rather than true.
+ 
  2026-01-16  Jakub Jelinek  <jakub@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260117/gcc/DATESTAMP gcc-15-20260124/gcc/DATESTAMP
*** gcc-15-20260117/gcc/DATESTAMP	Sat Jan 17 22:32:06 2026
--- gcc-15-20260124/gcc/DATESTAMP	Sat Jan 24 22:32:05 2026
***************
*** 1 ****
! 20260117
--- 1 ----
! 20260124
diff -Nrcpad gcc-15-20260117/gcc/ada/ChangeLog gcc-15-20260124/gcc/ada/ChangeLog
*** gcc-15-20260117/gcc/ada/ChangeLog	Sat Jan 17 22:32:06 2026
--- gcc-15-20260124/gcc/ada/ChangeLog	Sat Jan 24 22:32:05 2026
***************
*** 1,3 ****
--- 1,27 ----
+ 2026-01-21  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* sem_ch13.adb (Analyze_Aspects_At_Freeze_Point): Replace call to
+ 	Scope_Within_Or_Same (Current_Scope, S) with In_Open_Scopes (S) to
+ 	test whether S is open in the current scope.
+ 	* sem_util.adb (From_Nested_Package): Likewise.
+ 
+ 2026-01-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 	    Lisa Felidae  <lisa@felidae.bam.moe>
+ 
+ 	PR ada/68179
+ 	PR ada/123589
+ 	* exp_ch3.adb (Expand_Freeze_Array_Type): Build an initialization
+ 	procedure for a bit-packed array type if Has_Default_Aspect is set
+ 	on the base type, but make sure not to build it twice.  Also test
+ 	Has_Default_Aspect for a type derived from String.
+ 
+ 2026-01-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	PR ada/68179
+ 	* exp_ch3.adb (Expand_Freeze_Array_Type): Build an initialization
+ 	procedure for a type derived from String declared with the aspect
+ 	Default_Aspect_Component_Value.
+ 
  2026-01-03  Eric Botcazou  <ebotcazou@gcc.gnu.org>
  
  	PR ada/123371
diff -Nrcpad gcc-15-20260117/gcc/ada/sem_ch13.adb gcc-15-20260124/gcc/ada/sem_ch13.adb
*** gcc-15-20260117/gcc/ada/sem_ch13.adb	Sat Jan 17 22:32:06 2026
--- gcc-15-20260124/gcc/ada/sem_ch13.adb	Sat Jan 24 22:32:05 2026
*************** package body Sem_Ch13 is
*** 1340,1348 ****
        --  at the ends of certain declaration lists (like visible-part lists),
        --  not when this procedure is called at arbitrary freeze points.
  
!       if not Nonoverridable_Only
!         and then not Scope_Within_Or_Same (Current_Scope, Scope (E))
!       then
           if Is_Type (E) and then From_Nested_Package (E) then
              declare
                 Pack : constant Entity_Id := Scope (E);
--- 1340,1346 ----
        --  at the ends of certain declaration lists (like visible-part lists),
        --  not when this procedure is called at arbitrary freeze points.
  
!       if not Nonoverridable_Only and then not In_Open_Scopes (Scope (E)) then
           if Is_Type (E) and then From_Nested_Package (E) then
              declare
                 Pack : constant Entity_Id := Scope (E);
diff -Nrcpad gcc-15-20260117/gcc/ada/sem_util.adb gcc-15-20260124/gcc/ada/sem_util.adb
*** gcc-15-20260117/gcc/ada/sem_util.adb	Sat Jan 17 22:32:06 2026
--- gcc-15-20260124/gcc/ada/sem_util.adb	Sat Jan 24 22:32:05 2026
*************** package body Sem_Util is
*** 9567,9573 ****
        return
          Ekind (Pack) = E_Package
            and then not Is_Frozen (Pack)
!           and then not Scope_Within_Or_Same (Current_Scope, Pack)
            and then In_Open_Scopes (Scope (Pack));
     end From_Nested_Package;
  
--- 9567,9573 ----
        return
          Ekind (Pack) = E_Package
            and then not Is_Frozen (Pack)
!           and then not In_Open_Scopes (Pack)
            and then In_Open_Scopes (Scope (Pack));
     end From_Nested_Package;
  
diff -Nrcpad gcc-15-20260117/gcc/builtins.cc gcc-15-20260124/gcc/builtins.cc
*** gcc-15-20260117/gcc/builtins.cc	Sat Jan 17 22:32:06 2026
--- gcc-15-20260124/gcc/builtins.cc	Sat Jan 24 22:32:05 2026
*************** fold_builtin_fabs (location_t loc, tree
*** 9522,9528 ****
  static tree
  fold_builtin_abs (location_t loc, tree arg, tree type)
  {
!   if (!validate_arg (arg, INTEGER_TYPE))
      return NULL_TREE;
  
    if (TYPE_UNSIGNED (type))
--- 9522,9528 ----
  static tree
  fold_builtin_abs (location_t loc, tree arg, tree type)
  {
!   if (!validate_arg (arg, INTEGER_TYPE) || !INTEGRAL_TYPE_P (type))
      return NULL_TREE;
  
    if (TYPE_UNSIGNED (type))
diff -Nrcpad gcc-15-20260117/gcc/config/arm/neon.md gcc-15-20260124/gcc/config/arm/neon.md
*** gcc-15-20260117/gcc/config/arm/neon.md	Sat Jan 17 22:32:06 2026
--- gcc-15-20260124/gcc/config/arm/neon.md	Sat Jan 24 22:32:05 2026
***************
*** 872,882 ****
    [(set_attr "type" "neon_minmax<q>")]
  )
  
! (define_insn "*smin<mode>3_neon"
!   [(set (match_operand:VDQW 0 "s_register_operand" "=w")
! 	(smin:VDQW (match_operand:VDQW 1 "s_register_operand" "w")
! 		   (match_operand:VDQW 2 "s_register_operand" "w")))]
!   "TARGET_NEON"
    "vmin.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set (attr "type")
        (if_then_else (match_test "<Is_float_mode>")
--- 872,882 ----
    [(set_attr "type" "neon_minmax<q>")]
  )
  
! (define_insn "*smin<VDQWH:mode>3_neon"
!   [(set (match_operand:VDQWH 0 "s_register_operand" "=w")
! 	(smin:VDQWH (match_operand:VDQWH 1 "s_register_operand" "w")
! 		    (match_operand:VDQWH 2 "s_register_operand" "w")))]
!   "ARM_HAVE_NEON_<MODE>_ARITH"
    "vmin.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set (attr "type")
        (if_then_else (match_test "<Is_float_mode>")
***************
*** 884,894 ****
                      (const_string "neon_minmax<q>")))]
  )
  
! (define_insn "*smax<mode>3_neon"
!   [(set (match_operand:VDQW 0 "s_register_operand" "=w")
! 	(smax:VDQW (match_operand:VDQW 1 "s_register_operand" "w")
! 		   (match_operand:VDQW 2 "s_register_operand" "w")))]
!   "TARGET_NEON"
    "vmax.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set (attr "type")
        (if_then_else (match_test "<Is_float_mode>")
--- 884,894 ----
                      (const_string "neon_minmax<q>")))]
  )
  
! (define_insn "*smax<VDQWH:mode>3_neon"
!   [(set (match_operand:VDQWH 0 "s_register_operand" "=w")
! 	(smax:VDQWH (match_operand:VDQWH 1 "s_register_operand" "w")
! 		    (match_operand:VDQWH 2 "s_register_operand" "w")))]
!   "ARM_HAVE_NEON_<MODE>_ARITH"
    "vmax.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
    [(set (attr "type")
        (if_then_else (match_test "<Is_float_mode>")
diff -Nrcpad gcc-15-20260117/gcc/config/i386/sse.md gcc-15-20260124/gcc/config/i386/sse.md
*** gcc-15-20260117/gcc/config/i386/sse.md	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/config/i386/sse.md	Sat Jan 24 22:32:05 2026
***************
*** 27885,27901 ****
  (define_insn "avx2_vbroadcasti128_<mode>"
    [(set (match_operand:VI_256 0 "register_operand" "=x,v,v")
  	(vec_concat:VI_256
! 	  (match_operand:<ssehalfvecmode> 1 "memory_operand" "m,m,m")
  	  (match_dup 1)))]
    "TARGET_AVX2"
    "@
     vbroadcasti128\t{%1, %0|%0, %1}
     vbroadcast<i128vldq>\t{%1, %0|%0, %1}
     vbroadcast<shuffletype>32x4\t{%1, %0|%0, %1}"
!   [(set_attr "isa" "*,avx512dq,avx512vl")
     (set_attr "type" "ssemov")
     (set_attr "prefix_extra" "1")
     (set_attr "prefix" "vex,evex,evex")
     (set_attr "mode" "OI")])
  
  ;; optimize vlddqu + vinserti128 to vbroadcasti128, the former will use
--- 27885,27902 ----
  (define_insn "avx2_vbroadcasti128_<mode>"
    [(set (match_operand:VI_256 0 "register_operand" "=x,v,v")
  	(vec_concat:VI_256
! 	  (match_operand:<ssehalfvecmode> 1 "memory_operand" "jm,m,m")
  	  (match_dup 1)))]
    "TARGET_AVX2"
    "@
     vbroadcasti128\t{%1, %0|%0, %1}
     vbroadcast<i128vldq>\t{%1, %0|%0, %1}
     vbroadcast<shuffletype>32x4\t{%1, %0|%0, %1}"
!   [(set_attr "isa" "noavx512vl,avx512dq,avx512vl")
     (set_attr "type" "ssemov")
     (set_attr "prefix_extra" "1")
     (set_attr "prefix" "vex,evex,evex")
+    (set_attr "addr" "gpr16,*,*")
     (set_attr "mode" "OI")])
  
  ;; optimize vlddqu + vinserti128 to vbroadcasti128, the former will use
diff -Nrcpad gcc-15-20260117/gcc/config/i386/x86-tune.def gcc-15-20260124/gcc/config/i386/x86-tune.def
*** gcc-15-20260117/gcc/config/i386/x86-tune.def	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/config/i386/x86-tune.def	Sat Jan 24 22:32:05 2026
*************** DEF_TUNE (X86_TUNE_FOUR_JUMP_LIMIT, "fou
*** 252,258 ****
  
  /* X86_TUNE_ALIGN_TIGHT_LOOPS: if false, tight loops are not aligned. */
  DEF_TUNE (X86_TUNE_ALIGN_TIGHT_LOOPS, "align_tight_loops",
! 	 ~(m_ZHAOXIN | m_CASCADELAKE | m_SKYLAKE_AVX512))
  
  /*****************************************************************************/
  /* Integer instruction selection tuning                                      */
--- 252,259 ----
  
  /* X86_TUNE_ALIGN_TIGHT_LOOPS: if false, tight loops are not aligned. */
  DEF_TUNE (X86_TUNE_ALIGN_TIGHT_LOOPS, "align_tight_loops",
! 	 ~(m_ZHAOXIN | m_CASCADELAKE | m_SKYLAKE_AVX512
! 	   | m_CORE_ATOM))
  
  /*****************************************************************************/
  /* Integer instruction selection tuning                                      */
diff -Nrcpad gcc-15-20260117/gcc/config/loongarch/lasx.md gcc-15-20260124/gcc/config/loongarch/lasx.md
*** gcc-15-20260117/gcc/config/loongarch/lasx.md	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/config/loongarch/lasx.md	Sat Jan 24 22:32:05 2026
***************
*** 3435,3441 ****
    [(set (match_operand:FLASX 0 "register_operand" "=f")
      (vec_merge:FLASX
        (vec_duplicate:FLASX
!         (match_operand:<UNITMODE> 1 "register_operand" "f"))
        (match_operand:FLASX 2 "register_operand" "0")
        (match_operand 3 "const_<bitmask256>_operand" "")))]
    "ISA_HAS_LASX"
--- 3435,3441 ----
    [(set (match_operand:FLASX 0 "register_operand" "=f")
      (vec_merge:FLASX
        (vec_duplicate:FLASX
!         (match_operand:<UNITMODE> 1 "reg_or_0_operand" "f"))
        (match_operand:FLASX 2 "register_operand" "0")
        (match_operand 3 "const_<bitmask256>_operand" "")))]
    "ISA_HAS_LASX"
diff -Nrcpad gcc-15-20260117/gcc/config/rs6000/altivec.md gcc-15-20260124/gcc/config/rs6000/altivec.md
*** gcc-15-20260117/gcc/config/rs6000/altivec.md	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/config/rs6000/altivec.md	Sat Jan 24 22:32:06 2026
***************
*** 3625,3634 ****
  
    emit_insn (gen_vsx_xvcvsphp (rtx_tmp_hi, operands[1]));
    emit_insn (gen_vsx_xvcvsphp (rtx_tmp_lo, operands[2]));
!   if (!BYTES_BIG_ENDIAN)
!     emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_hi, rtx_tmp_lo));
!   else
!     emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_lo, rtx_tmp_hi));
    DONE;
  })
  
--- 3625,3631 ----
  
    emit_insn (gen_vsx_xvcvsphp (rtx_tmp_hi, operands[1]));
    emit_insn (gen_vsx_xvcvsphp (rtx_tmp_lo, operands[2]));
!   emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_hi, rtx_tmp_lo));
    DONE;
  })
  
diff -Nrcpad gcc-15-20260117/gcc/cp/ChangeLog gcc-15-20260124/gcc/cp/ChangeLog
*** gcc-15-20260117/gcc/cp/ChangeLog	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/cp/ChangeLog	Sat Jan 24 22:32:06 2026
***************
*** 1,3 ****
--- 1,32 ----
+ 2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/123597
+ 	* parser.cc (substitute_in_tree_walker, substitute_in_tree): Don't
+ 	consider BIND_EXPRs with !BIND_EXPR_VARS redundant if
+ 	processing_template_decl.
+ 
+ 2026-01-20  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 
+ 	Backported from master:
+ 	2025-12-23  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 
+ 	PR c++/122550
+ 	* decl.cc (member_like_constrained_friend_p): Check that the
+ 	friend's enclosing class is an implicit instantiation.
+ 
+ 2026-01-20  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 
+ 	Backported from master:
+ 	2025-12-18  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 		    Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/122070
+ 	* pt.cc (type_targs_deducible_from): Fall back to
+ 	TYPE_TEMPLATE_INFO when TYPE_TEMPLATE_INFO_MAYBE_ALIAS is NULL.
+ 
  2026-01-16  Jakub Jelinek  <jakub@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260117/gcc/cp/decl.cc gcc-15-20260124/gcc/cp/decl.cc
*** gcc-15-20260117/gcc/cp/decl.cc	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/cp/decl.cc	Sat Jan 24 22:32:06 2026
*************** member_like_constrained_friend_p (tree d
*** 1012,1017 ****
--- 1012,1018 ----
  	  && DECL_UNIQUE_FRIEND_P (decl)
  	  && DECL_FRIEND_CONTEXT (decl)
  	  && get_constraints (decl)
+ 	  && CLASSTYPE_IMPLICIT_INSTANTIATION (DECL_FRIEND_CONTEXT (decl))
  	  && (!DECL_TEMPLATE_INFO (decl)
  	      || !PRIMARY_TEMPLATE_P (DECL_TI_TEMPLATE (decl))
  	      || (uses_outer_template_parms_in_constraints
diff -Nrcpad gcc-15-20260117/gcc/cp/parser.cc gcc-15-20260124/gcc/cp/parser.cc
*** gcc-15-20260117/gcc/cp/parser.cc	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/cp/parser.cc	Sat Jan 24 22:32:06 2026
*************** substitute_in_tree_walker (tree *tp, int
*** 46898,46903 ****
--- 46898,46906 ----
    else if (TREE_CODE (*tp) == BIND_EXPR
  	   && BIND_EXPR_BODY (*tp) == sit->orig
  	   && !BIND_EXPR_VARS (*tp)
+ 	   /* BIND_EXPRs in templates likely have NULL BIND_EXPR_VARS,
+ 	      are created by begin_compound_stmt and are not redundant.  */
+ 	   && !processing_template_decl
  	   && (sit->flatten || TREE_CODE (sit->repl) == BIND_EXPR))
      {
        *tp = sit->repl;
*************** substitute_in_tree (tree *context, tree
*** 46942,46948 ****
    struct sit_data data;
  
    gcc_assert (*context && orig && repl);
!   if (TREE_CODE (repl) == BIND_EXPR && !BIND_EXPR_VARS (repl))
      repl = BIND_EXPR_BODY (repl);
    data.orig = orig;
    data.repl = repl;
--- 46945,46956 ----
    struct sit_data data;
  
    gcc_assert (*context && orig && repl);
!   /* Look through redundant BIND_EXPR.  BIND_EXPRs in templates likely have
!      NULL BIND_EXPR_VARS, are created by begin_compound_stmt and are not
!      redundant.  */
!   if (TREE_CODE (repl) == BIND_EXPR
!       && !BIND_EXPR_VARS (repl)
!       && !processing_template_decl)
      repl = BIND_EXPR_BODY (repl);
    data.orig = orig;
    data.repl = repl;
diff -Nrcpad gcc-15-20260117/gcc/cp/pt.cc gcc-15-20260124/gcc/cp/pt.cc
*** gcc-15-20260117/gcc/cp/pt.cc	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/cp/pt.cc	Sat Jan 24 22:32:06 2026
*************** type_targs_deducible_from (tree tmpl, tr
*** 31296,31302 ****
  	 per alias_ctad_tweaks.  */
        tparms = INNERMOST_TEMPLATE_PARMS (TREE_PURPOSE (tmpl));
        ttype = TREE_VALUE (tmpl);
!       tmpl = TI_TEMPLATE (TYPE_TEMPLATE_INFO_MAYBE_ALIAS (ttype));
      }
  
    int len = TREE_VEC_LENGTH (tparms);
--- 31296,31306 ----
  	 per alias_ctad_tweaks.  */
        tparms = INNERMOST_TEMPLATE_PARMS (TREE_PURPOSE (tmpl));
        ttype = TREE_VALUE (tmpl);
!       tree ti = TYPE_TEMPLATE_INFO_MAYBE_ALIAS (ttype);
!       if (!ti)
! 	/* TTYPE is a typedef to a template-id.  */
! 	ti = TYPE_TEMPLATE_INFO (ttype);
!       tmpl = TI_TEMPLATE (ti);
      }
  
    int len = TREE_VEC_LENGTH (tparms);
diff -Nrcpad gcc-15-20260117/gcc/fold-const.cc gcc-15-20260124/gcc/fold-const.cc
*** gcc-15-20260117/gcc/fold-const.cc	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/fold-const.cc	Sat Jan 24 22:32:06 2026
*************** along with GCC; see the file COPYING3.
*** 86,91 ****
--- 86,92 ----
  #include "vec-perm-indices.h"
  #include "asan.h"
  #include "gimple-range.h"
+ #include "optabs-tree.h"
  
  /* Nonzero if we are folding constants inside an initializer or a C++
     manifestly-constant-evaluated context; zero otherwise.
*************** fold_binary_loc (location_t loc, enum tr
*** 12382,12389 ****
  		  itype = signed_type_for (itype);
  		  arg00 = fold_convert_loc (loc, itype, arg00);
  		}
! 	      return fold_build2_loc (loc, code == EQ_EXPR ? GE_EXPR : LT_EXPR,
! 				  type, arg00, build_zero_cst (itype));
  	    }
  	}
  
--- 12383,12402 ----
  		  itype = signed_type_for (itype);
  		  arg00 = fold_convert_loc (loc, itype, arg00);
  		}
! 	      enum tree_code code2 = code == EQ_EXPR ? GE_EXPR : LT_EXPR;
! 	      /* Make sure to transform vector compares only to supported
! 		 ones or from unsupported ones and check that only after
! 		 IPA so offloaded code is handled correctly in this regard.  */
! 	      if (!VECTOR_TYPE_P (itype)
! 		  || (cfun
! 		      && cfun->after_inlining
! 		      /* We can jump on EQ/NE but not GE/LT.  */
! 		      && VECTOR_BOOLEAN_TYPE_P (type)
! 		      && (expand_vec_cmp_expr_p (itype, type, code2)
! 			  || !expand_vec_cmp_expr_p (TREE_TYPE (op0),
! 						     type, code))))
! 		return fold_build2_loc (loc, code2,
! 					type, arg00, build_zero_cst (itype));
  	    }
  	}
  
diff -Nrcpad gcc-15-20260117/gcc/lra-constraints.cc gcc-15-20260124/gcc/lra-constraints.cc
*** gcc-15-20260117/gcc/lra-constraints.cc	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/lra-constraints.cc	Sat Jan 24 22:32:06 2026
*************** lra_constraints (bool first_p)
*** 5595,5600 ****
--- 5595,5601 ----
  		   && loc_equivalence_change_p (&PATTERN (curr_insn)))
  	    {
  	      lra_update_insn_regno_info (curr_insn);
+ 	      lra_push_insn_by_uid (INSN_UID (curr_insn));
  	      changed_p = true;
  	    }
  	}
diff -Nrcpad gcc-15-20260117/gcc/po/ChangeLog gcc-15-20260124/gcc/po/ChangeLog
*** gcc-15-20260117/gcc/po/ChangeLog	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/po/ChangeLog	Sat Jan 24 22:32:06 2026
***************
*** 1,3 ****
--- 1,7 ----
+ 2026-01-19  Joseph Myers  <josmyers@redhat.com>
+ 
+ 	* es.po: Update.
+ 
  2025-11-10  Joseph Myers  <josmyers@redhat.com>
  
  	* es.po: Update.
diff -Nrcpad gcc-15-20260117/gcc/po/es.po gcc-15-20260124/gcc/po/es.po
*** gcc-15-20260117/gcc/po/es.po	Sat Jan 17 22:32:07 2026
--- gcc-15-20260124/gcc/po/es.po	Sat Jan 24 22:32:06 2026
*************** msgstr ""
*** 45,51 ****
  "Project-Id-Version: gcc 15.2.0\n"
  "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n"
  "POT-Creation-Date: 2025-08-01 17:58+0000\n"
! "PO-Revision-Date: 2025-11-08 22:02+0100\n"
  "Last-Translator: Antonio Ceballos Roa <aceballos@gmail.com>\n"
  "Language-Team: Spanish <es@tp.org.es>\n"
  "Language: es\n"
--- 45,51 ----
  "Project-Id-Version: gcc 15.2.0\n"
  "Report-Msgid-Bugs-To: https://gcc.gnu.org/bugs/\n"
  "POT-Creation-Date: 2025-08-01 17:58+0000\n"
! "PO-Revision-Date: 2026-01-17 19:30+0100\n"
  "Last-Translator: Antonio Ceballos Roa <aceballos@gmail.com>\n"
  "Language-Team: Spanish <es@tp.org.es>\n"
  "Language: es\n"
*************** msgid "Param to control which writeback
*** 6691,6700 ****
  msgstr "Parámetro para controlar qué oportunidades de retroescritura intentamos manejar en los pasos de fusión load/store.  Un valor de cero deshabilita el manejo de la retroescritura. Uno significa que intentamos formar pares implicando uno o más accesos de retroescritura individuales existentes cuando sea posible.  Un valor de dos significa que también intentamos oportunísticamente formar oportunidades de retroescritura incorporando actualizaciones destructivas residuales del registro base utilizado por un par."
  
  #: config/aarch64/aarch64.opt:437
! #, fuzzy, no-c-format
! #| msgid "Warn about underflow of numerical constant expressions."
  msgid "Warn about usage of experimental Function Multi Versioning."
! msgstr "Avisa sobre desbordamiento por debajo de expresiones numéricas constantes."
  
  #: config/linux.opt:24
  #, no-c-format
--- 6691,6699 ----
  msgstr "Parámetro para controlar qué oportunidades de retroescritura intentamos manejar en los pasos de fusión load/store.  Un valor de cero deshabilita el manejo de la retroescritura. Uno significa que intentamos formar pares implicando uno o más accesos de retroescritura individuales existentes cuando sea posible.  Un valor de dos significa que también intentamos oportunísticamente formar oportunidades de retroescritura incorporando actualizaciones destructivas residuales del registro base utilizado por un par."
  
  #: config/aarch64/aarch64.opt:437
! #, no-c-format
  msgid "Warn about usage of experimental Function Multi Versioning."
! msgstr "Avisa sobre el uso del multiversionado de funciones experimental."
  
  #: config/linux.opt:24
  #, no-c-format
*************** msgid "Don't use any of r32..r63."
*** 6983,6992 ****
  msgstr "No usa ninguno de r32..r63."
  
  #: config/epiphany/epiphany.opt:28
! #, fuzzy, no-c-format
! #| msgid "preferentially allocate registers that allow short instruction generation."
  msgid "Preferentially allocate registers that allow short instruction generation."
! msgstr "aloja de preferencia registros que permitan la generación de instrucciones short."
  
  #: config/epiphany/epiphany.opt:32
  #, no-c-format
--- 6982,6990 ----
  msgstr "No usa ninguno de r32..r63."
  
  #: config/epiphany/epiphany.opt:28
! #, no-c-format
  msgid "Preferentially allocate registers that allow short instruction generation."
! msgstr "Reserva preferente de registros que permitan la generación de instrucciones short."
  
  #: config/epiphany/epiphany.opt:32
  #, no-c-format
*************** msgid "Set branch cost."
*** 6994,7009 ****
  msgstr "Establece el costo de ramificación."
  
  #: config/epiphany/epiphany.opt:36
! #, fuzzy, no-c-format
! #| msgid "enable conditional move instruction usage."
  msgid "Enable conditional move instruction usage."
! msgstr "activa el uso de la instrucción move condicional."
  
  #: config/epiphany/epiphany.opt:40
! #, fuzzy, no-c-format
! #| msgid "set number of nops to emit before each insn pattern."
  msgid "Set number of nops to emit before each insn pattern."
! msgstr "establece el número de nops a emitir antes de cada patrón insn."
  
  #: config/epiphany/epiphany.opt:52
  #, no-c-format
--- 6992,7005 ----
  msgstr "Establece el costo de ramificación."
  
  #: config/epiphany/epiphany.opt:36
! #, no-c-format
  msgid "Enable conditional move instruction usage."
! msgstr "Activa el uso de la instrucción move condicional."
  
  #: config/epiphany/epiphany.opt:40
! #, no-c-format
  msgid "Set number of nops to emit before each insn pattern."
! msgstr "Establece el número de nops a emitir antes de cada patrón insn."
  
  #: config/epiphany/epiphany.opt:52
  #, no-c-format
*************** msgid "Set register to hold -1."
*** 7076,7115 ****
  msgstr "Establece el registro para conservar -1."
  
  #: config/ft32/ft32.opt:23
! #, fuzzy, no-c-format
! #| msgid "target the software simulator."
  msgid "Target the software simulator."
! msgstr "destina al simulador software."
  
  #: config/ft32/ft32.opt:27
! #, fuzzy, no-c-format
! #| msgid "Does nothing. Preserved for backward compatibility."
  msgid "Ignored, but preserved for backward compatibility."
! msgstr "No hace nada. Preservado por compatibilidad hacia atrás."
  
  #: config/ft32/ft32.opt:31
! #, fuzzy, no-c-format
! #| msgid "Avoid use of the DIV and MOD instructions"
  msgid "Avoid use of the DIV and MOD instructions."
! msgstr "Evita el uso de las instrucciones DIV y MOD"
  
  #: config/ft32/ft32.opt:35
! #, fuzzy, no-c-format
! #| msgid "target the FT32B architecture"
  msgid "Target the FT32B architecture."
! msgstr "destina a la arquitectura FT32B"
  
  #: config/ft32/ft32.opt:39
! #, fuzzy, no-c-format
! #| msgid "enable FT32B code compression"
  msgid "Enable FT32B code compression."
  msgstr "Activa código de compresión FT32B."
  
  #: config/ft32/ft32.opt:43
! #, fuzzy, no-c-format
! #| msgid "Avoid placing any readable data in program memory"
  msgid "Avoid placing any readable data in program memory."
! msgstr "Evita colocar cualquier dato legible en memoria de programa"
  
  #: config/h8300/h8300.opt:23
  #, no-c-format
--- 7072,7105 ----
  msgstr "Establece el registro para conservar -1."
  
  #: config/ft32/ft32.opt:23
! #, no-c-format
  msgid "Target the software simulator."
! msgstr "Destina al simulador software."
  
  #: config/ft32/ft32.opt:27
! #, no-c-format
  msgid "Ignored, but preserved for backward compatibility."
! msgstr "Descartado, pero conservado por compatibilidad hacia atrás."
  
  #: config/ft32/ft32.opt:31
! #, no-c-format
  msgid "Avoid use of the DIV and MOD instructions."
! msgstr "Evita el uso de las instrucciones DIV y MOD."
  
  #: config/ft32/ft32.opt:35
! #, no-c-format
  msgid "Target the FT32B architecture."
! msgstr "Destina a la arquitectura FT32B"
  
  #: config/ft32/ft32.opt:39
! #, no-c-format
  msgid "Enable FT32B code compression."
  msgstr "Activa código de compresión FT32B."
  
  #: config/ft32/ft32.opt:43
! #, no-c-format
  msgid "Avoid placing any readable data in program memory."
! msgstr "Evita colocar cualquier dato legible en memoria de programa."
  
  #: config/h8300/h8300.opt:23
  #, no-c-format
*************** msgstr "No empuja los registros extendid
*** 7174,7203 ****
  #: config/pru/pru.opt:31
  #, no-c-format
  msgid "-mmcu=MCU\tSelect the target System-On-Chip variant that embeds this PRU."
! msgstr ""
  
  #: config/pru/pru.opt:35
  #, no-c-format
  msgid "Make GCC pass the --no-relax command-line option to the linker instead of the --relax option."
! msgstr ""
  
  #: config/pru/pru.opt:40
! #, fuzzy, no-c-format
! #| msgid "Allow gcc to generate LIW instructions."
  msgid "Allow (or do not allow) gcc to use the LOOP instruction."
! msgstr "Permite a gcc generar instrucciones LIW."
  
  #: config/pru/pru.opt:44
! #, fuzzy, no-c-format
! #| msgid "Set the target VM version."
  msgid "Select target ABI variant."
! msgstr "Establece la versión de la MV destino."
  
  #: config/pru/pru.opt:48
! #, fuzzy, no-c-format
! #| msgid "Known ABIs (for use with the -mabi= option):"
  msgid "ABI variant code generation (for use with -mabi= option):"
! msgstr "ABIs conocidas (para usar con la opción -mabi=):"
  
  #: config/pdp11/pdp11.opt:23
  #, no-c-format
--- 7164,7190 ----
  #: config/pru/pru.opt:31
  #, no-c-format
  msgid "-mmcu=MCU\tSelect the target System-On-Chip variant that embeds this PRU."
! msgstr "-mmcu=MCU\tSelecciona el objetivo de la variante System-On-Chip incluida en esta PRU."
  
  #: config/pru/pru.opt:35
  #, no-c-format
  msgid "Make GCC pass the --no-relax command-line option to the linker instead of the --relax option."
! msgstr "Hace que GCC pase la opción de línea de órdenes --no-relax al enlazador en lugar de la opción --relax."
  
  #: config/pru/pru.opt:40
! #, no-c-format
  msgid "Allow (or do not allow) gcc to use the LOOP instruction."
! msgstr "Permite (o no permite) a gcc utilizar la instrucción LOOP."
  
  #: config/pru/pru.opt:44
! #, no-c-format
  msgid "Select target ABI variant."
! msgstr "Selecciona la variante ABI del objetivo."
  
  #: config/pru/pru.opt:48
! #, no-c-format
  msgid "ABI variant code generation (for use with -mabi= option):"
! msgstr "Generación de código de la variante ABI (para usar con la opción -mabi=):"
  
  #: config/pdp11/pdp11.opt:23
  #, no-c-format
*************** msgid "Use the DEC assembler syntax."
*** 7225,7234 ****
  msgstr "Usa la sintaxis de ensamblador DEC."
  
  #: config/pdp11/pdp11.opt:43
! #, fuzzy, no-c-format
! #| msgid "Use the DEC assembler syntax."
  msgid "Use the GNU assembler syntax."
! msgstr "Usa la sintaxis de ensamblador DEC."
  
  #: config/pdp11/pdp11.opt:47 config/rs6000/rs6000.opt:183
  #: config/frv/frv.opt:158
--- 7212,7220 ----
  msgstr "Usa la sintaxis de ensamblador DEC."
  
  #: config/pdp11/pdp11.opt:43
! #, no-c-format
  msgid "Use the GNU assembler syntax."
! msgstr "Usa la sintaxis de ensamblador de GNU."
  
  #: config/pdp11/pdp11.opt:47 config/rs6000/rs6000.opt:183
  #: config/frv/frv.opt:158
*************** msgid "Use UNIX assembler syntax."
*** 7262,7271 ****
  msgstr "Usa sintaxis de ensamblador UNIX."
  
  #: config/pdp11/pdp11.opt:71
! #, fuzzy, no-c-format
! #| msgid "Use integrated register allocator."
  msgid "Use LRA register allocator."
! msgstr "Utiliza el alojador de registros integrado."
  
  #: config/xtensa/xtensa.opt:26
  #, no-c-format
--- 7248,7256 ----
  msgstr "Usa sintaxis de ensamblador UNIX."
  
  #: config/pdp11/pdp11.opt:71
! #, no-c-format
  msgid "Use LRA register allocator."
! msgstr "Utiliza el alojador de registros LRA."
  
  #: config/xtensa/xtensa.opt:26
  #, no-c-format
*************** msgstr "Usa las instrucciones CALLXn ind
*** 7285,7291 ****
  #: config/xtensa/xtensa.opt:38
  #, no-c-format
  msgid "Set extra memory access cost for L32R instruction, in clock-cycle units."
! msgstr ""
  
  #: config/xtensa/xtensa.opt:46
  #, no-c-format
--- 7270,7276 ----
  #: config/xtensa/xtensa.opt:38
  #, no-c-format
  msgid "Set extra memory access cost for L32R instruction, in clock-cycle units."
! msgstr "Establece un coste extra de acceso a memoria a la instrucción L32R, en unidades de ciclos de reloj."
  
  #: config/xtensa/xtensa.opt:46
  #, no-c-format
*************** msgid "-mno-serialize-volatile\tDo not s
*** 7308,7323 ****
  msgstr "-mno-serialize-volatile\tNo serializa las referencias a memoria volátil con instrucciones MEMW."
  
  #: config/xtensa/xtensa.opt:65
! #, fuzzy, no-c-format
! #| msgid "Use EABI."
  msgid "Use call0 ABI."
! msgstr "Usa EABI."
  
  #: config/xtensa/xtensa.opt:69
! #, fuzzy, no-c-format
! #| msgid "Use fp registers."
  msgid "Use windowed registers ABI."
! msgstr "Usa registros fp."
  
  #: config/i386/mingw-w64.opt:23
  #, no-c-format
--- 7293,7306 ----
  msgstr "-mno-serialize-volatile\tNo serializa las referencias a memoria volátil con instrucciones MEMW."
  
  #: config/xtensa/xtensa.opt:65
! #, no-c-format
  msgid "Use call0 ABI."
! msgstr "Usa la ABI call0."
  
  #: config/xtensa/xtensa.opt:69
! #, no-c-format
  msgid "Use windowed registers ABI."
! msgstr "Usa registros ABI de ventana."
  
  #: config/i386/mingw-w64.opt:23
  #, no-c-format
*************** msgid "Branches are this expensive (arbi
*** 7407,7416 ****
  msgstr "Las ramificaciones son así de caras (unidades arbitrarias)."
  
  #: config/i386/i386.opt:300
! #, fuzzy, no-c-format
! #| msgid "-mlarge-data-threshold=<number>\tData greater than given threshold will go into .ldata section in x86-64 medium model."
  msgid "-mlarge-data-threshold=<number>\tData greater than given threshold will go into a large data section in x86-64 medium and large code models."
! msgstr "-mlarge-data-threshold=<número>\tLos datos más grandes que el límite dado irán a la sección .ldata en el modeolo medium del x86-64."
  
  #: config/i386/i386.opt:304
  #, no-c-format
--- 7390,7398 ----
  msgstr "Las ramificaciones son así de caras (unidades arbitrarias)."
  
  #: config/i386/i386.opt:300
! #, no-c-format
  msgid "-mlarge-data-threshold=<number>\tData greater than given threshold will go into a large data section in x86-64 medium and large code models."
! msgstr "-mlarge-data-threshold=<número>\tLos datos más grandes que el límite dado irán a una sección de datos grande en los modelos de código mediano y grande del x86-64."
  
  #: config/i386/i386.opt:304
  #, no-c-format
*************** msgstr "Desactiva el paso de optimizaci�
*** 7640,7646 ****
  #: config/i386/i386.opt:622
  #, no-c-format
  msgid "The maximum number of use and def visits when discovering a STV chain before the discovery is aborted."
! msgstr ""
  
  #: config/i386/i386.opt:626
  #, no-c-format
--- 7622,7628 ----
  #: config/i386/i386.opt:622
  #, no-c-format
  msgid "The maximum number of use and def visits when discovering a STV chain before the discovery is aborted."
! msgstr "El número máximo de visitas de uso y de definición al descubrir una cadena STV antes de abortar el descubrimiento."
  
  #: config/i386/i386.opt:626
  #, no-c-format
*************** msgid "Use 128-bit AVX instructions inst
*** 7653,7690 ****
  msgstr "Usa instrucciones AVX de 128-bit en lugar de instrucciones AVX de 256-bit en el auto-vectorizador."
  
  #: config/i386/i386.opt:635
! #, fuzzy, no-c-format
! #| msgid "Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer."
  msgid "Use given register vector width instructions instead of maximum register width in the auto-vectorizer."
! msgstr "Usa instrucciones AVX de 128-bit en lugar de instrucciones AVX de 256-bit en el auto-vectorizador."
  
  #: config/i386/i386.opt:639
! #, fuzzy, no-c-format
! #| msgid "Known preferred register vector length (to use with the -mprefer-vector-width= option)"
  msgid "Known preferred register vector length (to use with the -mprefer-vector-width= option):"
! msgstr "Longitud de vector de registros preferida conocida (para usar con la opción -mprefer-vector-width=)"
  
  #: config/i386/i386.opt:655
  #, no-c-format
  msgid "Enable floating-point status flags setting SSE vector operations on partial vectors."
! msgstr ""
  
  #: config/i386/i386.opt:659
! #, fuzzy, no-c-format
! #| msgid "Maximum number of disambiguations to perform per memory access."
  msgid "Maximum number of bits that can be moved from memory to memory efficiently."
! msgstr "Número máximo de desambiguaciones que realizar por cada acceso a memoria."
  
  #: config/i386/i386.opt:663
! #, fuzzy, no-c-format
! #| msgid "Maximum number of times that an insn could be scheduled."
  msgid "Maximum number of bits that can be stored to memory efficiently."
! msgstr "El número máximo de veces que se puede planificar una insns."
  
  #: config/i386/i386.opt:667
  #, no-c-format
  msgid "Optimize noreturn functions by not saving callee-saved registers used in the function."
! msgstr ""
  
  #: config/i386/i386.opt:673
  #, no-c-format
--- 7635,7668 ----
  msgstr "Usa instrucciones AVX de 128-bit en lugar de instrucciones AVX de 256-bit en el auto-vectorizador."
  
  #: config/i386/i386.opt:635
! #, no-c-format
  msgid "Use given register vector width instructions instead of maximum register width in the auto-vectorizer."
! msgstr "Usa instrucciones de anchura de registro vectorial en lugar de la anchura máxima de registro en el auto-vectorizador."
  
  #: config/i386/i386.opt:639
! #, no-c-format
  msgid "Known preferred register vector length (to use with the -mprefer-vector-width= option):"
! msgstr "Longitud de vector de registros preferida conocida (para usar con la opción -mprefer-vector-width=):"
  
  #: config/i386/i386.opt:655
  #, no-c-format
  msgid "Enable floating-point status flags setting SSE vector operations on partial vectors."
! msgstr "Habilita las opciones de estado de coma flotante poniendo operaciones vectoriales SSE en vectores parciales."
  
  #: config/i386/i386.opt:659
! #, no-c-format
  msgid "Maximum number of bits that can be moved from memory to memory efficiently."
! msgstr "Número máximo de bits que pueden moverse de memoria a memoria de manera eficiente."
  
  #: config/i386/i386.opt:663
! #, no-c-format
  msgid "Maximum number of bits that can be stored to memory efficiently."
! msgstr "El número máximo de bits que pueden almacenarse en memoria de manera eficiente."
  
  #: config/i386/i386.opt:667
  #, no-c-format
  msgid "Optimize noreturn functions by not saving callee-saved registers used in the function."
! msgstr "Optimiza funciones sin retorno no guardando registros guardados por la función llamada usados en la función."
  
  #: config/i386/i386.opt:673
  #, no-c-format
*************** msgid "Support MMX, SSE, SSE2, SSE3, SSS
*** 7822,7831 ****
  msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512BITALG."
  
  #: config/i386/i386.opt:789
! #, fuzzy, no-c-format
! #| msgid "Support AVX512VNNI built-in functions and code generation."
  msgid "Support AVX512VP2INTERSECT built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AVX512VNNI."
  
  #: config/i386/i386.opt:793
  #, no-c-format
--- 7800,7808 ----
  msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512BITALG."
  
  #: config/i386/i386.opt:789
! #, no-c-format
  msgid "Support AVX512VP2INTERSECT built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AVX512VP2INTERSECT."
  
  #: config/i386/i386.opt:793
  #, no-c-format
*************** msgid "Support WBNOINVD built-in functio
*** 7873,7888 ****
  msgstr "Admite funciones internas y generación de código WBNOINVD."
  
  #: config/i386/i386.opt:829
! #, fuzzy, no-c-format
! #| msgid "Support RTM built-in functions and code generation."
  msgid "Support PTWRITE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código RTM."
  
  #: config/i386/i386.opt:833
! #, fuzzy, no-c-format
! #| msgid "Support BMI built-in functions and code generation."
  msgid "Support UINTR built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código BMI."
  
  #: config/i386/i386.opt:837
  #, no-c-format
--- 7850,7863 ----
  msgstr "Admite funciones internas y generación de código WBNOINVD."
  
  #: config/i386/i386.opt:829
! #, no-c-format
  msgid "Support PTWRITE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código PTWRITE."
  
  #: config/i386/i386.opt:833
! #, no-c-format
  msgid "Support UINTR built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código UINTR."
  
  #: config/i386/i386.opt:837
  #, no-c-format
*************** msgid "Support PREFETCHW instruction."
*** 7940,7949 ****
  msgstr "Admite la instrucción PREFETCHW."
  
  #: config/i386/i386.opt:881
! #, fuzzy, no-c-format
! #| msgid "Support code generation of crc32 instruction."
  msgid "Support flag-preserving add-carry instructions."
! msgstr "Admite la generación de código de la instrucción crc32."
  
  #: config/i386/i386.opt:885
  #, no-c-format
--- 7915,7923 ----
  msgstr "Admite la instrucción PREFETCHW."
  
  #: config/i386/i386.opt:881
! #, no-c-format
  msgid "Support flag-preserving add-carry instructions."
! msgstr "Admite instrucciones de preservación del indicador de acarreo de la suma."
  
  #: config/i386/i386.opt:885
  #, no-c-format
*************** msgstr "Activa la instrumentación CET p
*** 8128,8134 ****
  #: config/i386/i386.opt:1070
  #, no-c-format
  msgid "Insert ENDBR instruction at function entry only via cf_check attribute for CET instrumentation."
! msgstr ""
  
  #: config/i386/i386.opt:1075
  #, no-c-format
--- 8102,8108 ----
  #: config/i386/i386.opt:1070
  #, no-c-format
  msgid "Insert ENDBR instruction at function entry only via cf_check attribute for CET instrumentation."
! msgstr "Inserta la instrucción ENDBR en la entrada de una función únicamente mediante el atributo cf_check para instrumentación CET."
  
  #: config/i386/i386.opt:1075
  #, no-c-format
*************** msgstr "Hace indirectas todas las llamad
*** 8138,8150 ****
  #: config/i386/i386.opt:1079
  #, no-c-format
  msgid "Convert indirect call and jump to call and return thunks."
! msgstr ""
  
  #: config/i386/i386.opt:1083
! #, fuzzy, no-c-format
! #| msgid "function return type cannot be function"
  msgid "Convert function return to call and return thunk."
! msgstr "el tipo de devolución de función no puede ser función"
  
  #: config/i386/i386.opt:1087 config/s390/s390.opt:279
  #, no-c-format
--- 8112,8123 ----
  #: config/i386/i386.opt:1079
  #, no-c-format
  msgid "Convert indirect call and jump to call and return thunks."
! msgstr "Convierte llamadas y saltos indirectos en «thunks» de llamadas y retornos."
  
  #: config/i386/i386.opt:1083
! #, no-c-format
  msgid "Convert function return to call and return thunk."
! msgstr "Convierte retornos a función en «thunks» de llamadas y retornos."
  
  #: config/i386/i386.opt:1087 config/s390/s390.opt:279
  #, no-c-format
*************** msgstr "Opciones conocidas para ramifica
*** 8154,8165 ****
  #: config/i386/i386.opt:1103
  #, no-c-format
  msgid "Add CS prefix to call and jmp to indirect thunk with branch target in r8-r15 registers."
! msgstr ""
  
  #: config/i386/i386.opt:1107
  #, no-c-format
  msgid "Force indirect call and jump via register."
! msgstr ""
  
  #: config/i386/i386.opt:1111
  #, no-c-format
--- 8127,8138 ----
  #: config/i386/i386.opt:1103
  #, no-c-format
  msgid "Add CS prefix to call and jmp to indirect thunk with branch target in r8-r15 registers."
! msgstr "Añade el prefijo CS a llamada y salto a «thunk» indirecto con objetivo de bifurcación en los registros r8-r16."
  
  #: config/i386/i386.opt:1107
  #, no-c-format
  msgid "Force indirect call and jump via register."
! msgstr "Fuerza la llamada y salto indirecto mediante registro."
  
  #: config/i386/i386.opt:1111
  #, no-c-format
*************** msgid "Support MOVDIR64B built-in functi
*** 8172,8473 ****
  msgstr "Admite funciones internas y generación de código MOVDIR64B."
  
  #: config/i386/i386.opt:1119
! #, fuzzy, no-c-format
! #| msgid "Support LWP built-in functions and code generation."
  msgid "Support WAITPKG built-in functions and code generation."
! msgstr "Admite funciones internas LWP y generación de código."
  
  #: config/i386/i386.opt:1123
! #, fuzzy, no-c-format
! #| msgid "Support CLZERO built-in functions and code generation."
  msgid "Support CLDEMOTE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código CLZERO."
  
  #: config/i386/i386.opt:1127
! #, fuzzy, no-c-format
! #| msgid "Instrument only functions marked with bnd_instrument attribute."
  msgid "Instrument function exit in instrumented functions with __fentry__."
! msgstr "Instrumenta solamente funciones marcadas con el atributo bnd_instrument."
  
  #: config/i386/i386.opt:1131
  #, no-c-format
  msgid "Known choices for return instrumentation with -minstrument-return=:"
! msgstr ""
  
  #: config/i386/i386.opt:1144
! #, fuzzy, no-c-format
! #| msgid "Generate __mcount_loc section with all mcount or __fentry__ calls."
  msgid "Generate a __return_loc section pointing to all return instrumentation code."
! msgstr "Genera sección __mcount_loc con todos los mcount o llamadas __fentry__."
  
  #: config/i386/i386.opt:1152
  #, no-c-format
  msgid "Known choices for mitigation against straight line speculation with -mharden-sls=:"
! msgstr ""
  
  #: config/i386/i386.opt:1168
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BF16 built-in functions and code generation."
  msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512VBMI2."
  
  #: config/i386/i386.opt:1173
! #, fuzzy, no-c-format
! #| msgid "Support RDRND built-in functions and code generation."
  msgid "Support ENQCMD built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código RDRND."
  
  #: config/i386/i386.opt:1177
! #, fuzzy, no-c-format
! #| msgid "Support AES built-in functions and code generation."
  msgid "Support SERIALIZE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AES."
  
  #: config/i386/i386.opt:1181
! #, fuzzy, no-c-format
! #| msgid "Support SGX built-in functions and code generation."
  msgid "Support TSXLDTRK built-in functions and code generation."
! msgstr "Admite funciones internas SGX y generación de código."
  
  #: config/i386/i386.opt:1185
! #, fuzzy, no-c-format
! #| msgid "Support AES built-in functions and code generation."
  msgid "Support AMX-TILE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AES."
  
  #: config/i386/i386.opt:1189
! #, fuzzy, no-c-format
! #| msgid "Support BMI built-in functions and code generation."
  msgid "Support AMX-INT8 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código BMI."
  
  #: config/i386/i386.opt:1193
! #, fuzzy, no-c-format
! #| msgid "Support F16C built-in functions and code generation."
  msgid "Support AMX-BF16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código F16C."
  
  #: config/i386/i386.opt:1197
! #, fuzzy, no-c-format
! #| msgid "Support AES built-in functions and code generation."
  msgid "Support HRESET built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AES."
  
  #: config/i386/i386.opt:1201
! #, fuzzy, no-c-format
! #| msgid "Support LWP built-in functions and code generation."
  msgid "Support KL built-in functions and code generation."
! msgstr "Admite funciones internas LWP y generación de código."
  
  #: config/i386/i386.opt:1205
! #, fuzzy, no-c-format
! #| msgid "Support LWP built-in functions and code generation."
  msgid "Support WIDEKL built-in functions and code generation."
! msgstr "Admite funciones internas LWP y generación de código."
  
  #: config/i386/i386.opt:1209
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVXVNNI built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1214
  #, no-c-format
  msgid "Emit GNU_PROPERTY_X86_ISA_1_NEEDED GNU property."
! msgstr ""
  
  #: config/i386/i386.opt:1218
! #, fuzzy, no-c-format
! #| msgid "Support MWAITX and MONITORX built-in functions and code generation."
  msgid "Support MWAIT and MONITOR built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MWAITX y MONITORX."
  
  #: config/i386/i386.opt:1222
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512-FP16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512VBMI2."
  
  #: config/i386/i386.opt:1226
! #, fuzzy, no-c-format
! #| msgid "Do not use the AltiVec ABI extensions."
  msgid "Do not use GOT to access external symbols."
! msgstr "No usa las extensiones de ABI AltiVec."
  
  #: config/i386/i386.opt:1230
  #, no-c-format
  msgid "Instructions number above which STFL stall penalty can be compensated."
! msgstr ""
  
  #: config/i386/i386.opt:1234
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVXIFMA built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1239
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVXVNNIINT8 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1244
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVXNECONVERT build-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1249
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and CMPCCXADD build-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1254
! #, fuzzy, no-c-format
! #| msgid "Support F16C built-in functions and code generation."
  msgid "Support AMX-FP16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código F16C."
  
  #: config/i386/i386.opt:1258
! #, fuzzy, no-c-format
! #| msgid "Support PREFETCHWT1 built-in functions and code generation."
  msgid "Support PREFETCHI built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código PREFETCHWT1."
  
  #: config/i386/i386.opt:1262
! #, fuzzy, no-c-format
! #| msgid "Support RTM built-in functions and code generation."
  msgid "Support RAOINT built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código RTM."
  
  #: config/i386/i386.opt:1266
  #, no-c-format
  msgid "Enable conservative small loop unrolling."
! msgstr ""
  
  #: config/i386/i386.opt:1270
  #, no-c-format
  msgid "-mlam=[none|u48|u57] Instrument meta data position in user data pointers."
! msgstr ""
  
  #: config/i386/i386.opt:1286
! #, fuzzy, no-c-format
! #| msgid "Support XOP built-in functions and code generation."
  msgid "Support AMX-COMPLEX built-in functions and code generation."
! msgstr "Admite funciones internas XOP y generación de código."
  
  #: config/i386/i386.opt:1290
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVXVNNIINT16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1295
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and SM3 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX y FMA."
  
  #: config/i386/i386.opt:1300
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and SHA512 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX y AVX2."
  
  #: config/i386/i386.opt:1305
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and SM4 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX y FMA."
  
  #: config/i386/i386.opt:1310
! #, fuzzy, no-c-format
! #| msgid "Enable vectorization on trees."
  msgid "Enable vectorization for gather instruction."
! msgstr "Activa la vectorización en árboles."
  
  #: config/i386/i386.opt:1314
! #, fuzzy, no-c-format
! #| msgid "Enable vectorization on trees."
  msgid "Enable vectorization for scatter instruction."
! msgstr "Activa la vectorización en árboles."
  
  #: config/i386/i386.opt:1318
  #, no-c-format
  msgid "Support code generation for APX features, including EGPR, PUSH2POP2, NDD, PPX, NF, CCMP and ZU."
! msgstr ""
  
  #: config/i386/i386.opt:1356
  #, no-c-format
  msgid "Enable GPR32 in inline asm when APX_F enabled."
! msgstr ""
  
  #: config/i386/i386.opt:1360
! #, fuzzy, no-c-format
! #| msgid "Support BMI2 built-in functions and code generation."
  msgid "Support 512 bit vector built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código BMI2."
  
  #: config/i386/i386.opt:1364
! #, fuzzy, no-c-format
! #| msgid "Support AES built-in functions and code generation."
  msgid "Support USER_MSR built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AES."
  
  #: config/i386/i386.opt:1368
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVX10.1-256 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1373 config/i386/i386.opt:1378
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVX10.1-512 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX512F."
  
  #: config/i386/i386.opt:1383
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512 and AVX10.2 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512VBMI2."
  
  #: config/i386/i386.opt:1388
! #, fuzzy, no-c-format
! #| msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation."
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512, AVX10.2 and AMX-AVX512 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512VBMI2."
  
  #: config/i386/i386.opt:1393
! #, fuzzy, no-c-format
! #| msgid "Support BMI2 built-in functions and code generation."
  msgid "Support AMX-TF32 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código BMI2."
  
  #: config/i386/i386.opt:1397
! #, fuzzy, no-c-format
! #| msgid "Support AES built-in functions and code generation."
  msgid "Support AMX-TRANSPOSE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AES."
  
  #: config/i386/i386.opt:1401
! #, fuzzy, no-c-format
! #| msgid "Support XOP built-in functions and code generation."
  msgid "Support AMX-FP8 built-in functions and code generation."
! msgstr "Admite funciones internas XOP y generación de código."
  
  #: config/i386/i386.opt:1405
! #, fuzzy, no-c-format
! #| msgid "Support MOVDIRI built-in functions and code generation."
  msgid "Support MOVRS built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MOVDIRI."
  
  #: config/i386/i386.opt:1409
! #, fuzzy, no-c-format
! #| msgid "Support MOVDIRI built-in functions and code generation."
  msgid "Support AMX-MOVRS built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MOVDIRI."
  
  #: config/pa/pa64-hpux.opt:23
  #, no-c-format
--- 8145,8403 ----
  msgstr "Admite funciones internas y generación de código MOVDIR64B."
  
  #: config/i386/i386.opt:1119
! #, no-c-format
  msgid "Support WAITPKG built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código WAITPKG."
  
  #: config/i386/i386.opt:1123
! #, no-c-format
  msgid "Support CLDEMOTE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código CLDEMOTE."
  
  #: config/i386/i386.opt:1127
! #, no-c-format
  msgid "Instrument function exit in instrumented functions with __fentry__."
! msgstr "Instrumenta la salida de una función en las funciones instrumentadas con __fentry__."
  
  #: config/i386/i386.opt:1131
  #, no-c-format
  msgid "Known choices for return instrumentation with -minstrument-return=:"
! msgstr "Opciones conocidas para instrumentación del retorno con -minstrument-return=:"
  
  #: config/i386/i386.opt:1144
! #, no-c-format
  msgid "Generate a __return_loc section pointing to all return instrumentation code."
! msgstr "Genera sección __return_loc apuntando a todo el código de instrumentación del retorno."
  
  #: config/i386/i386.opt:1152
  #, no-c-format
  msgid "Known choices for mitigation against straight line speculation with -mharden-sls=:"
! msgstr "Opciones conocidas para mitigar la especulación de línea directa con -mharden-sls=:"
  
  #: config/i386/i386.opt:1168
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512BF16 built-in functions and code generation."
  msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512VBMI2."
  
  #: config/i386/i386.opt:1173
! #, no-c-format
  msgid "Support ENQCMD built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código ENQCMD."
  
  #: config/i386/i386.opt:1177
! #, no-c-format
  msgid "Support SERIALIZE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código SERIALIZE."
  
  #: config/i386/i386.opt:1181
! #, no-c-format
  msgid "Support TSXLDTRK built-in functions and code generation."
! msgstr "Admite funciones internas SGX y generación de TSXLDTRK."
  
  #: config/i386/i386.opt:1185
! #, no-c-format
  msgid "Support AMX-TILE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-TILE."
  
  #: config/i386/i386.opt:1189
! #, no-c-format
  msgid "Support AMX-INT8 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-INT8."
  
  #: config/i386/i386.opt:1193
! #, no-c-format
  msgid "Support AMX-BF16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-BF16."
  
  #: config/i386/i386.opt:1197
! #, no-c-format
  msgid "Support HRESET built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código HRESET."
  
  #: config/i386/i386.opt:1201
! #, no-c-format
  msgid "Support KL built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código KL."
  
  #: config/i386/i386.opt:1205
! #, no-c-format
  msgid "Support WIDEKL built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código WIDEKL."
  
  #: config/i386/i386.opt:1209
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVXVNNI built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVXVNNI."
  
  #: config/i386/i386.opt:1214
  #, no-c-format
  msgid "Emit GNU_PROPERTY_X86_ISA_1_NEEDED GNU property."
! msgstr "Emite la propiedad GNU GNU_PROPERTY_X86_ISA_1_NEEDED."
  
  #: config/i386/i386.opt:1218
! #, no-c-format
  msgid "Support MWAIT and MONITOR built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MWAIT y MONITOR."
  
  #: config/i386/i386.opt:1222
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512-FP16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F y AVX512-FP16."
  
  #: config/i386/i386.opt:1226
! #, no-c-format
  msgid "Do not use GOT to access external symbols."
! msgstr "No usa GOT para acceder a símbolos externos."
  
  #: config/i386/i386.opt:1230
  #, no-c-format
  msgid "Instructions number above which STFL stall penalty can be compensated."
! msgstr "Número de instrucciones por encima del cual la penalización por estancamiento STFL puede compensarse."
  
  #: config/i386/i386.opt:1234
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVXIFMA built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVXIFMA."
  
  #: config/i386/i386.opt:1239
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVXVNNIINT8 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVXVNNIINT8."
  
  #: config/i386/i386.opt:1244
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVXNECONVERT build-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVXNECONVERT."
  
  #: config/i386/i386.opt:1249
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and CMPCCXADD build-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y CMPCCXADD."
  
  #: config/i386/i386.opt:1254
! #, no-c-format
  msgid "Support AMX-FP16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-FP16."
  
  #: config/i386/i386.opt:1258
! #, no-c-format
  msgid "Support PREFETCHI built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código PREFETCHI."
  
  #: config/i386/i386.opt:1262
! #, no-c-format
  msgid "Support RAOINT built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código RAOINT."
  
  #: config/i386/i386.opt:1266
  #, no-c-format
  msgid "Enable conservative small loop unrolling."
! msgstr "Habilita el desenrrollamiento conservador de bucles pequeños."
  
  #: config/i386/i386.opt:1270
  #, no-c-format
  msgid "-mlam=[none|u48|u57] Instrument meta data position in user data pointers."
! msgstr "-mlam=[none|u48|u57] Instrumenta posición de metadatos en punteros de datos de usuario."
  
  #: config/i386/i386.opt:1286
! #, no-c-format
  msgid "Support AMX-COMPLEX built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-COMPLEX."
  
  #: config/i386/i386.opt:1290
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVXVNNIINT16 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVXVNNIINT16."
  
  #: config/i386/i386.opt:1295
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and SM3 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX y SM3."
  
  #: config/i386/i386.opt:1300
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and SHA512 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX y SHA512."
  
  #: config/i386/i386.opt:1305
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and SM4 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX y SM4."
  
  #: config/i386/i386.opt:1310
! #, no-c-format
  msgid "Enable vectorization for gather instruction."
! msgstr "Activa la vectorización para la instrucción de recopilación."
  
  #: config/i386/i386.opt:1314
! #, no-c-format
  msgid "Enable vectorization for scatter instruction."
! msgstr "Activa la vectorización para la instrucción de dispersión."
  
  #: config/i386/i386.opt:1318
  #, no-c-format
  msgid "Support code generation for APX features, including EGPR, PUSH2POP2, NDD, PPX, NF, CCMP and ZU."
! msgstr "Admite la generación de código para características APX, incluidas EGPR, PUSH2POP2, NDD, PPX, NF, CCMP y ZU."
  
  #: config/i386/i386.opt:1356
  #, no-c-format
  msgid "Enable GPR32 in inline asm when APX_F enabled."
! msgstr "Habilita GPR32 en ensamblador en línea cuando APX_F está habilitado."
  
  #: config/i386/i386.opt:1360
! #, no-c-format
  msgid "Support 512 bit vector built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código de vectores de 512 bits."
  
  #: config/i386/i386.opt:1364
! #, no-c-format
  msgid "Support USER_MSR built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código USER_MSR."
  
  #: config/i386/i386.opt:1368
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVX10.1-256 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX10.1-256."
  
  #: config/i386/i386.opt:1373 config/i386/i386.opt:1378
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, and AVX10.1-512 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 y AVX10.1-512."
  
  #: config/i386/i386.opt:1383
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512 and AVX10.2 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512 y AVX10.2."
  
  #: config/i386/i386.opt:1388
! #, no-c-format
  msgid "Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512, AVX10.2 and AMX-AVX512 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX10.1-512, AVX10.2 y AMX-AVX512."
  
  #: config/i386/i386.opt:1393
! #, no-c-format
  msgid "Support AMX-TF32 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-TF32."
  
  #: config/i386/i386.opt:1397
! #, no-c-format
  msgid "Support AMX-TRANSPOSE built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-TRANSPOSE."
  
  #: config/i386/i386.opt:1401
! #, no-c-format
  msgid "Support AMX-FP8 built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-FP8."
  
  #: config/i386/i386.opt:1405
! #, no-c-format
  msgid "Support MOVRS built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código MOVRS."
  
  #: config/i386/i386.opt:1409
! #, no-c-format
  msgid "Support AMX-MOVRS built-in functions and code generation."
! msgstr "Admite funciones internas y generación de código AMX-MOVRS."
  
  #: config/pa/pa64-hpux.opt:23
  #, no-c-format
*************** msgstr "Genera código PA2.0 (requiere b
*** 8513,8535 ****
  #: config/pa/pa.opt:42
  #, no-c-format
  msgid "Generate libcalls for atomic loads and stores when sync libcalls are disabled."
! msgstr ""
  
  #: config/pa/pa.opt:50
  #, no-c-format
  msgid "Caller copies function arguments passed by hidden reference."
! msgstr ""
  
  #: config/pa/pa.opt:54
  #, no-c-format
  msgid "Use ldcw/ldcd coherent cache-control hint."
! msgstr ""
  
  #: config/pa/pa.opt:58
! #, fuzzy, no-c-format
! #| msgid "Equivalent to -mgpopt=local."
  msgid "Disable FP regs.  Equivalent to -msoft-float."
! msgstr "Equivalente a -mgpopt=local."
  
  #: config/pa/pa.opt:62
  #, no-c-format
--- 8443,8464 ----
  #: config/pa/pa.opt:42
  #, no-c-format
  msgid "Generate libcalls for atomic loads and stores when sync libcalls are disabled."
! msgstr "Genera llamadas a biblioteca para cargas y almacenamientos atómicos cuando las llamadas a biblioteca están deshabilitadas."
  
  #: config/pa/pa.opt:50
  #, no-c-format
  msgid "Caller copies function arguments passed by hidden reference."
! msgstr "El llamante copia los argumentos de función pasados por referencia oculta."
  
  #: config/pa/pa.opt:54
  #, no-c-format
  msgid "Use ldcw/ldcd coherent cache-control hint."
! msgstr "Utiliza indicio de control de caché coherente ldcw/ldcd."
  
  #: config/pa/pa.opt:58
! #, no-c-format
  msgid "Disable FP regs.  Equivalent to -msoft-float."
! msgstr "Deshabilita los registros FP.  Equivalente a -msoft-float."
  
  #: config/pa/pa.opt:62
  #, no-c-format
*************** msgstr "Desactiva los registros de espac
*** 8574,8580 ****
  #: config/pa/pa.opt:107
  #, no-c-format
  msgid "Assume memory references are ordered and barriers are not needed."
! msgstr ""
  
  #: config/pa/pa.opt:123
  #, no-c-format
--- 8503,8509 ----
  #: config/pa/pa.opt:107
  #, no-c-format
  msgid "Assume memory references are ordered and barriers are not needed."
! msgstr "Asume que las referencias a memoria están ordenadas y no se necesitan barreras."
  
  #: config/pa/pa.opt:123
  #, no-c-format
*************** msgid "Use software floating point."
*** 8592,8601 ****
  msgstr "Usa coma flotante de software."
  
  #: config/pa/pa.opt:156
! #, fuzzy, no-c-format
! #| msgid "Use software floating point comparisons."
  msgid "Use software integer multiplication."
! msgstr "Usa comparaciones de coma flotante de software."
  
  #: config/pa/pa.opt:164
  #, no-c-format
--- 8521,8529 ----
  msgstr "Usa coma flotante de software."
  
  #: config/pa/pa.opt:156
! #, no-c-format
  msgid "Use software integer multiplication."
! msgstr "Usa multiplicación entera de software."
  
  #: config/pa/pa.opt:164
  #, no-c-format
*************** msgid "Support multi-threading."
*** 8769,8784 ****
  msgstr "Soporte para multihilos."
  
  #: config/nvptx/nvptx-gen.opt:24
! #, fuzzy, no-c-format
! #| msgid "Known ARM architectures (for use with the -march= option):"
  msgid "Known PTX ISA target architectures (for use with the -misa= option):"
! msgstr "Arquitecturas ARM conocidas (para usar con la opción -march=):"
  
  #: config/nvptx/nvptx.opt:31
! #, fuzzy, no-c-format
! #| msgid "Does nothing. Preserved for backward compatibility."
  msgid "Ignored, but preserved for backward compatibility.  Only 64-bit ABI is supported."
! msgstr "No hace nada. Preservado por compatibilidad hacia atrás."
  
  #: config/nvptx/nvptx.opt:36
  #, no-c-format
--- 8697,8710 ----
  msgstr "Soporte para multihilos."
  
  #: config/nvptx/nvptx-gen.opt:24
! #, no-c-format
  msgid "Known PTX ISA target architectures (for use with the -misa= option):"
! msgstr "Arquitecturas objetivo ISA PTX conocidas (para usar con la opción -misa=):"
  
  #: config/nvptx/nvptx.opt:31
! #, no-c-format
  msgid "Ignored, but preserved for backward compatibility.  Only 64-bit ABI is supported."
! msgstr "Se descarta, pero preservado por compatibilidad hacia atrás.  Solo se admite ABI de 64 bits."
  
  #: config/nvptx/nvptx.opt:36
  #, no-c-format
*************** msgstr "Usa pilas personalizadas en luga
*** 8798,8804 ****
  #: config/nvptx/nvptx.opt:48
  #, no-c-format
  msgid "Specify size of .local memory used for stack when the exact amount is not known."
! msgstr ""
  
  #: config/nvptx/nvptx.opt:52
  #, no-c-format
--- 8724,8730 ----
  #: config/nvptx/nvptx.opt:48
  #, no-c-format
  msgid "Specify size of .local memory used for stack when the exact amount is not known."
! msgstr "Especifica el tamaños de ña memory .local utilizado para la pila cuando no se conoce la cantidad exacta."
  
  #: config/nvptx/nvptx.opt:52
  #, no-c-format
*************** msgstr "Genera código para descarga Ope
*** 8812,8843 ****
  
  #: config/nvptx/nvptx.opt:60
  #, fuzzy, no-c-format
! #| msgid "Specify the name of the target architecture."
  msgid "Specify the PTX ISA target architecture to use."
! msgstr "Especifica el nombre de la arquitectura destino."
  
  #: config/nvptx/nvptx.opt:64
  #, no-c-format
  msgid "Alias:"
! msgstr ""
  
  #: config/nvptx/nvptx.opt:125
! #, fuzzy, no-c-format
! #| msgid "Known MIPS ISA levels (for use with the -mips option):"
  msgid "Known PTX ISA versions (for use with the -mptx= option):"
! msgstr "Niveles ISA MIPS conocidos (para uso con la opción -mips):"
  
  #: config/nvptx/nvptx.opt:159
! #, fuzzy, no-c-format
! #| msgid "The version of the C++ ABI in use."
  msgid "Specify the PTX ISA version to use."
! msgstr "La versión de la ABI de C++ que se está usando."
  
  #: config/nvptx/nvptx.opt:163
! #, fuzzy, no-c-format
! #| msgid "Use fp registers."
  msgid "Initialize ptx registers."
! msgstr "Usa registros fp."
  
  #: config/vxworks.opt:36
  #, no-c-format
--- 8738,8766 ----
  
  #: config/nvptx/nvptx.opt:60
  #, fuzzy, no-c-format
! #| msgid "Specify the ISA PTX target architecture to use."
  msgid "Specify the PTX ISA target architecture to use."
! msgstr "Especifica la arquitectura destino PTX ISA que se usará."
  
  #: config/nvptx/nvptx.opt:64
  #, no-c-format
  msgid "Alias:"
! msgstr "Alias:"
  
  #: config/nvptx/nvptx.opt:125
! #, no-c-format
  msgid "Known PTX ISA versions (for use with the -mptx= option):"
! msgstr "Versiones ISA PTX conocidas (para uso con la opción -mptx=):"
  
  #: config/nvptx/nvptx.opt:159
! #, no-c-format
  msgid "Specify the PTX ISA version to use."
! msgstr "Especifica la versión de ISA PTX que se usará."
  
  #: config/nvptx/nvptx.opt:163
! #, no-c-format
  msgid "Initialize ptx registers."
! msgstr "Inicializa los registros ptx."
  
  #: config/vxworks.opt:36
  #, no-c-format
*************** msgid "Assume the VxWorks vThreads envir
*** 8850,8913 ****
  msgstr "Asume el entorno vThreads de VxWorks."
  
  #: config/avr/avr.opt:27
! #, fuzzy, no-c-format
! #| msgid "Use subroutines for function prologues and epilogues."
  msgid "Optimization. Use subroutines for function prologues and epilogues."
! msgstr "Usa subrutinas para los prólogos y epílogos de función."
  
  #: config/avr/avr.opt:31
  #, no-c-format
  msgid "Use a startup code with a compact vector table."
! msgstr ""
  
  #: config/avr/avr.opt:35
! #, fuzzy, no-c-format
! #| msgid "-mmcu=MCU\tSelect the target MCU."
  msgid "-mmcu=<MCU>\tSelect the target MCU."
! msgstr "-mmcu=MCU\tSelecciona el MCU destino."
  
  #: config/avr/avr.opt:39
! #, fuzzy, no-c-format
! #| msgid "Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues."
  msgid "Optimization. Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues."
! msgstr "Permite el uso de pseudoinstrucciones __gcc_isr para los prólogos y epílogos de ISR."
  
  #: config/avr/avr.opt:43
! #, fuzzy, no-c-format
! #| msgid "Set the number of 64 KiB flash segments."
  msgid "This option is used internally. Set the number of 64 KiB flash segments."
! msgstr "Establece el número de segmentos flash de 64 KiB."
  
  #: config/avr/avr.opt:47
  #, no-c-format
  msgid "Call main and exit (default)."
! msgstr ""
  
  #: config/avr/avr.opt:51
  #, no-c-format
  msgid "This option is used internally. Indicate presence of a processor erratum.  Do not skip 32-bit instructions."
! msgstr ""
  
  #: config/avr/avr.opt:55
! #, fuzzy, no-c-format
! #| msgid "Enable Read-Modify-Write (RMW) instructions support/use."
  msgid "This option is used internally. Enable Read-Modify-Write (RMW) instructions support/use."
! msgstr "Activa el soporte/uso de instrucciones Leer-Modificar-Escribir (LME)."
  
  #: config/avr/avr.opt:66
  #, no-c-format
  msgid "This option is on per default in order to work around PR118012."
! msgstr ""
  
  #: config/avr/avr.opt:70
  #, no-c-format
  msgid "Optimization. Allow to use nonzero_bits() in some insn conditions."
! msgstr ""
  
  #: config/avr/avr.opt:74
  #, no-c-format
  msgid "This option is used internally for multilib generation and selection.  Assume RJMP / RCALL can target all program memory."
! msgstr ""
  
  #: config/avr/avr.opt:78
  #, no-c-format
--- 8773,8831 ----
  msgstr "Asume el entorno vThreads de VxWorks."
  
  #: config/avr/avr.opt:27
! #, no-c-format
  msgid "Optimization. Use subroutines for function prologues and epilogues."
! msgstr "Optimización. Usa subrutinas para los prólogos y epílogos de función."
  
  #: config/avr/avr.opt:31
  #, no-c-format
  msgid "Use a startup code with a compact vector table."
! msgstr "Utiliza código de arranque con una tabla de vectores compacta."
  
  #: config/avr/avr.opt:35
! #, no-c-format
  msgid "-mmcu=<MCU>\tSelect the target MCU."
! msgstr "-mmcu=<MCU>\tSelecciona el MCU destino."
  
  #: config/avr/avr.opt:39
! #, no-c-format
  msgid "Optimization. Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues."
! msgstr "Optimización. Permite el uso de pseudoinstrucciones __gcc_isr para los prólogos y epílogos de ISR."
  
  #: config/avr/avr.opt:43
! #, no-c-format
  msgid "This option is used internally. Set the number of 64 KiB flash segments."
! msgstr "Esta opción se utiliza internamente. Establece el número de segmentos flash de 64 KiB."
  
  #: config/avr/avr.opt:47
  #, no-c-format
  msgid "Call main and exit (default)."
! msgstr "Llama a main y termina (por defecto)."
  
  #: config/avr/avr.opt:51
  #, no-c-format
  msgid "This option is used internally. Indicate presence of a processor erratum.  Do not skip 32-bit instructions."
! msgstr "Esta opción se utiliza internamente. Indica la presencia de uan errata del procesador.  No saltar instrucciones de 32 bits."
  
  #: config/avr/avr.opt:55
! #, no-c-format
  msgid "This option is used internally. Enable Read-Modify-Write (RMW) instructions support/use."
! msgstr "Esta opción se utiliza internamente. Activa el soporte/uso de instrucciones Leer-Modificar-Escribir (LME)."
  
  #: config/avr/avr.opt:66
  #, no-c-format
  msgid "This option is on per default in order to work around PR118012."
! msgstr "Esta opción está activa por defecto para corregir PR118012."
  
  #: config/avr/avr.opt:70
  #, no-c-format
  msgid "Optimization. Allow to use nonzero_bits() in some insn conditions."
! msgstr "Optimización. Permite utilizar nonzero_bits() en algunas condiciones de instrucciones."
  
  #: config/avr/avr.opt:74
  #, no-c-format
  msgid "This option is used internally for multilib generation and selection.  Assume RJMP / RCALL can target all program memory."
! msgstr "Esta opción se utiliza internamente para generación y selección multibiblioteca.  Asume que RJMP / RCALL pueden dirigirse a toda la memoria del programa."
  
  #: config/avr/avr.opt:78
  #, no-c-format
*************** msgid "Change the stack pointer without
*** 8920,8934 ****
  msgstr "Cambia el puntero de la pila sin desactivar las interrupciones."
  
  #: config/avr/avr.opt:86
! #, fuzzy, no-c-format
! #| msgid "Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0."
  msgid "-mbranch-cost=<cost>\tOptimization. Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0."
! msgstr "Establece los costos de ramificación para las instrucciones de ramificación condicional.  Los valores razonables son enteros pequeños que no son negativos.  El costo de ramificación por defecto es 0."
  
  #: config/avr/avr.opt:90
  #, no-c-format
  msgid "Optimization. Treat main as if it had attribute OS_task."
! msgstr ""
  
  #: config/avr/avr.opt:100
  #, no-c-format
--- 8838,8851 ----
  msgstr "Cambia el puntero de la pila sin desactivar las interrupciones."
  
  #: config/avr/avr.opt:86
! #, no-c-format
  msgid "-mbranch-cost=<cost>\tOptimization. Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0."
! msgstr "-mbranch-cost=<coste>\tOptimización. Establece los costos de bifurcación para las instrucciones de bifurcación condicional.  Los valores razonables son enteros pequeños que no son negativos.  El costo de bifurcación predeterminado es 0."
  
  #: config/avr/avr.opt:90
  #, no-c-format
  msgid "Optimization. Treat main as if it had attribute OS_task."
! msgstr "Optimización. Trata main como si tuviera el atributo OS_task."
  
  #: config/avr/avr.opt:100
  #, no-c-format
*************** msgid "Change only the low 8 bits of the
*** 8936,8945 ****
  msgstr "Cambia sólo los 8 bits bajos del puntero de pila."
  
  #: config/avr/avr.opt:104
! #, fuzzy, no-c-format
! #| msgid "Relax branches."
  msgid "Optimization. Relax branches."
! msgstr "Relaja ramificaciones."
  
  #: config/avr/avr.opt:108
  #, no-c-format
--- 8853,8861 ----
  msgstr "Cambia sólo los 8 bits bajos del puntero de pila."
  
  #: config/avr/avr.opt:104
! #, no-c-format
  msgid "Optimization. Relax branches."
! msgstr "Optimización. Relaja las bifurcaciones."
  
  #: config/avr/avr.opt:108
  #, no-c-format
*************** msgstr "Hace que el motor de relajación
*** 8948,8997 ****
  
  #: config/avr/avr.opt:112
  #, fuzzy, no-c-format
! #| msgid "Accumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments in function prologue/epilogue.  Without this option, outgoing arguments are pushed before calling a function and popped afterwards.  This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf."
  msgid "Optimization. Accumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments in function prologue/epilogue.  Without this option, outgoing arguments are pushed before calling a function and popped afterwards.  This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf."
! msgstr "Acumula los argumentos de función salientes y adquiere/libera el espacio de pila necesario para los argumentos de función salientes en el prólogo/epílogo de la función.  Sin esta opción, los argumentos salientes se empujan antes de llamar una función y se sacan después.  Esta opción puede conducir a tamaño de código reducido para funciones que llaman muchas funciones que obtienen sus argumentos de la pila como, por ejemplo, printf."
  
  #: config/avr/avr.opt:116
  #, no-c-format
  msgid "Optimization. Split shifts of 4-byte values into a byte shift and a residual bit shift."
! msgstr ""
  
  #: config/avr/avr.opt:120
  #, no-c-format
  msgid "Optimization. Split most of the load and store instructions into byte load and stores."
! msgstr ""
  
  #: config/avr/avr.opt:124
! #, fuzzy, no-c-format
! #| msgid "When accessing RAM, use X as imposed by the hardware, i.e. just use pre-decrement, post-increment and indirect addressing with the X register.  Without this option, the compiler may assume that there is an addressing mode X+const similar to Y+const and Z+const and emit instructions to emulate such an addressing mode for X."
  msgid "Optimization. When accessing RAM, use X as imposed by the hardware, i.e. just use pre-decrement, post-increment and indirect addressing with the X register.  Without this option, the compiler may assume that there is an addressing mode X+const similar to Y+const and Z+const and emit instructions to emulate such an addressing mode for X."
! msgstr "Cuando se accede a la RAM, usa X como lo impone el hardware, p.e. sólo usa pre-decremento, post-incremento y direccionamiento indirecto con el registro X.  Sin esta opción, el compilador puede asumir que hay un modo de direccionamiento X+const similar a Y+const y Z+const y emite instrucciones para emular tal modo de deireccionamiento para X."
  
  #: config/avr/avr.opt:128
  #, no-c-format
  msgid "This option is used internally. The device has the bitfield NVMCTRL_CTRLB.FLMAP."
! msgstr ""
  
  #: config/avr/avr.opt:132
  #, no-c-format
  msgid "The device has the .rodata section located in the RAM area."
! msgstr ""
  
  #: config/avr/avr.opt:137
  #, no-c-format
  msgid "This option is used internally for multilib generation and selection. The device has no SPH special function register."
! msgstr ""
  
  #: config/avr/avr.opt:141
  #, no-c-format
  msgid "Optimization. Split register additions from load/store instructions. Most useful on Reduced Tiny."
! msgstr ""
  
  #: config/avr/avr.opt:145
  #, no-c-format
  msgid "-mfuse-add=<0,2>\tOptimization. Split register additions from load/store instructions. Most useful on Reduced Tiny."
! msgstr ""
  
  #: config/avr/avr.opt:149
  #, no-c-format
--- 8864,8912 ----
  
  #: config/avr/avr.opt:112
  #, fuzzy, no-c-format
! #| msgid "OptimizationAccumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments in function prologue/epilogue.  Without this option, outgoing arguments are pushed before calling a function and popped afterwards.  This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf."
  msgid "Optimization. Accumulate outgoing function arguments and acquire/release the needed stack space for outgoing function arguments in function prologue/epilogue.  Without this option, outgoing arguments are pushed before calling a function and popped afterwards.  This option can lead to reduced code size for functions that call many functions that get their arguments on the stack like, for example printf."
! msgstr "Optimización. Acumula los argumentos de función salientes y adquiere/libera el espacio de pila necesario para los argumentos de función salientes en el prólogo/epílogo de la función.  Sin esta opción, los argumentos salientes se empujan antes de llamar una función y se sacan después.  Esta opción puede conducir a tamaño de código reducido para funciones que llaman muchas funciones que obtienen sus argumentos de la pila como, por ejemplo, printf."
  
  #: config/avr/avr.opt:116
  #, no-c-format
  msgid "Optimization. Split shifts of 4-byte values into a byte shift and a residual bit shift."
! msgstr "Optimización. Parte los desplazamientos de valores de 4 bytes en un desplazamiento de byte y un desplazamientos de bits residual."
  
  #: config/avr/avr.opt:120
  #, no-c-format
  msgid "Optimization. Split most of the load and store instructions into byte load and stores."
! msgstr "Optimización. Parte la mayoría de las instrucciones de carga y almacenamiento en carga y almacenamientos de byte."
  
  #: config/avr/avr.opt:124
! #, no-c-format
  msgid "Optimization. When accessing RAM, use X as imposed by the hardware, i.e. just use pre-decrement, post-increment and indirect addressing with the X register.  Without this option, the compiler may assume that there is an addressing mode X+const similar to Y+const and Z+const and emit instructions to emulate such an addressing mode for X."
! msgstr "Optimización. Cuando se accede a la RAM, usa X como lo impone el hardware, p.e. sólo usa pre-decremento, post-incremento y direccionamiento indirecto con el registro X.  Sin esta opción, el compilador puede asumir que hay un modo de direccionamiento X+const similar a Y+const y Z+const y emite instrucciones para emular tal modo de deireccionamiento para X."
  
  #: config/avr/avr.opt:128
  #, no-c-format
  msgid "This option is used internally. The device has the bitfield NVMCTRL_CTRLB.FLMAP."
! msgstr "Esta opción se utiliza internamente. El dispositivo tiene el campo de bits NVMCTRL_CTRLB.FLMAP."
  
  #: config/avr/avr.opt:132
  #, no-c-format
  msgid "The device has the .rodata section located in the RAM area."
! msgstr "El dispositivo tiene la sección .rodata localizada en la zona RAM."
  
  #: config/avr/avr.opt:137
  #, no-c-format
  msgid "This option is used internally for multilib generation and selection. The device has no SPH special function register."
! msgstr "Esta opción se utiliza internamente para generación multilibrería y selección. El dispositivo no tiene registro de función especial SPH."
  
  #: config/avr/avr.opt:141
  #, no-c-format
  msgid "Optimization. Split register additions from load/store instructions. Most useful on Reduced Tiny."
! msgstr "Optimización. Divide las sumas de registros desde instrucciones de carga/almacenamiento. Útil, sobre todo, en «Reduced Tiny»."
  
  #: config/avr/avr.opt:145
  #, no-c-format
  msgid "-mfuse-add=<0,2>\tOptimization. Split register additions from load/store instructions. Most useful on Reduced Tiny."
! msgstr "-mfuse-add=<0,2>\tOptimización. Divide las sumas de registros desde instrucciones de carga/almacenamiento. Útil, sobre todo, en «Reduced Tiny»."
  
  #: config/avr/avr.opt:149
  #, no-c-format
*************** msgstr "Permite truncar en lugar de redo
*** 9011,9043 ****
  #: config/avr/avr.opt:161
  #, no-c-format
  msgid "Optimization. Run a post-reload pass that tweaks move instructions."
! msgstr ""
  
  #: config/avr/avr.opt:165
  #, no-c-format
  msgid "-mfuse-move=<0,23>\tOptimization. Run a post-reload pass that tweaks move instructions."
! msgstr ""
  
  #: config/avr/avr.opt:169
  #, no-c-format
  msgid "Optimization. Fuse some move insns after insn combine."
! msgstr ""
  
  #: config/avr/avr.opt:173
! #, fuzzy, no-c-format
! #| msgid "Assume that all data in static storage can be accessed by LDS / STS.  This option is only useful for reduced Tiny devices."
  msgid "Assume that all data in static storage can be accessed by LDS / STS instructions.  This option is only useful for reduced Tiny devices like ATtiny40."
! msgstr "Asume que se puede acceder a todos los datos en el almacenamiento estático por LDS / STS.  Esta opción solo es útil para dispositivos Tiny reducidos."
  
  #: config/avr/avr.opt:177
  #, no-c-format
  msgid "-mdouble=<BITS>\tUse <BITS> bits wide double type."
! msgstr ""
  
  #: config/avr/avr.opt:181
  #, no-c-format
  msgid "-mlong-double=<BITS>\tUse <BITS> bits wide long double type."
! msgstr ""
  
  #: config/avr/avr.opt:185
  #, no-c-format
--- 8926,8957 ----
  #: config/avr/avr.opt:161
  #, no-c-format
  msgid "Optimization. Run a post-reload pass that tweaks move instructions."
! msgstr "Optimización. Corre un paso de post recarga que ajusta las instruccions move."
  
  #: config/avr/avr.opt:165
  #, no-c-format
  msgid "-mfuse-move=<0,23>\tOptimization. Run a post-reload pass that tweaks move instructions."
! msgstr "-mfuse-move=<0,23>\tOptimización. Corre un paso de post recarga que ajusta las instruccions move."
  
  #: config/avr/avr.opt:169
  #, no-c-format
  msgid "Optimization. Fuse some move insns after insn combine."
! msgstr "Optimización. Fusiona algunas instrucciones move después de combinar instrucciones."
  
  #: config/avr/avr.opt:173
! #, no-c-format
  msgid "Assume that all data in static storage can be accessed by LDS / STS instructions.  This option is only useful for reduced Tiny devices like ATtiny40."
! msgstr "Asume que se puede acceder a todos los datos en el almacenamiento estático mediante instrucciones LDS / STS.  Esta opción solo es útil para dispositivos Tiny reducidos como el ATtiny40."
  
  #: config/avr/avr.opt:177
  #, no-c-format
  msgid "-mdouble=<BITS>\tUse <BITS> bits wide double type."
! msgstr "-mdouble=<BITS>\tUtiliza un tipo double de <BITS> bits de tamaño."
  
  #: config/avr/avr.opt:181
  #, no-c-format
  msgid "-mlong-double=<BITS>\tUse <BITS> bits wide long double type."
! msgstr "-mlong-double=<BITS>\tUtiliza un tipo long double de <BITS> bits de tamaño."
  
  #: config/avr/avr.opt:185
  #, no-c-format
*************** msgid "Do not link against the device-sp
*** 9045,9059 ****
  msgstr "No enlaza contra la biblioteca específica de dispositivo lib<MCU>.a."
  
  #: config/avr/avr.opt:189
! #, fuzzy, no-c-format
! #| msgid "Do not link against the device-specific library lib<MCU>.a."
  msgid "Do not use the device-specific specs file device-specs/specs-<MCU>."
! msgstr "No enlaza contra la biblioteca específica de dispositivo lib<MCU>.a."
  
  #: config/avr/avr.opt:193
  #, no-c-format
  msgid "Available BITS selections:"
! msgstr ""
  
  #: config/m32r/m32r.opt:34
  #, no-c-format
--- 8959,8972 ----
  msgstr "No enlaza contra la biblioteca específica de dispositivo lib<MCU>.a."
  
  #: config/avr/avr.opt:189
! #, no-c-format
  msgid "Do not use the device-specific specs file device-specs/specs-<MCU>."
! msgstr "No utiliza el fichero de especificaciones específico de dispositivo device-specs/specs-<MCU>."
  
  #: config/avr/avr.opt:193
  #, no-c-format
  msgid "Available BITS selections:"
! msgstr "Selecciones de BITS disponibles:"
  
  #: config/m32r/m32r.opt:34
  #, no-c-format
*************** msgstr "Asume que los segmentos de datos
*** 9288,9351 ****
  #: config/s390/s390.opt:245
  #, no-c-format
  msgid "Wrap all indirect branches into execute in order to disable branch prediction."
! msgstr ""
  
  #: config/s390/s390.opt:250
  #, no-c-format
  msgid "Wrap indirect table jumps and computed gotos into execute in order to disable branch prediction.  Using thunk or thunk-extern with this option requires the thunks to be considered signal handlers to order to generate correct CFI.  For environments where unwinding (e.g. for exceptions) is required please use thunk-inline instead."
! msgstr ""
  
  #: config/s390/s390.opt:258
  #, no-c-format
  msgid "Wrap all indirect calls into execute in order to disable branch prediction."
! msgstr ""
  
  #: config/s390/s390.opt:262
  #, no-c-format
  msgid "Wrap all indirect return branches into execute in order to disable branch prediction."
! msgstr ""
  
  #: config/s390/s390.opt:267
  #, no-c-format
  msgid "Wrap indirect return branches into execute in order to disable branch prediction. This affects only branches where the return address is going to be restored from memory."
! msgstr ""
  
  #: config/s390/s390.opt:273
  #, no-c-format
  msgid "Wrap indirect return branches into execute in order to disable branch prediction. This affects only branches where the return address doesn't need to be restored from memory."
! msgstr ""
  
  #: config/s390/s390.opt:295
  #, no-c-format
  msgid "Generate sections .s390_indirect_jump, .s390_indirect_call, .s390_return_reg, and .s390_return_mem to contain the indirect branch locations which have been patched as part of using one of the -mindirect-branch* or -mfunction-return* options.  The sections consist of an array of 32 bit elements. Each entry holds the offset from the entry to the patched location."
! msgstr ""
  
  #: config/s390/s390.opt:304
! #, fuzzy, no-c-format
! #| msgid "Emit profiling counter call at function entry before prologue."
  msgid "Emit profiling counter call at function entry before prologue. The compiled code will require a 64-bit CPU and glibc 2.29 or newer to run."
! msgstr "Emite llamada a contador de perfil en la entrada de función antes del prólogo."
  
  #: config/s390/s390.opt:309
! #, fuzzy, no-c-format
! #| msgid "Generate __mcount_loc section with all mcount or __fentry__ calls."
  msgid "Generate __mcount_loc section with all _mcount and __fentry__ calls."
! msgstr "Genera sección __mcount_loc con todos los mcount o llamadas __fentry__."
  
  #: config/s390/s390.opt:318
  #, no-c-format
  msgid "Emit fused multiply-add instructions for long doubles in vector registers (wfmaxb, wfmsxb, wfnmaxb, wfnmsxb).  Reassociation pass does not handle fused multiply-adds, therefore code generated by the middle-end is prone to having long fused multiply-add chains.  This is not pipeline-friendly, and the default behavior is to emit separate multiplication and addition instructions for long doubles in vector registers, because measurements show that this improves performance.  This option allows overriding it for testing purposes."
! msgstr ""
  
  #: config/s390/s390.opt:333
  #, no-c-format
  msgid "Store all argument registers on the stack."
! msgstr ""
  
  #: config/s390/s390.opt:337
  #, no-c-format
  msgid "Assume external symbols, whose natural alignment would be 1, to be potentially unaligned.  By default all symbols without explicit alignment are assumed to reside on a 2 byte boundary as mandated by the IBM Z ABI."
! msgstr ""
  
  #: config/rl78/rl78.opt:27 config/rx/elf.opt:26 config/csky/csky.opt:198
  #, no-c-format
--- 9201,9262 ----
  #: config/s390/s390.opt:245
  #, no-c-format
  msgid "Wrap all indirect branches into execute in order to disable branch prediction."
! msgstr "Envuelve todas las ramificaciones indirectas en ejecuciones para deshabilitar la predicción de bifurcación."
  
  #: config/s390/s390.opt:250
  #, no-c-format
  msgid "Wrap indirect table jumps and computed gotos into execute in order to disable branch prediction.  Using thunk or thunk-extern with this option requires the thunks to be considered signal handlers to order to generate correct CFI.  For environments where unwinding (e.g. for exceptions) is required please use thunk-inline instead."
! msgstr "Envuelve los saltos de tabla indirectos y los gotos calculados en ejecuciones para deshabilitar la predicción de bifurcación.  Utilizando «thunk» o «thunk-extern» con esta opción requiere considerar los «thunks» como manejadores de señales para ordenar para generar CFI correctos.  Para entornos en los que se requiera desenrollamiento (por ejemplo, para excepciones), utilícese «thunk-inline» en su lugar."
  
  #: config/s390/s390.opt:258
  #, no-c-format
  msgid "Wrap all indirect calls into execute in order to disable branch prediction."
! msgstr "Envuelve todas las llamadas indirectas en ejecuciones para deshabilitar la predicción de bifurcación."
  
  #: config/s390/s390.opt:262
  #, no-c-format
  msgid "Wrap all indirect return branches into execute in order to disable branch prediction."
! msgstr "Envuelve todas las bifurcaciones return indirectas en ejecuciones para deshabilitar la predicción de bifurcación."
  
  #: config/s390/s390.opt:267
  #, no-c-format
  msgid "Wrap indirect return branches into execute in order to disable branch prediction. This affects only branches where the return address is going to be restored from memory."
! msgstr "Envuelve las bifurcaciones return indirectas en ejecuciones para deshabilitar la predicción de bifurcación. Esto solo afecta a bifurcaciones en las que la dirección de retorno va a restaurarse desde memoria."
  
  #: config/s390/s390.opt:273
  #, no-c-format
  msgid "Wrap indirect return branches into execute in order to disable branch prediction. This affects only branches where the return address doesn't need to be restored from memory."
! msgstr "Envuelve las bifurcaciones return indirectas en ejecuciones para deshabilitar la predicción de bifurcación. Esto solo afecta a bifurcaciones en las que la dirección de retorno no necesita restaurarse desde memoria."
  
  #: config/s390/s390.opt:295
  #, no-c-format
  msgid "Generate sections .s390_indirect_jump, .s390_indirect_call, .s390_return_reg, and .s390_return_mem to contain the indirect branch locations which have been patched as part of using one of the -mindirect-branch* or -mfunction-return* options.  The sections consist of an array of 32 bit elements. Each entry holds the offset from the entry to the patched location."
! msgstr "Genera secciones .s390_indirect_jump, .s390_indirect_call, .s390_return_reg y .s390_return_mem para alojar las localizaciones de ramificaciones indirectas que se han parcheado como para de utilizar una de las opciones -mindirect-branch* o -mfunction-return*.  Las secciones constan de una lista de elementos de 32 bits. Cada entrada guarda el desplazamiento desde la entrada a la localización parcehada."
  
  #: config/s390/s390.opt:304
! #, no-c-format
  msgid "Emit profiling counter call at function entry before prologue. The compiled code will require a 64-bit CPU and glibc 2.29 or newer to run."
! msgstr "Emite llamada a contador de perfil en la entrada de función antes del prólogo. El código compilado requerirá una CPU de 64 btis y glib 2.29 o superior para correr."
  
  #: config/s390/s390.opt:309
! #, no-c-format
  msgid "Generate __mcount_loc section with all _mcount and __fentry__ calls."
! msgstr "Genera sección __mcount_loc con todos las llamadas a _mcount y __fentry__."
  
  #: config/s390/s390.opt:318
  #, no-c-format
  msgid "Emit fused multiply-add instructions for long doubles in vector registers (wfmaxb, wfmsxb, wfnmaxb, wfnmsxb).  Reassociation pass does not handle fused multiply-adds, therefore code generated by the middle-end is prone to having long fused multiply-add chains.  This is not pipeline-friendly, and the default behavior is to emit separate multiplication and addition instructions for long doubles in vector registers, because measurements show that this improves performance.  This option allows overriding it for testing purposes."
! msgstr "Emite instrucciones multiplicación-adición fusionadas para long doubles en los registros vectoriales (wfmaxb, wfmsxb, wfnmaxb, wfnmsxb).  El pase de reasociación no maneja multiplicaciones-adiciones fusionadas; por lo tanto, el código generado hacia el medio-final es proclive a tener cadenas largas de multiplicaciones-adiciones fusionadas.  Esto no facilita las «pipelines», por lo que el comportamiento predefinido es emitir instrucciones de multiplicación y adición separadas para long doubles en registros vectoriales, ya que las mediciones reflejan que esto mejora el rendimiento.  Esta opción puede anularse con fines de test."
  
  #: config/s390/s390.opt:333
  #, no-c-format
  msgid "Store all argument registers on the stack."
! msgstr "Almacena todos los registros de los argumentos en la pila."
  
  #: config/s390/s390.opt:337
  #, no-c-format
  msgid "Assume external symbols, whose natural alignment would be 1, to be potentially unaligned.  By default all symbols without explicit alignment are assumed to reside on a 2 byte boundary as mandated by the IBM Z ABI."
! msgstr "Asume que los símbolos externos, cuyo alineamienta natural sería 1, puedan estar desalineados.  Lo predefindo es asumir que todos los símbolos sin alineamiento explícito residan en contornos de 2 bytes, como prescribe el ABI del IBM Z."
  
  #: config/rl78/rl78.opt:27 config/rx/elf.opt:26 config/csky/csky.opt:198
  #, no-c-format
*************** msgstr "Ajusta el código para el proces
*** 9570,9576 ****
  #: config/arm/arm.opt:255
  #, no-c-format
  msgid "Print CPU tuning information as comment in assembler file.  This is an option used only for regression testing of the compiler and not intended for ordinary use in compiling code."
! msgstr ""
  
  #: config/arm/arm.opt:266
  #, no-c-format
--- 9481,9487 ----
  #: config/arm/arm.opt:255
  #, no-c-format
  msgid "Print CPU tuning information as comment in assembler file.  This is an option used only for regression testing of the compiler and not intended for ordinary use in compiling code."
! msgstr "Imprime información de ajuste de la CPU como comentario en el fichero ensamblador.  Esta es una opción que solo se utiliza para pruebas de regresión del compilador y no se destinan al uso ordinario en compilación de código."
  
  #: config/arm/arm.opt:266
  #, no-c-format
*************** msgstr "Usa los registros double-word Ne
*** 9585,9591 ****
  #: config/arm/arm.opt:274
  #, no-c-format
  msgid "Enable more verbose RTX cost dumps during debug.  For GCC developers use only."
! msgstr ""
  
  #: config/arm/arm.opt:278
  #, no-c-format
--- 9496,9502 ----
  #: config/arm/arm.opt:274
  #, no-c-format
  msgid "Enable more verbose RTX cost dumps during debug.  For GCC developers use only."
! msgstr "Habilita volcados más prolijos sobre el coste RTX.  Solo para desarrolladores de GCC."
  
  #: config/arm/arm.opt:278
  #, no-c-format
*************** msgstr "Evita el traslape en registros d
*** 9605,9621 ****
  #: config/arm/arm.opt:291
  #, no-c-format
  msgid "Mitigate issues with VLLDM on some M-profile devices (CVE-2021-35465)."
! msgstr ""
  
  #: config/arm/arm.opt:295
  #, no-c-format
  msgid "Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72 (Arm erratum #1742098)."
! msgstr ""
  
  #: config/arm/arm.opt:300
  #, no-c-format
  msgid "Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72 (Arm erratum #1655431)."
! msgstr ""
  
  #: config/arm/arm.opt:305 config/nds32/nds32.opt:461 config/arc/arc.opt:495
  #, no-c-format
--- 9516,9532 ----
  #: config/arm/arm.opt:291
  #, no-c-format
  msgid "Mitigate issues with VLLDM on some M-profile devices (CVE-2021-35465)."
! msgstr "Mitiga problemas con VLLDM en algunos dispositivos N-profile (CVE-2021-35465)."
  
  #: config/arm/arm.opt:295
  #, no-c-format
  msgid "Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72 (Arm erratum #1742098)."
! msgstr "Mitiga problemas con instrucciones AES en Cortex-A57 y Cortex-A72 (Arm errata #1742098)."
  
  #: config/arm/arm.opt:300
  #, no-c-format
  msgid "Mitigate issues with AES instructions on Cortex-A57 and Cortex-A72 (Arm erratum #1655431)."
! msgstr "Mitiga problemas con instrucciones AES en Cortex-A57 y Cortex-A72 (Arm errata #1655431)."
  
  #: config/arm/arm.opt:305 config/nds32/nds32.opt:461 config/arc/arc.opt:495
  #, no-c-format
*************** msgid "Enable unaligned word and halfwor
*** 9623,9632 ****
  msgstr "Activa los accesos word sin alinear y halfword para los datos packed."
  
  #: config/arm/arm.opt:309
! #, fuzzy, no-c-format
! #| msgid "This switch is deprecated; do not use."
  msgid "This option is deprecated and has no effect."
! msgstr "Esta opción es obsoleta; no lo utilice."
  
  #: config/arm/arm.opt:313
  #, no-c-format
--- 9534,9542 ----
  msgstr "Activa los accesos word sin alinear y halfword para los datos packed."
  
  #: config/arm/arm.opt:309
! #, no-c-format
  msgid "This option is deprecated and has no effect."
! msgstr "Esta opción es obsoleta y no tiene ningún efecto."
  
  #: config/arm/arm.opt:313
  #, no-c-format
*************** msgstr "No permite que los datos constan
*** 9646,9657 ****
  #: config/arm/arm.opt:325
  #, no-c-format
  msgid "When linking for big-endian targets, generate a BE8 format image."
! msgstr ""
  
  #: config/arm/arm.opt:329
  #, no-c-format
  msgid "When linking for big-endian targets, generate a legacy BE32 format image."
! msgstr ""
  
  #: config/arm/arm.opt:333 config/sh/sh.opt:195
  #, no-c-format
--- 9556,9567 ----
  #: config/arm/arm.opt:325
  #, no-c-format
  msgid "When linking for big-endian targets, generate a BE8 format image."
! msgstr "Cuando se enlaza para objetivos «big endian», genera una imagen en formato BE8."
  
  #: config/arm/arm.opt:329
  #, no-c-format
  msgid "When linking for big-endian targets, generate a legacy BE32 format image."
! msgstr "Cuando se enlaza para objetivos «big endian», genera una imagen en el formato antiguo BE32."
  
  #: config/arm/arm.opt:333 config/sh/sh.opt:195
  #, no-c-format
*************** msgid "Cost to assume for a branch insn.
*** 9659,9673 ****
  msgstr "Costo de asumir una ramificación de insn."
  
  #: config/arm/arm.opt:341
! #, fuzzy, no-c-format
! #| msgid "Generate code which uses only the general registers."
  msgid "Generate code which uses the core registers only (r0-r14)."
! msgstr "Genera código que usa solo los registros generales."
  
  #: config/arm/arm.opt:363
  #, no-c-format
  msgid "Use an immediate to offset from the TLS register. This option is for use with fstack-protector-guard=tls and not for use in user-land code."
! msgstr ""
  
  #: config/sparc/sparc.opt:30 config/sparc/sparc.opt:34
  #: config/visium/visium.opt:37
--- 9569,9582 ----
  msgstr "Costo de asumir una ramificación de insn."
  
  #: config/arm/arm.opt:341
! #, no-c-format
  msgid "Generate code which uses the core registers only (r0-r14)."
! msgstr "Genera código que usa solo los registros del núcleo (r0-r14)."
  
  #: config/arm/arm.opt:363
  #, no-c-format
  msgid "Use an immediate to offset from the TLS register. This option is for use with fstack-protector-guard=tls and not for use in user-land code."
! msgstr "Utiliza un inmediato para desplazar desde el registro TLS.  Esta opción es para utilizar con fstack-protector-guard=tls y no para utilizar en código de usuario."
  
  #: config/sparc/sparc.opt:30 config/sparc/sparc.opt:34
  #: config/visium/visium.opt:37
*************** msgid "Use UltraSPARC Visual Instruction
*** 9726,9735 ****
  msgstr "Usa las extensiones del Conjunto de Instrucciones Visuales de UltraSPARC versión 3.0."
  
  #: config/sparc/sparc.opt:78
! #, fuzzy, no-c-format
! #| msgid "Use additional VIS instructions introduced in OSA2017."
  msgid "Use additional VIS 3 instructions introduced in OSA2011."
! msgstr "Usa las instrucciones adicionales de VIS introducidas en OSA2017."
  
  #: config/sparc/sparc.opt:82
  #, no-c-format
--- 9635,9643 ----
  msgstr "Usa las extensiones del Conjunto de Instrucciones Visuales de UltraSPARC versión 3.0."
  
  #: config/sparc/sparc.opt:78
! #, no-c-format
  msgid "Use additional VIS 3 instructions introduced in OSA2011."
! msgstr "Usa las instrucciones adicionales de VIS 3 introducidas en OSA2011."
  
  #: config/sparc/sparc.opt:82
  #, no-c-format
*************** msgid "Use UltraSPARC Visual Instruction
*** 9737,9746 ****
  msgstr "Usa las extensiones del Conjunto de Instrucciones Visuales de UltraSPARC versión 4.0."
  
  #: config/sparc/sparc.opt:86
! #, fuzzy, no-c-format
! #| msgid "Use additional VIS instructions introduced in OSA2017."
  msgid "Use additional VIS 4 instructions introduced in OSA2017."
! msgstr "Usa las instrucciones adicionales de VIS introducidas en OSA2017."
  
  #: config/sparc/sparc.opt:90
  #, no-c-format
--- 9645,9653 ----
  msgstr "Usa las extensiones del Conjunto de Instrucciones Visuales de UltraSPARC versión 4.0."
  
  #: config/sparc/sparc.opt:86
! #, no-c-format
  msgid "Use additional VIS 4 instructions introduced in OSA2017."
! msgstr "Usa las instrucciones adicionales de VIS 4 introducidas en OSA2017."
  
  #: config/sparc/sparc.opt:90
  #, no-c-format
*************** msgid "Do not generate code that can onl
*** 9808,9817 ****
  msgstr "No genera código que solo pueda correr en modo supervisor (predeterminado)."
  
  #: config/sparc/sparc.opt:142
! #, fuzzy, no-c-format
! #| msgid "Use features of and schedule code for given CPU."
  msgid "Use instructions of and schedule code for given CPU."
! msgstr "Usa las características y el código de planificador para el CPU dado."
  
  #: config/sparc/sparc.opt:228
  #, no-c-format
--- 9715,9723 ----
  msgstr "No genera código que solo pueda correr en modo supervisor (predeterminado)."
  
  #: config/sparc/sparc.opt:142
! #, no-c-format
  msgid "Use instructions of and schedule code for given CPU."
! msgstr "Usa las instrucciones y el código de planificador para la CPU dada."
  
  #: config/sparc/sparc.opt:228
  #, no-c-format
*************** msgstr "Coloca todo en la TOC normal."
*** 10051,10057 ****
  #: config/rs6000/rs6000.opt:305
  #, no-c-format
  msgid "Emit NOPs before global and after local entry point for -fpatchable-function-entry."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:309
  #, no-c-format
--- 9957,9963 ----
  #: config/rs6000/rs6000.opt:305
  #, no-c-format
  msgid "Emit NOPs before global and after local entry point for -fpatchable-function-entry."
! msgstr "Emite NOPs antes del punto de entrada global y después del local para -fpatchable-function-entry."
  
  #: config/rs6000/rs6000.opt:309
  #, no-c-format
*************** msgstr "Máx. número de bytes para move
*** 10076,10087 ****
  #: config/rs6000/rs6000.opt:325
  #, no-c-format
  msgid "Generate unaligned VSX load/store for inline expansion of memcpy/memmove."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:329
  #, no-c-format
  msgid "Generate unaligned VSX vector pair load/store for inline expansion of memcpy/memmove."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:333
  #, no-c-format
--- 9982,9993 ----
  #: config/rs6000/rs6000.opt:325
  #, no-c-format
  msgid "Generate unaligned VSX load/store for inline expansion of memcpy/memmove."
! msgstr "Genera carga/almacenamiento VSX desalineadas para expansión en línea de memcpy/memmove."
  
  #: config/rs6000/rs6000.opt:329
  #, no-c-format
  msgid "Generate unaligned VSX vector pair load/store for inline expansion of memcpy/memmove."
! msgstr "Genera carga/almacenamiento de parejas de vectores VSX desalineadas para expansión en línea de memcpy/memmove."
  
  #: config/rs6000/rs6000.opt:333
  #, no-c-format
*************** msgid "Max number of bytes to compare wi
*** 10094,10103 ****
  msgstr "El número máximo de bytes para comparar con bucles."
  
  #: config/rs6000/rs6000.opt:341
! #, fuzzy, no-c-format
! #| msgid "Max number of bytes to compare with loops."
  msgid "Max number of bytes to compare."
! msgstr "El número máximo de bytes para comparar con bucles."
  
  #: config/rs6000/rs6000.opt:345
  #, no-c-format
--- 10000,10008 ----
  msgstr "El número máximo de bytes para comparar con bucles."
  
  #: config/rs6000/rs6000.opt:341
! #, no-c-format
  msgid "Max number of bytes to compare."
! msgstr "El número máximo de bytes para comparar."
  
  #: config/rs6000/rs6000.opt:345
  #, no-c-format
*************** msgstr "No usa las extensiones de ABI Al
*** 10122,10134 ****
  #: config/rs6000/rs6000.opt:363
  #, no-c-format
  msgid "Use the AIX Vector Extended ABI."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:367
! #, fuzzy, no-c-format
! #| msgid "Do not use the AltiVec ABI extensions."
  msgid "Do not use the AIX Vector Extended ABI."
! msgstr "No usa las extensiones de ABI AltiVec."
  
  #: config/rs6000/rs6000.opt:372
  #, no-c-format
--- 10027,10038 ----
  #: config/rs6000/rs6000.opt:363
  #, no-c-format
  msgid "Use the AIX Vector Extended ABI."
! msgstr "Utiliza la ABI extendida vectorial de AIX."
  
  #: config/rs6000/rs6000.opt:367
! #, no-c-format
  msgid "Do not use the AIX Vector Extended ABI."
! msgstr "No utiliza la ABI extendida vectorial de AIX."
  
  #: config/rs6000/rs6000.opt:372
  #, no-c-format
*************** msgid "Use vector and scalar instruction
*** 10221,10230 ****
  msgstr "Usa las instrucciones de vectores y escalares añadidas en ISA 2.07."
  
  #: config/rs6000/rs6000.opt:495
! #, fuzzy, no-c-format
! #| msgid "Fuse certain integer operations together for better performance on power8."
  msgid "Fuse certain integer operations together for better performance on power10."
! msgstr "Fusiona ciertas operaciones de enteros para un mejor rendimiento en power8."
  
  #: config/rs6000/rs6000.opt:499
  #, no-c-format
--- 10125,10133 ----
  msgstr "Usa las instrucciones de vectores y escalares añadidas en ISA 2.07."
  
  #: config/rs6000/rs6000.opt:495
! #, no-c-format
  msgid "Fuse certain integer operations together for better performance on power10."
! msgstr "Fusiona ciertas operaciones de enteros para un mejor rendimiento en power10."
  
  #: config/rs6000/rs6000.opt:499
  #, no-c-format
*************** msgid "Enable default conversions betwee
*** 10292,10388 ****
  msgstr "Activa las conversiones predefinidas entre __float128 y long double."
  
  #: config/rs6000/rs6000.opt:600
! #, fuzzy, no-c-format
! #| msgid "Generate the quad word memory instructions (lq/stq)."
  msgid "Generate (do not generate) prefixed memory instructions."
! msgstr "Genera instrucciones de memoria quad word (lq/stq)."
  
  #: config/rs6000/rs6000.opt:604
! #, fuzzy, no-c-format
! #| msgid "Do not generate unaligned memory accesses."
  msgid "Generate (do not generate) pc-relative memory addressing."
! msgstr "No genera accessos a memoria sin alinear"
  
  #: config/rs6000/rs6000.opt:608
! #, fuzzy, no-c-format
! #| msgid "Do not generate unaligned memory accesses."
  msgid "Generate (do not generate) pc-relative memory optimizations for externals."
! msgstr "No genera accessos a memoria sin alinear"
  
  #: config/rs6000/rs6000.opt:612
! #, fuzzy, no-c-format
! #| msgid "Generate the quad word memory instructions (lq/stq)."
  msgid "Generate (do not generate) MMA instructions."
! msgstr "Genera instrucciones de memoria quad word (lq/stq)."
  
  #: config/rs6000/rs6000.opt:619
  #, no-c-format
  msgid "Enable instructions that guard against return-oriented programming attacks."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:623
! #, fuzzy, no-c-format
! #| msgid "Generate code in 32 bit ARM state."
  msgid "Generate code that will run in privileged state."
! msgstr "Genera código en el estado ARM de 32 bit."
  
  #: config/rs6000/rs6000.opt:627
! #, fuzzy, no-c-format
! #| msgid "Generate the quad word memory instructions (lq/stq)."
  msgid "Generate (do not generate) code that uses the XXSPLTIW instruction."
! msgstr "Genera instrucciones de memoria quad word (lq/stq)."
  
  #: config/rs6000/rs6000.opt:631
! #, fuzzy, no-c-format
! #| msgid "Generate the quad word memory instructions (lq/stq)."
  msgid "Generate (do not generate) code that uses the XXSPLTIDP instruction."
! msgstr "Genera instrucciones de memoria quad word (lq/stq)."
  
  #: config/rs6000/rs6000.opt:635
! #, fuzzy, no-c-format
! #| msgid "Generate the quad word memory instructions (lq/stq)."
  msgid "Generate (do not generate) code that uses the LXVKQ instruction."
! msgstr "Genera instrucciones de memoria quad word (lq/stq)."
  
  #: config/rs6000/rs6000.opt:641
  #, no-c-format
  msgid "Used to limit unroll factor which indicates how much the autovectorizer may unroll a loop.  The default value is 4."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:647
  #, no-c-format
  msgid "When costing for loop vectorization, we probably need to penalize the loop body cost if the existing cost model may not adequately reflect delays from unavailable vector resources.  We collect the cost for vectorized statements and non-vectorized statements separately, check the proportion of vec_cost to total cost of vec_cost and non vec_cost, and penalize only if the proportion exceeds the threshold specified by this parameter.  The default value is 85."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:656
  #, no-c-format
  msgid "Like parameter rs6000-density-pct-threshold, we also check the total sum of vec_cost and non vec_cost, and penalize only if the sum exceeds the threshold specified by this parameter.  The default value is 70."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:662
  #, no-c-format
  msgid "When both heuristics with rs6000-density-pct-threshold and rs6000-density-size-threshold are satisfied, we decide to penalize the loop body cost by the value which is specified by this parameter.  The default value is 10."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:669
  #, no-c-format
  msgid "When costing for loop vectorization, we probably need to penalize the loop body cost by accounting for excess strided or elementwise loads.  We collect the numbers for general statements and load statements according to the information for statements to be vectorized, check the proportion of load statements, and penalize only if the proportion exceeds the threshold specified by this parameter.  The default value is 45."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:678
  #, no-c-format
  msgid "Like parameter rs6000-density-load-pct-threshold, we also check if the total number of load statements exceeds the threshold specified by this parameter, and penalize only if it's satisfied.  The default value is 20."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:684 config/loongarch/loongarch.opt:306
  #, no-c-format
  msgid "Indicate how many non memory access vector instructions can be issued per cycle, it's used in unroll factor determination for autovectorizer.  The default value is 4."
! msgstr ""
  
  #: config/rs6000/rs6000.opt:690
  #, no-c-format
  msgid "When reduction factor computed for a loop exceeds the threshold specified by this parameter, prefer to unroll this loop.  The default value is 1."
! msgstr ""
  
  #: config/rs6000/sysv4.opt:24
  #, no-c-format
--- 10195,10283 ----
  msgstr "Activa las conversiones predefinidas entre __float128 y long double."
  
  #: config/rs6000/rs6000.opt:600
! #, no-c-format
  msgid "Generate (do not generate) prefixed memory instructions."
! msgstr "Genera (no genera) instrucciones de memoria prefijadas."
  
  #: config/rs6000/rs6000.opt:604
! #, no-c-format
  msgid "Generate (do not generate) pc-relative memory addressing."
! msgstr "Genera (no genera) direccionamiento de memoria relativo a pc."
  
  #: config/rs6000/rs6000.opt:608
! #, no-c-format
  msgid "Generate (do not generate) pc-relative memory optimizations for externals."
! msgstr "Genera (no genera) optimizaciones de memoria relativas a pc para externos."
  
  #: config/rs6000/rs6000.opt:612
! #, no-c-format
  msgid "Generate (do not generate) MMA instructions."
! msgstr "Genera (no genera) instrucciones MMA."
  
  #: config/rs6000/rs6000.opt:619
  #, no-c-format
  msgid "Enable instructions that guard against return-oriented programming attacks."
! msgstr "Habilita instrucciones que protegen de ataques de programación orientados a retorno."
  
  #: config/rs6000/rs6000.opt:623
! #, no-c-format
  msgid "Generate code that will run in privileged state."
! msgstr "Genera código correrá en estado privilegiado."
  
  #: config/rs6000/rs6000.opt:627
! #, no-c-format
  msgid "Generate (do not generate) code that uses the XXSPLTIW instruction."
! msgstr "Genera (no genera) que utiliza la instrucción XXSPLTIW."
  
  #: config/rs6000/rs6000.opt:631
! #, no-c-format
  msgid "Generate (do not generate) code that uses the XXSPLTIDP instruction."
! msgstr "Genera (no genera) que utiliza la instrucción XXSPLTIDP."
  
  #: config/rs6000/rs6000.opt:635
! #, no-c-format
  msgid "Generate (do not generate) code that uses the LXVKQ instruction."
! msgstr "Genera (no genera) que utiliza la instrucción LXVKQ."
  
  #: config/rs6000/rs6000.opt:641
  #, no-c-format
  msgid "Used to limit unroll factor which indicates how much the autovectorizer may unroll a loop.  The default value is 4."
! msgstr "Utilizado para limitar el factor de desenrollamiento que indica cuánto puede desenrrollar los bucles el autovectorizador.  El valor predefinido es 4."
  
  #: config/rs6000/rs6000.opt:647
  #, no-c-format
  msgid "When costing for loop vectorization, we probably need to penalize the loop body cost if the existing cost model may not adequately reflect delays from unavailable vector resources.  We collect the cost for vectorized statements and non-vectorized statements separately, check the proportion of vec_cost to total cost of vec_cost and non vec_cost, and penalize only if the proportion exceeds the threshold specified by this parameter.  The default value is 85."
! msgstr "Cuando se calcula el coste de vectorización de bucles, probablemente necesitemos penalizar el coste del cuerpo del bucle si el modelo de coste existente no puede reflejar adecuadamente los retardos causados por los recursos vectoriales no disponibles.  Recopilamos por separado el coste de sentencias vectorizadas y no vectorizadas, comprobamos la proporción de coste_vec frente al total del coste_vec y coste_no_vec, y penalizamos únicamente si la proporción sobrepasa el umbral especificado por este parámetro.  El valor predefinidos es 85."
  
  #: config/rs6000/rs6000.opt:656
  #, no-c-format
  msgid "Like parameter rs6000-density-pct-threshold, we also check the total sum of vec_cost and non vec_cost, and penalize only if the sum exceeds the threshold specified by this parameter.  The default value is 70."
! msgstr "Igual que el parámetro rs6000-density-pct-threshold, también comprobamos la suma total de coste_vec y coste_no_vec, y penalizamos únicamente si la suma sobrepasa el umbral especificado por este parámetro.  El valor predefinido es 70."
  
  #: config/rs6000/rs6000.opt:662
  #, no-c-format
  msgid "When both heuristics with rs6000-density-pct-threshold and rs6000-density-size-threshold are satisfied, we decide to penalize the loop body cost by the value which is specified by this parameter.  The default value is 10."
! msgstr "Cuando los heurísticos con rs6000-density-pct-threshold y rs6000-density-size-threshold se satisfacen ambos, decidimos penalizar el coste del cuerpo del bucle con el valor especificado por este parámetro.  El valor predefinido es 10."
  
  #: config/rs6000/rs6000.opt:669
  #, no-c-format
  msgid "When costing for loop vectorization, we probably need to penalize the loop body cost by accounting for excess strided or elementwise loads.  We collect the numbers for general statements and load statements according to the information for statements to be vectorized, check the proportion of load statements, and penalize only if the proportion exceeds the threshold specified by this parameter.  The default value is 45."
! msgstr "Cuando se calcula el coste de vectorización de bucles, probablemente necesitemos penalizar el coste del cuerpo del bucle contabilizando el exceso de cargas por pasos o por elementos.  Recopilamos el número de sentencias generales y el de sentencias de carga según la información sobre sentencias que se van a vectorizar, comprobamos la proporción de de sentencias de carga, y penalizamos únicamente si la proporción sobrepasa el umbral especificado por este parámetro.  El valor predefinidos es 45."
  
  #: config/rs6000/rs6000.opt:678
  #, no-c-format
  msgid "Like parameter rs6000-density-load-pct-threshold, we also check if the total number of load statements exceeds the threshold specified by this parameter, and penalize only if it's satisfied.  The default value is 20."
! msgstr "Igual que el parámetro rs6000-density-load-pct-threshold, también comprobamos si el número total de sentencias de carga sobrepasa el umbral especificado por este parámetro, y penalizamos únicamente si se satisface.  El valor predefinido es 20."
  
  #: config/rs6000/rs6000.opt:684 config/loongarch/loongarch.opt:306
  #, no-c-format
  msgid "Indicate how many non memory access vector instructions can be issued per cycle, it's used in unroll factor determination for autovectorizer.  The default value is 4."
! msgstr "Indica cuántas instrucciones vectoriales de acceso a memoria se pueden generar por ciclo; se utiliza para determinar el factor de desenrollamiento para el autovectorizador.  El valor predefinido es 4."
  
  #: config/rs6000/rs6000.opt:690
  #, no-c-format
  msgid "When reduction factor computed for a loop exceeds the threshold specified by this parameter, prefer to unroll this loop.  The default value is 1."
! msgstr "Cuando el factor de reducción calculado para un bucle sobrepasa el umbral especificado por este parámetro, es preferible desenrollar este bucle.  El valor predefinido es 1."
  
  #: config/rs6000/sysv4.opt:24
  #, no-c-format
*************** msgstr "Produce código big endian."
*** 10432,10441 ****
  #: config/rs6000/sysv4.opt:86 config/rs6000/sysv4.opt:90
  #: config/rs6000/sysv4.opt:99 config/rs6000/sysv4.opt:141
  #: config/rs6000/sysv4.opt:153
! #, fuzzy, no-c-format
! #| msgid "no description yet."
  msgid "No description yet."
! msgstr "sin descripción aún."
  
  #: config/rs6000/sysv4.opt:94
  #, no-c-format
--- 10327,10335 ----
  #: config/rs6000/sysv4.opt:86 config/rs6000/sysv4.opt:90
  #: config/rs6000/sysv4.opt:99 config/rs6000/sysv4.opt:141
  #: config/rs6000/sysv4.opt:153
! #, no-c-format
  msgid "No description yet."
! msgstr "Sin descripción aún."
  
  #: config/rs6000/sysv4.opt:94
  #, no-c-format
*************** msgstr "Activa las instrucciones definid
*** 10655,10672 ****
  #: config/loongarch/loongarch.opt:41
  #, no-c-format
  msgid "Basic ISAs of LoongArch:"
! msgstr ""
  
  #: config/loongarch/loongarch.opt:49
  #, no-c-format
  msgid "FPU types of LoongArch:"
! msgstr ""
  
  #: config/loongarch/loongarch.opt:62
! #, fuzzy, no-c-format
! #| msgid "-march=ISA\tGenerate code for the given ISA."
  msgid "-mfpu=FPU\tGenerate code for the given FPU."
! msgstr "-march=ISA\tGenera código para el ISA dado."
  
  #: config/loongarch/loongarch.opt:69 config/mips/mips.opt:398
  #, no-c-format
--- 10549,10565 ----
  #: config/loongarch/loongarch.opt:41
  #, no-c-format
  msgid "Basic ISAs of LoongArch:"
! msgstr "ISAs básicos de LoongArch:"
  
  #: config/loongarch/loongarch.opt:49
  #, no-c-format
  msgid "FPU types of LoongArch:"
! msgstr "Tipos de FPU de LoongArch:"
  
  #: config/loongarch/loongarch.opt:62
! #, no-c-format
  msgid "-mfpu=FPU\tGenerate code for the given FPU."
! msgstr "-mfpu=FPU\tGenera código para la FPU dada."
  
  #: config/loongarch/loongarch.opt:69 config/mips/mips.opt:398
  #, no-c-format
*************** msgstr "Permite que las instrucciones de
*** 10686,10741 ****
  #: config/loongarch/loongarch.opt:81
  #, no-c-format
  msgid "SIMD extension levels of LoongArch:"
! msgstr ""
  
  #: config/loongarch/loongarch.opt:94
! #, fuzzy, no-c-format
! #| msgid "-march=ISA\tGenerate code for the given ISA."
  msgid "-msimd=SIMD\tGenerate code for the given SIMD extension."
! msgstr "-march=ISA\tGenera código para el ISA dado."
  
  #: config/loongarch/loongarch.opt:98
  #, no-c-format
  msgid "Enable LoongArch SIMD Extension (LSX, 128-bit)."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:102
  #, no-c-format
  msgid "Enable LoongArch Advanced SIMD Extension (LASX, 256-bit)."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:107
  #, no-c-format
  msgid "LoongArch ARCH presets:"
! msgstr ""
  
  #: config/loongarch/loongarch.opt:132
! #, fuzzy, no-c-format
! #| msgid "-march=ISA\tGenerate code for the given ISA."
  msgid "-march=PROCESSOR\tGenerate code for the given PROCESSOR ISA."
! msgstr "-march=ISA\tGenera código para el ISA dado."
  
  #: config/loongarch/loongarch.opt:136
  #, no-c-format
  msgid "LoongArch TUNE presets:"
! msgstr ""
  
  #: config/loongarch/loongarch.opt:155
! #, fuzzy, no-c-format
! #| msgid "-mtune=PROCESSOR\tOptimize the output for PROCESSOR."
  msgid "-mtune=PROCESSOR\tGenerate optimized code for PROCESSOR."
! msgstr "-mtune=PROCESADOR\tOptimiza la salida para el PROCESADOR."
  
  #: config/loongarch/loongarch.opt:164
  #, no-c-format
  msgid "Base ABI types for LoongArch:"
! msgstr ""
  
  #: config/loongarch/loongarch.opt:177
! #, fuzzy, no-c-format
! #| msgid "-mabi=ABI\tGenerate code that conforms to the given ABI."
  msgid "-mabi=BASEABI\tGenerate code that conforms to the given BASEABI."
! msgstr "-mabi=ABI\tGenera código que cumpla con la ABI dada."
  
  #: config/loongarch/loongarch.opt:186 config/mips/mips.opt:71
  #, no-c-format
--- 10579,10630 ----
  #: config/loongarch/loongarch.opt:81
  #, no-c-format
  msgid "SIMD extension levels of LoongArch:"
! msgstr "Niveles de extensión SIMD de LoongArch:"
  
  #: config/loongarch/loongarch.opt:94
! #, no-c-format
  msgid "-msimd=SIMD\tGenerate code for the given SIMD extension."
! msgstr "-msimd=SIMD\tGenera código para la extensión SIMD dada."
  
  #: config/loongarch/loongarch.opt:98
  #, no-c-format
  msgid "Enable LoongArch SIMD Extension (LSX, 128-bit)."
! msgstr "Habilita la Extensión SIMD de LongArch (LSX, 128 bits)."
  
  #: config/loongarch/loongarch.opt:102
  #, no-c-format
  msgid "Enable LoongArch Advanced SIMD Extension (LASX, 256-bit)."
! msgstr "Habilita la Extensión SIMD Avanzada de LongArch (LASX, 256 bits)."
  
  #: config/loongarch/loongarch.opt:107
  #, no-c-format
  msgid "LoongArch ARCH presets:"
! msgstr "Configuración predefinida de ARCH de LoongArch:"
  
  #: config/loongarch/loongarch.opt:132
! #, no-c-format
  msgid "-march=PROCESSOR\tGenerate code for the given PROCESSOR ISA."
! msgstr "-march=PROCESADOR\tGenera código para el ISA del PROCESADOR dado."
  
  #: config/loongarch/loongarch.opt:136
  #, no-c-format
  msgid "LoongArch TUNE presets:"
! msgstr "Configuración predefinida de TUNE de LoongArch:"
  
  #: config/loongarch/loongarch.opt:155
! #, no-c-format
  msgid "-mtune=PROCESSOR\tGenerate optimized code for PROCESSOR."
! msgstr "-mtune=PROCESADOR\tGenera código optimizado para el PROCESADOR."
  
  #: config/loongarch/loongarch.opt:164
  #, no-c-format
  msgid "Base ABI types for LoongArch:"
! msgstr "Tipos de ABI base para LoongArch:"
  
  #: config/loongarch/loongarch.opt:177
! #, no-c-format
  msgid "-mabi=BASEABI\tGenerate code that conforms to the given BASEABI."
! msgstr "-mabi=ABIBASE\tGenera código que cumpla con la ABIBASE dada."
  
  #: config/loongarch/loongarch.opt:186 config/mips/mips.opt:71
  #, no-c-format
*************** msgstr "-mbranch-cost=COSTO\tEstablece e
*** 10745,10751 ****
  #: config/loongarch/loongarch.opt:190
  #, no-c-format
  msgid "-maddr-reg-reg-cost=COST  Set the cost of ADDRESS_REG_REG to the value calculated by COST."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:194 config/mips/mips.opt:83
  #, no-c-format
--- 10634,10640 ----
  #: config/loongarch/loongarch.opt:190
  #, no-c-format
  msgid "-maddr-reg-reg-cost=COST  Set the cost of ADDRESS_REG_REG to the value calculated by COST."
! msgstr "-maddr-reg-reg-cost=COSTE  Establece el coste de ADDRESS_REG_REG en el valor calculado por COSTE."
  
  #: config/loongarch/loongarch.opt:194 config/mips/mips.opt:83
  #, no-c-format
*************** msgstr "Atrapa la división entera por c
*** 10755,10844 ****
  #: config/loongarch/loongarch.opt:198
  #, no-c-format
  msgid "Conditional moves for integral are enabled."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:202
  #, no-c-format
  msgid "Conditional moves for float are enabled."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:206
  #, no-c-format
  msgid "Prevent optimizing block moves, which is also the default behavior of -Os."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:214
  #, no-c-format
  msgid "-mmax-inline-memcpy-size=SIZE\tSet the max size of memcpy to inline, default is 1024."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:218 config/mips/mips.opt:150
! #, fuzzy, no-c-format
! #| msgid "The code model option names for -mcmodel:"
  msgid "The code model option names for -mexplicit-relocs:"
! msgstr "Los nombres de las opciones de modelos de código para -mcmodel:"
  
  #: config/loongarch/loongarch.opt:231 config/mips/mips.opt:163
! #, fuzzy, no-c-format
! #| msgid "Use NewABI-style %reloc() assembly operators."
  msgid "Use %reloc() assembly operators."
! msgstr "Usa los operadores de ensamblador %reloc() del estilo NewABI."
  
  #: config/loongarch/loongarch.opt:235 config/mips/mips.opt:167
! #, fuzzy, no-c-format
! #| msgid "Only retained for backward compatibility."
  msgid "Use %reloc() assembly operators (for backward compatibility)."
! msgstr "Preservado por compatibilidad hacia atrás."
  
  #: config/loongarch/loongarch.opt:243
! #, fuzzy, no-c-format
! #| msgid "Generate software reciprocal divide and square root for better throughput."
  msgid "Generate approximate reciprocal divide and square root for better throughput."
! msgstr "Genera división recíproca y raíz cuadrada de software para mejor salida."
  
  #: config/loongarch/loongarch.opt:274
  #, no-c-format
  msgid "Avoid using the GOT to access external symbols."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:283
! #, fuzzy, no-c-format
! #| msgid "Enable relaxing in the assembler."
  msgid "Pass -mrelax or -mno-relax option to the assembler."
! msgstr "Activar la relajación en el ensamblador."
  
  #: config/loongarch/loongarch.opt:301
  #, no-c-format
  msgid "Used to limit unroll factor which indicates how much the autovectorizer may unroll a loop.  The default value is 6."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:319
  #, no-c-format
  msgid "Annotate table jump instruction (jr {reg}) to correlate it with the jump table."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:323
! #, fuzzy, no-c-format
! #| msgid "Support code generation of crc32 instruction."
  msgid "Support frecipe.{s/d} and frsqrte.{s/d} instructions."
! msgstr "Admite la generación de código de la instrucción crc32."
  
  #: config/loongarch/loongarch.opt:327
  #, no-c-format
  msgid "Support div.w[u] and mod.w[u] instructions with inputs not sign-extended."
! msgstr ""
  
  #: config/loongarch/loongarch.opt:331
! #, fuzzy, no-c-format
! #| msgid "Support XSAVEC instructions."
  msgid "Support am{swap/add}[_db].{b/h} instructions."
! msgstr "Admite las instrucciones XSAVEC."
  
  #: config/loongarch/loongarch.opt:335
! #, fuzzy, no-c-format
! #| msgid "Support XSAVEC instructions."
  msgid "Support amcas[_db].{b/h/w/d} instructions."
! msgstr "Admite las instrucciones XSAVEC."
  
  #: config/loongarch/loongarch.opt:339
  #, no-c-format
--- 10644,10725 ----
  #: config/loongarch/loongarch.opt:198
  #, no-c-format
  msgid "Conditional moves for integral are enabled."
! msgstr "Los movimientos condicionales para enteros están habilitados."
  
  #: config/loongarch/loongarch.opt:202
  #, no-c-format
  msgid "Conditional moves for float are enabled."
! msgstr "Los movimientos condicionales para coma flotante están habilitados."
  
  #: config/loongarch/loongarch.opt:206
  #, no-c-format
  msgid "Prevent optimizing block moves, which is also the default behavior of -Os."
! msgstr "Evita optimizar movimientos de bloques, que es también el comportamiento predefinido de -Os."
  
  #: config/loongarch/loongarch.opt:214
  #, no-c-format
  msgid "-mmax-inline-memcpy-size=SIZE\tSet the max size of memcpy to inline, default is 1024."
! msgstr "-mmax-inline-memcpy-size=TAMAÑO\tEstablece el tamaño máximo de memcpy para en línea; predefinido a 1024."
  
  #: config/loongarch/loongarch.opt:218 config/mips/mips.opt:150
! #, no-c-format
  msgid "The code model option names for -mexplicit-relocs:"
! msgstr "Los nombres de las opciones de modelos de código para -mexplicit-relocs:"
  
  #: config/loongarch/loongarch.opt:231 config/mips/mips.opt:163
! #, no-c-format
  msgid "Use %reloc() assembly operators."
! msgstr "Usa los operadores de ensamblador %reloc()."
  
  #: config/loongarch/loongarch.opt:235 config/mips/mips.opt:167
! #, no-c-format
  msgid "Use %reloc() assembly operators (for backward compatibility)."
! msgstr "Usa los operadores de ensamblador %reloc() (para compatibilidad hacia atrás)."
  
  #: config/loongarch/loongarch.opt:243
! #, no-c-format
  msgid "Generate approximate reciprocal divide and square root for better throughput."
! msgstr "Genera división recíproca y raíz cuadrada de software aproximandas para mejor rendimiento."
  
  #: config/loongarch/loongarch.opt:274
  #, no-c-format
  msgid "Avoid using the GOT to access external symbols."
! msgstr "Evita utilizar el GOT para acceder a símbolos externos."
  
  #: config/loongarch/loongarch.opt:283
! #, no-c-format
  msgid "Pass -mrelax or -mno-relax option to the assembler."
! msgstr "Pasa la opción -mrelax o -mno-relax al ensamblador."
  
  #: config/loongarch/loongarch.opt:301
  #, no-c-format
  msgid "Used to limit unroll factor which indicates how much the autovectorizer may unroll a loop.  The default value is 6."
! msgstr "Utilizado para limitar el factor de desenrollamiento que indica cuánto puede desenrollar los bucles el autovectorizador.  El valor predefinido es 6."
  
  #: config/loongarch/loongarch.opt:319
  #, no-c-format
  msgid "Annotate table jump instruction (jr {reg}) to correlate it with the jump table."
! msgstr "Anota la instrucción de salto en tabla (jr {reg}) para correlarla con la tabla de saltos."
  
  #: config/loongarch/loongarch.opt:323
! #, no-c-format
  msgid "Support frecipe.{s/d} and frsqrte.{s/d} instructions."
! msgstr "Admite las instrucciones frecipe.{s/d} y frsqrte.{s/d}."
  
  #: config/loongarch/loongarch.opt:327
  #, no-c-format
  msgid "Support div.w[u] and mod.w[u] instructions with inputs not sign-extended."
! msgstr "Admite las instrucciones div.w[u] y mod.w[u] con entradas no extendidas con signo."
  
  #: config/loongarch/loongarch.opt:331
! #, no-c-format
  msgid "Support am{swap/add}[_db].{b/h} instructions."
! msgstr "Admite las instrucciones am{swap/add}[_db].{b/h}."
  
  #: config/loongarch/loongarch.opt:335
! #, no-c-format
  msgid "Support amcas[_db].{b/h/w/d} instructions."
! msgstr "Admite las instrucciones amcas[_db].{b/h/w/d}."
  
  #: config/loongarch/loongarch.opt:339
  #, no-c-format
*************** msgstr ""
*** 10858,10909 ****
  #: config/or1k/or1k.opt:29
  #, no-c-format
  msgid "Enable generation of hardware divide (l.div, l.divu) instructions.  This is the default; use -msoft-div to override."
! msgstr ""
  
  #: config/or1k/or1k.opt:34
  #, no-c-format
  msgid "Enable generation of binaries which use functions from libgcc to perform divide operations.  The default is -mhard-div."
! msgstr ""
  
  #: config/or1k/or1k.opt:39
  #, no-c-format
  msgid "Enable generation of hardware multiply instructions (l.mul, l.muli) instructions. This is the default; use -msoft-mul to override."
! msgstr ""
  
  #: config/or1k/or1k.opt:44
  #, no-c-format
  msgid "Enable generation of binaries which use functions from libgcc to perform multiply operations. The default is -mhard-mul."
! msgstr ""
  
  #: config/or1k/or1k.opt:49
  #, no-c-format
  msgid "Enable generation of binaries which use functions from libgcc to perform floating point operations.  This is the default; use -mhard-float to override."
! msgstr ""
  
  #: config/or1k/or1k.opt:54
! #, fuzzy, no-c-format
! #| msgid "Use hardware floating point instructions."
  msgid "Enable generation of hardware floating point instructions. The default is -msoft-float."
! msgstr "Usa instrucciones de coma flotante por hardware."
  
  #: config/or1k/or1k.opt:59
  #, no-c-format
  msgid "When -mhard-float is selected, enables generation of double-precision floating point instructions.  By default functions from libgcc are used to perform double-precision floating point operations."
! msgstr ""
  
  #: config/or1k/or1k.opt:65
  #, no-c-format
  msgid "When -mhard-float is selected, enables generation of unordered floating point compare and set flag (lf.sfun*) instructions.  By default functions from libgcc are used to perform unordered floating point compare and set flag operations."
! msgstr ""
  
  #: config/or1k/or1k.opt:71
  #, no-c-format
  msgid "Specify the code model used for accessing memory addresses.  Specifying large enables generating binaries with large global offset tables.  By default the value is small."
! msgstr ""
  
  #: config/or1k/or1k.opt:77
! #, fuzzy, no-c-format
! #| msgid "Known cmodel types (for use with the -mcmodel= option):"
  msgid "Known code model types (for use with the -mcmodel= option):"
  msgstr "Tipos de modelos de código conocidos (para uso con la opción -mcmodel=):"
  
--- 10739,10788 ----
  #: config/or1k/or1k.opt:29
  #, no-c-format
  msgid "Enable generation of hardware divide (l.div, l.divu) instructions.  This is the default; use -msoft-div to override."
! msgstr "Habilita la generación de instrucciones de dividir por hardware (l.div, l.divu).  Es lo predeterminado; utilice -msoft-div para alterarlo."
  
  #: config/or1k/or1k.opt:34
  #, no-c-format
  msgid "Enable generation of binaries which use functions from libgcc to perform divide operations.  The default is -mhard-div."
! msgstr "Habilita la generación de binarios que utilizan las funciones de libgcc para realizar operaciones de dividir.  Lo predeterminado es -mhard-div."
  
  #: config/or1k/or1k.opt:39
  #, no-c-format
  msgid "Enable generation of hardware multiply instructions (l.mul, l.muli) instructions. This is the default; use -msoft-mul to override."
! msgstr "Habilita la generación de instrucciones de multiplicar por hardware (l.mul, l.muli).  Es lo predeterminado; utilice -msoft-mul para alterarlo."
  
  #: config/or1k/or1k.opt:44
  #, no-c-format
  msgid "Enable generation of binaries which use functions from libgcc to perform multiply operations. The default is -mhard-mul."
! msgstr "Habilita la generación de binarios que utilizan las funciones de libgcc para realizar operaciones de multiplicar.  Lo predeterminado es -mhard-mul."
  
  #: config/or1k/or1k.opt:49
  #, no-c-format
  msgid "Enable generation of binaries which use functions from libgcc to perform floating point operations.  This is the default; use -mhard-float to override."
! msgstr "Habilita la generación de binarios que utilizan las funciones de libgcc para realizar operaciones de coma flotante.  Es lo predeterminado utilice -mhard-float para alterarlo."
  
  #: config/or1k/or1k.opt:54
! #, no-c-format
  msgid "Enable generation of hardware floating point instructions. The default is -msoft-float."
! msgstr "Habilita la generación de instrucciones de coma flotante por hardware. Lo predeterminado es -msoft-float."
  
  #: config/or1k/or1k.opt:59
  #, no-c-format
  msgid "When -mhard-float is selected, enables generation of double-precision floating point instructions.  By default functions from libgcc are used to perform double-precision floating point operations."
! msgstr "Cuando se selecciona -mhard-float, habilita la generación de instrucciones de coma flotante de precisión doble.  Lo predeterminado es utilizar funciones de libgcc para realizar operaciones de coma flotante de precisión doble."
  
  #: config/or1k/or1k.opt:65
  #, no-c-format
  msgid "When -mhard-float is selected, enables generation of unordered floating point compare and set flag (lf.sfun*) instructions.  By default functions from libgcc are used to perform unordered floating point compare and set flag operations."
! msgstr "Cuando se selecciona -mhard-float, habilita la generación de instrucciones de comparación de coma flotante sin orden y de poner banderas (lf.sfun*) de precisión doble.  Lo predeterminado es utilizar funciones de libgcc para realizar operaciones de coma flotante de precisión doble."
  
  #: config/or1k/or1k.opt:71
  #, no-c-format
  msgid "Specify the code model used for accessing memory addresses.  Specifying large enables generating binaries with large global offset tables.  By default the value is small."
! msgstr "Especifica el modelo de código utilizado para acceder a direcciones de memoria.  Especificando «large» (grande) se habilita la generación de binarios con tablas de desplazamiento global grande.  El valor predeterminado es «small» (pequeño)."
  
  #: config/or1k/or1k.opt:77
! #, no-c-format
  msgid "Known code model types (for use with the -mcmodel= option):"
  msgstr "Tipos de modelos de código conocidos (para uso con la opción -mcmodel=):"
  
*************** msgstr ""
*** 10915,10945 ****
  #: config/or1k/or1k.opt:92
  #, no-c-format
  msgid "Enable generation of rotate right (l.ror) instructions.  By default functions from libgcc are used to perform rotate right operations."
! msgstr ""
  
  #: config/or1k/or1k.opt:97
  #, no-c-format
  msgid "Enable generation of rotate right with immediate (l.rori) instructions.  By default functions from libgcc are used to perform rotate right with immediate operations."
! msgstr ""
  
  #: config/or1k/or1k.opt:103
  #, no-c-format
  msgid "Enable generation of sign extension (l.ext*) instructions.  By default memory loads are used to perform sign extension."
! msgstr ""
  
  #: config/or1k/or1k.opt:108
  #, no-c-format
  msgid "Enable generation of compare and set flag with immediate (l.sf*i) instructions. By default extra instructions will be generated to store the immediate to a register first."
! msgstr ""
  
  #: config/or1k/or1k.opt:114
  #, no-c-format
  msgid "Enable generation of shift with immediate (l.srai, l.srli, l.slli) instructions. By default extra instructions will be generated to store the immediate to a register first."
! msgstr ""
  
  #: config/rx/elf.opt:32
! #, fuzzy, no-c-format
! #| msgid "Generate assembler output that is compatible with the Renesas AS100 assembler.  This may restrict some of the compiler's capabilities.  The default is to generate GAS compatible syntax."
  msgid "Generate assembler output that is compatible with the Renesas AS100 assembler.  This may restrict some of the compiler's capabilities.  The default is to generate GAS compatible syntax."
  msgstr "Genera salida de ensamblador que es compatible con el ensamblador AS100 de Renesas.  Esto puede restringir algunas de las capacidades del compilador.  Por defecto se genera sintaxis compatible con GAS."
  
--- 10794,10823 ----
  #: config/or1k/or1k.opt:92
  #, no-c-format
  msgid "Enable generation of rotate right (l.ror) instructions.  By default functions from libgcc are used to perform rotate right operations."
! msgstr "Habilita la generación de instrucciones de rotación derecha (l.ror).  Lo predeterminado es usar funciones de libgcc para hacer operaciones de rotación derecha."
  
  #: config/or1k/or1k.opt:97
  #, no-c-format
  msgid "Enable generation of rotate right with immediate (l.rori) instructions.  By default functions from libgcc are used to perform rotate right with immediate operations."
! msgstr "Habilita la generación de instrucciones de rotación derecha con inmediato (l.rori).  Lo predeterminado es usar funciones de libgcc para hacer operaciones de rotación derecha con inmediato."
  
  #: config/or1k/or1k.opt:103
  #, no-c-format
  msgid "Enable generation of sign extension (l.ext*) instructions.  By default memory loads are used to perform sign extension."
! msgstr "Habilita la generación de instrucciones de extensión de signo (l.ext*).  Lo predeterminado es usar cargas de memoria para hacer extensiones de signo."
  
  #: config/or1k/or1k.opt:108
  #, no-c-format
  msgid "Enable generation of compare and set flag with immediate (l.sf*i) instructions. By default extra instructions will be generated to store the immediate to a register first."
! msgstr "Habilita la generación de instrucciones de comparar y poner banderas con inmediato (l.sf*i).  Lo predeterminado es generar instrucciones extra para almacenar primero el inmediato en un registro."
  
  #: config/or1k/or1k.opt:114
  #, no-c-format
  msgid "Enable generation of shift with immediate (l.srai, l.srli, l.slli) instructions. By default extra instructions will be generated to store the immediate to a register first."
! msgstr "Habilita la generación de instrucciones de desplazamiento con inmediato (l.srai, l.srli, l.slli).  Lo predeterminado es generar instrucciones extra para almacenar primero el inmediato en un registro."
  
  #: config/rx/elf.opt:32
! #, no-c-format
  msgid "Generate assembler output that is compatible with the Renesas AS100 assembler.  This may restrict some of the compiler's capabilities.  The default is to generate GAS compatible syntax."
  msgstr "Genera salida de ensamblador que es compatible con el ensamblador AS100 de Renesas.  Esto puede restringir algunas de las capacidades del compilador.  Por defecto se genera sintaxis compatible con GAS."
  
*************** msgid "Stores doubles in 32 bits.  This
*** 10964,10973 ****
  msgstr "Almacena dobles en 32 bits.  Este es el valor por defecto."
  
  #: config/rx/rx.opt:37
! #, fuzzy, no-c-format
! #| msgid "Disable the use of RX FPU instructions.  "
  msgid "Disable the use of RX FPU instructions."
! msgstr "Desactiva el uso de las instrucciones de FPU RX.  "
  
  #: config/rx/rx.opt:44
  #, no-c-format
--- 10842,10850 ----
  msgstr "Almacena dobles en 32 bits.  Este es el valor por defecto."
  
  #: config/rx/rx.opt:37
! #, no-c-format
  msgid "Disable the use of RX FPU instructions."
! msgstr "Desactiva el uso de las instrucciones de FPU RX."
  
  #: config/rx/rx.opt:44
  #, no-c-format
*************** msgid "Description for mxl-mode-novector
*** 11190,11214 ****
  msgstr "Descripción para mxl-mode-novectors."
  
  #: config/microblaze/microblaze.opt:128
! #, fuzzy, no-c-format
! #| msgid "Use hardware prefetch instruction"
  msgid "Use hardware prefetch instruction."
! msgstr "Usa instrucciones de precargado de hardware"
  
  #: config/microblaze/microblaze.opt:132
  #, no-c-format
  msgid "Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE)."
! msgstr ""
  
  #: config/vax/vax.opt:23 config/vax/vax.opt:27
! #, fuzzy, no-c-format
! #| msgid "Generate GFLOAT double precision code."
  msgid "Generate DFLOAT double-precision code."
! msgstr "Genera código GFLOAT de doble precisión."
  
  #: config/vax/vax.opt:31 config/vax/vax.opt:35
! #, fuzzy, no-c-format
! #| msgid "Generate GFLOAT double precision code."
  msgid "Generate GFLOAT double-precision code."
  msgstr "Genera código GFLOAT de doble precisión."
  
--- 11067,11088 ----
  msgstr "Descripción para mxl-mode-novectors."
  
  #: config/microblaze/microblaze.opt:128
! #, no-c-format
  msgid "Use hardware prefetch instruction."
! msgstr "Usa instrucción de precargado de hardware."
  
  #: config/microblaze/microblaze.opt:132
  #, no-c-format
  msgid "Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE)."
! msgstr "Datos referenciados por desplazamiento desde el comienzo del texto en lugar de GOT (con -fPIC/-fPIE)."
  
  #: config/vax/vax.opt:23 config/vax/vax.opt:27
! #, no-c-format
  msgid "Generate DFLOAT double-precision code."
! msgstr "Genera código DFLOAT de doble precisión."
  
  #: config/vax/vax.opt:31 config/vax/vax.opt:35
! #, no-c-format
  msgid "Generate GFLOAT double-precision code."
  msgstr "Genera código GFLOAT de doble precisión."
  
*************** msgid "Generate code in little-endian mo
*** 11478,11493 ****
  msgstr "Genera código en modo little endian."
  
  #: config/nds32/nds32.opt:37
! #, fuzzy, no-c-format
! #| msgid "Perform cross-jumping optimization."
  msgid "Force performing fp-as-gp optimization."
! msgstr "Realiza optimizaciones de saltos cruzados."
  
  #: config/nds32/nds32.opt:41
! #, fuzzy, no-c-format
! #| msgid "Perform cross-jumping optimization."
  msgid "Forbid performing fp-as-gp optimization."
! msgstr "Realiza optimizaciones de saltos cruzados."
  
  #: config/nds32/nds32.opt:47
  #, no-c-format
--- 11352,11365 ----
  msgstr "Genera código en modo little endian."
  
  #: config/nds32/nds32.opt:37
! #, no-c-format
  msgid "Force performing fp-as-gp optimization."
! msgstr "Fuerza optimización fp-as-gp."
  
  #: config/nds32/nds32.opt:41
! #, no-c-format
  msgid "Forbid performing fp-as-gp optimization."
! msgstr "Prohibe optimización fp-as-gp."
  
  #: config/nds32/nds32.opt:47
  #, no-c-format
*************** msgid "Always align function entry, jump
*** 11520,11551 ****
  msgstr ""
  
  #: config/nds32/nds32.opt:85
! #, fuzzy, no-c-format
! #| msgid "Use alternate leaf function entries"
  msgid "Align function entry to 4 byte."
! msgstr "Usar entradas de función hojas alternadas"
  
  #: config/nds32/nds32.opt:97
  #, no-c-format
  msgid "Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization."
! msgstr ""
  
  #: config/nds32/nds32.opt:101
  #, no-c-format
  msgid "Forbid using $fp to access static and global variables.  This option strictly forbids fp-as-gp optimization regardless of '-mforce-fp-as-gp'."
! msgstr ""
  
  #: config/nds32/nds32.opt:105
! #, fuzzy, no-c-format
! #| msgid "Specify the address generation strategy for code model."
  msgid "Specify the address generation strategy for ICT call's code model."
! msgstr "Especifica la estrategia de generación de direcciones para modelo de código."
  
  #: config/nds32/nds32.opt:109
! #, fuzzy, no-c-format
! #| msgid "Known cmodel types (for use with the -mcmodel= option):"
  msgid "Known cmodel types (for use with the -mict-model= option):"
! msgstr "Tipos de modelos de código conocidos (para uso con la opción -mcmodel=):"
  
  #: config/nds32/nds32.opt:119
  #, no-c-format
--- 11392,11420 ----
  msgstr ""
  
  #: config/nds32/nds32.opt:85
! #, no-c-format
  msgid "Align function entry to 4 byte."
! msgstr "Alinea la entrada de función a 4 bytes"
  
  #: config/nds32/nds32.opt:97
  #, no-c-format
  msgid "Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization."
! msgstr "Evita que $fp sea reservado durante la reserva de registros, de modo que el compilador pueda forzar optimización fp-as-gp."
  
  #: config/nds32/nds32.opt:101
  #, no-c-format
  msgid "Forbid using $fp to access static and global variables.  This option strictly forbids fp-as-gp optimization regardless of '-mforce-fp-as-gp'."
! msgstr "Prohíbe usar $fp para acceder a variables estáticas y globales.  Esta opción prohíbe estrictamente la optimización fp-as-gp independientemente de '-mforce-fp-as-gp'."
  
  #: config/nds32/nds32.opt:105
! #, no-c-format
  msgid "Specify the address generation strategy for ICT call's code model."
! msgstr "Especifica la estrategia de generación de direcciones para el modelo de código de llamada ICT."
  
  #: config/nds32/nds32.opt:109
! #, no-c-format
  msgid "Known cmodel types (for use with the -mict-model= option):"
! msgstr "Tipos de modelos de código conocidos (para uso con la opción -mict-model=):"
  
  #: config/nds32/nds32.opt:119
  #, no-c-format
*************** msgid "Generate conditional move instruc
*** 11553,11562 ****
  msgstr "Genera instrucciones move condicionales."
  
  #: config/nds32/nds32.opt:123
! #, fuzzy, no-c-format
! #| msgid "Generate bit instructions."
  msgid "Generate hardware abs instructions."
! msgstr "Genera instrucciones de bit."
  
  #: config/nds32/nds32.opt:127
  #, no-c-format
--- 11422,11430 ----
  msgstr "Genera instrucciones move condicionales."
  
  #: config/nds32/nds32.opt:123
! #, no-c-format
  msgid "Generate hardware abs instructions."
! msgstr "Genera instrucciones abs hardware."
  
  #: config/nds32/nds32.opt:127
  #, no-c-format
*************** msgid "Generate string extension instruc
*** 11574,11583 ****
  msgstr "Genera instrucciones de extensión de cadenas."
  
  #: config/nds32/nds32.opt:139
! #, fuzzy, no-c-format
! #| msgid "Generate string extension instructions."
  msgid "Generate DSP extension instructions."
! msgstr "Genera instrucciones de extensión de cadenas."
  
  #: config/nds32/nds32.opt:143
  #, no-c-format
--- 11442,11450 ----
  msgstr "Genera instrucciones de extensión de cadenas."
  
  #: config/nds32/nds32.opt:139
! #, no-c-format
  msgid "Generate DSP extension instructions."
! msgstr "Genera instrucciones de extensión de cadenas DSP."
  
  #: config/nds32/nds32.opt:143
  #, no-c-format
*************** msgstr "Genera instrucciones de 16 bits.
*** 11592,11598 ****
  #: config/nds32/nds32.opt:151
  #, no-c-format
  msgid "Insert relax hint for linker to do relaxation."
! msgstr ""
  
  #: config/nds32/nds32.opt:155
  #, no-c-format
--- 11459,11465 ----
  #: config/nds32/nds32.opt:151
  #, no-c-format
  msgid "Insert relax hint for linker to do relaxation."
! msgstr "Inserta pista de relajación para que el enlazador haga relajación."
  
  #: config/nds32/nds32.opt:155
  #, no-c-format
*************** msgid "Specify the size of each interrup
*** 11605,11614 ****
  msgstr "Especifica el tamaño de cada vector de interrupciones, que ha de ser 4 o 16."
  
  #: config/nds32/nds32.opt:163
! #, fuzzy, no-c-format
! #| msgid "Specify the memory model in effect for the program."
  msgid "Specify the security level of c-isr for the whole file."
! msgstr "Especifica el modelo de memoria en efecto para el programa."
  
  #: config/nds32/nds32.opt:167
  #, no-c-format
--- 11472,11480 ----
  msgstr "Especifica el tamaño de cada vector de interrupciones, que ha de ser 4 o 16."
  
  #: config/nds32/nds32.opt:163
! #, no-c-format
  msgid "Specify the security level of c-isr for the whole file."
! msgstr "Especifica el nivel de seguridad de c-isr para todo el fichero."
  
  #: config/nds32/nds32.opt:167
  #, no-c-format
*************** msgid "Guide linker to relax instruction
*** 11661,11670 ****
  msgstr "Guía al enlazador para que relaje las instrucciones."
  
  #: config/nds32/nds32.opt:433
! #, fuzzy, no-c-format
! #| msgid "Generate floating point mathematics using given instruction set."
  msgid "Generate floating-point multiply-accumulation instructions."
! msgstr "Genera matemáticas de coma flotante usando el conjunto de instrucciones dado."
  
  #: config/nds32/nds32.opt:437
  #, no-c-format
--- 11527,11535 ----
  msgstr "Guía al enlazador para que relaje las instrucciones."
  
  #: config/nds32/nds32.opt:433
! #, no-c-format
  msgid "Generate floating-point multiply-accumulation instructions."
! msgstr "Genera instrucciones de multiplicar-acumular de coma flotante."
  
  #: config/nds32/nds32.opt:437
  #, no-c-format
*************** msgid "Force disable hardware loop, even
*** 11682,11697 ****
  msgstr ""
  
  #: config/nds32/nds32.opt:449
! #, fuzzy, no-c-format
! #| msgid "Permit scheduling of a function's prologue sequence."
  msgid "Permit scheduling of a function's prologue and epilogue sequence."
! msgstr "Permite la planificación de la secuencia de prólogo de funciones."
  
  #: config/nds32/nds32.opt:453
! #, fuzzy, no-c-format
! #| msgid "Generate cld instruction in the function prologue."
  msgid "Generate return instruction in naked function."
! msgstr "Genera la instrucción cld en el prólogo de función."
  
  #: config/nds32/nds32.opt:457
  #, no-c-format
--- 11547,11560 ----
  msgstr ""
  
  #: config/nds32/nds32.opt:449
! #, no-c-format
  msgid "Permit scheduling of a function's prologue and epilogue sequence."
! msgstr "Permite la planificación de la secuencia de prólogo y epílogo de funciones."
  
  #: config/nds32/nds32.opt:453
! #, no-c-format
  msgid "Generate return instruction in naked function."
! msgstr "Genera instrucción de retorno en función desnuda."
  
  #: config/nds32/nds32.opt:457
  #, no-c-format
*************** msgstr "Siempre guarda $lp en la pila."
*** 11701,11707 ****
  #: config/nds32/nds32.opt:465
  #, no-c-format
  msgid "Allow use r15 for inline ASM."
! msgstr ""
  
  #: config/iq2000/iq2000.opt:31
  #, no-c-format
--- 11564,11570 ----
  #: config/nds32/nds32.opt:465
  #, no-c-format
  msgid "Allow use r15 for inline ASM."
! msgstr "Permite usar r15 para ASM en línea."
  
  #: config/iq2000/iq2000.opt:31
  #, no-c-format
*************** msgid "Put uninitialized constants in RO
*** 11734,11743 ****
  msgstr "Pone las constantes sin inicializar en ROM (necesita -membedded-data)."
  
  #: config/csky/csky.opt:34
! #, fuzzy, no-c-format
! #| msgid "Specify the name of the target architecture."
  msgid "Specify the target architecture."
! msgstr "Especifica el nombre de la arquitectura destino."
  
  #: config/csky/csky.opt:38
  #, fuzzy, no-c-format
--- 11597,11605 ----
  msgstr "Pone las constantes sin inicializar en ROM (necesita -membedded-data)."
  
  #: config/csky/csky.opt:34
! #, no-c-format
  msgid "Specify the target architecture."
! msgstr "Especifica la arquitectura de destino."
  
  #: config/csky/csky.opt:38
  #, fuzzy, no-c-format
diff -Nrcpad gcc-15-20260117/gcc/testsuite/ChangeLog gcc-15-20260124/gcc/testsuite/ChangeLog
*** gcc-15-20260117/gcc/testsuite/ChangeLog	Sat Jan 17 22:32:08 2026
--- gcc-15-20260124/gcc/testsuite/ChangeLog	Sat Jan 24 22:32:07 2026
***************
*** 1,3 ****
--- 1,140 ----
+ 2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/123703
+ 	* gcc.c-torture/compile/pr123703.c: New test.
+ 
+ 2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/123597
+ 	* g++.dg/gomp/pr123597.C: New test.
+ 
+ 2026-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-01-22  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/123741
+ 	* gfortran.dg/vect/vect-pr123741.f90: New testcase.
+ 
+ 2026-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-01-19  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/123602
+ 	* g++.dg/torture/pr123603.C: New testcase.
+ 
+ 2026-01-23  Richard Biener  <rguenther@suse.de>
+ 
+ 	Backported from master:
+ 	2026-01-08  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/123107
+ 	* gcc.dg/torture/pr123107.c: New testcase.
+ 
+ 2026-01-23  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	Backported from master:
+ 	2026-01-08  Richard Sandiford  <rdsandiford@googlemail.com>
+ 		    Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/122793
+ 	* gcc.dg/vect/vect-pr122793.c: New testcase.
+ 
+ 2026-01-23  Avinash Jayakar  <avinashd@linux.ibm.com>
+ 
+ 	PR target/119130
+ 	* gcc.target/powerpc/builtins-1-p9-runnable.c: Use same expected
+ 	results for both endian format.
+ 
+ 2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	Backported from master:
+ 	2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+ 
+ 	* gcc.target/i386/apx-broadcast.c: New test.
+ 
+ 2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/123742
+ 	* gcc.target/arm/neon-smax16.c: New test.
+ 	* gcc.target/arm/neon-smin16.c: New test.
+ 
+ 2026-01-21  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/generic_inst16.adb: New test.
+ 	* gnat.dg/generic_inst16_pkg.ads: New helper.
+ 	* gnat.dg/generic_inst16_pkg-child.ads: Likewise.
+ 	* gnat.dg/generic_inst16_pkg-child-grandchild.ads: Likewise.
+ 	* gnat.dg/generic_inst16_proc.ads: Likewise.
+ 	* gnat.dg/generic_inst16_proc.adb: Likewise.
+ 
+ 2026-01-20  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 
+ 	Backported from master:
+ 	2025-12-23  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 
+ 	PR c++/122550
+ 	* g++.dg/cpp2a/concepts-friend18.C: New test.
+ 	* g++.dg/cpp2a/concepts-friend18a.C: New test.
+ 
+ 2026-01-20  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 
+ 	Backported from master:
+ 	2025-12-18  Egas Ribeiro  <egas.g.ribeiro@gmail.com>
+ 		    Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/122070
+ 	* g++.dg/cpp23/class-deduction-inherited10.C: New test.
+ 	* g++.dg/cpp23/class-deduction-inherited9.C: New test.
+ 
+ 2026-01-20  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR rtl-optimization/122215
+ 	* sparseset.supp: New.
+ 
+ 2026-01-19  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-16  Vladimir N. Makarov  <vmakarov@redhat.com>
+ 
+ 	PR target/123092
+ 	* gcc.target/riscv/pr123092.c: New.
+ 
+ 2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	Backported from master:
+ 	2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+ 
+ 	PR target/117575
+ 	* g++.target/loongarch/pr117575.C: New test.
+ 
+ 2026-01-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 	    Lisa Felidae  <lisa@felidae.bam.moe>
+ 
+ 	* gnat.dg/component_value2.adb: New test.
+ 
+ 2026-01-17  Eric Botcazou  <ebotcazou@adacore.com>
+ 
+ 	* gnat.dg/component_value1.adb: New test.
+ 
+ 2026-01-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-01-17  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/123513
+ 	* g++.dg/warn/Wmismatched-new-delete-10.C: New test.
+ 
  2026-01-16  Jakub Jelinek  <jakub@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited10.C gcc-15-20260124/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited10.C
*** gcc-15-20260117/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited10.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited10.C	Sat Jan 24 22:32:07 2026
***************
*** 0 ****
--- 1,11 ----
+ // PR c++/122070
+ // { dg-do compile { target c++23 } }
+ 
+ template<class T> struct A { A(T) {}; };
+ 
+ using B = A<int>;
+ 
+ template<class T=void>
+ struct C : B { using B::B; };
+ 
+ C c = 0;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited9.C gcc-15-20260124/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited9.C
*** gcc-15-20260117/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited9.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.dg/cpp23/class-deduction-inherited9.C	Sat Jan 24 22:32:07 2026
***************
*** 0 ****
--- 1,31 ----
+ // PR c++/122070
+ // { dg-do compile { target c++23 } }
+ 
+ namespace std {
+     using size_t = decltype(sizeof(0));
+     template<typename CharT>
+     struct basic_string_view {
+         const CharT* ptr;
+         size_t len;
+         constexpr basic_string_view(const CharT* p) : ptr(p), len(0) { while (p && p[len]) ++len; }
+     };
+     using string_view = basic_string_view<char>;
+ }
+ 
+ template<std::size_t N>
+ struct sized_string_view: std::string_view {
+     using std::string_view::string_view;
+ };
+ template<std::size_t N>
+ sized_string_view(const char (&str)[N]) -> sized_string_view<N - 1>;
+ 
+ constexpr auto string_builder(auto first, auto second, auto... trailing) {
+     constexpr auto is_last = sizeof...(trailing) == 0;
+     auto buffer = 1;
+     if constexpr (is_last) {
+         return buffer;
+     } else
+         return string_builder(buffer, trailing...);
+ }
+ 
+ constexpr auto copyright = string_builder(sized_string_view("a"), sized_string_view("b"), sized_string_view("c"));
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.dg/cpp2a/concepts-friend18.C gcc-15-20260124/gcc/testsuite/g++.dg/cpp2a/concepts-friend18.C
*** gcc-15-20260117/gcc/testsuite/g++.dg/cpp2a/concepts-friend18.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.dg/cpp2a/concepts-friend18.C	Sat Jan 24 22:32:07 2026
***************
*** 0 ****
--- 1,19 ----
+ // PR c++/122550
+ // { dg-do compile { target c++20 } }
+ 
+ struct Hasher;
+ template <class a>
+ concept C = true;
+ 
+ template<C T>
+ void add(Hasher&, T);
+ 
+ struct Hasher {
+     template<C T>
+     friend void add(Hasher& hasher, T integer) {}
+ };
+ 
+ int main() {
+     Hasher h;
+     add(h, 0);
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.dg/cpp2a/concepts-friend18a.C gcc-15-20260124/gcc/testsuite/g++.dg/cpp2a/concepts-friend18a.C
*** gcc-15-20260117/gcc/testsuite/g++.dg/cpp2a/concepts-friend18a.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.dg/cpp2a/concepts-friend18a.C	Sat Jan 24 22:32:07 2026
***************
*** 0 ****
--- 1,22 ----
+ // PR c++/122550
+ // { dg-do compile { target c++20 } }
+ 
+ template<typename U>
+ struct Hasher;
+ 
+ template <class a>
+ concept C = true;
+ 
+ template<C T>
+ void add(Hasher<int>&, T);
+ 
+ template<>
+ struct Hasher<int> {
+     template<C T>
+     friend void add(Hasher& hasher, T integer) {}
+ };
+ 
+ int main() {
+     Hasher<int> h;
+     add(h, 0);
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.dg/gomp/pr123597.C gcc-15-20260124/gcc/testsuite/g++.dg/gomp/pr123597.C
*** gcc-15-20260117/gcc/testsuite/g++.dg/gomp/pr123597.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.dg/gomp/pr123597.C	Sat Jan 24 22:32:07 2026
***************
*** 0 ****
--- 1,25 ----
+ // PR c++/123597
+ // { dg-do compile }
+ // { dg-additional-options "-fdump-tree-gimple" }
+ // { dg-final { scan-tree-dump-not " shared\\\(sum\\\)" "gimple" } }
+ 
+ template <typename T>
+ void
+ foo (T *x)
+ {
+   #pragma omp teams distribute parallel for collapse(2)
+   for (long i = 0; i < 5; i++)
+     for (long j = 0; j < 5; j++)
+       {
+         T sum = 0;
+         for (long k = 0; k < 5; k++)
+           sum += 2;
+         x[i + 5 * j] = sum;
+       }
+ }
+ 
+ void
+ bar (int *x)
+ {
+   foo (x);
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.dg/torture/pr123603.C gcc-15-20260124/gcc/testsuite/g++.dg/torture/pr123603.C
*** gcc-15-20260117/gcc/testsuite/g++.dg/torture/pr123603.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.dg/torture/pr123603.C	Sat Jan 24 22:32:08 2026
***************
*** 0 ****
--- 1,20 ----
+ // { dg-do compile }
+ 
+ void _setjmp();
+ void a() __attribute__((__noreturn__));
+ struct b {
+   b(int c) {
+     if (c)
+       a();
+   }
+   ~b();
+ };
+ int d;
+ void l(long);
+ void e() {
+   b a(d);
+   for (int f = 0; f < 10 ; ++f) {
+     l(f - 1);
+     _setjmp();
+   }
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/g++.target/loongarch/pr117575.C gcc-15-20260124/gcc/testsuite/g++.target/loongarch/pr117575.C
*** gcc-15-20260117/gcc/testsuite/g++.target/loongarch/pr117575.C	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/g++.target/loongarch/pr117575.C	Sat Jan 24 22:32:08 2026
***************
*** 0 ****
--- 1,81 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O3 -mlasx" } */
+ 
+ typedef long unsigned int size_t;
+ typedef unsigned char simde__mmask8;
+ typedef double simde_float64;
+ typedef simde_float64 simde__m512d __attribute__ ((__aligned__ ((64))))
+ __attribute__ ((__vector_size__ (64))) __attribute__ ((__may_alias__));
+ typedef simde_float64 simde__m256d __attribute__ ((__aligned__ ((32))))
+ __attribute__ ((__vector_size__ (32))) __attribute__ ((__may_alias__));
+ simde__m512d simde_mm512_set_pd (simde_float64 e7, simde_float64 e6,
+                                  simde_float64 e5, simde_float64 e4,
+                                  simde_float64 e3, simde_float64 e2,
+                                  simde_float64 e1, simde_float64 e0);
+ simde__m256d simde_mm256_maskz_mov_pd (simde__mmask8 k, simde__m256d a);
+ int simde_test_x86_assert_equal_f64x4_ (simde__m256d a, simde__m256d b);
+ 
+ typedef union
+ {
+ 
+   __attribute__ ((__aligned__ ((32)))) simde_float64 f64
+       __attribute__ ((__vector_size__ (32))) __attribute__ ((__may_alias__));
+ } simde__m256d_private;
+ __attribute__ ((__always_inline__)) inline static simde__m256d
+ simde__m256d_from_private (simde__m256d_private v)
+ {
+   simde__m256d r;
+   __builtin_memcpy (&r, &v, sizeof (r));
+   return r;
+ }
+ simde__m256d
+ simde_mm256_set_pd (simde_float64 e3, simde_float64 e2, simde_float64 e1,
+                     simde_float64 e0)
+ {
+ 
+   simde__m256d_private r_;
+ 
+   r_.f64[0] = e0;
+   r_.f64[1] = e1;
+   r_.f64[2] = e2;
+   r_.f64[3] = e3;
+ 
+   return simde__m256d_from_private (r_);
+ }
+ 
+ simde__m256d simde_mm512_extractf64x4_pd (simde__m512d a, int imm8);
+ int
+ test_simde_mm512_maskz_extractf64x4_pd (void)
+ {
+   const struct
+   {
+     simde__mmask8 k;
+     simde__m512d a;
+     simde__m256d r0;
+     simde__m256d r1;
+   } test_vec[2] = {
+     { 21,
+       simde_mm512_set_pd (-139.11, -172.36, -268.86, 393.53, -71.72, 36.69,
+                           98.47, -135.52),
+       simde_mm256_set_pd (0.00, 36.69, 0.00, -135.52),
+       simde_mm256_set_pd (0.00, -172.36, 0.00, 393.53) },
+     { 150,
+       simde_mm512_set_pd (-556.90, 522.06, 160.98, -932.28, 391.82, 600.12,
+                           -569.99, -491.12),
+       simde_mm256_set_pd (0.00, 600.12, -569.99, 0.00),
+       simde_mm256_set_pd (0.00, 522.06, 160.98, 0.00) },
+   };
+ 
+   for (size_t i = 0; i < (sizeof (test_vec) / sizeof (test_vec[0])); i++)
+     {
+       simde__m256d r;
+       r = simde_mm256_maskz_mov_pd (
+           test_vec[i].k, simde_mm512_extractf64x4_pd (test_vec[i].a, 0));
+       if (simde_test_x86_assert_equal_f64x4_ (r, test_vec[i].r0))
+         {
+           return 1;
+         }
+     }
+ 
+   return 0;
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.c-torture/compile/pr123703.c gcc-15-20260124/gcc/testsuite/gcc.c-torture/compile/pr123703.c
*** gcc-15-20260117/gcc/testsuite/gcc.c-torture/compile/pr123703.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.c-torture/compile/pr123703.c	Sat Jan 24 22:32:08 2026
***************
*** 0 ****
--- 1,10 ----
+ /* PR middle-end/123703 */
+ 
+ struct S { int a; };
+ struct S abs (int);
+ 
+ struct S
+ bar (int j)
+ {
+   return abs (j);
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.dg/torture/pr123107.c gcc-15-20260124/gcc/testsuite/gcc.dg/torture/pr123107.c
*** gcc-15-20260117/gcc/testsuite/gcc.dg/torture/pr123107.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.dg/torture/pr123107.c	Sat Jan 24 22:32:09 2026
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-Wno-psabi" } */
+ /* { dg-additional-options "-mavx2" { target { x86_64-*-* i?86-*-* } } } */
+ 
+ #define BS_VEC(type, num) type __attribute__((vector_size(num * sizeof(type))))
+ 
+ int f( BS_VEC(short, 16)
+        BS_TEMP_206)
+ {
+   BS_TEMP_206 = BS_TEMP_206 < 0;
+   if (BS_TEMP_206[0] | BS_TEMP_206[1] | BS_TEMP_206[2] | BS_TEMP_206[3]
+       | BS_TEMP_206[4] | BS_TEMP_206[5] | BS_TEMP_206[6] | BS_TEMP_206[7]
+       | BS_TEMP_206[8] | BS_TEMP_206[9] | BS_TEMP_206[10]
+       | BS_TEMP_206[11] | BS_TEMP_206[12] | BS_TEMP_206[13]
+       | BS_TEMP_206[14] | BS_TEMP_206[15])
+     return 1;
+   return 0;
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.dg/vect/vect-pr122793.c gcc-15-20260124/gcc/testsuite/gcc.dg/vect/vect-pr122793.c
*** gcc-15-20260117/gcc/testsuite/gcc.dg/vect/vect-pr122793.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.dg/vect/vect-pr122793.c	Sat Jan 24 22:32:09 2026
***************
*** 0 ****
--- 1,28 ----
+ /* { dg-additional-options "-msse4" { target sse4_runtime } } */
+ 
+ #include "tree-vect.h"
+ 
+ static void
+ foo (unsigned char *d, unsigned char *s, int e, int f)
+ {
+   for (int i = 0; i < 4; i++)
+     {
+       d[0] = s[-2];
+       d[5] = (s[5] + s[6]) * 2 - (s[4] + s[7]);
+       d[6] = (s[6] + s[7]) * 2 - (s[5] + s[8]);
+       d[7] = (s[7] + s[8]) * 2 - (s[6] + s[9]);
+       d += e;
+       s += f;
+     }
+ }
+ 
+ unsigned char s[128] = { 2 }, d[128];
+ 
+ int
+ main ()
+ {
+   check_vect ();
+   foo (d, s + 2, 16, 16);
+   if (d[5] != 0)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.target/arm/neon-smax16.c gcc-15-20260124/gcc/testsuite/gcc.target/arm/neon-smax16.c
*** gcc-15-20260117/gcc/testsuite/gcc.target/arm/neon-smax16.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.target/arm/neon-smax16.c	Sat Jan 24 22:32:10 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_2a_fp16_neon_ok } */
+ /* { dg-add-options arm_v8_2a_fp16_neon } */
+ /* { dg-additional-options "-std=c23 -Ofast" } */
+ void foo(void);
+ extern _Float16 main_in[];
+ void bar() {
+   _Float16 out = 0.0;
+   for (int i = 0; i < 100; i++)
+     if (out < main_in[i])
+       out = main_in[i];
+   if (out)
+     foo();
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.target/arm/neon-smin16.c gcc-15-20260124/gcc/testsuite/gcc.target/arm/neon-smin16.c
*** gcc-15-20260117/gcc/testsuite/gcc.target/arm/neon-smin16.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.target/arm/neon-smin16.c	Sat Jan 24 22:32:10 2026
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_v8_2a_fp16_neon_ok } */
+ /* { dg-add-options arm_v8_2a_fp16_neon } */
+ /* { dg-additional-options "-std=c23 -Ofast" } */
+ void foo(void);
+ extern _Float16 main_in[];
+ void bar() {
+   _Float16 out = 0.0;
+   for (int i = 0; i < 100; i++)
+     if (out > main_in[i])
+       out = main_in[i];
+   if (out)
+     foo();
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.target/i386/apx-broadcast.c gcc-15-20260124/gcc/testsuite/gcc.target/i386/apx-broadcast.c
*** gcc-15-20260117/gcc/testsuite/gcc.target/i386/apx-broadcast.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.target/i386/apx-broadcast.c	Sat Jan 24 22:32:10 2026
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do assemble { target { apxf && { ! ia32 } } } } */
+ /* { dg-options "-mavx512vl -mapxf -O2" } */
+ 
+ #include <stdint.h>
+ #include <immintrin.h>
+ 
+ void broadcast_avx2(int *sx, __m256i *coeff, __m128i *temp) {
+   
+   __m256i semp[8];
+ 
+ 
+   for (int i = 0; i < 8; i++)
+     {
+       asm volatile ("" : : : "r8", "r9", "r10", "r11", "r12", "r13",
+ 		    "r14", "r15", "rax", "rcx", "rsi", "rdi", "rdx");
+       register volatile uint64_t sm asm ("%r16") = i;
+       semp[i] = _mm256_broadcastsi128_si256(temp[sm]);
+     }
+ 
+   coeff[0] = _mm256_unpacklo_epi64(semp[0], semp[1]);
+   coeff[1] = _mm256_unpackhi_epi64(semp[2], semp[3]);
+   coeff[2] = _mm256_unpacklo_epi64(semp[4], semp[5]);
+   coeff[3] = _mm256_unpackhi_epi64(semp[6], semp[7]);
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c gcc-15-20260124/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c
*** gcc-15-20260117/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c	Sat Jan 17 22:32:12 2026
--- gcc-15-20260124/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c	Sat Jan 24 22:32:10 2026
*************** int main() {
*** 16,28 ****
    vfb = (vector float){10.0, -2.0, 70.0, 999.0 };
  
    /* Expected results.  */
- #ifdef __BIG_ENDIAN__
-   vexpected = (vector unsigned short) { 0x4900, 0xc000, 0x5460, 0x63ce,
- 					0x3666, 0x3e66, 0x4d00, 0x563e };
- #else
    vexpected = (vector unsigned short) { 0x3666, 0x3e66, 0x4d00, 0x563e,
  					0x4900, 0xc000, 0x5460, 0x63ce };
- #endif
  
  /*
       vresult = vec_pack_to_short_fp32 (vfa, vfb);
--- 16,23 ----
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gcc.target/riscv/pr123092.c gcc-15-20260124/gcc/testsuite/gcc.target/riscv/pr123092.c
*** gcc-15-20260117/gcc/testsuite/gcc.target/riscv/pr123092.c	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gcc.target/riscv/pr123092.c	Sat Jan 24 22:32:11 2026
***************
*** 0 ****
--- 1,12 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=rv64gc_zicbop -mabi=lp64d" } */
+ struct a {
+   char *b;
+ } d;
+ int e;
+ int c(struct a *);
+ void f() {
+   __builtin_prefetch(d.b + 64);
+   if (e)
+     c(&d);
+ }
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gfortran.dg/vect/vect-pr123741.f90 gcc-15-20260124/gcc/testsuite/gfortran.dg/vect/vect-pr123741.f90
*** gcc-15-20260117/gcc/testsuite/gfortran.dg/vect/vect-pr123741.f90	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gfortran.dg/vect/vect-pr123741.f90	Sat Jan 24 22:32:11 2026
***************
*** 0 ****
--- 1,50 ----
+ ! { dg-do compile }
+ ! { dg-additional-options "-Ofast" }
+ ! { dg-additional-options "-mavx2" { target avx2 } }
+ 
+ module m1
+ parameter( n1=5,n2=5,n3=5,n4=5 )
+ integer:: p(n1,n2,n3,n4)
+ 
+ contains
+ subroutine s1(i,nn2,nn4)
+ integer:: i(n1,n2,n3,n4)
+ i= p
+ forall (k2=1:nn2,k4=1:nn4,mod(k2,3)/=0 .and. mod(k4,3)/=0) 
+ where( mod(i(:,k2,:,k4),4) /=0 ) &
+  i(:,k2,:,k4) = i(:,k2,:,k4) + 1.0 / real(k2+k4 -1)
+ end forall
+ end subroutine
+ 
+ subroutine s2(i,nn2,nn4)
+ integer:: i(n1,n2,n3,n4)
+ integer,allocatable:: temp(:,:,:,:)
+ i= p
+ allocate(temp(n1,n2,n3,n4))
+ do k4=1,nn4
+ do k2=1,nn2
+ if (mod(k2,3)/=0 .and. mod(k4,3)/=0)then
+ where( mod(i(:,k2,:,k4),4) /=0 ) &
+  temp(:,k2,:,k4) = i(:,k2,:,k4) +1.0 / real(k2+k4 -1)
+ end if
+ end do
+ end do
+ do k4=1,nn4
+ do k2=1,nn2
+ if (mod(k2,3)/=0 .and. mod(k4,3)/=0)then
+ where( mod(i(:,k2,:,k4),4) /=0 ) &
+  i(:,k2,:,k4) = temp(:,k2,:,k4)
+ end if
+ end do
+ end do
+ end subroutine
+ end
+ 
+ use m1
+ integer:: i1(n1,n2,n3,n4),i2(n1,n2,n3,n4)
+ p= reshape([(k,k=1,(n1)*(n2)*(n3)*(n4))],[n1,n2,n3,n4])
+ call s1(i1,n2,n4)
+ call s2(i2,n2,n4)
+ if (any(i1/=i2)) print *,101
+ print *,'OK'
+ end
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16.adb gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16.adb
*** gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16.adb	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16.adb	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,11 ----
+ -- { dg-do link }
+ 
+ with Generic_Inst16_Pkg.Child.Grandchild;
+ with Generic_Inst16_Proc;
+ 
+ procedure Generic_Inst16 is
+    package   P1 is new Generic_Inst16_Pkg.Child;
+    procedure P2 is new Generic_Inst16_Proc (P1);
+ begin
+    null;
+ end;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_pkg-child-grandchild.ads gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_pkg-child-grandchild.ads
*** gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_pkg-child-grandchild.ads	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_pkg-child-grandchild.ads	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,20 ----
+ generic
+ package Generic_Inst16_Pkg.Child.Grandchild is
+ 
+    type CT is new GPT with private;
+ 
+    Zippo_CT1 : constant CT;
+    Zippo_CT2 : constant CT;
+ 
+ private
+ 
+    type CT is new PT with
+       record
+          Small_Pi : Natural := 314;
+       end record;
+ 
+    Zippo_CT1 : constant CT := (Zippo_PT with Small_Pi => 0);
+    Zippo_CT2 : constant CT :=
+      (Generic_Inst16_Pkg.Child.Zippo_PT with Small_Pi => 0);
+ 
+ end Generic_Inst16_Pkg.Child.Grandchild;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_pkg-child.ads gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_pkg-child.ads
*** gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_pkg-child.ads	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_pkg-child.ads	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,17 ----
+ generic
+ package Generic_Inst16_Pkg.Child is
+ 
+    type PT is new GPT with private;
+ 
+    Zippo_PT : constant PT;
+    
+ private
+    
+    type PT is new GPT with
+       record
+          Pos_Pi : Natural := 314159265;
+       end record;
+ 
+    Zippo_PT : constant PT := (Pos_Pi => 0);
+ 
+ end Generic_Inst16_Pkg.Child;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_pkg.ads gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_pkg.ads
*** gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_pkg.ads	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_pkg.ads	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,5 ----
+ package Generic_Inst16_Pkg is
+ 
+    type GPT is interface;
+ 
+ end Generic_Inst16_Pkg;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_proc.adb gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_proc.adb
*** gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_proc.adb	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_proc.adb	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,7 ----
+ with Generic_Inst16_Pkg.Child.Grandchild;
+ 
+ procedure Generic_Inst16_Proc is
+    package Inst_Grandchild is new Inst_Child.Grandchild;
+ begin
+    null;
+ end;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_proc.ads gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_proc.ads
*** gcc-15-20260117/gcc/testsuite/gnat.dg/generic_inst16_proc.ads	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/gnat.dg/generic_inst16_proc.ads	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,5 ----
+ with Generic_Inst16_Pkg.Child;
+ 
+ generic
+    with package Inst_Child is new Generic_Inst16_Pkg.Child (<>);
+ procedure Generic_Inst16_Proc;
diff -Nrcpad gcc-15-20260117/gcc/testsuite/sparseset.supp gcc-15-20260124/gcc/testsuite/sparseset.supp
*** gcc-15-20260117/gcc/testsuite/sparseset.supp	Thu Jan  1 00:00:00 1970
--- gcc-15-20260124/gcc/testsuite/sparseset.supp	Sat Jan 24 22:32:12 2026
***************
*** 0 ****
--- 1,10 ----
+ {
+    SPARSESET1
+    Memcheck:Cond
+    fun:sparseset_bit_p
+ }
+ {
+    SPARSESET2
+    Memcheck:Value8
+    fun:sparseset_bit_p
+ }
diff -Nrcpad gcc-15-20260117/gcc/tree-ssa-loop-unswitch.cc gcc-15-20260124/gcc/tree-ssa-loop-unswitch.cc
*** gcc-15-20260117/gcc/tree-ssa-loop-unswitch.cc	Sat Jan 17 22:32:14 2026
--- gcc-15-20260124/gcc/tree-ssa-loop-unswitch.cc	Sat Jan 24 22:32:12 2026
*************** hoist_guard (class loop *loop, edge guar
*** 1458,1464 ****
  
    if (skip_count > e->count ())
      {
!       fprintf (dump_file, "  Capping count; expect profile inconsistency\n");
        skip_count = e->count ();
      }
    if (dump_enabled_p ())
--- 1458,1465 ----
  
    if (skip_count > e->count ())
      {
!       if (dump_file && (dump_flags & TDF_DETAILS))
! 	fprintf (dump_file, "  Capping count; expect profile inconsistency\n");
        skip_count = e->count ();
      }
    if (dump_enabled_p ())
diff -Nrcpad gcc-15-20260117/gcc/tree-ssa-pre.cc gcc-15-20260124/gcc/tree-ssa-pre.cc
*** gcc-15-20260117/gcc/tree-ssa-pre.cc	Sat Jan 17 22:32:14 2026
--- gcc-15-20260124/gcc/tree-ssa-pre.cc	Sat Jan 24 22:32:12 2026
*************** find_or_generate_expression (basic_block
*** 2758,2764 ****
    if (leader)
      {
        if (leader->kind == NAME)
! 	return PRE_EXPR_NAME (leader);
        else if (leader->kind == CONSTANT)
  	return PRE_EXPR_CONSTANT (leader);
  
--- 2758,2769 ----
    if (leader)
      {
        if (leader->kind == NAME)
! 	{
! 	  tree name = PRE_EXPR_NAME (leader);
! 	  if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name))
! 	    return NULL_TREE;
! 	  return name;
! 	}
        else if (leader->kind == CONSTANT)
  	return PRE_EXPR_CONSTANT (leader);
  
diff -Nrcpad gcc-15-20260117/gcc/tree-vect-slp.cc gcc-15-20260124/gcc/tree-vect-slp.cc
*** gcc-15-20260117/gcc/tree-vect-slp.cc	Sat Jan 17 22:32:14 2026
--- gcc-15-20260124/gcc/tree-vect-slp.cc	Sat Jan 24 22:32:12 2026
*************** vect_transform_slp_perm_load (vec_info *
*** 10663,10669 ****
  
     otherwise add:
  
!       <new SSA name> = FIRST_DEF.  */
  
  static void
  vect_add_slp_permutation (vec_info *vinfo, gimple_stmt_iterator *gsi,
--- 10663,10673 ----
  
     otherwise add:
  
!       <new SSA name> = VEC_PERM_EXPR <FIRST_DEF, SECOND_DEF,
! 				      { N, N+1, N+2, ... }>
! 
!    where N == IDENTITY_OFFSET which is either zero or equal to the
!    number of elements of the result.  */
  
  static void
  vect_add_slp_permutation (vec_info *vinfo, gimple_stmt_iterator *gsi,
*************** vect_add_slp_permutation (vec_info *vinf
*** 10703,10738 ****
  				       first_def, second_def,
  				       mask_vec);
      }
!   else if (!types_compatible_p (TREE_TYPE (first_def), vectype))
      {
!       /* For identity permutes we still need to handle the case
! 	 of offsetted extracts or concats.  */
!       unsigned HOST_WIDE_INT c;
!       auto first_def_nunits
! 	= TYPE_VECTOR_SUBPARTS (TREE_TYPE (first_def));
!       if (known_le (TYPE_VECTOR_SUBPARTS (vectype), first_def_nunits))
  	{
! 	  unsigned HOST_WIDE_INT elsz
! 	    = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (TREE_TYPE (first_def))));
! 	  tree lowpart = build3 (BIT_FIELD_REF, vectype, first_def,
! 				 TYPE_SIZE (vectype),
! 				 bitsize_int (identity_offset * elsz));
! 	  perm_stmt = gimple_build_assign (perm_dest, lowpart);
  	}
!       else if (constant_multiple_p (TYPE_VECTOR_SUBPARTS (vectype),
! 				    first_def_nunits, &c) && c == 2)
  	{
! 	  tree ctor = build_constructor_va (vectype, 2, NULL_TREE, first_def,
! 					    NULL_TREE, second_def);
! 	  perm_stmt = gimple_build_assign (perm_dest, ctor);
  	}
-       else
- 	gcc_unreachable ();
-     }
-   else
-     {
-       /* We need a copy here in case the def was external.  */
-       perm_stmt = gimple_build_assign (perm_dest, first_def);
      }
    vect_finish_stmt_generation (vinfo, NULL, perm_stmt, gsi);
    /* Store the vector statement in NODE.  */
--- 10707,10753 ----
  				       first_def, second_def,
  				       mask_vec);
      }
!   else
      {
!       auto def_nunits = TYPE_VECTOR_SUBPARTS (TREE_TYPE (first_def));
!       unsigned HOST_WIDE_INT vecno;
!       poly_uint64 eltno;
!       if (!can_div_trunc_p (poly_uint64 (identity_offset), def_nunits,
! 			    &vecno, &eltno))
! 	gcc_unreachable ();
!       tree def = vecno & 1 ? second_def : first_def;
!       if (!types_compatible_p (TREE_TYPE (def), vectype))
  	{
! 	  /* For identity permutes we still need to handle the case
! 	     of offsetted extracts or concats.  */
! 	  unsigned HOST_WIDE_INT c;
! 	  if (known_le (TYPE_VECTOR_SUBPARTS (vectype), def_nunits))
! 	    {
! 	      unsigned HOST_WIDE_INT elsz
! 		= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (TREE_TYPE (def))));
! 	      tree lowpart = build3 (BIT_FIELD_REF, vectype, def,
! 				     TYPE_SIZE (vectype),
! 				     bitsize_int (eltno * elsz));
! 	      perm_stmt = gimple_build_assign (perm_dest, lowpart);
! 	    }
! 	  else if (constant_multiple_p (TYPE_VECTOR_SUBPARTS (vectype),
! 					def_nunits, &c) && c == 2)
! 	    {
! 	      gcc_assert (known_eq (identity_offset, 0U));
! 	      tree ctor = build_constructor_va (vectype, 2,
! 						NULL_TREE, first_def,
! 						NULL_TREE, second_def);
! 	      perm_stmt = gimple_build_assign (perm_dest, ctor);
! 	    }
! 	  else
! 	    gcc_unreachable ();
  	}
!       else
  	{
! 	  /* We need a copy here in case the def was external.  */
! 	  gcc_assert (known_eq (eltno, 0U));
! 	  perm_stmt = gimple_build_assign (perm_dest, def);
  	}
      }
    vect_finish_stmt_generation (vinfo, NULL, perm_stmt, gsi);
    /* Store the vector statement in NODE.  */
diff -Nrcpad gcc-15-20260117/gcc/tree-vect-stmts.cc gcc-15-20260124/gcc/tree-vect-stmts.cc
*** gcc-15-20260117/gcc/tree-vect-stmts.cc	Sat Jan 17 22:32:14 2026
--- gcc-15-20260124/gcc/tree-vect-stmts.cc	Sat Jan 24 22:32:12 2026
*************** vectorizable_store (vec_info *vinfo,
*** 9165,9171 ****
  					    memory_access_type, loop_lens);
      }
  
!   if (mask && !costing_p)
      LOOP_VINFO_HAS_MASK_STORE (loop_vinfo) = true;
  
    /* In case the vectorization factor (VF) is bigger than the number
--- 9165,9171 ----
  					    memory_access_type, loop_lens);
      }
  
!   if (loop_vinfo && mask && !costing_p)
      LOOP_VINFO_HAS_MASK_STORE (loop_vinfo) = true;
  
    /* In case the vectorization factor (VF) is bigger than the number
diff -Nrcpad gcc-15-20260117/libstdc++-v3/ChangeLog gcc-15-20260124/libstdc++-v3/ChangeLog
*** gcc-15-20260117/libstdc++-v3/ChangeLog	Sat Jan 17 22:32:15 2026
--- gcc-15-20260124/libstdc++-v3/ChangeLog	Sat Jan 24 22:32:14 2026
***************
*** 1,3 ****
--- 1,32 ----
+ 2026-01-22  Frank Scheiner  <frank.scheiner@web.de>
+ 
+ 	Backported from master:
+ 	2026-01-22  Frank Scheiner  <frank.scheiner@web.de>
+ 
+ 	* config/abi/post/ia64-linux-gnu/baseline_symbols.txt:
+ 	Regenerate.
+ 
+ 2026-01-22  Wang Jinghao  <zheng.xianyuwang@gmail.com>
+ 
+ 	Backported from master:
+ 	2026-01-10  Wang Jinghao  <zheng.xianyuwang@gmail.com>
+ 
+ 	* src/c++11/system_error.cc (system_error_category) [_WIN32]:
+ 	Use FormatMessageA function instead of FormatMessage macro.
+ 	* testsuite/19_diagnostics/error_category/system_category.cc:
+ 	Fix typo in __MINGW32__ macro name.  Adjust behavior on the
+ 	mingw32 target.
+ 
+ 2026-01-22  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	Backported from master:
+ 	2025-12-19  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/123147
+ 	* include/bits/chrono_io.h (_Parser::operator()) <%S>: Use a
+ 	buffer of narrow characters to be parsed by std::from_chars.
+ 	* testsuite/std/time/parse/parse.cc: Check wchar_t parsing.
+ 
  2025-12-17  Jonathan Wakely  <jwakely@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-15-20260117/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt gcc-15-20260124/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt
*** gcc-15-20260117/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt	Sat Jan 17 22:32:15 2026
--- gcc-15-20260124/libstdc++-v3/config/abi/post/ia64-linux-gnu/baseline_symbols.txt	Sat Jan 24 22:32:14 2026
*************** FUNC:_ZNKSt10moneypunctIwLb1EE8groupingE
*** 475,480 ****
--- 475,481 ----
  FUNC:_ZNKSt10ostrstream5rdbufEv@@GLIBCXX_3.4
  FUNC:_ZNKSt10ostrstream6pcountEv@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIcE15_M_am_pm_formatEPKc@@GLIBCXX_3.4
+ FUNC:_ZNKSt11__timepunctIcE15_M_am_pm_formatEPPKc@@GLIBCXX_3.4.30
  FUNC:_ZNKSt11__timepunctIcE15_M_date_formatsEPPKc@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIcE15_M_time_formatsEPPKc@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIcE19_M_days_abbreviatedEPPKc@@GLIBCXX_3.4
*************** FUNC:_ZNKSt11__timepunctIcE7_M_daysEPPKc
*** 485,490 ****
--- 486,492 ----
  FUNC:_ZNKSt11__timepunctIcE8_M_am_pmEPPKc@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIcE9_M_monthsEPPKc@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIwE15_M_am_pm_formatEPKw@@GLIBCXX_3.4
+ FUNC:_ZNKSt11__timepunctIwE15_M_am_pm_formatEPPKw@@GLIBCXX_3.4.30
  FUNC:_ZNKSt11__timepunctIwE15_M_date_formatsEPPKw@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIwE15_M_time_formatsEPPKw@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIwE19_M_days_abbreviatedEPPKw@@GLIBCXX_3.4
*************** FUNC:_ZNKSt11__timepunctIwE7_M_daysEPPKw
*** 495,501 ****
--- 497,508 ----
  FUNC:_ZNKSt11__timepunctIwE8_M_am_pmEPPKw@@GLIBCXX_3.4
  FUNC:_ZNKSt11__timepunctIwE9_M_monthsEPPKw@@GLIBCXX_3.4
  FUNC:_ZNKSt11logic_error4whatEv@@GLIBCXX_3.4
+ FUNC:_ZNKSt12__basic_fileIcE13native_handleEv@@GLIBCXX_3.4.33
  FUNC:_ZNKSt12__basic_fileIcE7is_openEv@@GLIBCXX_3.4
+ FUNC:_ZNKSt12__shared_ptrINSt10filesystem28recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt12__shared_ptrINSt10filesystem4_DirELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt12__shared_ptrINSt10filesystem7__cxx1128recursive_directory_iterator10_Dir_stackELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt12__shared_ptrINSt10filesystem7__cxx114_DirELN9__gnu_cxx12_Lock_policyE2EEcvbEv@@GLIBCXX_3.4.31
  FUNC:_ZNKSt12bad_weak_ptr4whatEv@@GLIBCXX_3.4.15
  FUNC:_ZNKSt12future_error4whatEv@@GLIBCXX_3.4.14
  FUNC:_ZNKSt12strstreambuf6pcountEv@@GLIBCXX_3.4
*************** FUNC:_ZNKSt5ctypeIwE8do_widenEPKcS2_Pw@@
*** 666,671 ****
--- 673,685 ----
  FUNC:_ZNKSt5ctypeIwE8do_widenEc@@GLIBCXX_3.4
  FUNC:_ZNKSt5ctypeIwE9do_narrowEPKwS2_cPc@@GLIBCXX_3.4
  FUNC:_ZNKSt5ctypeIwE9do_narrowEwc@@GLIBCXX_3.4
+ FUNC:_ZNKSt6chrono4tzdb11locate_zoneESt17basic_string_viewIcSt11char_traitsIcEE@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt6chrono4tzdb12current_zoneEv@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt6chrono9time_zone15_M_get_sys_infoENS_10time_pointINS_3_V212system_clockENS_8durationIlSt5ratioILl1ELl1EEEEEE@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt6chrono9time_zone17_M_get_local_infoENS_10time_pointINS_7local_tENS_8durationIlSt5ratioILl1ELl1EEEEEE@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt6chrono9tzdb_list14const_iteratordeEv@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt6chrono9tzdb_list5beginEv@@GLIBCXX_3.4.31
+ FUNC:_ZNKSt6chrono9tzdb_list5frontEv@@GLIBCXX_3.4.31
  FUNC:_ZNKSt6locale2id5_M_idEv@@GLIBCXX_3.4
  FUNC:_ZNKSt6locale4nameB5cxx11Ev@@GLIBCXX_3.4.21
  FUNC:_ZNKSt6locale4nameEv@@GLIBCXX_3.4
*************** FUNC:_ZNKSt7__cxx118time_getIcSt19istrea
*** 954,959 ****
--- 968,974 ----
  FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES4_S4_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16do_get_monthnameES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKc@@GLIBCXX_3.4.21
+ FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKcRSt16__time_get_state@@GLIBCXX_3.4.30
  FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES4_S4_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKcSD_@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmcc@@GLIBCXX_3.4.21
*************** FUNC:_ZNKSt7__cxx118time_getIwSt19istrea
*** 973,978 ****
--- 988,994 ----
  FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES4_S4_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16do_get_monthnameES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKw@@GLIBCXX_3.4.21
+ FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKwRSt16__time_get_state@@GLIBCXX_3.4.30
  FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES4_S4_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKwSD_@@GLIBCXX_3.4.21
  FUNC:_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmcc@@GLIBCXX_3.4.21
*************** FUNC:_ZNKSt8time_getIcSt19istreambuf_ite
*** 1225,1230 ****
--- 1241,1247 ----
  FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4
  FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16do_get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
  FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKc@@GLIBCXX_3.4
+ FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKcRSt16__time_get_state@@GLIBCXX_3.4.30
  FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.14
  FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKcSC_@@GLIBCXX_3.4.21
  FUNC:_ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmcc@@GLIBCXX_3.4.26
*************** FUNC:_ZNKSt8time_getIwSt19istreambuf_ite
*** 1244,1249 ****
--- 1261,1267 ----
  FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4
  FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16do_get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@@GLIBCXX_3.4
  FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKw@@GLIBCXX_3.4
+ FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKwRSt16__time_get_state@@GLIBCXX_3.4.30
  FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@@GLIBCXX_3.4.14
  FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKwSC_@@GLIBCXX_3.4.21
  FUNC:_ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmcc@@GLIBCXX_3.4.26
*************** FUNC:_ZNSt12__shared_ptrINSt10filesystem
*** 2106,2111 ****
--- 2124,2133 ----
  FUNC:_ZNSt12__shared_ptrINSt10filesystem7__cxx114_DirELN9__gnu_cxx12_Lock_policyE2EEC2EOS5_@@GLIBCXX_3.4.28
  FUNC:_ZNSt12__shared_ptrINSt10filesystem7__cxx114_DirELN9__gnu_cxx12_Lock_policyE2EEC2Ev@@GLIBCXX_3.4.27
  FUNC:_ZNSt12__shared_ptrINSt10filesystem7__cxx114_DirELN9__gnu_cxx12_Lock_policyE2EEaSEOS5_@@GLIBCXX_3.4.26
+ FUNC:_ZNSt12__sso_stringC1Ev@@GLIBCXX_3.4.34
+ FUNC:_ZNSt12__sso_stringC2Ev@@GLIBCXX_3.4.34
+ FUNC:_ZNSt12__sso_stringD1Ev@@GLIBCXX_3.4.34
+ FUNC:_ZNSt12__sso_stringD2Ev@@GLIBCXX_3.4.34
  FUNC:_ZNSt12bad_weak_ptrD0Ev@@GLIBCXX_3.4.15
  FUNC:_ZNSt12bad_weak_ptrD1Ev@@GLIBCXX_3.4.15
  FUNC:_ZNSt12bad_weak_ptrD2Ev@@GLIBCXX_3.4.15
*************** FUNC:_ZNSt16__numpunct_cacheIwEC2Em@@GLI
*** 2818,2823 ****
--- 2840,2846 ----
  FUNC:_ZNSt16__numpunct_cacheIwED0Ev@@GLIBCXX_3.4
  FUNC:_ZNSt16__numpunct_cacheIwED1Ev@@GLIBCXX_3.4
  FUNC:_ZNSt16__numpunct_cacheIwED2Ev@@GLIBCXX_3.4
+ FUNC:_ZNSt16__time_get_state17_M_finalize_stateEP2tm@@GLIBCXX_3.4.30
  FUNC:_ZNSt16bad_array_lengthD0Ev@@CXXABI_1.3.8
  FUNC:_ZNSt16bad_array_lengthD1Ev@@CXXABI_1.3.8
  FUNC:_ZNSt16bad_array_lengthD2Ev@@CXXABI_1.3.8
*************** FUNC:_ZNSt18basic_stringstreamIwSt11char
*** 2928,2934 ****
  FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEaSEOS3_@@GLIBCXX_3.4.21
  FUNC:_ZNSt18condition_variable10notify_allEv@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variable10notify_oneEv@@GLIBCXX_3.4.11
! FUNC:_ZNSt18condition_variable4waitERSt11unique_lockISt5mutexE@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variableC1Ev@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variableC2Ev@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variableD1Ev@@GLIBCXX_3.4.11
--- 2951,2958 ----
  FUNC:_ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEaSEOS3_@@GLIBCXX_3.4.21
  FUNC:_ZNSt18condition_variable10notify_allEv@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variable10notify_oneEv@@GLIBCXX_3.4.11
! FUNC:_ZNSt18condition_variable4waitERSt11unique_lockISt5mutexE@@GLIBCXX_3.4.30
! FUNC:_ZNSt18condition_variable4waitERSt11unique_lockISt5mutexE@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variableC1Ev@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variableC2Ev@@GLIBCXX_3.4.11
  FUNC:_ZNSt18condition_variableD1Ev@@GLIBCXX_3.4.11
*************** FUNC:_ZNSt6__norm15_List_node_base7_M_ho
*** 3087,3095 ****
--- 3111,3128 ----
  FUNC:_ZNSt6__norm15_List_node_base7reverseEv@@GLIBCXX_3.4.9
  FUNC:_ZNSt6__norm15_List_node_base8transferEPS0_S1_@@GLIBCXX_3.4.9
  FUNC:_ZNSt6__norm15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.14
+ FUNC:_ZNSt6chrono11locate_zoneESt17basic_string_viewIcSt11char_traitsIcEE@@GLIBCXX_3.4.31
+ FUNC:_ZNSt6chrono11reload_tzdbEv@@GLIBCXX_3.4.31
+ FUNC:_ZNSt6chrono12current_zoneEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono12system_clock3nowEv@@GLIBCXX_3.4.11
+ FUNC:_ZNSt6chrono13get_tzdb_listEv@@GLIBCXX_3.4.31
+ FUNC:_ZNSt6chrono14remote_versionB5cxx11Ev@@GLIBCXX_3.4.31
  FUNC:_ZNSt6chrono3_V212steady_clock3nowEv@@GLIBCXX_3.4.19
  FUNC:_ZNSt6chrono3_V212system_clock3nowEv@@GLIBCXX_3.4.19
+ FUNC:_ZNSt6chrono8get_tzdbEv@@GLIBCXX_3.4.31
+ FUNC:_ZNSt6chrono9tzdb_list11erase_afterENS0_14const_iteratorE@@GLIBCXX_3.4.31
+ FUNC:_ZNSt6chrono9tzdb_list14const_iteratorppEi@@GLIBCXX_3.4.31
+ FUNC:_ZNSt6chrono9tzdb_list14const_iteratorppEv@@GLIBCXX_3.4.31
  FUNC:_ZNSt6gslice8_IndexerC1EmRKSt8valarrayImES4_@@GLIBCXX_3.4
  FUNC:_ZNSt6gslice8_IndexerC2EmRKSt8valarrayImES4_@@GLIBCXX_3.4
  FUNC:_ZNSt6locale11_M_coalesceERKS_S1_i@@GLIBCXX_3.4
*************** FUNC:_ZNSt7__cxx1112basic_stringIcSt11ch
*** 3186,3196 ****
--- 3219,3232 ----
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEmm@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEm@@GLIBCXX_3.4.21
+ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_S_allocateERS3_m@@GLIBCXX_3.4.32
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcOS3_@@GLIBCXX_3.4.23
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcRKS3_@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC2EPcOS3_@@GLIBCXX_3.4.23
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC2EPcRKS3_@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructEmc@@GLIBCXX_3.4.21
+ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructILb0EEEvPKcm@@GLIBCXX_3.4.34
+ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructILb1EEEvPKcm@@GLIBCXX_3.4.34
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPKcS4_EEEEvT_SB_St20forward_iterator_tag@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPcS4_EEEEvT_SA_St20forward_iterator_tag@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag@@GLIBCXX_3.4.21
*************** FUNC:_ZNSt7__cxx1112basic_stringIcSt11ch
*** 3205,3210 ****
--- 3241,3247 ----
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcS5_S5_@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13shrink_to_fitEv@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE14_M_replace_auxEmmmc@@GLIBCXX_3.4.21
+ FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE15_M_replace_coldEPcmPKcmm@@GLIBCXX_3.4.31
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16_M_get_allocatorEv@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17_S_to_string_viewESt17basic_string_viewIcS2_E@@GLIBCXX_3.4.26
  FUNC:_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE18_M_construct_aux_2Emc@@GLIBCXX_3.4.21
*************** FUNC:_ZNSt7__cxx1112basic_stringIwSt11ch
*** 3337,3347 ****
--- 3374,3387 ----
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_replaceEmmPKwm@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_S_compareEmm@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_capacityEm@@GLIBCXX_3.4.21
+ FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_S_allocateERS3_m@@GLIBCXX_3.4.32
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwOS3_@@GLIBCXX_3.4.23
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS3_@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwOS3_@@GLIBCXX_3.4.23
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwRKS3_@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructEmw@@GLIBCXX_3.4.21
+ FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructILb0EEEvPKwm@@GLIBCXX_3.4.34
+ FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructILb1EEEvPKwm@@GLIBCXX_3.4.34
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPKwS4_EEEEvT_SB_St20forward_iterator_tag@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPwS4_EEEEvT_SA_St20forward_iterator_tag@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIPKwEEvT_S8_St20forward_iterator_tag@@GLIBCXX_3.4.21
*************** FUNC:_ZNSt7__cxx1112basic_stringIwSt11ch
*** 3356,3361 ****
--- 3396,3402 ----
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwS5_S5_@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13shrink_to_fitEv@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@@GLIBCXX_3.4.21
+ FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE15_M_replace_coldEPwmPKwmm@@GLIBCXX_3.4.31
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16_M_get_allocatorEv@@GLIBCXX_3.4.21
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17_S_to_string_viewESt17basic_string_viewIwS2_E@@GLIBCXX_3.4.26
  FUNC:_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE18_M_construct_aux_2Emw@@GLIBCXX_3.4.21
*************** FUNC:_ZNSt8__detail15_List_node_base11_M
*** 3908,3913 ****
--- 3949,3956 ----
  FUNC:_ZNSt8__detail15_List_node_base4swapERS0_S1_@@GLIBCXX_3.4.15
  FUNC:_ZNSt8__detail15_List_node_base7_M_hookEPS0_@@GLIBCXX_3.4.15
  FUNC:_ZNSt8__detail15_List_node_base9_M_unhookEv@@GLIBCXX_3.4.15
+ FUNC:_ZNSt8__format25__locale_encoding_to_utf8ERKSt6localeSt17basic_string_viewIcSt11char_traitsIcEEPv@@GLIBCXX_3.4.34
+ FUNC:_ZNSt8__format26__with_encoding_conversionERKSt6locale@@GLIBCXX_3.4.34
  FUNC:_ZNSt8bad_castD0Ev@@GLIBCXX_3.4
  FUNC:_ZNSt8bad_castD1Ev@@GLIBCXX_3.4
  FUNC:_ZNSt8bad_castD2Ev@@GLIBCXX_3.4
*************** FUNC:_ZNSt9type_infoD1Ev@@GLIBCXX_3.4
*** 4100,4105 ****
--- 4143,4149 ----
  FUNC:_ZNSt9type_infoD2Ev@@GLIBCXX_3.4
  FUNC:_ZNVSt9__atomic011atomic_flag12test_and_setESt12memory_order@@GLIBCXX_3.4.11
  FUNC:_ZNVSt9__atomic011atomic_flag5clearESt12memory_order@@GLIBCXX_3.4.11
+ FUNC:_ZSt10from_charsPKcS0_RDF128_St12chars_format@@GLIBCXX_3.4.31
  FUNC:_ZSt10from_charsPKcS0_RdSt12chars_format@@GLIBCXX_3.4.29
  FUNC:_ZSt10from_charsPKcS0_ReSt12chars_format@@GLIBCXX_3.4.29
  FUNC:_ZSt10from_charsPKcS0_RfSt12chars_format@@GLIBCXX_3.4.29
*************** FUNC:_ZSt14__convert_to_vIfEvPKcRT_RSt12
*** 4113,4118 ****
--- 4157,4206 ----
  FUNC:_ZSt14get_unexpectedv@@GLIBCXX_3.4.20
  FUNC:_ZSt14set_unexpectedPFvvE@@GLIBCXX_3.4
  FUNC:_ZSt15_Fnv_hash_bytesPKvmm@@CXXABI_1.3.5
+ FUNC:_ZSt15__try_use_facetINSt7__cxx1110moneypunctIcLb0EEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx1110moneypunctIcLb1EEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx1110moneypunctIwLb0EEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx1110moneypunctIwLb1EEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx117collateIcEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx117collateIwEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx118messagesIcEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx118messagesIwEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx118numpunctIcEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx118numpunctIwEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetINSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt10moneypunctIcLb0EEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt10moneypunctIcLb1EEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt10moneypunctIwLb0EEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt10moneypunctIwLb1EEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt11__timepunctIcEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt11__timepunctIwEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt5ctypeIcEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt5ctypeIwEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7codecvtIcc11__mbstate_tEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7codecvtIwc11__mbstate_tEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7collateIcEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7collateIwEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8messagesIcEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8messagesIwEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8numpunctIcEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8numpunctIwEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
+ FUNC:_ZSt15__try_use_facetISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEPKT_RKSt6locale@@GLIBCXX_3.4.31
  FUNC:_ZSt15future_categoryv@@GLIBCXX_3.4.15
  FUNC:_ZSt15get_new_handlerv@@GLIBCXX_3.4.20
  FUNC:_ZSt15set_new_handlerPFvvE@@GLIBCXX_3.4
*************** FUNC:_ZSt20__throw_future_errori@@GLIBCX
*** 4150,4161 ****
--- 4238,4255 ----
  FUNC:_ZSt20__throw_length_errorPKc@@GLIBCXX_3.4
  FUNC:_ZSt20__throw_out_of_rangePKc@@GLIBCXX_3.4
  FUNC:_ZSt20__throw_system_errori@@GLIBCXX_3.4.11
+ FUNC:_ZSt20__to_chars_float16_tPcS_fSt12chars_format@@GLIBCXX_3.4.31
  FUNC:_ZSt21_Rb_tree_rotate_rightPSt18_Rb_tree_node_baseRS0_@@GLIBCXX_3.4
  FUNC:_ZSt21__copy_streambufs_eofIcSt11char_traitsIcEElPSt15basic_streambufIT_T0_ES6_Rb@@GLIBCXX_3.4.9
  FUNC:_ZSt21__copy_streambufs_eofIwSt11char_traitsIwEElPSt15basic_streambufIT_T0_ES6_Rb@@GLIBCXX_3.4.9
+ FUNC:_ZSt21__glibcxx_assert_failPKciS0_S0_@@GLIBCXX_3.4.30
  FUNC:_ZSt21__throw_bad_exceptionv@@GLIBCXX_3.4
  FUNC:_ZSt21__throw_runtime_errorPKc@@GLIBCXX_3.4
+ FUNC:_ZSt21__to_chars_bfloat16_tPcS_fSt12chars_format@@GLIBCXX_3.4.31
+ FUNC:_ZSt21ios_base_library_initv@@GLIBCXX_3.4.32
+ FUNC:_ZSt22__from_chars_float16_tPKcS0_RfSt12chars_format@@GLIBCXX_3.4.31
  FUNC:_ZSt22__throw_overflow_errorPKc@@GLIBCXX_3.4
+ FUNC:_ZSt23__from_chars_bfloat16_tPKcS0_RfSt12chars_format@@GLIBCXX_3.4.31
  FUNC:_ZSt23__throw_underflow_errorPKc@@GLIBCXX_3.4
  FUNC:_ZSt24__throw_invalid_argumentPKc@@GLIBCXX_3.4
  FUNC:_ZSt24__throw_out_of_range_fmtPKcz@@GLIBCXX_3.4.20
*************** FUNC:_ZSt7getlineIwSt11char_traitsIwESaI
*** 4180,4185 ****
--- 4274,4282 ----
  FUNC:_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@@GLIBCXX_3.4.21
  FUNC:_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@@GLIBCXX_3.4
  FUNC:_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_ES4_@@GLIBCXX_3.4
+ FUNC:_ZSt8to_charsPcS_DF128_@@GLIBCXX_3.4.31
+ FUNC:_ZSt8to_charsPcS_DF128_St12chars_format@@GLIBCXX_3.4.31
+ FUNC:_ZSt8to_charsPcS_DF128_St12chars_formati@@GLIBCXX_3.4.31
  FUNC:_ZSt8to_charsPcS_d@@GLIBCXX_3.4.29
  FUNC:_ZSt8to_charsPcS_dSt12chars_format@@GLIBCXX_3.4.29
  FUNC:_ZSt8to_charsPcS_dSt12chars_formati@@GLIBCXX_3.4.29
*************** FUNC:__cxa_allocate_exception@@CXXABI_1.
*** 4447,4452 ****
--- 4544,4550 ----
  FUNC:__cxa_bad_cast@@CXXABI_1.3
  FUNC:__cxa_bad_typeid@@CXXABI_1.3
  FUNC:__cxa_begin_catch@@CXXABI_1.3
+ FUNC:__cxa_call_terminate@@CXXABI_1.3.15
  FUNC:__cxa_call_unexpected@@CXXABI_1.3
  FUNC:__cxa_current_exception_type@@CXXABI_1.3
  FUNC:__cxa_deleted_virtual@@CXXABI_1.3.6
*************** OBJECT:0:CXXABI_1.3.10
*** 4489,4494 ****
--- 4587,4594 ----
  OBJECT:0:CXXABI_1.3.11
  OBJECT:0:CXXABI_1.3.12
  OBJECT:0:CXXABI_1.3.13
+ OBJECT:0:CXXABI_1.3.14
+ OBJECT:0:CXXABI_1.3.15
  OBJECT:0:CXXABI_1.3.2
  OBJECT:0:CXXABI_1.3.3
  OBJECT:0:CXXABI_1.3.4
*************** OBJECT:0:GLIBCXX_3.4.27
*** 4523,4528 ****
--- 4623,4633 ----
  OBJECT:0:GLIBCXX_3.4.28
  OBJECT:0:GLIBCXX_3.4.29
  OBJECT:0:GLIBCXX_3.4.3
+ OBJECT:0:GLIBCXX_3.4.30
+ OBJECT:0:GLIBCXX_3.4.31
+ OBJECT:0:GLIBCXX_3.4.32
+ OBJECT:0:GLIBCXX_3.4.33
+ OBJECT:0:GLIBCXX_3.4.34
  OBJECT:0:GLIBCXX_3.4.4
  OBJECT:0:GLIBCXX_3.4.5
  OBJECT:0:GLIBCXX_3.4.6
*************** OBJECT:168:_ZTVSt14basic_iostreamIwSt11c
*** 4627,4632 ****
--- 4732,4742 ----
  OBJECT:168:_ZTVSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@@GLIBCXX_3.4
  OBJECT:168:_ZTVSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
  OBJECT:168:_ZTVSt9strstream@@GLIBCXX_3.4
+ OBJECT:16:_ZTIDF128_@@CXXABI_1.3.14
+ OBJECT:16:_ZTIDF32_@@CXXABI_1.3.14
+ OBJECT:16:_ZTIDF32x@@CXXABI_1.3.14
+ OBJECT:16:_ZTIDF64_@@CXXABI_1.3.14
+ OBJECT:16:_ZTIDF64x@@CXXABI_1.3.14
  OBJECT:16:_ZTIDd@@CXXABI_1.3.4
  OBJECT:16:_ZTIDe@@CXXABI_1.3.4
  OBJECT:16:_ZTIDf@@CXXABI_1.3.4
*************** OBJECT:30:_ZTSSt7codecvtIDiDu11__mbstate
*** 5302,5307 ****
--- 5412,5422 ----
  OBJECT:30:_ZTSSt7codecvtIDsDu11__mbstate_tE@@GLIBCXX_3.4.26
  OBJECT:32:_ZNSbIwSt11char_traitsIwESaIwEE4_Rep20_S_empty_rep_storageE@@GLIBCXX_3.4
  OBJECT:32:_ZNSs4_Rep20_S_empty_rep_storageE@@GLIBCXX_3.4
+ OBJECT:32:_ZTIPDF128_@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPDF32_@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPDF32x@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPDF64_@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPDF64x@@CXXABI_1.3.14
  OBJECT:32:_ZTIPDd@@CXXABI_1.3.4
  OBJECT:32:_ZTIPDe@@CXXABI_1.3.4
  OBJECT:32:_ZTIPDf@@CXXABI_1.3.4
*************** OBJECT:32:_ZTIPDi@@CXXABI_1.3.3
*** 5309,5314 ****
--- 5424,5434 ----
  OBJECT:32:_ZTIPDn@@CXXABI_1.3.5
  OBJECT:32:_ZTIPDs@@CXXABI_1.3.3
  OBJECT:32:_ZTIPDu@@CXXABI_1.3.12
+ OBJECT:32:_ZTIPKDF128_@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPKDF32_@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPKDF32x@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPKDF64_@@CXXABI_1.3.14
+ OBJECT:32:_ZTIPKDF64x@@CXXABI_1.3.14
  OBJECT:32:_ZTIPKDd@@CXXABI_1.3.4
  OBJECT:32:_ZTIPKDe@@CXXABI_1.3.4
  OBJECT:32:_ZTIPKDf@@CXXABI_1.3.4
diff -Nrcpad gcc-15-20260117/libstdc++-v3/include/bits/chrono_io.h gcc-15-20260124/libstdc++-v3/include/bits/chrono_io.h
*** gcc-15-20260117/libstdc++-v3/include/bits/chrono_io.h	Sat Jan 17 22:32:15 2026
--- gcc-15-20260124/libstdc++-v3/include/bits/chrono_io.h	Sat Jan 24 22:32:14 2026
*************** namespace __detail
*** 3797,3810 ****
  		    }
  		  else // Read fractional seconds
  		    {
! 		      basic_stringstream<_CharT> __buf;
  		      auto __digit = _S_try_read_digit(__is, __err);
  		      if (__digit != -1)
  			{
! 			  __buf.put(_CharT('0') + __digit);
  			  __digit = _S_try_read_digit(__is, __err);
  			  if (__digit != -1)
! 			    __buf.put(_CharT('0') + __digit);
  			}
  
  		      auto __i = __is.peek();
--- 3797,3810 ----
  		    }
  		  else // Read fractional seconds
  		    {
! 		      stringstream __buf;
  		      auto __digit = _S_try_read_digit(__is, __err);
  		      if (__digit != -1)
  			{
! 			  __buf.put('0' + __digit);
  			  __digit = _S_try_read_digit(__is, __err);
  			  if (__digit != -1)
! 			    __buf.put('0' + __digit);
  			}
  
  		      auto __i = __is.peek();
*************** namespace __detail
*** 3829,3835 ****
  				{
  				  __digit = _S_try_read_digit(__is, __err);
  				  if (__digit != -1)
! 				    __buf.put(_CharT('0') + __digit);
  				  else
  				    break;
  				}
--- 3829,3835 ----
  				{
  				  __digit = _S_try_read_digit(__is, __err);
  				  if (__digit != -1)
! 				    __buf.put('0' + __digit);
  				  else
  				    break;
  				}
diff -Nrcpad gcc-15-20260117/libstdc++-v3/src/c++11/system_error.cc gcc-15-20260124/libstdc++-v3/src/c++11/system_error.cc
*** gcc-15-20260117/libstdc++-v3/src/c++11/system_error.cc	Sat Jan 17 22:32:15 2026
--- gcc-15-20260124/libstdc++-v3/src/c++11/system_error.cc	Sat Jan 24 22:32:14 2026
*************** namespace
*** 161,182 ****
  #if defined(_WIN32) && !defined(__CYGWIN__)
        char* buf = nullptr;
        auto len
! 	= FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM
! 			| FORMAT_MESSAGE_ALLOCATE_BUFFER,
! 			nullptr,
! 			i,
! 			LANG_USER_DEFAULT,
! 			reinterpret_cast<LPTSTR>(&buf),
! 			0,
! 			nullptr);
        if (len > 0)
        {
  	struct deleter {
  	  void operator()(void* p) const { ::LocalFree(p); }
  	};
  	std::unique_ptr<char[], deleter> guard(buf);
! 	if (len > 3 && !__builtin_memcmp(buf + len - 3, ".\r\n", 3)) [[likely]]
! 	  len -= 3;
  	return string(buf, len);
        }
        return string("Unknown error code");
--- 161,183 ----
  #if defined(_WIN32) && !defined(__CYGWIN__)
        char* buf = nullptr;
        auto len
! 	= FormatMessageA(FORMAT_MESSAGE_FROM_SYSTEM
! 			 | FORMAT_MESSAGE_ALLOCATE_BUFFER
! 			 | FORMAT_MESSAGE_IGNORE_INSERTS,
! 			 nullptr,
! 			 i,
! 			 LANG_USER_DEFAULT,
! 			 reinterpret_cast<LPTSTR>(&buf),
! 			 0,
! 			 nullptr);
        if (len > 0)
        {
  	struct deleter {
  	  void operator()(void* p) const { ::LocalFree(p); }
  	};
  	std::unique_ptr<char[], deleter> guard(buf);
! 	if (len > 2 && !__builtin_memcmp (buf + len - 2, "\r\n", 2)) [[likely]]
! 	  len -= 2 + (buf[len - 3] == '.');
  	return string(buf, len);
        }
        return string("Unknown error code");
diff -Nrcpad gcc-15-20260117/libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc gcc-15-20260124/libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc
*** gcc-15-20260117/libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc	Sat Jan 17 22:32:16 2026
--- gcc-15-20260124/libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc	Sat Jan 24 22:32:14 2026
***************
*** 21,26 ****
--- 21,31 ----
  #include <locale>
  #include <testsuite_hooks.h>
  
+ #if defined __MINGW32__ || defined __MINGW64__
+ #define WIN32_LEAN_AND_MEAN
+ #include <windows.h>
+ #endif
+ 
  void
  test01()
  {
*************** test02()
*** 34,40 ****
    const std::error_category& cat = std::system_category();
    std::error_condition cond;
  
! #if defined __MING32__ || defined __MINGW64__
    cond = cat.default_error_condition(8); // ERROR_NOT_ENOUGH_MEMORY
    VERIFY( cond.value() == ENOMEM );
    VERIFY( cond.category() == std::generic_category() );
--- 39,45 ----
    const std::error_category& cat = std::system_category();
    std::error_condition cond;
  
! #if defined __MINGW32__ || defined __MINGW64__
    cond = cat.default_error_condition(8); // ERROR_NOT_ENOUGH_MEMORY
    VERIFY( cond.value() == ENOMEM );
    VERIFY( cond.category() == std::generic_category() );
*************** test03()
*** 112,120 ****
    // set "C" locale to get expected message
    auto loc = std::locale::global(std::locale::classic());
  
! #if defined __MING32__ || defined __MINGW64__
    std::string msg = std::system_category().message(5); // ERROR_ACCESS_DENIED
!   VERIFY(msg == "Access denied");
  #else
    std::string msg = std::system_category().message(EBADF);
    VERIFY( msg.find("file") != std::string::npos );
--- 117,133 ----
    // set "C" locale to get expected message
    auto loc = std::locale::global(std::locale::classic());
  
! #if defined __MINGW32__ || defined __MINGW64__
!   // On Windows, set thread preferred UI languages to "en-US"
!   // to get expected message
!   ULONG num_langs = 1;
!   SetThreadPreferredUILanguages(MUI_LANGUAGE_NAME, L"en-US\0", &num_langs);
! 
    std::string msg = std::system_category().message(5); // ERROR_ACCESS_DENIED
!   // Windows returns "Access is denied" but Wine returns "Access denied".
!   VERIFY(msg == "Access is denied" || msg == "Access denied");
! 
!   SetThreadPreferredUILanguages(MUI_RESET_FILTERS, nullptr, nullptr);
  #else
    std::string msg = std::system_category().message(EBADF);
    VERIFY( msg.find("file") != std::string::npos );
diff -Nrcpad gcc-15-20260117/libstdc++-v3/testsuite/std/time/parse/parse.cc gcc-15-20260124/libstdc++-v3/testsuite/std/time/parse/parse.cc
*** gcc-15-20260117/libstdc++-v3/testsuite/std/time/parse/parse.cc	Sat Jan 17 22:32:16 2026
--- gcc-15-20260124/libstdc++-v3/testsuite/std/time/parse/parse.cc	Sat Jan 24 22:32:15 2026
*************** test_modifiers()
*** 317,322 ****
--- 317,335 ----
    VERIFY( s == 12s );
  }
  
+ void
+ test_wchar()
+ {
+   std::wistringstream is;
+   std::chrono::duration<double, std::milli> ms;
+ 
+   is.clear();
+   is.str(L"0.125");
+   is >> parse(L"%S", ms);
+   VERIFY( is.good() );
+   VERIFY( ms.count() == 125 );
+ }
+ 
  int main()
  {
    test_recommended_practice();
*************** int main()
*** 324,327 ****
--- 337,341 ----
    test_whitespace();
    test_errors();
    test_modifiers();
+   test_wchar();
  }
