diff -Nrcpad gcc-14-20260716/LAST_UPDATED gcc-14-20260723/LAST_UPDATED
*** gcc-14-20260716/LAST_UPDATED	Thu Jul 16 22:32:24 2026
--- gcc-14-20260723/LAST_UPDATED	Thu Jul 23 22:32:24 2026
***************
*** 1 ****
! Obtained from git: releases/gcc-14 revision f2f60ebaaca3ebfd09340702594660842b69a1ad
--- 1 ----
! Obtained from git: releases/gcc-14 revision 218ce55ae770b24fd7e0a5cce95d2f1b26c33be5
diff -Nrcpad gcc-14-20260716/MD5SUMS gcc-14-20260723/MD5SUMS
*** gcc-14-20260716/MD5SUMS	Thu Jul 16 22:32:29 2026
--- gcc-14-20260723/MD5SUMS	Thu Jul 23 22:32:29 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-14-20260716.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-14-20260723.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** d32239bcb673463ab874e80d47fae504  COPYIN
*** 23,29 ****
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
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! 63f75bc796870e898fa42455624144a8  LAST_UPDATED
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--- 23,29 ----
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*************** dc52c51af1f9b66c50b2cf01afeee11d  gcc/BA
*** 505,511 ****
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--- 505,511 ----
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*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 541,547 ****
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*************** dab9f216d0b1b73156c675fe6b4d3460  gcc/co
*** 3370,3376 ****
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--- 3370,3376 ----
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*************** d36a2aabdf8da39363d9be0efef739b0  gcc/co
*** 5363,5369 ****
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*************** b54aca370d7104c8f824313f42db5d88  gcc/do
*** 5815,5821 ****
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--- 5815,5821 ----
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*************** dce7dac7e905ada28c6563d930b531eb  gcc/fo
*** 5874,5880 ****
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--- 5874,5880 ----
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*************** a0bad1c11baa50813a82d72f738f0872  gcc/fo
*** 5959,5965 ****
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! 240a5c5d12e4d535ae10ce9b40c40eae  gcc/fortran/trans-array.cc
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--- 5959,5965 ----
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*************** a22c6a2b44962887016aec34f8a38d4a  gcc/lo
*** 6431,6437 ****
  14dd7339d4d9c29f7462a093e4881147  gcc/lower-subreg.h
  de69ffd666d467def1646c24270ea2c9  gcc/lra-assigns.cc
  a62046a3f62b3ccf836000569a375ade  gcc/lra-coalesce.cc
! e8d0df13d424467daa46e40c39a8362f  gcc/lra-constraints.cc
  70a8abdd45bcea7a12630d9341f827e4  gcc/lra-eliminations.cc
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  642aa6eb2e4f0f3bddc8b0c181835618  gcc/lra-lives.cc
--- 6431,6437 ----
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! d66535ed61f5f302948152b34a8cf774  gcc/lra-constraints.cc
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*************** b4bd28274347fdac8fdf9c6568e69c87  gcc/sy
*** 8057,8068 ****
  0745369d6e711f2978854379f04976ae  gcc/target-globals.h
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! 4a23ac037123152878e470fc78ed513f  gcc/target.def
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  51d240e574a3f9ecec346d64a04ac634  gcc/targhooks.h
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! 90b45c9586ba1e706f10acafda63fad3  gcc/testsuite/ChangeLog
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--- 8057,8068 ----
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! 5ecdea465efdd9142f476a5bdec2db18  gcc/target.def
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*************** ff37df956d90b080a15eee27baf83cf8  gcc/te
*** 59456,59461 ****
--- 59456,59462 ----
  a9421cc74fddeb0b2e03c60e20410ede  gcc/testsuite/gcc.target/aarch64/sme/za_state_5_scp.c
  031a04851bc92dab81da666022b43d00  gcc/testsuite/gcc.target/aarch64/sme/za_state_6.c
  d002a1f4df9b5c96addef824d09dfbd1  gcc/testsuite/gcc.target/aarch64/sme/za_state_7.c
+ 045463011657312039c840313fcccf2d  gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c
  bc8fa843cae0050c83a00ac2cd807a98  gcc/testsuite/gcc.target/aarch64/sme/zt0_state_1.c
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  3ff747add1e9dfb996292dd5bf39ad0e  gcc/testsuite/gcc.target/aarch64/sme/zt0_state_3.c
*************** c2c643428e22f26ef60f0ac7fe72cab9  gcc/te
*** 63037,63042 ****
--- 63038,63045 ----
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  e30fd5dcda5a72ba3b2d66a5485b282a  gcc/testsuite/gcc.target/aarch64/sve/pr104474-3.c
+ f3d52f4be9c37a62f0780a635b22de41  gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c
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*************** cb50185eaf87f5357dad5873642eec33  gcc/te
*** 95192,95197 ****
--- 95195,95201 ----
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  8621637c284842966acb59cdbfe4e51a  gcc/testsuite/gfortran.dg/contiguous_15.f90
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  b81d56e35fe81ed4c9f6f67cca8a0ab2  gcc/testsuite/gfortran.dg/contiguous_4.f90
diff -Nrcpad gcc-14-20260716/gcc/ChangeLog gcc-14-20260723/gcc/ChangeLog
*** gcc-14-20260716/gcc/ChangeLog	Thu Jul 16 22:32:05 2026
--- gcc-14-20260723/gcc/ChangeLog	Thu Jul 23 22:32:05 2026
***************
*** 1,3 ****
--- 1,91 ----
+ 2026-07-21  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_start_call_args): Extend
+ 	comment.
+ 
+ 2026-07-21  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* config/aarch64/aarch64.cc (aarch64_mode_confluence): Fix
+ 	comment typo.
+ 	* target.def (mode_switching): Fix incorrect variable names in
+ 	documentation.
+ 	* doc/tm.texi: Regenerate.
+ 
+ 2026-07-21  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	PR target/119210
+ 	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
+ 	Add PSTATE.ZA enablement, and zero it if already enabled.
+ 
+ 2026-07-20  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-06-29  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/105116
+ 	* lra-constraints.cc (simplify_operand_subreg): Reload a
+ 	non-representable narrowing subreg of a hard register through
+ 	memory instead of resolving it lossily.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126262
+ 	* gimple-lower-bitint.cc (build_bitint_stmt_ssa_conflicts): Treat
+ 	IFN_MUL_OVERFLOW and IFN_UBSAN_CHECK_MUL like IFN_BSWAP, regardless
+ 	of bitint_big_endian.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126257
+ 	* match.pd (x+x -> x*2): Only optimize if 2 is representable in the
+ 	type.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/126084
+ 	* gimple-lower-bitint.cc: Include "attribs.h" and "asan.h".
+ 	(gimple_lower_bitint): Use asan_expand_poison_ifn to lower
+ 	.ASAN_POISON calls with large/huge _BitInt lhs.
+ 	* asan.cc (report_error_func): Set *nargs and use _n builtin
+ 	even if size is not a power of two or larger than 16.
+ 	(asan_expand_poison_ifn): Handle nargs == 2.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Jakub Jelinek  <jakub@redhat.com>
+ 		    H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR tree-optimization/120201
+ 	* cfgexpand.cc (expand_used_vars): Set data.asan_alignb to
+ 	maximum of itself and crtl->stack_alignment_needed
+ 	/ BITS_PER_UNIT.
+ 
+ 2026-07-16  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-16  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/106895
+ 	* config/rs6000/rs6000.h (enum rs6000_builtin_type_index): Add
+ 	RS6000_BTI_INTPTI and RS6000_BTI_UINTPTI.
+ 	(intPTI_type_internal_node, uintPTI_type_internal_node): New
+ 	PTImode type macros.
+ 	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Register
+ 	signed and unsigned PTImode internal builtin types.
+ 	* config/rs6000/sync.md (trunctipti2): New splitter.
+ 	(extendptiti2): Likewise.
+ 	(zero_extendptiti2): Likewise.
+ 
  2026-07-14  Richard Earnshaw  <rearnsha@arm.com>
  
  	Backported from master:
diff -Nrcpad gcc-14-20260716/gcc/DATESTAMP gcc-14-20260723/gcc/DATESTAMP
*** gcc-14-20260716/gcc/DATESTAMP	Thu Jul 16 22:32:05 2026
--- gcc-14-20260723/gcc/DATESTAMP	Thu Jul 23 22:32:06 2026
***************
*** 1 ****
! 20260716
--- 1 ----
! 20260723
diff -Nrcpad gcc-14-20260716/gcc/config/aarch64/aarch64.cc gcc-14-20260723/gcc/config/aarch64/aarch64.cc
*** gcc-14-20260716/gcc/config/aarch64/aarch64.cc	Thu Jul 16 22:32:07 2026
--- gcc-14-20260723/gcc/config/aarch64/aarch64.cc	Thu Jul 23 22:32:07 2026
*************** aarch64_start_call_args (cumulative_args
*** 11202,11208 ****
      emit_insn (gen_aarch64_start_private_za_call ());
  
    /* If this is a call to a shared-ZA function that doesn't share ZT0,
!      save and restore ZT0 around the call.  */
    if (aarch64_cfun_has_state ("zt0")
        && (ca->isa_mode & AARCH64_FL_ZA_ON)
        && ca->shared_zt0_flags == 0)
--- 11202,11209 ----
      emit_insn (gen_aarch64_start_private_za_call ());
  
    /* If this is a call to a shared-ZA function that doesn't share ZT0,
!      save and restore ZT0 around the call.  If ZA is not shared, then the
!      save/restore is instead emitted by aarch64_mode_emit_local_sme_state.  */
    if (aarch64_cfun_has_state ("zt0")
        && (ca->isa_mode & AARCH64_FL_ZA_ON)
        && ca->shared_zt0_flags == 0)
*************** aarch64_mode_emit_local_sme_state (aarch
*** 29555,29561 ****
        emit_insn (gen_aarch64_tpidr2_save ());
        emit_insn (gen_aarch64_clear_tpidr2 ());
        if (mode == aarch64_local_sme_state::ACTIVE_LIVE
! 	  || mode == aarch64_local_sme_state::ACTIVE_DEAD)
  	{
  	  if (aarch64_cfun_has_state ("za"))
  	    emit_insn (gen_aarch64_initial_zero_za ());
--- 29556,29563 ----
        emit_insn (gen_aarch64_tpidr2_save ());
        emit_insn (gen_aarch64_clear_tpidr2 ());
        if (mode == aarch64_local_sme_state::ACTIVE_LIVE
! 	  || mode == aarch64_local_sme_state::ACTIVE_DEAD
! 	  || mode == aarch64_local_sme_state::INACTIVE_LOCAL)
  	{
  	  if (aarch64_cfun_has_state ("za"))
  	    emit_insn (gen_aarch64_initial_zero_za ());
*************** aarch64_mode_emit_local_sme_state (aarch
*** 29637,29642 ****
--- 29639,29654 ----
  
    if (mode == aarch64_local_sme_state::INACTIVE_LOCAL)
      {
+       if (prev_mode == aarch64_local_sme_state::INACTIVE_CALLER)
+ 	/* Enable ZA (if it wasn't already enabled on entry).  Enabling ZA has
+ 	   the side-effect of zeroing ZA.
+ 
+ 	   A functionally correct alternative would be to leave TPIDR2_EL0 null
+ 	   and zero the save buffer.  However, zeroing the save buffer would require
+ 	   more code and would optimize for the case in which a callee also
+ 	   initialises private ZA state (which should be a rare event).  */
+ 	emit_insn (gen_aarch64_smstart_za ());
+ 
        if (prev_mode == aarch64_local_sme_state::ACTIVE_LIVE
  	  || prev_mode == aarch64_local_sme_state::ACTIVE_DEAD
  	  || prev_mode == aarch64_local_sme_state::INACTIVE_CALLER)
*************** aarch64_mode_confluence (int entity, int
*** 29967,29973 ****
  }
  
  /* Implement TARGET_MODE_BACKPROP for an entity that either stays
!    NO throughput, or makes one transition from NO to YES.  */
  
  static aarch64_tristate_mode
  aarch64_one_shot_backprop (aarch64_tristate_mode mode1,
--- 29979,29985 ----
  }
  
  /* Implement TARGET_MODE_BACKPROP for an entity that either stays
!    NO throughout, or makes one transition from NO to YES.  */
  
  static aarch64_tristate_mode
  aarch64_one_shot_backprop (aarch64_tristate_mode mode1,
diff -Nrcpad gcc-14-20260716/gcc/cp/ChangeLog gcc-14-20260723/gcc/cp/ChangeLog
*** gcc-14-20260716/gcc/cp/ChangeLog	Thu Jul 16 22:32:08 2026
--- gcc-14-20260723/gcc/cp/ChangeLog	Thu Jul 23 22:32:08 2026
***************
*** 1,3 ****
--- 1,24 ----
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/126057
+ 	* decl.cc (cp_finish_decomp): Set assembler name to
+ 	<decomp> during error recovery whenever TREE_STATIC
+ 	rather than just DECL_NAMESPACE_SCOPE_P.
+ 	* pt.cc (tsubst_stmt): If tsubst_decomp_names fails,
+ 	set assembler name to <decomp>.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-06-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125674
+ 	* pt.cc (tsubst_decl): Diagnose bit-field widths
+ 	with invalid type.
+ 
  2026-06-27  Patrick Palka  <ppalka@redhat.com>
  
  	Backported from master:
diff -Nrcpad gcc-14-20260716/gcc/doc/tm.texi gcc-14-20260723/gcc/doc/tm.texi
*** gcc-14-20260716/gcc/doc/tm.texi	Thu Jul 16 22:32:08 2026
--- gcc-14-20260723/gcc/doc/tm.texi	Thu Jul 23 22:32:08 2026
*************** mode or ``no mode'', depending on contex
*** 10512,10519 ****
  
  @deftypefn {Target Hook} void TARGET_MODE_EMIT (int @var{entity}, int @var{mode}, int @var{prev_mode}, HARD_REG_SET @var{regs_live})
  Generate one or more insns to set @var{entity} to @var{mode}.
! @var{hard_reg_live} is the set of hard registers live at the point where
! the insn(s) are to be inserted. @var{prev_moxde} indicates the mode
  to switch from, or is the number of modes if the previous mode is not
  known.  Sets of a lower numbered entity will be emitted before
  sets of a higher numbered entity to a mode of the same or lower priority.
--- 10512,10519 ----
  
  @deftypefn {Target Hook} void TARGET_MODE_EMIT (int @var{entity}, int @var{mode}, int @var{prev_mode}, HARD_REG_SET @var{regs_live})
  Generate one or more insns to set @var{entity} to @var{mode}.
! @var{regs_live} is the set of hard registers live at the point where
! the insn(s) are to be inserted. @var{prev_mode} indicates the mode
  to switch from, or is the number of modes if the previous mode is not
  known.  Sets of a lower numbered entity will be emitted before
  sets of a higher numbered entity to a mode of the same or lower priority.
diff -Nrcpad gcc-14-20260716/gcc/fortran/ChangeLog gcc-14-20260723/gcc/fortran/ChangeLog
*** gcc-14-20260716/gcc/fortran/ChangeLog	Thu Jul 16 22:32:08 2026
--- gcc-14-20260723/gcc/fortran/ChangeLog	Thu Jul 23 22:32:08 2026
***************
*** 1,3 ****
--- 1,15 ----
+ 2026-07-20  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-03  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/97592
+ 	PR fortran/125998
+ 	* trans-array.cc (gfc_conv_array_parameter): Always create a new
+ 	descriptor.  Copy lbound and ubound from the original descriptor
+ 	using matching dimension indexes.  Recalculate stride and
+ 	offset.
+ 
  2026-07-12  Paul Thomas  <pault@gcc.gnu.org>
  
  	Backported from master:
diff -Nrcpad gcc-14-20260716/gcc/fortran/trans-array.cc gcc-14-20260723/gcc/fortran/trans-array.cc
*** gcc-14-20260716/gcc/fortran/trans-array.cc	Thu Jul 16 22:32:08 2026
--- gcc-14-20260723/gcc/fortran/trans-array.cc	Thu Jul 23 22:32:08 2026
*************** gfc_conv_array_parameter (gfc_se * se, g
*** 8989,9002 ****
  	{
  	  tmp = build_fold_indirect_ref_loc (input_location, desc);
  
! 	  gfc_ss * ss = gfc_walk_expr (expr);
! 	  if (!transposed_dims (ss) && expr->rank != -1)
! 	    {
! 	      if (!ctree)
! 		gfc_conv_descriptor_data_set (&se->pre, tmp, ptr);
! 	    }
! 	  else if (!ctree)
  	    {
  	      tree old_field, new_field;
  	      tree old_desc = tmp;
  	      tree new_desc = gfc_create_var (TREE_TYPE (old_desc), "arg_desc");
--- 8989,8998 ----
  	{
  	  tmp = build_fold_indirect_ref_loc (input_location, desc);
  
! 	  if (!ctree)
  	    {
+ 	      /* The original descriptor may have transposed dims so we
+ 		 can't reuse it directly; we have to create a new one.  */
  	      tree old_field, new_field;
  	      tree old_desc = tmp;
  	      tree new_desc = gfc_create_var (TREE_TYPE (old_desc), "arg_desc");
*************** gfc_conv_array_parameter (gfc_se * se, g
*** 9061,9079 ****
  		}
  	      else
  		{
! 		  /* The original descriptor has transposed dims so we can't
! 		     reuse it directly; we have to create a new one.  */
! 		  old_field = gfc_conv_descriptor_offset_get (old_desc);
! 		  gfc_conv_descriptor_offset_set (&se->pre, new_desc, old_field);
  
  		  for (int i = 0; i < expr->rank; i++)
  		    {
! 		      old_field = gfc_conv_descriptor_dimension (old_desc,
! 			gfc_rank_cst[get_array_ref_dim_for_loop_dim (ss, i)]);
! 		      new_field = gfc_conv_descriptor_dimension (new_desc,
! 			gfc_rank_cst[i]);
! 		      gfc_add_modify (&se->pre, new_field, old_field);
  		    }
  		}
  
  	      if (flag_coarray == GFC_FCOARRAY_LIB
--- 9057,9111 ----
  		}
  	      else
  		{
! 		  tree offset = gfc_index_zero_node;
! 
! 		  tree stride = gfc_index_one_node;
  
  		  for (int i = 0; i < expr->rank; i++)
  		    {
! 		      tree dim = gfc_rank_cst[i];
! 
! 		      tree lbound = gfc_conv_descriptor_lbound_get (old_desc,
! 								    dim);
! 		      lbound = gfc_evaluate_now (lbound, &se->pre);
! 		      gfc_conv_descriptor_lbound_set (&se->pre, new_desc, dim,
! 						      lbound);
! 
! 		      tree ubound = gfc_conv_descriptor_ubound_get (old_desc,
! 								    dim);
! 		      ubound = gfc_evaluate_now (ubound, &se->pre);
! 		      gfc_conv_descriptor_ubound_set (&se->pre, new_desc, dim,
! 						      ubound);
! 
! 		      gfc_conv_descriptor_stride_set (&se->pre, new_desc, dim,
! 						      stride);
! 
! 		      tree tmp = fold_build2_loc (input_location, MULT_EXPR,
! 						  gfc_array_index_type,
! 						  stride, lbound);
! 		      offset = fold_build2_loc (input_location, MINUS_EXPR,
! 						gfc_array_index_type,
! 						offset, tmp);
! 		      offset = gfc_evaluate_now (offset, &se->pre);
! 
! 		      /* Now calculate the stride for next dimension, unless the
! 			 current dimension is the last one.  */
! 		      if (i == expr->rank - 1)
! 			break;
! 
! 		      tmp = fold_build2_loc (input_location, MINUS_EXPR,
! 					     gfc_array_index_type,
! 					     lbound, gfc_index_one_node);
! 		      tree extent = fold_build2_loc (input_location, MINUS_EXPR,
! 						     gfc_array_index_type,
! 						     ubound, tmp);
! 		      stride = fold_build2_loc (input_location, MULT_EXPR,
! 						gfc_array_index_type,
! 						stride, extent);
! 		      stride = gfc_evaluate_now (stride, &se->pre);
  		    }
+ 
+ 		  gfc_conv_descriptor_offset_set (&se->pre, new_desc, offset);
  		}
  
  	      if (flag_coarray == GFC_FCOARRAY_LIB
*************** gfc_conv_array_parameter (gfc_se * se, g
*** 9089,9095 ****
  	      gfc_conv_descriptor_data_set (&se->pre, new_desc, ptr);
  	      se->expr = gfc_build_addr_expr (NULL_TREE, new_desc);
  	    }
- 	  gfc_free_ss (ss);
  	}
  
        if (gfc_option.rtcheck & GFC_RTCHECK_ARRAY_TEMPS)
--- 9121,9126 ----
diff -Nrcpad gcc-14-20260716/gcc/lra-constraints.cc gcc-14-20260723/gcc/lra-constraints.cc
*** gcc-14-20260716/gcc/lra-constraints.cc	Thu Jul 16 22:32:08 2026
--- gcc-14-20260723/gcc/lra-constraints.cc	Thu Jul 23 22:32:08 2026
*************** simplify_operand_subreg (int nop, machin
*** 1790,1795 ****
--- 1790,1825 ----
      }
    else if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER)
      {
+       /* A narrowing subreg of a hard register that is not representable as a
+ 	 hard register (its offset does not fall on a register boundary) cannot
+ 	 be turned into one, and would otherwise be resolved to the wrong part
+ 	 of the register.  Reload it through memory so that the correct bytes
+ 	 are accessed, as is done for pseudos below.  Leave the frame, arg and
+ 	 stack pointers alone: simplify_subreg_regno can reject them simply
+ 	 because reload is not finished yet.  */
+       if (partial_subreg_p (mode, innermode)
+ 	  && REGNO (reg) != FRAME_POINTER_REGNUM
+ 	  && REGNO (reg) != ARG_POINTER_REGNUM
+ 	  && REGNO (reg) != STACK_POINTER_REGNUM
+ 	  && simplify_subreg_regno (REGNO (reg), innermode,
+ 				    SUBREG_BYTE (operand), mode) < 0)
+ 	{
+ 	  if (get_reload_reg (type, innermode, reg, NO_REGS, NULL,
+ 			      true, false, "non-representable subreg", &new_reg))
+ 	    {
+ 	      bitmap_set_bit (&lra_subreg_reload_pseudos, REGNO (new_reg));
+ 	      bool insert_before = (type != OP_OUT
+ 				    || read_modify_subreg_p (operand));
+ 	      bool insert_after = (type != OP_IN);
+ 	      insert_move_for_subreg (insert_before ? &before : NULL,
+ 				      insert_after ? &after : NULL,
+ 				      reg, new_reg);
+ 	    }
+ 	  SUBREG_REG (operand) = new_reg;
+ 	  lra_process_new_insns (curr_insn, before, after,
+ 				 "Inserting non-representable subreg reload");
+ 	  return true;
+ 	}
        alter_subreg (curr_id->operand_loc[nop], false);
        return true;
      }
diff -Nrcpad gcc-14-20260716/gcc/target.def gcc-14-20260723/gcc/target.def
*** gcc-14-20260716/gcc/target.def	Thu Jul 16 22:32:11 2026
--- gcc-14-20260723/gcc/target.def	Thu Jul 23 22:32:10 2026
*************** HOOK_VECTOR (TARGET_TOGGLE_, mode_switch
*** 7148,7155 ****
  DEFHOOK
  (emit,
   "Generate one or more insns to set @var{entity} to @var{mode}.\n\
! @var{hard_reg_live} is the set of hard registers live at the point where\n\
! the insn(s) are to be inserted. @var{prev_moxde} indicates the mode\n\
  to switch from, or is the number of modes if the previous mode is not\n\
  known.  Sets of a lower numbered entity will be emitted before\n\
  sets of a higher numbered entity to a mode of the same or lower priority.",
--- 7148,7155 ----
  DEFHOOK
  (emit,
   "Generate one or more insns to set @var{entity} to @var{mode}.\n\
! @var{regs_live} is the set of hard registers live at the point where\n\
! the insn(s) are to be inserted. @var{prev_mode} indicates the mode\n\
  to switch from, or is the number of modes if the previous mode is not\n\
  known.  Sets of a lower numbered entity will be emitted before\n\
  sets of a higher numbered entity to a mode of the same or lower priority.",
diff -Nrcpad gcc-14-20260716/gcc/testsuite/ChangeLog gcc-14-20260723/gcc/testsuite/ChangeLog
*** gcc-14-20260716/gcc/testsuite/ChangeLog	Thu Jul 16 22:32:11 2026
--- gcc-14-20260723/gcc/testsuite/ChangeLog	Thu Jul 23 22:32:10 2026
***************
*** 1,3 ****
--- 1,100 ----
+ 2026-07-21  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	PR target/119210
+ 	* gcc.target/aarch64/sme/za_state_8.c: New test.
+ 
+ 2026-07-20  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	Backported from master:
+ 	2026-07-03  Mikael Morin  <mikael@gcc.gnu.org>
+ 
+ 	PR fortran/97592
+ 	PR fortran/125998
+ 	* gfortran.dg/contiguous_17.f90: New test.
+ 
+ 2026-07-20  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	Backported from master:
+ 	2026-06-29  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/105116
+ 	* gcc.target/aarch64/sve/pr105116.c: New test.
+ 	* gcc.target/aarch64/sve/pr105116-run.c: New test.
+ 
+ 2026-07-16  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	Backported from master:
+ 	2026-07-16  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* gcc.dg/torture/bitint-101.c: Require bitint.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126262
+ 	* gcc.dg/torture/bitint-102.c: New test.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-15  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR tree-optimization/126257
+ 	* gcc.dg/torture/bitint-101.c: New test.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/126084
+ 	* gcc.dg/asan/bitint-1.c: New test.
+ 	* gcc.dg/asan/bitint-2.c: New test.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-14  Jakub Jelinek  <jakub@redhat.com>
+ 		    H.J. Lu  <hjl.tools@gmail.com>
+ 
+ 	PR tree-optimization/120201
+ 	* g++.dg/asan/pr120201-1.C: New test.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* g++.dg/opt/20260703-1.C: New test.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-07-03  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/126057
+ 	* g++.dg/cpp2a/decomp11.C: New test.
+ 
+ 2026-07-16  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	Backported from master:
+ 	2026-06-12  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR c++/125674
+ 	* g++.dg/template/bitfield5.C: New test.
+ 	* g++.dg/template/bitfield6.C: New test.
+ 
+ 2026-07-16  Jeevitha  <jeevitha@linux.ibm.com>
+ 
+ 	Backported from master:
+ 	2026-07-16  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+ 
+ 	PR target/106895
+ 	* gcc.target/powerpc/pr106895-1.c: New test.
+ 	* gcc.target/powerpc/pr106895-2.c: New test.
+ 
  2026-07-14  Richard Earnshaw  <rearnsha@arm.com>
  
  	Backported from master:
diff -Nrcpad gcc-14-20260716/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c gcc-14-20260723/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c
*** gcc-14-20260716/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20260723/gcc/testsuite/gcc.target/aarch64/sme/za_state_8.c	Thu Jul 23 22:32:15 2026
***************
*** 0 ****
--- 1,25 ----
+ // { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls" }
+ // { dg-final { check-function-bodies "**" "" } }
+ 
+ #include <arm_sme.h>
+ 
+ void callee_ns();
+ __arm_streaming __arm_inout("za") void callee_s();
+ 
+ /*
+ ** foo:
+ **	...
+ **	smstart	za
+ **	...
+ **	msr	tpidr2_el0, x\d+
+ **	...
+ */
+ __arm_locally_streaming __arm_new("za") const float * foo(const float* x) {
+     callee_ns ();
+     const float32_t *x_f_in = x;
+     svzero_za();
+     callee_s ();
+     return x_f_in;
+ }
+ 
+ 
diff -Nrcpad gcc-14-20260716/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c gcc-14-20260723/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c
*** gcc-14-20260716/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20260723/gcc/testsuite/gcc.target/aarch64/sve/pr105116-run.c	Thu Jul 23 22:32:15 2026
***************
*** 0 ****
--- 1,48 ----
+ /* PR target/105116 */
+ /* { dg-do run { target aarch64_sve_hw } } */
+ /* { dg-options "-O2 -fno-split-wide-types" } */
+ 
+ /* Besides the ICE, the non-representable high-lane subregs used to be
+    resolved lossily (silently reading lane 0), miscompiling the upper lanes.
+    Check the scalarised divide produces the correct result for every lane.  */
+ 
+ typedef signed char vnx16qi __attribute__((vector_size (32)));
+ 
+ __attribute__((noipa)) void
+ vdiv_vnx16qi (vnx16qi *x, vnx16qi y, vnx16qi z)
+ {
+   register vnx16qi dst  asm ("z0");
+   register vnx16qi src1 asm ("z2");
+   register vnx16qi src2 asm ("z4");
+   dst = *x;
+   src1 = y;
+   src2 = z;
+   asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2));
+   dst = src2 - (dst / src1);
+   asm volatile ("" :: "w" (dst));
+   *x = dst;
+ }
+ 
+ int
+ main (void)
+ {
+   vnx16qi X, Y, Z;
+   signed char xv[32], yv[32], zv[32];
+   for (int i = 0; i < 32; i++)
+     {
+       xv[i] = (signed char) (i * 7 - 50);
+       yv[i] = (signed char) (((i % 5) + 1) * (i & 1 ? 1 : -1));
+       zv[i] = (signed char) (100 - i * 3);
+     }
+   __builtin_memcpy (&X, xv, 32);
+   __builtin_memcpy (&Y, yv, 32);
+   __builtin_memcpy (&Z, zv, 32);
+   vdiv_vnx16qi (&X, Y, Z);
+   signed char got[32];
+   __builtin_memcpy (got, &X, 32);
+   for (int i = 0; i < 32; i++)
+     if (got[i]
+ 	!= (signed char) (zv[i] - (signed char) ((int) xv[i] / (int) yv[i])))
+       __builtin_abort ();
+   return 0;
+ }
diff -Nrcpad gcc-14-20260716/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c gcc-14-20260723/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c
*** gcc-14-20260716/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20260723/gcc/testsuite/gcc.target/aarch64/sve/pr105116.c	Thu Jul 23 22:32:15 2026
***************
*** 0 ****
--- 1,32 ----
+ /* PR target/105116 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-split-wide-types" } */
+ 
+ /* Wide GNU vectors pinned to SVE z registers and then scalarised by vector
+    lowering used to ICE in lra_split_hard_reg_for ("unable to find a register
+    to spill"): LRA reloaded a non-representable scalar subreg of the OImode
+    register pair into GENERAL_REGS, which cannot hold OImode.  Integer vector
+    divide and modulo have no Advanced SIMD form, so they are still scalarised
+    and exercise the reload path.  */
+ 
+ typedef signed char vnx16qi __attribute__((vector_size (32)));
+ 
+ #define TEST(NAME, OP)						\
+   void								\
+   NAME (vnx16qi *x, vnx16qi y, vnx16qi z)			\
+   {								\
+     register vnx16qi dst  asm ("z0");				\
+     register vnx16qi src1 asm ("z2");				\
+     register vnx16qi src2 asm ("z4");				\
+     dst = *x;							\
+     src1 = y;							\
+     src2 = z;							\
+     asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2));	\
+     dst = src2 - (OP);						\
+     asm volatile ("" :: "w" (dst));				\
+     *x = dst;							\
+   }
+ 
+ TEST (vmul_vnx16qi, dst * src1)
+ TEST (vdiv_vnx16qi, dst / src1)
+ TEST (vmod_vnx16qi, dst % src1)
diff -Nrcpad gcc-14-20260716/gcc/testsuite/gfortran.dg/contiguous_17.f90 gcc-14-20260723/gcc/testsuite/gfortran.dg/contiguous_17.f90
*** gcc-14-20260716/gcc/testsuite/gfortran.dg/contiguous_17.f90	Thu Jan  1 00:00:00 1970
--- gcc-14-20260723/gcc/testsuite/gfortran.dg/contiguous_17.f90	Thu Jul 23 22:32:17 2026
***************
*** 0 ****
--- 1,229 ----
+ ! { dg-do run }
+ !
+ ! PR fortran/125998
+ ! Check the correct passing of a transposed array to an assumed-shape dummy
+ ! having the contiguous and target attributes.
+ !
+ ! Original testcase from Federico Perini <federico.perini@gmail.com>
+ 
+ subroutine original
+     real(8) :: a(3,4)
+     integer :: dims(2)           
+     character(48) :: iomsg  
+     call show(transpose(a),dims)
+     if (any(dims/=shape(transpose(a)))) then 
+         write(iomsg,1) 'invalid a^T dims',dims, &
+                        ' should be',shape(transpose(a))
+         error stop iomsg
+     endif
+     1 format(*(a,' [',i0,',',i0,']'))
+ 
+ contains
+ 
+     subroutine show(x,dims)
+         ! "3 4" with `contiguous` (BUG); "4 3" without
+         real(8), intent(in), target, contiguous :: x(:,:)
+         integer, intent(out) :: dims(2)    
+         dims = [size(x,1),size(x,2)]
+     end 
+ 
+ end
+ 
+ module m
+     implicit none
+     private
+     public :: check_all
+ 
+ contains
+ 
+     subroutine abort_different(lx,x,ly,y,code)
+         character(*), intent(in) :: lx, ly
+         integer, intent(in) :: x(..), y(..), code
+         write(6,'(a," /= ",a)') lx, ly
+         select rank(x)
+             rank(1)
+                 write(6,3) lx
+                 write(6,*) x
+             rank(2)
+                 write(6,3) lx
+                 write(6,*) x
+             rank default
+         end select
+         select rank(y)
+             rank(1)
+                 write(6,3) ly
+                 write(6,*) y
+             rank(2)
+                 write(6,3) ly
+                 write(6,*) y
+             rank default
+         end select
+         error stop code
+       3 format(a,":")
+     end subroutine
+ 
+     subroutine check_target(x,expected,num_error)
+         integer, intent(in), target, contiguous :: x(:,:)
+         integer, intent(in) :: num_error, expected(:,:)
+         if (any(shape(x) /= shape(expected))) then
+             call abort_different( &
+                     "shape(x)",shape(x), &
+                     "shape(expected)",shape(expected), &
+                     num_error*10+1 &
+             )
+         end if
+         if (any(x /= expected)) then
+             call abort_different("x",x,"expected",expected,num_error*10+2)
+         end if
+         if (x(2,2) /= expected(2,2)) then
+             call abort_different( &
+                 "x(2,2)",x(2,2), &
+                 "expected(2,2)",expected(2,2), &
+                 num_error*10+3 &
+             )
+         end if
+     end 
+ 
+     subroutine check_non_target(x,expected,num_error)
+         integer, intent(in), contiguous :: x(:,:)
+         integer, intent(in) :: num_error, expected(:,:)
+         if (any(shape(x) /= shape(expected))) then
+             call abort_different( &
+                     "shape(x)",shape(x), &
+                     "shape(expected)",shape(expected), &
+                     num_error*10+1 &
+             )
+         end if
+         if (any(x /= expected)) then
+             call abort_different("x",x,"expected",expected,num_error*10+2)
+         end if
+         if (x(2,2) /= expected(2,2)) then
+             call abort_different( &
+                 "x(2,2)",x(2,2), &
+                 "expected(2,2)",expected(2,2), &
+                 num_error*10+3 &
+             )
+         end if
+     end 
+ 
+     subroutine wrapper_target(x,expected,num_error)
+         integer, intent(in), target :: x(:,:)
+         integer, intent(in) :: expected(:,:)
+         integer, intent(in) :: num_error
+         call check_target(x,expected,num_error)
+     end subroutine
+ 
+     subroutine wrapper_non_target(x,expected,num_error)
+         integer, intent(in) :: x(:,:), expected(:,:)
+         integer, intent(in) :: num_error
+         call check_non_target(x,expected,num_error)
+     end subroutine
+ 
+     subroutine wrapper_transpose_target(x,expected,num_error)
+         integer, intent(in), target :: x(:,:)
+         integer, intent(in) :: expected(:,:)
+         integer, intent(in) :: num_error
+         call check_target(transpose(x),expected,num_error)
+     end subroutine
+ 
+     subroutine wrapper_transpose_non_target(x,expected,num_error)
+         integer, intent(in) :: x(:,:), expected(:,:)
+         integer, intent(in) :: num_error
+         call check_non_target(transpose(x),expected,num_error)
+     end subroutine
+ 
+     subroutine check_all
+         integer :: a(3,4)
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 1 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_non_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 2 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 3 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_non_target( &
+                 transpose(a), &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 4 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_target( &
+                 a, &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 5 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_non_target( &
+                 a, &
+                 reshape([0,2,8,34,1,3,13,55,1,5,21,89],[4,3]), &
+                 6 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_target( &
+                 transpose(a), &
+                 reshape([0,1,1,2,3,5,8,13,21,34,55,89],[3,4]), &
+                 7 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_transpose_non_target( &
+                 transpose(a), &
+                 reshape([0,1,1,2,3,5,8,13,21,34,55,89],[3,4]), &
+                 8 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 9 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call check_non_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 10 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 11 &
+         )
+ 
+         a = reshape([0,1,1,2,3,5,8,13,21,34,55,89],shape(a))
+         call wrapper_non_target( &
+                 a(::2,::2), &
+                 reshape([0,1,8,21],[2,2]), &
+                 12 &
+         )
+ 
+     end subroutine
+ 
+ end module
+ 
+ use m
+ call original
+ call check_all
+ end
