diff -Nrcpad gcc-13-20260129/LAST_UPDATED gcc-13-20260205/LAST_UPDATED
*** gcc-13-20260129/LAST_UPDATED	Thu Jan 29 22:32:22 2026
--- gcc-13-20260205/LAST_UPDATED	Thu Feb  5 22:32:22 2026
***************
*** 1 ****
! Obtained from git: releases/gcc-13 revision c67142f19574e94a45ef91710e777ec17b4d5e4d
--- 1 ----
! Obtained from git: releases/gcc-13 revision 5260201f753eefbadb41620a7e46e2f1beb30edc
diff -Nrcpad gcc-13-20260129/MD5SUMS gcc-13-20260205/MD5SUMS
*** gcc-13-20260129/MD5SUMS	Thu Jan 29 22:32:26 2026
--- gcc-13-20260205/MD5SUMS	Thu Feb  5 22:32:26 2026
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-13-20260129.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-13-20260205.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** d32239bcb673463ab874e80d47fae504  COPYIN
*** 21,27 ****
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! a41e7591d5ba64d69fa05828269df0b8  LAST_UPDATED
  81b3330d422f3ce1ef8b720dfae35068  MAINTAINERS
  2b61ddbd876fa839639a7ca551773426  Makefile.def
  5d2d6a74f897f8158d37f5f2ec6877ce  Makefile.in
--- 21,27 ----
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! e9d08c2179f6f9c6ee34f80800baa4db  LAST_UPDATED
  81b3330d422f3ce1ef8b720dfae35068  MAINTAINERS
  2b61ddbd876fa839639a7ca551773426  Makefile.def
  5d2d6a74f897f8158d37f5f2ec6877ce  Makefile.in
*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 510,516 ****
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! d6e6e1c3b06768d72d50f4cd8d04971a  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
--- 510,516 ----
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! 60c993673597432c96576ad02cc9e6ea  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
*************** f71c2e5572561a74ea464ac5e46b48e9  gcc/co
*** 3975,3981 ****
  9ac8a2404b744a4725303bcaa6eb18ee  gcc/config/i386/slm.md
  78848cd4caaf8dc8240bd6c097488abe  gcc/config/i386/smmintrin.h
  f636ec0022d2efe9257b23fc816e2b32  gcc/config/i386/sol2.h
! f240cd1fbe1582422e3bbba0d220cb98  gcc/config/i386/sse.md
  d5e445dfcfe76b4409b1d6a2115663fc  gcc/config/i386/ssemath.h
  0547e7c6a1807f6096d1ef483c6f9c13  gcc/config/i386/stringop.def
  5e04bf034cc99782faa1edf2d7d26383  gcc/config/i386/subst.md
--- 3975,3981 ----
  9ac8a2404b744a4725303bcaa6eb18ee  gcc/config/i386/slm.md
  78848cd4caaf8dc8240bd6c097488abe  gcc/config/i386/smmintrin.h
  f636ec0022d2efe9257b23fc816e2b32  gcc/config/i386/sol2.h
! 280f9ff75ca06249f48f7376387cfee9  gcc/config/i386/sse.md
  d5e445dfcfe76b4409b1d6a2115663fc  gcc/config/i386/ssemath.h
  0547e7c6a1807f6096d1ef483c6f9c13  gcc/config/i386/stringop.def
  5e04bf034cc99782faa1edf2d7d26383  gcc/config/i386/subst.md
*************** aec47cbaec48561e260557f0682793cf  gcc/cs
*** 5186,5192 ****
  a667c8581cf5009d6af17f19f1186065  gcc/ctfc.cc
  9881edbbb726db4859766d0a32beb6a7  gcc/ctfc.h
  744cafae198aaa990e1c303aa66f0504  gcc/ctfout.cc
! d471b6740b3344770d624a5f1ba4ad55  gcc/d/ChangeLog
  86f687c485111eedca2eb048294f957e  gcc/d/ChangeLog-2006
  70ed1c47fd9b3f5dd95055642ed79265  gcc/d/ChangeLog-2007
  a7090ab2dd83aa4f44823c17566b83ef  gcc/d/ChangeLog-2008
--- 5186,5192 ----
  a667c8581cf5009d6af17f19f1186065  gcc/ctfc.cc
  9881edbbb726db4859766d0a32beb6a7  gcc/ctfc.h
  744cafae198aaa990e1c303aa66f0504  gcc/ctfout.cc
! 9a412f052b6e74c4826cc0c9c4ad631f  gcc/d/ChangeLog
  86f687c485111eedca2eb048294f957e  gcc/d/ChangeLog-2006
  70ed1c47fd9b3f5dd95055642ed79265  gcc/d/ChangeLog-2007
  a7090ab2dd83aa4f44823c17566b83ef  gcc/d/ChangeLog-2008
*************** b1d8cca7f88b3b7a419bdaad940457c0  gcc/d/
*** 5418,5424 ****
  7fbf81ad217c5efa6f267572778e7ab8  gcc/d/runtime.def
  94e59e9f9adf115478148e8ffd079d8e  gcc/d/toir.cc
  168e3e721d8dc43fb9d250ca847af79a  gcc/d/typeinfo.cc
! 3e4a30df3b3b774bf3be26a9e1e5b5d5  gcc/d/types.cc
  accc2d7f211bb139fde71fcb94dbbf92  gcc/data-streamer-in.cc
  888eb4c7a007875545f7f89fa223643c  gcc/data-streamer-out.cc
  047c64792c9f1e60b4b6498df8817c94  gcc/data-streamer.cc
--- 5418,5424 ----
  7fbf81ad217c5efa6f267572778e7ab8  gcc/d/runtime.def
  94e59e9f9adf115478148e8ffd079d8e  gcc/d/toir.cc
  168e3e721d8dc43fb9d250ca847af79a  gcc/d/typeinfo.cc
! 0b05a0067e1af26cb004690abedade5d  gcc/d/types.cc
  accc2d7f211bb139fde71fcb94dbbf92  gcc/data-streamer-in.cc
  888eb4c7a007875545f7f89fa223643c  gcc/data-streamer-out.cc
  047c64792c9f1e60b4b6498df8817c94  gcc/data-streamer.cc
*************** b829ed0032c899e107be2db349c913f3  gcc/ta
*** 7637,7643 ****
  811da275a2b9d3186a6decf96c01b0ed  gcc/targhooks.cc
  edb193a32070c4a7626fb75382def9b9  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 58bcc8cda686a4ff2b9a25080aa8b7e5  gcc/testsuite/ChangeLog
  862f04afbd87da2cc6bc432c3f28430f  gcc/testsuite/ChangeLog-1993-2007
  029a5d8dacd25eb5d4711452ac448e5b  gcc/testsuite/ChangeLog-2008
  13ac28c41d51b66b4ec40dba6bd50f39  gcc/testsuite/ChangeLog-2009
--- 7637,7643 ----
  811da275a2b9d3186a6decf96c01b0ed  gcc/targhooks.cc
  edb193a32070c4a7626fb75382def9b9  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 6ae86b93619b0f6c6e3b4f8d1126e8ef  gcc/testsuite/ChangeLog
  862f04afbd87da2cc6bc432c3f28430f  gcc/testsuite/ChangeLog-1993-2007
  029a5d8dacd25eb5d4711452ac448e5b  gcc/testsuite/ChangeLog-2008
  13ac28c41d51b66b4ec40dba6bd50f39  gcc/testsuite/ChangeLog-2009
*************** b48e2095b969e9e4d541b80007eaed1f  gcc/te
*** 33041,33046 ****
--- 33041,33047 ----
  ea015573ee8ddabae38c2a615f8228fb  gcc/testsuite/g++.target/i386/pr122446-amxfp16.C
  59ffb1a0656cc43a87c4b7e240fb28c6  gcc/testsuite/g++.target/i386/pr122446-amxint8.C
  ffbb5e0bd5668625c6d5cef769228118  gcc/testsuite/g++.target/i386/pr122446-amxtile.C
+ fe98d8bd643079ebf7d12496d3189d03  gcc/testsuite/g++.target/i386/pr123779.C
  55fb67abf6517f92b1a0240d2c06b5c5  gcc/testsuite/g++.target/i386/pr35513-1.C
  14dde546e4eefec7aa6d1ac41261cb16  gcc/testsuite/g++.target/i386/pr35513-2.C
  1c706f97b6d93c0124dc4a203c98f6d2  gcc/testsuite/g++.target/i386/pr57362.C
*************** a81f29fc44be5cd208351e9e8b4a742b  gcc/te
*** 80031,80036 ****
--- 80032,80038 ----
  0b4ca5d336606fc94e656b8731b0a78e  gcc/testsuite/gdc.dg/pr119139.d
  ad51c6065b49988f50a3f799a0e5f9a3  gcc/testsuite/gdc.dg/pr121477.d
  e4d8064a02951cfe69cf639a94128dd0  gcc/testsuite/gdc.dg/pr123046.d
+ 9ce0fee5b0fbb84c1de9a43ef50b9462  gcc/testsuite/gdc.dg/pr123264.d
  e89ebd75d9b162289c929675222e8501  gcc/testsuite/gdc.dg/pr123407a.d
  a45efe7a1d6f8b7f15f7befa3e7b1768  gcc/testsuite/gdc.dg/pr123407b.d
  4e7020df6ad139d4b43104ca5b97d142  gcc/testsuite/gdc.dg/pr123419.d
diff -Nrcpad gcc-13-20260129/gcc/DATESTAMP gcc-13-20260205/gcc/DATESTAMP
*** gcc-13-20260129/gcc/DATESTAMP	Thu Jan 29 22:32:05 2026
--- gcc-13-20260205/gcc/DATESTAMP	Thu Feb  5 22:32:06 2026
***************
*** 1 ****
! 20260129
--- 1 ----
! 20260205
diff -Nrcpad gcc-13-20260129/gcc/config/i386/sse.md gcc-13-20260205/gcc/config/i386/sse.md
*** gcc-13-20260129/gcc/config/i386/sse.md	Thu Jan 29 22:32:06 2026
--- gcc-13-20260205/gcc/config/i386/sse.md	Thu Feb  5 22:32:07 2026
***************
*** 22016,22022 ****
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v8qiv8hi2<mask_name>_2"
    [(set (match_operand:V8HI 0 "register_operand")
  	(any_extend:V8HI
  	  (vec_select:V8QI
--- 22016,22022 ----
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v8qiv8hi2_2"
    [(set (match_operand:V8HI 0 "register_operand")
  	(any_extend:V8HI
  	  (vec_select:V8QI
***************
*** 22028,22034 ****
  		       (const_int 2) (const_int 3)
  		       (const_int 4) (const_int 5)
  		       (const_int 6) (const_int 7)]))))]
!   "TARGET_SSE4_1 && <mask_avx512bw_condition> && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 22028,22034 ----
  		       (const_int 2) (const_int 3)
  		       (const_int 4) (const_int 5)
  		       (const_int 6) (const_int 7)]))))]
!   "TARGET_SSE4_1
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22036,22041 ****
--- 22036,22067 ----
  	(any_extend:V8HI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v8qiv8hi2_mask_2"
+   [(set (match_operand:V8HI 0 "register_operand")
+ 	(vec_merge:V8HI
+ 	  (any_extend:V8HI
+ 	    (vec_select:V8QI
+ 	      (subreg:V16QI
+ 		(vec_concat:V2DI
+ 		  (match_operand:DI 1 "memory_operand")
+ 		  (const_int 0)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 			 (const_int 2) (const_int 3)
+ 		         (const_int 4) (const_int 5)
+ 		         (const_int 6) (const_int 7)])))
+ 	  (match_operand:V8HI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL && TARGET_AVX512BW
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V8HI
+ 	  (any_extend:V8HI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
+ 
  (define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3"
    [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,Yw")
  	(vec_select:V16QI
***************
*** 22160,22166 ****
     (set_attr "prefix" "maybe_evex")
     (set_attr "mode" "OI")])
  
! (define_insn_and_split "*avx2_<code>v8qiv8si2<mask_name>_2"
    [(set (match_operand:V8SI 0 "register_operand")
  	(any_extend:V8SI
  	  (vec_select:V8QI
--- 22186,22192 ----
     (set_attr "prefix" "maybe_evex")
     (set_attr "mode" "OI")])
  
! (define_insn_and_split "*avx2_<code>v8qiv8si2_2"
    [(set (match_operand:V8SI 0 "register_operand")
  	(any_extend:V8SI
  	  (vec_select:V8QI
***************
*** 22172,22178 ****
  		       (const_int 2) (const_int 3)
  		       (const_int 4) (const_int 5)
  		       (const_int 6) (const_int 7)]))))]
!   "TARGET_AVX2 && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 22198,22204 ----
  		       (const_int 2) (const_int 3)
  		       (const_int 4) (const_int 5)
  		       (const_int 6) (const_int 7)]))))]
!   "TARGET_AVX2
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22180,22185 ****
--- 22206,22238 ----
  	(any_extend:V8SI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v8qiv8si2_mask_2"
+   [(set (match_operand:V8SI 0 "register_operand")
+ 	(vec_merge:V8SI
+ 	  (any_extend:V8SI
+ 	    (vec_select:V8QI
+ 	      (subreg:V16QI
+ 		(vec_concat:V2DI
+ 		  (match_operand:DI 1 "memory_operand")
+ 		  (const_int 0)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 			 (const_int 2) (const_int 3)
+ 			 (const_int 4) (const_int 5)
+ 			 (const_int 6) (const_int 7)])))
+ 	  (match_operand:V8SI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V8SI
+ 	  (any_extend:V8SI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
+ 
+ 
  (define_expand "<insn>v8qiv8si2"
    [(set (match_operand:V8SI 0 "register_operand")
  	(any_extend:V8SI
***************
*** 22222,22228 ****
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v4qiv4si2<mask_name>_2"
    [(set (match_operand:V4SI 0 "register_operand")
  	(any_extend:V4SI
  	  (vec_select:V4QI
--- 22275,22281 ----
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v4qiv4si2_2"
    [(set (match_operand:V4SI 0 "register_operand")
  	(any_extend:V4SI
  	  (vec_select:V4QI
***************
*** 22244,22249 ****
--- 22297,22331 ----
  	(any_extend:V4SI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v4qiv4si2_mask_2"
+   [(set (match_operand:V4SI 0 "register_operand")
+ 	(vec_merge:V4SI
+ 	  (any_extend:V4SI
+ 	    (vec_select:V4QI
+ 	      (subreg:V16QI
+ 		(vec_merge:V4SI
+ 		  (vec_duplicate:V4SI
+ 		    (match_operand:SI 1 "memory_operand"))
+ 		  (const_vector:V4SI
+ 		    [(const_int 0) (const_int 0)
+ 		     (const_int 0) (const_int 0)])
+ 		  (const_int 1)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 			 (const_int 2) (const_int 3)])))
+ 	  (match_operand:V4SI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V4SI
+ 	  (any_extend:V4SI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
+ 
+ 
  (define_expand "<insn>v4qiv4si2"
    [(set (match_operand:V4SI 0 "register_operand")
  	(any_extend:V4SI
***************
*** 22394,22400 ****
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v4hiv4si2<mask_name>_2"
    [(set (match_operand:V4SI 0 "register_operand")
  	(any_extend:V4SI
  	  (vec_select:V4HI
--- 22476,22482 ----
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v4hiv4si2_2"
    [(set (match_operand:V4SI 0 "register_operand")
  	(any_extend:V4SI
  	  (vec_select:V4HI
***************
*** 22404,22410 ****
  		(const_int 0)) 0)
  	    (parallel [(const_int 0) (const_int 1)
  		       (const_int 2) (const_int 3)]))))]
!   "TARGET_SSE4_1 && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 22486,22492 ----
  		(const_int 0)) 0)
  	    (parallel [(const_int 0) (const_int 1)
  		       (const_int 2) (const_int 3)]))))]
!   "TARGET_SSE4_1
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22412,22417 ****
--- 22494,22524 ----
  	(any_extend:V4SI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v4hiv4si2_mask_2"
+   [(set (match_operand:V4SI 0 "register_operand")
+ 	(vec_merge:V4SI
+ 	  (any_extend:V4SI
+ 	    (vec_select:V4HI
+ 	      (subreg:V8HI
+ 		(vec_concat:V2DI
+ 		  (match_operand:DI 1 "memory_operand")
+ 		  (const_int 0)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 			 (const_int 2) (const_int 3)])))
+ 	  (match_operand:V4SI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V4SI
+ 	  (any_extend:V4SI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
+ 
+ 
  (define_expand "<insn>v4hiv4si2"
    [(set (match_operand:V4SI 0 "register_operand")
  	(any_extend:V4SI
***************
*** 22514,22520 ****
     (set_attr "prefix" "evex")
     (set_attr "mode" "XI")])
  
! (define_insn_and_split "*avx512f_<code>v8qiv8di2<mask_name>_2"
    [(set (match_operand:V8DI 0 "register_operand")
  	(any_extend:V8DI
  	  (vec_select:V8QI
--- 22621,22627 ----
     (set_attr "prefix" "evex")
     (set_attr "mode" "XI")])
  
! (define_insn_and_split "*avx512f_<code>v8qiv8di2_2"
    [(set (match_operand:V8DI 0 "register_operand")
  	(any_extend:V8DI
  	  (vec_select:V8QI
***************
*** 22533,22538 ****
--- 22640,22671 ----
  	(any_extend:V8DI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
  
+ (define_insn_and_split "*avx512f_<code>v8qiv8di2_mask_2"
+   [(set (match_operand:V8DI 0 "register_operand")
+ 	(vec_merge:V8DI
+ 	  (any_extend:V8DI
+ 	    (vec_select:V8QI
+ 	      (subreg:V16QI
+ 		(vec_concat:V2DI
+ 		  (match_operand:DI 1 "memory_operand")
+ 		  (const_int 0)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 			 (const_int 2) (const_int 3)
+ 		         (const_int 4) (const_int 5)
+ 		         (const_int 6) (const_int 7)])))
+ 	  (match_operand:V8DI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512F && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V8DI
+ 	  (any_extend:V8DI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
+ 
+ 
  (define_expand "<insn>v8qiv8di2"
    [(set (match_operand:V8DI 0 "register_operand")
  	(any_extend:V8DI
***************
*** 22573,22579 ****
     (set_attr "prefix" "maybe_evex")
     (set_attr "mode" "OI")])
  
! (define_insn_and_split "*avx2_<code>v4qiv4di2<mask_name>_2"
    [(set (match_operand:V4DI 0 "register_operand")
  	(any_extend:V4DI
  	  (vec_select:V4QI
--- 22706,22712 ----
     (set_attr "prefix" "maybe_evex")
     (set_attr "mode" "OI")])
  
! (define_insn_and_split "*avx2_<code>v4qiv4di2_2"
    [(set (match_operand:V4DI 0 "register_operand")
  	(any_extend:V4DI
  	  (vec_select:V4QI
***************
*** 22587,22593 ****
  		(const_int 1)) 0)
  	    (parallel [(const_int 0) (const_int 1)
  		       (const_int 2) (const_int 3)]))))]
!   "TARGET_AVX2 && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 22720,22726 ----
  		(const_int 1)) 0)
  	    (parallel [(const_int 0) (const_int 1)
  		       (const_int 2) (const_int 3)]))))]
!   "TARGET_AVX2
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22595,22600 ****
--- 22728,22762 ----
  	(any_extend:V4DI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v4qiv4di2_mask_2"
+   [(set (match_operand:V4DI 0 "register_operand")
+ 	(vec_merge:V4DI
+ 	  (any_extend:V4DI
+ 	    (vec_select:V4QI
+ 	      (subreg:V16QI
+ 		(vec_merge:V4SI
+ 		  (vec_duplicate:V4SI
+ 		    (match_operand:SI 1 "memory_operand"))
+ 		  (const_vector:V4SI
+ 		    [(const_int 0) (const_int 0)
+ 		     (const_int 0) (const_int 0)])
+ 		  (const_int 1)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 			 (const_int 2) (const_int 3)])))
+ 	  (match_operand:V4DI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V4DI
+ 	  (any_extend:V4DI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
+ 
+ 
  (define_expand "<insn>v4qiv4di2"
    [(set (match_operand:V4DI 0 "register_operand")
  	(any_extend:V4DI
***************
*** 22714,22720 ****
     (set_attr "prefix" "maybe_evex")
     (set_attr "mode" "OI")])
  
! (define_insn_and_split "*avx2_<code>v4hiv4di2<mask_name>_2"
    [(set (match_operand:V4DI 0 "register_operand")
  	(any_extend:V4DI
  	  (vec_select:V4HI
--- 22876,22882 ----
     (set_attr "prefix" "maybe_evex")
     (set_attr "mode" "OI")])
  
! (define_insn_and_split "*avx2_<code>v4hiv4di2_2"
    [(set (match_operand:V4DI 0 "register_operand")
  	(any_extend:V4DI
  	  (vec_select:V4HI
***************
*** 22724,22730 ****
  		(const_int 0)) 0)
  	    (parallel [(const_int 0) (const_int 1)
  		       (const_int 2) (const_int 3)]))))]
!   "TARGET_AVX2 && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 22886,22892 ----
  		(const_int 0)) 0)
  	    (parallel [(const_int 0) (const_int 1)
  		       (const_int 2) (const_int 3)]))))]
!   "TARGET_AVX2
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22732,22737 ****
--- 22894,22924 ----
  	(any_extend:V4DI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v4hiv4di2_mask_2"
+   [(set (match_operand:V4DI 0 "register_operand")
+ 	(vec_merge:V4DI
+ 	  (any_extend:V4DI
+ 	    (vec_select:V4HI
+ 	      (subreg:V8HI
+ 		(vec_concat:V2DI
+ 		  (match_operand:DI 1 "memory_operand")
+ 		  (const_int 0)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)
+ 		         (const_int 2) (const_int 3)])))
+ 	  (match_operand:V4DI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V4DI
+ 	  (any_extend:V4DI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
+ 
+ 
  (define_expand "<insn>v4hiv4di2"
    [(set (match_operand:V4DI 0 "register_operand")
  	(any_extend:V4DI
***************
*** 22773,22779 ****
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v2hiv2di2<mask_name>_2"
    [(set (match_operand:V2DI 0 "register_operand")
  	(any_extend:V2DI
  	  (vec_select:V2HI
--- 22960,22966 ----
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v2hiv2di2_2"
    [(set (match_operand:V2DI 0 "register_operand")
  	(any_extend:V2DI
  	  (vec_select:V2HI
***************
*** 22786,22792 ****
  		    (const_int 0) (const_int 0)])
  		(const_int 1)) 0)
  	    (parallel [(const_int 0) (const_int 1)]))))]
!   "TARGET_SSE4_1 && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 22973,22979 ----
  		    (const_int 0) (const_int 0)])
  		(const_int 1)) 0)
  	    (parallel [(const_int 0) (const_int 1)]))))]
!   "TARGET_SSE4_1
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22794,22799 ****
--- 22981,23014 ----
  	(any_extend:V2DI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V2HImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v2hiv2di2_mask_2"
+   [(set (match_operand:V2DI 0 "register_operand")
+ 	(vec_merge:V2DI
+ 	  (any_extend:V2DI
+ 	    (vec_select:V2HI
+ 	      (subreg:V8HI
+ 		(vec_merge:V4SI
+ 		  (vec_duplicate:V4SI
+ 		    (match_operand:SI 1 "memory_operand"))
+ 		  (const_vector:V4SI
+ 		    [(const_int 0) (const_int 0)
+ 		     (const_int 0) (const_int 0)])
+ 		  (const_int 1)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)])))
+ 	  (match_operand:V2DI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V2DI
+ 	  (any_extend:V2DI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V2HImode, 0);")
+ 
+ 
  (define_expand "<insn>v2hiv2di2"
    [(set (match_operand:V2DI 0 "register_operand")
  	(any_extend:V2DI
***************
*** 22938,22944 ****
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v2siv2di2<mask_name>_2"
    [(set (match_operand:V2DI 0 "register_operand")
  	(any_extend:V2DI
  	  (vec_select:V2SI
--- 23153,23159 ----
     (set_attr "prefix" "orig,orig,maybe_evex")
     (set_attr "mode" "TI")])
  
! (define_insn_and_split "*sse4_1_<code>v2siv2di2_2"
    [(set (match_operand:V2DI 0 "register_operand")
  	(any_extend:V2DI
  	  (vec_select:V2SI
***************
*** 22947,22953 ****
  		(match_operand:DI 1 "memory_operand")
  		(const_int 0)) 0)
  	    (parallel [(const_int 0) (const_int 1)]))))]
!   "TARGET_SSE4_1 && <mask_avx512vl_condition>
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
--- 23162,23168 ----
  		(match_operand:DI 1 "memory_operand")
  		(const_int 0)) 0)
  	    (parallel [(const_int 0) (const_int 1)]))))]
!   "TARGET_SSE4_1
     && ix86_pre_reload_split ()"
    "#"
    "&& 1"
***************
*** 22955,22960 ****
--- 23170,23198 ----
  	(any_extend:V2DI (match_dup 1)))]
    "operands[1] = adjust_address_nv (operands[1], V2SImode, 0);")
  
+ (define_insn_and_split "*avx512vl_<code>v2siv2di2_mask_2"
+   [(set (match_operand:V2DI 0 "register_operand")
+ 	(vec_merge:V2DI
+ 	  (any_extend:V2DI
+ 	    (vec_select:V2SI
+ 	      (subreg:V4SI
+ 		(vec_concat:V2DI
+ 		  (match_operand:DI 1 "memory_operand")
+ 		  (const_int 0)) 0)
+ 	      (parallel [(const_int 0) (const_int 1)])))
+ 	  (match_operand:V2DI 2 "nonimm_or_0_operand")
+ 	  (match_operand:QI 3 "register_operand")))]
+   "TARGET_AVX512VL
+    && ix86_pre_reload_split ()"
+   "#"
+   "&& 1"
+   [(set (match_dup 0)
+ 	(vec_merge:V2DI
+ 	  (any_extend:V2DI (match_dup 1))
+ 	  (match_dup 2)
+ 	  (match_dup 3)))]
+   "operands[1] = adjust_address_nv (operands[1], V2SImode, 0);")
+ 
  (define_insn_and_split "*sse4_1_zero_extendv2siv2di2_3"
    [(set (match_operand:V4SI 0 "register_operand" "=Yr,*x,v")
  	(vec_select:V4SI
diff -Nrcpad gcc-13-20260129/gcc/d/ChangeLog gcc-13-20260205/gcc/d/ChangeLog
*** gcc-13-20260129/gcc/d/ChangeLog	Thu Jan 29 22:32:07 2026
--- gcc-13-20260205/gcc/d/ChangeLog	Thu Feb  5 22:32:08 2026
***************
*** 1,3 ****
--- 1,43 ----
+ 2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123264
+ 	* types.cc (finish_aggregate_type): Propagate struct TYPE_NAME to all
+ 	TYPE_NEXT_VARIANT types.
+ 
+ 2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123407
+ 	* decl.cc (get_symbol_decl): Handle declarations with matching
+ 	assembler names, but different TREE_CODE.
+ 
+ 2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123046
+ 	* d-codegen.cc (build_address): Return `null' when generating the
+ 	address of a `noreturn' declaration.
+ 	(d_build_call): Compare TYPE_MAIN_VARIANT of type with `noreturn'.
+ 	* decl.cc (get_fndecl_arguments): Likewise.
+ 	* types.cc (finish_aggregate_mode): Likewise.
+ 	(TypeVisitor::visit (TypeFunction *)): Likewise.
+ 
+ 2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123349
+ 	* d-spec.cc (lang_specific_driver): Use xstrdup to copy -defaultlib
+ 	and -debuglib argument, and unconditionally free the old value.
+ 
  2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
  
  	Backported from master:
diff -Nrcpad gcc-13-20260129/gcc/d/types.cc gcc-13-20260205/gcc/d/types.cc
*** gcc-13-20260129/gcc/d/types.cc	Thu Jan 29 22:32:07 2026
--- gcc-13-20260205/gcc/d/types.cc	Thu Feb  5 22:32:08 2026
*************** finish_aggregate_type (unsigned structsi
*** 707,712 ****
--- 707,713 ----
        if (t == type)
  	continue;
  
+       TYPE_NAME (t) = TYPE_NAME (type);
        TYPE_FIELDS (t) = TYPE_FIELDS (type);
        TYPE_LANG_SPECIFIC (t) = TYPE_LANG_SPECIFIC (type);
        TYPE_SIZE (t) = TYPE_SIZE (type);
diff -Nrcpad gcc-13-20260129/gcc/testsuite/ChangeLog gcc-13-20260205/gcc/testsuite/ChangeLog
*** gcc-13-20260129/gcc/testsuite/ChangeLog	Thu Jan 29 22:32:08 2026
--- gcc-13-20260205/gcc/testsuite/ChangeLog	Thu Feb  5 22:32:09 2026
***************
*** 1,3 ****
--- 1,37 ----
+ 2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123264
+ 	* gdc.dg/pr123264.d: New test.
+ 
+ 2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123407
+ 	* gdc.dg/pr123407a.d: New test.
+ 	* gdc.dg/pr123407b.d: New test.
+ 
+ 2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123046
+ 	* gdc.dg/pr123046.d: New test.
+ 
+ 2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	Backported from master:
+ 	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+ 
+ 	PR d/123349
+ 	* gdc.dg/driver_debuglib.d: New test.
+ 	* gdc.dg/driver_defaultlib.d: New test.
+ 
  2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
  
  	Backported from master:
diff -Nrcpad gcc-13-20260129/gcc/testsuite/g++.target/i386/pr123779.C gcc-13-20260205/gcc/testsuite/g++.target/i386/pr123779.C
*** gcc-13-20260129/gcc/testsuite/g++.target/i386/pr123779.C	Thu Jan  1 00:00:00 1970
--- gcc-13-20260205/gcc/testsuite/g++.target/i386/pr123779.C	Thu Feb  5 22:32:12 2026
***************
*** 0 ****
--- 1,56 ----
+ /* PR target/123779 */
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -mavx512vl -mavx512bw" } */
+ 
+ typedef char __v16qi __attribute__((__vector_size__(16)));
+ typedef short __v8hi __attribute__((__vector_size__(16)));
+ typedef int __v4si __attribute__((__vector_size__(16)));
+ typedef long long __v2di __attribute__((__vector_size__(16)));
+ 
+ typedef int __v8si __attribute__((__vector_size__(32)));
+ typedef long long __v4di __attribute__((__vector_size__(32)));
+ typedef long long __v8di __attribute__((__vector_size__(64)));
+ typedef unsigned char __mmask8;
+ 
+ long long g_mem;
+ 
+ #define MAKE_TEST_BLEND(NAME, DEST_T, SRC_INIT_T, PMOV_INPUT_CAST_T, \
+ 			PMOV_FUNC, BLEND_FUNC, BLEND_CAST_T, LOAD_VAL_TYPE, ...) \
+     DEST_T dest_##NAME, mask_src1_##NAME, mask_src2_##NAME, mask_##NAME, res_##NAME; \
+     void test_##NAME() \
+       { \
+         mask_##NAME = mask_src1_##NAME < mask_src2_##NAME; \
+         LOAD_VAL_TYPE val = (LOAD_VAL_TYPE)g_mem; \
+         SRC_INIT_T src_vec = { __VA_ARGS__ }; \
+         DEST_T extended = (DEST_T)PMOV_FUNC ((PMOV_INPUT_CAST_T)src_vec); \
+         res_##NAME = (DEST_T)BLEND_FUNC ( \
+             (BLEND_CAST_T)dest_##NAME, \
+             (BLEND_CAST_T)extended, \
+             (BLEND_CAST_T)mask_##NAME); \
+       }
+ 
+ #define MAKE_TEST_MASK(NAME, DEST_T, SRC_INIT_T, PMOV_INPUT_CAST_T, \
+ 		       PMOV_MASK_FUNC, LOAD_VAL_TYPE, ...) \
+     DEST_T dest_##NAME, res_##NAME; \
+     __mmask8 mask_##NAME; \
+     void test_##NAME() \
+       { \
+ 	LOAD_VAL_TYPE val = (LOAD_VAL_TYPE) g_mem; \
+ 	SRC_INIT_T src_vec = { __VA_ARGS__ }; \
+ 	res_##NAME = PMOV_MASK_FUNC ((PMOV_INPUT_CAST_T)src_vec, \
+ 				     dest_##NAME, \
+ 				     mask_##NAME);\
+       }  
+ 
+ 
+ MAKE_TEST_BLEND(v8qi_v8hi, __v8hi, __v2di, __v16qi, __builtin_ia32_pmovzxbw128, __builtin_ia32_pblendvb128, __v16qi, long long, val, 0)
+ MAKE_TEST_BLEND(v4qi_v4si, __v4si, __v4si, __v16qi, __builtin_ia32_pmovzxbd128, __builtin_ia32_pblendvb128, __v16qi, int, val, 0, 0, 0)
+ MAKE_TEST_BLEND(v4hi_v4si, __v4si, __v2di, __v8hi, __builtin_ia32_pmovzxwd128, __builtin_ia32_pblendvb128, __v16qi, long long, val, 0)
+ MAKE_TEST_BLEND(v2hi_v2di, __v2di, __v4si, __v8hi, __builtin_ia32_pmovzxwq128, __builtin_ia32_pblendvb128, __v16qi, int, val, 0, 0, 0)
+ MAKE_TEST_BLEND(v2si_v2di, __v2di, __v2di, __v4si, __builtin_ia32_pmovzxdq128, __builtin_ia32_pblendvb128, __v16qi, long long, val, 0)
+ 
+ 
+ MAKE_TEST_MASK(v8qi_v8si, __v8si, __v2di, __v16qi, __builtin_ia32_pmovzxbd256_mask, long long, val, 0)
+ MAKE_TEST_MASK(v4qi_v4di, __v4di, __v4si, __v16qi, __builtin_ia32_pmovzxbq256_mask, int, val, 0, 0, 0)
+ MAKE_TEST_MASK(v4hi_v4di, __v4di, __v2di, __v8hi, __builtin_ia32_pmovzxwq256_mask, long long, val, 0)
+ MAKE_TEST_MASK(v8qi_v8di, __v8di, __v2di, __v16qi, __builtin_ia32_pmovzxbq512_mask, long long, val, 0)
diff -Nrcpad gcc-13-20260129/gcc/testsuite/gdc.dg/pr123264.d gcc-13-20260205/gcc/testsuite/gdc.dg/pr123264.d
*** gcc-13-20260129/gcc/testsuite/gdc.dg/pr123264.d	Thu Jan  1 00:00:00 1970
--- gcc-13-20260205/gcc/testsuite/gdc.dg/pr123264.d	Thu Feb  5 22:32:15 2026
***************
*** 0 ****
--- 1,8 ----
+ // { dg-do compile }
+ // { dg-options "-fdump-tree-original" }
+ struct S123264
+ {
+     void infinite(const S123264) { }
+     auto fn = &infinite;
+ }
+ // { dg-final { scan-tree-dump "const struct S123264" "original" } }
