commit d7d5d0ba8e850bafd0a4329d48a3db401c683f37 (HEAD -> gentoo/binutils-2.35.1, gentoo/gentoo/binutils-2.35.1)
Author: GDB Administrator <gdbadmin@sourceware.org>
Date:   Fri Oct 30 00:00:50 2020 +0000

    Automatic date update in version.in
    
    (cherry picked from commit e8aa34cb4049866790cbd18bc7d95140a5e761c1)

 bfd/version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

commit eb2652fcd460490b05ba3c77f40ce64d4f6ae124
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date:   Thu Oct 22 13:42:01 2020 +0100

    arm: Fix the wrong error message string for mve vldr/vstr (PR26763).
    
    For mve vldr/vstr instructions assembler is throwing wrong error message.
    Instead of 'Error: syntax error' assembler fails with 'Error: lo register required'.
    This patch fixes the issue.
    
    eg:
    $ cat x.s
    .syntax unified
    .thumb
    
    vldrb.s16 q0, r0
    
    Before this patch:
    $ arm-none-eabi-as x.s -march=armv8.1-m.main+mve -mfloat-abi=hard
    x.s: Assembler messages:
    x.s:4: Error: lo register required -- `vldrb.s16 q0,r0'
    
    After this patch:
    $ arm-none-eabi-as x.s -march=armv8.1-m.main+mve -mfloat-abi=hard
    x.s: Assembler messages:
    x.s:4: Error: syntax error -- `vldrb.s16 q0,r0'
    
    gas/ChangeLog:
    
    2020-10-21  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
    
            PR target/26763
            * config/tc-arm.c (parse_address_main): Add new MVE addressing mode
            check.
            * testsuite/gas/arm/mve-vldr-vstr-bad.d: New test.
            * testsuite/gas/arm/mve-vldr-vstr-bad.l: Likewise.
            * testsuite/gas/arm/mve-vldr-vstr-bad.s: Likewise.
    
    (cherry picked from commit 83b4a887fce217923a92b5a3c2b939c1629ff7a8)

 gas/ChangeLog                             |   9 +
 gas/config/tc-arm.c                       |  10 +-
 gas/testsuite/gas/arm/mve-vldr-vstr-bad.d |   5 +
 gas/testsuite/gas/arm/mve-vldr-vstr-bad.l | 811 ++++++++++++++++++++++++++++++
 gas/testsuite/gas/arm/mve-vldr-vstr-bad.s |  30 ++
 5 files changed, 864 insertions(+), 1 deletion(-)

commit b9b32b70c9acff1140e361e5dcb9be039c3d4312
Author: GDB Administrator <gdbadmin@sourceware.org>
Date:   Tue Oct 20 00:00:45 2020 +0000

    Automatic date update in version.in
    
    (cherry picked from commit d70052f938853107d75a46b1ab19c79cf3f27369)

 bfd/version.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

commit 38f25876d908376d80c0966e607bb172f40b1add
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Fri Oct 9 15:05:51 2020 +0100

    arm: Add support for Neoverse N2 CPU
    
    This patch backports the AArch32 support for Arm's Neoverse N2 CPU to
    binutils 2.35.
    
    gas/ChangeLog:
    
            * config/tc-arm.c (arm_cpus): Add Neoverse N2.
            * doc/c-arm.texi: Document -mcpu=neoverse-n2.
    
    (cherry picked from commit 72e2c97030c686248df2e8fd6e2eb8bfbdc730f3)

 gas/ChangeLog       | 5 +++++
 gas/config/tc-arm.c | 5 +++++
 gas/doc/c-arm.texi  | 1 +
 3 files changed, 11 insertions(+)

commit 3cbd8f9c0565d407d9682d40e3b948951f4c0547
Author: Alan Modra <amodra@gmail.com>
Date:   Fri Oct 9 16:56:33 2020 +1030

    [GOLD] Power10 segv due to wild r2
    
    Calling non-pcrel functions from pcrel code requires a stub to set up
    r2.  Gold created the stub, but an "optimisation" made the stub jump
    to the function local entry, ie. r2 was not initialised.
    
    This patch fixes that long branch stub problem, and another that might
    occur for plt call stubs to local functions.
    
    bfd/
            * elf64-ppc.c (write_plt_relocs_for_local_syms): Don't do local
            entry offset optimisation.
    gold/
            * powerpc.cc (Powerpc_relobj::do_relocate_sections): Don't do
            local entry offset optimisation for lplt_section.
            (Target_powerpc::Branch_info::make_stub): Don't add local
            entry offset to long branch dest passed to
            add_long_branch_entry.  Do pass st_other bits.
            (Stub_table::Branch_stub_ent): Add "other_" field.
            (Stub_table::add_long_branch_entry): Add "other" param, and
            save.
            (Stub_table::branch_stub_size): Adjust long branch offset.
            (Stub_table::do_write): Likewise.
            (Target_powerpc::Relocate::relocate): Likewise.
    
    (cherry picked from commit fa40fbe484954c560ab1c0ff4bc1b2eeb1511344)
    (cherry picked from commit 43fb3c78d42692620400eb76a6b6aa87b37f7693)

 bfd/ChangeLog   |  5 +++++
 bfd/elf64-ppc.c |  2 --
 gold/ChangeLog  | 14 ++++++++++++++
 gold/powerpc.cc | 47 +++++++++++++++++++++++++++++++----------------
 4 files changed, 50 insertions(+), 18 deletions(-)

commit 09095ac6ed3e8e3a98c4aa741be6b61d35887048
Author: Alan Modra <amodra@gmail.com>
Date:   Fri Oct 9 10:59:33 2020 +1030

    [GOLD] internal error in relocate, at powerpc.cc:10473
    
    GOT relocations can refer directly to a function in a fixed position
    executable, unlike ADDR64 which needs a global entry stub, or branch
    relocs, which need PLT stubs.
    
            * powerpc.cc (is_got_reloc): New function.
            (Target_powerpc::Relocate::relocate): Use it here, exclude GOT
            relocs when looking for stubs.
    
    (cherry picked from commit 4290b0ab2b65db23afc9bd8177885bfd91911c0c)
    (cherry picked from commit caa173b504c6c5d8edbe7c4f48b85664657b319b)

 gold/ChangeLog  |  6 ++++++
 gold/powerpc.cc | 22 +++++++++++++++-------
 2 files changed, 21 insertions(+), 7 deletions(-)

commit 909c99a7aae0a032956e692c8bd0f365123d9fe0
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Fri Oct 9 10:57:01 2020 +0100

    arm: Add support for Neoverse V1 CPU
    
    This patch backports the AArch32 support for Arm's Neoverse V1 CPU to
    binutils 2.35.
    
    gas/ChangeLog:
    
            * config/tc-arm.c (arm_cpus): Add Neoverse V1.
            * doc/c-arm.texi: Document Neoverse V1 support.
    
    (cherry picked from commit 923aeb9c87eefae7fb9602c573b951a134bcee53)

 gas/ChangeLog       | 5 +++++
 gas/config/tc-arm.c | 5 +++++
 gas/doc/c-arm.texi  | 1 +
 3 files changed, 11 insertions(+)

commit 685243143699fe0a13bb40c0ba8a9640100b51c9
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Oct 8 04:54:26 2020 -0700

    gold: Update testsuite/split_[i386|x32|x86_64].sh
    
    Update testsuite/split_i386.sh, testsuite/split_x32.sh and
    testsuite/split_x86_64.sh for
    
    commit f9ff65d4dffbaf342dce7a8760059c27683cd962
    Author: Alan Modra <amodra@gmail.com>
    Date:   Thu Oct 8 10:27:43 2020 +1030
    
        [GOLD] Increase --split-stack-adjust-size
    
            * testsuite/split_i386.sh: Updated for --split-stack-adjust-size
            default change.
            * testsuite/split_x32.sh: Likewise.
            * testsuite/split_x86_64.sh: Likewise.
    
    (cherry picked from commit f511427204f281bc6278bb1facf6493518300806)
    (cherry picked from commit e6a9b6b62f787806b2cb410ffee8b2df31e6f8d8)

 gold/ChangeLog                 | 6 ++++++
 gold/testsuite/split_i386.sh   | 2 +-
 gold/testsuite/split_x32.sh    | 6 +++---
 gold/testsuite/split_x86_64.sh | 6 +++---
 4 files changed, 13 insertions(+), 7 deletions(-)

commit 0520831eb151064506f6cc3fa771278c260932cf
Author: Alan Modra <amodra@gmail.com>
Date:   Thu Oct 8 10:27:43 2020 +1030

    [GOLD] Increase --split-stack-adjust-size
    
    For functions with small (< 256 bytes) stack frames, the current x86
    do_calls_non_split ignores --split-stack-adjust-size and, in
    combination with __morestack_non_split, supplies a non-split-stack
    function with at least 0x100000 (1M) available stack.  On powerpc64, a
    default of 0x4000 is not large enough to reliably work with the golang
    testsuite.  This increase the default size to the defacto x86 value.
    
            * options.h (split_stack_adjust_size): Default to 0x100000.
    
    (cherry picked from commit f9ff65d4dffbaf342dce7a8760059c27683cd962)
    (cherry picked from commit 5cffc4901e1d72da87aa7ff6d22c152726455831)

 gold/ChangeLog | 4 ++++
 gold/options.h | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

commit 564b803906b73c14461884c40d6edff3431a1ee7
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Sat Oct 3 04:23:55 2020 -0700

    x86: Update register operand check for AddrPrefixOpReg
    
    When the address size prefix applies to both the memory and the register
    operand, we need to extract the address size prefix from the register
    operand if the memory operand has no real registers, like symbol, DISP
    or symbol(%rip).
    
    NB: GCC always generates symbol(%rip) for RIP-relative addressing for
    both x32 and x86-64.
    
    Move the .code16 tests in movdir.s to movdir-16bit to show the correct
    output from objdump.
    
    gas/
    
            PR gas/26685
            * config/tc-i386.c (process_suffix): Also check the register
            operand for the address size prefix if the memory operand has
            no real registers.
            * testsuite/gas/i386/enqcmd-16bit.d: New file.
            * testsuite/gas/i386/enqcmd-16bit.s: Likewise.
            * testsuite/gas/i386/movdir-16bit.d: Likewise.
            * testsuite/gas/i386/movdir-16bit.s: Likewise.
            * testsuite/gas/i386/enqcmd.s: Add tests with symbol and DISP.
            * testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
            * testsuite/gas/i386/x86-64-movdir.s: Likewise.
            * testsuite/gas/i386/movdir.s: Add tests with symbol and DISP.
            Remove the .code16 test.
            * testsuite/gas/i386/i386.exp: Run movdir-16bit and enqcmd-16bit.
            * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
            * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
            * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
            * testsuite/gas/i386/x86-64-movdir.d: Likewise.
            * testsuite/gas/i386/enqcmd-intel.d: Likewise.
            * testsuite/gas/i386/enqcmd.d: Likewise.
            * testsuite/gas/i386/movdir-intel.d: Likewise.
            * testsuite/gas/i386/movdir.d: Likewise.
            * testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
            * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
            * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
            * testsuite/gas/i386/x86-64-movdir.d: Likewise.
    
    opcodes/
    
            PR gas/26685
            * i386-dis.c (mod_table): Replace Gv with Gdq on movdiri.
    
    (cherry picked from commit b3a3496f83a14ad226790725c8e3ed9777fe2899)
    (cherry picked from commit be5ff8fe6dc4bd39caf9073f1a40816513f46a65)

 gas/ChangeLog                                | 29 ++++++++++++++++++++++++++++
 gas/config/tc-i386.c                         | 14 +++++++++-----
 gas/testsuite/gas/i386/enqcmd-16bit.d        | 21 ++++++++++++++++++++
 gas/testsuite/gas/i386/enqcmd-16bit.s        |  4 ++++
 gas/testsuite/gas/i386/enqcmd-intel.d        | 26 ++++++++++++++++---------
 gas/testsuite/gas/i386/enqcmd.d              | 26 ++++++++++++++++---------
 gas/testsuite/gas/i386/enqcmd.s              |  8 ++++++++
 gas/testsuite/gas/i386/i386.exp              |  2 ++
 gas/testsuite/gas/i386/movdir-16bit.d        | 21 ++++++++++++++++++++
 gas/testsuite/gas/i386/movdir-16bit.s        |  4 ++++
 gas/testsuite/gas/i386/movdir-intel.d        | 27 ++++++++++++--------------
 gas/testsuite/gas/i386/movdir.d              | 27 ++++++++++++--------------
 gas/testsuite/gas/i386/movdir.s              | 11 ++++-------
 gas/testsuite/gas/i386/x86-64-enqcmd-intel.d |  8 ++++++++
 gas/testsuite/gas/i386/x86-64-enqcmd.d       |  8 ++++++++
 gas/testsuite/gas/i386/x86-64-enqcmd.s       |  8 ++++++++
 gas/testsuite/gas/i386/x86-64-movdir-intel.d |  4 ++++
 gas/testsuite/gas/i386/x86-64-movdir.d       |  4 ++++
 gas/testsuite/gas/i386/x86-64-movdir.s       |  4 ++++
 opcodes/ChangeLog                            |  5 +++++
 opcodes/i386-dis.c                           |  2 +-
 21 files changed, 202 insertions(+), 61 deletions(-)

commit 78851570325531ae38b4438058261363c34a08f2
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Sep 30 16:33:35 2020 -0700

    x86: Check register operand for AddrPrefixOpReg
    
    If the address prefix changes the register operand, we need to check the
    register operand when the memory operand is RIP-relative.
    
            PR gas/26685
            * config/tc-i386.c (process_suffix): Check the register operand
            for the address size prefix if the memory operand is symbol(%rip).
            * testsuite/gas/i386/x86-64-enqcmd.s: Add tests with RIP-relative
            addressing.
            * testsuite/gas/i386/x86-64-movdir.s: Likewise.
            * testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
            * testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
            * testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
            * testsuite/gas/i386/x86-64-movdir.d: Likewise.
    
    (cherry picked from commit 27f134698ac529f3050f5ddbd31a0ab0bbe5be99)
    (cherry picked from commit 3879a8a82d0c02d0322daa32523523cc42c26ca3)

 gas/ChangeLog                                | 13 +++++++++++++
 gas/config/tc-i386.c                         | 13 +++++++++++++
 gas/testsuite/gas/i386/x86-64-enqcmd-intel.d | 28 ++++++++++++++++++++--------
 gas/testsuite/gas/i386/x86-64-enqcmd.d       | 28 ++++++++++++++++++++--------
 gas/testsuite/gas/i386/x86-64-enqcmd.s       | 12 ++++++++++++
 gas/testsuite/gas/i386/x86-64-movdir-intel.d | 24 +++++++++++++++---------
 gas/testsuite/gas/i386/x86-64-movdir.d       | 24 +++++++++++++++---------
 gas/testsuite/gas/i386/x86-64-movdir.s       |  6 ++++++
 8 files changed, 114 insertions(+), 34 deletions(-)

commit 57dea4907bf8b48fd9da6faf61f464c67d446c66
Author: Jan Beulich <jbeulich@suse.com>
Date:   Tue Jul 21 14:20:11 2020 +0200

    Revert "x86: Don't display eiz with no scale"
    
    This reverts commit 04c662e2b66bedd050f97adec19afe0fcfce9ea7.
    In my underlying suggestion I neglected the fact that in those
    cases (,%eiz,1) is the only visible indication that 32-bit
    addressing is in effect.
    
    (cherry picked from commit bf4ba07ca61793a1faf81c0447ba97fdc6639b50)
    (cherry picked from commit 95f2e4249640dca770715e3ff33d18129bea7e32)

 gas/ChangeLog                                |  7 +++++++
 gas/testsuite/gas/i386/evex-no-scale-64.d    |  2 +-
 gas/testsuite/gas/i386/x86-64-addr32-intel.d | 12 ++++++------
 gas/testsuite/gas/i386/x86-64-addr32.d       | 12 ++++++------
 opcodes/ChangeLog                            |  4 ++++
 opcodes/i386-dis.c                           |  2 +-
 6 files changed, 25 insertions(+), 14 deletions(-)

commit 46c65e151b0aa4d3c3de21cb2811d6bb08cb61d9
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Oct 6 15:51:33 2020 -0700

    x86: Update GNU property tests
    
    Update property tests for glibc compiled by Fedora binary annotation
    plugin for GCC, which may insert additonal GNU properties:
    
            x86 ISA needed: SSE, SSE2
    
            * testsuite/ld-i386/property-3.r: Updated for Fedora binary
            annotation plugin for GCC.
            * testsuite/ld-i386/property-4.r: Likewise.
            * testsuite/ld-i386/property-5.r: Likewise.
            * testsuite/ld-x86-64/property-3.r: Likewise.
            * testsuite/ld-x86-64/property-4.r: Likewise.
            * testsuite/ld-x86-64/property-5.r: Likewise.
    
    (cherry picked from commit f95f5adb9a50a27639a811c540c008e776aee46d)
    (cherry picked from commit b189feab422f695b3dfb0d017b4ec8d32002499b)

 ld/ChangeLog                        | 10 ++++++++++
 ld/testsuite/ld-i386/property-3.r   |  1 +
 ld/testsuite/ld-i386/property-4.r   |  1 +
 ld/testsuite/ld-i386/property-5.r   |  1 +
 ld/testsuite/ld-x86-64/property-3.r |  1 +
 ld/testsuite/ld-x86-64/property-4.r |  1 +
 ld/testsuite/ld-x86-64/property-5.r |  1 +
 7 files changed, 16 insertions(+)

commit 79fa86ed0c1f1fc6a70206ccf2da875ad6a87fc1
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Oct 6 15:38:23 2020 -0700

    x86: Properly merge -z ibt and -z shstk
    
    Merge -z ibt and -z shstk only with GNU_PROPERTY_X86_FEATURE_1_AND, not
    any GNU_PROPERTY_X86_UINT32_AND_XXX properties.
    
    bfd/
    
            PR ld/26711
            * elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Merge -z ibt
            and -z shstk only with GNU_PROPERTY_X86_FEATURE_1_AND.
    
    ld/
    
            PR ld/26711
            * testsuite/ld-i386/i386.exp: Run ld/26711 tests.
            * testsuite/ld-x86-64/x86-64.exp: Likewise.
            * testsuite/ld-i386/pr26711-1.d: Likewise.
            * testsuite/ld-i386/pr26711-2.d: Likewise.
            * testsuite/ld-i386/pr26711-3.d: Likewise.
            * testsuite/ld-x86-64/pr26711-1-x32.d: Likewise.
            * testsuite/ld-x86-64/pr26711-1.d: Likewise.
            * testsuite/ld-x86-64/pr26711-2-x32.d: Likewise.
            * testsuite/ld-x86-64/pr26711-2.d: Likewise.
            * testsuite/ld-x86-64/pr26711-3-x32.d: Likewise.
            * testsuite/ld-x86-64/pr26711-3.d: Likewise.
            * testsuite/ld-x86-64/pr26711.s: Likewise.
    
    (cherry picked from commit 574df58f5295ef2728526e6a73b5f429b05f2a8c)
    (cherry picked from commit 691e341c06659f7161c5b08d092039efe6eae209)

 bfd/ChangeLog                          |  6 ++++++
 bfd/elfxx-x86.c                        | 31 +++++++++++++++++++------------
 ld/ChangeLog                           | 16 ++++++++++++++++
 ld/testsuite/ld-i386/i386.exp          |  3 +++
 ld/testsuite/ld-i386/pr26711-1.d       | 10 ++++++++++
 ld/testsuite/ld-i386/pr26711-2.d       | 10 ++++++++++
 ld/testsuite/ld-i386/pr26711-3.d       | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711-1-x32.d | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711-1.d     | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711-2-x32.d | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711-2.d     | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711-3-x32.d | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711-3.d     | 10 ++++++++++
 ld/testsuite/ld-x86-64/pr26711.s       | 33 +++++++++++++++++++++++++++++++++
 ld/testsuite/ld-x86-64/x86-64.exp      |  6 ++++++
 15 files changed, 173 insertions(+), 12 deletions(-)

commit d4626319f471ced17d61d26a5ea22da2197e3e4e
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Tue Oct 6 15:56:44 2020 +0100

    aarch64: Fix bogus type punning in parse_barrier() [PR26699]
    
    This patch fixes a bogus use of type punning in parse_barrier() which
    was causing an assembly failure on big endian LP64 hosts when attempting
    to assemble "isb sy" for AArch64.
    
    The type of the entries in aarch64_barrier_opt_hsh is
    aarch64_name_value_pair. We were incorrectly casting this to the
    locally-defined asm_barrier_opt which has a wider type (on LP64) for the
    second member. This happened to work on little-endian hosts but fails on
    LP64 big endian.
    
    The fix is to use the correct type in parse_barrier(). This makes the
    locally-defined asm_barrier_opt redundant, so remove it.
    
    gas/ChangeLog:
    
            PR 26699
            * config/tc-aarch64.c (asm_barrier_opt): Delete.
            (parse_barrier): Fix bogus type punning.
            * testsuite/gas/aarch64/system.d: Update disassembly.
            * testsuite/gas/aarch64/system.s: Add isb sy test.
    
    (cherry picked from commit 05cfb0d8cc9b7f8676f5ae55a93642f091d5405f)
    (cherry picked from commit def9db5cb2a3e87ceada962a3269367b08dc4846)

 gas/ChangeLog                      | 8 ++++++++
 gas/config/tc-aarch64.c            | 8 +-------
 gas/testsuite/gas/aarch64/system.d | 1 +
 gas/testsuite/gas/aarch64/system.s | 1 +
 4 files changed, 11 insertions(+), 7 deletions(-)

commit a2e37e337be29af020aa3ecd770d2f3ab023efb5
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Fri Oct 2 15:04:29 2020 +0100

    aarch64: Add support for Neoverse V1 CPU
    
    This backports the AArch64 support for Arm's Neoverse V1 CPU to binutils
    2.35.
    
    gas/ChangeLog:
    
            * config/tc-aarch64.c (aarch64_cpus): Add Neoverse V1.
            * doc/c-aarch64.texi: Document Neoverse V1 support.
    
    (cherry picked from commit bb671bac84078bf01b681e22b7301914955057dd)

 gas/ChangeLog           | 5 +++++
 gas/config/tc-aarch64.c | 9 +++++++++
 gas/doc/c-aarch64.texi  | 1 +
 3 files changed, 15 insertions(+)

commit 1fe59adeca534eae79ccde8e8c63f533cc898bea
Author: Alan Modra <amodra@gmail.com>
Date:   Mon Sep 28 09:30:19 2020 +0930

    Re: PR26656, power10 libstdc++.so segfault in __cxxabiv1::__cxa_throw
    
    Some missing NULL checks meant a stub for a local symbol used a stub
    looking like the __tls_get_addr_opt stub.
    
            PR 26656
            * elf64-ppc.c (ppc_build_one_stub, ppc_size_one_stub): Check for
            NULL stub_entry->h before calling is_tls_get_addr.
    
    (cherry picked from commit 12cf8b93da0ae155643d262235486fde5af72a80)
    (cherry picked from commit 39f2c1f7b80a30297e93f04c885b444e5a874372)

 bfd/ChangeLog   | 6 ++++++
 bfd/elf64-ppc.c | 5 ++++-
 2 files changed, 10 insertions(+), 1 deletion(-)

commit 21f58c210d6a3f8b051d586662ae19ffcdf82efb
Author: Alan Modra <amodra@gmail.com>
Date:   Sat Sep 26 20:34:55 2020 +0930

    [GOLD] PPC64_OPT_LOCALENTRY is incompatible with tail calls
    
    Gold version of commit 3cd7c7d7ef.
    
            * powerpc.cc (Target_powerpc): Rename power10_stubs_ to
            power10_relocs_.
            (Target_powerpc::set_power10_relocs): New accessor.
            (Target_powerpc::set_power10_stubs): Delete.
            (Target_powerpc::power10_stubs): Adjust.
            (Target_powerpc::has_localentry0): New accessor.
            (ld_0_11): New constant.
            (glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
            (glink_eh_frame_fde_64v2_localentry0): New.
            (Output_data_glink::pltresolve_size): Update.
            (Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
            (Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
            and only emit for has_localentry0.  Don't use r2 in the stub.
            (Target_powerpc::Scan::local, global): Adjust for
            set_power10_relocs renaming.
            (Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
    
    (cherry picked from commit 63e5eea234c2bd2c7ce7dc921c71b22bc4fd0d6b)
    (cherry picked from commit 9ac6946e2514e5ec1bb51d1afe9f127807e21067)

 gold/ChangeLog  | 19 +++++++++++++
 gold/powerpc.cc | 82 +++++++++++++++++++++++++++++++++++++++++++--------------
 2 files changed, 81 insertions(+), 20 deletions(-)

commit 9c0a995fd8c9e681836a9fdb000fd23170e50bc3
Author: Alan Modra <amodra@gmail.com>
Date:   Sat Sep 26 15:10:09 2020 +0930

    PPC64_OPT_LOCALENTRY is incompatible with tail calls
    
    The save of r2 in __glink_PLTresolve is the culprit.  Remove it,
    unless we know we need it for --plt-localentry.  --plt-localentry
    should not be used with power10 pc-relative code that makes tail
    calls.
    
    The patch also removes use of r2 as a scratch reg in the ELFv2
    __glink_PLTresolve.  Using r2 isn't a problem, this is just reducing
    the number of scratch regs.
    
    bfd/
            * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
            (LD_R0_0R11, ADD_R11_R0_R11): Define.
            (ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
            code detected.
            (ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
            (ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
            and only emit for has_plt_localentry0.  Don't use r2 in the stub.
    ld/
            * testsuite/ld-powerpc/elfv2so.d,
            * testsuite/ld-powerpc/notoc2.d,
            * testsuite/ld-powerpc/tlsdesc.wf,
            * testsuite/ld-powerpc/tlsdesc2.d,
            * testsuite/ld-powerpc/tlsdesc2.wf,
            * testsuite/ld-powerpc/tlsopt5.d,
            * testsuite/ld-powerpc/tlsopt5.wf,
            * testsuite/ld-powerpc/tlsopt6.d,
            * testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
    
    (cherry picked from commit 3cd7c7d7ef38ec5dc0a0c137c47d9ad0fc9e2e5f)
    (cherry picked from commit eec51831f13bbbb57f34def5734bc7b1aedd6675)

 bfd/ChangeLog                       | 10 +++++
 bfd/elf64-ppc.c                     | 84 ++++++++++++++++++++++++++++++-------
 ld/ChangeLog                        | 12 ++++++
 ld/testsuite/ld-powerpc/elfv2so.d   | 17 ++++----
 ld/testsuite/ld-powerpc/notoc2.d    |  4 +-
 ld/testsuite/ld-powerpc/tlsdesc.wf  |  4 +-
 ld/testsuite/ld-powerpc/tlsdesc2.d  |  9 ++--
 ld/testsuite/ld-powerpc/tlsdesc2.wf |  6 +--
 ld/testsuite/ld-powerpc/tlsopt5.d   | 11 +++--
 ld/testsuite/ld-powerpc/tlsopt5.wf  |  4 +-
 ld/testsuite/ld-powerpc/tlsopt6.d   | 11 +++--
 ld/testsuite/ld-powerpc/tlsopt6.wf  |  4 +-
 12 files changed, 124 insertions(+), 52 deletions(-)

commit 6afbe387ab5b7f8f56e9d2c69b2097d6900bc044
Author: Nick Clifton <nickc@redhat.com>
Date:   Thu Sep 24 13:42:04 2020 +0100

    Import patch from mainline to fix decoding DWARF information in the BFD library.
    
            PR 26520
            * dwarf2.c (scan_unit_for_symbols): Add member entries to the
            variable table.
    
    (cherry picked from commit 269d40a2ef3b020b5beb3f3de5b8e909c43ab53b)

 bfd/ChangeLog | 9 +++++++++
 bfd/dwarf2.c  | 5 +++--
 2 files changed, 12 insertions(+), 2 deletions(-)

commit 03c0c3389bac50f35136b0ec5f314549943d828a
Author: Alan Modra <amodra@gmail.com>
Date:   Wed Sep 23 22:54:01 2020 +0930

    [GOLD] PowerPC64 __tls_get_addr_opt stub
    
    This stub doesn't have the r2 store at the beginning.
    
            * powerpc.cc (Target_powerpc::Relocate::relocate): Don't skip
            first insn of __tls_get_addr_opt stub.
    
    (cherry picked from commit a993d270f8423a8b6faa2ce9d245073bed076bb0)
    (cherry picked from commit dc9f426801780e98f6bb81e74d5bb10b663260ac)

 gold/ChangeLog  |  5 +++++
 gold/powerpc.cc | 31 +++++++++++++++++--------------
 2 files changed, 22 insertions(+), 14 deletions(-)

commit 94af1522a4265406f1a7f8e69eac15944bc3c859
Author: Alan Modra <amodra@gmail.com>
Date:   Thu Jul 23 10:35:56 2020 +0930

    [GOLD] Power10 stub selection
    
    gold version of commit e10a07b32dc1.
    
            * options.h (DEFINE_enum): Add optional_arg__ param, adjust
            all uses.
            (General_options): Add --power10-stubs and --no-power10-stubs.
            * options.cc (General_options::finalize): Handle --power10-stubs.
            * powerpc.cc (set_power10_stubs): Don't set when --power10-stubs=no.
            (power10_stubs_auto): New.
            (struct Plt_stub_ent): Add toc_ and tocoff_.  Don't use a bitfield
            for indx_.
            (struct Branch_stub_ent): Add toc_and tocoff_.  Use bitfields for
            iter_, notoc_ and save_res_.
            (add_plt_call_entry): Set toc_.  Adjust resizing conditions for
            --power10-stubs=auto.
            (add_long_branch_entry): Set toc_.
            (add_eh_frame, define_stub_syms): No longer use const_iterators
            for plt and long branch stub iteration.
            (build_tls_opt_head, build_tls_opt_tail): Change parameters and
            return value.  Move tests for __tls_get_addr to callers.
            (plt_call_size): Handle --power10-stubs=auto.
            (branch_stub_size): Likewise.
            (Stub_table::do_write): Likewise.
            (relocate): Likewise.
    
    (cherry picked from commit afd2ea23626c43886ab8b028b68b7b663d6de3c6)
    (cherry picked from commit 55ae73eaa02c4268e5fdf9e4cf1f154ea3689879)

 gold/ChangeLog  |  27 +++
 gold/options.cc |  29 +++
 gold/options.h  |  48 +++-
 gold/powerpc.cc | 682 +++++++++++++++++++++++++++++++++++++-------------------
 4 files changed, 551 insertions(+), 235 deletions(-)

commit 740812b420bf50e370613ca184155f1a18407666
Author: Alan Modra <amodra@gmail.com>
Date:   Tue Sep 22 22:51:42 2020 +0930

    PR26656, power10 libstdc++.so segfault in __cxxabiv1::__cxa_throw
    
    This adds missing support for a power10 version of the __tls_get_addr
    call stub implementing DT_PPC64_OPT PPC64_OPT_TLS.  Without this,
    power10 code using __tls_get_addr fails miserably at runtime unless
    the --no-tls-get-addr-optimize option is given.
    
            PR 26656
            * elf64-ppc.c (plt_stub_size): Add "odd" param.  Use it with
            size_power10_offset rather than calculating from start of stub.
            Add size for notoc tls_get_addr_opt stub.
            (plt_stub_pad): Add "odd" param, pass to plt_stub_size.
            (build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
            (build_tls_get_addr_stub): Delete.
            (ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
            Emit notoc tls_get_addr_opt stub.  Move eh_frame code to
            suit.  Adjust code to use bfd_tls_get_addr_head/tail in place
            of build_tls_get_addr_stub.
            (ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
            Adjust plt_stub_size and plt_stub_pad calls.  Correct "odd"
            when padding stub.  Size eh_frame for notoc stub too.
            Correct lr_restore value.
            (ppc64_elf_relocate_section): Don't skip over first insn of
            notoc tls_get_addr_opt stub.
    
    (cherry picked from commit 294338867c268b6da43327b6cbe70e746bff1a04)
    (cherry picked from commit 6f9a6c28850f6839ff61af22c277b2abbf7895da)

 bfd/ChangeLog   |  20 +++
 bfd/elf64-ppc.c | 424 ++++++++++++++++++++++++++++++++------------------------
 2 files changed, 259 insertions(+), 185 deletions(-)

commit 148e884b18fa9c11d5505cf6c6755688c9922cf8
Author: Alan Modra <amodra@gmail.com>
Date:   Wed Sep 23 14:55:39 2020 +0930

    PR26655, Power10 libstdc++.so R_PPC64_NONE dynamic relocs
    
    Some of the powerpc64 code editing functions are better run after
    dynamic symbols have stabilised in order to make proper decisions
    based on SYMBOL_REFERENCES_LOCAL.  The dynamic symbols are processed
    early in bfd_elf_size_dynamic_sections, before the backend
    always_size_sections function is called.
    
    One function, ppc64_elf_tls_setup must run before
    bfd_elf_size_dynamic_sections because it changes dynamic symbols.
    ppc64_elf_edit_opd and ppc64_elf_inline_plt can run early or late, I
    think.  ppc64_elf_tls_optimize and ppc64_elf_edit_toc are better run
    later.
    
    So this patch arranges to call some edit functions later via
    always_size_sections.
    
            PR 26655
    bfd/
            * elf64-ppc.c (ppc64_elf_func_desc_adjust): Rename to..
            (ppc64_elf_edit): Call params->edit.
            (ppc64_elf_tls_setup): Don't call _bfd_elf_tls_setup.  Return a
            bfd_boolean.
            * elf64-ppc.h (struct ppc64_elf_params): Add "edit".
            (ppc64_elf_tls_setup): Update declaration.
    ld/
            * emultempl/ppc64elf.em (params): Add ppc_edit.
            (ppc_before_allocation): Split off some edit functions to..
            (ppc_edit): ..this, new function.
    
    (cherry picked from commit c94053440e29421dd8846530da73f09c9ede2e0f)
    (cherry picked from commit 97c22b122492ab3d2d1fd6237cadc56296ce76d2)

 bfd/ChangeLog            | 10 ++++++++++
 bfd/elf64-ppc.c          | 27 ++++++++++++++++-----------
 bfd/elf64-ppc.h          |  3 ++-
 ld/ChangeLog             |  7 +++++++
 ld/emultempl/ppc64elf.em | 18 +++++++++++++++---
 5 files changed, 50 insertions(+), 15 deletions(-)

commit 904b07ff41d01eb9ac721fa7c6d0b8b5b23cf077
Author: Alan Modra <amodra@gmail.com>
Date:   Wed Aug 19 08:47:35 2020 +0930

    Correct vcmpsq, vcmpuq and xvtlsbb BF field
    
    These shouldn't be optional.  The record form of vector instructions
    set CR6, giving an expectation that omitting BF should be the same as
    specifying CR6.
    
    opcodes/
            * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
            vcmpuq and xvtlsbb.
    gas/
            * testsuite/gas/ppc/int128.s: Correct vcmpuq.
            * testsuite/gas/ppc/int128.d: Update.
            * testsuite/gas/ppc/xvtlsbb.d: Update.
    
    (cherry picked from commit 18a8a00ebe3159b65798c6132cb5f93ff4ef6c17)
    (cherry picked from commit 172234e1fab477ba36ec292913b1f13ef6b94783)

 gas/ChangeLog                   | 5 +++++
 gas/testsuite/gas/ppc/int128.d  | 2 +-
 gas/testsuite/gas/ppc/int128.s  | 2 +-
 gas/testsuite/gas/ppc/xvtlsbb.d | 2 +-
 opcodes/ChangeLog               | 4 ++++
 opcodes/ppc-opc.c               | 6 +++---
 6 files changed, 15 insertions(+), 6 deletions(-)

commit 15d17a30f96b05c54d9b25ec77034d7b6516fa4b
Author: Alan Modra <amodra@gmail.com>
Date:   Wed Aug 12 23:31:28 2020 +0930

    PowerPC64 --no-pcrel-optimize
    
    This new option effectively ignores R_PPC64_PCREL_OPT, disabling the
    optimization of instructions marked by that relocation.  The patch
    also disables GOT indirect to GOT/TOC pointer relative code editing
    when --no-toc-optimize.
    
    bfd/
            * elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt.
            * elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc
            optimizations when --no-toc-optimize.  Disable R_PPC64_PCREL_OPT
            optimization when --no-pcrel-optimize.
    ld/
            * emultempl/ppc64elf.em (params): Init new field.
            (enum ppc64_opt): Add OPTION_NO_PCREL_OPT.
            (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS),
            (PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize.
    
    (cherry picked from commit 6738c8a7c93cd77a0caa720c6cc21c422561be2c)
    (cherry picked from commit c39dc246d44f9bc6e29bb4b2a0d692d27a0e913a)

 bfd/ChangeLog            |   9 ++++
 bfd/elf64-ppc.c          | 116 +++++++++++++++++++++++------------------------
 bfd/elf64-ppc.h          |   3 ++
 ld/ChangeLog             |   9 ++++
 ld/emultempl/ppc64elf.em |  12 ++++-
 5 files changed, 90 insertions(+), 59 deletions(-)

commit 98e3adb348988b04d43e5dc14a68038a8ab674d1
Author: Alan Modra <amodra@gmail.com>
Date:   Mon Aug 10 21:41:36 2020 +0930

    Implement missing powerpc mtspr and mfspr extended insns
    
            * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
            instructions.
    
    (cherry picked from commit 3eb651743e06fb360687a26be87bc6b710fc7066)
    (cherry picked from commit 9030004379d4db633dc84a09f3b45ae0d6caed77)

 opcodes/ChangeLog |   4 ++
 opcodes/ppc-opc.c | 162 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 160 insertions(+), 6 deletions(-)

commit 9684f916dc5b485a2e6a73914cd34ea7abe01b9e
Author: Alan Modra <amodra@gmail.com>
Date:   Mon Aug 10 15:08:27 2020 +0930

    Implement missing powerpc extended mnemonics
    
    gas/
            * testsuite/gas/ppc/power8.d,
            * testsuite/gas/ppc/power8.s: Add miso.
            * testsuite/gas/ppc/power9.d,
            * testsuite/gas/ppc/power8.s: Add exser, msgsndu, msgclru.
    opcodes/
            * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
            Enable icbt for power5, miso for power8.
    
    (cherry picked from commit 8b2742a1567273f2ecc9fe6d7df1c9287865f5b6)
    (cherry picked from commit f26bb6247b27f9fb81728132949e03f221d1abc4)

 gas/ChangeLog                  |  6 ++++++
 gas/testsuite/gas/ppc/power8.d |  2 ++
 gas/testsuite/gas/ppc/power8.s |  2 ++
 gas/testsuite/gas/ppc/power9.d |  4 ++++
 gas/testsuite/gas/ppc/power9.s |  4 ++++
 opcodes/ChangeLog              |  4 ++++
 opcodes/ppc-opc.c              | 18 +++++++++++-------
 7 files changed, 33 insertions(+), 7 deletions(-)

commit a131baffb5985df8cdee5334aa85e129b34aaf23
Author: Alan Modra <amodra@gmail.com>
Date:   Mon Aug 10 15:07:33 2020 +0930

    Prioritise mtfprd and mtvrd over mtvsrd in PowerPC disassembly
    
    gas/
            * testsuite/gas/ppc/power8.d: Update.
            * testsuite/gas/ppc/vsx2.d: Update.
    opcodes/
            * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
            mtvsrd, and similarly for mfvsrd.
    
    (cherry picked from commit 5fbec329ec3b21fab7e06cd1e4bf7068332a876c)
    (cherry picked from commit 904570fe6c56165183b07da6a3625538f56b0ccc)

 gas/ChangeLog                  |   4 +
 gas/testsuite/gas/ppc/power8.d | 290 ++++++++++++++++++++---------------------
 gas/testsuite/gas/ppc/vsx2.d   | 110 ++++++++--------
 opcodes/ChangeLog              |   7 +
 opcodes/ppc-opc.c              |   4 +-
 5 files changed, 213 insertions(+), 202 deletions(-)

commit c3c6c3a90cf0b800dd55a9b3d0f94d4a5caa5a22
Author: Alan Modra <amodra@gmail.com>
Date:   Mon Aug 10 15:06:43 2020 +0930

    Error on lmw, lswi and related PowerPC insns when LE
    
            * config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx,
            stswi, or stswx in little-endian mode.
            * testsuite/gas/ppc/476.d,
            * testsuite/gas/ppc/476.s: Delete lmw, stmw, lswi, lswx, stswi, stswx.
            * testsuite/gas/ppc/a2.d,
            * testsuite/gas/ppc/a2.s: Move lmw, stmw, lswi, lswx, stswi, stswx..
            * testsuite/gas/ppc/be.d,
            * testsuite/gas/ppc/be.s: ..to here, new big-endian only test.
            * testsuite/gas/ppc/le_error.d,
            * testsuite/gas/ppc/le_error.l: New little-endian test.
            * testsuite/gas/ppc/ppc.exp: Run new tests.
    
    (cherry picked from commit 86c0f617ac5f3a5f4aab76c7f90255254ca27576)
    (cherry picked from commit 08ec0947d2601e799c9ad1ac5d7cba3d67893e55)

 gas/ChangeLog                    |   16 +
 gas/config/tc-ppc.c              |    9 +
 gas/testsuite/gas/ppc/476.d      |  970 ++++++++++++++++----------------
 gas/testsuite/gas/ppc/476.s      |    6 -
 gas/testsuite/gas/ppc/a2.d       | 1138 +++++++++++++++++++-------------------
 gas/testsuite/gas/ppc/a2.s       |    8 -
 gas/testsuite/gas/ppc/be.d       |   17 +
 gas/testsuite/gas/ppc/be.s       |   10 +
 gas/testsuite/gas/ppc/le_error.d |    3 +
 gas/testsuite/gas/ppc/le_error.l |    9 +
 gas/testsuite/gas/ppc/ppc.exp    |    2 +
 11 files changed, 1113 insertions(+), 1075 deletions(-)

commit a0131ba6b558947b8de2ef0e4020912557c54989
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Sep 30 05:23:20 2020 -0700

    ld: Override the IR definition for non-ELF targets
    
    For non-ELF targets, override the IR definition before all LTO symbols
    have been read.
    
            PR ld/26675
            * plugin.c (plugin_notice): Override the IR definition before
            all LTO symbols have been read for non-ELF targets.
    
    (cherry picked from commit 04e433a8571e727108b8f1b9a04ba5c7ab20112c)

 ld/ChangeLog | 6 ++++++
 ld/plugin.c  | 6 ++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

commit 7929c5e893888795e7e8d527975613aa8e3b4909 (tag: gentoo/binutils-2.35.1-1)
Author: Nick Clifton <nickc@redhat.com>
Date:   Sat Sep 19 11:47:04 2020 +0100

    Reset development back to true
    
    (cherry picked from commit 03639edb0587c3cdefe5a5560d525d05766a2837)

 bfd/ChangeLog      | 4 ++++
 bfd/development.sh | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

commit 178d044e7d6329b928b8b157f06423db7da249be
Author: Andreas K. Hüttel <dilfridge@gentoo.org>
Date:   Wed Oct 18 00:44:49 2017 +0200

    Gentoo: Pass --hash-style=sysv to ld in the testsuite

 binutils/testsuite/lib/binutils-common.exp |  2 +-
 ld/testsuite/lib/ld-lib.exp                | 16 ++++++++++++++--
 2 files changed, 15 insertions(+), 3 deletions(-)

commit 5c17d15c3819a26ce2c648909b57c279cbf58459
Author: Andreas K. Hüttel <dilfridge@gentoo.org>
Date:   Sun Oct 13 05:25:28 2019 +0200

    Gentoo: ld: enable new dtags by default for linux/gnu targets
    
    Original author: Mike Frysinger <vapier@gentoo.org>
    
    The "new" dtags options have been around for 14+ years now, so for Linux
    and GNU targets, enable them by default.
    
    2012-01-21  Mike Frysinger  <vapier@gentoo.org>
    
            * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
            link_info.new_dtags to TRUE for linux/gnu targets.
            * NEWS: Mention new dtags default.
    
    2013-01-22  Roland McGrath  <mcgrathr@google.com>
    
            * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
            new_dtags to TRUE for *-*-nacl* targets.

 ld/emultempl/elf.em | 10 ++++++++++
 1 file changed, 10 insertions(+)

commit 4e07ee2dcd7d310c32b686e315bae12de0e0629d
Author: Sergei Trofimovich <slyfox@gentoo.org>
Date:   Wed Sep 12 23:44:29 2018 +0100

    Gentoo: add --with-extra-soversion-suffix= option
    
    --with-extra-soversion-suffix= will allow Gentoo to
    distinct libbfd.so and libopcodes.so to have more precise
    SONAME.
    
    Today --enable-targets=all and --enable-64-bit-bfd change
    libbfd.so ABI:
    --enable-targets=all adds new symbols to the library
    --enable-64-bit-bfd modifies BFD_ARCH_SIZE default and
    changes sizes of integer parameters and fields to most
    APIs.
    
    --with-extra-soversion-suffix= will allow Gentoo to inject
    additional keys into SONAME to indicate ABI change and avoid
    hard to diagnose crashes when user reinstalls libbfd.so
    built with different flags (see https://bugs.gentoo.org/663690).
    
    Bug: https://bugs.gentoo.org/666100
    Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>

 bfd/Makefile.am  |  5 +++++
 bfd/Makefile.in  |  4 ++++
 bfd/configure    | 13 +++++++++++++
 bfd/configure.ac |  7 +++++++
 4 files changed, 29 insertions(+)

commit 334d8d77998293e92fcfc824a307ed0a01abaf6f
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Tue Jul 5 20:24:00 2016 +0545

    Gentoo: opcodes: link against libbfd.la for rpath deps
    
    The reason opcodes doesn't link against libbfd.la is to workaround a
    libtool bug where it uses installed -L paths ahead of DESTDIR paths.
    The downside is that the library itself lacks rpath tags to find the
    right version of libbfd.so.
    
    Since Gentoo has patched the libtool bug for a while, we don't need
    the workaround.  Use the .la file so we get the rpath tags.
    
    URL: https://bugs.gentoo.org/563934
    (cherry picked from commit 662586237b0b00ee881e79b56f6234ff36e8bfe6)

 opcodes/configure    | 2 +-
 opcodes/configure.ac | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

commit 68e1d9d7c2694cc8e1dc560f90c13d73e01986f5
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Fri Jan 7 00:15:53 2005 -0500

    Gentoo: libiberty: install PIC version of libiberty.a
    
    This will install a PIC version of libiberty.a by overwriting the non-PIC
    version of libiberty.a while compiling.  We do this because there is no
    shared version of libiberty for random apps to link against which means if
    someone wants to use this in a shared library or PIE, they're out of luck.
    It's arguable whether people should be able to use this in a shared lib,
    but usage in PIE should be fine.  You could argue that this penalizes the
    non-PIE users, but the counter point is that people using this library in
    general are fairly low, and we'd rather have things work for all of them.
    
    (cherry picked from commit 112aff9ad3e2675556370c4281117a6df0a879d9)

 libiberty/Makefile.in | 1 +
 1 file changed, 1 insertion(+)

commit 14dd7bd91dc00d4d1a4bb44873e7107e6647e2dd
Author: Mike Frysinger <vapier@gentoo.org>
Date:   Tue Oct 10 22:53:53 2017 +0200

    Gentoo: gold/ld: add support for poisoned system directories
    
    This is based on the old CodeSourcery patch written by Joseph Myers to add
    support to the link for detecting & rejecting bad -L paths when using a
    cross-compiler.  The differences here:
    * The command line flags are always available.
    * We can turn on & off the warning via the command line.
    * The configure option controls the default warning behavior.
    * Add support for gold.
    
    It is not currently upstream, nor has it been submitted at all.  There are
    no plans to do so currently either.
    
    BUG=chromium:488360
    TEST=`cbuildbot chromiumos-sdk` passes  # tests arm/amd64/mipsel/x86
    TEST=`cbuildbot panther_moblab-full whirlwind-release` pass
    TEST=`cbuildbot {x32,arm64}-generic-full` has no new failures
    TEST=x86_64-cros-linux-gnu-ld throws warnings when using -L/lib (gold & bfd)
    
    Reviewed-on: https://chromium-review.googlesource.com/272083
    (cherry picked from commit f92dbf35c00ab13cee36f6be8ae5ca46454d9000)

 gold/options.cc | 33 +++++++++++++++++++++++++++++++++
 gold/options.h  |  7 +++++++
 ld/config.in    |  3 +++
 ld/configure    | 14 ++++++++++++++
 ld/configure.ac | 10 ++++++++++
 ld/ld.h         |  7 +++++++
 ld/ld.texi      | 18 ++++++++++++++++++
 ld/ldfile.c     | 20 ++++++++++++++++++++
 ld/ldlex.h      |  3 +++
 ld/ldmain.c     |  7 +++++++
 ld/lexsup.c     | 24 ++++++++++++++++++++++++
 11 files changed, 146 insertions(+)
